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authorJesse Gilles <jgilles@multitech.com>2010-04-22 16:41:04 -0500
committerJesse Gilles <jgilles@multitech.com>2010-04-26 11:50:38 -0500
commit5fd4e57da36d1c33e9b2bc86c5f6d9791c30aff2 (patch)
tree6f5467ccf65f4752094f1a4123f371d6687c9d4e
parent82701ed338eb73e83c65b01175b78d2c47045a5b (diff)
add u-boot 1.3.4
-rw-r--r--recipes/u-boot/u-boot-1.3.4/mtcdp/fw_env.config7
-rw-r--r--recipes/u-boot/u-boot-1.3.4/mtcdp/u-boot-1.3.4-mts.patch3256
-rw-r--r--recipes/u-boot/u-boot_1.3.4.bb28
3 files changed, 3291 insertions, 0 deletions
diff --git a/recipes/u-boot/u-boot-1.3.4/mtcdp/fw_env.config b/recipes/u-boot/u-boot-1.3.4/mtcdp/fw_env.config
new file mode 100644
index 0000000000..41b9605ee5
--- /dev/null
+++ b/recipes/u-boot/u-boot-1.3.4/mtcdp/fw_env.config
@@ -0,0 +1,7 @@
+# Configuration file for fw_{printenv,setenv} utility.
+# Up to two entries are valid, in this case the redundant
+# environment sector is assumed present.
+
+# MTD device name Device offset Env. size Flash sector size
+/dev/mtd3 0x0000 0x20000 0x20000
+/dev/mtd4 0x0000 0x20000 0x20000
diff --git a/recipes/u-boot/u-boot-1.3.4/mtcdp/u-boot-1.3.4-mts.patch b/recipes/u-boot/u-boot-1.3.4/mtcdp/u-boot-1.3.4-mts.patch
new file mode 100644
index 0000000000..8e2b658634
--- /dev/null
+++ b/recipes/u-boot/u-boot-1.3.4/mtcdp/u-boot-1.3.4-mts.patch
@@ -0,0 +1,3256 @@
+diff -uprN u-boot-1.3.4-vanilla/board/atmel/at91sam9260ek/at91sam9260ek.c u-boot-1.3.4/board/atmel/at91sam9260ek/at91sam9260ek.c
+--- u-boot-1.3.4-vanilla/board/atmel/at91sam9260ek/at91sam9260ek.c 2008-08-12 09:08:38.000000000 -0500
++++ u-boot-1.3.4/board/atmel/at91sam9260ek/at91sam9260ek.c 2010-03-25 16:45:59.000000000 -0500
+@@ -125,6 +125,8 @@ static void at91sam9260ek_spi_hw_init(vo
+ #ifdef CONFIG_MACB
+ static void at91sam9260ek_macb_hw_init(void)
+ {
++ unsigned long rstc;
++
+ /* Enable clock */
+ at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_EMAC);
+
+@@ -147,6 +149,8 @@ static void at91sam9260ek_macb_hw_init(v
+ pin_to_mask(AT91_PIN_PA28),
+ pin_to_controller(AT91_PIN_PA0) + PIO_PUDR);
+
++ rstc = at91_sys_read(AT91_RSTC_MR);
++
+ /* Need to reset PHY -> 500ms reset */
+ at91_sys_write(AT91_RSTC_MR, AT91_RSTC_KEY |
+ (AT91_RSTC_ERSTL & (0x0D << 8)) |
+@@ -159,9 +163,8 @@ static void at91sam9260ek_macb_hw_init(v
+
+ /* Restore NRST value */
+ at91_sys_write(AT91_RSTC_MR, AT91_RSTC_KEY |
+- (AT91_RSTC_ERSTL & (0x0 << 8)) |
++ (rstc) |
+ AT91_RSTC_URSTEN);
+-
+ /* Re-enable pull-up */
+ writel(pin_to_mask(AT91_PIN_PA14) |
+ pin_to_mask(AT91_PIN_PA15) |
+diff -uprN u-boot-1.3.4-vanilla/board/atmel/at91sam9263ek/at91sam9263ek.c u-boot-1.3.4/board/atmel/at91sam9263ek/at91sam9263ek.c
+--- u-boot-1.3.4-vanilla/board/atmel/at91sam9263ek/at91sam9263ek.c 2008-08-12 09:08:38.000000000 -0500
++++ u-boot-1.3.4/board/atmel/at91sam9263ek/at91sam9263ek.c 2010-03-25 16:45:59.000000000 -0500
+@@ -128,6 +128,8 @@ static void at91sam9263ek_spi_hw_init(vo
+ #ifdef CONFIG_MACB
+ static void at91sam9263ek_macb_hw_init(void)
+ {
++ unsigned long rstc;
++
+ /* Enable clock */
+ at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9263_ID_EMAC);
+
+@@ -145,6 +147,8 @@ static void at91sam9263ek_macb_hw_init(v
+ pin_to_mask(AT91_PIN_PE26),
+ pin_to_controller(AT91_PIN_PE0) + PIO_PUDR);
+
++ rstc = at91_sys_read(AT91_RSTC_MR);
++
+ /* Need to reset PHY -> 500ms reset */
+ at91_sys_write(AT91_RSTC_MR, AT91_RSTC_KEY |
+ (AT91_RSTC_ERSTL & (0x0D << 8)) |
+@@ -157,7 +161,7 @@ static void at91sam9263ek_macb_hw_init(v
+
+ /* Restore NRST value */
+ at91_sys_write(AT91_RSTC_MR, AT91_RSTC_KEY |
+- (AT91_RSTC_ERSTL & (0x0 << 8)) |
++ (rstc) |
+ AT91_RSTC_URSTEN);
+
+ /* Re-enable pull-up */
+diff -uprN u-boot-1.3.4-vanilla/board/atmel/at91sam9g10ek/at91sam9g10ek.c u-boot-1.3.4/board/atmel/at91sam9g10ek/at91sam9g10ek.c
+--- u-boot-1.3.4-vanilla/board/atmel/at91sam9g10ek/at91sam9g10ek.c 1969-12-31 17:00:00.000000000 -0700
++++ u-boot-1.3.4/board/atmel/at91sam9g10ek/at91sam9g10ek.c 2010-03-25 16:45:59.000000000 -0500
+@@ -0,0 +1,281 @@
++/*
++ * (C) Copyright 2007-2008
++ * Stelian Pop <stelian.pop@leadtechdesign.com>
++ * Lead Tech Design <www.leadtechdesign.com>
++ *
++ * See file CREDITS for list of people who contributed to this
++ * project.
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License as
++ * published by the Free Software Foundation; either version 2 of
++ * the License, or (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
++ * MA 02111-1307 USA
++ */
++
++#include <common.h>
++#include <asm/arch/at91sam9261.h>
++#include <asm/arch/at91sam9261_matrix.h>
++#include <asm/arch/at91sam9_smc.h>
++#include <asm/arch/at91_pmc.h>
++#include <asm/arch/at91_rstc.h>
++#include <asm/arch/gpio.h>
++#include <asm/arch/io.h>
++#include <lcd.h>
++#include <atmel_lcdc.h>
++#if defined(CONFIG_RESET_PHY_R) && defined(CONFIG_DRIVER_DM9000)
++#include <net.h>
++#endif
++
++DECLARE_GLOBAL_DATA_PTR;
++
++/* ------------------------------------------------------------------------- */
++/*
++ * Miscelaneous platform dependent initialisations
++ */
++
++static void at91sam9g10ek_serial_hw_init(void)
++{
++#ifdef CONFIG_USART0
++ at91_set_A_periph(AT91_PIN_PC8, 1); /* TXD0 */
++ at91_set_A_periph(AT91_PIN_PC9, 0); /* RXD0 */
++ at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_US0);
++#endif
++
++#ifdef CONFIG_USART1
++ at91_set_A_periph(AT91_PIN_PC12, 1); /* TXD1 */
++ at91_set_A_periph(AT91_PIN_PC13, 0); /* RXD1 */
++ at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_US1);
++#endif
++
++#ifdef CONFIG_USART2
++ at91_set_A_periph(AT91_PIN_PC14, 1); /* TXD2 */
++ at91_set_A_periph(AT91_PIN_PC15, 0); /* RXD2 */
++ at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_US2);
++#endif
++
++#ifdef CONFIG_USART3 /* DBGU */
++ at91_set_A_periph(AT91_PIN_PA9, 0); /* DRXD */
++ at91_set_A_periph(AT91_PIN_PA10, 1); /* DTXD */
++ at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_SYS);
++#endif
++}
++
++#ifdef CONFIG_CMD_NAND
++static void at91sam9g10ek_nand_hw_init(void)
++{
++ unsigned long csa;
++
++ /* Enable CS3 */
++ csa = at91_sys_read(AT91_MATRIX_EBICSA);
++ at91_sys_write(AT91_MATRIX_EBICSA,
++ csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA);
++
++ /* Configure SMC CS3 for NAND/SmartMedia */
++ at91_sys_write(AT91_SMC_SETUP(3),
++ /*
++ AT91_SMC_NWESETUP_(1) | AT91_SMC_NCS_WRSETUP_(0) |
++ AT91_SMC_NRDSETUP_(1) | AT91_SMC_NCS_RDSETUP_(0));
++ */
++ AT91_SMC_NWESETUP_(2) | AT91_SMC_NCS_WRSETUP_(0) |
++ AT91_SMC_NRDSETUP_(2) | AT91_SMC_NCS_RDSETUP_(0));
++ at91_sys_write(AT91_SMC_PULSE(3),
++ /*
++ AT91_SMC_NWEPULSE_(3) | AT91_SMC_NCS_WRPULSE_(3) |
++ AT91_SMC_NRDPULSE_(3) | AT91_SMC_NCS_RDPULSE_(3));
++ */
++ AT91_SMC_NWEPULSE_(3) | AT91_SMC_NCS_WRPULSE_(7) |
++ AT91_SMC_NRDPULSE_(3) | AT91_SMC_NCS_RDPULSE_(7));
++ at91_sys_write(AT91_SMC_CYCLE(3),
++ /*
++ AT91_SMC_NWECYCLE_(5) | AT91_SMC_NRDCYCLE_(5));
++ */
++ AT91_SMC_NWECYCLE_(7) | AT91_SMC_NRDCYCLE_(7));
++ at91_sys_write(AT91_SMC_MODE(3),
++ AT91_SMC_READMODE | AT91_SMC_WRITEMODE |
++ AT91_SMC_EXNWMODE_DISABLE |
++#ifdef CFG_NAND_DBW_16
++ AT91_SMC_DBW_16 |
++#else /* CFG_NAND_DBW_8 */
++ AT91_SMC_DBW_8 |
++#endif
++ AT91_SMC_TDF_(2));
++
++ at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9261_ID_PIOC);
++
++ /* Configure RDY/BSY */
++ at91_set_gpio_input(AT91_PIN_PC15, 1);
++
++ /* Enable NandFlash */
++ at91_set_gpio_output(AT91_PIN_PC14, 1);
++
++ at91_set_A_periph(AT91_PIN_PC0, 0); /* NANDOE */
++ at91_set_A_periph(AT91_PIN_PC1, 0); /* NANDWE */
++}
++#endif
++
++#ifdef CONFIG_HAS_DATAFLASH
++static void at91sam9g10ek_spi_hw_init(void)
++{
++ at91_set_A_periph(AT91_PIN_PA3, 0); /* SPI0_NPCS0 */
++
++ at91_set_A_periph(AT91_PIN_PA0, 0); /* SPI0_MISO */
++ at91_set_A_periph(AT91_PIN_PA1, 0); /* SPI0_MOSI */
++ at91_set_A_periph(AT91_PIN_PA2, 0); /* SPI0_SPCK */
++
++ /* Enable clock */
++ at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9261_ID_SPI0);
++}
++#endif
++
++#ifdef CONFIG_DRIVER_DM9000
++static void at91sam9g10ek_dm9000_hw_init(void)
++{
++ /* Configure SMC CS2 for DM9000 */
++ /*
++ at91_sys_write(AT91_SMC_SETUP(2),
++ AT91_SMC_NWESETUP_(2) | AT91_SMC_NCS_WRSETUP_(0) |
++ AT91_SMC_NRDSETUP_(2) | AT91_SMC_NCS_RDSETUP_(0));
++ at91_sys_write(AT91_SMC_PULSE(2),
++ AT91_SMC_NWEPULSE_(4) | AT91_SMC_NCS_WRPULSE_(8) |
++ AT91_SMC_NRDPULSE_(4) | AT91_SMC_NCS_RDPULSE_(8));
++ at91_sys_write(AT91_SMC_CYCLE(2),
++ AT91_SMC_NWECYCLE_(16) | AT91_SMC_NRDCYCLE_(16));
++ */
++ at91_sys_write(AT91_SMC_SETUP(2),
++ AT91_SMC_NWESETUP_(3) | AT91_SMC_NCS_WRSETUP_(0) |
++ AT91_SMC_NRDSETUP_(3) | AT91_SMC_NCS_RDSETUP_(0));
++ at91_sys_write(AT91_SMC_PULSE(2),
++ AT91_SMC_NWEPULSE_(6) | AT91_SMC_NCS_WRPULSE_(8) |
++ AT91_SMC_NRDPULSE_(6) | AT91_SMC_NCS_RDPULSE_(8));
++ at91_sys_write(AT91_SMC_CYCLE(2),
++ AT91_SMC_NWECYCLE_(20) | AT91_SMC_NRDCYCLE_(20));
++ at91_sys_write(AT91_SMC_MODE(2),
++ AT91_SMC_READMODE | AT91_SMC_WRITEMODE |
++ AT91_SMC_EXNWMODE_DISABLE |
++ AT91_SMC_BAT_WRITE | AT91_SMC_DBW_16 |
++ AT91_SMC_TDF_(1));
++
++ /* Configure Reset signal as output */
++ at91_set_gpio_output(AT91_PIN_PC10, 0);
++
++ /* Configure Interrupt pin as input, no pull-up */
++ at91_set_gpio_input(AT91_PIN_PC11, 0);
++}
++#endif
++
++#ifdef CONFIG_LCD
++vidinfo_t panel_info = {
++ vl_col: 240,
++ vl_row: 320,
++ vl_clk: 4965000,
++ vl_sync: ATMEL_LCDC_INVLINE_INVERTED |
++ ATMEL_LCDC_INVFRAME_INVERTED,
++ vl_bpix: 3,
++ vl_tft: 1,
++ vl_hsync_len: 5,
++ vl_left_margin: 1,
++ vl_right_margin:33,
++ vl_vsync_len: 1,
++ vl_upper_margin:1,
++ vl_lower_margin:0,
++ mmio: AT91SAM9261_LCDC_BASE,
++};
++
++void lcd_enable(void)
++{
++ at91_set_gpio_value(AT91_PIN_PA12, 0); /* power up */
++}
++
++void lcd_disable(void)
++{
++ at91_set_gpio_value(AT91_PIN_PA12, 1); /* power down */
++}
++
++static void at91sam9g10ek_lcd_hw_init(void)
++{
++ at91_set_A_periph(AT91_PIN_PB1, 0); /* LCDHSYNC */
++ at91_set_A_periph(AT91_PIN_PB2, 0); /* LCDDOTCK */
++ at91_set_A_periph(AT91_PIN_PB3, 0); /* LCDDEN */
++ at91_set_A_periph(AT91_PIN_PB4, 0); /* LCDCC */
++ at91_set_A_periph(AT91_PIN_PB7, 0); /* LCDD2 */
++ at91_set_A_periph(AT91_PIN_PB8, 0); /* LCDD3 */
++ at91_set_A_periph(AT91_PIN_PB9, 0); /* LCDD4 */
++ at91_set_A_periph(AT91_PIN_PB10, 0); /* LCDD5 */
++ at91_set_A_periph(AT91_PIN_PB11, 0); /* LCDD6 */
++ at91_set_A_periph(AT91_PIN_PB12, 0); /* LCDD7 */
++ at91_set_A_periph(AT91_PIN_PB15, 0); /* LCDD10 */
++ at91_set_A_periph(AT91_PIN_PB16, 0); /* LCDD11 */
++ at91_set_A_periph(AT91_PIN_PB17, 0); /* LCDD12 */
++ at91_set_A_periph(AT91_PIN_PB18, 0); /* LCDD13 */
++ at91_set_A_periph(AT91_PIN_PB19, 0); /* LCDD14 */
++ at91_set_A_periph(AT91_PIN_PB20, 0); /* LCDD15 */
++ at91_set_B_periph(AT91_PIN_PB23, 0); /* LCDD18 */
++ at91_set_B_periph(AT91_PIN_PB24, 0); /* LCDD19 */
++ at91_set_B_periph(AT91_PIN_PB25, 0); /* LCDD20 */
++ at91_set_B_periph(AT91_PIN_PB26, 0); /* LCDD21 */
++ at91_set_B_periph(AT91_PIN_PB27, 0); /* LCDD22 */
++ at91_set_B_periph(AT91_PIN_PB28, 0); /* LCDD23 */
++
++ at91_sys_write(AT91_PMC_SCER, AT91_PMC_HCK1);
++
++ /* gd->fb_base = AT91SAM9261_SRAM_BASE; */
++ gd->fb_base = 0x23E00000;
++
++}
++#endif
++
++int board_init(void)
++{
++ /* Enable Ctrlc */
++ console_init_f();
++
++ /* arch number of AT91SAM9G10EK-Board */
++ gd->bd->bi_arch_number = MACH_TYPE_AT91SAM9G10EK;
++ /* adress of boot parameters */
++ gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
++
++ at91sam9g10ek_serial_hw_init();
++#ifdef CONFIG_CMD_NAND
++ at91sam9g10ek_nand_hw_init();
++#endif
++#ifdef CONFIG_HAS_DATAFLASH
++ at91sam9g10ek_spi_hw_init();
++#endif
++#ifdef CONFIG_DRIVER_DM9000
++ at91sam9g10ek_dm9000_hw_init();
++#endif
++#ifdef CONFIG_LCD
++ at91sam9g10ek_lcd_hw_init();
++#endif
++ return 0;
++}
++
++int dram_init(void)
++{
++ gd->bd->bi_dram[0].start = PHYS_SDRAM;
++ gd->bd->bi_dram[0].size = PHYS_SDRAM_SIZE;
++ return 0;
++}
++
++#ifdef CONFIG_RESET_PHY_R
++void reset_phy(void)
++{
++#ifdef CONFIG_DRIVER_DM9000
++ /*
++ * Initialize ethernet HW addr prior to starting Linux,
++ * needed for nfsroot
++ */
++ eth_init(gd->bd);
++#endif
++}
++#endif
+diff -uprN u-boot-1.3.4-vanilla/board/atmel/at91sam9g10ek/config.mk u-boot-1.3.4/board/atmel/at91sam9g10ek/config.mk
+--- u-boot-1.3.4-vanilla/board/atmel/at91sam9g10ek/config.mk 1969-12-31 17:00:00.000000000 -0700
++++ u-boot-1.3.4/board/atmel/at91sam9g10ek/config.mk 2010-03-25 16:45:59.000000000 -0500
+@@ -0,0 +1 @@
++TEXT_BASE = 0x23f00000
+diff -uprN u-boot-1.3.4-vanilla/board/atmel/at91sam9g10ek/led.c u-boot-1.3.4/board/atmel/at91sam9g10ek/led.c
+--- u-boot-1.3.4-vanilla/board/atmel/at91sam9g10ek/led.c 1969-12-31 17:00:00.000000000 -0700
++++ u-boot-1.3.4/board/atmel/at91sam9g10ek/led.c 2010-03-25 16:45:59.000000000 -0500
+@@ -0,0 +1,78 @@
++/*
++ * (C) Copyright 2007-2008
++ * Stelian Pop <stelian.pop@leadtechdesign.com>
++ * Lead Tech Design <www.leadtechdesign.com>
++ *
++ * See file CREDITS for list of people who contributed to this
++ * project.
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License as
++ * published by the Free Software Foundation; either version 2 of
++ * the License, or (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
++ * MA 02111-1307 USA
++ */
++
++#include <common.h>
++#include <asm/arch/at91sam9261.h>
++#include <asm/arch/at91_pmc.h>
++#include <asm/arch/gpio.h>
++#include <asm/arch/io.h>
++
++#define RED_LED AT91_PIN_PA23 /* this is the power led */
++#define GREEN_LED AT91_PIN_PA13 /* this is the user1 led */
++#define YELLOW_LED AT91_PIN_PA14 /* this is the user2 led */
++
++void red_LED_on(void)
++{
++ at91_set_gpio_value(RED_LED, 1);
++}
++
++void red_LED_off(void)
++{
++ at91_set_gpio_value(RED_LED, 0);
++}
++
++void green_LED_on(void)
++{
++ at91_set_gpio_value(GREEN_LED, 0);
++}
++
++void green_LED_off(void)
++{
++ at91_set_gpio_value(GREEN_LED, 1);
++}
++
++void yellow_LED_on(void)
++{
++ at91_set_gpio_value(YELLOW_LED, 0);
++}
++
++void yellow_LED_off(void)
++{
++ at91_set_gpio_value(YELLOW_LED, 1);
++}
++
++
++void coloured_LED_init(void)
++{
++ /* Enable clock */
++ at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9261_ID_PIOA);
++
++ at91_set_gpio_output(RED_LED, 1);
++ at91_set_gpio_output(GREEN_LED, 1);
++ at91_set_gpio_output(YELLOW_LED, 1);
++
++ at91_set_gpio_value(RED_LED, 0);
++ at91_set_gpio_value(GREEN_LED, 1);
++ at91_set_gpio_value(YELLOW_LED, 1);
++}
+diff -uprN u-boot-1.3.4-vanilla/board/atmel/at91sam9g10ek/Makefile u-boot-1.3.4/board/atmel/at91sam9g10ek/Makefile
+--- u-boot-1.3.4-vanilla/board/atmel/at91sam9g10ek/Makefile 1969-12-31 17:00:00.000000000 -0700
++++ u-boot-1.3.4/board/atmel/at91sam9g10ek/Makefile 2010-03-25 16:45:59.000000000 -0500
+@@ -0,0 +1,57 @@
++#
++# (C) Copyright 2003-2008
++# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
++#
++# (C) Copyright 2008
++# Stelian Pop <stelian.pop@leadtechdesign.com>
++# Lead Tech Design <www.leadtechdesign.com>
++#
++# See file CREDITS for list of people who contributed to this
++# project.
++#
++# This program is free software; you can redistribute it and/or
++# modify it under the terms of the GNU General Public License as
++# published by the Free Software Foundation; either version 2 of
++# the License, or (at your option) any later version.
++#
++# This program is distributed in the hope that it will be useful,
++# but WITHOUT ANY WARRANTY; without even the implied warranty of
++# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++# GNU General Public License for more details.
++#
++# You should have received a copy of the GNU General Public License
++# along with this program; if not, write to the Free Software
++# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
++# MA 02111-1307 USA
++#
++
++include $(TOPDIR)/config.mk
++
++LIB = $(obj)lib$(BOARD).a
++
++COBJS-y += at91sam9g10ek.o
++COBJS-y += led.o
++COBJS-y += partition.o
++COBJS-$(CONFIG_CMD_NAND) += nand.o
++
++SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
++OBJS := $(addprefix $(obj),$(COBJS-y))
++SOBJS := $(addprefix $(obj),$(SOBJS))
++
++$(LIB): $(obj).depend $(OBJS) $(SOBJS)
++ $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
++
++clean:
++ rm -f $(SOBJS) $(OBJS)
++
++distclean: clean
++ rm -f $(LIB) core *.bak $(obj).depend
++
++#########################################################################
++
++# defines $(obj).depend target
++include $(SRCTREE)/rules.mk
++
++sinclude $(obj).depend
++
++#########################################################################
+diff -uprN u-boot-1.3.4-vanilla/board/atmel/at91sam9g10ek/nand.c u-boot-1.3.4/board/atmel/at91sam9g10ek/nand.c
+--- u-boot-1.3.4-vanilla/board/atmel/at91sam9g10ek/nand.c 1969-12-31 17:00:00.000000000 -0700
++++ u-boot-1.3.4/board/atmel/at91sam9g10ek/nand.c 2010-03-25 16:45:59.000000000 -0500
+@@ -0,0 +1,79 @@
++/*
++ * (C) Copyright 2007-2008
++ * Stelian Pop <stelian.pop@leadtechdesign.com>
++ * Lead Tech Design <www.leadtechdesign.com>
++ *
++ * (C) Copyright 2006 ATMEL Rousset, Lacressonniere Nicolas
++ *
++ * See file CREDITS for list of people who contributed to this
++ * project.
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License as
++ * published by the Free Software Foundation; either version 2 of
++ * the License, or (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
++ * MA 02111-1307 USA
++ */
++
++#include <common.h>
++#include <asm/arch/at91sam9261.h>
++#include <asm/arch/gpio.h>
++#include <asm/arch/at91_pio.h>
++
++#include <nand.h>
++
++/*
++ * hardware specific access to control-lines
++ */
++#define MASK_ALE (1 << 22) /* our ALE is AD22 */
++#define MASK_CLE (1 << 21) /* our CLE is AD21 */
++
++static void at91sam9261ek_nand_hwcontrol(struct mtd_info *mtd, int cmd)
++{
++ struct nand_chip *this = mtd->priv;
++ ulong IO_ADDR_W = (ulong) this->IO_ADDR_W;
++
++ IO_ADDR_W &= ~(MASK_ALE|MASK_CLE);
++ switch (cmd) {
++ case NAND_CTL_SETCLE:
++ IO_ADDR_W |= MASK_CLE;
++ break;
++ case NAND_CTL_SETALE:
++ IO_ADDR_W |= MASK_ALE;
++ break;
++ case NAND_CTL_CLRNCE:
++ at91_set_gpio_value(AT91_PIN_PC14, 1);
++ break;
++ case NAND_CTL_SETNCE:
++ at91_set_gpio_value(AT91_PIN_PC14, 0);
++ break;
++ }
++ this->IO_ADDR_W = (void *) IO_ADDR_W;
++}
++
++static int at91sam9261ek_nand_ready(struct mtd_info *mtd)
++{
++ return at91_get_gpio_value(AT91_PIN_PC15);
++}
++
++int board_nand_init(struct nand_chip *nand)
++{
++ nand->eccmode = NAND_ECC_SOFT;
++#ifdef CFG_NAND_DBW_16
++ nand->options = NAND_BUSWIDTH_16;
++#endif
++ nand->hwcontrol = at91sam9261ek_nand_hwcontrol;
++ nand->dev_ready = at91sam9261ek_nand_ready;
++ nand->chip_delay = 20;
++
++ return 0;
++}
+diff -uprN u-boot-1.3.4-vanilla/board/atmel/at91sam9g10ek/partition.c u-boot-1.3.4/board/atmel/at91sam9g10ek/partition.c
+--- u-boot-1.3.4-vanilla/board/atmel/at91sam9g10ek/partition.c 1969-12-31 17:00:00.000000000 -0700
++++ u-boot-1.3.4/board/atmel/at91sam9g10ek/partition.c 2010-03-25 16:45:59.000000000 -0500
+@@ -0,0 +1,40 @@
++/*
++ * (C) Copyright 2008
++ * Ulf Samuelsson <ulf@atmel.com>
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License as
++ * published by the Free Software Foundation; either version 2 of
++ * the License, or (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
++ * MA 02111-1307 USA
++ *
++ */
++#include <common.h>
++#include <config.h>
++#include <asm/hardware.h>
++#include <dataflash.h>
++
++AT91S_DATAFLASH_INFO dataflash_info[CFG_MAX_DATAFLASH_BANKS];
++
++struct dataflash_addr cs[CFG_MAX_DATAFLASH_BANKS] = {
++ {CFG_DATAFLASH_LOGIC_ADDR_CS0, 0}, /* Logical adress, CS */
++ {CFG_DATAFLASH_LOGIC_ADDR_CS3, 3}
++};
++
++/*define the area offsets*/
++dataflash_protect_t area_list[NB_DATAFLASH_AREA] = {
++ {0x00000000, 0x000041FF, FLAG_PROTECT_SET, 0, "Bootstrap"},
++ {0x00004200, 0x000083FF, FLAG_PROTECT_CLEAR, 0, "Environment"},
++ {0x00008400, 0x00041FFF, FLAG_PROTECT_SET, 0, "U-Boot"},
++ {0x00042000, 0x00251FFF, FLAG_PROTECT_CLEAR, 0, "Kernel"},
++ {0x00252000, 0xFFFFFFFF, FLAG_PROTECT_CLEAR, 0, "FS"},
++};
+diff -uprN u-boot-1.3.4-vanilla/board/atmel/at91sam9g20ek/at91sam9g20ek.c u-boot-1.3.4/board/atmel/at91sam9g20ek/at91sam9g20ek.c
+--- u-boot-1.3.4-vanilla/board/atmel/at91sam9g20ek/at91sam9g20ek.c 1969-12-31 17:00:00.000000000 -0700
++++ u-boot-1.3.4/board/atmel/at91sam9g20ek/at91sam9g20ek.c 2010-03-25 16:45:59.000000000 -0500
+@@ -0,0 +1,258 @@
++/*
++ * (C) Copyright 2007-2008
++ * Stelian Pop <stelian.pop@leadtechdesign.com>
++ * Lead Tech Design <www.leadtechdesign.com>
++ *
++ * See file CREDITS for list of people who contributed to this
++ * project.
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License as
++ * published by the Free Software Foundation; either version 2 of
++ * the License, or (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
++ * MA 02111-1307 USA
++ */
++
++#include <common.h>
++#include <asm/arch/at91sam9260.h>
++#include <asm/arch/at91sam9260_matrix.h>
++#include <asm/arch/at91sam9_smc.h>
++#include <asm/arch/at91_pmc.h>
++#include <asm/arch/at91_rstc.h>
++#include <asm/arch/gpio.h>
++#include <asm/arch/io.h>
++#if defined(CONFIG_RESET_PHY_R) && defined(CONFIG_MACB)
++#include <net.h>
++#endif
++
++DECLARE_GLOBAL_DATA_PTR;
++
++/* ------------------------------------------------------------------------- */
++/*
++ * Miscelaneous platform dependent initialisations
++ */
++
++static void at91sam9g20ek_serial_hw_init(void)
++{
++#ifdef CONFIG_USART0
++ at91_set_A_periph(AT91_PIN_PB4, 1); /* TXD0 */
++ at91_set_A_periph(AT91_PIN_PB5, 0); /* RXD0 */
++ at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_US0);
++#endif
++
++#ifdef CONFIG_USART1
++ at91_set_A_periph(AT91_PIN_PB6, 1); /* TXD1 */
++ at91_set_A_periph(AT91_PIN_PB7, 0); /* RXD1 */
++ at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_US1);
++#endif
++
++#ifdef CONFIG_USART2
++ at91_set_A_periph(AT91_PIN_PB8, 1); /* TXD2 */
++ at91_set_A_periph(AT91_PIN_PB9, 0); /* RXD2 */
++ at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_US2);
++#endif
++
++#ifdef CONFIG_USART3 /* DBGU */
++ at91_set_A_periph(AT91_PIN_PB14, 0); /* DRXD */
++ at91_set_A_periph(AT91_PIN_PB15, 1); /* DTXD */
++ at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_SYS);
++#endif
++}
++
++#ifdef CONFIG_CMD_NAND
++static void at91sam9g20ek_nand_hw_init(void)
++{
++ unsigned long csa;
++
++ /* Enable CS3 */
++ csa = at91_sys_read(AT91_MATRIX_EBICSA);
++ at91_sys_write(AT91_MATRIX_EBICSA,
++ csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA);
++
++ /* Configure SMC CS3 for NAND/SmartMedia */
++ at91_sys_write(AT91_SMC_SETUP(3),
++ AT91_SMC_NWESETUP_(2) | AT91_SMC_NCS_WRSETUP_(0) |
++ AT91_SMC_NRDSETUP_(2) | AT91_SMC_NCS_RDSETUP_(0));
++ at91_sys_write(AT91_SMC_PULSE(3),
++ AT91_SMC_NWEPULSE_(4) | AT91_SMC_NCS_WRPULSE_(3) |
++ AT91_SMC_NRDPULSE_(4) | AT91_SMC_NCS_RDPULSE_(3));
++ at91_sys_write(AT91_SMC_CYCLE(3),
++ AT91_SMC_NWECYCLE_(7) | AT91_SMC_NRDCYCLE_(7));
++ at91_sys_write(AT91_SMC_MODE(3),
++ AT91_SMC_READMODE | AT91_SMC_WRITEMODE |
++ AT91_SMC_EXNWMODE_DISABLE |
++#ifdef CFG_NAND_DBW_16
++ AT91_SMC_DBW_16 |
++#else /* CFG_NAND_DBW_8 */
++ AT91_SMC_DBW_8 |
++#endif
++ AT91_SMC_TDF_(3));
++
++ at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_PIOC);
++
++ /* Configure RDY/BSY */
++ at91_set_gpio_input(AT91_PIN_PC13, 1);
++
++ /* Enable NandFlash */
++ at91_set_gpio_output(AT91_PIN_PC14, 1);
++}
++#endif
++
++#ifdef CONFIG_HAS_DATAFLASH
++static void at91sam9g20ek_spi_hw_init(void)
++{
++ at91_set_A_periph(AT91_PIN_PA3, 0); /* SPI0_NPCS0 */
++ at91_set_B_periph(AT91_PIN_PC11, 0); /* SPI0_NPCS1 */
++
++ at91_set_A_periph(AT91_PIN_PA0, 0); /* SPI0_MISO */
++ at91_set_A_periph(AT91_PIN_PA1, 0); /* SPI0_MOSI */
++ at91_set_A_periph(AT91_PIN_PA2, 0); /* SPI0_SPCK */
++
++ /* Enable clock */
++ at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_SPI0);
++}
++#endif
++
++#ifdef CONFIG_MACB
++static void at91sam9g20ek_macb_hw_init(void)
++{
++ unsigned long rstc;
++
++ /* Enable clock */
++ at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_EMAC);
++
++ /*
++ * Disable pull-up on:
++ * RXDV (PA17) => PHY normal mode (not Test mode)
++ * ERX0 (PA14) => PHY ADDR0
++ * ERX1 (PA15) => PHY ADDR1
++ * ERX2 (PA25) => PHY ADDR2
++ * ERX3 (PA26) => PHY ADDR3
++ * ECRS (PA28) => PHY ADDR4 => PHYADDR = 0x0
++ *
++ * PHY has internal pull-down
++ */
++ writel(pin_to_mask(AT91_PIN_PA14) |
++ pin_to_mask(AT91_PIN_PA15) |
++ pin_to_mask(AT91_PIN_PA17) |
++ pin_to_mask(AT91_PIN_PA25) |
++ pin_to_mask(AT91_PIN_PA26) |
++ pin_to_mask(AT91_PIN_PA28),
++ pin_to_controller(AT91_PIN_PA0) + PIO_PUDR);
++
++ rstc = at91_sys_read(AT91_RSTC_MR);
++
++ /* Need to reset PHY -> 500ms reset */
++ at91_sys_write(AT91_RSTC_MR, AT91_RSTC_KEY |
++ (AT91_RSTC_ERSTL & (0x0D << 8)) |
++ AT91_RSTC_URSTEN);
++
++ at91_sys_write(AT91_RSTC_CR, AT91_RSTC_KEY | AT91_RSTC_EXTRST);
++
++ /* Wait for end hardware reset */
++ while (!(at91_sys_read(AT91_RSTC_SR) & AT91_RSTC_NRSTL));
++
++ /* Restore NRST value */
++ at91_sys_write(AT91_RSTC_MR, AT91_RSTC_KEY |
++ (rstc) |
++ AT91_RSTC_URSTEN);
++
++ /* Re-enable pull-up */
++ writel(pin_to_mask(AT91_PIN_PA14) |
++ pin_to_mask(AT91_PIN_PA15) |
++ pin_to_mask(AT91_PIN_PA17) |
++ pin_to_mask(AT91_PIN_PA25) |
++ pin_to_mask(AT91_PIN_PA26) |
++ pin_to_mask(AT91_PIN_PA28),
++ pin_to_controller(AT91_PIN_PA0) + PIO_PUER);
++
++ at91_set_A_periph(AT91_PIN_PA19, 0); /* ETXCK_EREFCK */
++ at91_set_A_periph(AT91_PIN_PA17, 0); /* ERXDV */
++ at91_set_A_periph(AT91_PIN_PA14, 0); /* ERX0 */
++ at91_set_A_periph(AT91_PIN_PA15, 0); /* ERX1 */
++ at91_set_A_periph(AT91_PIN_PA18, 0); /* ERXER */
++ at91_set_A_periph(AT91_PIN_PA16, 0); /* ETXEN */
++ at91_set_A_periph(AT91_PIN_PA12, 0); /* ETX0 */
++ at91_set_A_periph(AT91_PIN_PA13, 0); /* ETX1 */
++ at91_set_A_periph(AT91_PIN_PA21, 0); /* EMDIO */
++ at91_set_A_periph(AT91_PIN_PA20, 0); /* EMDC */
++
++#ifndef CONFIG_RMII
++ at91_set_B_periph(AT91_PIN_PA28, 0); /* ECRS */
++ at91_set_B_periph(AT91_PIN_PA29, 0); /* ECOL */
++ at91_set_B_periph(AT91_PIN_PA25, 0); /* ERX2 */
++ at91_set_B_periph(AT91_PIN_PA26, 0); /* ERX3 */
++ at91_set_B_periph(AT91_PIN_PA27, 0); /* ERXCK */
++#if defined(CONFIG_AT91SAM9G20EK) || defined(CONFIG_AT91SAM9G20EK_2MMC)
++ /*
++ * use PA10, PA11 for ETX2, ETX3.
++ * PA23 and PA24 are for TWI EEPROM
++ */
++ at91_set_B_periph(AT91_PIN_PA10, 0); /* ETX2 */
++ at91_set_B_periph(AT91_PIN_PA11, 0); /* ETX3 */
++#else
++ at91_set_B_periph(AT91_PIN_PA23, 0); /* ETX2 */
++ at91_set_B_periph(AT91_PIN_PA24, 0); /* ETX3 */
++#endif
++ at91_set_B_periph(AT91_PIN_PA22, 0); /* ETXER */
++#endif
++
++}
++#endif
++
++int board_init(void)
++{
++ /* Enable Ctrlc */
++ console_init_f();
++
++ /* arch number of AT91SAM9G20EK-Board */
++#ifdef CONFIG_AT91SAM9G20EK_2MMC
++ gd->bd->bi_arch_number = MACH_TYPE_AT91SAM9G20EK_2MMC;
++#else
++ gd->bd->bi_arch_number = MACH_TYPE_AT91SAM9G20EK;
++#endif
++ /* adress of boot parameters */
++ gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
++
++ at91sam9g20ek_serial_hw_init();
++#ifdef CONFIG_CMD_NAND
++ at91sam9g20ek_nand_hw_init();
++#endif
++#ifdef CONFIG_HAS_DATAFLASH
++ at91sam9g20ek_spi_hw_init();
++#endif
++#ifdef CONFIG_MACB
++ at91sam9g20ek_macb_hw_init();
++#endif
++
++ return 0;
++}
++
++int dram_init(void)
++{
++ gd->bd->bi_dram[0].start = PHYS_SDRAM;
++ gd->bd->bi_dram[0].size = PHYS_SDRAM_SIZE;
++ return 0;
++}
++
++#ifdef CONFIG_RESET_PHY_R
++void reset_phy(void)
++{
++#ifdef CONFIG_MACB
++ /*
++ * Initialize ethernet HW addr prior to starting Linux,
++ * needed for nfsroot
++ */
++ eth_init(gd->bd);
++#endif
++}
++#endif
+diff -uprN u-boot-1.3.4-vanilla/board/atmel/at91sam9g20ek/config.mk u-boot-1.3.4/board/atmel/at91sam9g20ek/config.mk
+--- u-boot-1.3.4-vanilla/board/atmel/at91sam9g20ek/config.mk 1969-12-31 17:00:00.000000000 -0700
++++ u-boot-1.3.4/board/atmel/at91sam9g20ek/config.mk 2010-03-25 16:45:59.000000000 -0500
+@@ -0,0 +1 @@
++TEXT_BASE = 0x23f00000
+diff -uprN u-boot-1.3.4-vanilla/board/atmel/at91sam9g20ek/led.c u-boot-1.3.4/board/atmel/at91sam9g20ek/led.c
+--- u-boot-1.3.4-vanilla/board/atmel/at91sam9g20ek/led.c 1969-12-31 17:00:00.000000000 -0700
++++ u-boot-1.3.4/board/atmel/at91sam9g20ek/led.c 2010-03-25 18:48:37.000000000 -0500
+@@ -0,0 +1,69 @@
++/*
++ * (C) Copyright 2007-2008
++ * Stelian Pop <stelian.pop@leadtechdesign.com>
++ * Lead Tech Design <www.leadtechdesign.com>
++ *
++ * See file CREDITS for list of people who contributed to this
++ * project.
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License as
++ * published by the Free Software Foundation; either version 2 of
++ * the License, or (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
++ * MA 02111-1307 USA
++ */
++
++#include <common.h>
++#include <asm/arch/at91sam9260.h>
++#include <asm/arch/at91_pmc.h>
++#include <asm/arch/gpio.h>
++#include <asm/arch/io.h>
++
++#ifdef CONFIG_AT91SAM9G20EK_2MMC
++#define RED_LED AT91_PIN_PB31 /* this is the power led */
++#define GREEN_LED AT91_PIN_PB30 /* this is the user led */
++#else
++#define RED_LED AT91_PIN_PA31 /* this is the power led */
++#define GREEN_LED AT91_PIN_PA30 /* this is the user led */
++#endif
++
++void red_LED_on(void)
++{
++ at91_set_gpio_value(RED_LED, 1);
++}
++
++void red_LED_off(void)
++{
++ at91_set_gpio_value(RED_LED, 0);
++}
++
++void green_LED_on(void)
++{
++ at91_set_gpio_value(GREEN_LED, 0);
++}
++
++void green_LED_off(void)
++{
++ at91_set_gpio_value(GREEN_LED, 1);
++}
++
++void coloured_LED_init(void)
++{
++ /* Enable clock */
++ at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_PIOA);
++
++ at91_set_gpio_output(RED_LED, 1);
++ at91_set_gpio_output(GREEN_LED, 1);
++
++ at91_set_gpio_value(RED_LED, 0);
++ at91_set_gpio_value(GREEN_LED, 1);
++}
+diff -uprN u-boot-1.3.4-vanilla/board/atmel/at91sam9g20ek/Makefile u-boot-1.3.4/board/atmel/at91sam9g20ek/Makefile
+--- u-boot-1.3.4-vanilla/board/atmel/at91sam9g20ek/Makefile 1969-12-31 17:00:00.000000000 -0700
++++ u-boot-1.3.4/board/atmel/at91sam9g20ek/Makefile 2010-03-25 16:45:59.000000000 -0500
+@@ -0,0 +1,57 @@
++#
++# (C) Copyright 2003-2008
++# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
++#
++# (C) Copyright 2008
++# Stelian Pop <stelian.pop@leadtechdesign.com>
++# Lead Tech Design <www.leadtechdesign.com>
++#
++# See file CREDITS for list of people who contributed to this
++# project.
++#
++# This program is free software; you can redistribute it and/or
++# modify it under the terms of the GNU General Public License as
++# published by the Free Software Foundation; either version 2 of
++# the License, or (at your option) any later version.
++#
++# This program is distributed in the hope that it will be useful,
++# but WITHOUT ANY WARRANTY; without even the implied warranty of
++# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++# GNU General Public License for more details.
++#
++# You should have received a copy of the GNU General Public License
++# along with this program; if not, write to the Free Software
++# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
++# MA 02111-1307 USA
++#
++
++include $(TOPDIR)/config.mk
++
++LIB = $(obj)lib$(BOARD).a
++
++COBJS-y += at91sam9g20ek.o
++COBJS-y += led.o
++COBJS-y += partition.o
++COBJS-$(CONFIG_CMD_NAND) += nand.o
++
++SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
++OBJS := $(addprefix $(obj),$(COBJS-y))
++SOBJS := $(addprefix $(obj),$(SOBJS))
++
++$(LIB): $(obj).depend $(OBJS) $(SOBJS)
++ $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
++
++clean:
++ rm -f $(SOBJS) $(OBJS)
++
++distclean: clean
++ rm -f $(LIB) core *.bak $(obj).depend
++
++#########################################################################
++
++# defines $(obj).depend target
++include $(SRCTREE)/rules.mk
++
++sinclude $(obj).depend
++
++#########################################################################
+diff -uprN u-boot-1.3.4-vanilla/board/atmel/at91sam9g20ek/nand.c u-boot-1.3.4/board/atmel/at91sam9g20ek/nand.c
+--- u-boot-1.3.4-vanilla/board/atmel/at91sam9g20ek/nand.c 1969-12-31 17:0