diff options
19 files changed, 3200 insertions, 19 deletions
diff --git a/recipes/linux/linux-omap-2.6.31/beagleboard/defconfig b/recipes/linux/linux-omap-2.6.31/beagleboard/defconfig index 81f3cadce4..629148b783 100644 --- a/recipes/linux/linux-omap-2.6.31/beagleboard/defconfig +++ b/recipes/linux/linux-omap-2.6.31/beagleboard/defconfig @@ -224,7 +224,7 @@ CONFIG_ARCH_OMAP3430=y # CONFIG_MACH_OMAP3_BEAGLE=y # CONFIG_MACH_OMAP_LDP is not set -CONFIG_MACH_OVERO=y +CONFIG_MACH_OVERO=n CONFIG_MACH_OMAP3EVM=y # CONFIG_MACH_OMAP3_PANDORA is not set # CONFIG_MACH_OMAP_3430SDP is not set diff --git a/recipes/linux/linux-omap-2.6.31/beagleboard/ehci.patch b/recipes/linux/linux-omap-2.6.31/beagleboard/ehci.patch index 633b1b2269..d8dcd522dc 100644 --- a/recipes/linux/linux-omap-2.6.31/beagleboard/ehci.patch +++ b/recipes/linux/linux-omap-2.6.31/beagleboard/ehci.patch @@ -20,16 +20,3 @@ index 07aee90..65934ea 100644 /* TWL4030_GPIO_MAX + 1 == ledB, PMU_STAT (out, active low LED) */ gpio_leds[2].gpio = gpio + TWL4030_GPIO_MAX + 1; -@@ -412,7 +412,8 @@ static void __init omap3_beagle_init(void) - gpio_direction_output(170, true); - - usb_musb_init(); -- usb_ehci_init(EHCI_HCD_OMAP_MODE_PHY, true, true, 57, 61); -+ usb_ehci_init(EHCI_HCD_OMAP_MODE_PHY, false, true, -+ -EINVAL, 147); - omap3beagle_flash_init(); - - /* Ensure SDRC pins are mux'd for self-refresh */ --- -1.6.0.4 - diff --git a/recipes/linux/linux-omap-2.6.31/usb/0001-musb-fix-put_device-call-sequence.patch b/recipes/linux/linux-omap-2.6.31/usb/0001-musb-fix-put_device-call-sequence.patch new file mode 100644 index 0000000000..1164fcb417 --- /dev/null +++ b/recipes/linux/linux-omap-2.6.31/usb/0001-musb-fix-put_device-call-sequence.patch @@ -0,0 +1,45 @@ +From f5d23fe1ff54df953c7b65699d6065b4a6336932 Mon Sep 17 00:00:00 2001 +From: Ajay Kumar Gupta <ajay.gupta@ti.com> +Date: Mon, 3 Aug 2009 11:16:18 +0530 +Subject: [PATCH 01/16] musb: fix put_device() call sequence + +Invoke put_device(musb->xceiv->dev) before musb_platform_exit()as +xceiv is getting unregistered in musb_platform_exit(). + +Fixes put_device() panic when module insert/removal is performed +multiple times. + +Signed-off-by: Ajay Kumar Gupta <ajay.gupta@ti.com> +--- + drivers/usb/musb/musb_core.c | 8 ++++---- + 1 files changed, 4 insertions(+), 4 deletions(-) + +diff --git a/drivers/usb/musb/musb_core.c b/drivers/usb/musb/musb_core.c +index c7c1ca0..129f9dc 100644 +--- a/drivers/usb/musb/musb_core.c ++++ b/drivers/usb/musb/musb_core.c +@@ -1850,6 +1850,10 @@ static void musb_free(struct musb *musb) + dma_controller_destroy(c); + } + ++#ifdef CONFIG_USB_MUSB_OTG ++ put_device(musb->xceiv->dev); ++#endif ++ + musb_writeb(musb->mregs, MUSB_DEVCTL, 0); + musb_platform_exit(musb); + musb_writeb(musb->mregs, MUSB_DEVCTL, 0); +@@ -1859,10 +1863,6 @@ static void musb_free(struct musb *musb) + clk_put(musb->clock); + } + +-#ifdef CONFIG_USB_MUSB_OTG +- put_device(musb->xceiv->dev); +-#endif +- + #ifdef CONFIG_USB_MUSB_HDRC_HCD + usb_put_hcd(musb_to_hcd(musb)); + #else +-- +1.6.2.4 + diff --git a/recipes/linux/linux-omap-2.6.31/usb/0002-ehci-fix-ehci-pin-mux-init.patch b/recipes/linux/linux-omap-2.6.31/usb/0002-ehci-fix-ehci-pin-mux-init.patch new file mode 100644 index 0000000000..82e4c1edb0 --- /dev/null +++ b/recipes/linux/linux-omap-2.6.31/usb/0002-ehci-fix-ehci-pin-mux-init.patch @@ -0,0 +1,206 @@ +From 9c6a05af8f862025f5187a2f37be87db39ae709f Mon Sep 17 00:00:00 2001 +From: Ajay Kumar Gupta <ajay.gupta@ti.com> +Date: Fri, 3 Jul 2009 15:55:24 +0530 +Subject: [PATCH 02/16] ehci: fix ehci pin mux init + +EHCI pin mux init fucntion is still using old #ifdef which are not defined +anymore.This causes pin mux init to always set TLL settings and thus EHCI +PHY mode doesn't work. + +Fixing this issue by using phy_mode parameter to initialize mux settings. + +Signed-off-by: Ajay Kumar Gupta <ajay.gupta@ti.com> +Signed-off-by: Felipe Balbi <felipe.balbi@nokia.com> +--- + arch/arm/mach-omap2/usb-ehci.c | 167 ++++++++++++++++++++-------------------- + 1 files changed, 83 insertions(+), 84 deletions(-) + +diff --git a/arch/arm/mach-omap2/usb-ehci.c b/arch/arm/mach-omap2/usb-ehci.c +index 56fc7f4..6a96569 100644 +--- a/arch/arm/mach-omap2/usb-ehci.c ++++ b/arch/arm/mach-omap2/usb-ehci.c +@@ -68,90 +68,89 @@ static struct platform_device ehci_device = { + /* + * setup_ehci_io_mux - initialize IO pad mux for USBHOST + */ +-static void setup_ehci_io_mux(void) ++static void setup_ehci_io_mux(enum ehci_hcd_omap_mode phy_mode) + { +-#ifdef CONFIG_OMAP_EHCI_PHY_MODE +- /* PHY mode of operation for board: 750-2083-001 +- * ISP1504 connected to Port1 and Port2 +- * Do Func Mux setting for 12-pin ULPI PHY mode +- */ +- +- /* Port1 */ +- omap_cfg_reg(Y9_3430_USB1HS_PHY_STP); +- omap_cfg_reg(Y8_3430_USB1HS_PHY_CLK); +- omap_cfg_reg(AA14_3430_USB1HS_PHY_DIR); +- omap_cfg_reg(AA11_3430_USB1HS_PHY_NXT); +- omap_cfg_reg(W13_3430_USB1HS_PHY_DATA0); +- omap_cfg_reg(W12_3430_USB1HS_PHY_DATA1); +- omap_cfg_reg(W11_3430_USB1HS_PHY_DATA2); +- omap_cfg_reg(Y11_3430_USB1HS_PHY_DATA3); +- omap_cfg_reg(W9_3430_USB1HS_PHY_DATA4); +- omap_cfg_reg(Y12_3430_USB1HS_PHY_DATA5); +- omap_cfg_reg(W8_3430_USB1HS_PHY_DATA6); +- omap_cfg_reg(Y13_3430_USB1HS_PHY_DATA7); +- +- /* Port2 */ +- omap_cfg_reg(AA10_3430_USB2HS_PHY_STP); +- omap_cfg_reg(AA8_3430_USB2HS_PHY_CLK); +- omap_cfg_reg(AA9_3430_USB2HS_PHY_DIR); +- omap_cfg_reg(AB11_3430_USB2HS_PHY_NXT); +- omap_cfg_reg(AB10_3430_USB2HS_PHY_DATA0); +- omap_cfg_reg(AB9_3430_USB2HS_PHY_DATA1); +- omap_cfg_reg(W3_3430_USB2HS_PHY_DATA2); +- omap_cfg_reg(T4_3430_USB2HS_PHY_DATA3); +- omap_cfg_reg(T3_3430_USB2HS_PHY_DATA4); +- omap_cfg_reg(R3_3430_USB2HS_PHY_DATA5); +- omap_cfg_reg(R4_3430_USB2HS_PHY_DATA6); +- omap_cfg_reg(T2_3430_USB2HS_PHY_DATA7); +- +-#else +- /* Set Func mux for : +- * TLL mode of operation +- * 12-pin ULPI SDR TLL mode for Port1/2/3 +- */ +- +- /* Port1 */ +- omap_cfg_reg(Y9_3430_USB1HS_TLL_STP); +- omap_cfg_reg(Y8_3430_USB1HS_TLL_CLK); +- omap_cfg_reg(AA14_3430_USB1HS_TLL_DIR); +- omap_cfg_reg(AA11_3430_USB1HS_TLL_NXT); +- omap_cfg_reg(W13_3430_USB1HS_TLL_DATA0); +- omap_cfg_reg(W12_3430_USB1HS_TLL_DATA1); +- omap_cfg_reg(W11_3430_USB1HS_TLL_DATA2); +- omap_cfg_reg(Y11_3430_USB1HS_TLL_DATA3); +- omap_cfg_reg(W9_3430_USB1HS_TLL_DATA4); +- omap_cfg_reg(Y12_3430_USB1HS_TLL_DATA5); +- omap_cfg_reg(W8_3430_USB1HS_TLL_DATA6); +- omap_cfg_reg(Y13_3430_USB1HS_TLL_DATA7); +- +- /* Port2 */ +- omap_cfg_reg(AA10_3430_USB2HS_TLL_STP); +- omap_cfg_reg(AA8_3430_USB2HS_TLL_CLK); +- omap_cfg_reg(AA9_3430_USB2HS_TLL_DIR); +- omap_cfg_reg(AB11_3430_USB2HS_TLL_NXT); +- omap_cfg_reg(AB10_3430_USB2HS_TLL_DATA0); +- omap_cfg_reg(AB9_3430_USB2HS_TLL_DATA1); +- omap_cfg_reg(W3_3430_USB2HS_TLL_DATA2); +- omap_cfg_reg(T4_3430_USB2HS_TLL_DATA3); +- omap_cfg_reg(T3_3430_USB2HS_TLL_DATA4); +- omap_cfg_reg(R3_3430_USB2HS_TLL_DATA5); +- omap_cfg_reg(R4_3430_USB2HS_TLL_DATA6); +- omap_cfg_reg(T2_3430_USB2HS_TLL_DATA7); +- +- /* Port3 */ +- omap_cfg_reg(AB3_3430_USB3HS_TLL_STP); +- omap_cfg_reg(AA6_3430_USB3HS_TLL_CLK); +- omap_cfg_reg(AA3_3430_USB3HS_TLL_DIR); +- omap_cfg_reg(Y3_3430_USB3HS_TLL_NXT); +- omap_cfg_reg(AA5_3430_USB3HS_TLL_DATA0); +- omap_cfg_reg(Y4_3430_USB3HS_TLL_DATA1); +- omap_cfg_reg(Y5_3430_USB3HS_TLL_DATA2); +- omap_cfg_reg(W5_3430_USB3HS_TLL_DATA3); +- omap_cfg_reg(AB12_3430_USB3HS_TLL_DATA4); +- omap_cfg_reg(AB13_3430_USB3HS_TLL_DATA5); +- omap_cfg_reg(AA13_3430_USB3HS_TLL_DATA6); +- omap_cfg_reg(AA12_3430_USB3HS_TLL_DATA7); +-#endif /* CONFIG_OMAP_EHCI_PHY_MODE */ ++ if (phy_mode == EHCI_HCD_OMAP_MODE_PHY) { ++ /* PHY mode of operation for board: 750-2083-001 ++ * ISP1504 connected to Port1 and Port2 ++ * Do Func Mux setting for 12-pin ULPI PHY mode ++ */ ++ /* Port1 */ ++ omap_cfg_reg(Y9_3430_USB1HS_PHY_STP); ++ omap_cfg_reg(Y8_3430_USB1HS_PHY_CLK); ++ omap_cfg_reg(AA14_3430_USB1HS_PHY_DIR); ++ omap_cfg_reg(AA11_3430_USB1HS_PHY_NXT); ++ omap_cfg_reg(W13_3430_USB1HS_PHY_DATA0); ++ omap_cfg_reg(W12_3430_USB1HS_PHY_DATA1); ++ omap_cfg_reg(W11_3430_USB1HS_PHY_DATA2); ++ omap_cfg_reg(Y11_3430_USB1HS_PHY_DATA3); ++ omap_cfg_reg(W9_3430_USB1HS_PHY_DATA4); ++ omap_cfg_reg(Y12_3430_USB1HS_PHY_DATA5); ++ omap_cfg_reg(W8_3430_USB1HS_PHY_DATA6); ++ omap_cfg_reg(Y13_3430_USB1HS_PHY_DATA7); ++ ++ /* Port2 */ ++ omap_cfg_reg(AA10_3430_USB2HS_PHY_STP); ++ omap_cfg_reg(AA8_3430_USB2HS_PHY_CLK); ++ omap_cfg_reg(AA9_3430_USB2HS_PHY_DIR); ++ omap_cfg_reg(AB11_3430_USB2HS_PHY_NXT); ++ omap_cfg_reg(AB10_3430_USB2HS_PHY_DATA0); ++ omap_cfg_reg(AB9_3430_USB2HS_PHY_DATA1); ++ omap_cfg_reg(W3_3430_USB2HS_PHY_DATA2); ++ omap_cfg_reg(T4_3430_USB2HS_PHY_DATA3); ++ omap_cfg_reg(T3_3430_USB2HS_PHY_DATA4); ++ omap_cfg_reg(R3_3430_USB2HS_PHY_DATA5); ++ omap_cfg_reg(R4_3430_USB2HS_PHY_DATA6); ++ omap_cfg_reg(T2_3430_USB2HS_PHY_DATA7); ++ ++ } else { ++ /* Set Func mux for : ++ * TLL mode of operation ++ * 12-pin ULPI SDR TLL mode for Port1/2/3 ++ */ ++ ++ /* Port1 */ ++ omap_cfg_reg(Y9_3430_USB1HS_TLL_STP); ++ omap_cfg_reg(Y8_3430_USB1HS_TLL_CLK); ++ omap_cfg_reg(AA14_3430_USB1HS_TLL_DIR); ++ omap_cfg_reg(AA11_3430_USB1HS_TLL_NXT); ++ omap_cfg_reg(W13_3430_USB1HS_TLL_DATA0); ++ omap_cfg_reg(W12_3430_USB1HS_TLL_DATA1); ++ omap_cfg_reg(W11_3430_USB1HS_TLL_DATA2); ++ omap_cfg_reg(Y11_3430_USB1HS_TLL_DATA3); ++ omap_cfg_reg(W9_3430_USB1HS_TLL_DATA4); ++ omap_cfg_reg(Y12_3430_USB1HS_TLL_DATA5); ++ omap_cfg_reg(W8_3430_USB1HS_TLL_DATA6); ++ omap_cfg_reg(Y13_3430_USB1HS_TLL_DATA7); ++ ++ /* Port2 */ ++ omap_cfg_reg(AA10_3430_USB2HS_TLL_STP); ++ omap_cfg_reg(AA8_3430_USB2HS_TLL_CLK); ++ omap_cfg_reg(AA9_3430_USB2HS_TLL_DIR); ++ omap_cfg_reg(AB11_3430_USB2HS_TLL_NXT); ++ omap_cfg_reg(AB10_3430_USB2HS_TLL_DATA0); ++ omap_cfg_reg(AB9_3430_USB2HS_TLL_DATA1); ++ omap_cfg_reg(W3_3430_USB2HS_TLL_DATA2); ++ omap_cfg_reg(T4_3430_USB2HS_TLL_DATA3); ++ omap_cfg_reg(T3_3430_USB2HS_TLL_DATA4); ++ omap_cfg_reg(R3_3430_USB2HS_TLL_DATA5); ++ omap_cfg_reg(R4_3430_USB2HS_TLL_DATA6); ++ omap_cfg_reg(T2_3430_USB2HS_TLL_DATA7); ++ ++ /* Port3 */ ++ omap_cfg_reg(AB3_3430_USB3HS_TLL_STP); ++ omap_cfg_reg(AA6_3430_USB3HS_TLL_CLK); ++ omap_cfg_reg(AA3_3430_USB3HS_TLL_DIR); ++ omap_cfg_reg(Y3_3430_USB3HS_TLL_NXT); ++ omap_cfg_reg(AA5_3430_USB3HS_TLL_DATA0); ++ omap_cfg_reg(Y4_3430_USB3HS_TLL_DATA1); ++ omap_cfg_reg(Y5_3430_USB3HS_TLL_DATA2); ++ omap_cfg_reg(W5_3430_USB3HS_TLL_DATA3); ++ omap_cfg_reg(AB12_3430_USB3HS_TLL_DATA4); ++ omap_cfg_reg(AB13_3430_USB3HS_TLL_DATA5); ++ omap_cfg_reg(AA13_3430_USB3HS_TLL_DATA6); ++ omap_cfg_reg(AA12_3430_USB3HS_TLL_DATA7); ++ } + + return; + } +@@ -172,7 +171,7 @@ void __init usb_ehci_init(enum ehci_hcd_omap_mode phy_mode, + + /* Setup Pin IO MUX for EHCI */ + if (cpu_is_omap34xx()) +- setup_ehci_io_mux(); ++ setup_ehci_io_mux(phy_mode); + + if (platform_device_register(&ehci_device) < 0) { + printk(KERN_ERR "Unable to register HS-USB (EHCI) device\n"); +-- +1.6.2.4 + diff --git a/recipes/linux/linux-omap-2.6.31/usb/0003-ehci-adding-mux-pin-for-EHCI-phy-reset-line.patch b/recipes/linux/linux-omap-2.6.31/usb/0003-ehci-adding-mux-pin-for-EHCI-phy-reset-line.patch new file mode 100644 index 0000000000..e740614864 --- /dev/null +++ b/recipes/linux/linux-omap-2.6.31/usb/0003-ehci-adding-mux-pin-for-EHCI-phy-reset-line.patch @@ -0,0 +1,42 @@ +From 2f0fe550c81056cb22c0cb8bf54c464e313e1047 Mon Sep 17 00:00:00 2001 +From: Ajay Kumar Gupta <ajay.gupta@ti.com> +Date: Mon, 6 Jul 2009 12:46:08 +0530 +Subject: [PATCH 03/16] ehci: adding mux pin for EHCI phy reset line + +GPIO135 is used as EHCI (port2) phy reset pin on Multi Media Daughter card +connected to OMAP3EVM. + +Signed-off-by: Ajay Kumar Gupta <ajay.gupta@ti.com> +--- + arch/arm/mach-omap2/mux.c | 2 ++ + arch/arm/plat-omap/include/mach/mux.h | 1 + + 2 files changed, 3 insertions(+), 0 deletions(-) + +diff --git a/arch/arm/mach-omap2/mux.c b/arch/arm/mach-omap2/mux.c +index 2daa595..339ba80 100644 +--- a/arch/arm/mach-omap2/mux.c ++++ b/arch/arm/mach-omap2/mux.c +@@ -472,6 +472,8 @@ MUX_CFG_34XX("G25_34XX_GPIO86_OUT", 0x0fc, + OMAP34XX_MUX_MODE4 | OMAP34XX_PIN_OUTPUT) + MUX_CFG_34XX("AG4_34XX_GPIO134_OUT", 0x160, + OMAP34XX_MUX_MODE4 | OMAP34XX_PIN_OUTPUT) ++MUX_CFG_34XX("AF4_34XX_GPIO135_OUT", 0x162, ++ OMAP34XX_MUX_MODE4 | OMAP34XX_PIN_OUTPUT) + MUX_CFG_34XX("AE4_34XX_GPIO136_OUT", 0x164, + OMAP34XX_MUX_MODE4 | OMAP34XX_PIN_OUTPUT) + MUX_CFG_34XX("AF6_34XX_GPIO140_UP", 0x16c, +diff --git a/arch/arm/plat-omap/include/mach/mux.h b/arch/arm/plat-omap/include/mach/mux.h +index 98dfab6..4bcf8a5 100644 +--- a/arch/arm/plat-omap/include/mach/mux.h ++++ b/arch/arm/plat-omap/include/mach/mux.h +@@ -846,6 +846,7 @@ enum omap34xx_index { + L8_34XX_GPIO63, + G25_34XX_GPIO86_OUT, + AG4_34XX_GPIO134_OUT, ++ AF4_34XX_GPIO135_OUT, + AE4_34XX_GPIO136_OUT, + AF6_34XX_GPIO140_UP, + AE6_34XX_GPIO141, +-- +1.6.2.4 + diff --git a/recipes/linux/linux-omap-2.6.31/usb/0004-ehci-correct-EHCI-init-parameters-on-OMAP3EVM.patch b/recipes/linux/linux-omap-2.6.31/usb/0004-ehci-correct-EHCI-init-parameters-on-OMAP3EVM.patch new file mode 100644 index 0000000000..65bb871682 --- /dev/null +++ b/recipes/linux/linux-omap-2.6.31/usb/0004-ehci-correct-EHCI-init-parameters-on-OMAP3EVM.patch @@ -0,0 +1,34 @@ +From 4cc29612d5a706049b14e67bcc3b22490bdddcf7 Mon Sep 17 00:00:00 2001 +From: Ajay Kumar Gupta <ajay.gupta@ti.com> +Date: Fri, 10 Jul 2009 10:01:39 +0530 +Subject: [PATCH 04/16] ehci: correct EHCI init parameters on OMAP3EVM + +Multimedia Daughter card on OMAP3EVM uses port2 as EHCI port. +Other ports (port1 and port3)are not used. + +GPIO135 has been used as EHCI phy reset pin so the mux config +is also setup. + +Signed-off-by: Ajay Kumar Gupta <ajay.gupta@ti.com> +--- + arch/arm/mach-omap2/board-omap3evm.c | 4 +++- + 1 files changed, 3 insertions(+), 1 deletions(-) + +diff --git a/arch/arm/mach-omap2/board-omap3evm.c b/arch/arm/mach-omap2/board-omap3evm.c +index 35f6075..18b747b 100644 +--- a/arch/arm/mach-omap2/board-omap3evm.c ++++ b/arch/arm/mach-omap2/board-omap3evm.c +@@ -308,7 +308,9 @@ static void __init omap3_evm_init(void) + usb_nop_xceiv_register(); + #endif + usb_musb_init(); +- usb_ehci_init(EHCI_HCD_OMAP_MODE_PHY, true, true, 57, 61); ++ /* Setup EHCI phy reset padconfig */ ++ omap_cfg_reg(AF4_34XX_GPIO135_OUT); ++ usb_ehci_init(EHCI_HCD_OMAP_MODE_PHY, false, true, -EINVAL, 135); + ads7846_dev_init(); + } + +-- +1.6.2.4 + diff --git a/recipes/linux/linux-omap-2.6.31/ehci-phy-reset.patch b/recipes/linux/linux-omap-2.6.31/usb/0005-ehci-fix-phy_reset-init-in-ehci-probe.patch index 4041c21306..07f9386170 100644 --- a/recipes/linux/linux-omap-2.6.31/ehci-phy-reset.patch +++ b/recipes/linux/linux-omap-2.6.31/usb/0005-ehci-fix-phy_reset-init-in-ehci-probe.patch @@ -1,3 +1,8 @@ +From 42c413f8f9005a5ca109f82baff81f8e400b8854 Mon Sep 17 00:00:00 2001 +From: Ajay Kumar Gupta <ajay.gupta@ti.com> +Date: Mon, 13 Jul 2009 14:10:46 +0530 +Subject: [PATCH 05/16] ehci: fix phy_reset init in ehci probe + phy_reset is not getting updated from platform_data. Signed-off-by: Ajay Kumar Gupta <ajay.gupta@ti.com> @@ -28,7 +33,3 @@ index 0058f03..55e5259 100644 -- 1.6.2.4 --- -To unsubscribe from this list: send the line "unsubscribe linux-omap" in -the body of a message to majordomo@vger.kernel.org -More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/recipes/linux/linux-omap-2.6.31/usb/0006-ehci-increase-timeout-to-fix-ehci-failure.patch b/recipes/linux/linux-omap-2.6.31/usb/0006-ehci-increase-timeout-to-fix-ehci-failure.patch new file mode 100644 index 0000000000..1190aada1f --- /dev/null +++ b/recipes/linux/linux-omap-2.6.31/usb/0006-ehci-increase-timeout-to-fix-ehci-failure.patch @@ -0,0 +1,30 @@ +From 4e499dd02940a567ca805010e9c3f78d8ab7bc79 Mon Sep 17 00:00:00 2001 +From: Ajay Kumar Gupta <ajay.gupta@ti.com> +Date: Mon, 6 Jul 2009 17:59:02 +0530 +Subject: [PATCH 06/16] ehci: increase timeout to fix ehci failure + +Sometime during TLL reset and waiting loop for TLL reset timeouts and thus +ehci init fails. Fixing this by increasing timeout value. + +Signed-off-by: Ajay Kumar Gupta <ajay.gupta@ti.com> +Signed-off-by: Felipe Balbi <felipe.balbi@nokia.com> +--- + drivers/usb/host/ehci-omap.c | 2 +- + 1 files changed, 1 insertions(+), 1 deletions(-) + +diff --git a/drivers/usb/host/ehci-omap.c b/drivers/usb/host/ehci-omap.c +index 55e5259..c7631f5 100644 +--- a/drivers/usb/host/ehci-omap.c ++++ b/drivers/usb/host/ehci-omap.c +@@ -244,7 +244,7 @@ static void omap_usb_utmi_init(struct ehci_hcd_omap *omap, u8 tll_channel_mask) + */ + static int omap_start_ehc(struct ehci_hcd_omap *omap, struct usb_hcd *hcd) + { +- unsigned long timeout = jiffies + msecs_to_jiffies(100); ++ unsigned long timeout = jiffies + msecs_to_jiffies(1000); + unsigned reg = 0; + int ret = 0; + +-- +1.6.2.4 + diff --git a/recipes/linux/linux-omap-2.6.31/usb/0007-ehci-portwise-configurations.patch b/recipes/linux/linux-omap-2.6.31/usb/0007-ehci-portwise-configurations.patch new file mode 100644 index 0000000000..46258dac9b --- /dev/null +++ b/recipes/linux/linux-omap-2.6.31/usb/0007-ehci-portwise-configurations.patch @@ -0,0 +1,498 @@ +From 4d0b781b146ee79cee1208589498e8ac959d5796 Mon Sep 17 00:00:00 2001 +From: Ajay Kumar Gupta <ajay.gupta@ti.com> +Date: Thu, 13 Aug 2009 09:10:44 +0530 +Subject: [PATCH 07/16] ehci: portwise configurations + +OMAP3 EHCI has three ports and we can configure port modes +(PHY/TLL) on per port basis in silicon version ES3.0 onwards. + +This patch modifies the existing EHCI driver to accomodate +portwise mode configuration. + +Changes being done: + + - Pass platform_data pointer as parameter to usb_ehci_init() + to avoid multiple parameters. + - Use platform_data pointer in usb-ehci.c as platform_data + directly without copying it to another *pdata*. + - Initializing platform_data in all platform files with + platform specific ehci parameters. + - Added port_mode[OMAP_HS_USB_PORTS]in platform_data + structures.This allows to setup mux pins on per port basis. + - Added phy_reset_gpio[OMAP_HS_USB_PORTS]. + +Signed-off-by: Ajay Kumar Gupta <ajay.gupta@ti.com> +--- + arch/arm/mach-omap2/board-3430sdp.c | 15 +++++- + arch/arm/mach-omap2/board-omap3beagle.c | 15 +++++- + arch/arm/mach-omap2/board-omap3evm.c | 15 +++++- + arch/arm/mach-omap2/board-omap3pandora.c | 15 +++++- + arch/arm/mach-omap2/usb-ehci.c | 95 +++++++++++++++--------------- + arch/arm/plat-omap/include/mach/usb.h | 12 ++-- + drivers/usb/host/ehci-omap.c | 63 +++++++++++--------- + 7 files changed, 145 insertions(+), 85 deletions(-) + +diff --git a/arch/arm/mach-omap2/board-3430sdp.c b/arch/arm/mach-omap2/board-3430sdp.c +index 439ebcc..f9fabb0 100644 +--- a/arch/arm/mach-omap2/board-3430sdp.c ++++ b/arch/arm/mach-omap2/board-3430sdp.c +@@ -480,6 +480,19 @@ static void enable_board_wakeup_source(void) + omap_cfg_reg(AF26_34XX_SYS_NIRQ); /* T2 interrupt line (keypad) */ + } + ++static struct ehci_hcd_omap_platform_data ehci_pdata __initconst = { ++ ++ .port_mode[0] = EHCI_HCD_OMAP_MODE_PHY, ++ .port_mode[1] = EHCI_HCD_OMAP_MODE_PHY, ++ .port_mode[2] = EHCI_HCD_OMAP_MODE_UNKNOWN, ++ ++ .chargepump = true, ++ .phy_reset = true, ++ .reset_gpio_port[0] = 57, ++ .reset_gpio_port[1] = 61, ++ .reset_gpio_port[2] = -EINVAL ++}; ++ + static void __init omap_3430sdp_init(void) + { + omap3430_i2c_init(); +@@ -495,8 +508,8 @@ static void __init omap_3430sdp_init(void) + omap_serial_init(); + usb_musb_init(); + board_smc91x_init(); +- usb_ehci_init(EHCI_HCD_OMAP_MODE_PHY, true, true, 57, 61); + enable_board_wakeup_source(); ++ usb_ehci_init(&ehci_pdata); + } + + static void __init omap_3430sdp_map_io(void) +diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c +index a661fe3..4109969 100644 +--- a/arch/arm/mach-omap2/board-omap3beagle.c ++++ b/arch/arm/mach-omap2/board-omap3beagle.c +@@ -395,6 +395,19 @@ static void __init omap3beagle_flash_init(void) + } + } + ++static struct ehci_hcd_omap_platform_data ehci_pdata __initconst = { ++ ++ .port_mode[0] = EHCI_HCD_OMAP_MODE_PHY, ++ .port_mode[1] = EHCI_HCD_OMAP_MODE_PHY, ++ .port_mode[2] = EHCI_HCD_OMAP_MODE_UNKNOWN, ++ ++ .chargepump = false, ++ .phy_reset = true, ++ .reset_gpio_port[0] = -EINVAL, ++ .reset_gpio_port[1] = 147, ++ .reset_gpio_port[2] = -EINVAL ++}; ++ + static void __init omap3_beagle_init(void) + { + omap3_beagle_i2c_init(); +@@ -408,7 +421,7 @@ static void __init omap3_beagle_init(void) + gpio_direction_output(170, true); + + usb_musb_init(); +- usb_ehci_init(EHCI_HCD_OMAP_MODE_PHY, true, true, 57, 61); ++ usb_ehci_init(&ehci_pdata); + omap3beagle_flash_init(); + + /* Ensure SDRC pins are mux'd for self-refresh */ +diff --git a/arch/arm/mach-omap2/board-omap3evm.c b/arch/arm/mach-omap2/board-omap3evm.c +index 18b747b..62a6f32 100644 +--- a/arch/arm/mach-omap2/board-omap3evm.c ++++ b/arch/arm/mach-omap2/board-omap3evm.c +@@ -293,6 +293,19 @@ static struct platform_device *omap3_evm_devices[] __initdata = { + &omap3evm_smc911x_device, + }; + ++static struct ehci_hcd_omap_platform_data ehci_pdata __initconst = { ++ ++ .port_mode[0] = EHCI_HCD_OMAP_MODE_UNKNOWN, ++ .port_mode[1] = EHCI_HCD_OMAP_MODE_PHY, ++ .port_mode[2] = EHCI_HCD_OMAP_MODE_UNKNOWN, ++ ++ .chargepump = false, ++ .phy_reset = true, ++ .reset_gpio_port[0] = -EINVAL, ++ .reset_gpio_port[1] = 135, ++ .reset_gpio_port[2] = -EINVAL ++}; ++ + static void __init omap3_evm_init(void) + { + omap3_evm_i2c_init(); +@@ -310,7 +323,7 @@ static void __init omap3_evm_init(void) + usb_musb_init(); + /* Setup EHCI phy reset padconfig */ + omap_cfg_reg(AF4_34XX_GPIO135_OUT); +- usb_ehci_init(EHCI_HCD_OMAP_MODE_PHY, false, true, -EINVAL, 135); ++ usb_ehci_init(&ehci_pdata); + ads7846_dev_init(); + } + +diff --git a/arch/arm/mach-omap2/board-omap3pandora.c b/arch/arm/mach-omap2/board-omap3pandora.c +index c9d6488..9f115dc 100644 +--- a/arch/arm/mach-omap2/board-omap3pandora.c ++++ b/arch/arm/mach-omap2/board-omap3pandora.c +@@ -383,6 +383,19 @@ static struct platform_device *omap3pandora_devices[] __initdata = { + &pandora_keys_gpio, + }; + ++static struct ehci_hcd_omap_platform_data ehci_pdata __initconst = { ++ ++ .port_mode[0] = EHCI_HCD_OMAP_MODE_PHY, ++ .port_mode[1] = EHCI_HCD_OMAP_MODE_UNKNOWN, ++ .port_mode[2] = EHCI_HCD_OMAP_MODE_UNKNOWN, ++ ++ .chargepump = false, ++ .phy_reset = true, ++ .reset_gpio_port[0] = 16, ++ .reset_gpio_port[1] = -EINVAL, ++ .reset_gpio_port[2] = -EINVAL ++}; ++ + static void __init omap3pandora_init(void) + { + omap3pandora_i2c_init(); +@@ -392,7 +405,7 @@ static void __init omap3pandora_init(void) + spi_register_board_info(omap3pandora_spi_board_info, + ARRAY_SIZE(omap3pandora_spi_board_info)); + omap3pandora_ads7846_init(); +- usb_ehci_init(EHCI_HCD_OMAP_MODE_PHY, false, true, 16, -EINVAL); ++ usb_ehci_init(&ehci_pdata); + pandora_keys_gpio_init(); + usb_musb_init(); + +diff --git a/arch/arm/mach-omap2/usb-ehci.c b/arch/arm/mach-omap2/usb-ehci.c +index 6a96569..a29c8ca 100644 +--- a/arch/arm/mach-omap2/usb-ehci.c ++++ b/arch/arm/mach-omap2/usb-ehci.c +@@ -68,14 +68,10 @@ static struct platform_device ehci_device = { + /* + * setup_ehci_io_mux - initialize IO pad mux for USBHOST + */ +-static void setup_ehci_io_mux(enum ehci_hcd_omap_mode phy_mode) ++static void setup_ehci_io_mux(enum ehci_hcd_omap_mode *port_mode) + { +- if (phy_mode == EHCI_HCD_OMAP_MODE_PHY) { +- /* PHY mode of operation for board: 750-2083-001 +- * ISP1504 connected to Port1 and Port2 +- * Do Func Mux setting for 12-pin ULPI PHY mode +- */ +- /* Port1 */ ++ switch (port_mode[0]) { ++ case EHCI_HCD_OMAP_MODE_PHY: + omap_cfg_reg(Y9_3430_USB1HS_PHY_STP); + omap_cfg_reg(Y8_3430_USB1HS_PHY_CLK); + omap_cfg_reg(AA14_3430_USB1HS_PHY_DIR); +@@ -88,28 +84,8 @@ static void setup_ehci_io_mux(enum ehci_hcd_omap_mode phy_mode) + omap_cfg_reg(Y12_3430_USB1HS_PHY_DATA5); + omap_cfg_reg(W8_3430_USB1HS_PHY_DATA6); + omap_cfg_reg(Y13_3430_USB1HS_PHY_DATA7); +- +- /* Port2 */ +- omap_cfg_reg(AA10_3430_USB2HS_PHY_STP); +- omap_cfg_reg(AA8_3430_USB2HS_PHY_CLK); +- omap_cfg_reg(AA9_3430_USB2HS_PHY_DIR); +- omap_cfg_reg(AB11_3430_USB2HS_PHY_NXT); +- omap_cfg_reg(AB10_3430_USB2HS_PHY_DATA0); +- omap_cfg_reg(AB9_3430_USB2HS_PHY_DATA1); +- omap_cfg_reg(W3_3430_USB2HS_PHY_DATA2); +- omap_cfg_reg(T4_3430_USB2HS_PHY_DATA3); +- omap_cfg_reg(T3_3430_USB2HS_PHY_DATA4); +- omap_cfg_reg(R3_3430_USB2HS_PHY_DATA5); +- omap_cfg_reg(R4_3430_USB2HS_PHY_DATA6); +- omap_cfg_reg(T2_3430_USB2HS_PHY_DATA7); +- +- } else { +- /* Set Func mux for : +- * TLL mode of operation +- * 12-pin ULPI SDR TLL mode for Port1/2/3 +- */ +- +- /* Port1 */ ++ break; ++ case EHCI_HCD_OMAP_MODE_TLL: + omap_cfg_reg(Y9_3430_USB1HS_TLL_STP); + omap_cfg_reg(Y8_3430_USB1HS_TLL_CLK); + omap_cfg_reg(AA14_3430_USB1HS_TLL_DIR); +@@ -122,8 +98,29 @@ static void setup_ehci_io_mux(enum ehci_hcd_omap_mode phy_mode) + omap_cfg_reg(Y12_3430_USB1HS_TLL_DATA5); + omap_cfg_reg(W8_3430_USB1HS_TLL_DATA6); + omap_cfg_reg(Y13_3430_USB1HS_TLL_DATA7); ++ break; ++ case EHCI_HCD_OMAP_MODE_UNKNOWN: ++ /* FALLTHROUGH */ ++ default: ++ break; ++ } + +- /* Port2 */ ++ switch (port_mode[1]) { ++ case EHCI_HCD_OMAP_MODE_PHY: ++ omap_cfg_reg(AA10_3430_USB2HS_PHY_STP); ++ omap_cfg_reg(AA8_3430_USB2HS_PHY_CLK); ++ omap_cfg_reg(AA9_3430_USB2HS_PHY_DIR); ++ omap_cfg_reg(AB11_3430_USB2HS_PHY_NXT); ++ omap_cfg_reg(AB10_3430_USB2HS_PHY_DATA0); ++ omap_cfg_reg(AB9_3430_USB2HS_PHY_DATA1); ++ omap_cfg_reg(W3_3430_USB2HS_PHY_DATA2); ++ omap_cfg_reg(T4_3430_USB2HS_PHY_DATA3); ++ omap_cfg_reg(T3_3430_USB2HS_PHY_DATA4); ++ omap_cfg_reg(R3_3430_USB2HS_PHY_DATA5); ++ omap_cfg_reg(R4_3430_USB2HS_PHY_DATA6); ++ omap_cfg_reg(T2_3430_USB2HS_PHY_DATA7); ++ break; ++ case EHCI_HCD_OMAP_MODE_TLL: + omap_cfg_reg(AA10_3430_USB2HS_TLL_STP); + omap_cfg_reg(AA8_3430_USB2HS_TLL_CLK); + omap_cfg_reg(AA9_3430_USB2HS_TLL_DIR); +@@ -136,8 +133,18 @@ static void setup_ehci_io_mux(enum ehci_hcd_omap_mode phy_mode) + omap_cfg_reg(R3_3430_USB2HS_TLL_DATA5); + omap_cfg_reg(R4_3430_USB2HS_TLL_DATA6); + omap_cfg_reg(T2_3430_USB2HS_TLL_DATA7); ++ break; ++ case EHCI_HCD_OMAP_MODE_UNKNOWN: ++ /* FALLTHROUGH */ ++ default: ++ break; ++ } + +- /* Port3 */ ++ switch (port_mode[2]) { ++ case EHCI_HCD_OMAP_MODE_PHY: ++ printk(KERN_WARNING "Port3 can't be used in PHY mode\n"); ++ break; ++ case EHCI_HCD_OMAP_MODE_TLL: + omap_cfg_reg(AB3_3430_USB3HS_TLL_STP); + omap_cfg_reg(AA6_3430_USB3HS_TLL_CLK); + omap_cfg_reg(AA3_3430_USB3HS_TLL_DIR); +@@ -150,28 +157,23 @@ static void setup_ehci_io_mux(enum ehci_hcd_omap_mode phy_mode) + omap_cfg_reg(AB13_3430_USB3HS_TLL_DATA5); + omap_cfg_reg(AA13_3430_USB3HS_TLL_DATA6); + omap_cfg_reg(AA12_3430_USB3HS_TLL_DATA7); ++ break; ++ case EHCI_HCD_OMAP_MODE_UNKNOWN: ++ /* FALLTHROUGH */ ++ default: ++ break; + } + + return; + } + +-static struct ehci_hcd_omap_platform_data pdata __initconst; +- +-void __init usb_ehci_init(enum ehci_hcd_omap_mode phy_mode, +- int chargepump, int phy_reset, int reset_gpio_port1, +- int reset_gpio_port2) ++void __init usb_ehci_init(struct ehci_hcd_omap_platform_data *pdata) + { +- pdata.phy_mode = phy_mode; +- pdata.chargepump = chargepump; +- pdata.phy_reset = phy_reset; +- pdata.reset_gpio_port1 = reset_gpio_port1; +- pdata.reset_gpio_port2 = reset_gpio_port2; +- +- platform_device_add_data(&ehci_device, &pdata, sizeof(pdata)); ++ platform_device_add_data(&ehci_device, pdata, sizeof(*pdata)); + + /* Setup Pin IO MUX for EHCI */ + if (cpu_is_omap34xx()) +- setup_ehci_io_mux(phy_mode); ++ setup_ehci_io_mux(pdata->port_mode); + + if (platform_device_register(&ehci_device) < 0) { + printk(KERN_ERR "Unable to register HS-USB (EHCI) device\n"); +@@ -181,9 +183,8 @@ void __init usb_ehci_init(enum ehci_hcd_omap_mode phy_mode, + + #else + +-void __init usb_ehci_init(enum ehci_hcd_omap_mode phy_mode, +- int chargepump, int phy_reset, int reset_gpio_port1, +- int reset_gpio_port2) ++void __init usb_ehci_init(struct ehci_hcd_omap_platform_data *pdata) ++ + { + } + +diff --git a/arch/arm/plat-omap/include/mach/usb.h b/arch/arm/plat-omap/include/mach/usb.h +index 1b1366c..d1b14cc 100644 +--- a/arch/arm/plat-omap/include/mach/usb.h ++++ b/arch/arm/plat-omap/include/mach/usb.h +@@ -5,6 +5,7 @@ + + #include <mach/board.h> + ++#define OMAP3_HS_USB_PORTS 3 + enum ehci_hcd_omap_mode { + EHCI_HCD_OMAP_MODE_UNKNOWN, + EHCI_HCD_OMAP_MODE_PHY, +@@ -12,13 +13,12 @@ enum ehci_hcd_omap_mode { + }; + + struct ehci_hcd_omap_platform_data { +- enum ehci_hcd_omap_mode phy_mode; ++ enum ehci_hcd_omap_mode port_mode[OMAP3_HS_USB_PORTS]; + unsigned chargepump:1; + unsigned phy_reset:1; + +- /* have to be valid if phy_reset is true */ +- int reset_gpio_port1; +- int reset_gpio_port2; ++ /* have to be valid if phy_reset is true and portx is in phy mode */ ++ int reset_gpio_port[OMAP3_HS_USB_PORTS]; + }; + + /*-------------------------------------------------------------------------*/ +@@ -45,9 +45,7 @@ struct ehci_hcd_omap_platform_data { + + extern void usb_musb_init(void); + +-extern void usb_ehci_init(enum ehci_hcd_omap_mode phy_mode, +- int chargepump, int phy_reset, int reset_gpio_port1, +- int reset_gpio_port2); ++extern void usb_ehci_init(struct ehci_hcd_omap_platform_data *pdata); + + #endif + +diff --git a/drivers/usb/host/ehci-omap.c b/drivers/usb/host/ehci-omap.c +index c7631f5..3175122 100644 +--- a/drivers/usb/host/ehci-omap.c ++++ b/drivers/usb/host/ehci-omap.c +@@ -162,8 +162,7 @@ struct ehci_hcd_omap { + */ + + /* gpio for resetting phy */ +- int reset_gpio_port1; +- int reset_gpio_port2; ++ int reset_gpio_port[OMAP3_HS_USB_PORTS]; + + /* phy reset workaround */ + int phy_reset; +@@ -172,7 +171,7 @@ struct ehci_hcd_omap { + int chargepump; + + /* desired phy_mode: TLL, PHY */ +- enum ehci_hcd_omap_mode phy_mode; ++ enum ehci_hcd_omap_mode port_mode[OMAP3_HS_USB_PORTS]; + + void __iomem *uhh_base; + void __iomem *tll_base; +@@ -297,14 +296,16 @@ static int omap_start_ehc(struct ehci_hcd_omap *omap, struct usb_hcd *hcd) + + if (omap->phy_reset) { + /* Refer: ISSUE1 */ +- if (gpio_is_valid(omap->reset_gpio_port1)) { +- gpio_request(omap->reset_gpio_port1, "USB1 PHY reset"); +- gpio_direction_output(omap->reset_gpio_port1, 0); ++ if (gpio_is_valid(omap->reset_gpio_port[0])) { ++ gpio_request(omap->reset_gpio_port[0], ++ "USB1 PHY reset"); ++ gpio_direction_output(omap->reset_gpio_port[0], 0); + } + +- if (gpio_is_valid(omap->reset_gpio_port2)) { +- gpio_request(omap->reset_gpio_port2, "USB2 PHY reset"); +- gpio_direction_output(omap |