diff options
18 files changed, 6539 insertions, 0 deletions
diff --git a/recipes/linux/linux-2.6.33/ts72xx/0001-ts72xx_base.patch b/recipes/linux/linux-2.6.33/ts72xx/0001-ts72xx_base.patch new file mode 100644 index 0000000000..4579a0f315 --- /dev/null +++ b/recipes/linux/linux-2.6.33/ts72xx/0001-ts72xx_base.patch @@ -0,0 +1,417 @@ +From bb51edb79643d438abfa5b332547abf90caf7677 Mon Sep 17 00:00:00 2001 +From: Matthieu Crapet <mcrapet@gmail.com> +Date: Sun, 17 Jan 2010 16:48:52 +0100 +Subject: [PATCH 01/16] ts72xx_base +MIME-Version: 1.0 +Content-Type: text/plain; charset=utf-8 +Content-Transfer-Encoding: 8bit + +- patch: allow to force nF bit in control reg +- small fix: drivers/input/keyboard/ep93xx_keypad.c +- register pwm1 + +Signed-off-by: Petr Štetiar <ynezz@true.cz> +--- + arch/arm/Kconfig | 1 + + arch/arm/mach-ep93xx/Kconfig | 9 ++ + arch/arm/mach-ep93xx/include/mach/ep93xx-regs.h | 11 ++ + arch/arm/mach-ep93xx/include/mach/memory.h | 28 +++++ + arch/arm/mach-ep93xx/include/mach/ts72xx.h | 125 +++++++++++++++++++++-- + arch/arm/mach-ep93xx/ts72xx.c | 40 +++++++- + arch/arm/mm/proc-arm920.S | 5 +- + 7 files changed, 207 insertions(+), 12 deletions(-) + +diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig +index 184a6bd..6cf5ed4 100644 +--- a/arch/arm/Kconfig ++++ b/arch/arm/Kconfig +@@ -290,6 +290,7 @@ config ARCH_EP93XX + select CPU_ARM920T + select ARM_AMBA + select ARM_VIC ++ select ARCH_SPARSEMEM_ENABLE + select GENERIC_GPIO + select HAVE_CLK + select COMMON_CLKDEV +diff --git a/arch/arm/mach-ep93xx/Kconfig b/arch/arm/mach-ep93xx/Kconfig +index 9167c3d..335b0bb 100644 +--- a/arch/arm/mach-ep93xx/Kconfig ++++ b/arch/arm/mach-ep93xx/Kconfig +@@ -7,6 +7,15 @@ config CRUNCH + help + Enable kernel support for MaverickCrunch. + ++config CR1_NFBIT ++ bool "Turn on nF bit in ControlRegister 1" ++ help ++ Say 'Y' here to force the nF bit on. Usually this is set ++ by the bootrom. If it is not set, then the CPU core will ++ run from HCLK instead of FCLK, and performance will suffer. ++ If you see BogoMIPS of about 1/4 of your CPU clock, try ++ turning this on; your performance should double. ++ + comment "EP93xx Platforms" + + choice +diff --git a/arch/arm/mach-ep93xx/include/mach/ep93xx-regs.h b/arch/arm/mach-ep93xx/include/mach/ep93xx-regs.h +index d55194a..d811c4f 100644 +--- a/arch/arm/mach-ep93xx/include/mach/ep93xx-regs.h ++++ b/arch/arm/mach-ep93xx/include/mach/ep93xx-regs.h +@@ -111,16 +111,26 @@ + #define EP93XX_I2S_BASE EP93XX_APB_IOMEM(0x00020000) + + #define EP93XX_SECURITY_BASE EP93XX_APB_IOMEM(0x00030000) ++#define EP93XX_SECURITY_REG(x) (EP93XX_SECURITY_BASE + (x)) ++#define EP93XX_SECURITY_UNIQID EP93XX_SECURITY_REG(0x2440) + + #define EP93XX_GPIO_BASE EP93XX_APB_IOMEM(0x00040000) + #define EP93XX_GPIO_REG(x) (EP93XX_GPIO_BASE + (x)) + #define EP93XX_GPIO_F_INT_STATUS EP93XX_GPIO_REG(0x5c) ++#define EP93XX_GPIO_F_INT_DEBOUNCE EP93XX_GPIO_REG(0x64) + #define EP93XX_GPIO_A_INT_STATUS EP93XX_GPIO_REG(0xa0) ++#define EP93XX_GPIO_A_INT_DEBOUNCE EP93XX_GPIO_REG(0xa8) + #define EP93XX_GPIO_B_INT_STATUS EP93XX_GPIO_REG(0xbc) ++#define EP93XX_GPIO_B_INT_DEBOUNCE EP93XX_GPIO_REG(0xc4) + #define EP93XX_GPIO_EEDRIVE EP93XX_GPIO_REG(0xc8) + ++#define EP93XX_GPIO_A_DATA EP93XX_GPIO_REG(0x00) ++#define EP93XX_GPIO_A_DIRECTION EP93XX_GPIO_REG(0x10) ++#define EP93XX_GPIO_B_DATA EP93XX_GPIO_REG(0x04) ++ + #define EP93XX_AAC_BASE EP93XX_APB_IOMEM(0x00080000) + ++#define EP93XX_SPI_PHYS_BASE (EP93XX_APB_PHYS_BASE + 0x000a0000) + #define EP93XX_SPI_BASE EP93XX_APB_IOMEM(0x000a0000) + + #define EP93XX_IRDA_BASE EP93XX_APB_IOMEM(0x000b0000) +@@ -221,6 +231,7 @@ + #define EP93XX_SYSCON_SYSCFG_LEECLK (1<<3) + #define EP93XX_SYSCON_SYSCFG_LCSN2 (1<<1) + #define EP93XX_SYSCON_SYSCFG_LCSN1 (1<<0) ++#define EP93XX_SYSCON_CHIPID EP93XX_SYSCON_REG(0x94) + #define EP93XX_SYSCON_SWLOCK EP93XX_SYSCON_REG(0xc0) + + #define EP93XX_WATCHDOG_BASE EP93XX_APB_IOMEM(0x00140000) +diff --git a/arch/arm/mach-ep93xx/include/mach/memory.h b/arch/arm/mach-ep93xx/include/mach/memory.h +index 554064e..78eaacf 100644 +--- a/arch/arm/mach-ep93xx/include/mach/memory.h ++++ b/arch/arm/mach-ep93xx/include/mach/memory.h +@@ -19,4 +19,32 @@ + #error "Kconfig bug: No EP93xx PHYS_OFFSET set" + #endif + ++/* ++ * Non-linear mapping like so: ++ * phys => virt ++ * 0x00000000 => 0xc0000000 ++ * 0x01000000 => 0xc1000000 ++ * 0x04000000 => 0xc4000000 ++ * 0x05000000 => 0xc5000000 ++ * 0xe0000000 => 0xc8000000 ++ * 0xe1000000 => 0xc9000000 ++ * 0xe4000000 => 0xcc000000 ++ * 0xe5000000 => 0xcd000000 ++ * ++ * As suggested here: http://marc.info/?l=linux-arm&m=122754446724900&w=2 ++ * ++ * Note that static inline functions won't work here because ++ * arch/arm/include/asm/memory.h uses "#ifndef __virt_to_phys" to check whether to ++ * use generic functions or not. ++ */ ++ ++#define __phys_to_virt(p) \ ++ (((p) & 0x07ffffff) | (((p) & 0xe0000000) ? 0x08000000 : 0) | PAGE_OFFSET) ++ ++#define __virt_to_phys(v) \ ++ (((v) & 0x07ffffff) | (((v) & 0x08000000) ? 0xe0000000 : 0 )) ++ ++#define SECTION_SIZE_BITS 24 ++#define MAX_PHYSMEM_BITS 32 ++ + #endif +diff --git a/arch/arm/mach-ep93xx/include/mach/ts72xx.h b/arch/arm/mach-ep93xx/include/mach/ts72xx.h +index 3bd934e..006c5a2 100644 +--- a/arch/arm/mach-ep93xx/include/mach/ts72xx.h ++++ b/arch/arm/mach-ep93xx/include/mach/ts72xx.h +@@ -8,21 +8,35 @@ + * virt phys size + * febff000 22000000 4K model number register + * febfe000 22400000 4K options register +- * febfd000 22800000 4K options register #2 ++ * febfd000 22800000 4K options register #2 (JP6 and TS-9420 flags) + * febfc000 [67]0000000 4K NAND data register + * febfb000 [67]0400000 4K NAND control register + * febfa000 [67]0800000 4K NAND busy register + * febf9000 10800000 4K TS-5620 RTC index register + * febf8000 11700000 4K TS-5620 RTC data register ++ * febf7000 23800000 4K CPLD watchdog (control register) ++ * febf6000 23c00000 4K CPLD watchdog (feed register) ++ * febf5000 23400000 4K PLD version (3 bits) ++ * febf4000 22c00000 4K RS-485 control register ++ * febf3000 23000000 4K RS-485 mode register ++ * febf2000 10800000 4K jumpers/max197 busy bit/COM1 dcd register (8-bit, read only) ++ * febf1000 10f00000 4K max197 sample/control register (16-bit read/8-bit write) ++ * febf0000 11e00000 4K PC/104 8-bit I/O ++ * febef000 21e00000 4K PC/104 16-bit I/O ++ * fea00000 11a00000 1MB PC/104 8-bit memory ++ * fe900000 21a00000 1MB PC/104 16-bit memory + */ + + #define TS72XX_MODEL_PHYS_BASE 0x22000000 + #define TS72XX_MODEL_VIRT_BASE 0xfebff000 + #define TS72XX_MODEL_SIZE 0x00001000 + +-#define TS72XX_MODEL_TS7200 0x00 +-#define TS72XX_MODEL_TS7250 0x01 +-#define TS72XX_MODEL_TS7260 0x02 ++#define TS7XXX_MODEL_TS7200 0x00 ++#define TS7XXX_MODEL_TS7250 0x01 ++#define TS7XXX_MODEL_TS7260 0x02 ++#define TS7XXX_MODEL_TS7300 0x03 ++#define TS7XXX_MODEL_TS7400 0x04 ++#define TS7XXX_MODEL_MASK 0x07 + + + #define TS72XX_OPTIONS_PHYS_BASE 0x22400000 +@@ -50,12 +64,13 @@ + #define TS72XX_NAND2_CONTROL_PHYS_BASE 0x70400000 + #define TS72XX_NAND_CONTROL_VIRT_BASE 0xfebfb000 + #define TS72XX_NAND_CONTROL_SIZE 0x00001000 ++#define TS72XX_NAND_CONTROL_OFFSET 0x00400000 + + #define TS72XX_NAND1_BUSY_PHYS_BASE 0x60800000 + #define TS72XX_NAND2_BUSY_PHYS_BASE 0x70800000 + #define TS72XX_NAND_BUSY_VIRT_BASE 0xfebfa000 + #define TS72XX_NAND_BUSY_SIZE 0x00001000 +- ++#define TS72XX_NAND_BUSY_OFFSET 0x00800000 + + #define TS72XX_RTC_INDEX_VIRT_BASE 0xfebf9000 + #define TS72XX_RTC_INDEX_PHYS_BASE 0x10800000 +@@ -65,33 +80,123 @@ + #define TS72XX_RTC_DATA_PHYS_BASE 0x11700000 + #define TS72XX_RTC_DATA_SIZE 0x00001000 + ++#define TS72XX_WATCHDOG_CONTROL_VIRT_BASE 0xfebf7000 ++#define TS72XX_WATCHDOG_CONTROL_PHYS_BASE 0x23800000 ++#define TS72XX_WATCHDOG_CONTROL_SIZE 0x00001000 ++ ++#define TS72XX_WATCHDOG_FEED_VIRT_BASE 0xfebf6000 ++#define TS72XX_WATCHDOG_FEED_PHYS_BASE 0x23c00000 ++#define TS72XX_WATCHDOG_FEED_SIZE 0x00001000 ++ ++#define TS72XX_PLD_VERSION_VIRT_BASE 0xfebf5000 ++#define TS72XX_PLD_VERSION_PHYS_BASE 0x23400000 ++#define TS72XX_PLD_VERSION_SIZE 0x00001000 ++ ++#define TS72XX_RS485_CONTROL_VIRT_BASE 0xfebf4000 ++#define TS72XX_RS485_CONTROL_PHYS_BASE 0x22c00000 ++#define TS72XX_RS485_CONTROL_SIZE 0x00001000 ++ ++#define TS72XX_RS485_MODE_VIRT_BASE 0xfebf3000 ++#define TS72XX_RS485_MODE_PHYS_BASE 0x23000000 ++#define TS72XX_RS485_MODE_SIZE 0x00001000 ++ ++#define TS72XX_JUMPERS_MAX197_VIRT_BASE 0xfebf2000 ++#define TS72XX_JUMPERS_MAX197_PHYS_BASE 0x10800000 ++#define TS72XX_JUMPERS_MAX197_SIZE 0x00001000 ++ ++#define TS72XX_MAX197_SAMPLE_VIRT_BASE 0xfebf1000 ++#define TS72XX_MAX197_SAMPLE_PHYS_BASE 0x10f00000 ++#define TS72XX_MAX197_SAMPLE_SIZE 0x00001000 ++ ++#define TS72XX_RS485_AUTO485FD 1 ++#define TS72XX_RS485_AUTO485HD 2 ++#define TS72XX_RS485_MODE_RS232 0x00 ++#define TS72XX_RS485_MODE_FD 0x01 ++#define TS72XX_RS485_MODE_9600_HD 0x04 ++#define TS72XX_RS485_MODE_19200_HD 0x05 ++#define TS72XX_RS485_MODE_57600_HD 0x06 ++#define TS72XX_RS485_MODE_115200_HD 0x07 ++ ++ ++#define TS72XX_PC104_8BIT_IO_VIRT_BASE 0xfebf0000 ++#define TS72XX_PC104_8BIT_IO_PHYS_BASE 0x11e00000 ++#define TS72XX_PC104_8BIT_IO_SIZE 0x00001000 ++#define TS72XX_PC104_8BIT_MEM_VIRT_BASE 0xfea00000 ++#define TS72XX_PC104_8BIT_MEM_PHYS_BASE 0x11a00000 ++#define TS72XX_PC104_8BIT_MEM_SIZE 0x00100000 ++ ++#define TS72XX_PC104_16BIT_IO_VIRT_BASE 0xfebef000 ++#define TS72XX_PC104_16BIT_IO_PHYS_BASE 0x21e00000 ++#define TS72XX_PC104_16BIT_IO_SIZE 0x00001000 ++#define TS72XX_PC104_16BIT_MEM_VIRT_BASE 0xfe900000 ++#define TS72XX_PC104_16BIT_MEM_PHYS_BASE 0x21a00000 ++#define TS72XX_PC104_16BIT_MEM_SIZE 0x00100000 ++ ++/* ++ * TS7200 CF memory map: ++ * ++ * phys size description ++ * 11000000 7 CF registers (8-bit each), starting at 11000001 ++ * 10400006 2 CF aux registers (8-bit) ++ * 21000000 2 CF data register (16-bit) ++ */ ++ ++#define TS7200_CF_CMD_PHYS_BASE 0x11000000 ++#define TS7200_CF_AUX_PHYS_BASE 0x10400006 ++#define TS7200_CF_DATA_PHYS_BASE 0x21000000 + + #ifndef __ASSEMBLY__ + + static inline int board_is_ts7200(void) + { +- return __raw_readb(TS72XX_MODEL_VIRT_BASE) == TS72XX_MODEL_TS7200; ++ return (__raw_readb(TS72XX_MODEL_VIRT_BASE) & ++ TS7XXX_MODEL_MASK) == TS7XXX_MODEL_TS7200; + } + + static inline int board_is_ts7250(void) + { +- return __raw_readb(TS72XX_MODEL_VIRT_BASE) == TS72XX_MODEL_TS7250; ++ return (__raw_readb(TS72XX_MODEL_VIRT_BASE) & ++ TS7XXX_MODEL_MASK) == TS7XXX_MODEL_TS7250; + } + + static inline int board_is_ts7260(void) + { +- return __raw_readb(TS72XX_MODEL_VIRT_BASE) == TS72XX_MODEL_TS7260; ++ return (__raw_readb(TS72XX_MODEL_VIRT_BASE) & ++ TS7XXX_MODEL_MASK) == TS7XXX_MODEL_TS7260; ++} ++ ++static inline int board_is_ts7400(void) ++{ ++ return (__raw_readb(TS72XX_MODEL_VIRT_BASE) & ++ TS7XXX_MODEL_MASK) == TS7XXX_MODEL_TS7400; + } + + static inline int is_max197_installed(void) + { + return !!(__raw_readb(TS72XX_OPTIONS_VIRT_BASE) & +- TS72XX_OPTIONS_MAX197); ++ TS72XX_OPTIONS_MAX197); + } + + static inline int is_ts9420_installed(void) + { + return !!(__raw_readb(TS72XX_OPTIONS2_VIRT_BASE) & +- TS72XX_OPTIONS2_TS9420); ++ TS72XX_OPTIONS2_TS9420); ++} ++ ++static inline int is_rs485_installed(void) ++{ ++ return !!(__raw_readb(TS72XX_OPTIONS_VIRT_BASE) & ++ TS72XX_OPTIONS_COM2_RS485); ++} ++ ++static inline int get_ts72xx_pld_version(void) ++{ ++ return (__raw_readb(TS72XX_PLD_VERSION_VIRT_BASE) & 0x7); ++} ++ ++/* User jumper */ ++static inline int is_jp6_set(void) ++{ ++ return (__raw_readb(TS72XX_OPTIONS2_VIRT_BASE) & 0x1); + } + #endif +diff --git a/arch/arm/mach-ep93xx/ts72xx.c b/arch/arm/mach-ep93xx/ts72xx.c +index 259f782..4a97ff7 100644 +--- a/arch/arm/mach-ep93xx/ts72xx.c ++++ b/arch/arm/mach-ep93xx/ts72xx.c +@@ -51,7 +51,36 @@ static struct map_desc ts72xx_io_desc[] __initdata = { + .pfn = __phys_to_pfn(TS72XX_RTC_DATA_PHYS_BASE), + .length = TS72XX_RTC_DATA_SIZE, + .type = MT_DEVICE, +- } ++ }, ++ /* Use this for debug only. Each device will map its own PC/104 address space */ ++ ///* PC/104 (8-bit) I/O bus */ ++ //{ ++ // .virtual = TS72XX_PC104_8BIT_IO_VIRT_BASE, ++ // .pfn = __phys_to_pfn(TS72XX_PC104_8BIT_IO_PHYS_BASE), ++ // .length = TS72XX_PC104_8BIT_IO_SIZE, ++ // .type = MT_DEVICE, ++ //}, ++ ///* PC/104 (16-bit) I/O bus */ ++ //{ ++ // .virtual = TS72XX_PC104_16BIT_IO_VIRT_BASE, ++ // .pfn = __phys_to_pfn(TS72XX_PC104_16BIT_IO_PHYS_BASE), ++ // .length = TS72XX_PC104_16BIT_IO_SIZE, ++ // .type = MT_DEVICE, ++ //}, ++ ///* PC/104 (8-bit) MEM bus */ ++ //{ ++ // .virtual = TS72XX_PC104_8BIT_MEM_VIRT_BASE, ++ // .pfn = __phys_to_pfn(TS72XX_PC104_8BIT_MEM_PHYS_BASE), ++ // .length = TS72XX_PC104_8BIT_MEM_SIZE, ++ // .type = MT_DEVICE, ++ //}, ++ ///* PC/104 (16-bit) MEM bus */ ++ //{ ++ // .virtual = TS72XX_PC104_16BIT_MEM_VIRT_BASE, ++ // .pfn = __phys_to_pfn(TS72XX_PC104_16BIT_MEM_PHYS_BASE), ++ // .length = TS72XX_PC104_16BIT_MEM_SIZE, ++ // .type = MT_DEVICE, ++ //} + }; + + static struct map_desc ts72xx_nand_io_desc[] __initdata = { +@@ -140,6 +169,9 @@ static void __init ts72xx_register_flash(void) + platform_device_register(&ts72xx_flash); + } + ++/************************************************************************* ++ * RTC ++ *************************************************************************/ + static unsigned char ts72xx_rtc_readbyte(unsigned long addr) + { + __raw_writeb(addr, TS72XX_RTC_INDEX_VIRT_BASE); +@@ -166,6 +198,9 @@ static struct platform_device ts72xx_rtc_device = { + .num_resources = 0, + }; + ++/************************************************************************* ++ * Ethernet ++ *************************************************************************/ + static struct ep93xx_eth_data ts72xx_eth_data = { + .phy_id = 1, + }; +@@ -177,6 +212,9 @@ static void __init ts72xx_init_machine(void) + platform_device_register(&ts72xx_rtc_device); + + ep93xx_register_eth(&ts72xx_eth_data, 1); ++ ++ /* PWM1 is DIO_6 on TS-72xx header */ ++ ep93xx_register_pwm(0, 1); + } + + MACHINE_START(TS72XX, "Technologic Systems TS-72xx SBC") +diff --git a/arch/arm/mm/proc-arm920.S b/arch/arm/mm/proc-arm920.S +index 471669e..158cc35 100644 +--- a/arch/arm/mm/proc-arm920.S ++++ b/arch/arm/mm/proc-arm920.S +@@ -198,7 +198,7 @@ ENTRY(arm920_coherent_kern_range) + */ + ENTRY(arm920_coherent_user_range) + bic r0, r0, #CACHE_DLINESIZE - 1 +-1: mcr p15, 0, r0, c7, c10, 1 @ clean D entry ++1: mcr p15, 0, r0, c7, c14, 1 @ clean+invalidate D entry + mcr p15, 0, r0, c7, c5, 1 @ invalidate I entry + add r0, r0, #CACHE_DLINESIZE + cmp r0, r1 +@@ -374,6 +374,9 @@ __arm920_setup: + mrc p15, 0, r0, c1, c0 @ get control register v4 + bic r0, r0, r5 + orr r0, r0, r6 ++#ifdef CONFIG_CR1_NFBIT ++ orr r0, r0, #0x40000000 @ set nF ++#endif + mov pc, lr + .size __arm920_setup, . - __arm920_setup + +-- +1.6.3.3 + diff --git a/recipes/linux/linux-2.6.33/ts72xx/0002-ts72xx_force_machine-id.patch b/recipes/linux/linux-2.6.33/ts72xx/0002-ts72xx_force_machine-id.patch new file mode 100644 index 0000000000..41f8462875 --- /dev/null +++ b/recipes/linux/linux-2.6.33/ts72xx/0002-ts72xx_force_machine-id.patch @@ -0,0 +1,50 @@ +From 8860be24fe28b65982fee215659e8f80db388a13 Mon Sep 17 00:00:00 2001 +From: Matthieu Crapet <mcrapet@gmail.com> +Date: Sun, 17 Jan 2010 17:03:17 +0100 +Subject: [PATCH 02/16] ts72xx_force_machine-id +MIME-Version: 1.0 +Content-Type: text/plain; charset=utf-8 +Content-Transfer-Encoding: 8bit + + +Signed-off-by: Petr Štetiar <ynezz@true.cz> +--- + arch/arm/kernel/head.S | 3 +++ + arch/arm/mach-ep93xx/Kconfig | 7 +++++++ + 2 files changed, 10 insertions(+), 0 deletions(-) + +diff --git a/arch/arm/kernel/head.S b/arch/arm/kernel/head.S +index eb62bf9..450fefa 100644 +--- a/arch/arm/kernel/head.S ++++ b/arch/arm/kernel/head.S +@@ -82,6 +82,9 @@ ENTRY(stext) + bl __lookup_processor_type @ r5=procinfo r9=cpuid + movs r10, r5 @ invalid processor (r5=0)? + beq __error_p @ yes, error 'p' ++#ifdef CONFIG_MACH_TS72XX_FORCE_MACHINEID ++ ldr r1, =0x2a1 ++#endif + bl __lookup_machine_type @ r5=machinfo + movs r8, r5 @ invalid machine (r5=0)? + beq __error_a @ yes, error 'a' +diff --git a/arch/arm/mach-ep93xx/Kconfig b/arch/arm/mach-ep93xx/Kconfig +index 335b0bb..049c9dd 100644 +--- a/arch/arm/mach-ep93xx/Kconfig ++++ b/arch/arm/mach-ep93xx/Kconfig +@@ -191,6 +191,13 @@ config EP93XX_EARLY_UART3 + + endchoice + ++config MACH_TS72XX_FORCE_MACHINEID ++ bool "Force Machine ID" ++ depends on MACH_TS72XX ++ help ++ Say 'Y' here to force Machine ID to 0x2A1 (MACH_TYPE_TS72XX legacy value) ++ In early days Technologic Systems fixed the 0x163 value in redboot. ++ + endmenu + + endif +-- +1.6.3.3 + diff --git a/recipes/linux/linux-2.6.33/ts72xx/0003-ep93xx_cpuinfo.patch b/recipes/linux/linux-2.6.33/ts72xx/0003-ep93xx_cpuinfo.patch new file mode 100644 index 0000000000..cb4b872c22 --- /dev/null +++ b/recipes/linux/linux-2.6.33/ts72xx/0003-ep93xx_cpuinfo.patch @@ -0,0 +1,37 @@ +From 60ab834032b50ad88ede8d50cfc7375cd0d705a0 Mon Sep 17 00:00:00 2001 +From: Matthieu Crapet <mcrapet@gmail.com> +Date: Sun, 17 Jan 2010 17:07:14 +0100 +Subject: [PATCH 03/16] ep93xx_cpuinfo +MIME-Version: 1.0 +Content-Type: text/plain; charset=utf-8 +Content-Transfer-Encoding: 8bit + + +Signed-off-by: Petr Štetiar <ynezz@true.cz> +--- + arch/arm/kernel/setup.c | 9 +++++++++ + 1 files changed, 9 insertions(+), 0 deletions(-) + +diff --git a/arch/arm/kernel/setup.c b/arch/arm/kernel/setup.c +index 621acad..55914ad 100644 +--- a/arch/arm/kernel/setup.c ++++ b/arch/arm/kernel/setup.c +@@ -861,6 +861,15 @@ static int c_show(struct seq_file *m, void *v) + seq_puts(m, "\n"); + + seq_printf(m, "Hardware\t: %s\n", machine_name); ++ ++ #if defined(CONFIG_ARCH_EP93XX) ++ #include <mach/io.h> ++ #include <mach/ep93xx-regs.h> ++ system_rev = *((unsigned int *)EP93XX_SYSCON_CHIPID) >> 28; ++ system_serial_low = *((unsigned int *)EP93XX_SECURITY_UNIQID); ++ system_serial_high = 0; ++ #endif ++ + seq_printf(m, "Revision\t: %04x\n", system_rev); + seq_printf(m, "Serial\t\t: %08x%08x\n", + system_serial_high, system_serial_low); +-- +1.6.3.3 + diff --git a/recipes/linux/linux-2.6.33/ts72xx/0004-ts72xx_sbcinfo.patch b/recipes/linux/linux-2.6.33/ts72xx/0004-ts72xx_sbcinfo.patch new file mode 100644 index 0000000000..9dda5e9257 --- /dev/null +++ b/recipes/linux/linux-2.6.33/ts72xx/0004-ts72xx_sbcinfo.patch @@ -0,0 +1,226 @@ +From 529f5a6533c34c4057f7f659acfecd7282a0fd01 Mon Sep 17 00:00:00 2001 +From: Matthieu Crapet <mcrapet@gmail.com> +Date: Sun, 17 Jan 2010 17:11:19 +0100 +Subject: [PATCH 04/16] ts72xx_sbcinfo +MIME-Version: 1.0 +Content-Type: text/plain; charset=utf-8 +Content-Transfer-Encoding: 8bit + + +Signed-off-by: Petr Štetiar <ynezz@true.cz> +--- + arch/arm/mach-ep93xx/Kconfig | 7 ++ + arch/arm/mach-ep93xx/Makefile | 1 + + arch/arm/mach-ep93xx/ts72xx.c | 5 + + arch/arm/mach-ep93xx/ts72xx_sbcinfo.c | 156 +++++++++++++++++++++++++++++++++ + 4 files changed, 169 insertions(+), 0 deletions(-) + create mode 100644 arch/arm/mach-ep93xx/ts72xx_sbcinfo.c + +diff --git a/arch/arm/mach-ep93xx/Kconfig b/arch/arm/mach-ep93xx/Kconfig +index 049c9dd..34d2c3b 100644 +--- a/arch/arm/mach-ep93xx/Kconfig ++++ b/arch/arm/mach-ep93xx/Kconfig +@@ -198,6 +198,13 @@ config MACH_TS72XX_FORCE_MACHINEID + Say 'Y' here to force Machine ID to 0x2A1 (MACH_TYPE_TS72XX legacy value) + In early days Technologic Systems fixed the 0x163 value in redboot. + ++config MACH_TS72XX_SBCINFO ++ tristate "Add procfs /proc/driver/sbcinfo" ++ depends on MACH_TS72XX ++ help ++ Say 'Y' to add a procfs entry containing some information ++ related to Technologic Systems TS-72xx SBC. ++ + endmenu + + endif +diff --git a/arch/arm/mach-ep93xx/Makefile b/arch/arm/mach-ep93xx/Makefile +index eae6199..c2451e6 100644 +--- a/arch/arm/mach-ep93xx/Makefile ++++ b/arch/arm/mach-ep93xx/Makefile +@@ -11,3 +11,4 @@ obj-$(CONFIG_MACH_EDB93XX) += edb93xx.o + obj-$(CONFIG_MACH_GESBC9312) += gesbc9312.o + obj-$(CONFIG_MACH_MICRO9) += micro9.o + obj-$(CONFIG_MACH_TS72XX) += ts72xx.o ++obj-$(CONFIG_MACH_TS72XX_SBCINFO) += ts72xx_sbcinfo.o +diff --git a/arch/arm/mach-ep93xx/ts72xx.c b/arch/arm/mach-ep93xx/ts72xx.c +index 4a97ff7..2c0af20 100644 +--- a/arch/arm/mach-ep93xx/ts72xx.c ++++ b/arch/arm/mach-ep93xx/ts72xx.c +@@ -32,6 +32,11 @@ static struct map_desc ts72xx_io_desc[] __initdata = { + .length = TS72XX_MODEL_SIZE, + .type = MT_DEVICE, + }, { ++ .virtual = TS72XX_PLD_VERSION_VIRT_BASE, ++ .pfn = __phys_to_pfn(TS72XX_PLD_VERSION_PHYS_BASE), ++ .length = TS72XX_PLD_VERSION_SIZE, ++ .type = MT_DEVICE, ++ }, { + .virtual = TS72XX_OPTIONS_VIRT_BASE, + .pfn = __phys_to_pfn(TS72XX_OPTIONS_PHYS_BASE), + .length = TS72XX_OPTIONS_SIZE, +diff --git a/arch/arm/mach-ep93xx/ts72xx_sbcinfo.c b/arch/arm/mach-ep93xx/ts72xx_sbcinfo.c +new file mode 100644 +index 0000000..4589d14 +--- /dev/null ++++ b/arch/arm/mach-ep93xx/ts72xx_sbcinfo.c +@@ -0,0 +1,156 @@ ++/* ++ * Technologic Systems TS-72XX sbc /proc/driver/sbcinfo entry. ++ * ++ * Original idea by Liberty Young (Technologic Systems). ++ * ++ * (c) Copyright 2008 Matthieu Crapet <mcrapet@gmail.com> ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License ++ * as published by the Free Software Foundation; either version ++ * 2 of the License, or (at your option) any later version. ++ */ ++ ++#include <linux/module.h> ++#include <linux/kernel.h> ++#include <linux/init.h> ++#include <linux/io.h> ++#include <linux/proc_fs.h> ++#include <mach/hardware.h> ++#include <mach/ts72xx.h> ++ ++struct infos { ++ const char *cpu_rev; ++ int model, pld; ++ int option_ad; ++ int option_rs485; ++ unsigned char jumpers[6]; // 0=off,1=on,2=error ++}; ++ ++static const char *revisions[] = { "A", "B", "C", "D0", "D1", "E0", "E1", "E2", "??" }; ++ ++ ++static void get_sbcinfo(struct infos *data) ++{ ++ void __iomem *p; ++ short rev; ++ ++ /* CPU revision */ ++ rev = __raw_readl(EP93XX_SYSCON_CHIPID) >> 28; ++ if (rev > ARRAY_SIZE(revisions)) ++ rev = ARRAY_SIZE(revisions) - 1; ++ data->cpu_rev = revisions[rev]; ++ ++ /* Board model */ ++ if (board_is_ts7200()) ++ data->model = 7200; ++ else if (board_is_ts7250()) ++ data->model = 7250; ++ else if (board_is_ts7260()) ++ data->model = 7260; ++ else if (board_is_ts7400()) ++ data->model = 7400; ++ else ++ data->model = 0; ++ ++ data->pld = get_ts72xx_pld_version(); ++ ++ /* A/D converter (8 x 12-bit channels) */ ++ if ((data->model == 7200) || (data->model == 7250)) { ++ data->option_ad = is_max197_installed(); ++ } else { ++ data->option_ad = 0; ++ } ++ ++ /* COM2 RS-485 */ ++ if (is_rs485_installed()) { ++ data->option_rs485 = 1; ++ } else { ++ data->option_rs485 = 0; ++ } ++ ++ /* jumpers */ ++ p = ioremap(TS72XX_JUMPERS_MAX197_PHYS_BASE, TS72XX_JUMPERS_MAX197_SIZE); ++ if (p) { ++ unsigned char c = __raw_readb(p); ++ ++ data->jumpers[0] = 2; // JP1 (bootstrap) ++ data->jumpers[1] = !!(c & 0x01); // JP2 (enable serial console) ++ data->jumpers[2] = !!(c & 0x02); // JP3 (flash write enable) ++ data->jumpers[3] = !(c & 0x08); // JP4 (console on COM2) ++ data->jumpers[4] = !(c & 0x10); // JP5 (test) ++ data->jumpers[5] = !!(is_jp6_set()); // JP6 (user jumper) ++ ++ iounmap(p); ++ } else { ++ data->jumpers[0] = data->jumpers[1] = data->jumpers[2] = 2; ++ data->jumpers[3] = data->jumpers[4] = data->jumpers[5] = 2; ++ } ++ ++} ++ ++ ++static int ts72xx_sbcinfo_read_proc(char *buffer, char **start, off_t offset, ++ int count, int *eof, void *data) ++{ ++ int len, size = count; ++ char *p = buffer; ++ struct infos nfo; ++ const char jpc[3] = { 'n', 'y', '?' }; ++ ++ get_sbcinfo(&nfo); ++ len = scnprintf(p, size, ++ "Model : TS-%d (CPU rev %s) (PLD rev %c)\n" ++ "Option max197 A/D : %s\n" ++ "Option RS-485 : %s\n" ++ "Jumpers : JP2=%c JP3=%c JP4=%c JP5=%c JP6=%c\n", ++ nfo.model, nfo.cpu_rev, nfo.pld + 0x40, ++ (nfo.option_ad ? "yes" : "no"), ++ (nfo.option_rs485 ? "yes" : "no"), ++ jpc[nfo.jumpers[1]], jpc[nfo.jumpers[2]], jpc[nfo.jumpers[3]], jpc[nfo.jumpers[4]], ++ jpc[nfo.jumpers[5]]); ++ ++ if (len <= offset + count) ++ *eof = 1; ++ ++ *start = buffer + offset; ++ len -= offset; ++ ++ if (len > count) ++ len = count; ++ if (len < 0) ++ len = 0; ++ ++ return len; ++} ++ ++ ++static int __init ts72xx_sbcinfo_init(void) ++{ ++ struct proc_dir_entry *entry; ++ int ret = 0; ++ ++ entry = create_proc_read_entry("driver/sbcinfo", 0, ++ NULL, ts72xx_sbcinfo_read_proc, NULL); ++ ++ if (!entry) { ++ printk(KERN_ERR "sbcinfo: can't create /proc/driver/sbcinfo\n"); ++ ret = -ENOMEM; ++ } ++ ++ return ret; ++} ++ ++static void __exit ts72xx_sbcinfo_exit(void) ++{ ++ remove_proc_entry("driver/sbcinfo", NULL); ++ return; ++} ++ ++module_init(ts72xx_sbcinfo_init); ++module_exit(ts72xx_sbcinfo_exit); ++ ++MODULE_AUTHOR("Matthieu Crapet <mcrapet@gmail.com>"); ++MODULE_DESCRIPTION("Show information of Technologic Systems TS-72XX sbc"); ++MODULE_LICENSE("GPL"); ++MODULE_VERSION("1.02"); +-- +1.6.3.3 + diff --git a/recipes/linux/linux-2.6.33/ts72xx/0005-ep93xx_eth.patch b/recipes/linux/linux-2.6.33/ts72xx/0005-ep93xx_eth.patch new file mode 100644 index 0000000000..62a21bfed1 --- /dev/null +++ b/recipes/linux/linux-2.6.33/ts72xx/0005-ep93xx_eth.patch @@ -0,0 +1,539 @@ +From f73beb2a36d7d5a5036191512971b077469f9aec Mon Sep 17 00:00:00 2001 +From: Matthieu Crapet <mcrapet@gmail.com> +Date: Sun, 17 Jan 2010 17:45:23 +0100 +Subject: [PATCH 05/16] ep93xx_eth +MIME-Version: 1.0 +Content-Type: text/plain; charset=utf-8 +Content-Transfer-Encoding: 8bit + + +Signed-off-by: Petr Štetiar <ynezz@true.cz> +--- + drivers/net/arm/Kconfig | 1 + + drivers/net/arm/ep93xx_eth.c | 338 ++++++++++++++++++++++++++++++++++-------- + 2 files changed, 277 insertions(+), 62 deletions(-) + +diff --git a/drivers/net/arm/Kconfig b/drivers/net/arm/Kconfig +index 39e1c0d..55c0dd4 100644 +--- a/drivers/net/arm/Kconfig ++++ b/drivers/net/arm/Kconfig +@@ -52,6 +52,7 @@ config EP93XX_ETH + tristate "EP93xx Ethernet support" + depends on ARM && ARCH_EP93XX + select MII ++ select PHYLIB + help + This is a driver for the ethernet hardware included in EP93xx CPUs. + Say Y if you are building a kernel for EP93xx based devices. +diff --git a/drivers/net/arm/ep93xx_eth.c b/drivers/net/arm/ep93xx_eth.c +index b25467a..9880208 100644 +--- a/drivers/net/arm/ep93xx_eth.c ++++ b/drivers/net/arm/ep93xx_eth.c +@@ -2,6 +2,7 @@ + * EP93xx ethernet network device driver + * Copyright (C) 2006 Lennert Buytenhek <buytenh@wantstofly.org> + * Dedicated to Marija Kulikova. ++ * Copyright (C) 2007 Herbert Valerio Riedel <hvr@gnu.org> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by +@@ -14,6 +15,7 @@ + #include <linux/kernel.h> + #include <linux/netdevice.h> + #include <linux/mii.h> ++#include <linux/phy.h> + #include <linux/etherdevice.h> + #include <linux/ethtool.h> + #include <linux/init.h> +@@ -25,7 +27,7 @@ + #include <asm/io.h> + + #define DRV_MODULE_NAME "ep93xx-eth" +-#define DRV_MODULE_VERSION "0.1" ++#define DRV_MODULE_VERSION "0.12" + + #define RX_QUEUE_ENTRIES 64 + #define TX_QUEUE_ENTRIES 8 +@@ -37,6 +39,8 @@ + #define REG_RXCTL_DEFAULT 0x00073800 + #define REG_TXCTL 0x0004 + #define REG_TXCTL_ENABLE 0x00000001 ++#define REG_TESTCTL 0x0008 ++#define REG_TESTCTL_MFDX 0x00000040 + #define REG_MIICMD 0x0010 + #define REG_MIICMD_READ 0x00008000 + #define REG_MIICMD_WRITE 0x00004000 +@@ -45,6 +49,9 @@ + #define REG_MIISTS_BUSY 0x00000001 + #define REG_SELFCTL 0x0020 + #define REG_SELFCTL_RESET 0x00000001 ++#define REG_SELFCTL_MDCDIV_MSK 0x00007e00 ++#define REG_SELFCTL_MDCDIV_OFS 9 ++#define REG_SELFCTL_PSPRS 0x00000100 + #define REG_INTEN 0x0024 + #define REG_INTEN_TX 0x00000008 + #define REG_INTEN_RX 0x00000007 +@@ -174,8 +181,14 @@ struct ep93xx_priv + + struct net_device_stats stats; + +- struct mii_if_info mii; + u8 mdc_divisor; ++ int phy_supports_mfps:1; ++ ++ struct mii_bus mii_bus; ++ struct phy_device *phy_dev; ++ int speed; ++ int duplex; ++ int link; + }; + + #define rdb(ep, off) __raw_readb((ep)->base_addr + (off)) +@@ -185,8 +198,6 @@ struct ep93xx_priv + #define wrw(ep, off, val) __raw_writew((val), (ep)->base_addr + (off)) + #define wrl(ep, off, val) __raw_writel((val), (ep)->base_addr + (off)) + +-static int ep93xx_mdio_read(struct net_device *dev, int phy_id, int reg); +- + static struct net_device_stats *ep93xx_get_stats(struct net_device *dev) + { + struct ep93xx_priv *ep = netdev_priv(dev); +@@ -522,6 +533,22 @@ err: + return 1; + } + ++static int ep93xx_mdio_reset(struct mii_bus *bus) ++{ ++ struct ep93xx_priv *ep = bus->priv; ++ ++ u32 selfctl = rdl(ep, REG_SELFCTL); ++ ++ selfctl &= ~(REG_SELFCTL_MDCDIV_MSK | REG_SELFCTL_PSPRS); ++ ++ selfctl |= (ep->mdc_divisor - 1) << REG_SELFCTL_MDCDIV_OFS; ++ selfctl |= REG_SELFCTL_PSPRS; ++ ++ wrl(ep, REG_SELFCTL, selfctl); ++ ++ return 0; ++} ++ + static int ep93xx_start_hw(struct net_device *dev) + { + struct ep93xx_priv *ep = netdev_priv(dev); +@@ -540,11 +567,8 @@ static int ep93xx_start_hw(struct net_device *dev) + return 1; + } + +- wrl(ep, REG_SELFCTL, ((ep->mdc_divisor - 1) << 9)); +- +- /* Does the PHY support preamble suppress? */ +- if ((ep93xx_mdio_read(dev, ep->mii.phy_id, MII_BMSR) & 0x0040) != 0) +- wrl(ep, REG_SELFCTL, ((ep->mdc_divisor - 1) << 9) | (1 << 8)); ++ /* The reset cleared REG_SELFCTL, so set the MDC divisor again */ ++ ep93xx_mdio_reset(&ep->mii_bus); + + /* Receive descriptor ring. */ + addr = ep->descs_dma_addr + offsetof(struct ep93xx_descs, rdesc); +@@ -653,6 +677,8 @@ static int ep93xx_open(struct net_device *dev) + + wrl(ep, REG_GIINTMSK, REG_GIINTMSK_ENABLE); + ++ phy_start(ep->phy_dev); ++ + netif_start_queue(dev); + + return 0; +@@ -665,6 +691,9 @@ static int ep93xx_close(struct net_device *dev) + napi_disable(&ep->napi); + netif_stop_queue(dev); + ++ if (ep->phy_dev) ++ phy_stop(ep->phy_dev); ++ + wrl(ep, REG_GIINTMSK, 0); + free_irq(ep->irq, dev); + ep93xx_stop_hw(dev); +@@ -676,51 +705,83 @@ static int ep93xx_close(struct net_device *dev) + static int ep93xx_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd) + { + struct ep93xx_priv *ep = netdev_priv(dev); +- struct mii_ioctl_data *data = if_mii(ifr); + +- return generic_mii_ioctl(&ep->mii, data, cmd, NULL); ++ return phy_mii_ioctl(ep->phy_dev, if_mii(ifr), cmd); + } + +-static int ep93xx_mdio_read(struct net_device *dev, int phy_id, int reg) ++/* common MII |