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authorFrans Meulenbroeks <fransmeulenbroeks@gmail.com>2010-07-15 22:37:35 +0200
committerFrans Meulenbroeks <fransmeulenbroeks@gmail.com>2010-07-16 18:57:24 +0200
commit5fa7c51fc743136ea3f502ac60a919ea64d4e8e9 (patch)
treefb218be2bb6eeb39ce8f0eb670814fba3b2ac749
parentdd7a49ac1158de431ad5dc9089c49f737a8123a6 (diff)
glibc 2.10.1: cleaned up; patches only in local dir
moved all patches to glibc-2.10.1 removed references to other dirs. Signed-off-by: Frans Meulenbroeks <fransmeulenbroeks@gmail.com> Acked-by: Khem Raj <raj.khem@gmail.com>
-rw-r--r--recipes/glibc/glibc-2.10.1/arm-longlong.patch58
-rw-r--r--recipes/glibc/glibc-2.10.1/arm-lowlevellock-include-tls.patch12
-rw-r--r--recipes/glibc/glibc-2.10.1/arm-memcpy.patch758
-rw-r--r--recipes/glibc/glibc-2.10.1/armv4t-interworking.patch47
-rw-r--r--recipes/glibc/glibc-2.10.1/dl-cache-libcmp.patch10
-rw-r--r--recipes/glibc/glibc-2.10.1/etc/ld.so.conf2
-rw-r--r--recipes/glibc/glibc-2.10.1/fhs-linux-paths.patch11
-rw-r--r--recipes/glibc/glibc-2.10.1/generate-supported.mk11
-rw-r--r--recipes/glibc/glibc-2.10.1/generic-bits_select.h35
-rw-r--r--recipes/glibc/glibc-2.10.1/generic-bits_time.h75
-rw-r--r--recipes/glibc/glibc-2.10.1/generic-bits_types.h200
-rw-r--r--recipes/glibc/glibc-2.10.1/generic-bits_typesizes.h66
-rw-r--r--recipes/glibc/glibc-2.10.1/glibc-arm-IO-acquire-lock-fix.diff13
-rw-r--r--recipes/glibc/glibc-2.10.1/glibc-check_pf.patch343
-rw-r--r--recipes/glibc/glibc-2.10.1/ldd-unbash.patch11
-rw-r--r--recipes/glibc/glibc-2.10.1/ldsocache-varrun.patch18
-rw-r--r--recipes/glibc/glibc-2.10.1/march-i686.patch38
-rw-r--r--recipes/glibc/glibc-2.10.1/no-z-defs.patch9
-rw-r--r--recipes/glibc/glibc-2.10.1/nptl-crosscompile.patch26
-rw-r--r--recipes/glibc/glibc-2.10.1/nscd-init.patch39
-rw-r--r--recipes/glibc/glibc-2.10.1/powerpc-sqrt-hack.diff25
-rw-r--r--recipes/glibc/glibc_2.10.1.bb3
22 files changed, 1807 insertions, 3 deletions
diff --git a/recipes/glibc/glibc-2.10.1/arm-longlong.patch b/recipes/glibc/glibc-2.10.1/arm-longlong.patch
new file mode 100644
index 0000000000..28aca83dff
--- /dev/null
+++ b/recipes/glibc/glibc-2.10.1/arm-longlong.patch
@@ -0,0 +1,58 @@
+--- glibc-2.4/stdlib/longlong.h.ark 2006-03-11 22:49:27.000000000 +0100
++++ glibc-2.4/stdlib/longlong.h 2006-03-11 22:55:12.000000000 +0100
+@@ -206,6 +206,14 @@
+ "rI" ((USItype) (bh)), \
+ "r" ((USItype) (al)), \
+ "rI" ((USItype) (bl)) __CLOBBER_CC)
++/* v3m and all higher arches have long multiply support. */
++#if !defined(__ARM_ARCH_2__) && !defined(__ARM_ARCH_3__)
++#define umul_ppmm(xh, xl, a, b) \
++ __asm__ ("umull %0,%1,%2,%3" : "=&r" (xl), "=&r" (xh) : "r" (a), "r" (b))
++#define UMUL_TIME 5
++#define smul_ppmm(xh, xl, a, b) \
++ __asm__ ("smull %0,%1,%2,%3" : "=&r" (xl), "=&r" (xh) : "r" (a), "r" (b))
++#else
+ #define umul_ppmm(xh, xl, a, b) \
+ {register USItype __t0, __t1, __t2; \
+ __asm__ ("%@ Inlined umul_ppmm\n" \
+@@ -227,7 +235,13 @@
+ : "r" ((USItype) (a)), \
+ "r" ((USItype) (b)) __CLOBBER_CC );}
+ #define UMUL_TIME 20
++#endif
+ #define UDIV_TIME 100
++#if defined(__ARM_ARCH_5__) || defined(__ARM_ARCH_5T__) || defined(__ARM_ARCH_5TE__)
++#define count_leading_zeros(COUNT,X) ((COUNT) = __builtin_clz (X))
++#define COUNT_LEADING_ZEROS_0 32
++#endif
++
+ #endif /* __arm__ */
+
+ #if defined (__hppa) && W_TYPE_SIZE == 32
+--- glibc-2.4/ports/sysdeps/arm/mp_clz_tab.c.ark 2006-03-11 22:56:43.000000000 +0100
++++ glibc-2.4/ports/sysdeps/arm/mp_clz_tab.c 2006-03-11 22:58:19.000000000 +0100
+@@ -0,0 +1,24 @@
++/* __clz_tab -- support for longlong.h
++ Copyright (C) 2004 Free Software Foundation, Inc.
++ This file is part of the GNU C Library.
++
++ The GNU C Library is free software; you can redistribute it and/or
++ modify it under the terms of the GNU Lesser General Public
++ License as published by the Free Software Foundation; either
++ version 2.1 of the License, or (at your option) any later version.
++
++ The GNU C Library is distributed in the hope that it will be useful,
++ but WITHOUT ANY WARRANTY; without even the implied warranty of
++ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
++ Lesser General Public License for more details.
++
++ You should have received a copy of the GNU Lesser General Public
++ License along with the GNU C Library; if not, write to the Free
++ Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
++ 02111-1307 USA. */
++
++#if defined(__ARM_ARCH_5__) || defined(__ARM_ARCH_5T__) || defined(__ARM_ARCH_5TE__)
++/* Nothing required. */
++#else
++#include <stdlib/mp_clz_tab.c>
++#endif
diff --git a/recipes/glibc/glibc-2.10.1/arm-lowlevellock-include-tls.patch b/recipes/glibc/glibc-2.10.1/arm-lowlevellock-include-tls.patch
new file mode 100644
index 0000000000..5c8062ecee
--- /dev/null
+++ b/recipes/glibc/glibc-2.10.1/arm-lowlevellock-include-tls.patch
@@ -0,0 +1,12 @@
+Index: glibc-2.9/ports/sysdeps/unix/sysv/linux/arm/nptl/lowlevellock.h
+===================================================================
+--- glibc-2.9.orig/ports/sysdeps/unix/sysv/linux/arm/nptl/lowlevellock.h 2009-06-19 20:54:35.446686910 +0400
++++ glibc-2.9/ports/sysdeps/unix/sysv/linux/arm/nptl/lowlevellock.h 2009-06-19 20:54:43.774683370 +0400
+@@ -25,6 +25,7 @@
+ #include <atomic.h>
+ #include <sysdep.h>
+ #include <kernel-features.h>
++#include <tls.h>
+
+ #define FUTEX_WAIT 0
+ #define FUTEX_WAKE 1
diff --git a/recipes/glibc/glibc-2.10.1/arm-memcpy.patch b/recipes/glibc/glibc-2.10.1/arm-memcpy.patch
new file mode 100644
index 0000000000..bc2b3dab84
--- /dev/null
+++ b/recipes/glibc/glibc-2.10.1/arm-memcpy.patch
@@ -0,0 +1,758 @@
+--- /dev/null 2004-02-02 20:32:13.000000000 +0000
++++ sysdeps/arm/memmove.S 2004-03-20 18:37:23.000000000 +0000
+@@ -0,0 +1,251 @@
++/*
++ * Optimized memmove implementation for ARM processors
++ *
++ * Author: Nicolas Pitre
++ * Created: Dec 23, 2003
++ * Copyright: (C) MontaVista Software, Inc.
++ *
++ * This file is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU Lesser General Public
++ * License as published by the Free Software Foundation; either
++ * version 2.1 of the License, or (at your option) any later version.
++ *
++ * This file is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
++ * Lesser General Public License for more details.
++ */
++
++#include <sysdep.h>
++
++
++/*
++ * Endian independent macros for shifting bytes within registers.
++ */
++#ifndef __ARMEB__
++#define pull lsr
++#define push lsl
++#else
++#define pull lsl
++#define push lsr
++#endif
++
++/*
++ * Enable data preload for architectures that support it (ARMv5 and above)
++ */
++#if defined(__ARM_ARCH_5__) || \
++ defined(__ARM_ARCH_5T__) || \
++ defined(__ARM_ARCH_5TE__)
++#define PLD(code...) code
++#else
++#define PLD(code...)
++#endif
++
++
++/* char * memmove (char *dst, const char *src) */
++ENTRY(memmove)
++ subs ip, r0, r1
++ cmphi r2, ip
++ bls memcpy(PLT)
++
++ stmfd sp!, {r0, r4, lr}
++ add r1, r1, r2
++ add r0, r0, r2
++ subs r2, r2, #4
++ blt 25f
++ ands ip, r0, #3
++ PLD( pld [r1, #-4] )
++ bne 26f
++ ands ip, r1, #3
++ bne 27f
++
++19: subs r2, r2, #4
++ blt 24f
++ subs r2, r2, #8
++ blt 23f
++ subs r2, r2, #16
++ blt 22f
++
++ PLD( pld [r1, #-32] )
++ PLD( subs r2, r2, #96 )
++ stmfd sp!, {r5 - r8}
++ PLD( blt 21f )
++
++ PLD( @ cache alignment )
++ PLD( ands ip, r1, #31 )
++ PLD( pld [r1, #-64] )
++ PLD( beq 20f )
++ PLD( cmp r2, ip )
++ PLD( pld [r1, #-96] )
++ PLD( blt 20f )
++ PLD( cmp ip, #16 )
++ PLD( sub r2, r2, ip )
++ PLD( ldmgedb r1!, {r3 - r6} )
++ PLD( stmgedb r0!, {r3 - r6} )
++ PLD( beq 20f )
++ PLD( and ip, ip, #15 )
++ PLD( cmp ip, #8 )
++ PLD( ldr r3, [r1, #-4]! )
++ PLD( ldrge r4, [r1, #-4]! )
++ PLD( ldrgt r5, [r1, #-4]! )
++ PLD( str r3, [r0, #-4]! )
++ PLD( strge r4, [r0, #-4]! )
++ PLD( strgt r5, [r0, #-4]! )
++
++20: PLD( pld [r1, #-96] )
++ PLD( pld [r1, #-128] )
++21: ldmdb r1!, {r3, r4, ip, lr}
++ subs r2, r2, #32
++ stmdb r0!, {r3, r4, ip, lr}
++ ldmdb r1!, {r3, r4, ip, lr}
++ stmgedb r0!, {r3, r4, ip, lr}
++ ldmgedb r1!, {r3, r4, ip, lr}
++ stmgedb r0!, {r3, r4, ip, lr}
++ ldmgedb r1!, {r3, r4, ip, lr}
++ subges r2, r2, #32
++ stmdb r0!, {r3, r4, ip, lr}
++ bge 20b
++ PLD( cmn r2, #96 )
++ PLD( bge 21b )
++ PLD( add r2, r2, #96 )
++ tst r2, #31
++ ldmfd sp!, {r5 - r8}
++ ldmeqfd sp!, {r0, r4, pc}
++
++ tst r2, #16
++22: ldmnedb r1!, {r3, r4, ip, lr}
++ stmnedb r0!, {r3, r4, ip, lr}
++
++ tst r2, #8
++23: ldmnedb r1!, {r3, r4}
++ stmnedb r0!, {r3, r4}
++
++ tst r2, #4
++24: ldrne r3, [r1, #-4]!
++ strne r3, [r0, #-4]!
++
++25: ands r2, r2, #3
++ ldmeqfd sp!, {r0, r4, pc}
++
++ cmp r2, #2
++ ldrb r3, [r1, #-1]
++ ldrgeb r4, [r1, #-2]
++ ldrgtb ip, [r1, #-3]
++ strb r3, [r0, #-1]
++ strgeb r4, [r0, #-2]
++ strgtb ip, [r0, #-3]
++ ldmfd sp!, {r0, r4, pc}
++
++26: cmp ip, #2
++ ldrb r3, [r1, #-1]!
++ ldrgeb r4, [r1, #-1]!
++ ldrgtb lr, [r1, #-1]!
++ strb r3, [r0, #-1]!
++ strgeb r4, [r0, #-1]!
++ strgtb lr, [r0, #-1]!
++ subs r2, r2, ip
++ blt 25b
++ ands ip, r1, #3
++ beq 19b
++
++27: bic r1, r1, #3
++ cmp ip, #2
++ ldr r3, [r1]
++ beq 35f
++ blt 36f
++
++
++ .macro backward_copy_shift push pull
++
++ cmp r2, #12
++ PLD( pld [r1, #-4] )
++ blt 33f
++ subs r2, r2, #28
++ stmfd sp!, {r5 - r9}
++ blt 31f
++
++ PLD( subs r2, r2, #96 )
++ PLD( pld [r1, #-32] )
++ PLD( blt 30f )
++ PLD( pld [r1, #-64] )
++
++ PLD( @ cache alignment )
++ PLD( ands ip, r1, #31 )
++ PLD( pld [r1, #-96] )
++ PLD( beq 29f )
++ PLD( cmp r2, ip )
++ PLD( pld [r1, #-128] )
++ PLD( blt 29f )
++ PLD( sub r2, r2, ip )
++28: PLD( mov r4, r3, push #\push )
++ PLD( ldr r3, [r1, #-4]! )
++ PLD( subs ip, ip, #4 )
++ PLD( orr r4, r4, r3, pull #\pull )
++ PLD( str r4, [r0, #-4]! )
++ PLD( bgt 28b )
++
++29: PLD( pld [r1, #-128] )
++30: mov lr, r3, push #\push
++ ldmdb r1!, {r3 - r9, ip}
++ subs r2, r2, #32
++ orr lr, lr, ip, pull #\pull
++ mov ip, ip, push #\push
++ orr ip, ip, r9, pull #\pull
++ mov r9, r9, push #\push
++ orr r9, r9, r8, pull #\pull
++ mov r8, r8, push #\push
++ orr r8, r8, r7, pull #\pull
++ mov r7, r7, push #\push
++ orr r7, r7, r6, pull #\pull
++ mov r6, r6, push #\push
++ orr r6, r6, r5, pull #\pull
++ mov r5, r5, push #\push
++ orr r5, r5, r4, pull #\pull
++ mov r4, r4, push #\push
++ orr r4, r4, r3, pull #\pull
++ stmdb r0!, {r4 - r9, ip, lr}
++ bge 29b
++ PLD( cmn r2, #96 )
++ PLD( bge 30b )
++ PLD( add r2, r2, #96 )
++ cmn r2, #16
++ blt 32f
++31: mov r7, r3, push #\push
++ ldmdb r1!, {r3 - r6}
++ sub r2, r2, #16
++ orr r7, r7, r6, pull #\pull
++ mov r6, r6, push #\push
++ orr r6, r6, r5, pull #\pull
++ mov r5, r5, push #\push
++ orr r5, r5, r4, pull #\pull
++ mov r4, r4, push #\push
++ orr r4, r4, r3, pull #\pull
++ stmdb r0!, {r4 - r7}
++32: adds r2, r2, #28
++ ldmfd sp!, {r5 - r9}
++ blt 34f
++33: mov r4, r3, push #\push
++ ldr r3, [r1, #-4]!
++ subs r2, r2, #4
++ orr r4, r4, r3, pull #\pull
++ str r4, [r0, #-4]!
++ bge 33b
++34:
++ .endm
++
++
++ backward_copy_shift push=8 pull=24
++ add r1, r1, #3
++ b 25b
++
++35: backward_copy_shift push=16 pull=16
++ add r1, r1, #2
++ b 25b
++
++36: backward_copy_shift push=24 pull=8
++ add r1, r1, #1
++ b 25b
++
++ .size memmove, . - memmove
++END(memmove)
++libc_hidden_builtin_def (memmove)
+--- /dev/null 2004-02-02 20:32:13.000000000 +0000
++++ sysdeps/arm/bcopy.S 2004-03-20 18:37:48.000000000 +0000
+@@ -0,0 +1,255 @@
++/*
++ * Optimized memmove implementation for ARM processors
++ *
++ * Author: Nicolas Pitre
++ * Created: Dec 23, 2003
++ * Copyright: (C) MontaVista Software, Inc.
++ *
++ * This file is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU Lesser General Public
++ * License as published by the Free Software Foundation; either
++ * version 2.1 of the License, or (at your option) any later version.
++ *
++ * This file is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
++ * Lesser General Public License for more details.
++ */
++
++#include <sysdep.h>
++
++
++/*
++ * Endian independent macros for shifting bytes within registers.
++ */
++#ifndef __ARMEB__
++#define pull lsr
++#define push lsl
++#else
++#define pull lsl
++#define push lsr
++#endif
++
++/*
++ * Enable data preload for architectures that support it (ARMv5 and above)
++ */
++#if defined(__ARM_ARCH_5__) || \
++ defined(__ARM_ARCH_5T__) || \
++ defined(__ARM_ARCH_5TE__)
++#define PLD(code...) code
++#else
++#define PLD(code...)
++#endif
++
++dst .req r1
++src .req r0
++
++/* void *bcopy (const char *src, char *dst, size_t size) */
++ENTRY(bcopy)
++ subs ip, dst, src
++ cmphi r2, ip
++ movls r3, r0
++ movls r0, r1
++ movls r1, r3
++ bls memcpy(PLT)
++
++ stmfd sp!, {r4, lr}
++ add src, src, r2
++ add dst, dst, r2
++ subs r2, r2, #4
++ blt 25f
++ ands ip, dst, #3
++ PLD( pld [src, #-4] )
++ bne 26f
++ ands ip, src, #3
++ bne 27f
++
++19: subs r2, r2, #4
++ blt 24f
++ subs r2, r2, #8
++ blt 23f
++ subs r2, r2, #16
++ blt 22f
++
++ PLD( pld [src, #-32] )
++ PLD( subs r2, r2, #96 )
++ stmfd sp!, {r5 - r8}
++ PLD( blt 21f )
++
++ PLD( @ cache alignment )
++ PLD( ands ip, src, #31 )
++ PLD( pld [src, #-64] )
++ PLD( beq 20f )
++ PLD( cmp r2, ip )
++ PLD( pld [src, #-96] )
++ PLD( blt 20f )
++ PLD( cmp ip, #16 )
++ PLD( sub r2, r2, ip )
++ PLD( ldmgedb src!, {r3 - r6} )
++ PLD( stmgedb dst!, {r3 - r6} )
++ PLD( beq 20f )
++ PLD( and ip, ip, #15 )
++ PLD( cmp ip, #8 )
++ PLD( ldr r3, [src, #-4]! )
++ PLD( ldrge r4, [src, #-4]! )
++ PLD( ldrgt r5, [src, #-4]! )
++ PLD( str r3, [dst, #-4]! )
++ PLD( strge r4, [dst, #-4]! )
++ PLD( strgt r5, [dst, #-4]! )
++
++20: PLD( pld [src, #-96] )
++ PLD( pld [src, #-128] )
++21: ldmdb src!, {r3, r4, ip, lr}
++ subs r2, r2, #32
++ stmdb dst!, {r3, r4, ip, lr}
++ ldmdb src!, {r3, r4, ip, lr}
++ stmgedb dst!, {r3, r4, ip, lr}
++ ldmgedb src!, {r3, r4, ip, lr}
++ stmgedb dst!, {r3, r4, ip, lr}
++ ldmgedb src!, {r3, r4, ip, lr}
++ subges r2, r2, #32
++ stmdb dst!, {r3, r4, ip, lr}
++ bge 20b
++ PLD( cmn r2, #96 )
++ PLD( bge 21b )
++ PLD( add r2, r2, #96 )
++ tst r2, #31
++ ldmfd sp!, {r5 - r8}
++ ldmeqfd sp!, {r4, pc}
++
++ tst r2, #16
++22: ldmnedb src!, {r3, r4, ip, lr}
++ stmnedb dst!, {r3, r4, ip, lr}
++
++ tst r2, #8
++23: ldmnedb src!, {r3, r4}
++ stmnedb dst!, {r3, r4}
++
++ tst r2, #4
++24: ldrne r3, [src, #-4]!
++ strne r3, [dst, #-4]!
++
++25: ands r2, r2, #3
++ ldmeqfd sp!, {dst, r4, pc}
++
++ cmp r2, #2
++ ldrb r3, [src, #-1]
++ ldrgeb r4, [src, #-2]
++ ldrgtb ip, [src, #-3]
++ strb r3, [dst, #-1]
++ strgeb r4, [dst, #-2]
++ strgtb ip, [dst, #-3]
++ ldmfd sp!, {dst, r4, pc}
++
++26: cmp ip, #2
++ ldrb r3, [src, #-1]!
++ ldrgeb r4, [src, #-1]!
++ ldrgtb lr, [src, #-1]!
++ strb r3, [dst, #-1]!
++ strgeb r4, [dst, #-1]!
++ strgtb lr, [dst, #-1]!
++ subs r2, r2, ip
++ blt 25b
++ ands ip, src, #3
++ beq 19b
++
++27: bic src, src, #3
++ cmp ip, #2
++ ldr r3, [src]
++ beq 35f
++ blt 36f
++
++
++ .macro backward_copy_shift push pull
++
++ cmp r2, #12
++ PLD( pld [src, #-4] )
++ blt 33f
++ subs r2, r2, #28
++ stmfd sp!, {r5 - r9}
++ blt 31f
++
++ PLD( subs r2, r2, #96 )
++ PLD( pld [src, #-32] )
++ PLD( blt 30f )
++ PLD( pld [src, #-64] )
++
++ PLD( @ cache alignment )
++ PLD( ands ip, src, #31 )
++ PLD( pld [src, #-96] )
++ PLD( beq 29f )
++ PLD( cmp r2, ip )
++ PLD( pld [src, #-128] )
++ PLD( blt 29f )
++ PLD( sub r2, r2, ip )
++28: PLD( mov r4, r3, push #\push )
++ PLD( ldr r3, [src, #-4]! )
++ PLD( subs ip, ip, #4 )
++ PLD( orr r4, r4, r3, pull #\pull )
++ PLD( str r4, [dst, #-4]! )
++ PLD( bgt 28b )
++
++29: PLD( pld [src, #-128] )
++30: mov lr, r3, push #\push
++ ldmdb src!, {r3 - r9, ip}
++ subs r2, r2, #32
++ orr lr, lr, ip, pull #\pull
++ mov ip, ip, push #\push
++ orr ip, ip, r9, pull #\pull
++ mov r9, r9, push #\push
++ orr r9, r9, r8, pull #\pull
++ mov r8, r8, push #\push
++ orr r8, r8, r7, pull #\pull
++ mov r7, r7, push #\push
++ orr r7, r7, r6, pull #\pull
++ mov r6, r6, push #\push
++ orr r6, r6, r5, pull #\pull
++ mov r5, r5, push #\push
++ orr r5, r5, r4, pull #\pull
++ mov r4, r4, push #\push
++ orr r4, r4, r3, pull #\pull
++ stmdb dst!, {r4 - r9, ip, lr}
++ bge 29b
++ PLD( cmn r2, #96 )
++ PLD( bge 30b )
++ PLD( add r2, r2, #96 )
++ cmn r2, #16
++ blt 32f
++31: mov r7, r3, push #\push
++ ldmdb src!, {r3 - r6}
++ sub r2, r2, #16
++ orr r7, r7, r6, pull #\pull
++ mov r6, r6, push #\push
++ orr r6, r6, r5, pull #\pull
++ mov r5, r5, push #\push
++ orr r5, r5, r4, pull #\pull
++ mov r4, r4, push #\push
++ orr r4, r4, r3, pull #\pull
++ stmdb dst!, {r4 - r7}
++32: adds r2, r2, #28
++ ldmfd sp!, {r5 - r9}
++ blt 34f
++33: mov r4, r3, push #\push
++ ldr r3, [src, #-4]!
++ subs r2, r2, #4
++ orr r4, r4, r3, pull #\pull
++ str r4, [dst, #-4]!
++ bge 33b
++34:
++ .endm
++
++
++ backward_copy_shift push=8 pull=24
++ add src, src, #3
++ b 25b
++
++35: backward_copy_shift push=16 pull=16
++ add src, src, #2
++ b 25b
++
++36: backward_copy_shift push=24 pull=8
++ add src, src, #1
++ b 25b
++
++ .size bcopy, . - bcopy
++END(bcopy)
+
+--- /dev/null 2004-02-02 20:32:13.000000000 +0000
++++ sysdeps/arm/memcpy.S 2004-05-02 14:33:22.000000000 +0100
+@@ -0,0 +1,242 @@
++/*
++ * Optimized memcpy implementation for ARM processors
++ *
++ * Author: Nicolas Pitre
++ * Created: Dec 23, 2003
++ * Copyright: (C) MontaVista Software, Inc.
++ *
++ * This file is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU Lesser General Public
++ * License as published by the Free Software Foundation; either
++ * version 2.1 of the License, or (at your option) any later version.
++ *
++ * This file is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
++ * Lesser General Public License for more details.
++ */
++
++#include <sysdep.h>
++
++
++/*
++ * Endian independent macros for shifting bytes within registers.
++ */
++#ifndef __ARMEB__
++#define pull lsr
++#define push lsl
++#else
++#define pull lsl
++#define push lsr
++#endif
++
++/*
++ * Enable data preload for architectures that support it (ARMv5 and above)
++ */
++#if defined(__ARM_ARCH_5__) || \
++ defined(__ARM_ARCH_5T__) || \
++ defined(__ARM_ARCH_5TE__)
++#define PLD(code...) code
++#else
++#define PLD(code...)
++#endif
++
++
++/* char * memcpy (char *dst, const char *src) */
++
++ENTRY(memcpy)
++ subs r2, r2, #4
++ stmfd sp!, {r0, r4, lr}
++ blt 7f
++ ands ip, r0, #3
++ PLD( pld [r1, #0] )
++ bne 8f
++ ands ip, r1, #3
++ bne 9f
++
++1: subs r2, r2, #4
++ blt 6f
++ subs r2, r2, #8
++ blt 5f
++ subs r2, r2, #16
++ blt 4f
++
++ PLD( subs r2, r2, #65 )
++ stmfd sp!, {r5 - r8}
++ PLD( blt 3f )
++ PLD( pld [r1, #32] )
++
++ PLD( @ cache alignment )
++ PLD( ands ip, r1, #31 )
++ PLD( pld [r1, #64] )
++ PLD( beq 2f )
++ PLD( rsb ip, ip, #32 )
++ PLD( cmp r2, ip )
++ PLD( pld [r1, #96] )
++ PLD( blt 2f )
++ PLD( cmp ip, #16 )
++ PLD( sub r2, r2, ip )
++ PLD( ldmgeia r1!, {r3 - r6} )
++ PLD( stmgeia r0!, {r3 - r6} )
++ PLD( beq 2f )
++ PLD( and ip, ip, #15 )
++ PLD( cmp ip, #8 )
++ PLD( ldr r3, [r1], #4 )
++ PLD( ldrge r4, [r1], #4 )
++ PLD( ldrgt r5, [r1], #4 )
++ PLD( str r3, [r0], #4 )
++ PLD( strge r4, [r0], #4 )
++ PLD( strgt r5, [r0], #4 )
++
++2: PLD( pld [r1, #96] )
++3: ldmia r1!, {r3 - r8, ip, lr}
++ subs r2, r2, #32
++ stmia r0!, {r3 - r8, ip, lr}
++ bge 2b
++ PLD( cmn r2, #65 )
++ PLD( bge 3b )
++ PLD( add r2, r2, #65 )
++ tst r2, #31
++ ldmfd sp!, {r5 - r8}
++ ldmeqfd sp!, {r0, r4, pc}
++
++ tst r2, #16
++4: ldmneia r1!, {r3, r4, ip, lr}
++ stmneia r0!, {r3, r4, ip, lr}
++
++ tst r2, #8
++5: ldmneia r1!, {r3, r4}
++ stmneia r0!, {r3, r4}
++
++ tst r2, #4
++6: ldrne r3, [r1], #4
++ strne r3, [r0], #4
++
++7: ands r2, r2, #3
++ ldmeqfd sp!, {r0, r4, pc}
++
++ cmp r2, #2
++ ldrb r3, [r1], #1
++ ldrgeb r4, [r1], #1
++ ldrgtb ip, [r1]
++ strb r3, [r0], #1
++ strgeb r4, [r0], #1
++ strgtb ip, [r0]
++ ldmfd sp!, {r0, r4, pc}
++
++8: rsb ip, ip, #4
++ cmp ip, #2
++ ldrb r3, [r1], #1
++ ldrgeb r4, [r1], #1
++ ldrgtb lr, [r1], #1
++ strb r3, [r0], #1
++ strgeb r4, [r0], #1
++ strgtb lr, [r0], #1
++ subs r2, r2, ip
++ blt 7b
++ ands ip, r1, #3
++ beq 1b
++
++9: bic r1, r1, #3
++ cmp ip, #2
++ ldr lr, [r1], #4
++ beq 17f
++ bgt 18f
++
++
++ .macro forward_copy_shift pull push
++
++ cmp r2, #12
++ PLD( pld [r1, #0] )
++ blt 15f
++ subs r2, r2, #28
++ stmfd sp!, {r5 - r9}
++ blt 13f
++
++ PLD( subs r2, r2, #97 )
++ PLD( blt 12f )
++ PLD( pld [r1, #32] )
++
++ PLD( @ cache alignment )
++ PLD( rsb ip, r1, #36 )
++ PLD( pld [r1, #64] )
++ PLD( ands ip, ip, #31 )
++ PLD( pld [r1, #96] )
++ PLD( beq 11f )
++ PLD( cmp r2, ip )
++ PLD( pld [r1, #128] )
++ PLD( blt 11f )
++ PLD( sub r2, r2, ip )
++10: PLD( mov r3, lr, pull #\pull )
++ PLD( ldr lr, [r1], #4 )
++ PLD( subs ip, ip, #4 )
++ PLD( orr r3, r3, lr, push #\push )
++ PLD( str r3, [r0], #4 )
++ PLD( bgt 10b )
++
++11: PLD( pld [r1, #128] )
++12: mov r3, lr, pull #\pull
++ ldmia r1!, {r4 - r9, ip, lr}
++ subs r2, r2, #32
++ orr r3, r3, r4, push #\push
++ mov r4, r4, pull #\pull
++ orr r4, r4, r5, push #\push
++ mov r5, r5, pull #\pull
++ orr r5, r5, r6, push #\push
++ mov r6, r6, pull #\pull
++ orr r6, r6, r7, push #\push
++ mov r7, r7, pull #\pull
++ orr r7, r7, r8, push #\push
++ mov r8, r8, pull #\pull
++ orr r8, r8, r9, push #\push
++ mov r9, r9, pull #\pull
++ orr r9, r9, ip, push #\push
++ mov ip, ip, pull #\pull
++ orr ip, ip, lr, push #\push
++ stmia r0!, {r3 - r9, ip}
++ bge 11b
++ PLD( cmn r2, #97 )
++ PLD( bge 12b )
++ PLD( add r2, r2, #97 )
++ cmn r2, #16
++ blt 14f
++13: mov r3, lr, pull #\pull
++ ldmia r1!, {r4 - r6, lr}
++ sub r2, r2, #16
++ orr r3, r3, r4, push #\push
++ mov r4, r4, pull #\pull
++ orr r4, r4, r5, push #\push
++ mov r5, r5, pull #\pull
++ orr r5, r5, r6, push #\push
++ mov r6, r6, pull #\pull
++ orr r6, r6, lr, push #\push
++ stmia r0!, {r3 - r6}
++14: adds r2, r2, #28
++ ldmfd sp!, {r5 - r9}
++ blt 16f
++15: mov r3, lr, pull #\pull
++ ldr lr, [r1], #4
++ subs r2, r2, #4
++ orr r3, r3, lr, push #\push
++ str r3, [r0], #4
++ bge 15b
++16:
++ .endm
++
++
++ forward_copy_shift pull=8 push=24
++ sub r1, r1, #3
++ b 7b
++
++17: forward_copy_shift pull=16 push=16
++ sub r1, r1, #2
++ b 7b
++
++18: forward_copy_shift pull=24 push=8
++ sub r1, r1, #1
++ b 7b
++
++ .size memcpy, . - memcpy
++END(memcpy)
++libc_hidden_builtin_def (memcpy)
++
diff --git a/recipes/glibc/glibc-2.10.1/armv4t-interworking.patch b/recipes/glibc/glibc-2.10.1/armv4t-interworking.patch
new file mode 100644
index 0000000000..ce91ad6530
--- /dev/null
+++ b/recipes/glibc/glibc-2.10.1/armv4t-interworking.patch
@@ -0,0 +1,47 @@
+--- libc/ports/sysdeps/arm/memcpy.S~ 2006-10-31 17:07:54.000000000 +0000
++++ libc/ports/sysdeps/arm/memcpy.S 2008-10-24 11:09:34.000000000 +0100
+@@ -130,7 +130,12 @@
+ strcsb r4, [r0], #1
+ strcsb ip, [r0]
+
++#if defined (__ARM_ARCH_4T__) && defined(__THUMB_INTERWORK__)
++ ldmfd sp!, {r0, r4, lr}
++ bx lr
++#else
+ ldmfd sp!, {r0, r4, pc}
++#endif
+
+ 9: rsb ip, ip, #4
+ cmp ip, #2
+--- libc/ports/sysdeps/arm/memmove.S~ 2006-10-31 17:07:54.000000000 +0000
++++ libc/ports/sysdeps/arm/memmove.S 2008-10-24 11:09:44.000000000 +0100
+@@ -140,7 +140,12 @@
+ strneb r3, [r0, #-1]!
+ strcsb r4, [r0, #-1]!
+ strcsb ip, [r0, #-1]
++#if defined (__ARM_ARCH_4T__) && defined (__THUMB_INTERWORK__)
++ ldmfd sp!, {r0, r4, lr}
++ bx lr
++#else
+ ldmfd sp!, {r0, r4, pc}
++#endif
+
+ 9: cmp ip, #2
+ ldrgtb r3, [r1, #-1]!
+--- libc/ports/sysdeps/unix/sysv/linux/arm/clone.S~ 2005-11-16 19:03:42.000000000 +0000
++++ libc/ports/sysdeps/unix/sysv/linux/arm/clone.S 2008-10-24 11:11:05.000000000 +0100
+@@ -96,8 +96,14 @@
+ #endif
+ @ pick the function arg and call address off the stack and execute
+ ldr r0, [sp, #4]
++#if defined(__ARM_ARCH_V4T__) && defined(__THUMB_INTERWORK__)
++ ldr ip, [sp], #8
++ mov lr, pc
++ bx ip
++#else
+ mov lr, pc
+ ldr pc, [sp], #8
++#endif
+
+ @ and we are done, passing the return value through r0
+ b PLTJMP(_exit)
diff --git a/recipes/glibc/glibc-2.10.1/dl-cache-libcmp.patch b/recipes/glibc/glibc-2.10.1/dl-cache-libcmp.patch
new file mode 100644
index 0000000000..2fedfa6db0
--- /dev/null
+++ b/recipes/glibc/glibc-2.10.1/dl-cache-libcmp.patch
@@ -0,0 +1,10 @@
+--- glibc-2.4/elf/Versions.ark 2006-03-11 23:30:09.000000000 +0100
++++ glibc-2.4/elf/Versions 2006-03-11 23:31:44.000000000 +0100
+@@ -63,5 +63,7 @@
+ _dl_debug_state;
+ # Pointer protection.
+ __pointer_chk_guard;
++ # for ldconfig
++ _dl_cache_libcmp;
+ }
+ }
diff --git a/recipes/glibc/glibc-2.10.1/etc/ld.so.conf b/recipes/glibc/glibc-2.10.1/etc/ld.so.conf
new file mode 100644
index 0000000000..46e06d3f0a
--- /dev/null
+++ b/recipes/glibc/glibc-2.10.1/etc/ld.so.conf
@@ -0,0 +1,2 @@
+/usr/local/lib
+
diff --git a/recipes/glibc/glibc-2.10.1/fhs-linux-paths.patch b/recipes/glibc/glibc-2.10.1/fhs-linux-paths.patch
new file mode 100644
index 0000000000..1f32f6d7f2
--- /dev/null
+++ b/recipes/glibc/glibc-2.10.1/fhs-linux-paths.patch
@@ -0,0 +1,11 @@
+--- glibc-2.1.1/sysdeps/unix/sysv/linux/paths.h~ Thu May 27 13:16:33 1999
++++ glibc-2.1.1/sysdeps/unix/sysv/linux/paths.h Thu May 27 13:17:55 1999
+@@ -71,7 +71,7 @@
+ /* Provide trailing slash, since mostly used for building pathnames. */
+ #define _PATH_DEV "/dev/"
+ #define _PATH_TMP "/tmp/"
+-#define _PATH_VARDB "/var/db/"
++#define _PATH_VARDB "/var/lib/misc/"
+ #define _PATH_VARRUN "/var/run/"
+ #define _PATH_VARTMP "/var/tmp/"
+
diff --git a/recipes/glibc/glibc-2.10.1/generate-supported.mk b/recipes/glibc/glibc-2.10.1/generate-supported.mk
new file mode 100644
index 0000000000..d2a28c2dc6
--- /dev/null
+++ b/recipes/glibc/glibc-2.10.1/generate-supported.mk
@@ -0,0 +1,11 @@
+#!/usr/bin/make
+
+include $(IN)
+
+all:
+ rm -f $(OUT)
+ touch $(OUT)
+ for locale in $(SUPPORTED-LOCALES); do \
+ [ $$locale = true ] && continue; \
+ echo $$locale | sed 's,/, ,' >> $(OUT); \
+ done
diff --git a/recipes/glibc/glibc-2.10.1/generic-bits_select.h b/recipes/glibc/glibc-2.10.1/generic-bits_select.h
new file mode 100644
index 0000000000..47e7dedc30
--- /dev/null
+++ b/recipes/glibc/glibc-2.10.1/generic-bits_select.h
@@ -0,0 +1,35 @@
+/* Copyright (C) 1997, 1998, 2001 Free Software Foundation, Inc.
+ This file is part of the GNU C Library.
+
+ The GNU C Library is free software; you can redistribute it and/or
+ modify it under the terms of the GNU Lesser General Public
+ License as published by the Free Software Foundation; either
+ version 2.1 of the License, or (at your option) any later version.
+
+ The GNU C Library is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ Lesser General Public License for more details.
+
+ You should have received a copy of the GNU Lesser General Public
+ License along with the GNU C Library; if not, write to the Free
+ Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
+ 02111-1307 USA. */
+
+#ifndef _SYS_SELECT_H
+# error "Never use <bits/select.h> directly; include <sys/select.h> instead."
+#endif
+
+
+/* We don't use `memset' because this would require a prototype and
+ the array isn't too big. */
+#define __FD_ZERO(s) \
+ do { \
+ unsigned int __i; \
+ fd_set *__arr = (s); \
+ for (__i = 0; __i < sizeof (fd_set) / sizeof (__fd_mask); ++__i) \
+ __FDS_BITS (__arr)[__i] = 0; \
+ } while (0)
+#define __FD_SET(d, s) (__FDS