blob: 2936dffc17f37bd6a33e65c1f96f09ec2d724c0f (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
|
From 63de99ce613bbfce792ee46d14b324273e6a0d29 Mon Sep 17 00:00:00 2001
From: Steve Sakoman <steve@sakoman.com>
Date: Tue, 23 Mar 2010 09:04:50 -0700
Subject: [PATCH 14/37] OMAP3: board.c: don't attempt to set up second RAM bank, assume x-load has already done this
---
cpu/arm_cortexa8/omap3/board.c | 19 +++++++++----------
1 files changed, 9 insertions(+), 10 deletions(-)
diff --git a/cpu/arm_cortexa8/omap3/board.c b/cpu/arm_cortexa8/omap3/board.c
index 7b78fa4..0126152 100644
--- a/cpu/arm_cortexa8/omap3/board.c
+++ b/cpu/arm_cortexa8/omap3/board.c
@@ -232,6 +232,7 @@ void s_init(void)
per_clocks_enable();
+ /* FIXME: u-boot's sdrc setup is broken */
if (!in_sdram)
sdrc_init();
}
@@ -281,16 +282,14 @@ int dram_init(void)
{
DECLARE_GLOBAL_DATA_PTR;
unsigned int size0 = 0, size1 = 0;
-
- /*
- * If a second bank of DDR is attached to CS1 this is
- * where it can be started. Early init code will init
- * memory on CS0.
- */
- if ((sysinfo.mtype == DDR_COMBO) || (sysinfo.mtype == DDR_STACKED)) {
- do_sdrc_init(CS1, NOT_EARLY);
- make_cs1_contiguous();
- }
+ struct sdrc *sdrc_base = (struct sdrc *)OMAP34XX_SDRC_BASE;
+ struct sdrc_actim *sdrc_actim_base = (struct sdrc_actim *)SDRC_ACTIM_CTRL1_BASE;
+
+ /* x-load sets up the second bank but */
+ /* doesn't test to see if it is there */
+ /* do so now, disable if not present */
+ if (!mem_ok(CS1))
+ writel(0, &sdrc_base->cs[1].mcfg);
size0 = get_sdr_cs_size(CS0);
size1 = get_sdr_cs_size(CS1);
--
1.6.6.1
|
