summaryrefslogtreecommitdiff
path: root/recipes/linux/linux-openmoko-2.6.31/0003-Work-on-Glamo-core-for-DRM.patch
blob: 76223ed1368f9b5e0a7646155be7bd8fa3910b96 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
From 50c9919c9bc7d3e1db72dcbdd62d73efad409720 Mon Sep 17 00:00:00 2001
From: Thomas White <taw@bitwiz.org.uk>
Date: Tue, 17 Nov 2009 23:45:29 +0100
Subject: [PATCH 3/4] Work on Glamo-core for DRM

This adds modifications to the core of the Glamo driver to expose functionality
to support DRM and KMS.

Signed-off-by: Thomas White <taw@bitwiz.org.uk>
---
 drivers/mfd/glamo/glamo-core.c |   85 +++++++++++++++++++++++++++++++++++++---
 drivers/mfd/glamo/glamo-core.h |   45 ++++++++++++++++-----
 drivers/mfd/glamo/glamo-regs.h |   24 +++++++++++
 include/linux/mfd/glamo.h      |    7 +--
 4 files changed, 140 insertions(+), 21 deletions(-)

diff --git a/drivers/mfd/glamo/glamo-core.c b/drivers/mfd/glamo/glamo-core.c
index e0e3940..32aeff1 100644
--- a/drivers/mfd/glamo/glamo-core.c
+++ b/drivers/mfd/glamo/glamo-core.c
@@ -221,10 +221,31 @@ static struct resource glamo_fb_resources[] = {
 		.flags	= IORESOURCE_MEM,
 	}, {
 		.name	= "glamo-fb-mem",
-		.start	= GLAMO_OFFSET_FB,
-		.end	= GLAMO_OFFSET_FB + GLAMO_FB_SIZE - 1,
+		.start	= GLAMO_MEM_BASE + GLAMO_OFFSET_FB,
+		.end	= GLAMO_MEM_BASE + GLAMO_OFFSET_FB + GLAMO_FB_SIZE - 1,
 		.flags	= IORESOURCE_MEM,
-	},
+	}, {
+		.name	= "glamo-cmdq-regs",
+		.start  = GLAMO_REGOFS_CMDQUEUE,
+		.end    = GLAMO_REGOFS_RISC - 1,
+		.flags  = IORESOURCE_MEM,
+	}, {
+		.name	= "glamo-command-queue",
+		.start  = GLAMO_MEM_BASE + GLAMO_OFFSET_CMDQ,
+		.end    = GLAMO_MEM_BASE + GLAMO_OFFSET_CMDQ +
+			  GLAMO_CMDQ_SIZE - 1,
+		.flags  = IORESOURCE_MEM,
+	}, {
+		.name	= "glamo-2d-regs",
+		.start  = GLAMO_REGOFS_2D,
+		.end    = GLAMO_REGOFS_3D- 1,
+		.flags  = IORESOURCE_MEM,
+	}, {
+		.name	= "glamo-2d-irq",
+		.start	= GLAMO_IRQ_2D,
+		.end	= GLAMO_IRQ_2D,
+		.flags	= IORESOURCE_IRQ,
+	}
 };
 
 static struct resource glamo_mmc_resources[] = {
@@ -235,9 +256,9 @@ static struct resource glamo_mmc_resources[] = {
 		.flags	= IORESOURCE_MEM
 	}, {
 		.name	= "glamo-mmc-mem",
-		.start	= GLAMO_OFFSET_FB + GLAMO_FB_SIZE,
-		.end	= GLAMO_OFFSET_FB + GLAMO_FB_SIZE +
-				  GLAMO_MMC_BUFFER_SIZE - 1,
+		.start	= GLAMO_MEM_BASE + GLAMO_OFFSET_MMC,
+		.end	= GLAMO_MEM_BASE + GLAMO_OFFSET_MMC
+		                         + GLAMO_MMC_BUFFER_SIZE - 1,
 		.flags	= IORESOURCE_MEM
 	}, {
 		.start	= GLAMO_IRQ_MMC,
@@ -354,6 +375,24 @@ static void glamo_irq_demux_handler(unsigned int irq, struct irq_desc *desc)
 sysfs
 */
 
+void glamo_clear_irq(struct glamo_core *glamo, unsigned int irq)
+{
+	/* set interrupt source */
+	__reg_write(glamo, GLAMO_REG_IRQ_CLEAR, irq);
+}
+
+
+void glamo_enable_irq(struct glamo_core *glamo, unsigned int irq)
+{
+	u_int16_t tmp;
+
+	/* set bit in enable register */
+	tmp = __reg_read(glamo, GLAMO_REG_IRQ_ENABLE);
+	tmp |= irq;
+	__reg_write(glamo, GLAMO_REG_IRQ_ENABLE, tmp);
+}
+
+
 static ssize_t regs_write(struct device *dev, struct device_attribute *attr,
 				const char *buf, size_t count)
 {
@@ -579,6 +618,40 @@ int glamo_engine_disable(struct glamo_core *glamo, enum glamo_engine engine)
 }
 EXPORT_SYMBOL_GPL(glamo_engine_disable);
 
+
+static const u_int16_t engine_clock_regs[__NUM_GLAMO_ENGINES] = {
+	[GLAMO_ENGINE_LCD]	= GLAMO_REG_CLOCK_LCD,
+	[GLAMO_ENGINE_MMC]	= GLAMO_REG_CLOCK_MMC,
+	[GLAMO_ENGINE_ISP]	= GLAMO_REG_CLOCK_ISP,
+	[GLAMO_ENGINE_JPEG]	= GLAMO_REG_CLOCK_JPEG,
+	[GLAMO_ENGINE_3D]	= GLAMO_REG_CLOCK_3D,
+	[GLAMO_ENGINE_2D]	= GLAMO_REG_CLOCK_2D,
+	[GLAMO_ENGINE_MPEG_ENC] = GLAMO_REG_CLOCK_MPEG,
+	[GLAMO_ENGINE_MPEG_DEC] = GLAMO_REG_CLOCK_MPEG,
+};
+
+void glamo_engine_clkreg_set(struct glamo_core *glamo,
+			     enum glamo_engine engine,
+			     u_int16_t mask, u_int16_t val)
+{
+	reg_set_bit_mask(glamo, engine_clock_regs[engine], mask, val);
+}
+EXPORT_SYMBOL_GPL(glamo_engine_clkreg_set);
+
+u_int16_t glamo_engine_clkreg_get(struct glamo_core *glamo,
+				  enum glamo_engine engine)
+{
+	u_int16_t val;
+
+	spin_lock(&glamo->lock);
+	val = __reg_read(glamo, engine_clock_regs[engine]);
+	spin_unlock(&glamo->lock);
+
+	return val;
+}
+EXPORT_SYMBOL_GPL(glamo_engine_clkreg_get);
+
+
 int __glamo_engine_suspend(struct glamo_core *glamo, enum glamo_engine engine)
 {
 	int i;
diff --git a/drivers/mfd/glamo/glamo-core.h b/drivers/mfd/glamo/glamo-core.h
index e5b1a35..ea6caa3 100644
--- a/drivers/mfd/glamo/glamo-core.h
+++ b/drivers/mfd/glamo/glamo-core.h
@@ -3,18 +3,33 @@
 
 #include <linux/mfd/glamo.h>
 
+/* Amount of Glamo memory */
+#define GLAMO_INTERNAL_RAM_SIZE 0x800000
+
+/* Arbitrarily determined amount for the hardware cursor */
+#define GLAMO_CURSOR_SIZE (4096)
+#define GLAMO_MMC_BUFFER_SIZE (64 * 1024) /* 64k MMC buffer */
+#define GLAMO_CMDQ_SIZE (128 * 1024)    /* 128k ring buffer */
+/* Remaining memory will be used for 2D and 3D graphics */
+#define GLAMO_FB_SIZE (GLAMO_INTERNAL_RAM_SIZE     \
+			 - GLAMO_CURSOR_SIZE       \
+			 - GLAMO_MMC_BUFFER_SIZE   \
+			 - GLAMO_CMDQ_SIZE)
+/* A 640x480, 16bpp, double-buffered framebuffer */
+#if (GLAMO_FB_SIZE < (640 * 480 * 4))	/* == 0x12c000 */
+#error Not enough Glamo VRAM for framebuffer!
+#endif
+
 /* for the time being, we put the on-screen framebuffer into the lowest
  * VRAM space.  This should make the code easily compatible with the various
- * 2MB/4MB/8MB variants of the Smedia chips */
-#define GLAMO_OFFSET_VRAM	0x800000
-#define GLAMO_OFFSET_FB	(GLAMO_OFFSET_VRAM)
-
-/* we only allocate the minimum possible size for the framebuffer to make
- * sure we have sufficient memory for other functions of the chip */
-/*#define GLAMO_FB_SIZE	(640*480*4)	*//* == 0x12c000 */
-#define GLAMO_INTERNAL_RAM_SIZE 0x800000
-#define GLAMO_MMC_BUFFER_SIZE (64 * 1024)
-#define GLAMO_FB_SIZE	(GLAMO_INTERNAL_RAM_SIZE - GLAMO_MMC_BUFFER_SIZE)
+ * 2MB/4MB/8MB variants of the Smedia chips
+ * glamo-fb.c assumes FB comes first, followed by cursor, so DON'T MOVE THEM
+ * (see glamo_regs[] in glamo-fb.c for more information) */
+#define GLAMO_MEM_BASE 		(0x800000)
+#define GLAMO_OFFSET_FB		(0x000000)
+#define GLAMO_OFFSET_CURSOR	(GLAMO_OFFSET_FB + GLAMO_FB_SIZE)
+#define GLAMO_OFFSET_MMC	(GLAMO_OFFSET_CURSOR + GLAMO_CURSOR_SIZE)
+#define GLAMO_OFFSET_CMDQ	(GLAMO_OFFSET_MMC + GLAMO_MMC_BUFFER_SIZE)
 
 enum glamo_pll {
     GLAMO_PLL1,
@@ -57,4 +72,14 @@ void glamo_reg_read_batch(struct glamo_core *glamo, uint16_t reg,
 				uint16_t count, uint16_t *values);
 void glamo_reg_write_batch(struct glamo_core *glamo, uint16_t reg,
 				uint16_t count, uint16_t *values);
+void glamo_engine_clkreg_set(struct glamo_core *glamo,
+			     enum glamo_engine engine,
+			     u_int16_t mask, u_int16_t val);
+
+extern void glamo_clear_irq(struct glamo_core *glamo, unsigned int irq);
+extern void glamo_enable_irq(struct glamo_core *glamo, unsigned int irq);
+
+u_int16_t glamo_engine_clkreg_get(struct glamo_core *glamo,
+				  enum glamo_engine engine);
+
 #endif /* __GLAMO_CORE_H */
diff --git a/drivers/mfd/glamo/glamo-regs.h b/drivers/mfd/glamo/glamo-regs.h
index 59848e1..8b2fd47 100644
--- a/drivers/mfd/glamo/glamo-regs.h
+++ b/drivers/mfd/glamo/glamo-regs.h
@@ -627,4 +627,28 @@ enum glamo_core_revisions {
 	GLAMO_CORE_REV_A3		= 0x0003,
 };
 
+enum glamo_register_cq {
+	GLAMO_REG_CMDQ_BASE_ADDRL     = 0x00,
+	GLAMO_REG_CMDQ_BASE_ADDRH     = 0x02,
+	GLAMO_REG_CMDQ_LEN            = 0x04,
+	GLAMO_REG_CMDQ_WRITE_ADDRL    = 0x06,
+	GLAMO_REG_CMDQ_WRITE_ADDRH    = 0x08,
+	GLAMO_REG_CMDQ_FLIP           = 0x0a,
+	GLAMO_REG_CMDQ_CONTROL        = 0x0c,
+	GLAMO_REG_CMDQ_READ_ADDRL     = 0x0e,
+	GLAMO_REG_CMDQ_READ_ADDRH     = 0x10,
+	GLAMO_REG_CMDQ_STATUS         = 0x12,
+};
+
+#define REG_2D(x)		(GLAMO_REGOFS_2D+(x))
+
+enum glamo_register_2d {
+	GLAMO_REG_2D_DST_X		= REG_2D(0x0a),
+	GLAMO_REG_2D_COMMAND1           = REG_2D(0x3a),
+	GLAMO_REG_2D_STATUS		= REG_2D(0x42),
+	GLAMO_REG_2D_ID1		= REG_2D(0x44),
+	GLAMO_REG_2D_ID2		= REG_2D(0x46),
+	GLAMO_REG_2D_ID3		= REG_2D(0x48),
+};
+
 #endif /* _GLAMO_REGS_H */
diff --git a/include/linux/mfd/glamo.h b/include/linux/mfd/glamo.h
index 529d4f0..ea91a06 100644
--- a/include/linux/mfd/glamo.h
+++ b/include/linux/mfd/glamo.h
@@ -41,12 +41,9 @@ enum glamo_engine {
 	GLAMO_ENGINE_RISC = 11,
 	GLAMO_ENGINE_MICROP1_MPEG_ENC = 12,
 	GLAMO_ENGINE_MICROP1_MPEG_DEC = 13,
-#if 0
-	GLAMO_ENGINE_H264_DEC = 14,
-	GLAMO_ENGINE_RISC1 = 15,
-	GLAMO_ENGINE_SPI = 16,
-#endif
 	__NUM_GLAMO_ENGINES
 };
 
+#define GLAMO_ENGINE_ALL (__NUM_GLAMO_ENGINES)
+
 #endif
-- 
1.6.5.3