blob: c69e69c53e6154fdc7abb8ec8240ce75be638b61 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
|
diff -urN linux-2.6.13.1/include/asm-arm/arch-ixp4xx/nslu2.h nslu2-2.6.13.1/include/asm-arm/arch-ixp4xx/nslu2.h
--- linux-2.6.13.1/include/asm-arm/arch-ixp4xx/nslu2.h 1970-01-01 01:00:00.000000000 +0100
+++ nslu2-2.6.13.1/include/asm-arm/arch-ixp4xx/nslu2.h 2005-09-16 18:58:05.000000000 +0200
@@ -0,0 +1,43 @@
+/*
+ * include/asm-arm/arch-ixp4xx/nslu2.h
+ *
+ * NSLU2 platform specific definitions
+ *
+ * Author: Mark Rakes <mrakes AT mac.com>
+ * Maintainers: http://www.nslu2-linux.org
+ *
+ * based on ixdp425.h:
+ * Copyright 2004 (c) MontaVista, Software, Inc.
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2. This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+// GPIO 8 is used as the power input so is not free for use as a PCI IRQ
+// kas11 11-2-04
+
+#ifndef __ASM_ARCH_HARDWARE_H__
+#error "Do not include this directly, instead #include <asm/hardware.h>"
+#endif
+
+#define NSLU2_FLASH_BASE IXP4XX_EXP_BUS_CS0_BASE_PHYS
+#define NSLU2_FLASH_SIZE IXP4XX_EXP_BUS_CSX_REGION_SIZE
+
+#define NSLU2_SDA_PIN 7
+#define NSLU2_SCL_PIN 6
+
+/*
+ * NSLU2 PCI IRQs
+ */
+#define NSLU2_PCI_MAX_DEV 3
+#define NSLU2_PCI_IRQ_LINES 3
+
+
+/* PCI controller GPIO to IRQ pin mappings */
+#define NSLU2_PCI_INTA_PIN 11
+#define NSLU2_PCI_INTB_PIN 10
+#define NSLU2_PCI_INTC_PIN 9
+//#define NSLU2_PCI_INTD_PIN 8
+
+
|
