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3430 TRM 16.2.4.2 states:
From: Paul Walmsley <paul@pwsan.com>
Do not put the overflow value (0xFFFFFFFF) in the GPTi.TLDR register
because it can lead to undesired results.
3430 TRM 16.2.4.7 states:
In the non-PWM mode, GTPi.TLDR must be maintained at less than or
equal to 0xFFFF FFFE.
This patch contains some debugging code, and so is not yet intended for
merging into linux-omap.
---
arch/arm/mach-omap2/timer-gp.c | 17 ++++++++++++++++-
1 files changed, 16 insertions(+), 1 deletions(-)
diff --git a/arch/arm/mach-omap2/timer-gp.c b/arch/arm/mach-omap2/timer-gp.c
index 557603f..edc0c9e 100644
--- a/arch/arm/mach-omap2/timer-gp.c
+++ b/arch/arm/mach-omap2/timer-gp.c
@@ -59,6 +59,11 @@ static struct irqaction omap2_gp_timer_irq = {
static int omap2_gp_timer_set_next_event(unsigned long cycles,
struct clock_event_device *evt)
{
+ if (cycles == 0) {
+ pr_err("*** cycles = 0! fixing\n");
+ cycles = 1;
+ }
+
omap_dm_timer_set_load_start(gptimer, 0, 0xffffffff - cycles);
return 0;
@@ -76,6 +81,15 @@ static void omap2_gp_timer_set_mode(enum clock_event_mode mode,
period = clk_get_rate(omap_dm_timer_get_fclk(gptimer)) / HZ;
period -= 1;
+ /*
+ * Unlikely that this will ever be hit since periodic
+ * mode is rarely used
+ */
+ if (period == 0) {
+ pr_err("*** period = 0! fixing\n");
+ period = 1;
+ }
+
omap_dm_timer_set_load_start(gptimer, 1, 0xffffffff - period);
break;
case CLOCK_EVT_MODE_ONESHOT:
@@ -117,8 +131,9 @@ static void __init omap2_gp_clockevent_init(void)
clockevent_gpt.shift);
clockevent_gpt.max_delta_ns =
clockevent_delta2ns(0xffffffff, &clockevent_gpt);
+ /* per 3430 TRM table 16-11 */
clockevent_gpt.min_delta_ns =
- clockevent_delta2ns(1, &clockevent_gpt);
+ clockevent_delta2ns(2, &clockevent_gpt);
clockevent_gpt.cpumask = cpumask_of_cpu(0);
clockevents_register_device(&clockevent_gpt);
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