summaryrefslogtreecommitdiff
path: root/packages/librfid/files/011-rc632-define-fixes-followups.patch
blob: 633121d70e04d7b13fd3db41ec0cd5ffba02495b (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
Index: librfid/include/librfid/rfid_asic_rc632.h
===================================================================
--- librfid.orig/include/librfid/rfid_asic_rc632.h	2008-04-21 19:13:06.000000000 +0200
+++ librfid/include/librfid/rfid_asic_rc632.h	2008-12-22 23:56:49.000000000 +0100
@@ -60,7 +60,7 @@
 					     const struct iso15693_anticol_cmd *acf,
 					     unsigned int acf_len,
 					     struct iso15693_anticol_resp *resp,
-					     unsigned int *rx_len, char *bit_of_col);
+					     unsigned int *rx_len, unsigned char *bit_of_col);
 		} iso15693;
 		struct {
 			int (*setkey)(struct rfid_asic_handle *h,
@@ -143,8 +143,8 @@
 				DEBUGPC(", mTXsof"); \
             DEBUGPC("\n"); } while (0);
 
-#define DEBUGP_INTERRUPT_FLAG(foo) do {\
-                DEBUGP("interrupt_flag: 0x%0.2x",foo); \
+#define DEBUGP_INTERRUPT_FLAG(txt,foo) do {\
+                DEBUGP("%s: 0x%0.2x",txt,foo); \
                 if (foo & RC632_INT_HIALERT) \
                     DEBUGPC(", HiA"); \
                 if (foo & RC632_INT_LOALERT) \
Index: librfid/src/rfid_asic_rc632.c
===================================================================
--- librfid.orig/src/rfid_asic_rc632.c	2008-04-21 19:13:06.000000000 +0200
+++ librfid/src/rfid_asic_rc632.c	2008-12-22 23:57:21.000000000 +0100
@@ -240,7 +240,7 @@
 		u_int64_t timeout)
 {
 	int ret;
-	u_int8_t prescaler, divisor;
+	u_int8_t prescaler, divisor, irq;
 
 	timeout *= TIMER_RELAX_FACTOR;
 
@@ -255,7 +255,14 @@
 			      RC632_TMR_START_TX_END|RC632_TMR_STOP_RX_BEGIN);
 
 	/* clear timer irq bit */
-	ret = rc632_set_bits(handle, RC632_REG_INTERRUPT_RQ, RC632_IRQ_TIMER);
+	/*FIXME: is this right? maybe use write function and set bit 8 to zero and timer_bit to 1 to clear*/
+	//ret = rc632_set_bits(handle, RC632_REG_INTERRUPT_RQ, RC632_IRQ_TIMER);
+	//ret = rc632_reg_write(handle, RC632_REG_INTERRUPT_RQ, RC632_IRQ_TIMER);
+	ret = rc632_clear_irqs(handle, RC632_IRQ_TIMER);
+
+	/* enable timer IRQ */
+	//ret |= rc632_set_bits(handle, RC632_REG_INTERRUPT_EN, RC632_IRQ_TIMER);
+	ret |= rc632_reg_write(handle, RC632_REG_INTERRUPT_EN, RC632_IRQ_SET | RC632_IRQ_TIMER);
 
 	ret |= rc632_reg_write(handle, RC632_REG_TIMER_RELOAD, divisor);
 
@@ -268,6 +275,18 @@
 	int ret;
 	u_int8_t stat, irq, cmd;
 
+	ret = rc632_reg_read(handle, RC632_REG_INTERRUPT_EN, &irq);
+	if (ret < 0)
+		return ret;
+	DEBUGP_INTERRUPT_FLAG("irq_en",irq);
+
+	ret = rc632_reg_write(handle, RC632_REG_INTERRUPT_EN, RC632_IRQ_SET
+				| RC632_IRQ_TIMER
+				| RC632_IRQ_IDLE
+				| RC632_IRQ_RX );
+	if (ret < 0)
+		return ret;
+
 	while (1) {
 		rc632_reg_read(handle, RC632_REG_PRIMARY_STATUS, &stat);
 		DEBUGP_STATUS_FLAG(stat);
@@ -278,17 +297,20 @@
 			if (err & (RC632_ERR_FLAG_COL_ERR |
 				   RC632_ERR_FLAG_PARITY_ERR |
 				   RC632_ERR_FLAG_FRAMING_ERR |
-				   RC632_ERR_FLAG_CRC_ERR))
+				/*FIXME: why get we CRC errors in CL2 anticol at iso14443a operation with mifare UL? */
+				/*   RC632_ERR_FLAG_CRC_ERR | */
+				   0))
 				return -EIO;
 		}
 		if (stat & RC632_STAT_IRQ) {
 			ret = rc632_reg_read(handle, RC632_REG_INTERRUPT_RQ, &irq);
 			if (ret < 0)
 				return ret;
-			DEBUGP_INTERRUPT_FLAG(irq);
+			DEBUGP_INTERRUPT_FLAG("irq_rq",irq);
 
 			if (irq & RC632_IRQ_TIMER && !(irq & RC632_IRQ_RX)) {
 				DEBUGP("timer expired before RX!!\n");
+				rc632_clear_irqs(handle, RC632_IRQ_TIMER);
 				return -ETIMEDOUT;
 			}
 		}
@@ -297,8 +319,10 @@
 		if (ret < 0)
 			return ret;
 
-		if (cmd == 0)
+		if (cmd == 0){
+			rc632_clear_irqs(handle, RC632_IRQ_RX);
 			return 0;
+		}
 
 		/* poll every millisecond */
 		usleep(1000);
@@ -333,7 +357,7 @@
 			/* check if IRQ has occurred (IRQ flag set)*/
 			if (foo & RC632_STAT_IRQ) { 
 				ret = rc632_reg_read(handle, RC632_REG_INTERRUPT_RQ, &foo);
-				DEBUGP_INTERRUPT_FLAG(foo);
+				DEBUGP_INTERRUPT_FLAG("irq_rq",foo);
 				/* clear all interrupts */
 				rc632_clear_irqs(handle, 0xff);
 			}
@@ -1578,6 +1602,12 @@
 	}, {
 		.reg	= RC632_REG_CRC_PRESET_MSB,
 		.val	= 0xff,
+	/*}, {
+		.reg	= RC632_REG_INTERRUPT_EN,
+		.val	= RC632_INT_IDLE |
+			  RC632_INT_TIMER |
+			  RC632_INT_RX |
+			  RC632_INT_TX, */
 	}
 };
 
@@ -1732,7 +1762,7 @@
 			     const struct iso15693_anticol_cmd *acf,
 			     unsigned int acf_len,
 			     struct iso15693_anticol_resp *resp,
-			     unsigned int *rx_len, char *bit_of_col)
+			     unsigned int *rx_len, unsigned char *bit_of_col)
 {
 	u_int8_t error_flag, boc;
 	//u_int8_t rx_len;
@@ -1757,12 +1787,15 @@
 		return ret;
 	DEBUGP_ERROR_FLAG(error_flag);
 
+	//FIXME: check for framing and crc errors...
 	if (error_flag & RC632_ERR_FLAG_COL_ERR) {
 		/* retrieve bit of collission */
 		ret = rc632_reg_read(handle, RC632_REG_COLL_POS, &boc);
 		if (ret < 0)
 			return ret;
 		*bit_of_col = boc;
+	}else{
+		*bit_of_col = 0;
 	}
 
 	return 0;
Index: librfid/src/rfid_layer2_iso14443a.c
===================================================================
--- librfid.orig/src/rfid_layer2_iso14443a.c	2008-02-18 19:28:59.000000000 +0100
+++ librfid/src/rfid_layer2_iso14443a.c	2008-12-22 23:57:42.000000000 +0100
@@ -170,6 +170,7 @@
 	iso14443a_code_nvb_bits(&acf.nvb, 16);
 
 	ret = iso14443a_transceive_acf(handle, &acf, &bit_of_col);
+	DEBUGP("tran_acf->%d boc: %d\n",ret,bit_of_col);
 	if (ret < 0)
 		return ret;
 	
@@ -198,6 +199,7 @@
 		switch (acf.sel_code) {
 		case ISO14443A_AC_SEL_CODE_CL1:
 			/* cascading from CL1 to CL2 */
+			DEBUGP("cascading from CL1 to CL2\n");
 			if (acf.uid_bits[0] != 0x88) {
 				DEBUGP("Cascade bit set, but UID0 != 0x88\n");
 				return -1;
@@ -208,6 +210,7 @@
 			break;
 		case ISO14443A_AC_SEL_CODE_CL2:
 			/* cascading from CL2 to CL3 */
+			DEBUGP("cascading from CL2 to CL3\n");
 			memcpy(&handle->uid[3], &acf.uid_bits[1], 3);
 			acf.sel_code = ISO14443A_AC_SEL_CODE_CL3;
 			h->level = ISO14443A_LEVEL_CL3;