diff options
Diffstat (limited to 'recipes/at91bootstrap/at91bootstrap-2.13/mtcdp/sdram_slow_slew_rate.patch')
| -rw-r--r-- | recipes/at91bootstrap/at91bootstrap-2.13/mtcdp/sdram_slow_slew_rate.patch | 15 |
1 files changed, 15 insertions, 0 deletions
diff --git a/recipes/at91bootstrap/at91bootstrap-2.13/mtcdp/sdram_slow_slew_rate.patch b/recipes/at91bootstrap/at91bootstrap-2.13/mtcdp/sdram_slow_slew_rate.patch new file mode 100644 index 0000000000..a2cb3d4f7c --- /dev/null +++ b/recipes/at91bootstrap/at91bootstrap-2.13/mtcdp/sdram_slow_slew_rate.patch @@ -0,0 +1,15 @@ +Index: at91bootstrap-2.13/board/at91sam9g20ek/at91sam9g20ek.c +=================================================================== +--- at91bootstrap-2.13.orig/board/at91sam9g20ek/at91sam9g20ek.c 2011-10-31 13:20:49.207272783 -0500 ++++ at91bootstrap-2.13/board/at91sam9g20ek/at91sam9g20ek.c 2011-10-31 13:21:39.099957717 -0500 +@@ -116,8 +116,8 @@ + #endif /* CONFIG_VERBOSE */ + + #ifdef CONFIG_SDRAM +- /* Initialize the matrix (memory voltage = 3.3) */ +- writel((readl(AT91C_BASE_CCFG + CCFG_EBICSA)) | AT91C_EBI_CS1A_SDRAMC | (1<<16), AT91C_BASE_CCFG + CCFG_EBICSA); ++ /* Initialize the matrix (memory voltage = 3.3, slow slew rate) */ ++ writel((readl(AT91C_BASE_CCFG + CCFG_EBICSA)) | AT91C_EBI_CS1A_SDRAMC | (1<<16) | (1<<17), AT91C_BASE_CCFG + CCFG_EBICSA); + + /* Configure SDRAM Controller */ + sdram_init( AT91C_SDRAMC_NC_9 | |