diff options
| author | Kristoffer Ericson <kristoffer@boggieman.(none)> | 2009-11-20 20:16:47 +0100 |
|---|---|---|
| committer | Kristoffer Ericson <kristoffer@boggieman.(none)> | 2009-11-20 20:19:41 +0100 |
| commit | eb0bcf7a3b53575d94418cf1b513943e9dafcc2a (patch) | |
| tree | 18048d8e6121cc1d1bffa54cd39d25d3d0bd5d96 /recipes/linux/linux-2.6.31/ben-nanonote/050-nand.patch | |
| parent | b0d5120892a89e1b6c5f76204437665f2ae454e1 (diff) | |
Add preferred kernel for the ben-nanonote and merge that
into linux_2.6.31.bb. Patches and config are grabbed
from qi-hardware.com. fix_mips_vmlinux.lds.patch is
added to fix problem in 2.6.31.5 vanilla.
Diffstat (limited to 'recipes/linux/linux-2.6.31/ben-nanonote/050-nand.patch')
| -rw-r--r-- | recipes/linux/linux-2.6.31/ben-nanonote/050-nand.patch | 68 |
1 files changed, 68 insertions, 0 deletions
diff --git a/recipes/linux/linux-2.6.31/ben-nanonote/050-nand.patch b/recipes/linux/linux-2.6.31/ben-nanonote/050-nand.patch new file mode 100644 index 0000000000..da0d76caa5 --- /dev/null +++ b/recipes/linux/linux-2.6.31/ben-nanonote/050-nand.patch @@ -0,0 +1,68 @@ +--- a/drivers/mtd/nand/Kconfig ++++ b/drivers/mtd/nand/Kconfig +@@ -452,4 +452,10 @@ config MTD_NAND_SOCRATES + help + Enables support for NAND Flash chips wired onto Socrates board. + ++config MTD_NAND_JZ4740 ++ tristate "Support NAND Flash device on Jz4740 board" ++ depends on SOC_JZ4740 ++ help ++ Support NAND Flash device on Jz4740 board ++ + endif # MTD_NAND +--- a/drivers/mtd/nand/Makefile ++++ b/drivers/mtd/nand/Makefile +@@ -40,5 +40,6 @@ obj-$(CONFIG_MTD_NAND_SH_FLCTL) += sh_f + obj-$(CONFIG_MTD_NAND_MXC) += mxc_nand.o + obj-$(CONFIG_MTD_NAND_SOCRATES) += socrates_nand.o + obj-$(CONFIG_MTD_NAND_TXX9NDFMC) += txx9ndfmc.o ++obj-$(CONFIG_MTD_NAND_JZ4740) += jz4740_nand.o + + nand-objs := nand_base.o nand_bbt.o +--- a/drivers/mtd/nand/nand_base.c ++++ b/drivers/mtd/nand/nand_base.c +@@ -953,29 +953,22 @@ static int nand_read_page_hwecc(struct m + uint8_t *ecc_calc = chip->buffers->ecccalc; + uint8_t *ecc_code = chip->buffers->ecccode; + uint32_t *eccpos = chip->ecc.layout->eccpos; +- +- for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) { +- chip->ecc.hwctl(mtd, NAND_ECC_READ); +- chip->read_buf(mtd, p, eccsize); +- chip->ecc.calculate(mtd, p, &ecc_calc[i]); +- } +- chip->read_buf(mtd, chip->oob_poi, mtd->oobsize); ++ int stat; + + for (i = 0; i < chip->ecc.total; i++) + ecc_code[i] = chip->oob_poi[eccpos[i]]; + +- eccsteps = chip->ecc.steps; +- p = buf; +- +- for (i = 0 ; eccsteps; eccsteps--, i += eccbytes, p += eccsize) { +- int stat; + ++ for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) { ++ chip->ecc.hwctl(mtd, NAND_ECC_READ); ++ chip->read_buf(mtd, p, eccsize); + stat = chip->ecc.correct(mtd, p, &ecc_code[i], &ecc_calc[i]); + if (stat < 0) + mtd->ecc_stats.failed++; + else + mtd->ecc_stats.corrected += stat; + } ++ + return 0; + } + +@@ -1125,6 +1118,8 @@ static int nand_do_read_ops(struct mtd_i + bufpoi = aligned ? buf : chip->buffers->databuf; + + if (likely(sndcmd)) { ++ chip->cmdfunc(mtd, NAND_CMD_READOOB, 0x00, page); ++ chip->read_buf(mtd, chip->oob_poi, mtd->oobsize); + chip->cmdfunc(mtd, NAND_CMD_READ0, 0x00, page); + sndcmd = 0; + } |