gcc 4.2.1: Fix ICE that occurs with AVR32 gcc, especially when compiling OpenSSH.

Mainly just applies patch for gcc pr32889.
Since this ICE was first reported on the debian-gcc list
(see http://lists.debian.org/debian-gcc/2007/10/msg00306.html), and was
actually report for the HPPA, this patch might be desireable for other
architectures.  This patch showed in mainline gcc 4.2.3
See http://gcc.gnu.org/bugzilla/show_bug.cgi?id=32889 for mor info

4 files changed, 60 insertions, 2 deletions

diff --git a/packages/gcc/gcc-4.2.1.inc b/packages/gcc/gcc-4.2.1.inc
index 25b5937141..d48078384d 100644
--- a/packages/gcc/gcc-4.2.1.inc
+++ b/packages/gcc/gcc-4.2.1.inc
@@ -37,6 +37,7 @@ SRC_URI = "ftp://ftp.gnu.org/pub/gnu/gcc/gcc-${PV}/gcc-${PV}.tar.bz2 \
 "
 
 SRC_URI_avr32 = " http://ewi546.ewi.utwente.nl/tmp/avr32-gcc-4.2.1-atmel.1.0.3.tar.gz \
+        file://gcc-pr32889.patch;patch=1 \
         file://100-uclibc-conf.patch;patch=1 \
         file://103-uclibc-conf-noupstream.patch;patch=1 \
         file://200-uclibc-locale.patch;patch=1 \
diff --git a/packages/gcc/gcc-4.2.1/gcc-pr32889.patch b/packages/gcc/gcc-4.2.1/gcc-pr32889.patch
new file mode 100644
index 0000000000..3135f23907
--- /dev/null
+++ b/packages/gcc/gcc-4.2.1/gcc-pr32889.patch
@@ -0,0 +1,57 @@
+diff -urNp --exclude '*.swp' --exclude DEV-PHASE gcc-orig/gcc/reload.c gcc/gcc/reload.c
+--- gcc-orig/gcc/reload.c	2008-02-18 09:59:15.000000000 -0800
++++ gcc/gcc/reload.c	2008-02-18 10:05:47.000000000 -0800
+@@ -4574,7 +4574,7 @@ find_reloads_toplev (rtx x, int opnum, e
+ 	      x = mem;
+ 	      i = find_reloads_address (GET_MODE (x), &x, XEXP (x, 0), &XEXP (x, 0),
+ 					opnum, type, ind_levels, insn);
+-	      if (x != mem)
++	      if (!rtx_equal_p (x, mem))
+ 		push_reg_equiv_alt_mem (regno, x);
+ 	      if (address_reloaded)
+ 		*address_reloaded = i;
+@@ -4789,7 +4789,7 @@ find_reloads_address (enum machine_mode 
+ 		  find_reloads_address (GET_MODE (tem), &tem, XEXP (tem, 0),
+ 					&XEXP (tem, 0), opnum,
+ 					ADDR_TYPE (type), ind_levels, insn);
+-		  if (tem != orig)
++	          if (!rtx_equal_p (tem, orig))
+ 		    push_reg_equiv_alt_mem (regno, tem);
+ 		}
+ 	      /* We can avoid a reload if the register's equivalent memory
+@@ -5589,7 +5589,7 @@ find_reloads_address_1 (enum machine_mod
+ 				      RELOAD_OTHER,
+ 				      ind_levels, insn);
+ 
+-		if (tem != orig)
++	        if (!rtx_equal_p (tem, orig))
+ 		  push_reg_equiv_alt_mem (regno, tem);
+ 
+ 		/* Then reload the memory location into a base
+@@ -5656,7 +5656,7 @@ find_reloads_address_1 (enum machine_mod
+ 		  find_reloads_address (GET_MODE (tem), &tem, XEXP (tem, 0),
+ 					&XEXP (tem, 0), opnum, type,
+ 					ind_levels, insn);
+-		  if (tem != orig)
++	          if (!rtx_equal_p (tem, orig))
+ 		    push_reg_equiv_alt_mem (regno, tem);
+ 		  /* Put this inside a new increment-expression.  */
+ 		  x = gen_rtx_fmt_e (GET_CODE (x), GET_MODE (x), tem);
+@@ -5848,7 +5848,7 @@ find_reloads_address_1 (enum machine_mod
+ 		find_reloads_address (GET_MODE (x), &x, XEXP (x, 0),
+ 				      &XEXP (x, 0), opnum, ADDR_TYPE (type),
+ 				      ind_levels, insn);
+-		if (x != tem)
++	        if (!rtx_equal_p (x, tem))
+ 		  push_reg_equiv_alt_mem (regno, x);
+ 	      }
+ 	  }
+@@ -6076,7 +6076,7 @@ find_reloads_subreg_address (rtx x, int 
+ 					       XEXP (tem, 0), &XEXP (tem, 0),
+ 					       opnum, type, ind_levels, insn);
+ 	      /* ??? Do we need to handle nonzero offsets somehow?  */
+-	      if (!offset && tem != orig)
++	      if (!offset && !rtx_equal_p (tem, orig))
+ 		push_reg_equiv_alt_mem (regno, tem);
+ 
+ 	      /* For some processors an address may be valid in the
diff --git a/packages/gcc/gcc-cross_4.2.1.bb b/packages/gcc/gcc-cross_4.2.1.bb
index bb3b5ff9b1..d886d147b0 100644
--- a/packages/gcc/gcc-cross_4.2.1.bb
+++ b/packages/gcc/gcc-cross_4.2.1.bb
@@ -1,4 +1,4 @@
-PR = "r13"
+PR = "r14"
 
 require gcc-${PV}.inc
 require gcc-cross4.inc
diff --git a/packages/gcc/gcc_4.2.1.bb b/packages/gcc/gcc_4.2.1.bb
index 6da15d22b2..09a7cbbbc0 100644
--- a/packages/gcc/gcc_4.2.1.bb
+++ b/packages/gcc/gcc_4.2.1.bb
@@ -1,4 +1,4 @@
-PR = "r9"
+PR = "r10"
 
 require gcc-${PV}.inc
 require gcc-configure-target.inc