merge of '4f1c373d43a7c1b912b21780d67df8ccec796116'

     and 'd684223b6fbdf20a18d598446664827707b7dd91'

10 files changed, 1913 insertions, 203 deletions

diff --git a/packages/linux/linux-2.6.23/mpc8313e-rdb/defconfig b/packages/linux/linux-2.6.23/mpc8313e-rdb/defconfig
index 3cc17679c1..d842308fc9 100644
--- a/packages/linux/linux-2.6.23/mpc8313e-rdb/defconfig
+++ b/packages/linux/linux-2.6.23/mpc8313e-rdb/defconfig
@@ -687,7 +687,7 @@ CONFIG_EEPROM_93CX6=m
 # SCSI device support
 #
 # CONFIG_RAID_ATTRS is not set
-CONFIG_SCSI=y
+CONFIG_SCSI=m
 CONFIG_SCSI_DMA=y
 # CONFIG_SCSI_TGT is not set
 # CONFIG_SCSI_NETLINK is not set
@@ -696,11 +696,11 @@ CONFIG_SCSI_PROC_FS=y
 #
 # SCSI support type (disk, tape, CD-ROM)
 #
-CONFIG_BLK_DEV_SD=y
+CONFIG_BLK_DEV_SD=m
 # CONFIG_CHR_DEV_ST is not set
 # CONFIG_CHR_DEV_OSST is not set
 # CONFIG_BLK_DEV_SR is not set
-CONFIG_CHR_DEV_SG=y
+# CONFIG_CHR_DEV_SG is not set
 # CONFIG_CHR_DEV_SCH is not set
 
 #
@@ -715,45 +715,11 @@ CONFIG_SCSI_WAIT_SCAN=m
 #
 # SCSI Transports
 #
-CONFIG_SCSI_SPI_ATTRS=y
+CONFIG_SCSI_SPI_ATTRS=m
 # CONFIG_SCSI_FC_ATTRS is not set
 # CONFIG_SCSI_ISCSI_ATTRS is not set
 # CONFIG_SCSI_SAS_LIBSAS is not set
-CONFIG_SCSI_LOWLEVEL=y
-# CONFIG_ISCSI_TCP is not set
-# CONFIG_BLK_DEV_3W_XXXX_RAID is not set
-# CONFIG_SCSI_3W_9XXX is not set
-# CONFIG_SCSI_ACARD is not set
-# CONFIG_SCSI_AACRAID is not set
-# CONFIG_SCSI_AIC7XXX is not set
-# CONFIG_SCSI_AIC7XXX_OLD is not set
-# CONFIG_SCSI_AIC79XX is not set
-# CONFIG_SCSI_AIC94XX is not set
-# CONFIG_SCSI_DPT_I2O is not set
-# CONFIG_SCSI_ARCMSR is not set
-# CONFIG_MEGARAID_NEWGEN is not set
-# CONFIG_MEGARAID_LEGACY is not set
-# CONFIG_MEGARAID_SAS is not set
-# CONFIG_SCSI_HPTIOP is not set
-# CONFIG_SCSI_BUSLOGIC is not set
-# CONFIG_SCSI_DMX3191D is not set
-# CONFIG_SCSI_EATA is not set
-# CONFIG_SCSI_FUTURE_DOMAIN is not set
-# CONFIG_SCSI_GDTH is not set
-# CONFIG_SCSI_IPS is not set
-# CONFIG_SCSI_INITIO is not set
-# CONFIG_SCSI_INIA100 is not set
-# CONFIG_SCSI_STEX is not set
-# CONFIG_SCSI_SYM53C8XX_2 is not set
-# CONFIG_SCSI_QLOGIC_1280 is not set
-# CONFIG_SCSI_QLA_FC is not set
-# CONFIG_SCSI_QLA_ISCSI is not set
-# CONFIG_SCSI_LPFC is not set
-# CONFIG_SCSI_DC395x is not set
-# CONFIG_SCSI_DC390T is not set
-# CONFIG_SCSI_NSP32 is not set
-# CONFIG_SCSI_DEBUG is not set
-# CONFIG_SCSI_SRP is not set
+# CONFIG_SCSI_LOWLEVEL is not set
 # CONFIG_ATA is not set
 # CONFIG_MD is not set
 
@@ -796,34 +762,7 @@ CONFIG_CICADA_PHY=y
 # CONFIG_BROADCOM_PHY is not set
 # CONFIG_ICPLUS_PHY is not set
 # CONFIG_FIXED_PHY is not set
-CONFIG_NET_ETHERNET=y
-CONFIG_MII=y
-# CONFIG_HAPPYMEAL is not set
-# CONFIG_SUNGEM is not set
-# CONFIG_CASSINI is not set
-# CONFIG_NET_VENDOR_3COM is not set
-# CONFIG_NET_TULIP is not set
-# CONFIG_HP100 is not set
-CONFIG_NET_PCI=y
-# CONFIG_PCNET32 is not set
-# CONFIG_AMD8111_ETH is not set
-# CONFIG_ADAPTEC_STARFIRE is not set
-# CONFIG_B44 is not set
-# CONFIG_FORCEDETH is not set
-# CONFIG_DGRS is not set
-# CONFIG_EEPRO100 is not set
-CONFIG_E100=y
-# CONFIG_FEALNX is not set
-# CONFIG_NATSEMI is not set
-# CONFIG_NE2K_PCI is not set
-# CONFIG_8139CP is not set
-# CONFIG_8139TOO is not set
-# CONFIG_SIS900 is not set
-# CONFIG_EPIC100 is not set
-# CONFIG_SUNDANCE is not set
-# CONFIG_TLAN is not set
-# CONFIG_VIA_RHINE is not set
-# CONFIG_SC92031 is not set
+# CONFIG_NET_ETHERNET is not set
 CONFIG_NETDEV_1000=y
 # CONFIG_ACENIC is not set
 # CONFIG_DL2K is not set
@@ -843,14 +782,7 @@ CONFIG_GIANFAR=y
 CONFIG_GFAR_NAPI=y
 # CONFIG_QLA3XXX is not set
 # CONFIG_ATL1 is not set
-CONFIG_NETDEV_10000=y
-# CONFIG_CHELSIO_T1 is not set
-# CONFIG_CHELSIO_T3 is not set
-# CONFIG_IXGB is not set
-# CONFIG_S2IO is not set
-# CONFIG_MYRI10GE is not set
-# CONFIG_NETXEN_NIC is not set
-# CONFIG_MLX4_CORE is not set
+# CONFIG_NETDEV_10000 is not set
 # CONFIG_TR is not set
 
 #
@@ -1470,7 +1402,7 @@ CONFIG_USB_UHCI_HCD=y
 #
 # may also be needed; see USB_STORAGE Help for more information
 #
-CONFIG_USB_STORAGE=y
+CONFIG_USB_STORAGE=m
 # CONFIG_USB_STORAGE_DEBUG is not set
 # CONFIG_USB_STORAGE_DATAFAB is not set
 # CONFIG_USB_STORAGE_FREECOM is not set
diff --git a/packages/linux/linux-2.6.23/mpc8313e-rdb/mpc8313e-rdb-leds.patch b/packages/linux/linux-2.6.23/mpc8313e-rdb/mpc8313e-rdb-leds.patch
index be322be927..1116ce3998 100644
--- a/packages/linux/linux-2.6.23/mpc8313e-rdb/mpc8313e-rdb-leds.patch
+++ b/packages/linux/linux-2.6.23/mpc8313e-rdb/mpc8313e-rdb-leds.patch
@@ -20,8 +20,8 @@ diff -urN linux-2.6.23.orig/drivers/leds/leds-mpc8313e-rdb.c linux-2.6.23/driver
 @@ -0,0 +1,171 @@
 +/*
 + * drivers/leds/leds-mpc8313e-rdb.c
-+ * Copyright (C) 2007 Leon Woestenberg <leon@sidebranch.com>
 + * Copyright (C) 2007 Jeremy Laine <jeremy.laine@bolloretelecom.eu>
++ * Copyright (C) 2007 Leon Woestenberg <leon@sidebranch.com>
 + *
 + * This file is subject to the terms and conditions of the GNU General Public
 + * License.  See the file COPYING in the main directory of this archive for
@@ -99,21 +99,21 @@ diff -urN linux-2.6.23.orig/drivers/leds/leds-mpc8313e-rdb.c linux-2.6.23/driver
 +	},
 +	{
 +		.cdev = {
-+			.name		= "mpc8313:green",
++			.name		= "mpc8313:led5",
 +			.brightness_set	= mpc8313leds_set,
 +		},
 +		.bitmask	= 32,
 +	},
 +	{
 +		.cdev = {
-+			.name		= "mpc8313:yellow",
++			.name		= "mpc8313:led6",
 +			.brightness_set	= mpc8313leds_set,
 +		},
 +		.bitmask	= 64,
 +	},
 +	{
 +		.cdev = {
-+			.name		= "mpc8313:red",
++			.name		= "mpc8313:led7",
 +			.brightness_set	= mpc8313leds_set,
 +		},
 +		.bitmask	= 128,
@@ -186,7 +186,7 @@ diff -urN linux-2.6.23.orig/drivers/leds/leds-mpc8313e-rdb.c linux-2.6.23/driver
 +module_init(mpc8313leds_init);
 +module_exit(mpc8313leds_exit);
 +
-+MODULE_AUTHOR("Leon Woestenberg <leon@sidebranch.com>");
++MODULE_AUTHOR("Jeremy Laine <jeremy.laine@bolloretelecom.eu>");
 +MODULE_DESCRIPTION("MPC8313E-RDB LED driver");
 +MODULE_LICENSE("GPL");
 diff -urN linux-2.6.23.orig/drivers/leds/Makefile linux-2.6.23/drivers/leds/Makefile
diff --git a/packages/linux/linux-2.6.24/mpc8313e-rdb/defconfig b/packages/linux/linux-2.6.24/mpc8313e-rdb/defconfig
index 9c385704df..b87f62acbc 100644
--- a/packages/linux/linux-2.6.24/mpc8313e-rdb/defconfig
+++ b/packages/linux/linux-2.6.24/mpc8313e-rdb/defconfig
@@ -707,7 +707,7 @@ CONFIG_EEPROM_93CX6=m
 # SCSI device support
 #
 # CONFIG_RAID_ATTRS is not set
-CONFIG_SCSI=y
+CONFIG_SCSI=m
 CONFIG_SCSI_DMA=y
 # CONFIG_SCSI_TGT is not set
 # CONFIG_SCSI_NETLINK is not set
@@ -716,11 +716,11 @@ CONFIG_SCSI_PROC_FS=y
 #
 # SCSI support type (disk, tape, CD-ROM)
 #
-CONFIG_BLK_DEV_SD=y
+CONFIG_BLK_DEV_SD=m
 # CONFIG_CHR_DEV_ST is not set
 # CONFIG_CHR_DEV_OSST is not set
 # CONFIG_BLK_DEV_SR is not set
-CONFIG_CHR_DEV_SG=y
+# CONFIG_CHR_DEV_SG is not set
 # CONFIG_CHR_DEV_SCH is not set
 
 #
@@ -735,47 +735,11 @@ CONFIG_SCSI_WAIT_SCAN=m
 #
 # SCSI Transports
 #
-CONFIG_SCSI_SPI_ATTRS=y
+CONFIG_SCSI_SPI_ATTRS=m
 # CONFIG_SCSI_FC_ATTRS is not set
 # CONFIG_SCSI_ISCSI_ATTRS is not set
 # CONFIG_SCSI_SAS_LIBSAS is not set
 # CONFIG_SCSI_SRP_ATTRS is not set
-CONFIG_SCSI_LOWLEVEL=y
-# CONFIG_ISCSI_TCP is not set
-# CONFIG_BLK_DEV_3W_XXXX_RAID is not set
-# CONFIG_SCSI_3W_9XXX is not set
-# CONFIG_SCSI_ACARD is not set
-# CONFIG_SCSI_AACRAID is not set
-# CONFIG_SCSI_AIC7XXX is not set
-# CONFIG_SCSI_AIC7XXX_OLD is not set
-# CONFIG_SCSI_AIC79XX is not set
-# CONFIG_SCSI_AIC94XX is not set
-# CONFIG_SCSI_DPT_I2O is not set
-# CONFIG_SCSI_ADVANSYS is not set
-# CONFIG_SCSI_ARCMSR is not set
-# CONFIG_MEGARAID_NEWGEN is not set
-# CONFIG_MEGARAID_LEGACY is not set
-# CONFIG_MEGARAID_SAS is not set
-# CONFIG_SCSI_HPTIOP is not set
-# CONFIG_SCSI_BUSLOGIC is not set
-# CONFIG_SCSI_DMX3191D is not set
-# CONFIG_SCSI_EATA is not set
-# CONFIG_SCSI_FUTURE_DOMAIN is not set
-# CONFIG_SCSI_GDTH is not set
-# CONFIG_SCSI_IPS is not set
-# CONFIG_SCSI_INITIO is not set
-# CONFIG_SCSI_INIA100 is not set
-# CONFIG_SCSI_STEX is not set
-# CONFIG_SCSI_SYM53C8XX_2 is not set
-# CONFIG_SCSI_QLOGIC_1280 is not set
-# CONFIG_SCSI_QLA_FC is not set
-# CONFIG_SCSI_QLA_ISCSI is not set
-# CONFIG_SCSI_LPFC is not set
-# CONFIG_SCSI_DC395x is not set
-# CONFIG_SCSI_DC390T is not set
-# CONFIG_SCSI_NSP32 is not set
-# CONFIG_SCSI_DEBUG is not set
-# CONFIG_SCSI_SRP is not set
 # CONFIG_ATA is not set
 # CONFIG_MD is not set
 # CONFIG_FUSION is not set
@@ -813,25 +777,7 @@ CONFIG_CICADA_PHY=y
 # CONFIG_ICPLUS_PHY is not set
 # CONFIG_FIXED_PHY is not set
 # CONFIG_MDIO_BITBANG is not set
-CONFIG_NET_ETHERNET=y
-CONFIG_MII=y
-# CONFIG_HAPPYMEAL is not set
-# CONFIG_SUNGEM is not set
-# CONFIG_CASSINI is not set
-# CONFIG_NET_VENDOR_3COM is not set
-# CONFIG_NET_TULIP is not set
-# CONFIG_HP100 is not set
-# CONFIG_IBM_NEW_EMAC_ZMII is not set
-# CONFIG_IBM_NEW_EMAC_RGMII is not set
-# CONFIG_IBM_NEW_EMAC_TAH is not set
-# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
-CONFIG_NET_PCI=y
-# CONFIG_PCNET32 is not set
-# CONFIG_AMD8111_ETH is not set
-# CONFIG_ADAPTEC_STARFIRE is not set
-# CONFIG_B44 is not set
-# CONFIG_FORCEDETH is not set
-# CONFIG_EEPRO100 is not set
+# CONFIG_NET_ETHERNET is not set
 CONFIG_E100=y
 # CONFIG_FEALNX is not set
 # CONFIG_NATSEMI is not set
@@ -865,17 +811,7 @@ CONFIG_GIANFAR=y
 CONFIG_GFAR_NAPI=y
 # CONFIG_QLA3XXX is not set
 # CONFIG_ATL1 is not set
-CONFIG_NETDEV_10000=y
-# CONFIG_CHELSIO_T1 is not set
-# CONFIG_CHELSIO_T3 is not set
-# CONFIG_IXGBE is not set
-# CONFIG_IXGB is not set
-# CONFIG_S2IO is not set
-# CONFIG_MYRI10GE is not set
-# CONFIG_NETXEN_NIC is not set
-# CONFIG_NIU is not set
-# CONFIG_MLX4_CORE is not set
-# CONFIG_TEHUTI is not set
+# CONFIG_NETDEV_10000 is not set
 # CONFIG_TR is not set
 
 #
@@ -1509,7 +1445,7 @@ CONFIG_USB_UHCI_HCD=y
 #
 # may also be needed; see USB_STORAGE Help for more information
 #
-CONFIG_USB_STORAGE=y
+CONFIG_USB_STORAGE=m
 # CONFIG_USB_STORAGE_DEBUG is not set
 # CONFIG_USB_STORAGE_DATAFAB is not set
 # CONFIG_USB_STORAGE_FREECOM is not set
diff --git a/packages/linux/linux-2.6.24/mpc8313e-rdb/mpc8313e-rdb-leds.patch b/packages/linux/linux-2.6.24/mpc8313e-rdb/mpc8313e-rdb-leds.patch
index f1dca9d8e1..5336905a66 100644
--- a/packages/linux/linux-2.6.24/mpc8313e-rdb/mpc8313e-rdb-leds.patch
+++ b/packages/linux/linux-2.6.24/mpc8313e-rdb/mpc8313e-rdb-leds.patch
@@ -20,8 +20,8 @@ diff -urN linux-2.6.24.orig/drivers/leds/leds-mpc8313e-rdb.c linux-2.6.24/driver
 @@ -0,0 +1,171 @@
 +/*
 + * drivers/leds/leds-mpc8313e-rdb.c
-+ * Copyright (C) 2007 Leon Woestenberg <leon@sidebranch.com>
 + * Copyright (C) 2007 Jeremy Laine <jeremy.laine@bolloretelecom.eu>
++ * Copyright (C) 2007 Leon Woestenberg <leon@sidebranch.com>
 + *
 + * This file is subject to the terms and conditions of the GNU General Public
 + * License.  See the file COPYING in the main directory of this archive for
@@ -99,21 +99,21 @@ diff -urN linux-2.6.24.orig/drivers/leds/leds-mpc8313e-rdb.c linux-2.6.24/driver
 +	},
 +	{
 +		.cdev = {
-+			.name		= "mpc8313:green",
++			.name		= "mpc8313:led5",
 +			.brightness_set	= mpc8313leds_set,
 +		},
 +		.bitmask	= 32,
 +	},
 +	{
 +		.cdev = {
-+			.name		= "mpc8313:yellow",
++			.name		= "mpc8313:led6",
 +			.brightness_set	= mpc8313leds_set,
 +		},
 +		.bitmask	= 64,
 +	},
 +	{
 +		.cdev = {
-+			.name		= "mpc8313:red",
++			.name		= "mpc8313:led7",
 +			.brightness_set	= mpc8313leds_set,
 +		},
 +		.bitmask	= 128,
@@ -186,7 +186,7 @@ diff -urN linux-2.6.24.orig/drivers/leds/leds-mpc8313e-rdb.c linux-2.6.24/driver
 +module_init(mpc8313leds_init);
 +module_exit(mpc8313leds_exit);
 +
-+MODULE_AUTHOR("Leon Woestenberg <leon@sidebranch.com>");
++MODULE_AUTHOR("Jeremy Laine <jeremy.laine@bolloretelecom.eu>");
 +MODULE_DESCRIPTION("MPC8313E-RDB LED driver");
 +MODULE_LICENSE("GPL");
 diff -urN linux-2.6.24.orig/drivers/leds/Makefile linux-2.6.24/drivers/leds/Makefile
diff --git a/packages/linux/linux-2.6.24/mpc8313e-rdb/mpc831x-nand.patch b/packages/linux/linux-2.6.24/mpc8313e-rdb/mpc831x-nand.patch
new file mode 100644
index 0000000000..7c6502d232
--- /dev/null
+++ b/packages/linux/linux-2.6.24/mpc8313e-rdb/mpc831x-nand.patch
@@ -0,0 +1,1807 @@
+diff -urN linux-2.6.24.orig/arch/powerpc/boot/dts/mpc8313erdb.dts linux-2.6.24/arch/powerpc/boot/dts/mpc8313erdb.dts
+--- linux-2.6.24.orig/arch/powerpc/boot/dts/mpc8313erdb.dts	2008-01-24 23:58:37.000000000 +0100
++++ linux-2.6.24/arch/powerpc/boot/dts/mpc8313erdb.dts	2008-02-18 16:39:43.000000000 +0100
+@@ -36,6 +36,12 @@
+ 		device_type = "memory";
+ 		reg = <00000000 08000000>;	// 128MB at 0
+ 	};
++	
++	nand0 {
++		device_type = "nand";
++		compatible = "fsl-nand";
++		reg = <e2800000 00000200>;
++	};
+ 
+ 	soc8313@e0000000 {
+ 		#address-cells = <1>;
+@@ -177,6 +183,16 @@
+ 			reg = <700 100>;
+ 			device_type = "ipic";
+ 		};
++
++		elbc@5000 {
++			device_type = "elbc";
++			compatible = "fsl-elbc";
++			reg = <5000 1000>;
++			interrupts = <4d 8>;
++			interrupt-parent = < &ipic >;
++			allow-direct-device-sleep;
++		};
++
+ 	};
+ 
+ 	pci@e0008500 {
+diff -urN linux-2.6.24.orig/arch/powerpc/sysdev/fsl_soc.c linux-2.6.24/arch/powerpc/sysdev/fsl_soc.c
+--- linux-2.6.24.orig/arch/powerpc/sysdev/fsl_soc.c	2008-01-24 23:58:37.000000000 +0100
++++ linux-2.6.24/arch/powerpc/sysdev/fsl_soc.c	2008-02-18 17:07:57.000000000 +0100
+@@ -6,6 +6,12 @@
+  * 2006 (c) MontaVista Software, Inc.
+  * Vitaly Bordug <vbordug@ru.mvista.com>
+  *
++ * Change log:
++ * Copyright (C) 2006 Freescale Semiconductor, Inc.
++ * 2006: Lo Wilson (r43300@freescale.com)
++ *	     Added support for Enhanced Local Bus Controller
++ *	     Added support for USB UTMI mode on-chip PHY
++ *
+  * This program is free software; you can redistribute  it and/or modify it
+  * under  the terms of  the GNU General  Public License as published by the
+  * Free Software Foundation;  either version 2 of the  License, or (at your
+@@ -28,6 +34,8 @@
+ #include <linux/fsl_devices.h>
+ #include <linux/fs_enet_pd.h>
+ #include <linux/fs_uart_pd.h>
++#include <linux/mtd/nand.h>
++#include <linux/mtd/fsl_elbc.h>
+ 
+ #include <asm/system.h>
+ #include <asm/atomic.h>
+@@ -671,6 +679,75 @@
+ 
+ arch_initcall(fsl_usb_of_init);
+ 
++static int __init fsl_elbc_of_init(void)
++{
++	struct device_node *np;
++	unsigned int i;
++	struct platform_device *elbc_dev = NULL;
++	struct platform_device *nand_dev = NULL;
++	int ret;
++
++	/* find and register the enhanced local bus controller */
++	for (np = NULL, i = 0;
++	     (np = of_find_compatible_node(np, "elbc", "fsl-elbc")) != NULL;
++	     i++) {
++		struct resource r[2];
++
++		memset(&r, 0, sizeof(r));
++
++		ret = of_address_to_resource(np, 0, &r[0]);
++		if (ret)
++			goto err;
++
++		r[1].start = r[1].end = irq_of_parse_and_map(np, 0);
++		r[1].flags = IORESOURCE_IRQ;
++
++		elbc_dev =
++		    platform_device_register_simple("fsl-elbc", i, r, 2);
++		if (IS_ERR(elbc_dev)) {
++			ret = PTR_ERR(elbc_dev);
++			goto err;
++		}
++	}
++
++	/* find and register NAND memories if the eLBC was found */
++	for (np = NULL, i = 0;
++	     elbc_dev &&
++	     (np = of_find_compatible_node(np, "nand", "fsl-nand")) != NULL;
++	     i++) {
++		struct resource r;
++		struct platform_fsl_nand_chip chip_data;
++
++		memset(&r, 0, sizeof(r));
++		memset(&chip_data, 0, sizeof(chip_data));
++
++		ret = of_address_to_resource(np, 0, &r);
++		if (ret)
++			goto err;
++
++		nand_dev =
++		    platform_device_register_simple("fsl-nand", i, &r, 1);
++		if (IS_ERR(nand_dev)) {
++			ret = PTR_ERR(nand_dev);
++			goto err;
++		}
++
++		chip_data.name = of_get_property(np, "name", NULL);
++		chip_data.partitions_str = of_get_property(np, "partitions", NULL);
++
++		ret = platform_device_add_data(nand_dev, &chip_data,
++					sizeof(struct platform_fsl_nand_chip));
++		if (ret)
++			goto err;
++	}
++	return 0;
++
++err:
++	return ret;
++}
++
++arch_initcall(fsl_elbc_of_init);
++
+ #ifndef CONFIG_PPC_CPM_NEW_BINDING
+ #ifdef CONFIG_CPM2
+ 
+diff -urN linux-2.6.24.orig/drivers/mtd/nand/fsl_elbc.c linux-2.6.24/drivers/mtd/nand/fsl_elbc.c
+--- linux-2.6.24.orig/drivers/mtd/nand/fsl_elbc.c	1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.24/drivers/mtd/nand/fsl_elbc.c	2008-02-18 17:08:08.000000000 +0100
+@@ -0,0 +1,1324 @@
++/* linux/drivers/mtd/nand/fsl_elbc.c
++ *
++ * Copyright (C) 2006 Freescale Semiconductor, Inc.
++ *
++ * Freescale Enhanced Local Bus Controller NAND driver
++ *
++ * Author: Nick Spence <Nick.Spence@freescale.com>
++ * Maintainer: Tony Li <Tony.Li@freescale.com>
++ *
++ * Changelog:
++ *      2006-12 Tony Li <Tony.Li@freescale.com>
++ *              Adopt to MPC8313ERDB board
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License, or
++ * (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
++ * GNU General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
++*/
++
++//#ifdef CONFIG_MTD_NAND_DEBUG
++//#define DEBUG
++//#endif
++//#define DEBUG
++
++#include <linux/module.h>
++#include <linux/types.h>
++#include <linux/init.h>
++#include <linux/kernel.h>
++#include <linux/string.h>
++#include <linux/ioport.h>
++#include <linux/platform_device.h>
++#include <linux/delay.h>
++#include <linux/err.h>
++#include <linux/slab.h>
++#include <linux/interrupt.h>
++#include <linux/device.h>
++#include <linux/fsl_devices.h>
++
++#include <linux/mtd/mtd.h>
++#include <linux/mtd/nand.h>
++#include <linux/mtd/nand_ecc.h>
++#include <linux/mtd/partitions.h>
++
++#include <asm/io.h>
++#include <linux/mtd/fsl_elbc.h>
++
++#define PFX "fsl-elbc: "
++
++#undef CFG_FCM_DEBUG
++#define CFG_FCM_DEBUG_LVL 3
++#ifdef CFG_FCM_DEBUG
++static int fcm_debug_level = CFG_FCM_DEBUG_LVL;
++#define FCM_DEBUG(n, args...)			\
++	do {					\
++		if (n <= fcm_debug_level)	\
++			printk(args);		\
++	} while(0)
++#else /* CONFIG_FCM_DEBUG */
++#define FCM_DEBUG(n, args...) do { } while(0)
++#endif
++
++#define FCM_SIZE (8 * 1024)
++
++#define MAX_BANKS (8)
++
++/* use interrupt instead of busy waiting TODO */
++#define FCM_USE_INTERRUPT
++
++#define MIN(x, y)		((x < y) ? x : y)
++
++#define ERR_BYTE 0xFF	/* Value returned for read bytes when read failed */
++
++#define FCM_TIMEOUT_MSECS 100 /* Maximum number of mSecs to wait for FCM */
++
++
++
++struct fsl_elbc_ctrl;
++
++/* mtd information per set */
++
++struct fsl_elbc_mtd {
++	struct mtd_info		mtd;
++	struct nand_chip	chip;
++	struct platform_fsl_nand_chip pl_chip;
++	struct fsl_elbc_ctrl	*ctrl;
++
++	struct device		*device;
++//	int			nr_chips;       /* Number of chips in set    */
++//	int			nr_partitions;  /* Number of partitions or 0 */
++	char			*name;          /* Name of set (optional)    */
++	int			*nr_map;        /* Physical chip num (option)*/
++//	struct mtd_partition	*partitions;    /* MTD partition list (option*/
++//	struct nand_ecclayout   *ecclayout;
++	unsigned int		options;
++	struct resource		*area;
++	int			bank;	/* Chip select bank number           */
++	unsigned int		pbase;	/* Chip select base physical address */
++	unsigned int		vbase;	/* Chip select base virtual address  */
++	int			pgs;	/* NAND page size (0=512, 1=2048)    */
++	unsigned int		fmr;	/* FCM Flash Mode Register value     */
++};
++
++/* overview of the fsl elbc controller */
++
++struct fsl_elbc_ctrl {
++	struct nand_hw_control		controller;
++	struct fsl_elbc_mtd		*nmtd[MAX_BANKS];
++
++	/* device info */
++	atomic_t	childs_active;
++	struct device	*device;
++	struct resource	*area;
++	lbus83xx_t	*regs;
++	int		irq;
++	wait_queue_head_t irq_wait;
++	unsigned int	irq_status; /* status read from LTESR by irq handler */
++	u_char	       *addr;       /* Address of assigned FCM buffer        */
++	unsigned int	page;       /* Last page written to / read from      */
++	unsigned int	read_bytes; /* Number of bytes read during command   */
++	unsigned int	index;      /* Pointer to next byte to 'read'        */
++	unsigned int	status;     /* status read from LTESR after last op  */
++	int		oobbuf;     /* Pointer to OOB block                  */
++	unsigned int	mdr;        /* UPM/FCM Data Register value           */
++	unsigned int	use_mdr;    /* Non zero if the MDR is to be set      */
++};
++
++struct fsl_elbc_ctrl elbc_ctrl;
++
++/* These map to the positions used by the FCM hardware ECC generator */
++
++/* Small Page FLASH with FMR[ECCM] = 0 */
++static struct nand_ecclayout fsl_elbc_oob_sp_eccm0 = { /* TODO */
++//TODO	.useecc = MTD_NANDECC_AUTOPL_USR, /* MTD_NANDECC_PLACEONLY, */
++	.eccbytes = 3,
++	.eccpos = {6, 7, 8},
++	.oobfree = { {0, 5}, {9, 7} }
++};
++
++/* Small Page FLASH with FMR[ECCM] = 1 */
++static struct nand_ecclayout fsl_elbc_oob_sp_eccm1 = { /* TODO */
++//TODO	.useecc = MTD_NANDECC_AUTOPL_USR, /* MTD_NANDECC_PLACEONLY, */
++	.eccbytes = 3,
++	.eccpos = {8, 9, 10},
++	.oobfree = { {0, 5}, {6, 2}, {11, 5} }
++};
++
++/* Large Page FLASH with FMR[ECCM] = 0 */
++static struct nand_ecclayout fsl_elbc_oob_lp_eccm0 = {
++//TODO	.useecc = MTD_NANDECC_AUTOPL_USR, /* MTD_NANDECC_PLACEONLY, */
++	.eccbytes = 12,
++	.eccpos = {6, 7, 8, 22, 23, 24, 38, 39, 40, 54, 55, 56},
++	.oobfree = { {1, 5}, {9, 13}, {25, 13}, {41, 13}, {57, 7} }
++};
++
++/* Large Page FLASH with FMR[ECCM] = 1 */
++static struct nand_ecclayout fsl_elbc_oob_lp_eccm1 = {
++//TODO	.useecc = MTD_NANDECC_AUTOPL_USR, /* MTD_NANDECC_PLACEONLY, */
++	.eccbytes = 12,
++	.eccpos = {8, 9, 10, 24, 25, 26, 40, 41, 42, 56, 57, 58},
++	.oobfree = { {1, 7}, {11, 13}, {27, 13}, {43, 13}, {59, 5} }
++};
++
++/*=================================*/
++
++/*
++ * Set up the FCM hardware block and page address fields, and the fcm
++ * structure addr field to point to the correct FCM buffer in memory
++ */
++static void set_addr(struct mtd_info *mtd, int column, int page_addr, int oob)
++{
++	struct nand_chip *chip = mtd->priv;
++	struct fsl_elbc_mtd *nmtd = chip->priv;
++	struct fsl_elbc_ctrl *ctrl = nmtd->ctrl;
++	volatile lbus83xx_t *lbc = ctrl->regs;
++	int buf_num;
++
++	ctrl->page = page_addr;
++
++	lbc->fbar = page_addr >> (chip->phys_erase_shift - chip->page_shift);
++	if (nmtd->pgs) {
++		lbc->fpar = ((page_addr << FPAR_LP_PI_SHIFT) & FPAR_LP_PI) |
++			    ( oob ? FPAR_LP_MS : 0) |
++			      column;
++		buf_num = (page_addr & 1) << 2;
++	} else {
++		lbc->fpar = ((page_addr << FPAR_SP_PI_SHIFT) & FPAR_SP_PI) |
++			    ( oob ? FPAR_SP_MS : 0) |
++			      column;
++		buf_num = page_addr & 7;
++	}
++	ctrl->addr = (unsigned char*)(nmtd->vbase + (buf_num * 1024));
++
++	/* for OOB data point to the second half of the buffer */
++	if (oob) {
++		ctrl->addr += (nmtd->pgs ? 2048 : 512);
++	}
++	FCM_DEBUG(2,"set_addr: bank=%d, ctrl->addr=0x%p (0x%08x)\n", buf_num, ctrl->addr, nmtd->vbase);
++}
++
++/*
++ * execute FCM command and wait for it to complete
++ */
++static int fsl_elbc_run_command(struct mtd_info *mtd)
++{
++	struct nand_chip *chip = mtd->priv;
++	struct fsl_elbc_mtd *nmtd = chip->priv;
++	struct fsl_elbc_ctrl *ctrl = nmtd->ctrl;
++	volatile lbus83xx_t *lbc = ctrl->regs;
++	/* Setup the FMR[OP] to execute without write protection */
++	lbc->fmr = nmtd->fmr | 3;
++	if (ctrl->use_mdr)
++		lbc->mdr = ctrl->mdr;
++
++	FCM_DEBUG(5,"fsl_elbc_run_command: fmr= %08X fir= %08X fcr= %08X\n",
++		lbc->fmr, lbc->fir, lbc->fcr);
++	FCM_DEBUG(5,"fsl_elbc_run_command: fbar=%08X fpar=%08X fbcr=%08X bank=%d\n",
++		lbc->fbar, lbc->fpar, lbc->fbcr, nmtd->bank);
++
++	/* clear event registers */
++	lbc->lteatr = 0;
++	lbc->ltesr |= (LTESR_FCT | LTESR_PAR | LTESR_CC);
++
++	/* execute special operation */
++	lbc->lsor = nmtd->bank;
++
++	/* wait for FCM complete flag or timeout */
++/* TODO */
++#ifdef FCM_USE_INTERRUPT
++	ctrl->status = ctrl->irq_status = 0;
++	wait_event_timeout(ctrl->irq_wait, ctrl->irq_status, FCM_TIMEOUT_MSECS * HZ/1000);
++	ctrl->status = ctrl->irq_status;
++#else
++	{
++	unsigned long timeout;
++	unsigned long now;
++	now = jiffies_to_msecs(jiffies);
++	timeout = now + FCM_TIMEOUT_MSECS;
++	while (time_before(now, timeout)) {
++		ctrl->status = lbc->ltesr & (LTESR_FCT | LTESR_PAR | LTESR_CC);
++		if (ctrl->status)
++			break;
++		now = jiffies_to_msecs(jiffies);
++	}
++	}
++#endif
++
++	/* store mdr value in case it was needed */
++	if (ctrl->use_mdr)
++		ctrl->mdr = lbc->mdr;
++
++	ctrl->use_mdr = 0;
++
++	FCM_DEBUG(5,"fsl_elbc_run_command: stat=%08X mdr= %08X fmr= %08X\n",
++		ctrl->status, ctrl->mdr, lbc->fmr);
++
++	/* returns 0 on success otherwise non-zero) */
++	return (ctrl->status == LTESR_CC ? 0 : EFAULT);
++}
++
++/* cmdfunc send commands to the FCM */
++static void fsl_elbc_cmdfunc(struct mtd_info *mtd, unsigned command,
++			int column, int page_addr)
++{
++	struct nand_chip *chip = mtd->priv;
++	struct fsl_elbc_mtd *nmtd = chip->priv;
++	struct fsl_elbc_ctrl *ctrl = nmtd->ctrl;
++	volatile lbus83xx_t *lbc = ctrl->regs;
++
++	ctrl->use_mdr = 0;
++
++	/* clear the read buffer */
++	ctrl->read_bytes = 0;
++	if (command != NAND_CMD_PAGEPROG) {
++		ctrl->index = 0;
++		ctrl->oobbuf = -1;
++	}
++
++	switch (command) {
++	/* READ0 and READ1 read the entire buffer to use hardware ECC */
++	case NAND_CMD_READ1:
++		FCM_DEBUG(2,"fsl_elbc_cmdfunc: NAND_CMD_READ1, page_addr:"
++			    " 0x%x, column: 0x%x.\n", page_addr, column);
++		ctrl->index = column + 256;
++		goto read0;
++	case NAND_CMD_READ0:
++		FCM_DEBUG(2,"fsl_elbc_cmdfunc: NAND_CMD_READ0, page_addr:"
++			    " 0x%x, column: 0x%x.\n", page_addr, column);
++		ctrl->index = column;
++read0:
++		if (nmtd->pgs) {
++			lbc->fir = (FIR_OP_CW0 << FIR_OP0_SHIFT) |
++				   (FIR_OP_CA  << FIR_OP1_SHIFT) |
++				   (FIR_OP_PA  << FIR_OP2_SHIFT) |
++				   (FIR_OP_CW1 << FIR_OP3_SHIFT) |
++				   (FIR_OP_RBW << FIR_OP4_SHIFT);
++		} else {
++			lbc->fir = (FIR_OP_CW0 << FIR_OP0_SHIFT) |
++				   (FIR_OP_CA  << FIR_OP1_SHIFT) |
++				   (FIR_OP_PA  << FIR_OP2_SHIFT) |
++				   (FIR_OP_RBW << FIR_OP3_SHIFT);
++		}
++		lbc->fcr = (NAND_CMD_READ0     << FCR_CMD0_SHIFT) |
++			   (NAND_CMD_READSTART << FCR_CMD1_SHIFT);
++		lbc->fbcr = 0; /* read entire page to enable ECC */
++		set_addr(mtd, 0, page_addr, 0);
++		ctrl->read_bytes = mtd->writesize + mtd->oobsize;
++		goto write_cmd2;
++	/* READOOB read only the OOB becasue no ECC is performed */
++	case NAND_CMD_READOOB:
++		FCM_DEBUG(2,"fsl_elbc_cmdfunc: NAND_CMD_READOOB, page_addr:"
++			    " 0x%x, column: 0x%x.\n", page_addr, column);
++		if (nmtd->pgs) {
++			lbc->fir = (FIR_OP_CW0 << FIR_OP0_SHIFT) |
++				   (FIR_OP_CA  << FIR_OP1_SHIFT) |
++				   (FIR_OP_PA  << FIR_OP2_SHIFT) |
++				   (FIR_OP_CW1 << FIR_OP3_SHIFT) |
++				   (FIR_OP_RBW << FIR_OP4_SHIFT);
++			lbc->fcr = (NAND_CMD_READ0     << FCR_CMD0_SHIFT) |
++				   (NAND_CMD_READSTART << FCR_CMD1_SHIFT);
++		} else {
++			lbc->fir = (FIR_OP_CW0 << FIR_OP0_SHIFT) |
++				   (FIR_OP_CA  << FIR_OP1_SHIFT) |
++				   (FIR_OP_PA  << FIR_OP2_SHIFT) |
++				   (FIR_OP_RBW << FIR_OP3_SHIFT);
++			lbc->fcr = (NAND_CMD_READOOB << FCR_CMD0_SHIFT);
++		}
++		lbc->fbcr = mtd->oobsize - column;
++		set_addr(mtd, column, page_addr, 1);
++		ctrl->read_bytes = mtd->oobsize;
++		ctrl->index = column;
++		goto write_cmd2;
++	/* READID must read all 5 possible bytes while CEB is active */
++	case NAND_CMD_READID:
++		FCM_DEBUG(2,"fsl_elbc_cmdfunc: NAND_CMD_READID.\n");
++		lbc->fir = (FIR_OP_CW0 << FIR_OP0_SHIFT) |
++			   (FIR_OP_UA  << FIR_OP1_SHIFT) |
++			   (FIR_OP_RBW << FIR_OP2_SHIFT);
++		lbc->fcr = (NAND_CMD_READID << FCR_CMD0_SHIFT);
++		lbc->fbcr = 5; /* 5 bytes for manuf, device and exts */
++		ctrl->use_mdr = 1;
++		ctrl->mdr = 0;
++		goto write_cmd0;
++	/* ERASE1 stores the block and page address */
++	case NAND_CMD_ERASE1:
++		FCM_DEBUG(2,"fsl_elbc_cmdfunc: NAND_CMD_ERASE1, page_addr:"
++			    " 0x%x.\n", page_addr);
++		set_addr(mtd, 0, page_addr, 0);
++		goto end;
++	/* ERASE2 uses the block and page address from ERASE1 */
++	case NAND_CMD_ERASE2:
++		FCM_DEBUG(2,"fsl_elbc_cmdfunc: NAND_CMD_ERASE2.\n");
++		lbc->fir = (FIR_OP_CW0 << FIR_OP0_SHIFT) |
++			   (FIR_OP_PA  << FIR_OP1_SHIFT) |
++			   (FIR_OP_CM1 << FIR_OP2_SHIFT);
++		lbc->fcr = (NAND_CMD_ERASE1 << FCR_CMD0_SHIFT) |
++			   (NAND_CMD_ERASE2 << FCR_CMD1_SHIFT);
++		lbc->fbcr = 0;
++		goto write_cmd1;
++	/* SEQIN sets up the addr buffer and all registers except the length */
++	case NAND_CMD_SEQIN:
++		FCM_DEBUG(2,"fsl_elbc_cmdfunc: NAND_CMD_SEQIN/PAGE_PROG, page_addr:"
++			    " 0x%x, column: 0x%x.\n", page_addr, column);
++		if (column == 0) {
++			lbc->fbcr = 0; /* write entire page to enable ECC */
++		} else {
++			lbc->fbcr = 1; /* mark as partial page so no HW ECC */
++		}
++		if (nmtd->pgs) {
++			/* always use READ0 for large page devices */
++			lbc->fir = (FIR_OP_CW0 << FIR_OP0_SHIFT) |
++				   (FIR_OP_CA  << FIR_OP1_SHIFT) |
++				   (FIR_OP_PA  << FIR_OP2_SHIFT) |
++				   (FIR_OP_WB  << FIR_OP3_SHIFT) |
++				   (FIR_OP_CW1 << FIR_OP4_SHIFT);
++			lbc->fcr = (NAND_CMD_SEQIN << FCR_CMD0_SHIFT) |
++				   (NAND_CMD_PAGEPROG << FCR_CMD1_SHIFT);
++			set_addr(mtd, column, page_addr, 0);
++		} else {
++			lbc->fir = (FIR_OP_CW0 << FIR_OP0_SHIFT) |
++				   (FIR_OP_CM2 << FIR_OP1_SHIFT) |
++				   (FIR_OP_CA  << FIR_OP2_SHIFT) |
++				   (FIR_OP_PA  << FIR_OP3_SHIFT) |
++				   (FIR_OP_WB  << FIR_OP4_SHIFT) |
++				   (FIR_OP_CW1 << FIR_OP5_SHIFT);
++			if (column >= mtd->writesize) {
++				/* OOB area --> READOOB */
++				column -= mtd->writesize;
++				lbc->fcr = (NAND_CMD_READOOB << FCR_CMD0_SHIFT)
++					 | (NAND_CMD_PAGEPROG<< FCR_CMD1_SHIFT)
++					 | (NAND_CMD_SEQIN << FCR_CMD2_SHIFT);
++				set_addr(mtd, column, page_addr, 1);
++			} else if (column < 256) {
++				/* First 256 bytes --> READ0 */
++				lbc->fcr = (NAND_CMD_READ0 << FCR_CMD0_SHIFT)
++					 | (NAND_CMD_PAGEPROG<< FCR_CMD1_SHIFT)
++					 | (NAND_CMD_SEQIN << FCR_CMD2_SHIFT);
++				set_addr(mtd, column, page_addr, 0);
++			} else {
++				/* Second 256 bytes --> READ1 */
++				column -= 256;
++				lbc->fcr = (NAND_CMD_READ1 << FCR_CMD0_SHIFT)
++					 | (NAND_CMD_PAGEPROG<< FCR_CMD1_SHIFT)
++					 | (NAND_CMD_SEQIN << FCR_CMD2_SHIFT);
++				set_addr(mtd, column, page_addr, 0);
++			}
++		}
++		goto end;
++	/* PAGEPROG reuses all of the setup from SEQIN and adds the length */
++	case NAND_CMD_PAGEPROG:
++		FCM_DEBUG(2,"fsl_elbc_cmdfunc: NAND_CMD_PAGEPROG"
++			    " writing %d bytes.\n",ctrl->index);
++		/* if the write did not start at 0 or is not a full page */
++		/* then set the exact length, otherwise use a full page  */
++		/* write so the HW generates the ECC. */
++		if (lbc->fbcr ||
++		   (ctrl->index != (mtd->writesize + mtd->oobsize)))
++			lbc->fbcr = ctrl->index;
++		goto write_cmd2;
++	/* CMD_STATUS must read the status byte while CEB is active */
++	/* Note - it does not wait for the ready line */
++	case NAND_CMD_STATUS:
++		FCM_DEBUG(2,"fsl_elbc_cmdfunc: NAND_CMD_STATUS.\n");
++		lbc->fir = (FIR_OP_CM0 << FIR_OP0_SHIFT) |
++			   (FIR_OP_RBW << FIR_OP1_SHIFT);
++		lbc->fcr = (NAND_CMD_STATUS << FCR_CMD0_SHIFT);
++		lbc->fbcr = 1;
++		goto write_cmd0;
++	/* RESET without waiting for the ready line */
++	case NAND_CMD_RESET: