diff options
| author | Paul Sokolovsky <pmiscml@gmail.com> | 2007-04-30 19:02:38 +0000 |
|---|---|---|
| committer | Paul Sokolovsky <pmiscml@gmail.com> | 2007-04-30 19:02:38 +0000 |
| commit | 14d8757a50c592986ccc236b6dcd5bf4b61f894b (patch) | |
| tree | a96f0e21ef3164146e3f89a22e309f5482869d93 /packages/linux | |
| parent | 85e7e5d440d9090d1e5cb1f384655767971445ce (diff) | |
| parent | f1d57e9f9f701f19e1ca2987571d059888bd3035 (diff) | |
merge of '3744a34d57095e84a89851df9f2cabc7b5a0dd0d'
and 'bdbd61d03008d901627ae17450554a101ca42e5b'
Diffstat (limited to 'packages/linux')
74 files changed, 41891 insertions, 228 deletions
diff --git a/packages/linux/compulab-pxa270_2.6.16.bb b/packages/linux/compulab-pxa270_2.6.16.bb index 6e09281546..6064224d80 100644 --- a/packages/linux/compulab-pxa270_2.6.16.bb +++ b/packages/linux/compulab-pxa270_2.6.16.bb @@ -1,7 +1,7 @@ SECTION = "kernel" DESCRIPTION = "Linux kernel for the Compulab PXA270 system" LICENSE = "GPL" -PR = "r3" +PR = "r5" # Note, the compulab package contains a binary NAND driver that is not # EABI compatible @@ -9,7 +9,7 @@ PR = "r3" SRC_URI = "${KERNELORG_MIRROR}/pub/linux/kernel/v2.6/linux-2.6.16.tar.bz2 \ file://linux-2.6.16.patch;patch=1 \ file://defconfig \ - http://www.compulab.co.il/x270/download/x270-linux-drv.zip;md5sum=ac57536294406223e527367af5aefce2" + http://www.compulab.co.il/x270/download/x270-linux-drv.zip;md5sum=6b8c1bda1dd066674b7a9f614976a715" S = "${WORKDIR}/linux-2.6.16" @@ -32,25 +32,38 @@ do_deploy() { KNAME=${DEPLOY_DIR_IMAGE}/${KERNEL_IMAGETYPE}-${MACHINE}.bin install -d ${DEPLOY_DIR_IMAGE} install -m 0644 arch/${ARCH}/boot/${KERNEL_IMAGETYPE} ${KNAME} - # Create an image file that has the size prepended (used by cm-x270 BL) - # The following can only be done on a little endian machine - # the following does not work on all computers as it requires a recent - # version of coreutils (>= 6.0). We will eventually replace the following - # with python code. - #size=$(stat --printf=%s ${KNAME}) - #size_=$(printf '\%03o'\ - #$((size & 0x000000FF))\ - #$((size>>8 & 0x000000FF))\ - #$((size>>16 & 0x000000FF))\ - #$((size>>24 & 0x000000FF))) - #size_=${size_}'\c' - #echo -e $size_ > ${DEPLOY_DIR_IMAGE}/${KERNEL_IMAGETYPE}-${MACHINE}-${DATETIME}.img - #cat ${KNAME} >> ${DEPLOY_DIR_IMAGE}/${KERNEL_IMAGETYPE}-${MACHINE}-${DATETIME}.img } +python do_compulab_image() { + import os + import os.path + import struct + + deploy_dir = bb.data.getVar('DEPLOY_DIR_IMAGE', d, 1) + kernel_name = os.path.join(deploy_dir, bb.data.expand('${KERNEL_IMAGETYPE}-${MACHINE}.bin', d)) + + img_file = os.path.join(deploy_dir, 'zImage-compulab-pxa270.img') + + fo = open(img_file, 'wb') + + image_data = open(kernel_name, 'rb').read() + + # first write size into first 4 bytes + size_s = struct.pack('i', len(image_data)) + + # truncate size if we are running on a 64-bit host + size_s = size_s[:4] + + fo.write(size_s) + fo.write(image_data) + fo.close() +} + + do_deploy[dirs] = "${S}" addtask deploy before do_build after do_compile +addtask compulab_image before do_build after do_deploy COMPATIBLE_MACHINE = "compulab-pxa270" diff --git a/packages/linux/linux-titan-sh4-2.6.17/.mtn2git_empty b/packages/linux/ixp4xx-kernel/2.6.21/.mtn2git_empty index e69de29bb2..e69de29bb2 100644 --- a/packages/linux/linux-titan-sh4-2.6.17/.mtn2git_empty +++ b/packages/linux/ixp4xx-kernel/2.6.21/.mtn2git_empty diff --git a/packages/linux/ixp4xx-kernel/2.6.21/defconfig b/packages/linux/ixp4xx-kernel/2.6.21/defconfig new file mode 100644 index 0000000000..a0242bf951 --- /dev/null +++ b/packages/linux/ixp4xx-kernel/2.6.21/defconfig @@ -0,0 +1,2063 @@ +# +# Automatically generated make config: don't edit +# Linux kernel version: 2.6.21-rc4 +# Tue Mar 20 01:42:04 2007 +# +CONFIG_ARM=y +CONFIG_SYS_SUPPORTS_APM_EMULATION=y +# CONFIG_GENERIC_GPIO is not set +CONFIG_GENERIC_TIME=y +CONFIG_MMU=y +# CONFIG_NO_IOPORT is not set +CONFIG_GENERIC_HARDIRQS=y +CONFIG_TRACE_IRQFLAGS_SUPPORT=y +CONFIG_HARDIRQS_SW_RESEND=y +CONFIG_GENERIC_IRQ_PROBE=y +CONFIG_RWSEM_GENERIC_SPINLOCK=y +# CONFIG_ARCH_HAS_ILOG2_U32 is not set +# CONFIG_ARCH_HAS_ILOG2_U64 is not set +CONFIG_GENERIC_HWEIGHT=y +CONFIG_GENERIC_CALIBRATE_DELAY=y +CONFIG_ZONE_DMA=y +CONFIG_VECTORS_BASE=0xffff0000 +CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" + +# +# Code maturity level options +# +CONFIG_EXPERIMENTAL=y +CONFIG_BROKEN_ON_SMP=y +CONFIG_LOCK_KERNEL=y +CONFIG_INIT_ENV_ARG_LIMIT=32 + +# +# General setup +# +CONFIG_LOCALVERSION="" +# CONFIG_LOCALVERSION_AUTO is not set +CONFIG_SWAP=y +CONFIG_SYSVIPC=y +# CONFIG_IPC_NS is not set +CONFIG_SYSVIPC_SYSCTL=y +# CONFIG_POSIX_MQUEUE is not set +# CONFIG_BSD_PROCESS_ACCT is not set +# CONFIG_TASKSTATS is not set +# CONFIG_UTS_NS is not set +# CONFIG_AUDIT is not set +CONFIG_IKCONFIG=m +CONFIG_IKCONFIG_PROC=y +CONFIG_SYSFS_DEPRECATED=y +# CONFIG_RELAY is not set +# CONFIG_BLK_DEV_INITRD is not set +CONFIG_CC_OPTIMIZE_FOR_SIZE=y +CONFIG_SYSCTL=y +CONFIG_EMBEDDED=y +CONFIG_UID16=y +# CONFIG_SYSCTL_SYSCALL is not set +# CONFIG_KALLSYMS is not set +CONFIG_HOTPLUG=y +CONFIG_PRINTK=y +CONFIG_BUG=y +CONFIG_ELF_CORE=y +CONFIG_BASE_FULL=y +CONFIG_FUTEX=y +CONFIG_EPOLL=y +CONFIG_SHMEM=y +CONFIG_SLAB=y +# CONFIG_VM_EVENT_COUNTERS is not set +CONFIG_RT_MUTEXES=y +# CONFIG_TINY_SHMEM is not set +CONFIG_BASE_SMALL=0 +# CONFIG_SLOB is not set + +# +# Loadable module support +# +CONFIG_MODULES=y +CONFIG_MODULE_UNLOAD=y +# CONFIG_MODULE_FORCE_UNLOAD is not set +CONFIG_MODVERSIONS=y +# CONFIG_MODULE_SRCVERSION_ALL is not set +CONFIG_KMOD=y + +# +# Block layer +# +CONFIG_BLOCK=y +# CONFIG_LBD is not set +# CONFIG_BLK_DEV_IO_TRACE is not set +# CONFIG_LSF is not set + +# +# IO Schedulers +# +CONFIG_IOSCHED_NOOP=y +# CONFIG_IOSCHED_AS is not set +CONFIG_IOSCHED_DEADLINE=y +# CONFIG_IOSCHED_CFQ is not set +# CONFIG_DEFAULT_AS is not set +CONFIG_DEFAULT_DEADLINE=y +# CONFIG_DEFAULT_CFQ is not set +# CONFIG_DEFAULT_NOOP is not set +CONFIG_DEFAULT_IOSCHED="deadline" + +# +# System Type +# +# CONFIG_ARCH_AAEC2000 is not set +# CONFIG_ARCH_INTEGRATOR is not set +# CONFIG_ARCH_REALVIEW is not set +# CONFIG_ARCH_VERSATILE is not set +# CONFIG_ARCH_AT91 is not set +# CONFIG_ARCH_CLPS7500 is not set +# CONFIG_ARCH_CLPS711X is not set +# CONFIG_ARCH_CO285 is not set +# CONFIG_ARCH_EBSA110 is not set +# CONFIG_ARCH_EP93XX is not set +# CONFIG_ARCH_FOOTBRIDGE is not set +# CONFIG_ARCH_NETX is not set +# CONFIG_ARCH_H720X is not set +# CONFIG_ARCH_IMX is not set +# CONFIG_ARCH_IOP32X is not set +# CONFIG_ARCH_IOP33X is not set +# CONFIG_ARCH_IOP13XX is not set +CONFIG_ARCH_IXP4XX=y +# CONFIG_ARCH_IXP2000 is not set +# CONFIG_ARCH_IXP23XX is not set +# CONFIG_ARCH_L7200 is not set +# CONFIG_ARCH_NS9XXX is not set +# CONFIG_ARCH_PNX4008 is not set +# CONFIG_ARCH_PXA is not set +# CONFIG_ARCH_RPC is not set +# CONFIG_ARCH_SA1100 is not set +# CONFIG_ARCH_S3C2410 is not set +# CONFIG_ARCH_SHARK is not set +# CONFIG_ARCH_LH7A40X is not set +# CONFIG_ARCH_OMAP is not set +CONFIG_ARCH_SUPPORTS_BIG_ENDIAN=y + +# +# Intel IXP4xx Implementation Options +# + +# +# IXP4xx Platforms +# +CONFIG_MACH_NSLU2=y +CONFIG_MACH_AVILA=y +CONFIG_MACH_LOFT=y +# CONFIG_ARCH_ADI_COYOTE is not set +CONFIG_ARCH_IXDP425=y +# CONFIG_MACH_IXDPG425 is not set +# CONFIG_MACH_IXDP465 is not set +CONFIG_ARCH_IXCDP1100=y +# CONFIG_ARCH_PRPMC1100 is not set +CONFIG_MACH_NAS100D=y +CONFIG_MACH_DSMG600=y +CONFIG_ARCH_IXDP4XX=y +CONFIG_MACH_FSG=y +# CONFIG_MACH_GTWX5715 is not set + +# +# IXP4xx Options +# +CONFIG_DMABOUNCE=y +# CONFIG_IXP4XX_INDIRECT_PCI is not set + +# +# Processor Type +# +CONFIG_CPU_32=y +CONFIG_CPU_XSCALE=y +CONFIG_CPU_32v5=y +CONFIG_CPU_ABRT_EV5T=y +CONFIG_CPU_CACHE_VIVT=y +CONFIG_CPU_TLB_V4WBI=y +CONFIG_CPU_CP15=y +CONFIG_CPU_CP15_MMU=y + +# +# Processor Features +# +CONFIG_ARM_THUMB=y +# CONFIG_CPU_BIG_ENDIAN is not set +# CONFIG_CPU_DCACHE_DISABLE is not set +# CONFIG_OUTER_CACHE is not set +# CONFIG_IWMMXT is not set +CONFIG_XSCALE_PMU=y + +# +# Bus support +# +CONFIG_PCI=y + +# +# PCCARD (PCMCIA/CardBus) support +# +# CONFIG_PCCARD is not set + +# +# Kernel Features +# +CONFIG_PREEMPT=y +# CONFIG_NO_IDLE_HZ is not set +CONFIG_HZ=100 +CONFIG_AEABI=y +CONFIG_OABI_COMPAT=y +# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set +CONFIG_SELECT_MEMORY_MODEL=y +CONFIG_FLATMEM_MANUAL=y +# CONFIG_DISCONTIGMEM_MANUAL is not set +# CONFIG_SPARSEMEM_MANUAL is not set +CONFIG_FLATMEM=y +CONFIG_FLAT_NODE_MEM_MAP=y +# CONFIG_SPARSEMEM_STATIC is not set +CONFIG_SPLIT_PTLOCK_CPUS=4096 +# CONFIG_RESOURCES_64BIT is not set +CONFIG_ZONE_DMA_FLAG=1 +CONFIG_ALIGNMENT_TRAP=y + +# +# Boot options +# +CONFIG_ZBOOT_ROM_TEXT=0x0 +CONFIG_ZBOOT_ROM_BSS=0x0 +CONFIG_CMDLINE=" noirqdebug console=ttyS0,115200n8" +# CONFIG_XIP_KERNEL is not set +CONFIG_KEXEC=y + +# +# Floating point emulation +# + +# +# At least one emulation must be selected +# +CONFIG_FPE_NWFPE=y +# CONFIG_FPE_NWFPE_XP is not set +# CONFIG_FPE_FASTFPE is not set + +# +# Userspace binary formats +# +CONFIG_BINFMT_ELF=y +# CONFIG_BINFMT_AOUT is not set +# CONFIG_BINFMT_MISC is not set +# CONFIG_ARTHUR is not set + +# +# Power management options +# +# CONFIG_PM is not set + +# +# Networking +# +CONFIG_NET=y + +# +# Networking options +# +# CONFIG_NETDEBUG is not set +CONFIG_PACKET=y +CONFIG_PACKET_MMAP=y +CONFIG_UNIX=y +CONFIG_XFRM=y +# CONFIG_XFRM_USER is not set +# CONFIG_XFRM_SUB_POLICY is not set +# CONFIG_XFRM_MIGRATE is not set +# CONFIG_NET_KEY is not set +CONFIG_INET=y +# CONFIG_IP_MULTICAST is not set +# CONFIG_IP_ADVANCED_ROUTER is not set +CONFIG_IP_FIB_HASH=y +# CONFIG_IP_PNP is not set +# CONFIG_NET_IPIP is not set +# CONFIG_NET_IPGRE is not set +# CONFIG_ARPD is not set +# CONFIG_SYN_COOKIES is not set +CONFIG_INET_AH=m +CONFIG_INET_ESP=m +CONFIG_INET_IPCOMP=m +CONFIG_INET_XFRM_TUNNEL=m +CONFIG_INET_TUNNEL=m +CONFIG_INET_XFRM_MODE_TRANSPORT=y +CONFIG_INET_XFRM_MODE_TUNNEL=y +CONFIG_INET_XFRM_MODE_BEET=m +CONFIG_INET_DIAG=y +CONFIG_INET_TCP_DIAG=y +# CONFIG_TCP_CONG_ADVANCED is not set +CONFIG_TCP_CONG_CUBIC=y +CONFIG_DEFAULT_TCP_CONG="cubic" +# CONFIG_TCP_MD5SIG is not set + +# +# IP: Virtual Server Configuration +# +# CONFIG_IP_VS is not set +CONFIG_IPV6=m +# CONFIG_IPV6_PRIVACY is not set +# CONFIG_IPV6_ROUTER_PREF is not set +CONFIG_INET6_AH=m +CONFIG_INET6_ESP=m +CONFIG_INET6_IPCOMP=m +# CONFIG_IPV6_MIP6 is not set +CONFIG_INET6_XFRM_TUNNEL=m +CONFIG_INET6_TUNNEL=m +CONFIG_INET6_XFRM_MODE_TRANSPORT=m +CONFIG_INET6_XFRM_MODE_TUNNEL=m +CONFIG_INET6_XFRM_MODE_BEET=m +# CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set +CONFIG_IPV6_SIT=m +CONFIG_IPV6_TUNNEL=m +# CONFIG_IPV6_MULTIPLE_TABLES is not set +# CONFIG_NETWORK_SECMARK is not set +CONFIG_NETFILTER=y +# CONFIG_NETFILTER_DEBUG is not set +CONFIG_BRIDGE_NETFILTER=y + +# +# Core Netfilter Configuration +# +CONFIG_NETFILTER_NETLINK=m +CONFIG_NETFILTER_NETLINK_QUEUE=m +CONFIG_NETFILTER_NETLINK_LOG=m +CONFIG_NF_CONNTRACK_ENABLED=m +CONFIG_NF_CONNTRACK_SUPPORT=y +# CONFIG_IP_NF_CONNTRACK_SUPPORT is not set +CONFIG_NF_CONNTRACK=m +CONFIG_NF_CT_ACCT=y +CONFIG_NF_CONNTRACK_MARK=y +CONFIG_NF_CONNTRACK_EVENTS=y +CONFIG_NF_CT_PROTO_GRE=m +CONFIG_NF_CT_PROTO_SCTP=m +CONFIG_NF_CONNTRACK_AMANDA=m +CONFIG_NF_CONNTRACK_FTP=m +CONFIG_NF_CONNTRACK_H323=m +CONFIG_NF_CONNTRACK_IRC=m +CONFIG_NF_CONNTRACK_NETBIOS_NS=m +CONFIG_NF_CONNTRACK_PPTP=m +CONFIG_NF_CONNTRACK_SANE=m +CONFIG_NF_CONNTRACK_SIP=m +CONFIG_NF_CONNTRACK_TFTP=m +CONFIG_NF_CT_NETLINK=m +CONFIG_NETFILTER_XTABLES=m +CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m +CONFIG_NETFILTER_XT_TARGET_CONNMARK=m +CONFIG_NETFILTER_XT_TARGET_DSCP=m +CONFIG_NETFILTER_XT_TARGET_MARK=m +CONFIG_NETFILTER_XT_TARGET_NFQUEUE=m +CONFIG_NETFILTER_XT_TARGET_NFLOG=m +CONFIG_NETFILTER_XT_TARGET_NOTRACK=m +CONFIG_NETFILTER_XT_TARGET_TCPMSS=m +CONFIG_NETFILTER_XT_MATCH_COMMENT=m +CONFIG_NETFILTER_XT_MATCH_CONNBYTES=m +CONFIG_NETFILTER_XT_MATCH_CONNMARK=m +CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m +CONFIG_NETFILTER_XT_MATCH_DCCP=m +CONFIG_NETFILTER_XT_MATCH_DSCP=m +CONFIG_NETFILTER_XT_MATCH_ESP=m +CONFIG_NETFILTER_XT_MATCH_HELPER=m +CONFIG_NETFILTER_XT_MATCH_LENGTH=m +CONFIG_NETFILTER_XT_MATCH_LIMIT=m +CONFIG_NETFILTER_XT_MATCH_MAC=m +CONFIG_NETFILTER_XT_MATCH_MARK=m +CONFIG_NETFILTER_XT_MATCH_POLICY=m +CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m +CONFIG_NETFILTER_XT_MATCH_PHYSDEV=m +CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m +CONFIG_NETFILTER_XT_MATCH_QUOTA=m +CONFIG_NETFILTER_XT_MATCH_REALM=m +CONFIG_NETFILTER_XT_MATCH_SCTP=m +CONFIG_NETFILTER_XT_MATCH_STATE=m +CONFIG_NETFILTER_XT_MATCH_STATISTIC=m +CONFIG_NETFILTER_XT_MATCH_STRING=m +CONFIG_NETFILTER_XT_MATCH_TCPMSS=m +CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=m + +# +# IP: Netfilter Configuration +# +CONFIG_NF_CONNTRACK_IPV4=m +CONFIG_NF_CONNTRACK_PROC_COMPAT=y +# CONFIG_IP_NF_QUEUE is not set +CONFIG_IP_NF_IPTABLES=m +CONFIG_IP_NF_MATCH_IPRANGE=m +CONFIG_IP_NF_MATCH_TOS=m +CONFIG_IP_NF_MATCH_RECENT=m +CONFIG_IP_NF_MATCH_ECN=m +CONFIG_IP_NF_MATCH_AH=m +CONFIG_IP_NF_MATCH_TTL=m +CONFIG_IP_NF_MATCH_OWNER=m +CONFIG_IP_NF_MATCH_ADDRTYPE=m +CONFIG_IP_NF_FILTER=m +CONFIG_IP_NF_TARGET_REJECT=m +CONFIG_IP_NF_TARGET_LOG=m +CONFIG_IP_NF_TARGET_ULOG=m +CONFIG_NF_NAT=m +CONFIG_NF_NAT_NEEDED=y +CONFIG_IP_NF_TARGET_MASQUERADE=m +CONFIG_IP_NF_TARGET_REDIRECT=m +CONFIG_IP_NF_TARGET_NETMAP=m +CONFIG_IP_NF_TARGET_SAME=m +CONFIG_NF_NAT_SNMP_BASIC=m +CONFIG_NF_NAT_PROTO_GRE=m +CONFIG_NF_NAT_FTP=m +CONFIG_NF_NAT_IRC=m +CONFIG_NF_NAT_TFTP=m +CONFIG_NF_NAT_AMANDA=m +CONFIG_NF_NAT_PPTP=m +CONFIG_NF_NAT_H323=m +CONFIG_NF_NAT_SIP=m +CONFIG_IP_NF_MANGLE=m +CONFIG_IP_NF_TARGET_TOS=m +CONFIG_IP_NF_TARGET_ECN=m +CONFIG_IP_NF_TARGET_TTL=m +CONFIG_IP_NF_TARGET_CLUSTERIP=m +CONFIG_IP_NF_RAW=m +CONFIG_IP_NF_ARPTABLES=m +CONFIG_IP_NF_ARPFILTER=m +CONFIG_IP_NF_ARP_MANGLE=m + +# +# IPv6: Netfilter Configuration (EXPERIMENTAL) +# +CONFIG_NF_CONNTRACK_IPV6=m +# CONFIG_IP6_NF_QUEUE is not set +CONFIG_IP6_NF_IPTABLES=m +CONFIG_IP6_NF_MATCH_RT=m +CONFIG_IP6_NF_MATCH_OPTS=m +CONFIG_IP6_NF_MATCH_FRAG=m +CONFIG_IP6_NF_MATCH_HL=m +CONFIG_IP6_NF_MATCH_OWNER=m +CONFIG_IP6_NF_MATCH_IPV6HEADER=m +CONFIG_IP6_NF_MATCH_AH=m +CONFIG_IP6_NF_MATCH_MH=m +CONFIG_IP6_NF_MATCH_EUI64=m +CONFIG_IP6_NF_FILTER=m +CONFIG_IP6_NF_TARGET_LOG=m +CONFIG_IP6_NF_TARGET_REJECT=m +CONFIG_IP6_NF_MANGLE=m +CONFIG_IP6_NF_TARGET_HL=m +CONFIG_IP6_NF_RAW=m + +# +# Bridge: Netfilter Configuration +# +CONFIG_BRIDGE_NF_EBTABLES=m +CONFIG_BRIDGE_EBT_BROUTE=m +CONFIG_BRIDGE_EBT_T_FILTER=m +CONFIG_BRIDGE_EBT_T_NAT=m +CONFIG_BRIDGE_EBT_802_3=m +CONFIG_BRIDGE_EBT_AMONG=m +CONFIG_BRIDGE_EBT_ARP=m +CONFIG_BRIDGE_EBT_IP=m +CONFIG_BRIDGE_EBT_LIMIT=m +CONFIG_BRIDGE_EBT_MARK=m +CONFIG_BRIDGE_EBT_PKTTYPE=m +CONFIG_BRIDGE_EBT_STP=m +CONFIG_BRIDGE_EBT_VLAN=m +CONFIG_BRIDGE_EBT_ARPREPLY=m +CONFIG_BRIDGE_EBT_DNAT=m +CONFIG_BRIDGE_EBT_MARK_T=m +CONFIG_BRIDGE_EBT_REDIRECT=m +CONFIG_BRIDGE_EBT_SNAT=m +CONFIG_BRIDGE_EBT_LOG=m +CONFIG_BRIDGE_EBT_ULOG=m + +# +# DCCP Configuration (EXPERIMENTAL) +# +# CONFIG_IP_DCCP is not set + +# +# SCTP Configuration (EXPERIMENTAL) +# +# CONFIG_IP_SCTP is not set + +# +# TIPC Configuration (EXPERIMENTAL) +# +CONFIG_TIPC=m +# CONFIG_TIPC_ADVANCED is not set +# CONFIG_TIPC_DEBUG is not set +# CONFIG_ATM is not set +CONFIG_BRIDGE=m +CONFIG_VLAN_8021Q=m +# CONFIG_DECNET is not set +CONFIG_LLC=m +# CONFIG_LLC2 is not set +CONFIG_IPX=m +# CONFIG_IPX_INTERN is not set +CONFIG_ATALK=m +CONFIG_DEV_APPLETALK=m +CONFIG_IPDDP=m +CONFIG_IPDDP_ENCAP=y +CONFIG_IPDDP_DECAP=y +# CONFIG_X25 is not set +# CONFIG_LAPB is not set +# CONFIG_ECONET is not set +# CONFIG_WAN_ROUTER is not set + +# +# QoS and/or fair queueing +# +# CONFIG_NET_SCHED is not set +CONFIG_NET_CLS_ROUTE=y + +# +# Network testing +# +CONFIG_NET_PKTGEN=m +# CONFIG_HAMRADIO is not set +# CONFIG_IRDA is not set +CONFIG_BT=m +CONFIG_BT_L2CAP=m +CONFIG_BT_SCO=m +CONFIG_BT_RFCOMM=m +CONFIG_BT_RFCOMM_TTY=y +CONFIG_BT_BNEP=m +CONFIG_BT_BNEP_MC_FILTER=y +CONFIG_BT_BNEP_PROTO_FILTER=y +CONFIG_BT_HIDP=m + +# +# Bluetooth device drivers +# +CONFIG_BT_HCIUSB=m +CONFIG_BT_HCIUSB_SCO=y +CONFIG_BT_HCIUART=m +CONFIG_BT_HCIUART_H4=y +CONFIG_BT_HCIUART_BCSP=y +CONFIG_BT_HCIBCM203X=m +# CONFIG_BT_HCIBPA10X is not set +# CONFIG_BT_HCIBFUSB is not set +CONFIG_BT_HCIVHCI=m +CONFIG_IEEE80211=m +# CONFIG_IEEE80211_DEBUG is not set +CONFIG_IEEE80211_CRYPT_WEP=m +CONFIG_IEEE80211_CRYPT_CCMP=m +CONFIG_IEEE80211_CRYPT_TKIP=m +CONFIG_IEEE80211_SOFTMAC=m +# CONFIG_IEEE80211_SOFTMAC_DEBUG is not set +CONFIG_WIRELESS_EXT=y + +# +# Device Drivers +# + +# +# Generic Driver Options +# +CONFIG_STANDALONE=y +CONFIG_PREVENT_FIRMWARE_BUILD=y +CONFIG_FW_LOADER=y +# CONFIG_SYS_HYPERVISOR is not set + +# +# Connector - unified userspace <-> kernelspace linker +# +# CONFIG_CONNECTOR is not set + +# +# Memory Technology Devices (MTD) +# +CONFIG_MTD=y +# CONFIG_MTD_DEBUG is not set +CONFIG_MTD_CONCAT=y +CONFIG_MTD_PARTITIONS=y +CONFIG_MTD_REDBOOT_PARTS=y +CONFIG_MTD_REDBOOT_DIRECTORY_BLOCK=-1 +CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED=y +# CONFIG_MTD_REDBOOT_PARTS_READONLY is not set +# CONFIG_MTD_CMDLINE_PARTS is not set +# CONFIG_MTD_AFS_PARTS is not set + +# +# User Modules And Translation Layers +# +CONFIG_MTD_CHAR=y +CONFIG_MTD_BLKDEVS=y +CONFIG_MTD_BLOCK=y +# CONFIG_FTL is not set +CONFIG_NFTL=y +CONFIG_NFTL_RW=y +# CONFIG_INFTL is not set +# CONFIG_RFD_FTL is not set +# CONFIG_SSFDC is not set + +# +# RAM/ROM/Flash chip drivers +# +CONFIG_MTD_CFI=y +# CONFIG_MTD_JEDECPROBE is not set +CONFIG_MTD_GEN_PROBE=y +CONFIG_MTD_CFI_ADV_OPTIONS=y +# CONFIG_MTD_CFI_NOSWAP is not set +CONFIG_MTD_CFI_BE_BYTE_SWAP=y +# CONFIG_MTD_CFI_LE_BYTE_SWAP is not set +CONFIG_MTD_CFI_GEOMETRY=y +# CONFIG_MTD_MAP_BANK_WIDTH_1 is not set +CONFIG_MTD_MAP_BANK_WIDTH_2=y +# CONFIG_MTD_MAP_BANK_WIDTH_4 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set +CONFIG_MTD_CFI_I1=y +CONFIG_MTD_CFI_I2=y +# CONFIG_MTD_CFI_I4 is not set +# CONFIG_MTD_CFI_I8 is not set +# CONFIG_MTD_OTP is not set +CONFIG_MTD_CFI_INTELEXT=y +# CONFIG_MTD_CFI_AMDSTD is not set +# CONFIG_MTD_CFI_STAA is not set +CONFIG_MTD_CFI_UTIL=y +# CONFIG_MTD_RAM is not set +# CONFIG_MTD_ROM is not set +# CONFIG_MTD_ABSENT is not set +# CONFIG_MTD_OBSOLETE_CHIPS is not set + +# +# Mapping drivers for chip access +# +CONFIG_MTD_COMPLEX_MAPPINGS=y +# CONFIG_MTD_PHYSMAP is not set +# CONFIG_MTD_ARM_INTEGRATOR is not set +CONFIG_MTD_IXP4XX=y +# CONFIG_MTD_PCI is not set +# CONFIG_MTD_PLATRAM is not set + +# +# Self-contained MTD device drivers +# +# CONFIG_MTD_PMC551 is not set +# CONFIG_MTD_SLRAM is not set +# CONFIG_MTD_PHRAM is not set +# CONFIG_MTD_MTDRAM is not set +# CONFIG_MTD_BLOCK2MTD is not set + +# +# Disk-On-Chip Device Drivers +# +# CONFIG_MTD_DOC2000 is not set +# CONFIG_MTD_DOC2001 is not set +# CONFIG_MTD_DOC2001PLUS is not set + +# +# NAND Flash Device Drivers +# +# CONFIG_MTD_NAND is not set + +# +# OneNAND Flash Device Drivers +# +# CONFIG_MTD_ONENAND is not set + +# +# Parallel port support +# +# CONFIG_PARPORT is not set + +# +# Plug and Play support +# +# CONFIG_PNPACPI is not set + +# +# Block devices +# +# CONFIG_BLK_CPQ_DA is not set +# CONFIG_BLK_CPQ_CISS_DA is not set +# CONFIG_BLK_DEV_DAC960 is not set +# CONFIG_BLK_DEV_UMEM is not set +# CONFIG_BLK_DEV_COW_COMMON is not set +CONFIG_BLK_DEV_LOOP=m +# CONFIG_BLK_DEV_CRYPTOLOOP is not set +CONFIG_BLK_DEV_NBD=m +# CONFIG_BLK_DEV_SX8 is not set +# CONFIG_BLK_DEV_UB is not set +CONFIG_BLK_DEV_RAM=y +CONFIG_BLK_DEV_RAM_COUNT=4 +CONFIG_BLK_DEV_RAM_SIZE=10240 +CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024 +CONFIG_CDROM_PKTCDVD=m +CONFIG_CDROM_PKTCDVD_BUFFERS=8 +# CONFIG_CDROM_PKTCDVD_WCACHE is not set +CONFIG_ATA_OVER_ETH=m + +# +# ATA/ATAPI/MFM/RLL support +# +# CONFIG_IDE is not set + +# +# SCSI device support +# +# CONFIG_RAID_ATTRS is not set +CONFIG_SCSI=y +# CONFIG_SCSI_TGT is not set +# CONFIG_SCSI_NETLINK is not set +CONFIG_SCSI_PROC_FS=y + +# +# SCSI support type (disk, tape, CD-ROM) +# +CONFIG_BLK_DEV_SD=y +CONFIG_CHR_DEV_ST=m +# CONFIG_CHR_DEV_OSST is not set +CONFIG_BLK_DEV_SR=m +# CONFIG_BLK_DEV_SR_VENDOR is not set +CONFIG_CHR_DEV_SG=m +# CONFIG_CHR_DEV_SCH is not set + +# +# Some SCSI devices (e.g. CD jukebox) support multiple LUNs +# +CONFIG_SCSI_MULTI_LUN=y +# CONFIG_SCSI_CONSTANTS is not set +# CONFIG_SCSI_LOGGING is not set +# CONFIG_SCSI_SCAN_ASYNC is not set + +# +# SCSI Transports +# +# CONFIG_SCSI_SPI_ATTRS is not set +# CONFIG_SCSI_FC_ATTRS is not set +CONFIG_SCSI_ISCSI_ATTRS=m +# CONFIG_SCSI_SAS_ATTRS is not set +# CONFIG_SCSI_SAS_LIBSAS is not set + +# +# SCSI low-level drivers +# +CONFIG_ISCSI_TCP=m +# CONFIG_BLK_DEV_3W_XXXX_RAID is not set +# CONFIG_SCSI_3W_9XXX is not set +# CONFIG_SCSI_ACARD is not set +# CONFIG_SCSI_AACRAID is not set +# CONFIG_SCSI_AIC7XXX is not set +# CONFIG_SCSI_AIC7XXX_OLD is not set +# CONFIG_SCSI_AIC79XX is not set +# CONFIG_SCSI_AIC94XX is not set +# CONFIG_SCSI_DPT_I2O is not set +# CONFIG_SCSI_ARCMSR is not set +# CONFIG_MEGARAID_NEWGEN is not set +# CONFIG_MEGARAID_LEGACY is not set +# CONFIG_MEGARAID_SAS is not set +# CONFIG_SCSI_HPTIOP is not set +# CONFIG_SCSI_DMX3191D is not set +# CONFIG_SCSI_FUTURE_DOMAIN is not set +# CONFIG_SCSI_IPS is not set +# CONFIG_SCSI_INITIO is not set +# CONFIG_SCSI_INIA100 is not set +# CONFIG_SCSI_STEX is not set +# CONFIG_SCSI_SYM53C8XX_2 is not set +# CONFIG_SCSI_IPR is not set +# CONFIG_SCSI_QLOGIC_1280 is not set +# CONFIG_SCSI_QLA_FC is not set +# CONFIG_SCSI_QLA_ISCSI is not set +# CONFIG_SCSI_LPFC is not set +# CONFIG_SCSI_DC395x is not set +# CONFIG_SCSI_DC390T is not set +# CONFIG_SCSI_NSP32 is not set +# CONFIG_SCSI_DEBUG is not set +# CONFIG_SCSI_SRP is not set + +# +# Serial ATA (prod) and Parallel ATA (experimental) drivers +# +CONFIG_ATA=m +# CONFIG_ATA_NONSTANDARD is not set +# CONFIG_SATA_AHCI is not set +# CONFIG_SATA_SVW is not set +# CONFIG_ATA_PIIX is not set +# CONFIG_SATA_MV is not set +# CONFIG_SATA_NV is not set +# CONFIG_PDC_ADMA is not set +# CONFIG_SATA_QSTOR is not set +# CONFIG_SATA_PROMISE is not set +# CONFIG_SATA_SX4 is not set +# CONFIG_SATA_SIL is not set +# CONFIG_SATA_SIL24 is not set +# CONFIG_SATA_SIS is not set +# CONFIG_SATA_ULI is not set +CONFIG_SATA_VIA=m +# CONFIG_SATA_VITESSE is not set +# CONFIG_SATA_INIC162X is not set +# CONFIG_PATA_ALI is not set +# CONFIG_PATA_AMD is not set +CONFIG_PATA_ARTOP=m +# CONFIG_PATA_ATIIXP is not set +# CONFIG_PATA_CMD64X is not set +# CONFIG_PATA_CS5520 is not set +# CONFIG_PATA_CS5530 is not set +# CONFIG_PATA_CYPRESS is not set +# CONFIG_PATA_EFAR is not set +# CONFIG_ATA_GENERIC is not set +# CONFIG_PATA_HPT366 is not set +# CONFIG_PATA_HPT37X is not set +# CONFIG_PATA_HPT3X2N is not set +# CONFIG_PATA_HPT3X3 is not set +# CONFIG_PATA_IT821X is not set +# CONFIG_PATA_IT8213 is not set +# CONFIG_PATA_JMICRON is not set +# CONFIG_PATA_TRIFLEX is not set +# CONFIG_PATA_MARVELL is not set +# CONFIG_PATA_MPIIX is not set +# CONFIG_PATA_OLDPIIX is not set +# CONFIG_PATA_NETCELL is not set +# CONFIG_PATA_NS87410 is not set +# CONFIG_PATA_OPTI is not set +# CONFIG_PATA_OPTIDMA is not set +# CONFIG_PATA_PDC_OLD is not set +# CONFIG_PATA_RADISYS is not set +# CONFIG_PATA_RZ1000 is not set +# CONFIG_PATA_SC1200 is not set +# CONFIG_PATA_SERVERWORKS is not set +# CONFIG_PATA_PDC2027X is not set +# CONFIG_PATA_SIL680 is not set +# CONFIG_PATA_SIS is not set +# CONFIG_PATA_VIA is not set +# CONFIG_PATA_WINBOND is not set +# CONFIG_PATA_PLATFORM is not set +CONFIG_PATA_IXP4XX_CF=m + +# +# Multi-device support (RAID and LVM) +# +CONFIG_MD=y +CONFIG_BLK_DEV_MD=m +CONFIG_MD_LINEAR=m +CONFIG_MD_RAID0=m +CONFIG_MD_RAID1=m +CONFIG_MD_RAID10=m +CONFIG_MD_RAID456=m +CONFIG_MD_RAID5_RESHAPE=y +CONFIG_MD_MULTIPATH=m +CONFIG_MD_FAULTY=m +CONFIG_BLK_DEV_DM=m +# CONFIG_DM_DEBUG is not set +# CONFIG_DM_CRYPT is not set +# CONFIG_DM_SNAPSHOT is not set +# CONFIG_DM_MIRROR is not set +# CONFIG_DM_ZERO is not set +# CONFIG_DM_MULTIPATH is not set + +# +# Fusion MPT device support +# +# CONFIG_FUSION is not set +# CONFIG_FUSION_SPI is not set +# CONFIG_FUSION_FC is not set +# CONFIG_FUSION_SAS is not set + +# +# IEEE 1394 (FireWire) support +# +# CONFIG_IEEE1394 is not set + +# +# I2O device support +# +# CONFIG_I2O is not set + +# +# Network device support +# +CONFIG_NETDEVICES=y +# CONFIG_DUMMY is not set +# CONFIG_BONDING is not set +# CONFIG_EQUALIZER is not set +CONFIG_TUN=m + +# +# ARCnet devices +# +# CONFIG_ARCNET is not set + +# +# PHY device support +# +# CONFIG_PHYLIB is not set + +# +# Ethernet (10 or 100Mbit) +# +CONFIG_NET_ETHERNET=y +CONFIG_MII=y +CONFIG_IXP4XX_QMGR=y +CONFIG_IXP4XX_NPE=y +CONFIG_IXP4XX_NPE_FW_LOAD=y +CONFIG_IXP4XX_NPE_FW_MTD=y +CONFIG_IXP4XX_MAC=y +CONFIG_IXP4XX_CRYPTO=m +# CONFIG_HAPPYMEAL is not set +# CONFIG_SUNGEM is not set +# CONFIG_CASSINI is not set +# CONFIG_NET_VENDOR_3COM is not set +# CONFIG_SMC91X is not set +# CONFIG_DM9000 is not set + +# +# Tulip family network device support +# +# CONFIG_NET_TULIP is not set +# CONFIG_HP100 is not set +CONFIG_NET_PCI=y +# CONFIG_PCNET32 is not set +# CONFIG_AMD8111_ETH is not set +# CONFIG_ADAPTEC_STARFIRE is not set +# CONFIG_B44 is not set +# CONFIG_FORCEDETH is not set +# CONFIG_DGRS is not set +# CONFIG_EEPRO100 is not set +# CONFIG_E100 is not set +# CONFIG_FEALNX is not set +# CONFIG_NATSEMI is not set +# CONFIG_NE2K_PCI is not set +# CONFIG_8139CP is not set +# CONFIG_8139TOO is not set +# CONFIG_SIS900 is not set +# CONFIG_EPIC100 is not set +# CONFIG_SUNDANCE is not set +# CONFIG_TLAN is not set +# CONFIG_VIA_RHINE is not set +# CONFIG_SC92031 is not set + +# +# Ethernet (1000 Mbit) +# +# CONFIG_ACENIC is not set +# CONFIG_DL2K is not set +# CONFIG_E1000 is not set +# CONFIG_NS83820 is not set +# CONFIG_HAMACHI is not set +# CONFIG_YELLOWFIN is not set +CONFIG_R8169=m +# CONFIG_R8169_NAPI is not set +CONFIG_R8169_VLAN=y +# CONFIG_SIS190 is not set +# CONFIG_SKGE is not set +# CONFIG_SKY2 is not set +# CONFIG_SK98LIN is not set +CONFIG_VIA_VELOCITY=m +# CONFIG_TIGON3 is not set +# CONFIG_BNX2 is not set +# CONFIG_QLA3XXX is not set +# CONFIG_ATL1 is not set + +# +# Ethernet (10000 Mbit) +# +# CONFIG_CHELSIO_T1 is not set +# CONFIG_CHELSIO_T3 is not set +# CONFIG_IXGB is not set +# CONFIG_S2IO is not set +# CONFIG_MYRI10GE is not set +# CONFIG_NETXEN_NIC is not set + +# +# Token Ring devices +# +# CONFIG_TR is not set + +# +# Wireless LAN (non-hamradio) +# +CONFIG_NET_RADIO=y +# CONFIG_NET_WIRELESS_RTNETLINK is not set + +# +# Obsolete Wireless cards support (pre-802.11) +# +# CONFIG_STRIP is not set + +# +# Wireless 802.11b ISA/PCI cards support +# +# CONFIG_IPW2100 is not set +# CONFIG_IPW2200 is not set +# CONFIG_HERMES is not set +# CONFIG_ATMEL is not set + +# +# Prism GT/Duette 802.11(a/b/g) PCI/Cardbus support +# +# CONFIG_PRISM54 is not set +# CONFIG_USB_ZD1201 is not set +# CONFIG_HOSTAP is not set +# CONFIG_BCM43XX is not set +CONFIG_ZD1211RW=m +# CONFIG_ZD1211RW_DEBUG is not set +CONFIG_NET_WIRELESS=y + +# +# Wan interfaces +# +# CONFIG_WAN is not set +# CONFIG_FDDI is not set +# CONFIG_HIPPI is not set +CONFIG_PPP=m +# CONFIG_PPP_MULTILINK is not set +CONFIG_PPP_FILTER=y +CONFIG_PPP_ASYNC=m +CONFIG_PPP_SYNC_TTY=m +CONFIG_PPP_DEFLATE=m +CONFIG_PPP_BSDCOMP=m +CONFIG_PPP_MPPE=m +CONFIG_PPPOE=m +# CONFIG_SLIP is not set +CONFIG_SLHC=m +# CONFIG_NET_FC is not set +# CONFIG_SHAPER is not set +CONFIG_NETCONSOLE=m +CONFIG_NETPOLL=y +# CONFIG_NETPOLL_RX is not set +# CONFIG_NETPOLL_TRAP is not set +CONFIG_NET_POLL_CONTROLLER=y + +# +# ISDN subsystem +# +# CONFIG_ISDN is not set + +# +# Input device support +# +CONFIG_INPUT=y +# CONFIG_INPUT_FF_MEMLESS is not set + +# +# Userland interfaces +# +# CONFIG_INPUT_MOUSEDEV is not set +# CONFIG_INPUT_JOYDEV is not set +# CONFIG_INPUT_TSDEV is not set +CONFIG_INPUT_EVDEV=y +# CONFIG_INPUT_EVBUG is not set + +# +# Input Device Drivers +# +# CONFIG_INPUT_KEYBOARD is not set +# CONFIG_INPUT_MOUSE is not set +# CONFIG_INPUT_JOYSTICK is not set +# CONFIG_INPUT_TOUCHSCREEN is not set +CONFIG_INPUT_MISC=y +CONFIG_INPUT_IXP4XX_BEEPER=y +CONFIG_INPUT_UINPUT=m + +# +# Hardware I/O ports +# +# CONFIG_SERIO is not set +# CONFIG_GAMEPORT is not set + +# +# Character devices +# +# CONFIG_VT is not set +CONFIG_SERIAL_NONSTANDARD=y +# CONFIG_COMPUTONE is not set +# CONFIG_ROCKETPORT is not set +# CONFIG_CYCLADES is not set +# CONFIG_DIGIEPCA is not set +# CONFIG_MOXA_INTELLIO is not set +# CONFIG_MOXA_SMARTIO is not set +# CONFIG_MOXA_SMARTIO_NEW is not set +# CONFIG_ISI is not set +# CONFIG_SYNCLINKMP is not set +# CONFIG_SYNCLINK_GT is not set +CONFIG_N_HDLC=m +# CONFIG_RISCOM8 is not set +# CONFIG_SPECIALIX is not set +# CONFIG_SX is not set +# CONFIG_RIO is not set +# CONFIG_STALDRV is not set + +# +# Serial drivers +# +CONFIG_SERIAL_8250=y +CONFIG_SERIAL_8250_CONSOLE=y +CONFIG_SERIAL_8250_PCI=m +CONFIG_SERIAL_8250_NR_UARTS=2 +CONFIG_SERIAL_8250_RUNTIME_UARTS=2 +# CONFIG_SERIAL_8250_EXTENDED is not set + +# +# Non-8250 serial port support +# +CONFIG_SERIAL_CORE=y +CONFIG_SERIAL_CORE_CONSOLE=y +# CONFIG_SERIAL_JSM is not set +CONFIG_UNIX98_PTYS=y +# CONFIG_LEGACY_PTYS is not set + +# +# IPMI +# +# CONFIG_IPMI_HANDLER is not set + +# +# Watchdog Cards +# +CONFIG_WATCHDOG=y +# CONFIG_WATCHDOG_NOWAYOUT is not set + +# +# Watchdog Device Drivers +# +# CONFIG_SOFT_WATCHDOG is not set +CONFIG_IXP4XX_WATCHDOG=m + +# +# PCI-based Watchdog Cards +# +# CONFIG_PCIPCWATCHDOG is not set +# CONFIG_WDTPCI is not set + +# +# USB-based Watchdog Cards +# +# CONFIG_USBPCWATCHDOG is not set +CONFIG_HW_RANDOM=y +CONFIG_HW_RANDOM_IXP4XX=y +# CONFIG_NVRAM is not set +# CONFIG_DTLK is not set +# CONFIG_R3964 is not set +# CONFIG_APPLICOM is not set +# CONFIG_DRM is not set +# CONFIG_RAW_DRIVER is not set + +# +# TPM devices +# +# CONFIG_TCG_TPM is not set + +# +# I2C support +# +CONFIG_I2C=y +CONFIG_I2C_CHARDEV=y + +# +# I2C Algorithms +# +CONFIG_I2C_ALGOBIT=y +# CONFIG_I2C_ALGOPCF is not set +# CONFIG_I2C_ALGOPCA is not set + +# +# I2C Hardware Bus support +# +# CONFIG_I2C_ALI1535 is not set +# CONFIG_I2C_ALI1563 is not set +# CONFIG_I2C_ALI15X3 is not set +# CONFIG_I2C_AMD756 is not set +# CONFIG_I2C_AMD8111 is not set +# CONFIG_I2C_I801 is not set +# CONFIG_I2C_I810 is not set +# CONFIG_I2C_PIIX4 is not set +# CONFIG_I2C_IOP3XX is not set +CONFIG_I2C_ISA=m +CONFIG_I2C_IXP4XX=y +# CONFIG_I2C_NFORCE2 is not set +# CONFIG_I2C_OCORES is not set +# CONFIG_I2C_PARPORT_LIGHT is not set +# CONFIG_I2C_PROSAVAGE is not set +# CONFIG_I2C_SAVAGE4 is not set +# CONFIG_I2C_SIS5595 is not set +# CONFIG_I2C_SIS630 is not set +# CONFIG_I2C_SIS96X is not set +# CONFIG_I2C_STUB is not set +# CONFIG_I2C_VIA is not set +# CONFIG_I2C_VIAPRO is not set +# CONFIG_I2C_VOODOO3 is not set +# CONFIG_I2C_PCA_ISA is not set + +# +# Miscellaneous I2C Chip support +# +# CONFIG_SENSORS_DS1337 is not set +# CONFIG_SENSORS_DS1374 is not set +CONFIG_SENSORS_EEPROM=y +CONFIG_SENSORS_PCF8574=m +# CONFIG_SENSORS_PCA9539 is not set +# CONFIG_SENSORS_PCF8591 is not set +# CONFIG_SENSORS_MAX6875 is not set +# CONFIG_I2C_DEBUG_CORE is not set +# CONFIG_I2C_DEBUG_ALGO is not set +# CONFIG_I2C_DEBUG_BUS is not set +# CONFIG_I2C_DEBUG_CHIP is not set + +# +# SPI support +# +# CONFIG_SPI is not set +# CONFIG_SPI_MASTER is not set + +# +# Dallas's 1-wire bus +# +CONFIG_W1=m + +# +# 1-wire Bus Masters +# +# CONFIG_W1_MASTER_MATROX is not set +CONFIG_W1_MASTER_DS2490=m +CONFIG_W1_MASTER_DS2482=m + +# +# 1-wire Slaves +# +CONFIG_W1_SLAVE_THERM=m +CONFIG_W1_SLAVE_SMEM=m +CONFIG_W1_SLAVE_DS2433=m +CONFIG_W1_SLAVE_DS2433_CRC=y + +# +# Hardware Monitoring support +# +CONFIG_HWMON=m +CONFIG_HWMON_VID=m +# CONFIG_SENSORS_ABITUGURU is not set +# CONFIG_SENSORS_ADM1021 is not set +# CONFIG_SENSORS_ADM1025 is not set +# CONFIG_SENSORS_ADM1026 is not set +# CONFIG_SENSORS_ADM1029 is not set +# CONFIG_SENSORS_ADM1031 is not set +# CONFIG_SENSORS_ADM9240 is not set +# CONFIG_SENSORS_ASB100 is not set +# CONFIG_SENSORS_ATXP1 is not set +# CONFIG_SENSORS_DS1621 is not set +# CONFIG_SENSORS_F71805F is not set +# CONFIG_SENSORS_FSCHER is not set +# CONFIG_SENSORS_FSCPOS is not set +# CONFIG_SENSORS_GL518SM is not set +# CONFIG_SENSORS_GL520SM is not set +# CONFIG_SENSORS_IT87 is not set +# CONFIG_SENSORS_LM63 is not set +# CONFIG_SENSORS_LM75 is not set +# CONFIG_SENSORS_LM77 is not set +# CONFIG_SENSORS_LM78 is not set +# CONFIG_SENSORS_LM80 is not set +# CONFIG_SENSORS_LM83 is not set +# CONFIG_SENSORS_LM85 is not set +# CONFIG_SENSORS_LM87 is not set +# CONFIG_SENSORS_LM90 is not set +# CONFIG_SENSORS_LM92 is not set +# CONFIG_SENSORS_MAX1619 is not set +# CONFIG_SENSORS_PC87360 is not set +# CONFIG_SENSORS_PC87427 is not set +# CONFIG_SENSORS_SIS5595 is not set +# CONFIG_SENSORS_SMSC47M1 is not set +# CONFIG_SENSORS_SMSC47M192 is not set +# CONFIG_SENSORS_SMSC47B397 is not set +# CONFIG_SENSORS_VIA686A is not set +# CONFIG_SENSORS_VT1211 is not set +# CONFIG_SENSORS_VT8231 is not set +CONFIG_SENSORS_W83781D=m +# CONFIG_SENSORS_W83791D is not set +# CONFIG_SENSORS_W83792D is not set +# CONFIG_SENSORS_W83793 is not set +# CONFIG_SENSORS_W83L785TS is not set +# CONFIG_SENSORS_W83627HF is not set +# CONFIG_SENSORS_W83627EHF is not set +CONFIG_SENSORS_AD7418=m +# CONFIG_HWMON_DEBUG_CHIP is not set + +# +# Misc devices +# +# CONFIG_SGI_IOC4 is not set +# CONFIG_TIFM_CORE is not set + +# +# Multifunction device drivers +# +# CONFIG_MFD_SM501 is not set + +# +# LED devices +# +CONFIG_NEW_LEDS=y +CONFIG_LEDS_CLASS=y + +# +# LED drivers +# +CONFIG_LEDS_IXP4XX=y + +# +# LED Triggers +# +CONFIG_LEDS_TRIGGERS=y +CONFIG_LEDS_TRIGGER_TIMER=y +CONFIG_LEDS_TRIGGER_HEARTBEAT=y +CONFIG_LEDS_TRIGGER_CPU_ACTIVITY=y + +# +# Multimedia devices +# +CONFIG_VIDEO_DEV=m +CONFIG_VIDEO_V4L1=y +CONFIG_VIDEO_V4L1_COMPAT=y +CONFIG_VIDEO_V4L2=y + +# +# Video Capture Adapters +# + +# +# Video Capture Adapters +# +# CONFIG_VIDEO_ADV_DEBUG is not set +CONFIG_VIDEO_HELPER_CHIPS_AUTO=y +CONFIG_VIDEO_TDA9840=m +CONFIG_VIDEO_TEA6415C=m +CONFIG_VIDEO_TEA6420=m +CONFIG_VIDEO_BT819=m +CONFIG_VIDEO_BT856=m +CONFIG_VIDEO_SAA7110=m +CONFIG_VIDEO_SAA7111=m +CONFIG_VIDEO_SAA7114=m +CONFIG_VIDEO_VPX3220=m +CONFIG_VIDEO_SAA7185=m +CONFIG_VIDEO_ADV7170=m +CONFIG_VIDEO_ADV7175=m +CONFIG_VIDEO_VIVI=m +# CONFIG_VIDEO_BT848 is not set +CONFIG_VIDEO_CPIA=m +CONFIG_VIDEO_CPIA_USB=m +CONFIG_VIDEO_CPIA2=m +CONFIG_VIDEO_SAA5246A=m +CONFIG_VIDEO_SAA5249=m +CONFIG_TUNER_3036=m +CONFIG_VIDEO_STRADIS=m +CONFIG_VIDEO_ZORAN_ZR36060=m +CONFIG_VIDEO_ZORAN=m +CONFIG_VIDEO_ZORAN_BUZ=m +CONFIG_VIDEO_ZORAN_DC10=m +CONFIG_VIDEO_ZORAN_DC30=m +CONFIG_VIDEO_ZORAN_LML33=m +CONFIG_VIDEO_ZORAN_LML33R10=m +# CONFIG_VIDEO_ZORAN_AVS6EYES is not set +CONFIG_VIDEO_SAA7134=m +# CONFIG_VIDEO_SAA7134_ALSA is not set +CONFIG_VIDEO_MXB=m +CONFIG_VIDEO_DPC=m +CONFIG_VIDEO_HEXIUM_ORION=m +CONFIG_VIDEO_HEXIUM_GEMINI=m +CONFIG_VIDEO_CX88=m +CONFIG_VIDEO_CX88_ALSA=m +# CONFIG_VIDEO_CX88_BLACKBIRD is not set +# CONFIG_VIDEO_CAFE_CCIC is not set + +# +# V4L USB devices +# +# CONFIG_VIDEO_PVRUSB2 is not set +# CONFIG_VIDEO_EM28XX is not set +# CONFIG_VIDEO_USBVISION is not set +# CONFIG_USB_VICAM is not set +# CONFIG_USB_IBMCAM is not set +# CONFIG_USB_KONICAWC is not set +# CONFIG_USB_QUICKCAM_MESSENGER is not set +# CONFIG_USB_ET61X251 is not set +CONFIG_VIDEO_OVCAMCHIP=m +# CONFIG_USB_W9968CF is not set +# CONFIG_USB_OV511 is not set +# CONFIG_USB_SE401 is not set +# CONFIG_USB_SN9C102 is not set +# CONFIG_USB_STV680 is not set +# CONFIG_USB_ZC0301 is not set +CONFIG_USB_PWC=m +# CONFIG_USB_PWC_DEBUG is not set + +# +# Radio Adapters +# +# CONFIG_RADIO_GEMTEK_PCI is not set +# CONFIG_RADIO_MAXIRADIO is not set +# CONFIG_RADIO_MAESTRO is not set +# CONFIG_USB_DSBR is not set + +# +# Digital Video Broadcasting Devices +# +# CONFIG_DVB is not set +CONFIG_VIDEO_SAA7146=m +CONFIG_VIDEO_SAA7146_VV=m +CONFIG_VIDEO_TUNER=m +CONFIG_VIDEO_BUF=m +CONFIG_VIDEO_BTCX=m +CONFIG_VIDEO_IR=m +CONFIG_VIDEO_TVEEPROM=m +# CONFIG_USB_DABUSB is not set + +# +# Graphics support +# +# CONFIG_BACKLIGHT_LCD_SUPPORT is not set +# CONFIG_FB is not set + +# +# Sound +# +CONFIG_SOUND=m + +# +# Advanced Linux Sound Architecture +# +CONFIG_SND=m +CONFIG_SND_TIMER=m +CONFIG_SND_PCM=m +CONFIG_SND_HWDEP=m +CONFIG_SND_RAWMIDI=m +# CONFIG_SND_SEQUENCER is not set +CONFIG_SND_OSSEMUL=y +CONFIG_SND_MIXER_OSS=m +CONFIG_SND_PCM_OSS=m +CONFIG_SND_PCM_OSS_PLUGINS=y +# CONFIG_SND_DYNAMIC_MINORS is not set +CONFIG_SND_SUPPORT_OLD_API=y +CONFIG_SND_VERBOSE_PROCFS=y +# CONFIG_SND_VERBOSE_PRINTK is not set +# CONFIG_SND_DEBUG is not set + +# +# Generic devices +# +# CONFIG_SND_DUMMY is not set +# CONFIG_SND_MTPAV is not set +# CONFIG_SND_SERIAL_U16550 is not set +# CONFIG_SND_MPU401 is not set + +# +# PCI devices +# +# CONFIG_SND_AD1889 is not set +# CONFIG_SND_ALS300 is not set +# CONFIG_SND_ALI5451 is not set +# CONFIG_SND_ATIIXP is not set +# CONFIG_SND_ATIIXP_MODEM is not set +# CONFIG_SND_AU8810 is not set +# CONFIG_SND_AU8820 is not set +# CONFIG_SND_AU8830 is not set +# CONFIG_SND_AZT3328 is not set +# CONFIG_SND_BT87X is not set +# CONFIG_SND_CA0106 is not set +# CONFIG_SND_CMIPCI is not set +# CONFIG_SND_CS4281 is not set +# CONFIG_SND_CS46XX is not set +# CONFIG_SND_DARLA20 is not set +# CONFIG_SND_GINA20 is not set +# CONFIG_SND_LAYLA20 is not set +# CONFIG_SND_DARLA24 is not set +# CONFIG_SND_GINA24 is not set +# CONFIG_SND_LAYLA24 is not set +# CONFIG_SND_MONA is not set +# CONFIG_SND_MIA is not set +# CONFIG_SND_ECHO3G is not set +# CONFIG_SND_INDIGO is not set +# CONFIG_SND_INDIGOIO is not set +# CONFIG_SND_INDIGODJ is not set +# CONFIG_SND_EMU10K1 is not set +# CONFIG_SND_EMU10K1X is not set +# CONFIG_SND_ENS1370 is not set +# CONFIG_SND_ENS1371 is not set +# CONFIG_SND_ES1938 is not set +# CONFIG_SND_ES1968 is not set +# CONFIG_SND_FM801 is not set +# CONFIG_SND_HDA_INTEL is not set +# CONFIG_SND_HDSP is not set +# CONFIG_SND_HDSPM is not set +# CONFIG_SND_ICE1712 is not set +# CONFIG_SND_ICE1724 is not set +# CONFIG_SND_INTEL8X0 is not set +# CONFIG_SND_INTEL8X0M is not set +# CONFIG_SND_KORG1212 is not set +# CONFIG_SND_MAESTRO3 is not set +# CONFIG_SND_MIXART is not set +# CONFIG_SND_NM256 is not set +# CONFIG_SND_PCXHR is not set +# CONFIG_SND_RIPTIDE is not set +# CONFIG_SND_RME32 is not set +# CONFIG_SND_RME96 is not set +# CONFIG_SND_RME9652 is not set +# CONFIG_SND_SONICVIBES is not set +# CONFIG_SND_TRIDENT is not set +# CONFIG_SND_VIA82XX is not set +# CONFIG_SND_VIA82XX_MODEM is not set +# CONFIG_SND_VX222 is not set +# CONFIG_SND_YMFPCI is not set + +# +# ALSA ARM devices +# + +# +# USB devices +# +CONFIG_SND_USB_AUDIO=m + +# +# SoC audio support +# +# CONFIG_SND_SOC is not set + +# +# Open Sound System +# +# CONFIG_SOUND_PRIME is not set + +# +# HID Devices +# +CONFIG_HID=m +# CONFIG_HID_DEBUG is not set + +# +# USB support +# +CONFIG_USB_ARCH_HAS_HCD=y +CONFIG_USB_ARCH_HAS_OHCI=y +CONFIG_USB_ARCH_HAS_EHCI=y +CONFIG_USB=y +# CONFIG_USB_DEBUG is not set + +# +# Miscellaneous USB options +# +CONFIG_USB_DEVICEFS=y +# CONFIG_USB_DYNAMIC_MINORS is not set +# CONFIG_USB_OTG is not set + +# +# USB Host Controller Drivers +# +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_EHCI_SPLIT_ISO=y +CONFIG_USB_EHCI_ROOT_HUB_TT=y +CONFIG_USB_EHCI_TT_NEWSCHED=y +# CONFIG_USB_EHCI_BIG_ENDIAN_MMIO is not set +# CONFIG_USB_ISP116X_HCD is not set +CONFIG_USB_OHCI_HCD=m +# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set +# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set +CONFIG_USB_OHCI_LITTLE_ENDIAN=y +CONFIG_USB_UHCI_HCD=m +# CONFIG_USB_U132_HCD is not set +# CONFIG_USB_SL811_HCD is not set + +# +# USB Device Class drivers +# +CONFIG_USB_ACM=m +CONFIG_USB_PRINTER=m + +# +# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' +# + +# +# may also be needed; see USB_STORAGE Help for more information +# +CONFIG_USB_STORAGE=y +# CONFIG_USB_STORAGE_DEBUG is not set +# CONFIG_USB_STORAGE_DATAFAB is not set +# CONFIG_USB_STORAGE_FREECOM is not set +# CONFIG_USB_STORAGE_DPCM is not set +# CONFIG_USB_STORAGE_USBAT is not set +# CONFIG_USB_STORAGE_SDDR09 is not set +# CONFIG_USB_STORAGE_SDDR55 is not set +# CONFIG_USB_STORAGE_JUMPSHOT is not set +# CONFIG_USB_STORAGE_ALAUDA is not set +CONFIG_USB_STORAGE_ONETOUCH=y +CONFIG_USB_STORAGE_KARMA=y +# CONFIG_USB_LIBUSUAL is not set + +# +# USB Input Devices +# +CONFIG_USB_HID=m +# CONFIG_USB_HIDINPUT_POWERBOOK is not set +# CONFIG_HID_FF is not set +CONFIG_USB_HIDDEV=y + +# +# USB HID Boot Protocol drivers +# +CONFIG_USB_KBD=m +# CONFIG_USB_MOUSE is not set +# CONFIG_USB_AIPTEK is not set +# CONFIG_USB_WACOM is not set +# CONFIG_USB_ACECAD is not set +# CONFIG_USB_KBTAB is not set +# CONFIG_USB_POWERMATE is not set +# CONFIG_USB_TOUCHSCREEN is not set +CONFIG_USB_YEALINK=m +# CONFIG_USB_XPAD is not set +# CONFIG_USB_ATI_REMOTE is not set +# CONFIG_USB_ATI_REMOTE2 is not set +# CONFIG_USB_KEYSPAN_REMOTE is not set +# CONFIG_USB_APPLETOUCH is not set +# CONFIG_USB_GTCO is not set + +# +# USB Imaging devices +# +# CONFIG_USB_MDC800 is not set +# CONFIG_USB_MICROTEK is not set + +# +# USB Network Adapters +# +CONFIG_USB_CATC=m +CONFIG_USB_KAWETH=m +CONFIG_USB_PEGASUS=m +CONFIG_USB_RTL8150=m +CONFIG_USB_USBNET_MII=m +CONFIG_USB_USBNET=m +CONFIG_USB_NET_AX8817X=m +CONFIG_USB_NET_CDCETHER=m +# CONFIG_USB_NET_DM9601 is not set +# CONFIG_USB_NET_GL620A is not set +CONFIG_USB_NET_NET1080=m +# CONFIG_USB_NET_PLUSB is not set +CONFIG_USB_NET_MCS7830=m +# CONFIG_USB_NET_RNDIS_HOST is not set +# CONFIG_USB_NET_CDC_SUBSET is not set +CONFIG_USB_NET_ZAURUS=m +# CONFIG_USB_MON is not set + +# +# USB port drivers +# + +# +# USB Serial Converter support +# +CONFIG_USB_SERIAL=m +CONFIG_USB_SERIAL_GENERIC=y +CONFIG_USB_SERIAL_AIRCABLE=m +# CONFIG_USB_SERIAL_AIRPRIME is not set +CONFIG_USB_SERIAL_ARK3116=m +CONFIG_USB_SERIAL_BELKIN=m +CONFIG_USB_SERIAL_WHITEHEAT=m +CONFIG_USB_SERIAL_DIGI_ACCELEPORT=m +CONFIG_USB_SERIAL_CP2101=m +CONFIG_USB_SERIAL_CYPRESS_M8=m +CONFIG_USB_SERIAL_EMPEG=m +CONFIG_USB_SERIAL_FTDI_SIO=m +CONFIG_USB_SERIAL_FUNSOFT=m +CONFIG_USB_SERIAL_VISOR=m +CONFIG_USB_SERIAL_IPAQ=m +CONFIG_USB_SERIAL_IR=m +CONFIG_USB_SERIAL_EDGEPORT=m +CONFIG_USB_SERIAL_EDGEPORT_TI=m +CONFIG_USB_SERIAL_GARMIN=m +CONFIG_USB_SERIAL_IPW=m +CONFIG_USB_SERIAL_KEYSPAN_PDA=m +CONFIG_USB_SERIAL_KEYSPAN=m +CONFIG_USB_SERIAL_KEYSPAN_MPR=y +CONFIG_USB_SERIAL_KEYSPAN_USA28=y +CONFIG_USB_SERIAL_KEYSPAN_USA28X=y +CONFIG_USB_SERIAL_KEYSPAN_USA28XA=y +CONFIG_USB_SERIAL_KEYSPAN_USA28XB=y +CONFIG_USB_SERIAL_KEYSPAN_USA19=y +CONFIG_USB_SERIAL_KEYSPAN_USA18X=y +CONFIG_USB_SERIAL_KEYSPAN_USA19W=y +CONFIG_USB_SERIAL_KEYSPAN_USA19QW=y +CONFIG_USB_SERIAL_KEYSPAN_USA19QI=y +CONFIG_USB_SERIAL_KEYSPAN_USA49W=y +CONFIG_USB_SERIAL_KEYSPAN_USA49WLC=y +CONFIG_USB_SERIAL_KLSI=m +CONFIG_USB_SERIAL_KOBIL_SCT=m +CONFIG_USB_SERIAL_MCT_U232=m +CONFIG_USB_SERIAL_MOS7720=m +CONFIG_USB_SERIAL_MOS7840=m +CONFIG_USB_SERIAL_NAVMAN=m +CONFIG_USB_SERIAL_PL2303=m +# CONFIG_USB_SERIAL_HP4X is not set +CONFIG_USB_SERIAL_SAFE=m +# CONFIG_USB_SERIAL_SAFE_PADDED is not set +# CONFIG_USB_SERIAL_SIERRAWIRELESS is not set +CONFIG_USB_SERIAL_TI=m +CONFIG_USB_SERIAL_CYBERJACK=m +CONFIG_USB_SERIAL_XIRCOM=m +# CONFIG_USB_SERIAL_OPTION is not set +CONFIG_USB_SERIAL_OMNINET=m +# CONFIG_USB_SERIAL_DEBUG is not set +CONFIG_USB_EZUSB=y + +# +# USB Miscellaneous drivers +# +# CONFIG_USB_EMI62 is not set +# CONFIG_USB_EMI26 is not set +CONFIG_USB_ADUTUX=m +# CONFIG_USB_AUERSWALD is not set +# CONFIG_USB_RIO500 is not set +# CONFIG_USB_LEGOTOWER is not set +# CONFIG_USB_LCD is not set +# CONFIG_USB_BERRY_CHARGE is not set +# CONFIG_USB_LED is not set +# CONFIG_USB_CYPRESS_CY7C63 is not set +# CONFIG_USB_CYTHERM is not set +CONFIG_USB_PHIDGET=m +CONFIG_USB_PHIDGETKIT=m +CONFIG_USB_PHIDGETMOTORCONTROL=m +CONFIG_USB_PHIDGETSERVO=m +# CONFIG_USB_IDMOUSE is not set +CONFIG_USB_FTDI_ELAN=m +# CONFIG_USB_APPLEDISPLAY is not set +CONFIG_USB_SISUSBVGA=m +# CONFIG_USB_LD is not set +# CONFIG_USB_TRANCEVIBRATOR is not set +# CONFIG_USB_IOWARRIOR is not set +# CONFIG_USB_TEST is not set + +# +# USB DSL modem support +# + +# +# USB Gadget Support +# +# CONFIG_USB_GADGET is not set + +# +# MMC/SD Card support +# +# CONFIG_MMC is not set + +# +# Real Time Clock +# +CONFIG_RTC_LIB=y +CONFIG_RTC_CLASS=y +CONFIG_RTC_HCTOSYS=y +CONFIG_RTC_HCTOSYS_DEVICE="rtc0" +# CONFIG_RTC_DEBUG is not set + +# +# RTC interfaces +# +CONFIG_RTC_INTF_SYSFS=y +CONFIG_RTC_INTF_PROC=y +CONFIG_RTC_INTF_DEV=y +# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set + +# +# RTC drivers +# +# CONFIG_RTC_DRV_CMOS is not set +CONFIG_RTC_DRV_X1205=y +CONFIG_RTC_DRV_DS1307=y +# CONFIG_RTC_DRV_DS1553 is not set +CONFIG_RTC_DRV_ISL1208=y +CONFIG_RTC_DRV_DS1672=y +# CONFIG_RTC_DRV_DS1742 is not set +CONFIG_RTC_DRV_PCF8563=y +# CONFIG_RTC_DRV_RS5C372 is not set +# CONFIG_RTC_DRV_M48T86 is not set +# CONFIG_RTC_DRV_TEST is not set +# CONFIG_RTC_DRV_V3020 is not set + +# +# File systems +# +CONFIG_EXT2_FS=m +CONFIG_EXT2_FS_XATTR=y +CONFIG_EXT2_FS_POSIX_ACL=y +CONFIG_EXT2_FS_SECURITY=y +# CONFIG_EXT2_FS_XIP is not set +CONFIG_EXT3_FS=m +CONFIG_EXT3_FS_XATTR=y +CONFIG_EXT3_FS_POSIX_ACL=y +CONFIG_EXT3_FS_SECURITY=y +# CONFIG_EXT4DEV_FS is not set +CONFIG_JBD=m +# CONFIG_JBD_DEBUG is not set +CONFIG_FS_MBCACHE=m +CONFIG_REISERFS_FS=m +# CONFIG_REISERFS_CHECK is not set +# CONFIG_REISERFS_PROC_INFO is not set +CONFIG_REISERFS_FS_XATTR=y +CONFIG_REISERFS_FS_POSIX_ACL=y +CONFIG_REISERFS_FS_SECURITY=y +# CONFIG_JFS_FS is not set +CONFIG_FS_POSIX_ACL=y +# CONFIG_XFS_FS is not set +# CONFIG_GFS2_FS is not set +# CONFIG_OCFS2_FS is not set +# CONFIG_MINIX_FS is not set +# CONFIG_ROMFS_FS is not set +CONFIG_INOTIFY=y +CONFIG_INOTIFY_USER=y +# CONFIG_QUOTA is not set +CONFIG_DNOTIFY=y +# CONFIG_AUTOFS_FS is not set +CONFIG_AUTOFS4_FS=m +CONFIG_FUSE_FS=m + +# +# CD-ROM/DVD Filesystems +# +CONFIG_ISO9660_FS=m +CONFIG_JOLIET=y +CONFIG_ZISOFS=y +CONFIG_UDF_FS=m +CONFIG_UDF_NLS=y + +# +# DOS/FAT/NT Filesystems +# +CONFIG_FAT_FS=m +CONFIG_MSDOS_FS=m +CONFIG_VFAT_FS=m +CONFIG_FAT_DEFAULT_CODEPAGE=437 +CONFIG_FAT_DEFAULT_IOCHARSET="utf8" +CONFIG_NTFS_FS=m +# CONFIG_NTFS_DEBUG is not set +CONFIG_NTFS_RW=y + +# +# Pseudo filesystems +# +CONFIG_PROC_FS=y +CONFIG_PROC_SYSCTL=y +CONFIG_SYSFS=y +CONFIG_TMPFS=y +# CONFIG_TMPFS_POSIX_ACL is not set +# CONFIG_HUGETLB_PAGE is not set +CONFIG_RAMFS=y +# CONFIG_CONFIGFS_FS is not set + +# +# Miscellaneous filesystems +# +# CONFIG_ADFS_FS is not set +# CONFIG_AFFS_FS is not set +# CONFIG_HFS_FS is not set +# CONFIG_HFSPLUS_FS is not set +# CONFIG_BEFS_FS is not set +# CONFIG_BFS_FS is not set +# CONFIG_EFS_FS is not set +CONFIG_JFFS2_FS=y +CONFIG_JFFS2_FS_DEBUG=0 +CONFIG_JFFS2_FS_WRITEBUFFER=y +# CONFIG_JFFS2_SUMMARY is not set +# CONFIG_JFFS2_FS_XATTR is not set +# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set +CONFIG_JFFS2_ZLIB=y +CONFIG_JFFS2_RTIME=y +# CONFIG_JFFS2_RUBIN is not set +# CONFIG_CRAMFS is not set +CONFIG_SQUASHFS=m +# CONFIG_SQUASHFS_EMBEDDED is not set +CONFIG_SQUASHFS_FRAGMENT_CACHE_SIZE=3 +# CONFIG_SQUASHFS_VMALLOC is not set +# CONFIG_VXFS_FS is not set +# CONFIG_HPFS_FS is not set +# CONFIG_QNX4FS_FS is not set +# CONFIG_SYSV_FS is not set +# CONFIG_UFS_FS is not set + +# +# Network File Systems +# +CONFIG_NFS_FS=m +CONFIG_NFS_V3=y +# CONFIG_NFS_V3_ACL is not set +# CONFIG_NFS_V4 is not set +# CONFIG_NFS_DIRECTIO is not set +CONFIG_NFSD=m +CONFIG_NFSD_V3=y +# CONFIG_NFSD_V3_ACL is not set +CONFIG_NFSD_V4=y +CONFIG_NFSD_TCP=y +CONFIG_LOCKD=m +CONFIG_LOCKD_V4=y +CONFIG_EXPORTFS=m +CONFIG_NFS_COMMON=y +CONFIG_SUNRPC=m +CONFIG_SUNRPC_GSS=m +CONFIG_RPCSEC_GSS_KRB5=m +# CONFIG_RPCSEC_GSS_SPKM3 is not set +CONFIG_SMB_FS=m +# CONFIG_SMB_NLS_DEFAULT is not set +CONFIG_CIFS=m +# CONFIG_CIFS_STATS is not set +# CONFIG_CIFS_WEAK_PW_HASH is not set +CONFIG_CIFS_XATTR=y +CONFIG_CIFS_POSIX=y +# CONFIG_CIFS_DEBUG2 is not set +# CONFIG_CIFS_EXPERIMENTAL is not set +# CONFIG_NCP_FS is not set +# CONFIG_CODA_FS is not set +# CONFIG_AFS_FS is not set +# CONFIG_9P_FS is not set + +# +# Partition Types +# +CONFIG_PARTITION_ADVANCED=y +# CONFIG_ACORN_PARTITION is not set +# CONFIG_OSF_PARTITION is not set +# CONFIG_AMIGA_PARTITION is not set +# CONFIG_ATARI_PARTITION is not set +# CONFIG_MAC_PARTITION is not set +CONFIG_MSDOS_PARTITION=y +# CONFIG_BSD_DISKLABEL is not set +# CONFIG_MINIX_SUBPARTITION is not set +# CONFIG_SOLARIS_X86_PARTITION is not set +# CONFIG_UNIXWARE_DISKLABEL is not set +# CONFIG_LDM_PARTITION is not set +# CONFIG_SGI_PARTITION is not set +# CONFIG_ULTRIX_PARTITION is not set +# CONFIG_SUN_PARTITION is not set +# CONFIG_KARMA_PARTITION is not set +# CONFIG_EFI_PARTITION is not set + +# +# Native Language Support +# +CONFIG_NLS=m +CONFIG_NLS_DEFAULT="utf8" +CONFIG_NLS_CODEPAGE_437=m +CONFIG_NLS_CODEPAGE_737=m +CONFIG_NLS_CODEPAGE_775=m +CONFIG_NLS_CODEPAGE_850=m +CONFIG_NLS_CODEPAGE_852=m +CONFIG_NLS_CODEPAGE_855=m +CONFIG_NLS_CODEPAGE_857=m +CONFIG_NLS_CODEPAGE_860=m +CONFIG_NLS_CODEPAGE_861=m +CONFIG_NLS_CODEPAGE_862=m +CONFIG_NLS_CODEPAGE_863=m +CONFIG_NLS_CODEPAGE_864=m +CONFIG_NLS_CODEPAGE_865=m +CONFIG_NLS_CODEPAGE_866=m +CONFIG_NLS_CODEPAGE_869=m +CONFIG_NLS_CODEPAGE_936=m +CONFIG_NLS_CODEPAGE_950=m +CONFIG_NLS_CODEPAGE_932=m +CONFIG_NLS_CODEPAGE_949=m +CONFIG_NLS_CODEPAGE_874=m +CONFIG_NLS_ISO8859_8=m +CONFIG_NLS_CODEPAGE_1250=m +CONFIG_NLS_CODEPAGE_1251=m +CONFIG_NLS_ASCII=m +CONFIG_NLS_ISO8859_1=m +CONFIG_NLS_ISO8859_2=m +CONFIG_NLS_ISO8859_3=m +CONFIG_NLS_ISO8859_4=m +CONFIG_NLS_ISO8859_5=m +CONFIG_NLS_ISO8859_6=m +CONFIG_NLS_ISO8859_7=m +CONFIG_NLS_ISO8859_9=m +CONFIG_NLS_ISO8859_13=m +CONFIG_NLS_ISO8859_14=m +CONFIG_NLS_ISO8859_15=m +CONFIG_NLS_KOI8_R=m +CONFIG_NLS_KOI8_U=m +CONFIG_NLS_UTF8=m + +# +# Distributed Lock Manager +# +# CONFIG_DLM is not set + +# +# Profiling support +# +# CONFIG_PROFILING is not set + +# +# Kernel hacking +# +# CONFIG_PRINTK_TIME is not set +CONFIG_ENABLE_MUST_CHECK=y +# CONFIG_MAGIC_SYSRQ is not set +# CONFIG_UNUSED_SYMBOLS is not set +# CONFIG_DEBUG_FS is not set +# CONFIG_HEADERS_CHECK is not set +# CONFIG_DEBUG_KERNEL is not set +CONFIG_LOG_BUF_SHIFT=14 +# CONFIG_DEBUG_BUGVERBOSE is not set +CONFIG_FRAME_POINTER=y +# CONFIG_DEBUG_USER is not set + +# +# Security options +# +# CONFIG_KEYS is not set +# CONFIG_SECURITY is not set + +# +# Cryptographic options +# +CONFIG_CRYPTO=y +CONFIG_CRYPTO_ALGAPI=y +CONFIG_CRYPTO_BLKCIPHER=y +CONFIG_CRYPTO_HASH=y +CONFIG_CRYPTO_MANAGER=y +CONFIG_CRYPTO_HMAC=y +# CONFIG_CRYPTO_XCBC is not set +# CONFIG_CRYPTO_NULL is not set +CONFIG_CRYPTO_MD4=m +CONFIG_CRYPTO_MD5=y +CONFIG_CRYPTO_SHA1=m +CONFIG_CRYPTO_SHA256=m +CONFIG_CRYPTO_SHA512=m +CONFIG_CRYPTO_WP512=m +CONFIG_CRYPTO_TGR192=m +# CONFIG_CRYPTO_GF128MUL is not set +CONFIG_CRYPTO_ECB=m +CONFIG_CRYPTO_CBC=y +CONFIG_CRYPTO_PCBC=m +# CONFIG_CRYPTO_LRW is not set +CONFIG_CRYPTO_DES=y +# CONFIG_CRYPTO_FCRYPT is not set +CONFIG_CRYPTO_BLOWFISH=m +CONFIG_CRYPTO_TWOFISH=m +CONFIG_CRYPTO_TWOFISH_COMMON=m +CONFIG_CRYPTO_SERPENT=m +CONFIG_CRYPTO_AES=m +CONFIG_CRYPTO_CAST5=m +CONFIG_CRYPTO_CAST6=m +CONFIG_CRYPTO_TEA=m +CONFIG_CRYPTO_ARC4=m +CONFIG_CRYPTO_KHAZAD=m +CONFIG_CRYPTO_ANUBIS=m +CONFIG_CRYPTO_DEFLATE=m +CONFIG_CRYPTO_MICHAEL_MIC=m +CONFIG_CRYPTO_CRC32C=m +# CONFIG_CRYPTO_CAMELLIA is not set +CONFIG_CRYPTO_TEST=m + +# +# Hardware crypto devices +# + +# +# Library routines +# +CONFIG_BITREVERSE=y +CONFIG_CRC_CCITT=m +CONFIG_CRC16=y +CONFIG_CRC32=y +CONFIG_LIBCRC32C=m +CONFIG_ZLIB_INFLATE=y +CONFIG_ZLIB_DEFLATE=y +CONFIG_TEXTSEARCH=y +CONFIG_TEXTSEARCH_KMP=m +CONFIG_TEXTSEARCH_BM=m +CONFIG_TEXTSEARCH_FSM=m +CONFIG_PLIST=y +CONFIG_HAS_IOMEM=y +CONFIG_HAS_IOPORT=y diff --git a/packages/linux/ixp4xx-kernel_2.6.21.bb b/packages/linux/ixp4xx-kernel_2.6.21.bb new file mode 100644 index 0000000000..b998d5933d --- /dev/null +++ b/packages/linux/ixp4xx-kernel_2.6.21.bb @@ -0,0 +1,24 @@ +# Kernel for IXP4xx +# +# This bitbake file pulls patches and the defconfig straight +# from the NSLU2-Linux SVN repository. Information about this +# repository can be found at: +# http://trac.nslu2-linux.org/kernel/ +# +# The revision that is pulled from SVN is specified below +IXP4XX_KERNEL_SVN_REV = "824" +# +# The directory containing the patches to be applied is +# specified below +IXP4XX_KERNEL_PATCH_DIR = "2.6.21" +# +# Increment the number below (i.e. the digits after PR) when +# the changes in SVN between revisions include changes in the +# patches applied to the kernel, rather than simply defconfig +# changes +PR = "r0.${IXP4XX_KERNEL_SVN_REV}" + +require ixp4xx-kernel.inc +require ixp4xx-kernel-svnpatch.inc + +SRC_URI += "file://defconfig" diff --git a/packages/linux/linux-efika/0001-powerpc-Add-device-tree-fixup-for-the-EFIKA.txt b/packages/linux/linux-efika/0001-powerpc-Add-device-tree-fixup-for-the-EFIKA.txt new file mode 100644 index 0000000000..332ce4df19 --- /dev/null +++ b/packages/linux/linux-efika/0001-powerpc-Add-device-tree-fixup-for-the-EFIKA.txt @@ -0,0 +1,99 @@ +From 6c8a0f1870285e82dc473d31ac297d570460dd66 Mon Sep 17 00:00:00 2001 +From: Sylvain Munaut <tnt@246tNt.com> +Date: Thu, 21 Dec 2006 22:26:39 +0100 +Subject: [PATCH] powerpc: Add device tree fixup for the EFIKA + +We make the efika device tree compliant with the defined bindings +(at least compliant enough). We also add some missing bits. + +Signed-off-by: Sylvain Munaut <tnt@246tNt.com> +--- + arch/powerpc/kernel/prom_init.c | 74 +++++++++++++++++++++++++++++++++++++++ + 1 files changed, 74 insertions(+), 0 deletions(-) + +diff --git a/arch/powerpc/kernel/prom_init.c b/arch/powerpc/kernel/prom_init.c +index 520ef42..294e875 100644 +--- a/arch/powerpc/kernel/prom_init.c ++++ b/arch/powerpc/kernel/prom_init.c +@@ -2117,11 +2117,78 @@ #else + #define fixup_device_tree_pmac() + #endif + ++#ifdef CONFIG_PPC_EFIKA ++/* The current fw of the Efika has a device tree needs quite a few ++ * fixups to be compliant with the mpc52xx bindings. It's currently ++ * unknown if it will ever be compliant (come on bPlan ...) so we do fixups. ++ * NOTE that we (barely) tolerate it because the EFIKA was out before ++ * the bindings were finished, for any new boards -> RTFM ! */ ++ ++struct subst_entry { ++ char *path; ++ char *property; ++ void *value; ++ int value_len; ++}; ++ ++static void __init fixup_device_tree_efika(void) ++{ ++ /* Substitution table */ ++ #define prop_cstr(x) x, sizeof(x) ++ int prop_sound_irq[3] = { 2, 2, 0 }; ++ struct subst_entry efika_subst_table[] = { ++ { "/builtin/sound", "compatible", prop_cstr("mpc5200b-psc-ac97\0mpc52xx-psc-ac97") }, ++ { "/builtin/sound", "interrupts", prop_sound_irq, sizeof(prop_sound_irq) }, ++ {} ++ }; ++ #undef prop_cstr ++ ++ /* Vars */ ++ u32 node; ++ char prop[64]; ++ int rv, i; ++ ++ /* Check if we're really running on a EFIKA */ ++ node = call_prom("finddevice", 1, 1, ADDR("/")); ++ if (!PHANDLE_VALID(node)) ++ return; ++ ++ rv = prom_getprop(node, "model", prop, sizeof(prop)); ++ if (rv == PROM_ERROR) ++ return; ++ if (strcmp(prop, "EFIKA5K2")) ++ return; ++ ++ prom_printf("Applying EFIKA device tree fixups\n"); ++ ++ /* Process substitution table */ ++ for (i=0; efika_subst_table[i].path; i++) { ++ struct subst_entry *se = &efika_subst_table[i]; ++ ++ node = call_prom("finddevice", 1, 1, ADDR(se->path)); ++ if (!PHANDLE_VALID(node)) { ++ prom_printf("fixup_device_tree_efika: ", ++ "skipped entry %x - not found\n", i); ++ continue; ++ } ++ ++ rv = prom_setprop(node, se->path, se->property, ++ se->value, se->value_len ); ++ if (rv == PROM_ERROR) ++ prom_printf("fixup_device_tree_efika: ", ++ "skipped entry %x - setprop error\n", i); ++ } ++} ++#else ++#define fixup_device_tree_efika() ++#endif ++ + static void __init fixup_device_tree(void) + { + fixup_device_tree_maple(); + fixup_device_tree_chrp(); + fixup_device_tree_pmac(); ++ fixup_device_tree_efika(); + } + + static void __init prom_find_boot_cpu(void) +-- +1.4.2 + diff --git a/packages/linux/linux-efika_2.6.18+2.6.19-rc6.bb b/packages/linux/linux-efika_2.6.18+2.6.19-rc6.bb index fec05ad168..7c28e7270e 100644 --- a/packages/linux/linux-efika_2.6.18+2.6.19-rc6.bb +++ b/packages/linux/linux-efika_2.6.18+2.6.19-rc6.bb @@ -1,13 +1,13 @@ DESCRIPTION = "Linux Kernel for the EFIKA dev platform" SECTION = "kernel" LICENSE = "GPL" -PR = "r2" +PR = "r3" COMPATIBLE_MACHINE = "efika" SRC_URI = "http://www.efika.de/download/linux-2.6.19-rc6_efika.tgz \ file://0001-sound-Add-support-for-the-MPC52xx-PSC-AC97-Link.txt;patch=1 \ - http://www.246tnt.com/files/0001-powerpc-Add-device-tree-fixup-for-the-EFIKA.txt;patch=1 \ + file://0001-powerpc-Add-device-tree-fixup-for-the-EFIKA.txt;patch=1 \ file://defconfig \ " # http://www.246tnt.com/files/0001-sound-Add-support-for-the-MPC52xx-PSC-AC97-Link.txt;patch=1 \ @@ -23,7 +23,7 @@ KERNEL_IMAGETYPE = "zImage" do_configure() { install -m 644 ${WORKDIR}/defconfig ${S}/.config - make ARCH=${ARCH} oldconfig + yes | make ARCH=${ARCH} oldconfig } do_deploy() { diff --git a/packages/linux/linux-ezx-2.6.20.7/.mtn2git_empty b/packages/linux/linux-ezx-2.6.20.7/.mtn2git_empty new file mode 100644 index 0000000000..e69de29bb2 --- /dev/null +++ b/packages/linux/linux-ezx-2.6.20.7/.mtn2git_empty diff --git a/packages/linux/linux-ezx-2.6.20.7/defconfig-a780 b/packages/linux/linux-ezx-2.6.20.7/defconfig-a780 new file mode 100644 index 0000000000..a9300a61f5 --- /dev/null +++ b/packages/linux/linux-ezx-2.6.20.7/defconfig-a780 @@ -0,0 +1,1249 @@ +# +# Automatically generated make config: don't edit +# Linux kernel version: 2.6.20.7 +# Sun Apr 22 15:03:36 2007 +# +CONFIG_ARM=y +# CONFIG_GENERIC_TIME is not set +CONFIG_MMU=y +CONFIG_GENERIC_HARDIRQS=y +CONFIG_TRACE_IRQFLAGS_SUPPORT=y +CONFIG_HARDIRQS_SW_RESEND=y +CONFIG_GENERIC_IRQ_PROBE=y +CONFIG_RWSEM_GENERIC_SPINLOCK=y +# CONFIG_ARCH_HAS_ILOG2_U32 is not set +# CONFIG_ARCH_HAS_ILOG2_U64 is not set +CONFIG_GENERIC_HWEIGHT=y +CONFIG_GENERIC_CALIBRATE_DELAY=y +CONFIG_ARCH_MTD_XIP=y +CONFIG_VECTORS_BASE=0xffff0000 +CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" + +# +# Code maturity level options +# +CONFIG_EXPERIMENTAL=y +CONFIG_BROKEN_ON_SMP=y +CONFIG_INIT_ENV_ARG_LIMIT=32 + +# +# General setup +# +CONFIG_LOCALVERSION="-ezxdev" +# CONFIG_LOCALVERSION_AUTO is not set +# CONFIG_SWAP is not set +CONFIG_SYSVIPC=y +# CONFIG_IPC_NS is not set +# CONFIG_POSIX_MQUEUE is not set +# CONFIG_BSD_PROCESS_ACCT is not set +# CONFIG_TASKSTATS is not set +# CONFIG_UTS_NS is not set +# CONFIG_AUDIT is not set +CONFIG_IKCONFIG=y +CONFIG_IKCONFIG_PROC=y +# CONFIG_SYSFS_DEPRECATED is not set +# CONFIG_RELAY is not set +CONFIG_INITRAMFS_SOURCE="" +CONFIG_CC_OPTIMIZE_FOR_SIZE=y +CONFIG_SYSCTL=y +# CONFIG_EMBEDDED is not set +CONFIG_UID16=y +CONFIG_SYSCTL_SYSCALL=y +CONFIG_KALLSYMS=y +# CONFIG_KALLSYMS_ALL is not set +# CONFIG_KALLSYMS_EXTRA_PASS is not set +CONFIG_HOTPLUG=y +CONFIG_PRINTK=y +CONFIG_BUG=y +CONFIG_ELF_CORE=y +CONFIG_BASE_FULL=y +CONFIG_FUTEX=y +CONFIG_EPOLL=y +CONFIG_SHMEM=y +CONFIG_SLAB=y +CONFIG_VM_EVENT_COUNTERS=y +CONFIG_RT_MUTEXES=y +# CONFIG_TINY_SHMEM is not set +CONFIG_BASE_SMALL=0 +# CONFIG_SLOB is not set + +# +# Loadable module support +# +CONFIG_MODULES=y +CONFIG_MODULE_UNLOAD=y +CONFIG_MODULE_FORCE_UNLOAD=y +CONFIG_MODVERSIONS=y +# CONFIG_MODULE_SRCVERSION_ALL is not set +CONFIG_KMOD=y + +# +# Block layer +# +CONFIG_BLOCK=y +# CONFIG_LBD is not set +# CONFIG_BLK_DEV_IO_TRACE is not set +# CONFIG_LSF is not set + +# +# IO Schedulers +# +CONFIG_IOSCHED_NOOP=y +CONFIG_IOSCHED_AS=y +CONFIG_IOSCHED_DEADLINE=m +CONFIG_IOSCHED_CFQ=m +CONFIG_DEFAULT_AS=y +# CONFIG_DEFAULT_DEADLINE is not set +# CONFIG_DEFAULT_CFQ is not set +# CONFIG_DEFAULT_NOOP is not set +CONFIG_DEFAULT_IOSCHED="anticipatory" + +# +# System Type +# +# CONFIG_ARCH_AAEC2000 is not set +# CONFIG_ARCH_INTEGRATOR is not set +# CONFIG_ARCH_REALVIEW is not set +# CONFIG_ARCH_VERSATILE is not set +# CONFIG_ARCH_AT91 is not set +# CONFIG_ARCH_CLPS7500 is not set +# CONFIG_ARCH_CLPS711X is not set +# CONFIG_ARCH_CO285 is not set +# CONFIG_ARCH_EBSA110 is not set +# CONFIG_ARCH_EP93XX is not set +# CONFIG_ARCH_FOOTBRIDGE is not set +# CONFIG_ARCH_NETX is not set +# CONFIG_ARCH_H720X is not set +# CONFIG_ARCH_IMX is not set +# CONFIG_ARCH_IOP32X is not set +# CONFIG_ARCH_IOP33X is not set +# CONFIG_ARCH_IOP13XX is not set +# CONFIG_ARCH_IXP4XX is not set +# CONFIG_ARCH_IXP2000 is not set +# CONFIG_ARCH_IXP23XX is not set +# CONFIG_ARCH_L7200 is not set +# CONFIG_ARCH_PNX4008 is not set +CONFIG_ARCH_PXA=y +# CONFIG_ARCH_RPC is not set +# CONFIG_ARCH_SA1100 is not set +# CONFIG_ARCH_S3C2410 is not set +# CONFIG_ARCH_SHARK is not set +# CONFIG_ARCH_LH7A40X is not set +# CONFIG_ARCH_OMAP is not set + +# +# Intel PXA2xx Implementations +# +# CONFIG_ARCH_LUBBOCK is not set +# CONFIG_MACH_LOGICPD_PXA270 is not set +# CONFIG_MACH_MAINSTONE is not set +# CONFIG_ARCH_PXA_IDP is not set +# CONFIG_PXA_SHARPSL is not set +# CONFIG_MACH_TRIZEPS4 is not set +CONFIG_PXA_EZX=y +# CONFIG_PXA_EZX_E680 is not set +CONFIG_PXA_EZX_A780=y +# CONFIG_PXA_EZX_E2 is not set +CONFIG_PXA27x=y +CONFIG_PXA_SSP=y + +# +# Processor Type +# +CONFIG_CPU_32=y +CONFIG_CPU_XSCALE=y +CONFIG_CPU_32v5=y +CONFIG_CPU_ABRT_EV5T=y +CONFIG_CPU_CACHE_VIVT=y +CONFIG_CPU_TLB_V4WBI=y +CONFIG_CPU_CP15=y +CONFIG_CPU_CP15_MMU=y + +# +# Processor Features +# +CONFIG_ARM_THUMB=y +# CONFIG_CPU_DCACHE_DISABLE is not set +CONFIG_IWMMXT=y +CONFIG_XSCALE_PMU=y + +# +# Bus support +# + +# +# PCCARD (PCMCIA/CardBus) support +# +# CONFIG_PCCARD is not set + +# +# Kernel Features +# +# CONFIG_PREEMPT is not set +CONFIG_NO_IDLE_HZ=y +CONFIG_HZ=100 +CONFIG_AEABI=y +CONFIG_OABI_COMPAT=y +# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set +CONFIG_SELECT_MEMORY_MODEL=y +CONFIG_FLATMEM_MANUAL=y +# CONFIG_DISCONTIGMEM_MANUAL is not set +# CONFIG_SPARSEMEM_MANUAL is not set +CONFIG_FLATMEM=y +CONFIG_FLAT_NODE_MEM_MAP=y +# CONFIG_SPARSEMEM_STATIC is not set +CONFIG_SPLIT_PTLOCK_CPUS=4096 +# CONFIG_RESOURCES_64BIT is not set +CONFIG_ALIGNMENT_TRAP=y + +# +# Boot options +# +CONFIG_ZBOOT_ROM_TEXT=0 +CONFIG_ZBOOT_ROM_BSS=0 +CONFIG_CMDLINE="console=tty1 noinitrd root=/dev/mmcblk0p2 rootfstype=ext3 ip=169.254.1.11:169.254.1.10:169.254.1.10:255.255.255.254:ezx:usb0:off debug mem=32M@0xA0000000 mem=16M@0xAC000000" +# CONFIG_XIP_KERNEL is not set + +# +# Floating point emulation +# + +# +# At least one emulation must be selected +# +CONFIG_FPE_NWFPE=y +# CONFIG_FPE_NWFPE_XP is not set +# CONFIG_FPE_FASTFPE is not set + +# +# Userspace binary formats +# +CONFIG_BINFMT_ELF=y +CONFIG_BINFMT_AOUT=m +CONFIG_BINFMT_MISC=m + +# +# Power management options +# +# CONFIG_PM is not set +# CONFIG_APM is not set + +# +# Networking +# +CONFIG_NET=y + +# +# Networking options +# +# CONFIG_NETDEBUG is not set +CONFIG_PACKET=y +# CONFIG_PACKET_MMAP is not set +CONFIG_UNIX=y +CONFIG_XFRM=y +# CONFIG_XFRM_USER is not set +# CONFIG_XFRM_SUB_POLICY is not set +# CONFIG_NET_KEY is not set +CONFIG_INET=y +# CONFIG_IP_MULTICAST is not set +# CONFIG_IP_ADVANCED_ROUTER is not set +CONFIG_IP_FIB_HASH=y +CONFIG_IP_PNP=y +CONFIG_IP_PNP_DHCP=y +# CONFIG_IP_PNP_BOOTP is not set +# CONFIG_IP_PNP_RARP is not set +# CONFIG_NET_IPIP is not set +# CONFIG_NET_IPGRE is not set +# CONFIG_ARPD is not set +CONFIG_SYN_COOKIES=y +# CONFIG_INET_AH is not set +# CONFIG_INET_ESP is not set +# CONFIG_INET_IPCOMP is not set +# CONFIG_INET_XFRM_TUNNEL is not set +# CONFIG_INET_TUNNEL is not set +CONFIG_INET_XFRM_MODE_TRANSPORT=y +CONFIG_INET_XFRM_MODE_TUNNEL=y +CONFIG_INET_XFRM_MODE_BEET=y +CONFIG_INET_DIAG=y +CONFIG_INET_TCP_DIAG=y +# CONFIG_TCP_CONG_ADVANCED is not set +CONFIG_TCP_CONG_CUBIC=y +CONFIG_DEFAULT_TCP_CONG="cubic" +# CONFIG_TCP_MD5SIG is not set +# CONFIG_IPV6 is not set +# CONFIG_INET6_XFRM_TUNNEL is not set +# CONFIG_INET6_TUNNEL is not set +# CONFIG_NETWORK_SECMARK is not set +# CONFIG_NETFILTER is not set + +# +# DCCP Configuration (EXPERIMENTAL) +# +# CONFIG_IP_DCCP is not set + +# +# SCTP Configuration (EXPERIMENTAL) +# +# CONFIG_IP_SCTP is not set + +# +# TIPC Configuration (EXPERIMENTAL) +# +# CONFIG_TIPC is not set +# CONFIG_ATM is not set +# CONFIG_BRIDGE is not set +# CONFIG_VLAN_8021Q is not set +# CONFIG_DECNET is not set +# CONFIG_LLC2 is not set +# CONFIG_IPX is not set +# CONFIG_ATALK is not set +# CONFIG_X25 is not set +# CONFIG_LAPB is not set +# CONFIG_ECONET is not set +# CONFIG_WAN_ROUTER is not set + +# +# QoS and/or fair queueing +# +# CONFIG_NET_SCHED is not set + +# +# Network testing +# +# CONFIG_NET_PKTGEN is not set +# CONFIG_HAMRADIO is not set +# CONFIG_IRDA is not set +CONFIG_BT=m +CONFIG_BT_L2CAP=m +CONFIG_BT_SCO=m +CONFIG_BT_RFCOMM=m +CONFIG_BT_RFCOMM_TTY=y +CONFIG_BT_BNEP=m +CONFIG_BT_BNEP_MC_FILTER=y +CONFIG_BT_BNEP_PROTO_FILTER=y +CONFIG_BT_HIDP=m + +# +# Bluetooth device drivers +# +# CONFIG_BT_HCIUSB is not set +CONFIG_BT_HCIUART=m +CONFIG_BT_HCIUART_H4=y +# CONFIG_BT_HCIUART_BCSP is not set +# CONFIG_BT_HCIBCM203X is not set +# CONFIG_BT_HCIBPA10X is not set +# CONFIG_BT_HCIBFUSB is not set +# CONFIG_BT_HCIVHCI is not set +# CONFIG_IEEE80211 is not set + +# +# Device Drivers +# + +# +# Generic Driver Options +# +CONFIG_STANDALONE=y +CONFIG_PREVENT_FIRMWARE_BUILD=y +CONFIG_FW_LOADER=m +# CONFIG_DEBUG_DRIVER is not set +# CONFIG_SYS_HYPERVISOR is not set + +# +# Connector - unified userspace <-> kernelspace linker +# +CONFIG_CONNECTOR=m + +# +# Memory Technology Devices (MTD) +# +CONFIG_MTD=y +# CONFIG_MTD_DEBUG is not set +CONFIG_MTD_CONCAT=y +CONFIG_MTD_PARTITIONS=y +# CONFIG_MTD_REDBOOT_PARTS is not set +CONFIG_MTD_CMDLINE_PARTS=y +# CONFIG_MTD_AFS_PARTS is not set + +# +# User Modules And Translation Layers +# +CONFIG_MTD_CHAR=y +CONFIG_MTD_BLKDEVS=y +CONFIG_MTD_BLOCK=y +# CONFIG_FTL is not set +# CONFIG_NFTL is not set +# CONFIG_INFTL is not set +# CONFIG_RFD_FTL is not set +# CONFIG_SSFDC is not set + +# +# RAM/ROM/Flash chip drivers +# +CONFIG_MTD_CFI=y +# CONFIG_MTD_JEDECPROBE is not set +CONFIG_MTD_GEN_PROBE=y +CONFIG_MTD_CFI_ADV_OPTIONS=y +CONFIG_MTD_CFI_NOSWAP=y +# CONFIG_MTD_CFI_BE_BYTE_SWAP is not set +# CONFIG_MTD_CFI_LE_BYTE_SWAP is not set +CONFIG_MTD_CFI_GEOMETRY=y +# CONFIG_MTD_MAP_BANK_WIDTH_1 is not set +CONFIG_MTD_MAP_BANK_WIDTH_2=y +# CONFIG_MTD_MAP_BANK_WIDTH_4 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set +CONFIG_MTD_CFI_I1=y +# CONFIG_MTD_CFI_I2 is not set +# CONFIG_MTD_CFI_I4 is not set +# CONFIG_MTD_CFI_I8 is not set +# CONFIG_MTD_OTP is not set +CONFIG_MTD_CFI_INTELEXT=y +# CONFIG_MTD_CFI_AMDSTD is not set +# CONFIG_MTD_CFI_STAA is not set +CONFIG_MTD_CFI_UTIL=y +# CONFIG_MTD_RAM is not set +# CONFIG_MTD_ROM is not set +# CONFIG_MTD_ABSENT is not set +# CONFIG_MTD_OBSOLETE_CHIPS is not set +CONFIG_MTD_XIP=y + +# +# Mapping drivers for chip access +# +# CONFIG_MTD_COMPLEX_MAPPINGS is not set +# CONFIG_MTD_PHYSMAP is not set +# CONFIG_MTD_ARM_INTEGRATOR is not set +# CONFIG_MTD_SHARP_SL is not set +# CONFIG_MTD_PLATRAM is not set + +# +# Self-contained MTD device drivers +# +# CONFIG_MTD_DATAFLASH is not set +# CONFIG_MTD_M25P80 is not set +# CONFIG_MTD_SLRAM is not set +# CONFIG_MTD_PHRAM is not set +# CONFIG_MTD_MTDRAM is not set +# CONFIG_MTD_BLOCK2MTD is not set + +# +# Disk-On-Chip Device Drivers +# +# CONFIG_MTD_DOC2000 is not set +# CONFIG_MTD_DOC2001 is not set +# CONFIG_MTD_DOC2001PLUS is not set + +# +# NAND Flash Device Drivers +# +# CONFIG_MTD_NAND is not set + +# +# OneNAND Flash Device Drivers +# +# CONFIG_MTD_ONENAND is not set + +# +# Parallel port support +# +# CONFIG_PARPORT is not set + +# +# Plug and Play support +# + +# +# Block devices +# +# CONFIG_BLK_DEV_COW_COMMON is not set +CONFIG_BLK_DEV_LOOP=y +# CONFIG_BLK_DEV_CRYPTOLOOP is not set +# CONFIG_BLK_DEV_NBD is not set +# CONFIG_BLK_DEV_UB is not set +# CONFIG_BLK_DEV_RAM is not set +# CONFIG_BLK_DEV_INITRD is not set +# CONFIG_CDROM_PKTCDVD is not set +# CONFIG_ATA_OVER_ETH is not set + +# +# ATA/ATAPI/MFM/RLL support +# +# CONFIG_IDE is not set + +# +# SCSI device support +# +# CONFIG_RAID_ATTRS is not set +# CONFIG_SCSI is not set +# CONFIG_SCSI_NETLINK is not set + +# +# Serial ATA (prod) and Parallel ATA (experimental) drivers +# +# CONFIG_ATA is not set + +# +# Multi-device support (RAID and LVM) +# +# CONFIG_MD is not set + +# +# Fusion MPT device support +# +# CONFIG_FUSION is not set + +# +# IEEE 1394 (FireWire) support +# + +# +# I2O device support +# + +# +# Network device support +# +CONFIG_NETDEVICES=y +CONFIG_DUMMY=y +# CONFIG_BONDING is not set +# CONFIG_EQUALIZER is not set +# CONFIG_TUN is not set + +# +# PHY device support +# + +# +# Ethernet (10 or 100Mbit) +# +# CONFIG_NET_ETHERNET is not set + +# +# Ethernet (1000 Mbit) +# + +# +# Ethernet (10000 Mbit) +# + +# +# Token Ring devices +# + +# +# Wireless LAN (non-hamradio) +# +# CONFIG_NET_RADIO is not set + +# +# Wan interfaces +# +# CONFIG_WAN is not set +# CONFIG_PPP is not set +# CONFIG_SLIP is not set +# CONFIG_SHAPER is not set +# CONFIG_NETCONSOLE is not set +# CONFIG_NETPOLL is not set +# CONFIG_NET_POLL_CONTROLLER is not set + +# +# ISDN subsystem +# +# CONFIG_ISDN is not set + +# +# Input device support +# +CONFIG_INPUT=y +# CONFIG_INPUT_FF_MEMLESS is not set + +# +# Userland interfaces +# +CONFIG_INPUT_MOUSEDEV=y +CONFIG_INPUT_MOUSEDEV_PSAUX=y +CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 +CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 +# CONFIG_INPUT_JOYDEV is not set +CONFIG_INPUT_TSDEV=y +CONFIG_INPUT_TSDEV_SCREEN_X=240 +CONFIG_INPUT_TSDEV_SCREEN_Y=320 +CONFIG_INPUT_EVDEV=y +# CONFIG_INPUT_EVBUG is not set + +# +# Input Device Drivers +# +CONFIG_INPUT_KEYBOARD=y +# CONFIG_KEYBOARD_ATKBD is not set +# CONFIG_KEYBOARD_SUNKBD is not set +# CONFIG_KEYBOARD_LKKBD is not set +# CONFIG_KEYBOARD_XTKBD is not set +# CONFIG_KEYBOARD_NEWTON is not set +# CONFIG_KEYBOARD_STOWAWAY is not set +# CONFIG_INPUT_MOUSE is not set +# CONFIG_INPUT_JOYSTICK is not set +CONFIG_INPUT_TOUCHSCREEN=y +# CONFIG_TOUCHSCREEN_ADS7846 is not set +# CONFIG_TOUCHSCREEN_GUNZE is not set +# CONFIG_TOUCHSCREEN_ELO is not set +# CONFIG_TOUCHSCREEN_MTOUCH is not set +# CONFIG_TOUCHSCREEN_MK712 is not set +# CONFIG_TOUCHSCREEN_PENMOUNT is not set +# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set +# CONFIG_TOUCHSCREEN_TOUCHWIN is not set +# CONFIG_TOUCHSCREEN_UCB1400 is not set +# CONFIG_INPUT_MISC is not set + +# +# Hardware I/O ports +# +CONFIG_SERIO=y +# CONFIG_SERIO_SERPORT is not set +# CONFIG_SERIO_RAW is not set +# CONFIG_GAMEPORT is not set + +# +# Character devices +# +CONFIG_VT=y +CONFIG_VT_CONSOLE=y +CONFIG_HW_CONSOLE=y +# CONFIG_VT_HW_CONSOLE_BINDING is not set +# CONFIG_SERIAL_NONSTANDARD is not set + +# +# Serial drivers +# +# CONFIG_SERIAL_8250 is not set + +# +# Non-8250 serial port support +# +CONFIG_SERIAL_PXA=y +CONFIG_SERIAL_PXA_CONSOLE=y +CONFIG_SERIAL_CORE=y +CONFIG_SERIAL_CORE_CONSOLE=y +CONFIG_UNIX98_PTYS=y +CONFIG_LEGACY_PTYS=y +CONFIG_LEGACY_PTY_COUNT=8 + +# +# IPMI +# +# CONFIG_IPMI_HANDLER is not set + +# +# Watchdog Cards +# +# CONFIG_WATCHDOG is not set +# CONFIG_HW_RANDOM is not set +# CONFIG_NVRAM is not set +# CONFIG_DTLK is not set +# CONFIG_R3964 is not set +# CONFIG_RAW_DRIVER is not set + +# +# TPM devices +# +# CONFIG_TCG_TPM is not set + +# +# I2C support +# +CONFIG_I2C=y +CONFIG_I2C_CHARDEV=y + +# +# I2C Algorithms +# +# CONFIG_I2C_ALGOBIT is not set +# CONFIG_I2C_ALGOPCF is not set +# CONFIG_I2C_ALGOPCA is not set + +# +# I2C Hardware Bus support +# +CONFIG_I2C_PXA=y +# CONFIG_I2C_PXA_SLAVE is not set +# CONFIG_I2C_OCORES is not set +# CONFIG_I2C_PARPORT_LIGHT is not set +# CONFIG_I2C_STUB is not set +# CONFIG_I2C_PCA_ISA is not set + +# +# Miscellaneous I2C Chip support +# +# CONFIG_SENSORS_DS1337 is not set +# CONFIG_SENSORS_DS1374 is not set +# CONFIG_SENSORS_EEPROM is not set +# CONFIG_SENSORS_PCF8574 is not set +# CONFIG_SENSORS_PCA9539 is not set +# CONFIG_SENSORS_PCF8591 is not set +# CONFIG_SENSORS_MAX6875 is not set +# CONFIG_I2C_DEBUG_CORE is not set +# CONFIG_I2C_DEBUG_ALGO is not set +# CONFIG_I2C_DEBUG_BUS is not set +# CONFIG_I2C_DEBUG_CHIP is not set + +# +# SPI support +# +CONFIG_SPI=y +CONFIG_SPI_DEBUG=y +CONFIG_SPI_MASTER=y + +# +# SPI Master Controller Drivers +# +# CONFIG_SPI_BITBANG is not set +CONFIG_SPI_PXA2XX=y + +# +# SPI Protocol Masters +# + +# +# Dallas's 1-wire bus +# +# CONFIG_W1 is not set + +# +# Hardware Monitoring support +# +# CONFIG_HWMON is not set +# CONFIG_HWMON_VID is not set + +# +# Misc devices +# +# CONFIG_TIFM_CORE is not set + +# +# LED devices +# +CONFIG_NEW_LEDS=y +CONFIG_LEDS_CLASS=y + +# +# LED drivers +# + +# +# LED Triggers +# +CONFIG_LEDS_TRIGGERS=y +CONFIG_LEDS_TRIGGER_TIMER=y +CONFIG_LEDS_TRIGGER_HEARTBEAT=y + +# +# Multimedia devices +# +# CONFIG_VIDEO_DEV is not set + +# +# Digital Video Broadcasting Devices +# +# CONFIG_DVB is not set +# CONFIG_USB_DABUSB is not set + +# +# Graphics support +# +# CONFIG_FIRMWARE_EDID is not set +CONFIG_FB=y +CONFIG_FB_CFB_FILLRECT=y +CONFIG_FB_CFB_COPYAREA=y +CONFIG_FB_CFB_IMAGEBLIT=y +# CONFIG_FB_MACMODES is not set +# CONFIG_FB_BACKLIGHT is not set +# CONFIG_FB_MODE_HELPERS is not set +# CONFIG_FB_TILEBLITTING is not set +# CONFIG_FB_S1D13XXX is not set +CONFIG_FB_PXA=y +CONFIG_FB_PXA_PARAMETERS=y +# CONFIG_FB_MBX is not set +# CONFIG_FB_VIRTUAL is not set + +# +# Console display driver support +# +# CONFIG_VGA_CONSOLE is not set +CONFIG_DUMMY_CONSOLE=y +CONFIG_FRAMEBUFFER_CONSOLE=y +# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set +CONFIG_FONTS=y +# CONFIG_FONT_8x8 is not set +# CONFIG_FONT_8x16 is not set +# CONFIG_FONT_6x11 is not set +# CONFIG_FONT_7x14 is not set +# CONFIG_FONT_PEARL_8x8 is not set +# CONFIG_FONT_ACORN_8x8 is not set +CONFIG_FONT_MINI_4x6=y +# CONFIG_FONT_SUN8x16 is not set +# CONFIG_FONT_SUN12x22 is not set +# CONFIG_FONT_10x18 is not set + +# +# Logo configuration +# +# CONFIG_LOGO is not set +# CONFIG_BACKLIGHT_LCD_SUPPORT is not set + +# +# Sound +# +CONFIG_SOUND=y + +# +# Advanced Linux Sound Architecture +# +CONFIG_SND=y +# CONFIG_SND_SEQUENCER is not set +# CONFIG_SND_MIXER_OSS is not set +# CONFIG_SND_PCM_OSS is not set +# CONFIG_SND_DYNAMIC_MINORS is not set +# CONFIG_SND_SUPPORT_OLD_API is not set +# CONFIG_SND_VERBOSE_PROCFS is not set +# CONFIG_SND_VERBOSE_PRINTK is not set +# CONFIG_SND_DEBUG is not set + +# +# Generic devices +# +# CONFIG_SND_DUMMY is not set +# CONFIG_SND_MTPAV is not set +# CONFIG_SND_SERIAL_U16550 is not set +# CONFIG_SND_MPU401 is not set + +# +# ALSA ARM devices +# +# CONFIG_SND_PXA2XX_AC97 is not set + +# +# USB devices +# +# CONFIG_SND_USB_AUDIO is not set + +# +# Open Sound System +# +# CONFIG_SOUND_PRIME is not set + +# +# HID Devices +# +CONFIG_HID=y + +# +# USB support +# +CONFIG_USB_ARCH_HAS_HCD=y +CONFIG_USB_ARCH_HAS_OHCI=y +# CONFIG_USB_ARCH_HAS_EHCI is not set +CONFIG_USB=y +# CONFIG_USB_DEBUG is not set + +# +# Miscellaneous USB options +# +# CONFIG_USB_DEVICEFS is not set +# CONFIG_USB_BANDWIDTH is not set +# CONFIG_USB_DYNAMIC_MINORS is not set +# CONFIG_USB_OTG is not set + +# +# USB Host Controller Drivers +# +# CONFIG_USB_ISP116X_HCD is not set +CONFIG_USB_OHCI_HCD=y +# CONFIG_USB_OHCI_BIG_ENDIAN is not set +CONFIG_USB_OHCI_LITTLE_ENDIAN=y +# CONFIG_USB_SL811_HCD is not set + +# +# USB Device Class drivers +# +# CONFIG_USB_ACM is not set +# CONFIG_USB_PRINTER is not set + +# +# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' +# + +# +# may also be needed; see USB_STORAGE Help for more information +# +# CONFIG_USB_LIBUSUAL is not set + +# +# USB Input Devices +# +# CONFIG_USB_HID is not set + +# +# USB HID Boot Protocol drivers +# +# CONFIG_USB_KBD is not set +# CONFIG_USB_MOUSE is not set +# CONFIG_USB_AIPTEK is not set +# CONFIG_USB_WACOM is not set +# CONFIG_USB_ACECAD is not set +# CONFIG_USB_KBTAB is not set +# CONFIG_USB_POWERMATE is not set +# CONFIG_USB_TOUCHSCREEN is not set +# CONFIG_USB_YEALINK is not set +# CONFIG_USB_XPAD is not set +# CONFIG_USB_ATI_REMOTE is not set +# CONFIG_USB_ATI_REMOTE2 is not set +# CONFIG_USB_KEYSPAN_REMOTE is not set +# CONFIG_USB_APPLETOUCH is not set + +# +# USB Imaging devices +# +# CONFIG_USB_MDC800 is not set + +# +# USB Network Adapters +# +# CONFIG_USB_CATC is not set +# CONFIG_USB_KAWETH is not set +# CONFIG_USB_PEGASUS is not set +# CONFIG_USB_RTL8150 is not set +# CONFIG_USB_USBNET_MII is not set +# CONFIG_USB_USBNET is not set +CONFIG_USB_MON=y + +# +# USB port drivers +# + +# +# USB Serial Converter support +# +# CONFIG_USB_SERIAL is not set + +# +# USB Miscellaneous drivers +# +# CONFIG_USB_EMI62 is not set +# CONFIG_USB_EMI26 is not set +# CONFIG_USB_ADUTUX is not set +# CONFIG_USB_AUERSWALD is not set +# CONFIG_USB_RIO500 is not set +# CONFIG_USB_LEGOTOWER is not set +# CONFIG_USB_LCD is not set +# CONFIG_USB_LED is not set +# CONFIG_USB_CYPRESS_CY7C63 is not set +# CONFIG_USB_CYTHERM is not set +# CONFIG_USB_PHIDGET is not set +# CONFIG_USB_IDMOUSE is not set +# CONFIG_USB_FTDI_ELAN is not set +# CONFIG_USB_APPLEDISPLAY is not set +# CONFIG_USB_LD is not set +# CONFIG_USB_TRANCEVIBRATOR is not set + +# +# USB DSL modem support +# + +# +# USB Gadget Support +# +CONFIG_USB_GADGET=y +# CONFIG_USB_GADGET_DEBUG_FILES is not set +CONFIG_USB_GADGET_SELECTED=y +# CONFIG_USB_GADGET_NET2280 is not set +# CONFIG_USB_GADGET_PXA2XX is not set +# CONFIG_USB_GADGET_GOKU is not set +# CONFIG_USB_GADGET_LH7A40X is not set +# CONFIG_USB_GADGET_OMAP is not set +# CONFIG_USB_GADGET_AT91 is not set +CONFIG_USB_GADGET_DUMMY_HCD=y +CONFIG_USB_DUMMY_HCD=y +CONFIG_USB_GADGET_DUALSPEED=y +# CONFIG_USB_ZERO is not set +CONFIG_USB_ETH=y +# CONFIG_USB_ETH_RNDIS is not set +# CONFIG_USB_GADGETFS is not set +# CONFIG_USB_FILE_STORAGE is not set +# CONFIG_USB_G_SERIAL is not set +# CONFIG_USB_MIDI_GADGET is not set + +# +# MMC/SD Card support +# +CONFIG_MMC=y +# CONFIG_MMC_DEBUG is not set +CONFIG_MMC_BLOCK=y +CONFIG_MMC_PXA=y +# CONFIG_MMC_TIFM_SD is not set + +# +# Real Time Clock +# +CONFIG_RTC_LIB=y +CONFIG_RTC_CLASS=y +CONFIG_RTC_HCTOSYS=y +CONFIG_RTC_HCTOSYS_DEVICE="rtc0" +# CONFIG_RTC_DEBUG is not set + +# +# RTC interfaces +# +CONFIG_RTC_INTF_SYSFS=y +CONFIG_RTC_INTF_PROC=y +CONFIG_RTC_INTF_DEV=y +# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set + +# +# RTC drivers +# +# CONFIG_RTC_DRV_X1205 is not set +# CONFIG_RTC_DRV_DS1307 is not set +# CONFIG_RTC_DRV_DS1553 is not set +# CONFIG_RTC_DRV_ISL1208 is not set +# CONFIG_RTC_DRV_DS1672 is not set +# CONFIG_RTC_DRV_DS1742 is not set +# CONFIG_RTC_DRV_PCF8563 is not set +# CONFIG_RTC_DRV_PCF8583 is not set +# CONFIG_RTC_DRV_RS5C348 is not set +# CONFIG_RTC_DRV_RS5C372 is not set +# CONFIG_RTC_DRV_M48T86 is not set +CONFIG_RTC_DRV_SA1100=y +# CONFIG_RTC_DRV_TEST is not set +# CONFIG_RTC_DRV_MAX6902 is not set +# CONFIG_RTC_DRV_V3020 is not set + +# +# File systems +# +CONFIG_EXT2_FS=m +CONFIG_EXT2_FS_XATTR=y +CONFIG_EXT2_FS_POSIX_ACL=y +CONFIG_EXT2_FS_SECURITY=y +# CONFIG_EXT2_FS_XIP is not set +CONFIG_EXT3_FS=y +CONFIG_EXT3_FS_XATTR=y +CONFIG_EXT3_FS_POSIX_ACL=y +CONFIG_EXT3_FS_SECURITY=y +# CONFIG_EXT4DEV_FS is not set +CONFIG_JBD=y +# CONFIG_JBD_DEBUG is not set +CONFIG_FS_MBCACHE=y +CONFIG_REISERFS_FS=m +# CONFIG_REISERFS_CHECK is not set +# CONFIG_REISERFS_PROC_INFO is not set +CONFIG_REISERFS_FS_XATTR=y +CONFIG_REISERFS_FS_POSIX_ACL=y +CONFIG_REISERFS_FS_SECURITY=y +# CONFIG_JFS_FS is not set +CONFIG_FS_POSIX_ACL=y +# CONFIG_XFS_FS is not set +# CONFIG_GFS2_FS is not set +# CONFIG_OCFS2_FS is not set +# CONFIG_MINIX_FS is not set +# CONFIG_ROMFS_FS is not set +CONFIG_INOTIFY=y +CONFIG_INOTIFY_USER=y +# CONFIG_QUOTA is not set +CONFIG_DNOTIFY=y +CONFIG_AUTOFS_FS=y +CONFIG_AUTOFS4_FS=y +# CONFIG_FUSE_FS is not set + +# +# CD-ROM/DVD Filesystems +# +# CONFIG_ISO9660_FS is not set +# CONFIG_UDF_FS is not set + +# +# DOS/FAT/NT Filesystems +# +CONFIG_FAT_FS=m +CONFIG_MSDOS_FS=m +CONFIG_VFAT_FS=m +CONFIG_FAT_DEFAULT_CODEPAGE=437 +CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" +# CONFIG_NTFS_FS is not set + +# +# Pseudo filesystems +# +CONFIG_PROC_FS=y +CONFIG_PROC_SYSCTL=y +CONFIG_SYSFS=y +CONFIG_TMPFS=y +# CONFIG_TMPFS_POSIX_ACL is not set +# CONFIG_HUGETLB_PAGE is not set +CONFIG_RAMFS=y +# CONFIG_CONFIGFS_FS is not set + +# +# Miscellaneous filesystems +# +# CONFIG_ADFS_FS is not set +# CONFIG_AFFS_FS is not set +# CONFIG_HFS_FS is not set +# CONFIG_HFSPLUS_FS is not set +# CONFIG_BEFS_FS is not set +# CONFIG_BFS_FS is not set +# CONFIG_EFS_FS is not set +# CONFIG_JFFS2_FS is not set +CONFIG_CRAMFS=y +# CONFIG_VXFS_FS is not set +# CONFIG_HPFS_FS is not set +# CONFIG_QNX4FS_FS is not set +# CONFIG_SYSV_FS is not set +# CONFIG_UFS_FS is not set + +# +# Network File Systems +# +CONFIG_NFS_FS=y +CONFIG_NFS_V3=y +# CONFIG_NFS_V3_ACL is not set +# CONFIG_NFS_V4 is not set +# CONFIG_NFS_DIRECTIO is not set +CONFIG_NFSD=m +CONFIG_NFSD_V3=y +# CONFIG_NFSD_V3_ACL is not set +# CONFIG_NFSD_V4 is not set +CONFIG_NFSD_TCP=y +# CONFIG_ROOT_NFS is not set +CONFIG_LOCKD=y +CONFIG_LOCKD_V4=y +CONFIG_EXPORTFS=m +CONFIG_NFS_COMMON=y +CONFIG_SUNRPC=y +# CONFIG_RPCSEC_GSS_KRB5 is not set +# CONFIG_RPCSEC_GSS_SPKM3 is not set +CONFIG_SMB_FS=m +# CONFIG_SMB_NLS_DEFAULT is not set +# CONFIG_CIFS is not set +# CONFIG_NCP_FS is not set +# CONFIG_CODA_FS is not set +# CONFIG_AFS_FS is not set +# CONFIG_9P_FS is not set + +# +# Partition Types +# +# CONFIG_PARTITION_ADVANCED is not set +CONFIG_MSDOS_PARTITION=y + +# +# Native Language Support +# +CONFIG_NLS=y +CONFIG_NLS_DEFAULT="iso8859-1" +CONFIG_NLS_CODEPAGE_437=m +CONFIG_NLS_CODEPAGE_737=m +CONFIG_NLS_CODEPAGE_775=m +CONFIG_NLS_CODEPAGE_850=m +CONFIG_NLS_CODEPAGE_852=m +CONFIG_NLS_CODEPAGE_855=m +CONFIG_NLS_CODEPAGE_857=m +CONFIG_NLS_CODEPAGE_860=m +CONFIG_NLS_CODEPAGE_861=m +CONFIG_NLS_CODEPAGE_862=m +CONFIG_NLS_CODEPAGE_863=m +CONFIG_NLS_CODEPAGE_864=m +CONFIG_NLS_CODEPAGE_865=m +CONFIG_NLS_CODEPAGE_866=m +CONFIG_NLS_CODEPAGE_869=m +CONFIG_NLS_CODEPAGE_936=m +CONFIG_NLS_CODEPAGE_950=m +CONFIG_NLS_CODEPAGE_932=m +CONFIG_NLS_CODEPAGE_949=m +CONFIG_NLS_CODEPAGE_874=m +CONFIG_NLS_ISO8859_8=m +CONFIG_NLS_CODEPAGE_1250=m +CONFIG_NLS_CODEPAGE_1251=m +CONFIG_NLS_ASCII=m +CONFIG_NLS_ISO8859_1=m +CONFIG_NLS_ISO8859_2=m +CONFIG_NLS_ISO8859_3=m +CONFIG_NLS_ISO8859_4=m +CONFIG_NLS_ISO8859_5=m +CONFIG_NLS_ISO8859_6=m +CONFIG_NLS_ISO8859_7=m +CONFIG_NLS_ISO8859_9=m +CONFIG_NLS_ISO8859_13=m +CONFIG_NLS_ISO8859_14=m +CONFIG_NLS_ISO8859_15=m +CONFIG_NLS_KOI8_R=m +CONFIG_NLS_KOI8_U=m +CONFIG_NLS_UTF8=m + +# +# Distributed Lock Manager +# +# CONFIG_DLM is not set + +# +# Profiling support +# +# CONFIG_PROFILING is not set + +# +# Kernel hacking +# +# CONFIG_PRINTK_TIME is not set +# CONFIG_ENABLE_MUST_CHECK is not set +# CONFIG_MAGIC_SYSRQ is not set +# CONFIG_UNUSED_SYMBOLS is not set +# CONFIG_DEBUG_FS is not set +# CONFIG_HEADERS_CHECK is not set +CONFIG_DEBUG_KERNEL=y +CONFIG_LOG_BUF_SHIFT=16 +CONFIG_DETECT_SOFTLOCKUP=y +# CONFIG_SCHEDSTATS is not set +# CONFIG_DEBUG_SLAB is not set +CONFIG_DEBUG_RT_MUTEXES=y +CONFIG_DEBUG_PI_LIST=y +# CONFIG_RT_MUTEX_TESTER is not set +CONFIG_DEBUG_SPINLOCK=y +CONFIG_DEBUG_MUTEXES=y +CONFIG_DEBUG_RWSEMS=y +CONFIG_DEBUG_SPINLOCK_SLEEP=y +# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set +# CONFIG_DEBUG_KOBJECT is not set +CONFIG_DEBUG_BUGVERBOSE=y +# CONFIG_DEBUG_INFO is not set +# CONFIG_DEBUG_VM is not set +# CONFIG_DEBUG_LIST is not set +CONFIG_FRAME_POINTER=y +CONFIG_FORCED_INLINING=y +# CONFIG_RCU_TORTURE_TEST is not set +# CONFIG_DEBUG_USER is not set +CONFIG_DEBUG_ERRORS=y +# CONFIG_DEBUG_LL is not set + +# +# Security options +# +# CONFIG_KEYS is not set +# CONFIG_SECURITY is not set + +# +# Cryptographic options +# +# CONFIG_CRYPTO is not set + +# +# Library routines +# +CONFIG_BITREVERSE=y +CONFIG_CRC_CCITT=y +CONFIG_CRC16=m +CONFIG_CRC32=y +CONFIG_LIBCRC32C=m +CONFIG_ZLIB_INFLATE=y +CONFIG_PLIST=y +CONFIG_IOMAP_COPY=y diff --git a/packages/linux/linux-ezx-2.6.20.7/ezx-core.patch b/packages/linux/linux-ezx-2.6.20.7/ezx-core.patch new file mode 100644 index 0000000000..3b9877ce83 --- /dev/null +++ b/packages/linux/linux-ezx-2.6.20.7/ezx-core.patch @@ -0,0 +1,1120 @@ +Index: linux-2.6.20.7/arch/arm/boot/compressed/head-xscale.S +=================================================================== +--- linux-2.6.20.7.orig/arch/arm/boot/compressed/head-xscale.S 2007-04-21 22:31:54.000000000 -0300 ++++ linux-2.6.20.7/arch/arm/boot/compressed/head-xscale.S 2007-04-21 22:32:53.000000000 -0300 +@@ -53,3 +53,6 @@ + str r1, [r0, #0x18] + #endif + ++#ifdef CONFIG_ARCH_EZX ++ mov r7, #MACH_TYPE_EZX ++#endif +Index: linux-2.6.20.7/arch/arm/mach-pxa/Kconfig +=================================================================== +--- linux-2.6.20.7.orig/arch/arm/mach-pxa/Kconfig 2007-04-21 22:31:54.000000000 -0300 ++++ linux-2.6.20.7/arch/arm/mach-pxa/Kconfig 2007-04-22 01:33:15.000000000 -0300 +@@ -37,6 +37,10 @@ + bool "Keith und Koep Trizeps4 DIMM-Module" + select PXA27x + ++config PXA_EZX ++ bool "Motorola EZX Platform" ++ select PXA_SSP ++ + endchoice + + if PXA_SHARPSL +@@ -71,6 +75,27 @@ + + endif + ++if PXA_EZX ++ ++choice ++ prompt "Select target EZX device" ++ ++config PXA_EZX_E680 ++ bool "Motorola E680 GSM Phone" ++ select PXA27x ++ ++config PXA_EZX_A780 ++ bool "Motorola A780 GSM Phone" ++ select PXA27x ++ ++config PXA_EZX_E2 ++ bool "Motorola E2 GSM Phone" ++ select PXA27x ++ ++endchoice ++ ++endif ++ + endmenu + + config MACH_POODLE +@@ -144,4 +169,5 @@ + tristate + help + Enable support for PXA2xx SSP ports ++ + endif +Index: linux-2.6.20.7/arch/arm/mach-pxa/Makefile +=================================================================== +--- linux-2.6.20.7.orig/arch/arm/mach-pxa/Makefile 2007-04-21 22:31:54.000000000 -0300 ++++ linux-2.6.20.7/arch/arm/mach-pxa/Makefile 2007-04-22 01:33:17.000000000 -0300 +@@ -18,6 +18,7 @@ + obj-$(CONFIG_MACH_AKITA) += akita-ioexp.o + obj-$(CONFIG_MACH_POODLE) += poodle.o corgi_ssp.o + obj-$(CONFIG_MACH_TOSA) += tosa.o ++obj-$(CONFIG_PXA_EZX) += ezx.o ezx_lcd.o ezx_ssp.o + + # Support for blinky lights + led-y := leds.o +Index: linux-2.6.20.7/arch/arm/mach-pxa/ezx.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-2.6.20.7/arch/arm/mach-pxa/ezx.c 2007-04-22 01:33:17.000000000 -0300 +@@ -0,0 +1,379 @@ ++/* ++ * linux/arch/arm/mach-ezx/a780.c ++ * ++ * Support for the Motorola Ezx A780 Development Platform. ++ * ++ * Author: Zhuang Xiaofan ++ * Created: Nov 25, 2003 ++ * Copyright: Motorola Inc. ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ */ ++ ++#include <linux/init.h> ++#include <linux/major.h> ++#include <linux/fs.h> ++#include <linux/interrupt.h> ++#include <linux/sched.h> ++#include <linux/bitops.h> ++#include <linux/apm_bios.h> ++#include <linux/platform_device.h> ++#include <linux/input.h> ++ ++#include <asm/types.h> ++#include <asm/setup.h> ++#include <asm/memory.h> ++#include <asm/mach-types.h> ++#include <asm/hardware.h> ++#include <asm/irq.h> ++ ++#include <asm/mach/arch.h> ++#include <asm/mach/map.h> ++#include <asm/mach/irq.h> ++ ++#include <asm/arch/ohci.h> ++#include <asm/arch/pxa-regs.h> ++ ++#include "ezx.h" ++#include "generic.h" ++#include <linux/tty.h> ++#include <linux/apm_bios.h> ++ ++ ++extern void usb_send_readurb(void); ++extern int ezx_ssp_set_machinfo(struct ezxssp_machinfo *); ++//FIXME extern void pm_do_poweroff(void); ++ ++/* BP Handshake */ ++#define FIRST_STEP 2 ++#define LAST_STEP 3 ++#define BP_RDY_TIMEOUT 0x000c0000 ++ ++/* check power down condition */ ++inline void check_power_off(void) ++{ ++ if (!(GPIO_is_high(GPIO_BB_WDI2))) { ++#ifdef CONFIG_PM ++//FIXME pm_do_poweroff(); ++#endif ++ } ++} ++ ++/* SSP */ ++struct platform_device ezxssp_device = { ++ .name = "ezx-ssp", ++ .id = -1, ++}; ++ ++struct ezxssp_machinfo ezx_ssp_machinfo = { ++ .port = 1, ++ .cs_pcap = GPIO_SPI_CE, ++ .clk_pcap = 1, ++}; ++ ++ ++/* OHCI Controller */ ++ ++static int ezx_ohci_init(struct device *dev) ++{ ++ /* for A780 support (connected with Neptune) */ ++ pxa_gpio_mode(GPIO30_USB_P3_2); /* GPIO30 - USB_P3_2/ICL_TXENB */ ++ pxa_gpio_mode(GPIO31_USB_P3_6); /* GPIO31 - USB_P3_6/ICL_VPOUT */ ++ pxa_gpio_mode(GPIO90_USB_P3_5); /* GPIO90 - USB_P3_5/ICL_VPIN */ ++ pxa_gpio_mode(GPIO91_USB_P3_1); /* GPIO91 - USB_P3_1/ICL_XRXD */ ++ pxa_gpio_mode(GPIO56_USB_P3_4); /* GPIO56 - USB_P3_4/ICL_VMOUT */ ++ pxa_gpio_mode(GPIO113_USB_P3_3);/* GPIO113 - USB_P3_3/ICL_VMIN */ ++ UP3OCR = 0x00000002; ++ ++ UHCHR = UHCHR & ~(UHCHR_SSEP2 | UHCHR_SSEP3 | UHCHR_SSE); ++ ++ return 0; ++} ++ ++static struct pxaohci_platform_data ezx_ohci_platform_data = { ++ .port_mode = PMM_NPS_MODE, ++ .init = ezx_ohci_init, ++}; ++ ++static int step = FIRST_STEP; ++void handshake(void) ++{ ++ /* step 1: check MCU_INT_SW or BP_RDY is low (now it is checked in apboot) */ ++ if (step == 1) { ++ int timeout = BP_RDY_TIMEOUT; ++ ++ /* config MCU_INT_SW, BP_RDY as input */ ++ GPDR(GPIO_MCU_INT_SW) &= ~GPIO_bit(GPIO_MCU_INT_SW); ++ GPDR(GPIO_BP_RDY) &= ~GPIO_bit(GPIO_BP_RDY); ++ ++ while ( timeout -- ) { ++ if ( (!(GPIO_is_high(GPIO_MCU_INT_SW))) ++ || (!(GPIO_is_high(GPIO_BP_RDY))) ) { ++ step ++; ++ break; ++ } ++ ++ check_power_off(); ++ } ++ } ++ ++ /* step 2: wait BP_RDY is low */ ++ if (step == 2) { ++ if (!(GPIO_is_high(GPIO_BP_RDY))) { ++ ++ /* config MCU_INT_SW as output */ ++ pxa_gpio_mode(GPIO_MCU_INT_SW | GPIO_OUT); ++ clr_GPIO(GPIO_MCU_INT_SW); ++ ++ step ++; ++ } ++ } ++ ++ /* step 3: wait BP_RDY is high */ ++ if (step == 3) { ++ if (GPIO_is_high(GPIO_BP_RDY)) { ++ step ++; ++ //FIXME delay_bklight(); ++ set_GPIO(GPIO_MCU_INT_SW); ++ } ++ } ++} ++ ++#ifdef CONFIG_APM ++static unsigned long idle_limit = 0; ++int pm_handle_irq(int irq) ++{ ++ ++ //FIXME: extern unsigned long idle_limit; ++ //FIXME: extern int can_idle, can_sleep; ++ static unsigned long tmp_jiffy; /* for temporary store of jiffies */ ++ ++ /* ++ * if idle_limit is zero, never enter idle. ++ * if not OS timer, reset idle timer count ++ */ ++ if (idle_limit == 0) { ++ tmp_jiffy = jiffies; ++ return irq; ++ } ++#if 0 ++ if (irq != IRQ_OST0) { ++ tmp_jiffy = jiffies; ++ can_idle = 0; ++ can_sleep = 0; ++ } else if (jiffies > tmp_jiffy + idle_limit) { ++ ++ /* ++ * I think this is enough to prevent from reentering here ++ * due to jiffies will be stoped ++ */ ++ tmp_jiffy = jiffies; ++ ++ /* if pm idle timer expired, queue event */ ++ apm_queue_event(KRNL_PROC_INACT); ++ can_idle = 1; ++ } ++#endif ++ ++ return irq; ++} ++ ++irqreturn_t bp_wdi_intr(int irq, void *dev_id) ++{ ++//FIXME apm_queue_event(KRNL_BP_WDI); ++ return IRQ_HANDLED; ++} ++ ++static struct irqaction bp_wdi_irq = { ++ .name = "BP wdi", ++ .handler = &bp_wdi_intr, ++}; ++#endif ++ ++int handshake_pass(void) ++{ ++ return (step > LAST_STEP); ++} ++ ++static irqreturn_t bp_rdy_intr(int irq, void *dev_id) ++{ ++ static int usbipc_ready = 0; ++ ++ if (!usbipc_ready) { ++ handshake(); ++ if (handshake_pass()) { ++ disable_irq(IRQ_GPIO(GPIO_BB_WDI2)); ++ ++ /* set bp_rdy handle for usb ipc */ ++ set_irq_type(GPIO_BP_RDY, IRQT_FALLING); ++ usbipc_ready = 1; ++ } ++ } else ++ // FIXME usb_send_readurb(); ++ {} ++ ++ return IRQ_HANDLED; ++} ++ ++static struct irqaction bp_rdy_irq = { ++ .name = "BP rdy", ++ .handler = bp_rdy_intr, ++}; ++ ++static irqreturn_t bp_wdi2_intr(int irq, void *dev_id) ++{ ++#ifdef CONFIG_PM ++//FIXME pm_do_poweroff(); ++#endif ++ return IRQ_HANDLED; ++} ++ ++static struct irqaction bp_wdi2_irq = { ++ .name = "BP wdi2", ++ .handler = bp_wdi2_intr, ++}; ++ ++ ++static struct resource ezx_bp_resources[] = { ++ [0] = { ++ .start = GPIO_BP_RDY, ++ .end = GPIO_BP_RDY, ++ .flags = IORESOURCE_IRQ, ++ }, ++ [1] = { ++ .start = GPIO_BB_WDI2, ++ .end = GPIO_BB_WDI2, ++ .flags = IORESOURCE_IRQ, ++ }, ++#ifdef CONFIG_APM ++ [2] = { ++ .start = GPIO_BB_WDI, ++ .end = GPIO_BB_WDI, ++ .flags = IORESOURCE_IRQ, ++ }, ++#endif ++}; ++ ++static struct platform_device ezx_bp_device = { ++ .name = "ezx-bp", ++ .dev = { ++ //.parent = ++ //.platform_data = ++ }, ++ .id = -1, ++ .num_resources = ARRAY_SIZE(ezx_bp_resources), ++ .resource = ezx_bp_resources, ++}; ++ ++static void __init ezx_init_gpio_irq(void) ++{ ++#ifdef CONFIG_APM ++ set_irq_type(GPIO_BB_WDI, IRQT_FALLING); ++ setup_irq(IRQ_GPIO(GPIO_BB_WDI), &bp_wdi_irq); ++#endif ++ set_irq_type(GPIO_BP_RDY, IRQT_BOTHEDGE); ++ setup_irq(IRQ_GPIO(GPIO_BP_RDY), &bp_rdy_irq); ++ ++ set_irq_type(GPIO_BB_WDI2, IRQT_FALLING); ++ setup_irq(IRQ_GPIO(GPIO_BB_WDI2), &bp_wdi2_irq); ++} ++ ++static void __init a780_init_irq(void) ++{ ++ pxa_init_irq(); ++ ++ /* init ezx specfic gpio irq */ ++ ezx_init_gpio_irq(); ++ ++ check_power_off(); ++ handshake(); ++ if (handshake_pass()) { ++ disable_irq(IRQ_GPIO(GPIO_BP_RDY)); ++ disable_irq(IRQ_GPIO(GPIO_BB_WDI2)); ++ } ++} ++ ++static struct platform_device *devices[] __initdata = { ++ &ezxssp_device, ++ &ezx_bp_device, ++}; ++ ++static void __init a780_init(void) ++{ ++//FIXME CKEN = CKEN9_OSTIMER | CKEN22_MEMC | CKEN5_STUART; ++ ++ ezx_ssp_set_machinfo(&ezx_ssp_machinfo); ++ ++ /* set BB_RESET PIN out put high */ ++ pxa_gpio_mode(GPIO_BB_RESET|GPIO_OUT); ++ set_GPIO(GPIO_BB_RESET); ++ ++ pxa_gpio_mode(GPIO_ICL_FFRXD_MD); ++ pxa_gpio_mode(GPIO_ICL_FFTXD_MD); ++ pxa_gpio_mode(GPIO_ICL_FFCTS_MD); ++ pxa_gpio_mode(GPIO_ICL_FFRTS_MD); ++ ++ pxa_gpio_mode(GPIO42_BTRXD_MD); ++ pxa_gpio_mode(GPIO43_BTTXD_MD); ++ pxa_gpio_mode(GPIO44_BTCTS_MD); ++ pxa_gpio_mode(GPIO45_BTRTS_MD); ++ ++ /* clear EMU MUX1/MUX2 (low) to close the audio path to EMU */ ++ pxa_gpio_mode(GPIO_EMU_MUX1|GPIO_OUT); ++ clr_GPIO(GPIO_EMU_MUX1); ++ pxa_gpio_mode(GPIO_EMU_MUX2|GPIO_OUT); ++ clr_GPIO(GPIO_EMU_MUX2); ++ ++#if defined(CONFIG_PXA_EZX_E680) ++ pxa_gpio_mode(GPIO46_STRXD_MD); ++ pxa_gpio_mode(GPIO47_STTXD_MD); ++ ++ /* setup sleep mode values */ ++ PWER = 0xc000f803; // disable usb 0xdc00f803; ++ PFER = 0x0000f803; ++ PRER = 0x00001802; ++ // keypad wakeup (PKWR,PGSR3) should be in keypad.c ++ PGSR0 = 0x00000010; ++ PGSR1 = 0x02800000; ++ PGSR2 = 0x00040000; ++ PGSR3 = 0x00000000; ++ PCFR = PCFR_DC_EN | PCFR_FS | PCFR_FP | PCFR_OPDE; ++ PSLR = 0x05800f00; ++ ++#elif defined(CONFIG_PXA_EZX_A780) ++ ++ /* Standard UART */ ++ pxa_gpio_mode(GPIO46_STRXD_MD); ++ pxa_gpio_mode(GPIO47_STTXD_MD); ++ ++ /* setup sleep mode values */ ++ PWER = 0xc0007803; // disable usb, GPIO15 NC ++ PFER = 0x00007803; ++ PRER = 0x00001802; ++ // keypad wakeup (PKWR,PGSR3) should be in keypad.c ++ PGSR0 = 0x00000010; ++ PGSR1 = 0x02800000; ++ PGSR2 = 0x00040000; ++ PGSR3 = 0x00000008; ++ PCFR = PCFR_DC_EN | PCFR_FS | PCFR_FP | PCFR_OPDE; ++ PSLR = 0x05800f00; ++ ++#endif ++ pxa_set_ohci_info(&ezx_ohci_platform_data); ++ ++ platform_add_devices(devices, ARRAY_SIZE(devices)); ++ ++} ++ ++MACHINE_START(EZX, "Motorola Ezx Platform") ++ /* Maintainer: Harald Welte <laforge@gnumonks.org> */ ++ .phys_io = 0x40000000, ++ .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, ++ .boot_params = 0xa0000100, ++ .map_io = pxa_map_io, ++ .init_irq = a780_init_irq, ++ .timer = &pxa_timer, ++ .init_machine = a780_init, ++MACHINE_END +Index: linux-2.6.20.7/include/asm-arm/arch-pxa/ezx.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-2.6.20.7/include/asm-arm/arch-pxa/ezx.h 2007-04-21 22:32:53.000000000 -0300 +@@ -0,0 +1,225 @@ ++/* ++ * linux/include/asm-arm/arch-pxa/ezx.h ++ * ++ * Specific macro defines for Motorola Ezx Development Platform ++ * ++ * Author: Zhuang Xiaofan ++ * Created: Nov 25, 2003 ++ * Copyright: Motorola Inc. ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ */ ++ ++/* support E680 p3 and ealier PCB */ ++//#define E680_P3_AND_EARLY ++ ++#define GPIO_is_high(x) (GPLR(x) & GPIO_bit(x)) ++#define set_GPIO(x) (GPSR(x) = GPIO_bit(x)) ++#define clr_GPIO(x) (GPCR(x) = GPIO_bit(x)) ++ ++/* ++ * Flags in memory for sleep use ++ */ ++#define FLAG_ADDR PHYS_OFFSET ++#define RESUME_ADDR (PHYS_OFFSET + 4) ++#define BPSIG_ADDR (PHYS_OFFSET + 8) ++ ++#define USER_OFF_FLAG 0x5a5a5a5a ++#define SLEEP_FLAG 0x6b6b6b6b ++#define OFF_FLAG 0x7c7c7c7c ++#define REFLASH_FLAG 0x0C1D2E3F ++#define PASS_THRU_FLAG 0x12345678 ++ ++#define WDI_FLAG 0xbb00dead ++#define NO_FLAG 0xaa00dead ++ ++/* ++ * GPIO control pin, have to change when hardware lock down ++ */ ++ ++#ifdef E680_P3_AND_EARLY ++ ++/* shakehand with BP's PIN */ ++#define GPIO_BP_RDY 0 /* BP_RDY */ ++#define GPIO_BB_WDI 13 /* BB_WDI */ ++#define GPIO_BB_WDI2 3 /* BB_WDI2 */ ++#define GPIO_BB_RESET 57 /* BB_RESET */ ++#define GPIO_MCU_INT_SW 115 /* MCU_INT_SW */ ++#define GPIO_TC_MM_EN 89 /* TC_MM_EN */ ++ ++/* control PCAP direct PIN */ ++#define GPIO_WDI_AP 4 /* WDI_AP */ ++#define GPIO_SYS_RESTART 55 /* restart PCAP power */ ++#define GPIO_AP_STANDBY 28 /* make pcap enter standby mode */ ++ ++/* communicate with PCAP's PIN */ ++#define GPIO_PCAP_SEC_INT 1 /* PCAP interrupt PIN to AP */ ++#define GPIO_SPI_CLK 23 /* PCAP SPI port clock */ ++#define GPIO_SPI_CE 24 /* PCAP SPI port SSPFRM */ ++#define GPIO_SPI_MOSI 25 /* PCAP SPI port SSPTXD */ ++#define GPIO_SPI_MISO 26 /* PCAP SPI port SSPRXD */ ++ ++/* blue tooth control PIN */ ++#define GPIO_BT_WAKEUP 2 /* AP wake up bluetooth module */ ++#define GPIO_BT_HOSTWAKE 14 /* bluetooth module wake up Ap module */ ++#define GPIO_BT_RESET 56 /* AP reset bluetooth module */ ++ ++/* control LCD high - OFF low -- ON */ ++#define GPIO_LCD_OFF 116 /* control LCD */ ++ ++/* FFUART PIN */ ++#define GPIO_ICL_FFRXD_MD (34 | GPIO_ALT_FN_1_IN) ++#define GPIO_ICL_FFCTS_MD (35 | GPIO_ALT_FN_1_IN) ++#define GPIO_ICL_FFTXD_MD (39 | GPIO_ALT_FN_2_OUT) ++#define GPIO_ICL_FFRTS_MD (41 | GPIO_ALT_FN_2_OUT) ++ ++#elif defined(A780_P1_AND_EARLY) ++ ++/* shakehand with BP's PIN */ ++#define GPIO_BP_RDY 0 /* BP_RDY */ ++#define GPIO_BB_WDI 13 /* BB_WDI */ ++#define GPIO_BB_WDI2 3 /* BB_WDI2 */ ++#define GPIO_BB_RESET 82 /* BB_RESET */ ++#define GPIO_MCU_INT_SW 57 /* MCU_INT_SW */ ++#define GPIO_TC_MM_EN 89 /* TC_MM_EN */ ++ ++/* control PCAP direct PIN */ ++#define GPIO_WDI_AP 4 /* WDI_AP */ ++#define GPIO_SYS_RESTART 55 /* restart PCAP power */ ++#define GPIO_AP_STANDBY 28 /* make pcap enter standby mode */ ++ ++/* communicate with PCAP's PIN */ ++#define GPIO_PCAP_SEC_INT 1 /* PCAP interrupt PIN to AP */ ++#define GPIO_SPI_CLK 29 /* PCAP SPI port clock */ ++#define GPIO_SPI_CE 24 /* PCAP SPI port SSPFRM */ ++#define GPIO_SPI_MOSI 25 /* PCAP SPI port SSPTXD */ ++#define GPIO_SPI_MISO 26 /* PCAP SPI port SSPRXD */ ++ ++/* blue tooth control PIN */ ++#define GPIO_BT_WAKEUP 2 /* AP wake up bluetooth module */ ++#define GPIO_BT_HOSTWAKE 14 /* bluetooth module wake up Ap module */ ++#define GPIO_BT_RESET 56 /* AP reset bluetooth module */ ++ ++/* control LCD high - OFF low -- ON */ ++#define GPIO_LCD_OFF 116 /* control LCD */ ++ ++/* FFUART PIN */ ++#define GPIO_ICL_FFRXD_MD (53 | GPIO_ALT_FN_1_IN) ++#define GPIO_ICL_FFCTS_MD (35 | GPIO_ALT_FN_1_IN) ++#define GPIO_ICL_FFTXD_MD (39 | GPIO_ALT_FN_2_OUT) ++#define GPIO_ICL_FFRTS_MD (41 | GPIO_ALT_FN_2_OUT) ++ ++#else ++ ++/* shakehand with BP's PIN */ ++#define GPIO_BP_RDY 0 /* BP_RDY */ ++#define GPIO_BB_WDI 13 /* BB_WDI */ ++#define GPIO_BB_WDI2 3 /* BB_WDI2 */ ++#define GPIO_BB_RESET 82 /* BB_RESET */ ++#define GPIO_MCU_INT_SW 57 /* MCU_INT_SW */ ++#define GPIO_TC_MM_EN 99 /* TC_MM_EN */ ++ ++/* control PCAP direct PIN */ ++#define GPIO_WDI_AP 4 /* WDI_AP */ ++#define GPIO_SYS_RESTART 55 /* restart PCAP power */ ++//#define GPIO_AP_STANDBY 28 /* make pcap enter standby mode */ ++ ++/* communicate with PCAP's PIN */ ++#define GPIO_PCAP_SEC_INT 1 /* PCAP interrupt PIN to AP */ ++#define GPIO_SPI_CLK 29 /* PCAP SPI port clock */ ++#define GPIO_SPI_CE 24 /* PCAP SPI port SSPFRM */ ++#define GPIO_SPI_MOSI 25 /* PCAP SPI port SSPTXD */ ++#define GPIO_SPI_MISO 26 /* PCAP SPI port SSPRXD */ ++ ++/* blue tooth control PIN */ ++#define GPIO_BT_WAKEUP 28 /* AP wake up bluetooth module */ ++#define GPIO_BT_HOSTWAKE 14 /* AP wake up bluetooth module */ ++#define GPIO_BT_RESET 48 /* AP reset bluetooth module */ ++ ++/* control LCD high - OFF low -- ON */ ++#define GPIO_LCD_OFF 116 /* control LCD */ ++ ++/* FFUART PIN */ ++#define GPIO_ICL_FFRXD_MD (53 | GPIO_ALT_FN_1_IN) ++#define GPIO_ICL_FFCTS_MD (35 | GPIO_ALT_FN_1_IN) ++#define GPIO_ICL_FFTXD_MD (39 | GPIO_ALT_FN_2_OUT) ++#define GPIO_ICL_FFRTS_MD (41 | GPIO_ALT_FN_2_OUT) ++ ++#endif ++/* ++ * ezx platform, wake up source edge detect bit ++ */ ++#define PEDR_INT_SEC 1 ++ ++#define GPIO_FLIP_PIN 12 ++/*E680 screen lock button*/ ++ ++#define GPIO_LOCK_SCREEN_PIN GPIO_FLIP_PIN ++ ++/* MMC interface */ ++#define GPIO_MMC_DETECT 11 ++#define GPIO_MMC_CLK 32 ++#define GPIO_MMC_DATA0 92 ++#define GPIO_MMC_WP 107 ++#define GPIO_MMC_DATA1 109 ++#define GPIO_MMC_DATA2 110 ++#define GPIO_MMC_DATA3 111 ++#define GPIO_MMC_CMD 112 ++ ++/* interface function */ ++#define GPIO_MMC_CLK_MD (GPIO_MMC_CLK | GPIO_ALT_FN_2_OUT) ++#define GPIO_MMC_DATA0_MD (GPIO_MMC_DATA0 | GPIO_ALT_FN_1_IN | GPIO_ALT_FN_1_OUT) ++#define GPIO_MMC_DATA1_MD (GPIO_MMC_DATA1 | GPIO_ALT_FN_1_IN | GPIO_ALT_FN_1_OUT) ++#define GPIO_MMC_DATA2_MD (GPIO_MMC_DATA2 | GPIO_ALT_FN_1_IN | GPIO_ALT_FN_1_OUT) ++#define GPIO_MMC_DATA3_MD (GPIO_MMC_DATA3 | GPIO_ALT_FN_1_IN | GPIO_ALT_FN_1_OUT) ++ ++#define GPIO_MMC_CMD_MD (GPIO_MMC_CMD | GPIO_ALT_FN_1_IN | GPIO_ALT_FN_1_OUT) ++ ++/* EMU GPIO 119 ---MUX2 120 --- MUX1 */ ++#define GPIO_EMU_MUX1 120 ++#define GPIO_EMU_MUX2 119 ++#define GPIO_SNP_INT_CTL 86 ++#define GPIO_SNP_INT_IN 87 ++ ++ ++/* audio related pins */ ++#define AP_13MHZ_OUTPUT_PIN 9 ++ ++#ifdef CONFIG_ARCH_EZX_E680 ++#define GPIO_VA_SEL_BUL 79 ++#define GPIO_FLT_SEL_BUL 80 /* out filter select pin */ ++#define GPIO_MIDI_RESET 78 /* GPIO used by MIDI chipset */ ++#define GPIO_MIDI_CS 33 ++#define GPIO_MIDI_IRQ 15 ++#define GPIO_MIDI_NPWE 49 ++#define GPIO_MIDI_RDY 18 ++#endif ++ ++#ifdef CONFIG_ARCH_EZX_A780 ++#define GPIO_HW_ATTENUATE_A780 96 /* hw noise attenuation be used or bypassed, for receiver or louderspeaker mode */ ++#endif ++ ++ ++/* bp status pin */ ++#define GPIO_BP_STATE 41 ++ ++/* define usb related pin */ ++#define GPIO34_TXENB 34 ++#define GPIO35_XRXD 35 ++#define GPIO36_VMOUT 36 ++#define GPIO39_VPOUT 39 ++#define GPIO40_VPIN 40 ++#define GPIO53_VMIN 53 ++ ++/* USB client 6 pin defination */ ++#define GPIO34_TXENB_MD (GPIO34_TXENB | GPIO_ALT_FN_1_OUT) ++#define GPIO35_XRXD_MD (GPIO35_XRXD | GPIO_ALT_FN_2_IN ) ++#define GPIO36_VMOUT_MD (GPIO36_VMOUT | GPIO_ALT_FN_1_OUT) ++#define GPIO39_VPOUT_MD (GPIO39_VPOUT | GPIO_ALT_FN_1_OUT) ++#define GPIO40_VPIN_MD (GPIO40_VPIN | GPIO_ALT_FN_3_IN ) ++#define GPIO53_VMIN_MD (GPIO53_VMIN | GPIO_ALT_FN_2_IN ) ++ ++#define GPIO53_FFRXD_MD (53 | GPIO_ALT_FN_1_IN) ++ +Index: linux-2.6.20.7/include/asm-arm/arch-pxa/pxa-regs.h +=================================================================== +--- linux-2.6.20.7.orig/include/asm/arch/pxa-regs.h 2007-04-21 22:31:54.000000000 -0300 ++++ linux-2.6.20.7/include/asm-arm/arch-pxa/pxa-regs.h 2007-04-21 22:32:53.000000000 -0300 +@@ -854,6 +854,8 @@ + #define UP2OCR_HXOE (1 << 17) /* Host Port 2 Transceiver Output Enable */ + #define UP2OCR_SEOS (1 << 24) /* Single-Ended Output Select */ + ++#define UP3OCR __REG(0x40600024) /* USB Port 3 Output Control register */ ++ + #define UDCCSN(x) __REG2(0x40600100, (x) << 2) + #define UDCCSR0 __REG(0x40600100) /* UDC Control/Status register - Endpoint 0 */ + #define UDCCSR0_SA (1 << 7) /* Setup Active */ +@@ -1257,6 +1259,7 @@ + #define GPIO33_nCS_5 33 /* chip select 5 */ + #define GPIO34_FFRXD 34 /* FFUART receive */ + #define GPIO34_MMCCS0 34 /* MMC Chip Select 0 */ ++#define GPIO34_USB_P2_2 34 /* USB Port2 Pin 2 */ + #define GPIO35_FFCTS 35 /* FFUART Clear to send */ + #define GPIO36_FFDCD 36 /* FFUART Data carrier detect */ + #define GPIO37_FFDSR 37 /* FFUART data set ready */ +@@ -1370,6 +1373,7 @@ + #define GPIO18_RDY_MD (18 | GPIO_ALT_FN_1_IN) + #define GPIO19_DREQ1_MD (19 | GPIO_ALT_FN_1_IN) + #define GPIO20_DREQ0_MD (20 | GPIO_ALT_FN_1_IN) ++#define GPIO22_SCLK2_MD (22 | GPIO_ALT_FN_3_IN) + #define GPIO23_SCLK_MD (23 | GPIO_ALT_FN_2_OUT) + #define GPIO24_SFRM_MD (24 | GPIO_ALT_FN_2_OUT) + #define GPIO25_STXD_MD (25 | GPIO_ALT_FN_2_OUT) +@@ -1380,23 +1384,33 @@ + #define GPIO28_BITCLK_OUT_I2S_MD (28 | GPIO_ALT_FN_1_OUT) + #define GPIO29_SDATA_IN_AC97_MD (29 | GPIO_ALT_FN_1_IN) + #define GPIO29_SDATA_IN_I2S_MD (29 | GPIO_ALT_FN_2_IN) ++#define GPIO29_SCLK_MD (29 | GPIO_ALT_FN_3_IN) + #define GPIO30_SDATA_OUT_AC97_MD (30 | GPIO_ALT_FN_2_OUT) + #define GPIO30_SDATA_OUT_I2S_MD (30 | GPIO_ALT_FN_1_OUT) ++#define GPIO30_USB_P3_2 (30 | GPIO_ALT_FN_3_OUT) + #define GPIO31_SYNC_I2S_MD (31 | GPIO_ALT_FN_1_OUT) + #define GPIO31_SYNC_AC97_MD (31 | GPIO_ALT_FN_2_OUT) ++#define GPIO31_USB_P3_6 (31 | GPIO_ALT_FN_3_OUT) + #define GPIO32_SDATA_IN1_AC97_MD (32 | GPIO_ALT_FN_1_IN) + #define GPIO32_SYSCLK_I2S_MD (32 | GPIO_ALT_FN_1_OUT) + #define GPIO32_MMCCLK_MD ( 32 | GPIO_ALT_FN_2_OUT) + #define GPIO33_nCS_5_MD (33 | GPIO_ALT_FN_2_OUT) + #define GPIO34_FFRXD_MD (34 | GPIO_ALT_FN_1_IN) + #define GPIO34_MMCCS0_MD (34 | GPIO_ALT_FN_2_OUT) ++#define GPIO34_USB_P2_2_MD (34 | GPIO_ALT_FN_1_OUT) + #define GPIO35_FFCTS_MD (35 | GPIO_ALT_FN_1_IN) ++#define GPIO35_USB_P2_1_MD (35 | GPIO_ALT_FN_2_IN) + #define GPIO36_FFDCD_MD (36 | GPIO_ALT_FN_1_IN) ++#define GPIO36_USB_P2_4_MD (36 | GPIO_ALT_FN_1_OUT) + #define GPIO37_FFDSR_MD (37 | GPIO_ALT_FN_1_IN) ++#define GPIO37_SFRM2_MD (37 | GPIO_ALT_FN_2_IN) + #define GPIO38_FFRI_MD (38 | GPIO_ALT_FN_1_IN) ++#define GPIO38_STXD2_MD (38 | GPIO_ALT_FN_2_OUT) + #define GPIO39_MMCCS1_MD (39 | GPIO_ALT_FN_1_OUT) + #define GPIO39_FFTXD_MD (39 | GPIO_ALT_FN_2_OUT) ++#define GPIO39_USB_P2_6_MD (39 | GPIO_ALT_FN_1_OUT) + #define GPIO40_FFDTR_MD (40 | GPIO_ALT_FN_2_OUT) ++#define GPIO40_USB_P2_5_MD (40 | GPIO_ALT_FN_3_IN) + #define GPIO41_FFRTS_MD (41 | GPIO_ALT_FN_2_OUT) + #define GPIO42_BTRXD_MD (42 | GPIO_ALT_FN_1_IN) + #define GPIO42_HWRXD_MD (42 | GPIO_ALT_FN_3_IN) +@@ -1421,13 +1435,17 @@ + #define GPIO51_HWRTS_MD (51 | GPIO_ALT_FN_1_OUT) + #define GPIO51_nPIOW_MD (51 | GPIO_ALT_FN_2_OUT) + #define GPIO52_nPCE_1_MD (52 | GPIO_ALT_FN_2_OUT) ++#define GPIO52_SCLK3_MD (52 | GPIO_ALT_FN_2_OUT) + #define GPIO53_nPCE_2_MD (53 | GPIO_ALT_FN_2_OUT) + #define GPIO53_MMCCLK_MD (53 | GPIO_ALT_FN_1_OUT) ++#define GPIO53_FFRXD_MD (53 | GPIO_ALT_FN_1_IN) ++#define GPIO53_USB_P2_3_MD (53 | GPIO_ALT_FN_2_IN) + #define GPIO54_MMCCLK_MD (54 | GPIO_ALT_FN_1_OUT) + #define GPIO54_nPCE_2_MD (54 | GPIO_ALT_FN_2_OUT) + #define GPIO54_pSKTSEL_MD (54 | GPIO_ALT_FN_2_OUT) + #define GPIO55_nPREG_MD (55 | GPIO_ALT_FN_2_OUT) + #define GPIO56_nPWAIT_MD (56 | GPIO_ALT_FN_1_IN) ++#define GPIO56_USB_P3_4 (56 | GPIO_ALT_FN_1_OUT) + #define GPIO57_nIOIS16_MD (57 | GPIO_ALT_FN_1_IN) + #define GPIO58_LDD_0_MD (58 | GPIO_ALT_FN_2_OUT) + #define GPIO59_LDD_1_MD (59 | GPIO_ALT_FN_2_OUT) +@@ -1463,13 +1481,19 @@ + #define GPIO80_nCS_4_MD (80 | GPIO_ALT_FN_2_OUT) + #define GPIO81_NSSP_CLK_OUT (81 | GPIO_ALT_FN_1_OUT) + #define GPIO81_NSSP_CLK_IN (81 | GPIO_ALT_FN_1_IN) ++#define GPIO81_STXD3_MD (81 | GPIO_ALT_FN_1_OUT) + #define GPIO82_NSSP_FRM_OUT (82 | GPIO_ALT_FN_1_OUT) + #define GPIO82_NSSP_FRM_IN (82 | GPIO_ALT_FN_1_IN) + #define GPIO83_NSSP_TX (83 | GPIO_ALT_FN_1_OUT) + #define GPIO83_NSSP_RX (83 | GPIO_ALT_FN_2_IN) ++#define GPIO83_SFRM3_MD (83 | GPIO_ALT_FN_1_IN) + #define GPIO84_NSSP_TX (84 | GPIO_ALT_FN_1_OUT) + #define GPIO84_NSSP_RX (84 | GPIO_ALT_FN_2_IN) + #define GPIO85_nPCE_1_MD (85 | GPIO_ALT_FN_1_OUT) ++#define GPIO88_SRXD2_MD (88 | GPIO_ALT_FN_2_IN) ++#define GPIO89_SRXD3_MD (89 | GPIO_ALT_FN_1_IN) ++#define GPIO90_USB_P3_5 (90 | GPIO_ALT_FN_2_IN) ++#define GPIO91_USB_P3_1 (91 | GPIO_ALT_FN_2_IN) + #define GPIO92_MMCDAT0_MD (92 | GPIO_ALT_FN_1_OUT) + #define GPIO102_nPCE_1_MD (102 | GPIO_ALT_FN_1_OUT) + #define GPIO104_pSKTSEL_MD (104 | GPIO_ALT_FN_1_OUT) +@@ -1481,6 +1505,7 @@ + #define GPIO112_MMCCMD_MD (112 | GPIO_ALT_FN_1_OUT) + #define GPIO113_I2S_SYSCLK_MD (113 | GPIO_ALT_FN_1_OUT) + #define GPIO113_AC97_RESET_N_MD (113 | GPIO_ALT_FN_2_OUT) ++#define GPIO113_USB_P3_3 (113 | GPIO_ALT_FN_3_IN) + #define GPIO117_I2CSCL_MD (117 | GPIO_ALT_FN_1_OUT) + #define GPIO118_I2CSDA_MD (118 | GPIO_ALT_FN_1_IN) + +@@ -1496,6 +1521,7 @@ + #define PFER __REG(0x40F00014) /* Power Manager GPIO Falling-Edge Detect Enable Register */ + #define PEDR __REG(0x40F00018) /* Power Manager GPIO Edge Detect Status Register */ + #define PCFR __REG(0x40F0001C) /* Power Manager General Configuration Register */ ++#define PGSR(x) (__REG(0x40F00020 + ((unsigned long)(x)/32*4))) + #define PGSR0 __REG(0x40F00020) /* Power Manager GPIO Sleep State Register for GP[31-0] */ + #define PGSR1 __REG(0x40F00024) /* Power Manager GPIO Sleep State Register for GP[63-32] */ + #define PGSR2 __REG(0x40F00028) /* Power Manager GPIO Sleep State Register for GP[84-64] */ +Index: linux-2.6.20.7/arch/arm/boot/compressed/head.S +=================================================================== +--- linux-2.6.20.7.orig/arch/arm/boot/compressed/head.S 2007-04-21 22:31:54.000000000 -0300 ++++ linux-2.6.20.7/arch/arm/boot/compressed/head.S 2007-04-21 22:32:53.000000000 -0300 +@@ -117,6 +117,9 @@ + mov r0, r0 + .endr + ++ mov r1, #0x300 @ mach_id 0x363 is official EZX ++ orr r1, r1, #0x63 @ bootloader JUMP doesn't set r1 ++ + b 1f + .word 0x016f2818 @ Magic numbers to help the loader + .word start @ absolute load/run zImage address +Index: linux-2.6.20.7/include/asm-arm/arch-pxa/uncompress.h +=================================================================== +--- linux-2.6.20.7.orig/include/asm-arm/arch-pxa/uncompress.h 2007-04-21 22:31:54.000000000 -0300 ++++ linux-2.6.20.7/include/asm-arm/arch-pxa/uncompress.h 2007-04-21 22:32:53.000000000 -0300 +@@ -14,14 +14,14 @@ + #define STUART ((volatile unsigned long *)0x40700000) + #define HWUART ((volatile unsigned long *)0x41600000) + +-#define UART FFUART ++#define UART STUART + + + static inline void putc(char c) + { +- while (!(UART[5] & 0x20)) ++/* while (!(UART[5] & 0x40)) + barrier(); +- UART[0] = c; ++ UART[0] = c;*/ + } + + /* +Index: linux-2.6.20.7/arch/arm/mach-pxa/ezx_ssp.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-2.6.20.7/arch/arm/mach-pxa/ezx_ssp.c 2007-04-22 01:36:48.000000000 -0300 +@@ -0,0 +1,130 @@ ++/* ++ * SSP control code for Motorola EZX phones ++ * ++ * Copyright (c) 2007 Daniel Ribeiro <drwyrm@gmail.com> ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ * ++ */ ++ ++#include <linux/module.h> ++#include <linux/init.h> ++#include <linux/kernel.h> ++#include <linux/sched.h> ++#include <linux/slab.h> ++#include <linux/delay.h> ++#include <linux/platform_device.h> ++#include <asm/hardware.h> ++#include <asm/mach-types.h> ++ ++#include <asm/arch/ssp.h> ++#include <asm/arch/pxa-regs.h> ++ ++#include "ezx.h" ++ ++static DEFINE_SPINLOCK(ezx_ssp_lock); ++static struct ssp_dev ezx_ssp_dev; ++static struct ssp_state ezx_ssp_state; ++static struct ezxssp_machinfo *ssp_machinfo; ++ ++/* PCAP */ ++unsigned long ezx_ssp_pcap_putget(ulong data) ++{ ++ unsigned long flag; ++ u32 ret = 0; ++ ++ spin_lock_irqsave(&ezx_ssp_lock, flag); ++ if (ssp_machinfo->cs_pcap >= 0) ++ GPCR(ssp_machinfo->cs_pcap) = GPIO_bit(ssp_machinfo->cs_pcap); ++ ++ ssp_write_word(&ezx_ssp_dev,data); ++ ssp_read_word(&ezx_ssp_dev, &ret); ++ ++ if (ssp_machinfo->cs_pcap >= 0) ++ GPSR(ssp_machinfo->cs_pcap) = GPIO_bit(ssp_machinfo->cs_pcap); ++ spin_unlock_irqrestore(&ezx_ssp_lock, flag); ++ ++ return ret; ++} ++EXPORT_SYMBOL(ezx_ssp_pcap_putget); ++ ++/* ASSP */ ++ ++/* NSSP */ ++ ++void __init ezx_ssp_set_machinfo(struct ezxssp_machinfo *machinfo) ++{ ++ ssp_machinfo = machinfo; ++} ++ ++static int __init ezx_ssp_probe(struct platform_device *dev) ++{ ++ int ret; ++ /* PCAP init */ ++ pxa_gpio_mode(29|GPIO_ALT_FN_3_OUT); ++ pxa_gpio_mode(GPIO24_SFRM_MD); ++ pxa_gpio_mode(GPIO25_STXD_MD); ++ pxa_gpio_mode(GPIO26_SRXD_MD); ++ ++ /* Chip Select - Disable All */ ++ if (ssp_machinfo->cs_pcap >= 0) ++ pxa_gpio_mode(ssp_machinfo->cs_pcap | GPIO_OUT | GPIO_DFLT_HIGH); ++ ++ ret = ssp_init(&ezx_ssp_dev, ssp_machinfo->port, 0); ++ ++ if (ret) ++ printk(KERN_ERR "Unable to register SSP handler!\n"); ++ else { ++ ssp_disable(&ezx_ssp_dev); ++ ssp_config(&ezx_ssp_dev, ++ (SSCR0_Motorola | SSCR0_DataSize(16) | SSCR0_EDSS), ++ (SSCR1_TxTresh(1) | SSCR1_RxTresh(1)), ++ 0, SSCR0_SerClkDiv(ssp_machinfo->clk_pcap)); ++ ssp_enable(&ezx_ssp_dev); ++ } ++ ++ return ret; ++} ++ ++static int ezx_ssp_remove(struct platform_device *dev) ++{ ++ ssp_exit(&ezx_ssp_dev); ++ return 0; ++} ++ ++static int ezx_ssp_suspend(struct platform_device *dev, pm_message_t state) ++{ ++ ssp_flush(&ezx_ssp_dev); ++ ssp_save_state(&ezx_ssp_dev,&ezx_ssp_state); ++ ++ return 0; ++} ++ ++static int ezx_ssp_resume(struct platform_device *dev) ++{ ++ if (ssp_machinfo->cs_pcap >= 0) ++ GPSR(ssp_machinfo->cs_pcap) = GPIO_bit(ssp_machinfo->cs_pcap); ++ ssp_restore_state(&ezx_ssp_dev,&ezx_ssp_state); ++ ssp_enable(&ezx_ssp_dev); ++ ++ return 0; ++} ++ ++static struct platform_driver ezxssp_driver = { ++ .probe = ezx_ssp_probe, ++ .remove = ezx_ssp_remove, ++ .suspend = ezx_ssp_suspend, ++ .resume = ezx_ssp_resume, ++ .driver = { ++ .name = "ezx-ssp", ++ }, ++}; ++ ++int __init ezx_ssp_init(void) ++{ ++ return platform_driver_register(&ezxssp_driver); ++} ++ ++arch_initcall(ezx_ssp_init); +Index: linux-2.6.20.7/arch/arm/mach-pxa/ezx.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-2.6.20.7/arch/arm/mach-pxa/ezx.h 2007-04-22 01:38:55.000000000 -0300 +@@ -0,0 +1,9 @@ ++#include <asm/arch/ezx.h> ++ ++/* SSP */ ++struct ezxssp_machinfo { ++ int port; ++ int cs_pcap; ++ int clk_pcap; ++}; ++ +Index: linux-2.6.20.7/arch/arm/mach-pxa/ezx_lcd.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-2.6.20.7/arch/arm/mach-pxa/ezx_lcd.c 2007-04-21 22:32:53.000000000 -0300 +@@ -0,0 +1,112 @@ ++/* ++ * linux/arch/arm/mach-ezx/a780.c ++ * ++ * Support for the Motorola Ezx A780 Development Platform. ++ * ++ * Author: Zhuang Xiaofan ++ * Created: Nov 25, 2003 ++ * Copyright: Motorola Inc. ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ */ ++ ++#include <linux/fb.h> ++#include <linux/delay.h> ++#include <asm/arch/pxafb.h> ++#include <asm/arch/pxa-regs.h> ++ ++/* ++ * EZX PXA Framebuffer ++ */ ++ ++static void pxafb_lcd_power(int on, struct fb_var_screeninfo *var) ++{ ++ if (on) { ++// mdelay(1); ++ GPSR3 = 0x00100000; ++ mdelay(10); ++ GPCR3 = 0x00100000; ++ GPDR3 |= 0x00100000; ++ } else { ++ GPSR3 = 0x00100000; ++ PGSR3 |= 0x00100000; ++ mdelay(41); ++ LCCR0 &= ~LCCR0_LDM; /* disable lcd disable done interrupt */ ++ LCCR0 |= LCCR0_DIS; /* normal disable lcd */ ++ mdelay(18); ++ } ++} ++ ++#ifdef CONFIG_PXA_E2 ++static void sumatra_backlight_power(int on) ++{ ++ if (on) { ++ pxa_gpio_mode(GPIO16_PWM0_MD); ++ pxa_set_cken(CKEN0_PWM0, 1); ++ PWM_CTRL0 = 0; ++ PWM_PWDUTY0 = 0x3ff; ++ PWM_PERVAL0 = 0x3ff; ++ } else { ++ PWM_CTRL0 = 0; ++ PWM_PWDUTY0 = 0x0; ++ PWM_PERVAL0 = 0x3FF; ++ pxa_set_cken(CKEN0_PWM0, 0); ++ } ++} ++ ++static struct pxafb_mode_info mode_ezx = { ++ .pixclock = 192308, ++ .xres = 240, ++ .yres = 320, ++ .bpp = 8, ++ .hsync_len = 10, ++ .left_margin = 20, ++ .right_margin = 10, ++ .vsync_len = 2, ++ .upper_margin = 3, ++ .lower_margin = 2, ++ .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, ++}; ++ ++static struct pxafb_mach_info ezx_fb_info __initdata = { ++ .modes = &mode_ezx, ++ .num_modes = 1, ++ .lccr0 = 0x022008B8, ++ .lccr3 = 0xC130FF13, ++ .pxafb_backlight_power = sumatra_backlight_power, ++ .pxafb_lcd_power = &pxafb_lcd_power, ++}; ++ ++#else ++static struct pxafb_mode_info mode_ezx = { ++ .pixclock = 150000, ++ .xres = 240, ++ .yres = 320, ++ .bpp = 16, ++ .hsync_len = 10, ++ .left_margin = 20, ++ .right_margin = 10, ++ .vsync_len = 2, ++ .upper_margin = 3, ++ .lower_margin = 2, ++ .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, ++}; ++ ++static struct pxafb_mach_info ezx_fb_info __initdata = { ++ .modes = &mode_ezx, ++ .num_modes = 1, ++ .lccr0 = 0x002008F8, ++ .lccr3 = 0x0430FF09, ++ .pxafb_lcd_power= &pxafb_lcd_power, ++}; ++#endif ++ ++int __init __ezx_lcd_init (void) ++{ ++ set_pxa_fb_info(&ezx_fb_info); ++ return 0; ++} ++ ++arch_initcall(__ezx_lcd_init); +Index: linux-2.6.20.7/arch/arm/mm/init.c +=================================================================== +--- linux-2.6.20.7.orig/arch/arm/mm/init.c 2007-04-21 22:32:57.000000000 -0300 ++++ linux-2.6.20.7/arch/arm/mm/init.c 2007-04-21 22:44:03.000000000 -0300 +@@ -241,6 +241,10 @@ + */ + reserve_bootmem_node(pgdat, boot_pfn << PAGE_SHIFT, + boot_pages << PAGE_SHIFT); ++#ifdef CONFIG_ARCH_EZX ++ /* reserve the first page memory for exiting sleep and user off */ ++ reserve_bootmem_node(pgdat, PHYS_OFFSET, PAGE_SIZE); ++#endif + + #ifdef CONFIG_BLK_DEV_INITRD + /* diff --git a/packages/linux/linux-ezx-2.6.20.7/ezx-emu.patch b/packages/linux/linux-ezx-2.6.20.7/ezx-emu.patch new file mode 100644 index 0000000000..de9de60461 --- /dev/null +++ b/packages/linux/linux-ezx-2.6.20.7/ezx-emu.patch @@ -0,0 +1,332 @@ +Index: linux-2.6.20.7/arch/arm/mach-pxa/ezx-emu.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-2.6.20.7/arch/arm/mach-pxa/ezx-emu.c 2007-04-21 12:33:22.000000000 -0300 +@@ -0,0 +1,215 @@ ++/* ++ * EMU Driver for Motorola EZX phones ++ * ++ * Copyright (c) 2007 Daniel Ribeiro <drwyrm@gmail.com> ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ * ++ */ ++ ++#include <linux/kernel.h> ++#include <linux/interrupt.h> ++#include <linux/module.h> ++#include <linux/platform_device.h> ++ ++#include <asm/arch/hardware.h> ++#include <asm/arch/pxa-regs.h> ++#include <asm/arch/ezx.h> ++#include <asm/arch/ezx-pcap.h> ++#include <asm/arch/udc.h> ++ ++static struct pxa2xx_udc_mach_info ezx_udc_info; ++extern int ezx_pcap_bit_set(u_int32_t, u_int8_t); ++extern int ezx_pcap_read_bit(u_int32_t); ++ ++void emu_switch_to_usb(void) ++{ ++ pxa_gpio_mode(GPIO34_USB_P2_2_MD); ++ pxa_gpio_mode(GPIO35_USB_P2_1_MD); ++ pxa_gpio_mode(GPIO36_USB_P2_4_MD); ++ pxa_gpio_mode(GPIO39_USB_P2_6_MD); ++ pxa_gpio_mode(GPIO40_USB_P2_5_MD); ++ pxa_gpio_mode(GPIO53_USB_P2_3_MD); ++ UP2OCR = 0x02000000; ++ ezx_pcap_bit_set(SSP_PCAP_ADJ_BIT_BUSCTRL_RS232ENB, 1); ++ ezx_pcap_bit_set(SSP_PCAP_ADJ_BIT_BUSCTRL_FSENB, 0); ++ ezx_pcap_bit_set(SSP_PCAP_ADJ_BIT_BUSCTRL_VUSB_EN, 1); ++ clr_GPIO(GPIO_EMU_MUX1); ++ clr_GPIO(GPIO_EMU_MUX2); ++} ++EXPORT_SYMBOL(emu_switch_to_usb); ++ ++void emu_switch_to_uart(void) ++{ ++ ezx_pcap_bit_set(SSP_PCAP_ADJ_BIT_BUSCTRL_VUSB_EN,0); ++ ezx_pcap_bit_set(SSP_PCAP_ADJ_BIT_BUSCTRL_RS232ENB, 0); ++ ezx_pcap_bit_set(SSP_PCAP_ADJ_BIT_BUSCTRL_RS232_DIR, 1); ++ set_GPIO(GPIO39_FFTXD); ++ pxa_gpio_mode(GPIO34_TXENB | GPIO_OUT); ++ set_GPIO(GPIO34_TXENB); ++ pxa_gpio_mode(GPIO35_XRXD | GPIO_IN); ++ pxa_gpio_mode(GPIO36_VMOUT | GPIO_IN); ++ pxa_gpio_mode(GPIO40_VPIN | GPIO_IN); ++ pxa_gpio_mode(GPIO39_FFTXD_MD); ++ pxa_gpio_mode(GPIO53_FFRXD_MD); ++ CKEN |= CKEN6_FFUART; ++ clr_GPIO(GPIO_EMU_MUX1); ++ clr_GPIO(GPIO_EMU_MUX2); ++ ++} ++EXPORT_SYMBOL(emu_switch_to_uart); ++ ++void emu_switch_to_audio(int stereo) ++{ ++ clr_GPIO(GPIO39_VPOUT); ++ if (stereo) { ++ pxa_gpio_mode(GPIO34_USB_P2_2 | GPIO_IN); ++ clr_GPIO(GPIO39_VPOUT); ++ } else { ++ pxa_gpio_mode(GPIO34_TXENB | GPIO_OUT); ++ set_GPIO(GPIO34_TXENB); ++ } ++ ++ pxa_gpio_mode(GPIO35_XRXD | GPIO_IN); ++ pxa_gpio_mode(GPIO36_VMOUT | GPIO_IN); ++ pxa_gpio_mode(GPIO39_VPOUT | GPIO_IN); ++ pxa_gpio_mode(GPIO40_VPIN | GPIO_IN); ++ pxa_gpio_mode(GPIO53_VMIN | GPIO_IN); ++ set_GPIO(GPIO_EMU_MUX1); ++ if (stereo) ++ set_GPIO(GPIO_EMU_MUX2); ++ else ++ clr_GPIO(GPIO_EMU_MUX2); ++} ++ ++void emu_switch_to_nothing(void) ++{ ++ ezx_pcap_bit_set(SSP_PCAP_ADJ_BIT_BUSCTRL_VUSB_EN, 0); ++ ezx_pcap_bit_set(SSP_PCAP_ADJ_BIT_BUSCTRL_RS232ENB, 1); ++ pxa_gpio_mode(GPIO34_TXENB | GPIO_OUT); ++ set_GPIO(GPIO34_TXENB); ++ pxa_gpio_mode(GPIO35_XRXD | GPIO_IN); ++ pxa_gpio_mode(GPIO36_VMOUT | GPIO_IN); ++ pxa_gpio_mode(GPIO39_VPOUT | GPIO_IN); ++ pxa_gpio_mode(GPIO40_VPIN | GPIO_IN); ++ pxa_gpio_mode(GPIO53_VMIN | GPIO_IN); ++} ++ ++ ++static irqreturn_t emu_irq(int irq, void *data) ++{ ++ printk("emu_irq(%u) entered: ", irq); ++ ++ switch (irq) { ++ case EZX_IRQ_USB4V: ++ printk("usb 4v\n"); ++ if(ezx_pcap_read_bit(SSP_PCAP_ADJ_BIT_PSTAT_USBDET_4V)) ++#if defined CONFIG_PXA_EZX_EMU_USB ++ emu_switch_to_usb(); ++#elif defined CONFIG_PXA_EZX_EMU_UART ++ emu_switch_to_uart(); ++#else ++ emu_switch_to_nothing(); ++#endif ++ else ++ emu_switch_to_nothing(); ++ break; ++ case EZX_IRQ_USB1V: ++ printk("usb 1v\n"); ++ break; ++ default: ++ printk("unknown\n"); ++ break; ++ } ++ ++ return IRQ_HANDLED; ++} ++ ++static int __init ezx_emu_probe(struct platform_device *dev) ++{ ++ printk("ezx_emu_probe entered!\n"); ++ pxa_gpio_mode(GPIO_SNP_INT_IN | GPIO_IN); ++ pxa_gpio_mode(GPIO_EMU_MUX1 | GPIO_OUT); ++ pxa_gpio_mode(GPIO_EMU_MUX2 | GPIO_OUT); ++ ++ request_irq(EZX_IRQ_USB4V, &emu_irq, SA_INTERRUPT, "usb 4v", NULL); ++ request_irq(EZX_IRQ_USB1V, &emu_irq, SA_INTERRUPT, "usb 1v", NULL); ++ ++ pxa_set_udc_info(&ezx_udc_info); ++ ++#if defined CONFIG_PXA_EZX_EMU_USB ++ emu_switch_to_usb(); ++#elif defined CONFIG_PXA_EZX_EMU_UART ++ emu_switch_to_uart(); ++#else ++ emu_switch_to_nothing(); ++#endif ++ ++ return 0; ++} ++ ++static int ezx_emu_remove(struct platform_device *dev) ++{ ++ free_irq(EZX_IRQ_USB4V, NULL); ++ free_irq(EZX_IRQ_USB1V, NULL); ++ ++ return 0; ++} ++ ++/* USB Device Controller */ ++static int udc_connected_status; ++static void ezx_udc_command(int cmd) ++{ ++ switch (cmd) { ++ case PXA2XX_UDC_CMD_DISCONNECT: ++ printk(KERN_NOTICE "USB cmd disconnect\n"); ++ ezx_pcap_bit_set(SSP_PCAP_ADJ_BIT_BUSCTRL_USB_PU,0); ++ udc_connected_status = 0; ++ break; ++ case PXA2XX_UDC_CMD_CONNECT: ++ printk(KERN_NOTICE "USB cmd connect\n"); ++ ezx_pcap_bit_set(SSP_PCAP_ADJ_BIT_BUSCTRL_USB_PU,1); ++ udc_connected_status = 1; ++ break; ++ } ++} ++ ++static int ezx_udc_is_connected(void) ++{ ++ return udc_connected_status; ++} ++ ++static struct pxa2xx_udc_mach_info ezx_udc_info __initdata = { ++ .udc_is_connected = ezx_udc_is_connected, ++ .udc_command = ezx_udc_command, ++}; ++ ++static struct platform_driver ezxemu_driver = { ++ .probe = ezx_emu_probe, ++ .remove = ezx_emu_remove, ++ //.suspend = ezx_emu_suspend, ++ //.resume = ezx_emu_resume, ++ .driver = { ++ .name = "ezx-emu", ++ .owner = THIS_MODULE, ++ }, ++}; ++ ++int __init ezx_emu_init(void) ++{ ++ return platform_driver_register(&ezxemu_driver); ++} ++ ++void ezx_emu_fini(void) ++{ ++ return platform_driver_unregister(&ezxemu_driver); ++} ++ ++module_init(ezx_emu_init); ++module_exit(ezx_emu_fini); ++ ++MODULE_DESCRIPTION("Motorola Enchanced Mini Usb driver"); ++MODULE_AUTHOR("Daniel Ribeiro <drwyrm@gmail.com>"); ++MODULE_LICENSE("GPL"); +Index: linux-2.6.20.7/arch/arm/mach-pxa/Kconfig +=================================================================== +--- linux-2.6.20.7.orig/arch/arm/mach-pxa/Kconfig 2007-04-21 12:32:50.000000000 -0300 ++++ linux-2.6.20.7/arch/arm/mach-pxa/Kconfig 2007-04-21 12:32:54.000000000 -0300 +@@ -94,6 +94,27 @@ + + endchoice + ++config PXA_EZX_EMU ++ bool "Motorola Enchanced Mini Usb" ++ ++if PXA_EZX_EMU ++ ++choice ++ prompt "Select default EMU mode" ++ ++config PXA_EZX_EMU_USB ++ bool "USB" ++ ++config PXA_EZX_EMU_UART ++ bool "UART" ++ ++config PXA_EZX_EMU_NOTHING ++ bool "nothing" ++ ++endchoice ++ ++endif ++ + endif + + endmenu +Index: linux-2.6.20.7/arch/arm/mach-pxa/Makefile +=================================================================== +--- linux-2.6.20.7.orig/arch/arm/mach-pxa/Makefile 2007-04-21 12:32:50.000000000 -0300 ++++ linux-2.6.20.7/arch/arm/mach-pxa/Makefile 2007-04-21 12:32:54.000000000 -0300 +@@ -19,6 +19,7 @@ + obj-$(CONFIG_MACH_POODLE) += poodle.o corgi_ssp.o + obj-$(CONFIG_MACH_TOSA) += tosa.o + obj-$(CONFIG_PXA_EZX) += ezx.o ezx_lcd.o ezx_ssp.o ezx-pcap.o ezx-mci.o ++obj-$(CONFIG_PXA_EZX_EMU) += ezx-emu.o + + # Support for blinky lights + led-y := leds.o +Index: linux-2.6.20.7/arch/arm/mach-pxa/ezx.c +=================================================================== +--- linux-2.6.20.7.orig/arch/arm/mach-pxa/ezx.c 2007-04-21 12:32:50.000000000 -0300 ++++ linux-2.6.20.7/arch/arm/mach-pxa/ezx.c 2007-04-21 12:32:54.000000000 -0300 +@@ -36,6 +36,7 @@ + #include <asm/arch/ohci.h> + #include <asm/arch/pxa-regs.h> + ++ + #include "ezx.h" + #include "generic.h" + #include <linux/tty.h> +@@ -92,6 +93,30 @@ + .resource = ezxpcap_resources, + }; + ++/* EMU */ ++static struct resource ezxemu_resources[] = { ++ [0] = { ++ .start = EZX_IRQ_USB4V, ++ .end = EZX_IRQ_USB4V, ++ .flags = IORESOURCE_IRQ, ++ }, ++ [1] = { ++ .start = EZX_IRQ_USB1V, ++ .end = EZX_IRQ_USB1V, ++ .flags = IORESOURCE_IRQ, ++ }, ++}; ++ ++struct platform_device ezxemu_device = { ++ .name = "ezx-emu", ++ .id = -1, ++// .dev = { ++// .parent = &ezxpcap_device.dev, ++// }, ++ .num_resources = ARRAY_SIZE(ezxemu_resources), ++ .resource = ezxemu_resources, ++}; ++ + /* OHCI Controller */ + + static int ezx_ohci_init(struct device *dev) +@@ -317,6 +342,7 @@ + &ezxssp_device, + &ezxpcap_device, + &ezxbp_device, ++ &ezxemu_device, + }; + + static void __init a780_init(void) +@@ -383,7 +409,15 @@ + pxa_set_ohci_info(&ezx_ohci_platform_data); + + platform_add_devices(devices, ARRAY_SIZE(devices)); +- ++/* ++#if defined CONFIG_PXA_EZX_EMU_USB ++ emu_switch_to_usb(); ++#elif defined CONFIG_PXA_EZX_EMU_UART ++ emu_switch_to_uart(); ++#else ++ emu_switch_to_nothing(); ++#endif ++*/ + } + + MACHINE_START(EZX, "Motorola Ezx Platform") diff --git a/packages/linux/linux-ezx-2.6.20.7/ezx-fix-usb_pxa27x_udc-r3.patch b/packages/linux/linux-ezx-2.6.20.7/ezx-fix-usb_pxa27x_udc-r3.patch new file mode 100644 index 0000000000..c3cbf25a09 --- /dev/null +++ b/packages/linux/linux-ezx-2.6.20.7/ezx-fix-usb_pxa27x_udc-r3.patch @@ -0,0 +1,16 @@ +Index: linux-2.6.20.7/drivers/usb/gadget/pxa27x_udc.c +=================================================================== +--- linux-2.6.20.7.orig/drivers/usb/gadget/pxa27x_udc.c 2007-04-21 12:30:51.000000000 -0300 ++++ linux-2.6.20.7/drivers/usb/gadget/pxa27x_udc.c 2007-04-21 12:32:21.000000000 -0300 +@@ -1615,8 +1615,9 @@ + + DMSG("Connecting\n"); + /* RPFIXME */ +- UP2OCR = UP2OCR_HXOE | UP2OCR_DPPUE | UP2OCR_DPPUBE; +- //dev->mach->udc_command(PXA2XX_UDC_CMD_CONNECT); ++ //UP2OCR = UP2OCR_HXOE | UP2OCR_DPPUE | UP2OCR_DPPUBE; ++ UP2OCR = 0x02000000; // temporary solution for ezx. ++ dev->mach->udc_command(PXA2XX_UDC_CMD_CONNECT); + } + + diff --git a/packages/linux/linux-ezx-2.6.20.7/ezx-mci.patch b/packages/linux/linux-ezx-2.6.20.7/ezx-mci.patch new file mode 100644 index 0000000000..d16693e3e4 --- /dev/null +++ b/packages/linux/linux-ezx-2.6.20.7/ezx-mci.patch @@ -0,0 +1,177 @@ +Index: linux-2.6.20.7/arch/arm/mach-pxa/ezx-mci.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-2.6.20.7/arch/arm/mach-pxa/ezx-mci.c 2007-04-20 01:10:13.000000000 -0300 +@@ -0,0 +1,159 @@ ++/* ++ * linux/arch/arm/mach-ezx/a780.c ++ * ++ * Support for the Motorola Ezx A780 Development Platform. ++ * ++ * Author: Zhuang Xiaofan ++ * Created: Nov 25, 2003 ++ * Copyright: Motorola Inc. ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ */ ++ ++#include <linux/mmc/host.h> ++#include <linux/irq.h> ++#include <asm/irq.h> ++#include <asm/arch/pxa-regs.h> ++#include <asm/arch/ezx-pcap.h> ++#include <asm/arch/mmc.h> ++#include <asm/arch/hardware.h> ++ ++extern int ezx_pcap_mmcsd_power(int); ++extern void ezx_pcap_mmcsd_voltage(u_int32_t); ++ ++static struct pxamci_platform_data ezx_mci_platform_data; ++ ++static int ezx_mci_init(struct device *dev, ++ irqreturn_t (*ezx_detect_int)(int, void *), ++ void *data) ++{ ++ int err; ++ printk("%s entered\n", __FUNCTION__); ++ ++ /* Setup GPIO for PXA27x MMC/SD controller */ ++ pxa_gpio_mode(GPIO32_MMCCLK_MD); ++ pxa_gpio_mode(GPIO112_MMCCMD_MD); ++ pxa_gpio_mode(GPIO92_MMCDAT0_MD); ++ pxa_gpio_mode(GPIO109_MMCDAT1_MD); ++ pxa_gpio_mode(GPIO110_MMCDAT2_MD); ++ pxa_gpio_mode(GPIO111_MMCDAT3_MD); ++ ++ ezx_pcap_mmcsd_power(1); ++ ++ ezx_mci_platform_data.detect_delay = msecs_to_jiffies(250); ++ ++ err = request_irq(0x49, ezx_detect_int, SA_INTERRUPT, ++ "MMC card detect", data); ++ if (err) { ++ printk(KERN_ERR "ezx_mci_detect: MMC/SD: can't request " ++ "MMC card detect IRQ\n"); ++ return -1; ++ } ++ ++ set_irq_type(0x0b, IRQT_BOTHEDGE); ++ ++ return 0; ++} ++ ++static int ezx_mci_get_ro(struct device *dev) ++{ ++ printk("%s entered\n", __FUNCTION__); ++#if defined(CONFIG_PXA_EZX_E680) ++ /* this is only e680, i guess */ ++ // return GPIO_is_high(96+4); ++ return (GPLR3 & 0x800); ++#else ++ return 0; ++#endif ++} ++ ++#if defined(CONFIG_PXA_EZX_A780) ++static u_int8_t mmc_voltage[] = { ++ [MMC_VDD_160] = 5, ++ [MMC_VDD_170] = 5, ++ [MMC_VDD_180] = 6, ++ [MMC_VDD_190] = 6, ++ [MMC_VDD_200] = 7, ++ [MMC_VDD_210] = 7, ++ [MMC_VDD_220] = 8, ++ [MMC_VDD_230] = 8, ++ [MMC_VDD_240] = 9, ++ [MMC_VDD_250] = 9, ++ [MMC_VDD_260] = 10, ++ [MMC_VDD_270] = 10, ++ [MMC_VDD_280] = 11, ++ [MMC_VDD_290] = 11, ++ [MMC_VDD_300] = 12, ++ [MMC_VDD_310] = 12, ++ [MMC_VDD_320] = 13, ++ [MMC_VDD_330] = 13, ++ [MMC_VDD_340] = 14, ++ [MMC_VDD_350] = 14, ++ [MMC_VDD_360] = 15, ++}; ++#elif defined(CONFIG_PXA_EZX_E680) ++static u_int8_t mmc_voltage[] = { ++ [MMC_VDD_160] = 3, ++ [MMC_VDD_170] = 3, ++ [MMC_VDD_180] = 3, ++ [MMC_VDD_190] = 3, ++ [MMC_VDD_200] = 3, ++ [MMC_VDD_210] = 3, ++ [MMC_VDD_220] = 3, ++ [MMC_VDD_230] = 3, ++ [MMC_VDD_240] = 3, ++ [MMC_VDD_250] = 3, ++ [MMC_VDD_260] = 3, ++ [MMC_VDD_270] = 3, ++ [MMC_VDD_280] = 3, ++ [MMC_VDD_290] = 3, ++ [MMC_VDD_300] = 3, ++ [MMC_VDD_310] = 3, ++ [MMC_VDD_320] = 3, ++ [MMC_VDD_330] = 3, ++ [MMC_VDD_340] = 3, ++ [MMC_VDD_350] = 3, ++ [MMC_VDD_360] = 3, ++}; ++#endif ++ ++static void ezx_mci_setpower(struct device *dev, unsigned int vdd) ++{ ++ printk("%s(vdd=%u) entered\n", __FUNCTION__, vdd); ++ if (vdd <= MMC_VDD_360) ++ ezx_pcap_mmcsd_voltage(mmc_voltage[vdd]); ++ ++ ezx_pcap_mmcsd_power(1); ++} ++ ++static void ezx_mci_exit(struct device *dev, void *data) ++{ ++ printk("%s entered\n", __FUNCTION__); ++ ezx_pcap_mmcsd_power(0); ++ free_irq(0x49, data); ++} ++ ++static struct pxamci_platform_data ezx_mci_platform_data = { ++#if defined(CONFIG_PXA_EZX_E680) ++ .ocr_mask = MMC_VDD_27_28, ++#elif defined(CONFIG_PXA_EZX_A780) ++ .ocr_mask = MMC_VDD_160_165|MMC_VDD_18_19|MMC_VDD_20_21 ++ |MMC_VDD_22_23|MMC_VDD_24_25|MMC_VDD_26_27 ++ |MMC_VDD_28_29|MMC_VDD_30_31|MMC_VDD_32_33 ++ |MMC_VDD_34_35|MMC_VDD_35_36, ++#endif ++ .init = ezx_mci_init, ++ .get_ro = ezx_mci_get_ro, ++ .setpower = ezx_mci_setpower, ++ .exit = ezx_mci_exit, ++}; ++ ++int __init __ezx_mci_init (void) ++{ ++ pxa_set_mci_info(&ezx_mci_platform_data); ++ return 0; ++} ++ ++arch_initcall(__ezx_mci_init); +Index: linux-2.6.20.7/arch/arm/mach-pxa/Makefile +=================================================================== +--- linux-2.6.20.7.orig/arch/arm/mach-pxa/Makefile 2007-04-21 02:56:16.000000000 -0300 ++++ linux-2.6.20.7/arch/arm/mach-pxa/Makefile 2007-04-21 03:00:03.000000000 -0300 +@@ -18,7 +18,7 @@ + obj-$(CONFIG_MACH_AKITA) += akita-ioexp.o + obj-$(CONFIG_MACH_POODLE) += poodle.o corgi_ssp.o + obj-$(CONFIG_MACH_TOSA) += tosa.o +-obj-$(CONFIG_PXA_EZX) += ezx.o ezx_lcd.o ezx_ssp.o ezx-pcap.o ++obj-$(CONFIG_PXA_EZX) += ezx.o ezx_lcd.o ezx_ssp.o ezx-pcap.o ezx-mci.o + + # Support for blinky lights + led-y := leds.o diff --git a/packages/linux/linux-ezx-2.6.20.7/ezx-mtd-map.patch b/packages/linux/linux-ezx-2.6.20.7/ezx-mtd-map.patch new file mode 100644 index 0000000000..f59e31d9a2 --- /dev/null +++ b/packages/linux/linux-ezx-2.6.20.7/ezx-mtd-map.patch @@ -0,0 +1,274 @@ +Index: linux-2.6.20.7/drivers/mtd/maps/Kconfig +=================================================================== +--- linux-2.6.20.7.orig/drivers/mtd/maps/Kconfig 2007-04-21 12:47:04.000000000 -0300 ++++ linux-2.6.20.7/drivers/mtd/maps/Kconfig 2007-04-21 13:01:08.000000000 -0300 +@@ -595,6 +595,28 @@ + help + This enables access to the flash chip on the Sharp SL Series of PDAs. + ++config MTD_EZX ++ bool "Map driver for Motorola EZX Platform" ++ depends on MTD && PXA_EZX ++ ++if MTD_EZX ++ ++choice ++ prompt "Select partition mapping for EZX platform" ++ ++config MTD_EZX_A780 ++ bool "A780/E680 Original Mapping" ++ ++config MTD_EZX_A780_ALTERNATE ++ bool "A780/E680 Alternate Mapping for BLOB2" ++ ++config MTD_EZX_E2 ++ bool "E2 Original Mapping" ++ ++endchoice ++ ++endif ++ + config MTD_PLATRAM + tristate "Map driver for platform device RAM (mtd-ram)" + depends on MTD +Index: linux-2.6.20.7/drivers/mtd/maps/Makefile +=================================================================== +--- linux-2.6.20.7.orig/drivers/mtd/maps/Makefile 2007-04-21 12:55:09.000000000 -0300 ++++ linux-2.6.20.7/drivers/mtd/maps/Makefile 2007-04-21 12:55:45.000000000 -0300 +@@ -72,3 +72,4 @@ + obj-$(CONFIG_MTD_OMAP_NOR) += omap_nor.o + obj-$(CONFIG_MTD_MTX1) += mtx-1_flash.o + obj-$(CONFIG_MTD_TQM834x) += tqm834x.o ++obj-$(CONFIG_MTD_EZX) += ezx-flash.o +Index: linux-2.6.20.7/drivers/mtd/maps/ezx-flash.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-2.6.20.7/drivers/mtd/maps/ezx-flash.c 2007-04-21 13:07:14.000000000 -0300 +@@ -0,0 +1,227 @@ ++/* ++ * $Id: $ ++ * ++ * Map driver for the PXA27x ++ * ++ * Author: Harald Welte ++ * Copyright: (C) 2001 MontaVista Software Inc. ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ * ++ * Mar 3, 2007 - (Daniel Ribeiro) Alternate partition table ++ * ++ */ ++ ++#include <linux/module.h> ++#include <linux/types.h> ++#include <linux/kernel.h> ++#include <linux/init.h> ++#include <linux/dma-mapping.h> ++#include <linux/slab.h> ++ ++#include <linux/mtd/mtd.h> ++#include <linux/mtd/map.h> ++#include <linux/mtd/partitions.h> ++ ++#include <asm/io.h> ++#include <asm/hardware.h> ++#include <asm/arch/pxa-regs.h> ++#include <asm/arch/mainstone.h> ++ ++#define WINDOW_ADDR 0x0 ++#define WINDOW_SIZE (32*1024*1024) ++#define WINDOW_CACHE_ADDR 0x0 ++#define WINDOW_CACHE_SIZE 0x1a00000 ++ ++static void pxa27x_map_inval_cache(struct map_info *map, unsigned long from, ++ ssize_t len) ++{ ++#if 0 ++ unsigned long endaddress, i, j; ++ endaddress = from + len -1; ++ from &= ~(32-1); ++ endaddress &= ~(32-1); ++ for (i = from; i <= endaddress; i += 32) ++ asm("mcr p15, 0, %0, c7, c6, 1"::"r"(i)); ++ ++ asm( "mrc p15, 0, %0, c2, c0, 0\n" ++ "mov %0, %0\n" ++ "sub pc, pc #4" ++ :"=r"(j)); ++#else ++ consistent_sync((char *)map->cached + from, len, DMA_FROM_DEVICE); ++#endif ++} ++ ++ ++struct map_info pxa27x_map = { ++ .name = "PXA27x flash", ++ .size = WINDOW_SIZE, ++ .phys = WINDOW_ADDR, ++ .inval_cache = &pxa27x_map_inval_cache, ++}; ++ ++#if defined CONFIG_MTD_EZX_A780_ALTERNATE ++static struct mtd_partition pxa27x_partitions[] = { ++ { ++ .name = "Bootloader (RO)", ++ .size = 0x00020000, ++ .offset = 0, ++ .mask_flags = MTD_WRITEABLE, ++ }, { ++ .name = "Bootloader 2", ++ .size = 0x00020000, ++ .offset = 0x00020000, ++ } , { ++ .name = "Kernel 1", ++ .size = 0x000e0000, // 896KB ++ .offset = 0x00040000, ++ } , { ++ .name = "rootfs", ++ .size = 0x01760000, ++ .offset = 0x00120000, ++ } , { ++ .name = "Kernel 2", ++ .size = 0x00180000, // 1.5MB ++ .offset = 0x01880000, ++ } , { ++ .name = "VFM_Filesystem", ++ .size = 0x005a0000, ++ .offset = 0x01a00000, ++ } , { ++ .name = "setup", ++ .size = 0x00020000, ++ .offset = 0x01fa0000, ++ } , { ++ .name = "Logo", ++ .size = 0x00020000, ++ .offset = 0x01fc0000, ++ }, ++}; ++#elif defined CONFIG_MTD_EZX_A780 ++static struct mtd_partition pxa27x_partitions[] = { ++ { ++ .name = "Bootloader", ++ .size = 0x00020000, ++ .offset = 0, ++ .mask_flags = MTD_WRITEABLE, ++ }, { ++ .name = "Kernel", ++ .size = 0x000e0000, ++ .offset = 0x00020000, ++ } , { ++ .name = "rootfs", ++ .size = 0x018e0000, ++ .offset = 0x00120000, ++ } , { ++ .name = "VFM_Filesystem", ++ .size = 0x00580000, ++ .offset = 0x01a00000, ++ } , { ++ .name = "setup", ++ .size = 0x00020000, ++ .offset = 0x01fa0000, ++ } , { ++ .name = "Logo", ++ .size = 0x00020000, ++ .offset = 0x01fc0000, ++ }, ++}; ++#else ++#error "please define partition for this PXA27x implementation" ++#endif ++ ++ ++static struct mtd_info *mymtd; ++static struct mtd_partition *parsed_parts; ++ ++static const char *probes[] = { "RedBoot", "cmdlinepart", NULL }; ++ ++static int __init init_pxa27x(void) ++{ ++ struct mtd_partition *parts; ++ int nb_parts = 0; ++ int parsed_nr_parts = 0; ++ char *part_type = "static"; ++ ++ pxa27x_map.bankwidth = (BOOT_DEF & 1) ? 2 : 4; ++ ++ printk("Probing PXA27x flash at physical address 0x%08x (%d-bit bankwidth)\n", ++ WINDOW_ADDR, pxa27x_map.bankwidth * 8); ++ pxa27x_map.virt = ioremap(pxa27x_map.phys, pxa27x_map.size); ++ ++ if (!pxa27x_map.virt) { ++ printk("Failed to ioremap\n"); ++ return -EIO; ++ } ++ ++ mymtd = do_map_probe("cfi_probe", &pxa27x_map); ++ if (!mymtd) { ++ iounmap((void *)pxa27x_map.virt); ++ return -ENXIO; ++ } ++ mymtd->owner = THIS_MODULE; ++ ++#if 0 ++ /* ioremap the first flash chip as cacheable */ ++ pxa27x_map.cached = ioremap_cached(pxa27x_map.phys, pxa27x_map.size); ++ if (!pxa27x_map.cached) { ++ printk("Failed to do cacheable-ioremap\n"); ++ iounmap((void *)pxa27x_map.virt); ++ return -EIO; ++ } ++#endif ++ simple_map_init(&pxa27x_map); ++ ++ if (parsed_nr_parts == 0) { ++ int ret = parse_mtd_partitions(mymtd, probes, &parsed_parts, 0); ++ ++ if (ret > 0) { ++ part_type = "RedBoot"; ++ parsed_nr_parts = ret; ++ } ++ } ++ ++ if (parsed_nr_parts > 0) { ++ parts = parsed_parts; ++ nb_parts = parsed_nr_parts; ++ } else { ++ parts = pxa27x_partitions; ++ nb_parts = ARRAY_SIZE(pxa27x_partitions); ++ } ++ ++ if (nb_parts) { ++ printk(KERN_NOTICE "Using %s partition definition\n", part_type); ++ add_mtd_partitions(mymtd, parts, nb_parts); ++ } else { ++ add_mtd_device(mymtd); ++ } ++#if 0 ++ if (ret = ezx_partition_init()) ++#endif ++ return 0; ++} ++ ++static void __exit cleanup_pxa27x(void) ++{ ++ if (mymtd) { ++ del_mtd_partitions(mymtd); ++ map_destroy(mymtd); ++ if (parsed_parts) ++ kfree(parsed_parts); ++ } ++ if (pxa27x_map.virt) ++ iounmap((void *)pxa27x_map.virt); ++ if (pxa27x_map.cached) ++ iounmap((void *)pxa27x_map.cached); ++ return; ++} ++ ++module_init(init_pxa27x); ++module_exit(cleanup_pxa27x); ++ ++MODULE_LICENSE("GPL"); ++MODULE_AUTHOR("Harald Welte <laforge@gnumonks.org>"); ++MODULE_DESCRIPTION("MTD map driver for Motorola EZX platform"); diff --git a/packages/linux/linux-ezx-2.6.20.7/ezx-pcap.patch b/packages/linux/linux-ezx-2.6.20.7/ezx-pcap.patch new file mode 100644 index 0000000000..22c5d44f36 --- /dev/null +++ b/packages/linux/linux-ezx-2.6.20.7/ezx-pcap.patch @@ -0,0 +1,1197 @@ +Index: linux-2.6.20.7/arch/arm/mach-pxa/ezx-pcap.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-2.6.20.7/arch/arm/mach-pxa/ezx-pcap.c 2007-04-21 08:26:37.000000000 -0300 +@@ -0,0 +1,411 @@ ++/* Driver for Motorola PCAP2 as present in EZX phones ++ * ++ * This is both a SPI device driver for PCAP itself, as well as ++ * an IRQ demultiplexer for handling PCAP generated events such as ++ * headphone jack sense by downstream drivers. ++ * ++ * (C) 2006 by Harald Welte <laforge@openezx.org> ++ * ++ * 2007, April - Daniel Ribeiro <drwyrm@gmail.com> ++ * Altered to work with corgi's SSP code. ++ * Fixed irq handling routine. ++ */ ++ ++#include <linux/module.h> ++#include <linux/kernel.h> ++#include <linux/platform_device.h> ++#include <linux/interrupt.h> ++#include <linux/kernel_stat.h> ++ ++#include <asm/hardware.h> ++#include <asm/mach-types.h> ++ ++#include <asm/arch/ssp.h> ++#include <asm/arch/pxa-regs.h> ++#include <asm/arch/ezx-pcap.h> ++#include <asm/arch/irqs.h> ++#include <asm/mach/irq.h> ++ ++#include "ezx.h" ++ ++#if 0 ++#define DEBUGP(x, args...) printk(x, ## args) ++#else ++#define DEBUGP(x, args...) ++#endif ++ ++extern unsigned long ezx_ssp_pcap_putget(ulong); ++ ++int ezx_pcap_write(u_int8_t reg_num, u_int32_t value) ++{ ++ value &= SSP_PCAP_REGISTER_VALUE_MASK; ++ value |= SSP_PCAP_REGISTER_WRITE_OP_BIT ++ | (reg_num<<SSP_PCAP_REGISTER_ADDRESS_SHIFT); ++ ++ local_irq_disable(); ++ ezx_ssp_pcap_putget(value); ++ local_irq_enable(); ++ ++ DEBUGP("pcap write r%x: 0x%08x\n", reg_num, value); ++ return 0; ++} ++EXPORT_SYMBOL_GPL(ezx_pcap_write); ++ ++int ezx_pcap_read(u_int8_t reg_num, u_int32_t *value) ++{ ++ u_int32_t frame = SSP_PCAP_REGISTER_READ_OP_BIT ++ | (reg_num<<SSP_PCAP_REGISTER_ADDRESS_SHIFT); ++ ++ local_irq_disable(); ++ *value = ezx_ssp_pcap_putget(frame); ++ local_irq_enable(); ++ ++ DEBUGP("pcap read r%x: 0x%08x\n", reg_num, *value); ++ return 0; ++} ++EXPORT_SYMBOL_GPL(ezx_pcap_read); ++ ++int ezx_pcap_bit_set(u_int32_t sspPcapBit, u_int8_t to) ++{ ++ int ret; ++ u_int32_t tmp; ++ u_int32_t bit = (sspPcapBit & SSP_PCAP_REGISTER_VALUE_MASK); ++ u_int8_t reg_num = (sspPcapBit & SSP_PCAP_REGISTER_ADDRESS_MASK) ++ >> SSP_PCAP_REGISTER_ADDRESS_SHIFT; ++ ++ ret = ezx_pcap_read(reg_num, &tmp); ++ if (ret < 0) ++ return ret; ++ ++ if (to == 0) ++ tmp &= ~bit; ++ else ++ tmp |= bit; ++ ++ return ezx_pcap_write(reg_num, tmp); ++} ++EXPORT_SYMBOL_GPL(ezx_pcap_bit_set); ++ ++int ezx_pcap_read_bit(u_int32_t bit) ++{ ++ int ret; ++ u_int32_t tmp; ++ u_int8_t reg_num = (bit & SSP_PCAP_REGISTER_ADDRESS_MASK) ++ >> SSP_PCAP_REGISTER_ADDRESS_SHIFT; ++ ++ ret = ezx_pcap_read(reg_num, &tmp); ++ if (ret < 0) ++ return ret; ++ ++ return tmp & (bit & SSP_PCAP_REGISTER_VALUE_MASK); ++} ++EXPORT_SYMBOL_GPL(ezx_pcap_read_bit); ++ ++ ++static int ezx_pcap_vibrator_level(u_int32_t bit) ++{ ++ /* FIXME */ ++ return 0; ++} ++EXPORT_SYMBOL_GPL(ezx_pcap_vibrator_level); ++ ++ ++static int pcap_init(void) ++{ ++ /* initialize registers */ ++ /* FIXME: this should be board-level, not chip-level */ ++ /* implement a per board pcap init reg array? */ ++ ++ ezx_pcap_bit_set(SSP_PCAP_ADJ_BIT_ISR_USB4VI, 1); ++ ezx_pcap_bit_set(SSP_PCAP_ADJ_BIT_MSR_USB4VM, 0); ++ ezx_pcap_bit_set(SSP_PCAP_ADJ_BIT_ISR_USB1VI, 1); ++ ezx_pcap_bit_set(SSP_PCAP_ADJ_BIT_MSR_USB1VM, 0); ++ // disable all interrupts ++ //ezx_pcap_write(SSP_PCAP_ADJ_MSR_REGISTER, 0x03ffffff); ++ ++ ezx_pcap_bit_set(SSP_PCAP_ADJ_BIT_AUD_RX_AMPS_A1CTRL, 1); ++ ezx_pcap_vibrator_level(PCAP_VIBRATOR_VOLTAGE_LEVEL3); ++ ezx_pcap_vibrator_level(PCAP_VIBRATOR_VOLTAGE_LEVEL3); ++ ++ /* set SW1 sleep to keep SW1 1.3v in sync mode */ ++ ezx_pcap_bit_set(SSP_PCAP_ADJ_BIT_LOWPWR_CTRL_SW1_MODE10, 0); ++ ezx_pcap_bit_set(SSP_PCAP_ADJ_BIT_LOWPWR_CTRL_SW1_MODE11, 0); ++ /* SW1 active in sync mode */ ++ ezx_pcap_bit_set(SSP_PCAP_ADJ_BIT_LOWPWR_CTRL_SW1_MODE00, 1); ++ ezx_pcap_bit_set(SSP_PCAP_ADJ_BIT_LOWPWR_CTRL_SW1_MODE01, 0); ++ /* at SW1 -core voltage to 1.30V */ ++ ezx_pcap_bit_set(SSP_PCAP_ADJ_BIT_LOWPWR_CTRL_SW10_DVS, 1); ++ ezx_pcap_bit_set(SSP_PCAP_ADJ_BIT_LOWPWR_CTRL_SW11_DVS, 1); ++ ezx_pcap_bit_set(SSP_PCAP_ADJ_BIT_LOWPWR_CTRL_SW12_DVS, 1); ++ ezx_pcap_bit_set(SSP_PCAP_ADJ_BIT_LOWPWR_CTRL_SW13_DVS, 0); ++ ++ /* when STANDY2 PIN ACTIVE (high) set V3-- sram V8 -- pll off */ ++ ezx_pcap_bit_set(SSP_PCAP_ADJ_BIT_VREG2_V3_STBY, 1); ++ ezx_pcap_bit_set(SSP_PCAP_ADJ_BIT_VREG2_V3_LOWPWR, 0); ++ ++ ezx_pcap_bit_set(SSP_PCAP_ADJ_BIT_VREG2_V8_STBY, 1); ++ ezx_pcap_bit_set(SSP_PCAP_ADJ_BIT_VREG2_V8_LOWPWR, 0); ++ ++ /* when STANDY2 PIN ACTIVE (high) set V4-- lcd only for e680 V6 --- ++ * camera for e680 */ ++ ezx_pcap_bit_set(SSP_PCAP_ADJ_BIT_VREG2_V4_STBY, 1); ++ ezx_pcap_bit_set(SSP_PCAP_ADJ_BIT_VREG2_V4_LOWPWR, 1); ++ ++ ezx_pcap_bit_set(SSP_PCAP_ADJ_BIT_VREG2_V6_STBY, 1); ++ ezx_pcap_bit_set(SSP_PCAP_ADJ_BIT_VREG2_V6_LOWPWR, 0); ++ ++ /* set Vc to low power mode when AP sleep */ ++ //SSP_PCAP_bit_set( SSP_PCAP_ADJ_BIT_LOWPWR_CTRL_VC_STBY); ++ ++ /* set VAUX2 to voltage 2.775V and low power mode when AP sleep */ ++ ezx_pcap_bit_set(SSP_PCAP_ADJ_BIT_AUX_VREG_VAUX2_1, 1); ++ ezx_pcap_bit_set(SSP_PCAP_ADJ_BIT_AUX_VREG_VAUX2_0, 0); ++ ezx_pcap_bit_set(SSP_PCAP_ADJ_BIT_LOWPWR_CTRL_VAUX2_STBY, 1); ++ ezx_pcap_bit_set(SSP_PCAP_ADJ_BIT_LOWPWR_CTRL_VAUX2_LOWPWR, 1); ++ ezx_pcap_bit_set(SSP_PCAP_ADJ_BIT_AUX_VREG_VAUX2_EN, 1); ++ ++ PGSR(GPIO34_TXENB) |= GPIO_bit(GPIO34_TXENB); ++ ++ return 0; ++} ++/* MMC/SD specific functions */ ++ ++void ezx_pcap_mmcsd_voltage(u_int32_t bits) ++{ ++ unsigned int tmp; ++ ezx_pcap_read(SSP_PCAP_ADJ_AUX_VREG_REGISTER, &tmp); ++#if defined(CONFIG_PXA_EZX_E680) ++ tmp &= 0xffffff9f; /* zero all vaux2 bits */ ++ tmp |= (bits & 0x3) << 5; ++#elif defined(CONFIG_PXA_EZX_A780) ++ tmp &= 0xfffff0ff; /* zero all vaux3 bits */ ++ tmp |= (bits & 0xf) << 8; ++#endif ++ ezx_pcap_write(SSP_PCAP_ADJ_AUX_VREG_REGISTER, tmp); ++} ++EXPORT_SYMBOL(ezx_pcap_mmcsd_voltage); ++ ++int ezx_pcap_mmcsd_power(int on) ++{ ++ if (on) { ++#if defined(CONFIG_PXA_EZX_E680) ++ return ezx_pcap_bit_set(SSP_PCAP_ADJ_BIT_AUX_VREG_VAUX2_EN, 1); ++#else ++ return ezx_pcap_bit_set(SSP_PCAP_ADJ_BIT_AUX_VREG_VAUX3_EN, 1); ++#endif ++ } else { ++#if defined(CONFIG_PXA_EZX_E680) ++ return ezx_pcap_bit_set(SSP_PCAP_ADJ_BIT_AUX_VREG_VAUX2_EN, 0); ++#else ++ return ezx_pcap_bit_set(SSP_PCAP_ADJ_BIT_AUX_VREG_VAUX3_EN, 0); ++#endif ++ } ++} ++EXPORT_SYMBOL_GPL(ezx_pcap_mmcsd_power); ++ ++/* IRQ Handling */ ++ ++/* Array indexed by BIT POSITION of PCAP register, returns IRQ number */ ++static unsigned int pcap2irq[] = { ++ [0] = EZX_IRQ_ADCDONE, ++ [1] = EZX_IRQ_TS, ++ [2] = 0, /* 1HZ */ ++ [3] = 0, /* WI */ ++ [4] = 0, /* WI */ ++ [5] = 0, /* TODA */ ++ [6] = EZX_IRQ_USB4V, ++ [7] = 0, /* ONOFF */ ++ [8] = 0, /* ONOFF2 */ ++ [9] = EZX_IRQ_USB1V, ++ [10] = 0, /* MOBPORT */ ++ [11] = EZX_IRQ_MIC, ++ [12] = EZX_IRQ_HEADJACK, ++ [13] = 0, /* ST */ ++ [14] = 0, /* PC */ ++ [15] = 0, /* WARM */ ++ [16] = 0, /* EOL */ ++ [17] = 0, /* CLK */ ++ [18] = 0, /* SYS_RST */ ++ [19] = 0, ++ [20] = EZX_IRQ_ADCDONE2, ++ [21] = 0, /* SOFT_RESET */ ++ [22] = 0, /* MNEXB */ ++}; ++ ++/* Array indexed by IRQ NUMBER, returns PCAP absolute value */ ++static unsigned int irq2pcap[] = { ++ [EZX_IRQ_ADCDONE] = SSP_PCAP_ADJ_BIT_ISR_ADCDONEI, ++ [EZX_IRQ_TS] = SSP_PCAP_ADJ_BIT_ISR_TSI, ++ [EZX_IRQ_USB4V] = SSP_PCAP_ADJ_BIT_ISR_USB4VI, ++ [EZX_IRQ_USB1V] = SSP_PCAP_ADJ_BIT_ISR_USB1VI, ++ [EZX_IRQ_HEADJACK] = SSP_PCAP_ADJ_BIT_ISR_A1I, ++ [EZX_IRQ_MIC] = SSP_PCAP_ADJ_BIT_ISR_MB2I, ++ [EZX_IRQ_ADCDONE2] = SSP_PCAP_ADJ_BIT_ISR_ADCDONE2I, ++}; ++ ++static void pcap_ack_irq(unsigned int irq) ++{ ++ DEBUGP("pcap_ack_irq: %u\n", irq); ++ ezx_pcap_write(SSP_PCAP_ADJ_ISR_REGISTER, irq2pcap[irq]); ++} ++ ++static void pcap_mask_irq(unsigned int irq) ++{ ++ u_int32_t reg; ++ ++ DEBUGP("pcap_mask_irq: %u\n", irq); ++ ++ /* this needs to be atomic... but we're not on SMP so it is */ ++ ezx_pcap_read(SSP_PCAP_ADJ_MSR_REGISTER, ®); ++ reg |= irq2pcap[irq]; ++ ezx_pcap_write(SSP_PCAP_ADJ_MSR_REGISTER, reg); ++} ++ ++static void pcap_unmask_irq(unsigned int irq) ++{ ++ u_int32_t tmp; ++ DEBUGP("pcap_unmask_irq: %u\n", irq); ++ ++ /* this needs to be atomic... but we're not on SMP so it is */ ++ ezx_pcap_read(SSP_PCAP_ADJ_MSR_REGISTER, &tmp); ++ tmp &= ~irq2pcap[irq]; ++ ezx_pcap_write(SSP_PCAP_ADJ_MSR_REGISTER, tmp); ++} ++ ++static struct irq_chip pcap_chip = { ++ .ack = pcap_ack_irq, ++ .mask = pcap_mask_irq, ++ .unmask = pcap_unmask_irq, ++}; ++ ++/* handler for interrupt received from PCAP via GPIO */ ++static void pcap_irq_demux_handler(unsigned int irq, struct irq_desc *desc) ++{ ++ int i; ++ const unsigned int cpu = smp_processor_id(); ++ u_int32_t reg; ++ ++ DEBUGP("pcap_irq_demux_handler(%u,,) entered\n", irq); ++ ++ spin_lock(&desc->lock); ++ ++ desc->status &= ~(IRQ_REPLAY | IRQ_WAITING); ++ ++ if (unlikely(desc->status & IRQ_INPROGRESS)) { ++ DEBUGP("irq busy, masking it off\n"); ++ desc->status |= (IRQ_PENDING | IRQ_MASKED); ++ desc->chip->mask(irq); ++ desc->chip->ack(irq); ++ goto out_unlock; ++ } ++ ++ kstat_cpu(cpu).irqs[irq]++; ++ desc->status |= IRQ_INPROGRESS; ++ ++ do { ++ if (unlikely((desc->status & ++ (IRQ_PENDING | IRQ_MASKED | IRQ_DISABLED)) == ++ (IRQ_PENDING | IRQ_MASKED))) { ++ DEBUGP("dealing with pending IRQ, unmasking\n"); ++ desc->chip->unmask(irq); ++ desc->status &= ~IRQ_MASKED; ++ } ++ ++ desc->status &= ~IRQ_PENDING; ++ spin_unlock(&desc->lock); ++ ++ ezx_pcap_read(SSP_PCAP_ADJ_ISR_REGISTER, ®); ++ DEBUGP("pcap_irq_demux_handler: ISR=0x%08x\n", reg); ++ ++ for (i = ARRAY_SIZE(pcap2irq)-1; i >= 0; i--) { ++ unsigned int pirq = pcap2irq[i]; ++ if (pirq == 0) ++ continue; ++ ++ if (reg & (1 << i)) { ++ struct irq_desc *subdesc; ++ DEBUGP("found irq %u\n", pirq); ++ subdesc = irq_desc + pirq; ++ ++ // acknowledge pcap irq ++ // do just one pcap irq each time ++ subdesc->chip->ack(pirq); ++ i = 0; ++ ++ handle_IRQ_event(pirq, subdesc->action); ++ } ++ } ++ spin_lock(&desc->lock); ++ ++ } while ((desc->status & (IRQ_PENDING | IRQ_DISABLED)) == IRQ_PENDING); ++ ++ desc->status &= ~IRQ_INPROGRESS; ++ ++out_unlock: ++ spin_unlock(&desc->lock); ++} ++ ++static int ezx_pcap_remove(struct platform_device *pdev) ++{ ++ int irq; ++ DEBUGP("exz_pcap_remove entered\n"); ++ ++ set_irq_chained_handler(IRQ_GPIO1, NULL); ++ ++ for (irq = EZX_IRQ(0); irq <= EZX_IRQ(6); irq++) { ++ set_irq_chip(irq, NULL); ++ set_irq_handler(irq, NULL); ++ set_irq_flags(irq, 0); ++ } ++ ++ return 0; ++} ++ ++static int __init ezx_pcap_probe(struct platform_device *pdev) ++{ ++ unsigned int irq; ++ DEBUGP("ezx_pcap_probe entered\n"); ++ ++ pcap_init(); ++ ++ set_irq_type(IRQ_GPIO1, IRQT_RISING); ++ /* set up interrupt demultiplexing code for PCAP2 irqs */ ++ for (irq = EZX_IRQ(0); irq <= EZX_IRQ(6); irq++) { ++ set_irq_chip(irq, &pcap_chip); ++ set_irq_handler(irq, handle_edge_irq); ++ set_irq_flags(irq, IRQF_VALID); ++ } ++ set_irq_chained_handler(IRQ_GPIO1, pcap_irq_demux_handler); ++ ++ printk("PCAP2 SSP driver registered.\n"); ++ ++ return 0; ++} ++ ++static struct platform_driver ezxpcap_driver = { ++ .probe = ezx_pcap_probe, ++ .remove = ezx_pcap_remove, ++ .driver = { ++ .name = "ezx-pcap", ++ .owner = THIS_MODULE, ++ }, ++}; ++ ++static int __init ezx_pcap_init(void) ++{ ++ DEBUGP("ezx_pcap_init entered\n"); ++ return platform_driver_register(&ezxpcap_driver); ++} ++ ++static void __exit ezx_pcap_exit(void) ++{ ++ return platform_driver_unregister(&ezxpcap_driver); ++} ++ ++module_init(ezx_pcap_init); ++module_exit(ezx_pcap_exit); ++ ++MODULE_LICENSE("GPL"); ++MODULE_AUTHOR("Harald Welte"); ++MODULE_DESCRIPTION("SPI Driver for Motorola PCAP2"); ++ +Index: linux-2.6.20.7/include/asm-arm/arch-pxa/ezx-pcap.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-2.6.20.7/include/asm-arm/arch-pxa/ezx-pcap.h 2007-04-21 08:26:37.000000000 -0300 +@@ -0,0 +1,665 @@ ++/* (c) Copyright Motorola Beijing 2002 all rights reserved. ++ ++ Project Name : EZX ++ Project No. : ++ Title : ++ File Name : ++ Description : ++ ++ ************** REVISION HISTORY ********************************************** ++ Date Author Reference ++ ======== ========== ========================== ++ 2002-07-01 weiqiang lin create ++*/ ++#ifndef SSP_PCAP_H ++#define SSP_PCAP_H ++ ++#define SSP_vibrate_start_command() SSP_PCAP_bit_set(SSP_PCAP_ADJ_BIT_AUX_VREG_V_VIB_EN); \ ++ SSP_PCAP_bit_set(SSP_PCAP_ADJ_BIT_AUX_VREG_V_VIB_EN) ++ ++#define SSP_vibrate_stop_command() SSP_PCAP_bit_clean(SSP_PCAP_ADJ_BIT_AUX_VREG_V_VIB_EN); \ ++ SSP_PCAP_bit_clean(SSP_PCAP_ADJ_BIT_AUX_VREG_V_VIB_EN) ++ ++#define SSP_PCAP_REGISTER_VALUE_LENGTH 16 ++ ++#define SSP_PCAP_REGISTER_WRITE_OP_BIT 0x80000000 ++#define SSP_PCAP_REGISTER_READ_OP_BIT 0x00000000 ++ ++#define SSP_PCAP_REGISTER_VALUE_UP_WORD_MASK 0xffff0000 ++#define SSP_PCAP_REGISTER_VALUE_DOWN_WORD_MASK 0x0000ffff ++ ++#define SSP_PCAP_REGISTER_VALUE_MASK 0x01ffffff ++#define SSP_PCAP_REGISTER_VALUE_MASK 0x01ffffff ++#define SSP_PCAP_REGISTER_ADDRESS_MASK 0x7c000000 ++#define SSP_PCAP_REGISTER_ADDRESS_SHIFT 26 ++#define SSP_PCAP_REGISTER_NUMBER 32 ++ ++#define SSP_PCAP_ADC_START_VALUE_SET_MASK 0xfffffc00 ++#define SSP_PCAP_ADC_START_VALUE 0x000001dd ++ ++ ++#define SSP_PCAP_PHONE_CDC_CLOCK_MASK 0x000001c0 ++#define SSP_PCAP_STEREO_SAMPLE_RATE_MASK 0x00000f00 ++#define SSP_PCAP_STEREO_BCLK_TIME_SLOT_MASK 0x00018000 ++#define SSP_PCAP_STEREO_CLOCK_MASK 0x0000001c ++#define SSP_PCAP_DIGITAL_AUDIO_MODE_MASK 0x00006000 ++#define SSP_PCAP_TOUCH_PANEL_POSITION_DETECT_MODE_MASK 0x000e0000 ++#define SSP_PCAP_MONO_PGA_MASK 0x00180000 ++ ++#define SSP_PCAP_VIBRATOR_VOLTAGE_LEVEL_MASK 0x00300000 ++ ++#define SSP_PCAP_AUDIO_IN_GAIN_MASK 0x0000001f ++#define SSP_PCAP_AUDIO_IN_GAIN_SHIFT 0 ++#define SSP_PCAP_AUDIO_OUT_GAIN_MASK 0x0001e000 ++#define SSP_PCAP_AUDIO_OUT_GAIN_SHIFT 13 ++ ++ ++#define SSP_PCAP_ADD1_VALUE_MASK 0x000003ff ++#define SSP_PCAP_ADD1_VALUE_SHIFT 0 ++#define SSP_PCAP_ADD2_VALUE_MASK 0x000ffc00 ++#define SSP_PCAP_ADD2_VALUE_SHIFT 10 ++ ++ ++#define PCAP_AUDIO_IN_GAIN_MAX_VALUE 31 ++#define PCAP_AUDIO_OUT_GAIN_MAX_VALUE 15 ++ ++#define PCAP_CLEAR_INTERRUPT_REGISTER 0x00141fdf ++#define PCAP_MASK_ALL_INTERRUPT 0x0013ffff ++ ++#define SSP_PCAP_TS_KEEPER_TIMER 100 /* 1 second */ ++#define START_ADC_DELAY_TIMER 1991 /* 540 us */ ++ ++#define SSP_SEND_PM_ALART_INTERVAL 1000 *HZ/1000 /* 1 second */ ++#define SSP_SEND_MSG_USB_ACCESSORY_INFO_DEBOUNCE 200 *HZ/1000 /* 200ms */ ++ ++struct ssp_interrupt_info ++{ ++ u32 type; ++ u32 status; ++ void* privdata; ++}; ++ ++#ifndef U8 ++#define U8 unsigned char ++#endif ++ ++#ifndef U32 ++#define U32 unsigned long ++#endif ++ ++#ifndef U16 ++#define U16 unsigned short ++#endif ++ ++#ifndef P_U16 ++#define P_U16 U16* ++#endif ++ ++#ifndef P_U32 ++#define P_U32 U32* ++#endif ++ ++#define SSP_SELECT_BUFFER (volatile unsigned long *)(0xf4000000) ++ ++#define SSP_SR_RNE 0x00000008 ++#define SSP_PCAP_BASE 0x00001000 ++/************************ STRUCTURES, ENUMS, AND TYPEDEFS **************************/ ++typedef enum accessoryStatus ++{ ++ ACCESSORY_DEVICE_STATUS_DETACHED = 0, ++ ACCESSORY_DEVICE_STATUS_ATTACHED , ++ ACCESSORY_DEVICE_STATUS_UNKNOW =0x000000ff ++}ACCESSORY_DEVICE_STATUS; ++ ++typedef enum accessoryType ++{ ++ ACCESSORY_DEVICE_NONE = 0, ++ ACCESSORY_DEVICE_SERIAL_PORT , ++ ACCESSORY_DEVICE_USB_PORT , ++ ACCESSORY_DEVICE_UNKNOW =0x000000ff ++}ACCESSORY_TYPE; ++ ++typedef enum pcapReturnStatus ++{ ++ SSP_PCAP_SUCCESS = 0, ++ SSP_PCAP_ERROR_REGISTER = SSP_PCAP_BASE+1, ++ SSP_PCAP_ERROR_VALUE = SSP_PCAP_BASE+2, ++ ++ SSP_PCAP_NOT_RUN = SSP_PCAP_BASE+0xff ++}SSP_PCAP_STATUS; ++ ++typedef enum pcapPortType ++{ ++ SSP_PCAP_SERIAL_PORT = 0x00000000, ++ SSP_PCAP_LOW_USB_PORT = 0x00000001, ++ SSP_PCAP_HIGH_USB_PORT = 0x00000002, ++ SSP_PCAP_UNKNOW_PORT = 0x000000ff ++}SSP_PCAP_PORT_TYPE; ++ ++typedef enum pcapInitDriverType ++{ ++ SSP_PCAP_TS_OPEN = 0x00000000, ++ SSP_PCAP_AUDIO_OPEN = 0x00000001, ++ SSP_PCAP_UNKNOW_DRIVER_OPEN = 0x000000ff ++}SSP_PCAP_INIT_DRIVER_TYPE; ++ ++ ++typedef enum pcapReturnBitStatus ++{ ++ SSP_PCAP_BIT_ZERO = 0x00000000, ++ SSP_PCAP_BIT_ONE = 0x00000001, ++ SSP_PCAP_BIT_ERROR = 0xff000000 ++}SSP_PCAP_BIT_STATUS; ++ ++typedef enum pcapCDCClkType ++{ ++ PCAP_CDC_CLK_IN_13M0 = 0x00000000, ++ PCAP_CDC_CLK_IN_15M36 = 0x00000040, ++ PCAP_CDC_CLK_IN_16M8 = 0x00000080, ++ PCAP_CDC_CLK_IN_19M44 = 0x000000c0, ++ PCAP_CDC_CLK_IN_26M0 = 0x00000100 ++}PHONE_CDC_CLOCK_TYPE; ++ ++typedef enum pcapST_SR ++{ ++ PCAP_ST_SAMPLE_RATE_8K = 0x00000000, ++ PCAP_ST_SAMPLE_RATE_11K = 0x00000100, ++ PCAP_ST_SAMPLE_RATE_12K = 0x00000200, ++ PCAP_ST_SAMPLE_RATE_16K = 0x00000300, ++ PCAP_ST_SAMPLE_RATE_22K = 0x00000400, ++ PCAP_ST_SAMPLE_RATE_24K = 0x00000500, ++ PCAP_ST_SAMPLE_RATE_32K = 0x00000600, ++ PCAP_ST_SAMPLE_RATE_44K = 0x00000700, ++ PCAP_ST_SAMPLE_RATE_48K = 0x00000800 ++}ST_SAMPLE_RATE_TYPE; ++ ++typedef enum pcapST_BCLK ++{ ++ PCAP_ST_BCLK_SLOT_16 = 0x00000000, ++ PCAP_ST_BCLK_SLOT_8 = 0x00008000, ++ PCAP_ST_BCLK_SLOT_4 = 0x00010000, ++ PCAP_ST_BCLK_SLOT_2 = 0x00018000, ++}ST_BCLK_TIME_SLOT_TYPE; ++ ++typedef enum pcapST_CLK ++{ ++ PCAP_ST_CLK_PLL_CLK_IN_13M0 = 0x00000000, ++ PCAP_ST_CLK_PLL_CLK_IN_15M36 = 0x00000004, ++ PCAP_ST_CLK_PLL_CLK_IN_16M8 = 0x00000008, ++ PCAP_ST_CLK_PLL_CLK_IN_19M44 = 0x0000000c, ++ PCAP_ST_CLK_PLL_CLK_IN_26M0 = 0x00000010, ++ PCAP_ST_CLK_PLL_CLK_IN_EXT_MCLK = 0x00000014, ++ PCAP_ST_CLK_PLL_CLK_IN_FSYNC = 0x00000018, ++ PCAP_ST_CLK_PLL_CLK_IN_BITCLK = 0x0000001c ++}ST_CLK_TYPE; ++ ++typedef enum pcapDigitalAudioInterfaceMode ++{ ++ PCAP_DIGITAL_AUDIO_INTERFACE_NORMAL = 0x00000000, ++ PCAP_DIGITAL_AUDIO_INTERFACE_NETWORK = 0x00002000, ++ PCAP_DIGITAL_AUDIO_INTERFACE_I2S = 0x00004000 ++}DIG_AUD_MODE_TYPE; ++ ++typedef enum pcapMono ++{ ++ PCAP_MONO_PGA_R_L_STEREO = 0x00000000, ++ PCAP_MONO_PGA_RL = 0x00080000, ++ PCAP_MONO_PGA_RL_3DB = 0x00100000, ++ PCAP_MONO_PGA_RL_6DB = 0x00180000 ++}MONO_TYPE; ++ ++typedef enum pcapVibratorVoltageLevel ++{ ++ PCAP_VIBRATOR_VOLTAGE_LEVEL0 = 0x00000000, ++ PCAP_VIBRATOR_VOLTAGE_LEVEL1 = 0x00100000, ++ PCAP_VIBRATOR_VOLTAGE_LEVEL2 = 0x00200000, ++ PCAP_VIBRATOR_VOLTAGE_LEVEL3 = 0x00300000 ++}VibratorVoltageLevel_TYPE; ++ ++typedef enum pcapTouchScreenMode ++{ ++ PCAP_TS_POSITION_X_MEASUREMENT = 0x00000000, ++ PCAP_TS_POSITION_XY_MEASUREMENT = 0x00020000, ++ PCAP_TS_PRESSURE_MEASUREMENT = 0x00040000, ++ PCAP_TS_PLATE_X_MEASUREMENT = 0x00060000, ++ PCAP_TS_PLATE_Y_MEASUREMENT = 0x00080000, ++ PCAP_TS_STANDBY_MODE = 0x000a0000, ++ PCAP_TS_NONTS_MODE = 0x000c0000 ++}TOUCH_SCREEN_DETECT_TYPE; ++ ++typedef enum pcapADJRegister ++{ ++ SSP_PCAP_ADJ_ISR_REGISTER = 0x00, ++ SSP_PCAP_ADJ_MSR_REGISTER = 0x01, ++ SSP_PCAP_ADJ_PSTAT_REGISTER = 0x02, ++ SSP_PCAP_ADJ_VREG2_REGISTER = 0x06, ++ SSP_PCAP_ADJ_AUX_VREG_REGISTER = 0x07, ++ SSP_PCAP_ADJ_BATT_DAC_REGISTER = 0x08, ++ SSP_PCAP_ADJ_ADC1_REGISTER = 0x09, ++ SSP_PCAP_ADJ_ADC2_REGISTER = 0x0a, ++ SSP_PCAP_ADJ_AUD_CODEC_REGISTER = 0x0b, ++ SSP_PCAP_ADJ_AUD_RX_AMPS_REGISTER = 0x0c, ++ SSP_PCAP_ADJ_ST_DAC_REGISTER = 0x0d, ++ SSP_PCAP_ADJ_BUSCTRL_REGISTER = 0x14, ++ SSP_PCAP_ADJ_PERIPH_REGISTER = 0x15, ++ SSP_PCAP_ADJ_LOWPWR_CTRL_REGISTER = 0x18, ++ SSP_PCAP_ADJ_TX_AUD_AMPS_REGISTER = 0x1a, ++ SSP_PCAP_ADJ_GP_REG_REGISTER = 0x1b ++}SSP_PCAP_SECONDARY_PROCESSOR_REGISTER; ++ ++typedef enum pcapADJBit_SetType ++{ ++ SSP_PCAP_ADJ_BIT_ISR_ADCDONEI = 0x00000001, ++ SSP_PCAP_ADJ_BIT_ISR_TSI = 0x00000002, ++ SSP_PCAP_ADJ_BIT_ISR_1HZI = 0x00000004, ++ SSP_PCAP_ADJ_BIT_ISR_WHI = 0x00000008, ++ SSP_PCAP_ADJ_BIT_ISR_WLI = 0x00000010, ++ SSP_PCAP_ADJ_BIT_ISR_TODAI = 0x00000020, ++ SSP_PCAP_ADJ_BIT_ISR_USB4VI = 0x00000040, ++ SSP_PCAP_ADJ_BIT_ISR_ONOFFI = 0x00000080, ++ SSP_PCAP_ADJ_BIT_ISR_ONOFF2I = 0x00000100, ++ SSP_PCAP_ADJ_BIT_ISR_USB1VI = 0x00000200, ++ SSP_PCAP_ADJ_BIT_ISR_MOBPORTI = 0x00000400, ++ SSP_PCAP_ADJ_BIT_ISR_MB2I = 0x00000800, ++ SSP_PCAP_ADJ_BIT_ISR_A1I = 0x00001000, ++ SSP_PCAP_ADJ_BIT_ISR_STI = 0x00002000, ++ SSP_PCAP_ADJ_BIT_ISR_PCI = 0x00004000, ++ SSP_PCAP_ADJ_BIT_ISR_WARMI = 0x00008000, ++ SSP_PCAP_ADJ_BIT_ISR_EOLI = 0x00010000, ++ SSP_PCAP_ADJ_BIT_ISR_CLKI = 0x00020000, ++ SSP_PCAP_ADJ_BIT_ISR_SYS_RSTI = 0x00040000, ++ SSP_PCAP_ADJ_BIT_ISR_ADCDONE2I = 0x00100000, ++ SSP_PCAP_ADJ_BIT_ISR_SOFT_RESETI = 0x00200000, ++ SSP_PCAP_ADJ_BIT_ISR_MNEXBI = 0x00400000, ++ ++ SSP_PCAP_ADJ_BIT_MSR_ADCDONEM = 0x04000001, ++ SSP_PCAP_ADJ_BIT_MSR_TSM = 0x04000002, ++ SSP_PCAP_ADJ_BIT_MSR_1HZM = 0x04000004, ++ SSP_PCAP_ADJ_BIT_MSR_WHM = 0x04000008, ++ SSP_PCAP_ADJ_BIT_MSR_WLM = 0x04000010, ++ SSP_PCAP_ADJ_BIT_MSR_TODAM = 0x04000020, ++ SSP_PCAP_ADJ_BIT_MSR_USB4VM = 0x04000040, ++ SSP_PCAP_ADJ_BIT_MSR_ONOFFM = 0x04000080, ++ SSP_PCAP_ADJ_BIT_MSR_ONOFF2M = 0x04000100, ++ SSP_PCAP_ADJ_BIT_MSR_USB1VM = 0x04000200, ++ SSP_PCAP_ADJ_BIT_MSR_MOBPORTM = 0x04000400, ++ SSP_PCAP_ADJ_BIT_MSR_MB2M = 0x04000800, ++ SSP_PCAP_ADJ_BIT_MSR_A1M = 0x04001000, ++ SSP_PCAP_ADJ_BIT_MSR_STM = 0x04002000, ++ SSP_PCAP_ADJ_BIT_MSR_PCM = 0x04004000, ++ SSP_PCAP_ADJ_BIT_MSR_WARMM = 0x04008000, ++ SSP_PCAP_ADJ_BIT_MSR_EOLM = 0x04010000, ++ SSP_PCAP_ADJ_BIT_MSR_CLKM = 0x04020000, ++ SSP_PCAP_ADJ_BIT_MSR_SYS_RSTM = 0x04040000, ++ SSP_PCAP_ADJ_BIT_MSR_ADCDONE2M = 0x04100000, ++ SSP_PCAP_ADJ_BIT_MSR_SOFT_RESETM = 0x04200000, ++ SSP_PCAP_ADJ_BIT_MSR_MNEXBM = 0x04400000, ++ ++ SSP_PCAP_ADJ_BIT_PSTAT_USBDET_4V = 0x08000040, ++ SSP_PCAP_ADJ_BIT_PSTAT_ONOFFSNS = 0x08000080, ++ SSP_PCAP_ADJ_BIT_PSTAT_ONOFFSNS2 = 0x08000100, ++ SSP_PCAP_ADJ_BIT_PSTAT_USBDET_1V = 0x08000200, ++ SSP_PCAP_ADJ_BIT_PSTAT_MOBSENSB = 0x08000400, ++ SSP_PCAP_ADJ_BIT_PSTAT_MB2SNS = 0x08000800, ++ SSP_PCAP_ADJ_BIT_PSTAT_A1SNS = 0x08001000, ++ SSP_PCAP_ADJ_BIT_PSTAT_MSTB = 0x08002000, ++ SSP_PCAP_ADJ_BIT_PSTAT_EOL_STAT = 0x08010000, ++ SSP_PCAP_ADJ_BIT_PSTAT_CLK_STAT = 0x08020000, ++ SSP_PCAP_ADJ_BIT_PSTAT_SYS_RST = 0x08040000, ++ SSP_PCAP_ADJ_BIT_PSTAT_BATTFBSNS = 0x08080000, ++ SSP_PCAP_ADJ_BIT_PSTAT_BATT_DET_IN_SNS = 0x08200000, ++ SSP_PCAP_ADJ_BIT_PSTAT_MNEXBSNS = 0x08400000, ++ SSP_PCAP_ADJ_BIT_PSTAT_WARM_SYS_RST = 0x08800000, ++ ++ SSP_PCAP_ADJ_BIT_VREG2_V1_STBY = 0x18000001, ++ SSP_PCAP_ADJ_BIT_VREG2_V2_STBY = 0x18000002, ++ SSP_PCAP_ADJ_BIT_VREG2_V3_STBY = 0x18000004, ++ SSP_PCAP_ADJ_BIT_VREG2_V4_STBY = 0x18000008, ++ SSP_PCAP_ADJ_BIT_VREG2_V5_STBY = 0x18000010, ++ SSP_PCAP_ADJ_BIT_VREG2_V6_STBY = 0x18000020, ++ SSP_PCAP_ADJ_BIT_VREG2_V7_STBY = 0x18000040, ++ SSP_PCAP_ADJ_BIT_VREG2_V8_STBY = 0x18000080, ++ SSP_PCAP_ADJ_BIT_VREG2_V9_STBY = 0x18000100, ++ SSP_PCAP_ADJ_BIT_VREG2_V10_STBY = 0x18000200, ++ SSP_PCAP_ADJ_BIT_VREG2_V1_LOWPWR = 0x18000400, ++ SSP_PCAP_ADJ_BIT_VREG2_V2_LOWPWR = 0x18000800, ++ SSP_PCAP_ADJ_BIT_VREG2_V3_LOWPWR = 0x18001000, ++ SSP_PCAP_ADJ_BIT_VREG2_V4_LOWPWR = 0x18002000, ++ SSP_PCAP_ADJ_BIT_VREG2_V5_LOWPWR = 0x18004000, ++ SSP_PCAP_ADJ_BIT_VREG2_V6_LOWPWR = 0x18008000, ++ SSP_PCAP_ADJ_BIT_VREG2_V7_LOWPWR = 0x18010000, ++ SSP_PCAP_ADJ_BIT_VREG2_V8_LOWPWR = 0x18020000, ++ SSP_PCAP_ADJ_BIT_VREG2_V9_LOWPWR = 0x18040000, ++ SSP_PCAP_ADJ_BIT_VREG2_V10_LOWPWR = 0x18080000, ++ ++ SSP_PCAP_ADJ_BIT_AUX_VREG_VAUX1_EN = 0x1c000002, ++ SSP_PCAP_ADJ_BIT_AUX_VREG_VAUX1_0 = 0x1c000004, ++ SSP_PCAP_ADJ_BIT_AUX_VREG_VAUX1_1 = 0x1c000008, ++ SSP_PCAP_ADJ_BIT_AUX_VREG_VAUX2_EN = 0x1c000010, ++ SSP_PCAP_ADJ_BIT_AUX_VREG_VAUX2_0 = 0x1c000020, ++ SSP_PCAP_ADJ_BIT_AUX_VREG_VAUX2_1 = 0x1c000040, ++ SSP_PCAP_ADJ_BIT_AUX_VREG_VAUX3_EN = 0x1c000080, ++ SSP_PCAP_ADJ_BIT_AUX_VREG_VAUX3_0 = 0x1c000100, ++ SSP_PCAP_ADJ_BIT_AUX_VREG_VAUX3_1 = 0x1c000200, ++ SSP_PCAP_ADJ_BIT_AUX_VREG_VAUX3_2 = 0x1c000400, ++ SSP_PCAP_ADJ_BIT_AUX_VREG_VAUX3_3 = 0x1c000800, ++ SSP_PCAP_ADJ_BIT_AUX_VREG_VAUX4_EN = 0x1c001000, ++ SSP_PCAP_ADJ_BIT_AUX_VREG_VAUX4_0 = 0x1c002000, ++ SSP_PCAP_ADJ_BIT_AUX_VREG_VAUX4_1 = 0x1c004000, ++ SSP_PCAP_ADJ_BIT_AUX_VREG_VSIM2_EN = 0x1c010000, ++ SSP_PCAP_ADJ_BIT_AUX_VREG_VSIM_EN = 0x1c020000, ++ SSP_PCAP_ADJ_BIT_AUX_VREG_VSIM_0 = 0x1c040000, ++ SSP_PCAP_ADJ_BIT_AUX_VREG_V_VIB_EN = 0x1c080000, ++ SSP_PCAP_ADJ_BIT_AUX_VREG_V_VIB_0 = 0x1c100000, ++ SSP_PCAP_ADJ_BIT_AUX_VREG_V_VIB_1 = 0x1c200000, ++ SSP_PCAP_ADJ_BIT_AUX_VREG_VAUX1_STBY = 0x1c400000, ++ SSP_PCAP_ADJ_BIT_AUX_VREG_VAUX1_LOWPWR = 0x1c800000, ++ SSP_PCAP_ADJ_BIT_AUX_VREG_SW3_STBY = 0x1d000000, ++ ++ SSP_PCAP_ADJ_BIT_BATT_DAC_DAC0 = 0x20000001, ++ SSP_PCAP_ADJ_BIT_BATT_DAC_DAC1 = 0x20000002, ++ SSP_PCAP_ADJ_BIT_BATT_DAC_DAC2 = 0x20000004, ++ SSP_PCAP_ADJ_BIT_BATT_DAC_DAC3 = 0x20000008, ++ SSP_PCAP_ADJ_BIT_BATT_DAC_DAC4 = 0x20000010, ++ SSP_PCAP_ADJ_BIT_BATT_DAC_DAC5 = 0x20000020, ++ SSP_PCAP_ADJ_BIT_BATT_DAC_DAC6 = 0x20000040, ++ SSP_PCAP_ADJ_BIT_BATT_DAC_DAC7 = 0x20000080, ++ SSP_PCAP_ADJ_BIT_BATT_DAC_B_FDBK = 0x20000100, ++ SSP_PCAP_ADJ_BIT_BATT_DAC_EXT_ISENSE = 0x20000200, ++ SSP_PCAP_ADJ_BIT_BATT_DAC_V_COIN0 = 0x20000400, ++ SSP_PCAP_ADJ_BIT_BATT_DAC_V_COIN1 = 0x20000800, ++ SSP_PCAP_ADJ_BIT_BATT_DAC_V_COIN2 = 0x20001000, ++ SSP_PCAP_ADJ_BIT_BATT_DAC_V_COIN3 = 0x20002000, ++ SSP_PCAP_ADJ_BIT_BATT_DAC_I_COIN = 0x20004000, ++ SSP_PCAP_ADJ_BIT_BATT_DAC_COIN_CH_EN = 0x20008000, ++ SSP_PCAP_ADJ_BIT_BATT_DAC_EOL_SEL0 = 0x20020000, ++ SSP_PCAP_ADJ_BIT_BATT_DAC_EOL_SEL1 = 0x20040000, ++ SSP_PCAP_ADJ_BIT_BATT_DAC_EOL_SEL2 = 0x20080000, ++ SSP_PCAP_ADJ_BIT_BATT_DAC_EOL_CMP_EN = 0x20100000, ++ SSP_PCAP_ADJ_BIT_BATT_DAC_BATT_DET_EN = 0x20200000, ++ SSP_PCAP_ADJ_BIT_BATT_DAC_THERMBIAS_CTRL = 0x20400000, ++ ++ SSP_PCAP_ADJ_BIT_ADC1_ADEN = 0x24000001, ++ SSP_PCAP_ADJ_BIT_ADC1_RAND = 0x24000002, ++ SSP_PCAP_ADJ_BIT_ADC1_AD_SEL1 = 0x24000004, ++ SSP_PCAP_ADJ_BIT_ADC1_AD_SEL2 = 0x24000008, ++ SSP_PCAP_ADJ_BIT_ADC1_ADA10 = 0x24000010, ++ SSP_PCAP_ADJ_BIT_ADC1_ADA11 = 0x24000020, ++ SSP_PCAP_ADJ_BIT_ADC1_ADA12 = 0x24000040, ++ SSP_PCAP_ADJ_BIT_ADC1_ADA20 = 0x24000080, ++ SSP_PCAP_ADJ_BIT_ADC1_ADA21 = 0x24000100, ++ SSP_PCAP_ADJ_BIT_ADC1_ADA22 = 0x24000200, ++ SSP_PCAP_ADJ_BIT_ADC1_ATO0 = 0x24000400, ++ SSP_PCAP_ADJ_BIT_ADC1_ATO1 = 0x24000800, ++ SSP_PCAP_ADJ_BIT_ADC1_ATO2 = 0x24001000, ++ SSP_PCAP_ADJ_BIT_ADC1_ATO3 = 0x24002000, ++ SSP_PCAP_ADJ_BIT_ADC1_ATOX = 0x24004000, ++ SSP_PCAP_ADJ_BIT_ADC1_MTR1 = 0x24008000, ++ SSP_PCAP_ADJ_BIT_ADC1_MTR2 = 0x24010000, ++ SSP_PCAP_ADJ_BIT_ADC1_TS_M0 = 0x24020000, ++ SSP_PCAP_ADJ_BIT_ADC1_TS_M1 = 0x24040000, ++ SSP_PCAP_ADJ_BIT_ADC1_TS_M2 = 0x24080000, ++ SSP_PCAP_ADJ_BIT_ADC1_TS_REF_LOWPWR = 0x24100000, ++ SSP_PCAP_ADJ_BIT_ADC1_TS_REFENB = 0x24200000, ++ SSP_PCAP_ADJ_BIT_ADC1_BATT_I_POLARITY = 0x24400000, ++ SSP_PCAP_ADJ_BIT_ADC1_BATT_I_ADC = 0x24800000, ++ ++ SSP_PCAP_ADJ_BIT_ADC2_ADD10 = 0x28000001, ++ SSP_PCAP_ADJ_BIT_ADC2_ADD11 = 0x28000002, ++ SSP_PCAP_ADJ_BIT_ADC2_ADD12 = 0x28000004, ++ SSP_PCAP_ADJ_BIT_ADC2_ADD13 = 0x28000008, ++ SSP_PCAP_ADJ_BIT_ADC2_ADD14 = 0x28000010, ++ SSP_PCAP_ADJ_BIT_ADC2_ADD15 = 0x28000020, ++ SSP_PCAP_ADJ_BIT_ADC2_ADD16 = 0x28000040, ++ SSP_PCAP_ADJ_BIT_ADC2_ADD17 = 0x28000080, ++ SSP_PCAP_ADJ_BIT_ADC2_ADD18 = 0x28000100, ++ SSP_PCAP_ADJ_BIT_ADC2_ADD19 = 0x28000200, ++ SSP_PCAP_ADJ_BIT_ADC2_ADD20 = 0x28000400, ++ SSP_PCAP_ADJ_BIT_ADC2_ADD21 = 0x28000800, ++ SSP_PCAP_ADJ_BIT_ADC2_ADD22 = 0x28001000, ++ SSP_PCAP_ADJ_BIT_ADC2_ADD23 = 0x28002000, ++ SSP_PCAP_ADJ_BIT_ADC2_ADD24 = 0x28004000, ++ SSP_PCAP_ADJ_BIT_ADC2_ADD25 = 0x28008000, ++ SSP_PCAP_ADJ_BIT_ADC2_ADD26 = 0x28010000, ++ SSP_PCAP_ADJ_BIT_ADC2_ADD27 = 0x28020000, ++ SSP_PCAP_ADJ_BIT_ADC2_ADD28 = 0x28040000, ++ SSP_PCAP_ADJ_BIT_ADC2_ADD29 = 0x28080000, ++ SSP_PCAP_ADJ_BIT_ADC2_ADINC1 = 0x28100000, ++ SSP_PCAP_ADJ_BIT_ADC2_ADINC2 = 0x28200000, ++ SSP_PCAP_ADJ_BIT_ADC2_ASC = 0x28400000, ++ ++ SSP_PCAP_ADJ_BIT_AUD_CODEC_AUDIHPF = 0x2c000001, ++ SSP_PCAP_ADJ_BIT_AUD_CODEC_SMB = 0x2c000002, ++ SSP_PCAP_ADJ_BIT_AUD_CODEC_AUDOHPF = 0x2c000004, ++ SSP_PCAP_ADJ_BIT_AUD_CODEC_CD_TS = 0x2c000008, ++ SSP_PCAP_ADJ_BIT_AUD_CODEC_DLM = 0x2c000010, ++ SSP_PCAP_ADJ_BIT_AUD_CODEC_ADITH = 0x2c000020, ++ SSP_PCAP_ADJ_BIT_AUD_CODEC_CDC_CLK0 = 0x2c000040, ++ SSP_PCAP_ADJ_BIT_AUD_CODEC_CDC_CLK1 = 0x2c000080, ++ SSP_PCAP_ADJ_BIT_AUD_CODEC_CDC_CLK2 = 0x2c000100, ++ SSP_PCAP_ADJ_BIT_AUD_CODEC_CLK_INV = 0x2c000200, ++ SSP_PCAP_ADJ_BIT_AUD_CODEC_FS_INV = 0x2c000400, ++ SSP_PCAP_ADJ_BIT_AUD_CODEC_DF_RESET = 0x2c000800, ++ SSP_PCAP_ADJ_BIT_AUD_CODEC_CDC_EN = 0x2c001000, ++ SSP_PCAP_ADJ_BIT_AUD_CODEC_CDC_CLK_EN = 0x2c002000, ++ SSP_PCAP_ADJ_BIT_AUD_CODEC_FS_8K_16K = 0x2c004000, ++ SSP_PCAP_ADJ_BIT_AUD_CODEC_DIG_AUD_IN = 0x2c008000, ++ SSP_PCAP_ADJ_BIT_AUD_CODEC_CLK_IN_SEL = 0x2c010000, ++ SSP_PCAP_ADJ_BIT_AUD_CODEC_MIC2_MUX = 0x2c020000, ++ SSP_PCAP_ADJ_BIT_AUD_CODEC_MIC2IG0 = 0x2c040000, ++ SSP_PCAP_ADJ_BIT_AUD_CODEC_MIC2IG1 = 0x2c080000, ++ SSP_PCAP_ADJ_BIT_AUD_CODEC_MIC2IG2 = 0x2c100000, ++ SSP_PCAP_ADJ_BIT_AUD_CODEC_MIC2IG3 = 0x2c200000, ++ SSP_PCAP_ADJ_BIT_AUD_CODEC_MIC2IG4 = 0x2c400000, ++ SSP_PCAP_ADJ_BIT_AUD_CODEC_MIC2IG_PRI_ADJ = 0x2c800000, ++ SSP_PCAP_ADJ_BIT_AUD_CODEC_CDC_PRI_ADJ = 0x2c200000, ++ ++ SSP_PCAP_ADJ_BIT_AUD_RX_AMPS_A1_EN = 0x30000001, ++ SSP_PCAP_ADJ_BIT_AUD_RX_AMPS_A2_EN = 0x30000002, ++ SSP_PCAP_ADJ_BIT_AUD_RX_AMPS_A4_EN = 0x30000010, ++ SSP_PCAP_ADJ_BIT_AUD_RX_AMPS_ARIGHT_EN = 0x30000020, ++ SSP_PCAP_ADJ_BIT_AUD_RX_AMPS_ALEFT_EN = 0x30000040, ++ SSP_PCAP_ADJ_BIT_AUD_RX_AMPS_CD_BYP = 0x30000080, ++ SSP_PCAP_ADJ_BIT_AUD_RX_AMPS_CDC_SW = 0x30000100, ++ SSP_PCAP_ADJ_BIT_AUD_RX_AMPS_ST_DAC_SW = 0x30000200, ++ SSP_PCAP_ADJ_BIT_AUD_RX_AMPS_PGA_IN_SW = 0x30000400, ++ SSP_PCAP_ADJ_BIT_AUD_RX_AMPS_PGA_R_EN = 0x30000800, ++ SSP_PCAP_ADJ_BIT_AUD_RX_AMPS_PGA_L_EN = 0x30001000, ++ SSP_PCAP_ADJ_BIT_AUD_RX_AMPS_AUDOG0 = 0x30002000, ++ SSP_PCAP_ADJ_BIT_AUD_RX_AMPS_AUDOG1 = 0x30004000, ++ SSP_PCAP_ADJ_BIT_AUD_RX_AMPS_AUDOG2 = 0x30008000, ++ SSP_PCAP_ADJ_BIT_AUD_RX_AMPS_AUDOG3 = 0x30010000, ++ SSP_PCAP_ADJ_BIT_AUD_RX_AMPS_A1CTRL = 0x30020000, ++ SSP_PCAP_ADJ_BIT_AUD_RX_AMPS_MONO0 = 0x30080000, ++ SSP_PCAP_ADJ_BIT_AUD_RX_AMPS_MONO1 = 0x30100000, ++ SSP_PCAP_ADJ_BIT_AUD_RX_AMPS_AUDOG_PRI_ADJ = 0x30200000, ++ SSP_PCAP_ADJ_BIT_AUD_RX_AMPS_MONO_PRI_ADJ = 0x30400000, ++ SSP_PCAP_ADJ_BIT_AUD_RX_AMPS_RX_PRI_ADJ0 = 0x30800000, ++ SSP_PCAP_ADJ_BIT_AUD_RX_AMPS_RX_PRI_ADJ1 = 0x31000000, ++ ++ SSP_PCAP_ADJ_BIT_ST_DAC_SMB_ST_DAC = 0x34000001, ++ SSP_PCAP_ADJ_BIT_ST_DAC_STDET_EN = 0x34000002, ++ SSP_PCAP_ADJ_BIT_ST_DAC_ST_CLK0 = 0x34000004, ++ SSP_PCAP_ADJ_BIT_ST_DAC_ST_CLK1 = 0x34000008, ++ SSP_PCAP_ADJ_BIT_ST_DAC_ST_CLK2 = 0x34000010, ++ SSP_PCAP_ADJ_BIT_ST_DAC_ST_CLK_EN = 0x34000020, ++ SSP_PCAP_ADJ_BIT_ST_DAC_DF_RESET_ST_DAC = 0x34000040, ++ SSP_PCAP_ADJ_BIT_ST_DAC_ST_DAC_EN = 0x34000080, ++ SSP_PCAP_ADJ_BIT_ST_DAC_SR0 = 0x34000100, ++ SSP_PCAP_ADJ_BIT_ST_DAC_SR1 = 0x34000200, ++ SSP_PCAP_ADJ_BIT_ST_DAC_SR2 = 0x34000400, ++ SSP_PCAP_ADJ_BIT_ST_DAC_SR3 = 0x34000800, ++ SSP_PCAP_ADJ_BIT_ST_DAC_DIG_AUD_IN_ST_DAC = 0x34001000, ++ SSP_PCAP_ADJ_BIT_ST_DAC_DIG_AUD_FS0 = 0x34002000, ++ SSP_PCAP_ADJ_BIT_ST_DAC_DIG_AUD_FS1 = 0x34004000, ++ SSP_PCAP_ADJ_BIT_ST_DAC_BCLK0 = 0x34008000, ++ SSP_PCAP_ADJ_BIT_ST_DAC_BCLK1 = 0x34010000, ++ SSP_PCAP_ADJ_BIT_ST_DAC_ST_CLK_INV = 0x34020000, ++ SSP_PCAP_ADJ_BIT_ST_DAC_ST_FS_INV = 0x34040000, ++ SSP_PCAP_ADJ_BIT_ST_DAC_ST_DAC_CLK_IN_SEL = 0x34080000, ++ SSP_PCAP_ADJ_BIT_ST_DAC_ST_DAC_PRI_ADJ = 0x35000000, ++ ++ SSP_PCAP_ADJ_BIT_BUSCTRL_FSENB = 0x50000001, ++ SSP_PCAP_ADJ_BIT_BUSCTRL_USB_SUSPEND = 0x50000002, ++ SSP_PCAP_ADJ_BIT_BUSCTRL_USB_PU = 0x50000004, ++ SSP_PCAP_ADJ_BIT_BUSCTRL_USB_PD = 0x50000008, ++ SSP_PCAP_ADJ_BIT_BUSCTRL_VUSB_EN = 0x50000010, ++ SSP_PCAP_ADJ_BIT_BUSCTRL_USB_PS = 0x50000020, ++ SSP_PCAP_ADJ_BIT_BUSCTRL_VUSB_MSTR_EN = 0x50000040, ++ SSP_PCAP_ADJ_BIT_BUSCTRL_VBUS_PD_ENB = 0x50000080, ++ SSP_PCAP_ADJ_BIT_BUSCTRL_CURRLIM = 0x50000100, ++ SSP_PCAP_ADJ_BIT_BUSCTRL_RS232ENB = 0x50000200, ++ SSP_PCAP_ADJ_BIT_BUSCTRL_RS232_DIR = 0x50000400, ++ SSP_PCAP_ADJ_BIT_BUSCTRL_SE0_CONN = 0x50000800, ++ SSP_PCAP_ADJ_BIT_BUSCTRL_USB_PDM = 0x50001000, ++ SSP_PCAP_ADJ_BIT_BUSCTRL_BUS_PRI_ADJ = 0x51000000, ++ ++ SSP_PCAP_ADJ_BIT_PERIPH_BL_CTRL0 = 0x54000001, ++ SSP_PCAP_ADJ_BIT_PERIPH_BL_CTRL1 = 0x54000002, ++ SSP_PCAP_ADJ_BIT_PERIPH_BL_CTRL2 = 0x54000004, ++ SSP_PCAP_ADJ_BIT_PERIPH_BL_CTRL3 = 0x54000008, ++ SSP_PCAP_ADJ_BIT_PERIPH_BL_CTRL4 = 0x54000010, ++ SSP_PCAP_ADJ_BIT_PERIPH_LEDR_EN = 0x54000020, ++ SSP_PCAP_ADJ_BIT_PERIPH_LEDG_EN = 0x54000040, ++ SSP_PCAP_ADJ_BIT_PERIPH_LEDR_CTRL0 = 0x54000080, ++ SSP_PCAP_ADJ_BIT_PERIPH_LEDR_CTRL1 = 0x54000100, ++ SSP_PCAP_ADJ_BIT_PERIPH_LEDR_CTRL2 = 0x54000200, ++ SSP_PCAP_ADJ_BIT_PERIPH_LEDR_CTRL3 = 0x54000400, ++ SSP_PCAP_ADJ_BIT_PERIPH_LEDG_CTRL0 = 0x54000800, ++ SSP_PCAP_ADJ_BIT_PERIPH_LEDG_CTRL1 = 0x54001000, ++ SSP_PCAP_ADJ_BIT_PERIPH_LEDG_CTRL2 = 0x54002000, ++ SSP_PCAP_ADJ_BIT_PERIPH_LEDG_CTRL3 = 0x54004000, ++ SSP_PCAP_ADJ_BIT_PERIPH_LEDR_I0 = 0x54008000, ++ SSP_PCAP_ADJ_BIT_PERIPH_LEDR_I1 = 0x54010000, ++ SSP_PCAP_ADJ_BIT_PERIPH_LEDG_I0 = 0x54020000, ++ SSP_PCAP_ADJ_BIT_PERIPH_LEDG_I1 = 0x54040000, ++ SSP_PCAP_ADJ_BIT_PERIPH_SKIP = 0x54080000, ++ SSP_PCAP_ADJ_BIT_PERIPH_BL2_CTRL0 = 0x54100000, ++ SSP_PCAP_ADJ_BIT_PERIPH_BL2_CTRL1 = 0x54200000, ++ SSP_PCAP_ADJ_BIT_PERIPH_BL2_CTRL2 = 0x54400000, ++ SSP_PCAP_ADJ_BIT_PERIPH_BL2_CTRL3 = 0x54800000, ++ SSP_PCAP_ADJ_BIT_PERIPH_BL2_CTRL4 = 0x55000000, ++ ++ SSP_PCAP_ADJ_BIT_LOWPWR_CTRL_VAUX2_STBY = 0x60000001, ++ SSP_PCAP_ADJ_BIT_LOWPWR_CTRL_VAUX2_LOWPWR = 0x60000002, ++ SSP_PCAP_ADJ_BIT_LOWPWR_CTRL_VAUX3_STBY = 0x60000004, ++ SSP_PCAP_ADJ_BIT_LOWPWR_CTRL_VAUX3_LOWPWR = 0x60000008, ++ SSP_PCAP_ADJ_BIT_LOWPWR_CTRL_VAUX4_STBY = 0x60000010, ++ SSP_PCAP_ADJ_BIT_LOWPWR_CTRL_VAUX4_LOWPWR = 0x60000020, ++ SSP_PCAP_ADJ_BIT_LOWPWR_CTRL_VSIM_LOWPWR = 0x60000040, ++ SSP_PCAP_ADJ_BIT_LOWPWR_CTRL_VSIM2_LOWPWR = 0x60000080, ++ SSP_PCAP_ADJ_BIT_LOWPWR_CTRL_SW1_MODE00 = 0x60000100, ++ SSP_PCAP_ADJ_BIT_LOWPWR_CTRL_SW1_MODE01 = 0x60000200, ++ SSP_PCAP_ADJ_BIT_LOWPWR_CTRL_SW1_MODE10 = 0x60000400, ++ SSP_PCAP_ADJ_BIT_LOWPWR_CTRL_SW1_MODE11 = 0x60000800, ++ SSP_PCAP_ADJ_BIT_LOWPWR_CTRL_SW10_DVS = 0x60001000, ++ SSP_PCAP_ADJ_BIT_LOWPWR_CTRL_SW11_DVS = 0x60002000, ++ SSP_PCAP_ADJ_BIT_LOWPWR_CTRL_SW12_DVS = 0x60004000, ++ SSP_PCAP_ADJ_BIT_LOWPWR_CTRL_SW13_DVS = 0x60008000, ++ SSP_PCAP_ADJ_BIT_LOWPWR_CTRL_SW2_MODE00 = 0x60010000, ++ SSP_PCAP_ADJ_BIT_LOWPWR_CTRL_SW2_MODE01 = 0x60020000, ++ SSP_PCAP_ADJ_BIT_LOWPWR_CTRL_SW2_MODE10 = 0x60040000, ++ SSP_PCAP_ADJ_BIT_LOWPWR_CTRL_SW2_MODE11 = 0x60080000, ++ SSP_PCAP_ADJ_BIT_LOWPWR_CTRL_SW20_DVS = 0x60100000, ++ SSP_PCAP_ADJ_BIT_LOWPWR_CTRL_SW21_DVS = 0x60200000, ++ SSP_PCAP_ADJ_BIT_LOWPWR_CTRL_SW22_DVS = 0x60400000, ++ SSP_PCAP_ADJ_BIT_LOWPWR_CTRL_SW23_DVS = 0x60800000, ++ SSP_PCAP_ADJ_BIT_LOWPWR_CTRL_VC_STBY = 0x61000000, ++ ++ SSP_PCAP_ADJ_BIT_TX_AUD_AMPS_AUDIG0 = 0x68000001, ++ SSP_PCAP_ADJ_BIT_TX_AUD_AMPS_AUDIG1 = 0x68000002, ++ SSP_PCAP_ADJ_BIT_TX_AUD_AMPS_AUDIG2 = 0x68000004, ++ SSP_PCAP_ADJ_BIT_TX_AUD_AMPS_AUDIG3 = 0x68000008, ++ SSP_PCAP_ADJ_BIT_TX_AUD_AMPS_AUDIG4 = 0x68000010, ++ SSP_PCAP_ADJ_BIT_TX_AUD_AMPS_A3_EN = 0x68000020, ++ SSP_PCAP_ADJ_BIT_TX_AUD_AMPS_A3_MUX = 0x68000040, ++ SSP_PCAP_ADJ_BIT_TX_AUD_AMPS_A5_EN = 0x68000080, ++ SSP_PCAP_ADJ_BIT_TX_AUD_AMPS_A5_MUX = 0x68000100, ++ SSP_PCAP_ADJ_BIT_TX_AUD_AMPS_EXT_MIC_MUX = 0x68000200, ++ SSP_PCAP_ADJ_BIT_TX_AUD_AMPS_MB_ON2 = 0x68000400, ++ SSP_PCAP_ADJ_BIT_TX_AUD_AMPS_MB_ON1 = 0x68000800, ++ SSP_PCAP_ADJ_BIT_TX_AUD_AMPS_A1ID_TX = 0x68001000, ++ SSP_PCAP_ADJ_BIT_TX_AUD_AMPS_A1_CONFIG = 0x68002000, ++ SSP_PCAP_ADJ_BIT_TX_AUD_AMPS_AHS_CONFIG = 0x68004000, ++ SSP_PCAP_ADJ_BIT_TX_AUD_AMPS_A2_CONFIG = 0x68008000, ++ SSP_PCAP_ADJ_BIT_TX_AUD_AMPS_AUDIO_LOWPWR = 0x68080000, ++ SSP_PCAP_ADJ_BIT_TX_AUD_AMPS_AUDIO_STBY = 0x68100000, ++ SSP_PCAP_ADJ_BIT_TX_AUD_AMPS_V2_EN_2 = 0x68200000, ++ SSP_PCAP_ADJ_BIT_TX_AUD_AMPS_AUDIG_PRI_ADJ = 0x68400000, ++ SSP_PCAP_ADJ_BIT_TX_AUD_AMPS_TX_PRI_ADJ0 = 0x68800000, ++ SSP_PCAP_ADJ_BIT_TX_AUD_AMPS_TX_PRI_ADJ1 = 0x69000000, ++ ++ SSP_PCAP_ADJ_BIT_SYS_RST_CLR = 0x6c000001, ++ SSP_PCAP_ADJ_BIT_SYS_RST_MODE0 = 0x6c000002, ++ SSP_PCAP_ADJ_BIT_SYS_RST_MODE1 = 0x6c000004, ++ SSP_PCAP_ADJ_BIT_SYS_VFLASH_0 = 0x6c000008, ++ SSP_PCAP_ADJ_BIT_SYS_VFLASH_1 = 0x6c000010, ++ SSP_PCAP_ADJ_BIT_SYS_MID_SELECT = 0x6c000020, ++ SSP_PCAP_ADJ_BIT_SYS_MID_FET = 0x6c000040, ++ SSP_PCAP_ADJ_BIT_SYS_MAIN_LOW = 0x6c000080, ++ SSP_PCAP_ADJ_BIT_SYS_BATTFB_DIS = 0x6c000100, ++ SSP_PCAP_ADJ_BIT_SYS_GP_REG9 = 0x6c000200, ++ SSP_PCAP_ADJ_BIT_SYS_GP_REG10 = 0x6c000400, ++ SSP_PCAP_ADJ_BIT_SYS_GP_REG11 = 0x6c000800, ++ SSP_PCAP_ADJ_BIT_SYS_GP_REG12 = 0x6c001000, ++ SSP_PCAP_ADJ_BIT_SYS_GP_REG13 = 0x6c002000, ++ SSP_PCAP_ADJ_BIT_SYS_GP_REG14 = 0x6c004000, ++ SSP_PCAP_ADJ_BIT_SYS_GP_REG15 = 0x6c008000, ++ SSP_PCAP_ADJ_BIT_SYS_GP_REG16 = 0x6c010000, ++ SSP_PCAP_ADJ_BIT_SYS_GP_REG17 = 0x6c020000, ++ SSP_PCAP_ADJ_BIT_SYS_GP_REG18 = 0x6c040000, ++ SSP_PCAP_ADJ_BIT_SYS_GP_REG19 = 0x6c080000, ++ SSP_PCAP_ADJ_BIT_SYS_GP_REG20 = 0x6c100000, ++ SSP_PCAP_ADJ_BIT_SYS_GP_REG21 = 0x6c200000, ++ SSP_PCAP_ADJ_BIT_SYS_GP_REG22 = 0x6c400000, ++ SSP_PCAP_ADJ_BIT_SYS_GP_REG23 = 0x6c800000, ++ SSP_PCAP_ADJ_BIT_SYS_GP_REG24 = 0x6d000000 ++ ++}SSP_PCAP_SECONDARY_PROCESSOR_REGISTER_BIT_TYPE; ++ ++/************************ FUNCTION PROTOTYPES **************************************/ ++extern void ssp_pcap_init(void); ++extern void ssp_pcap_release(void); ++ ++extern void ssp_pcap_open(SSP_PCAP_INIT_DRIVER_TYPE portType); ++extern void ssp_pcap_close(void); ++ ++extern void ssp_pcap_intoSleep_callBack(void); ++extern void ssp_pcap_wakeUp_callBack(void); ++ ++ ++extern SSP_PCAP_STATUS SSP_PCAP_write_data_to_PCAP(SSP_PCAP_SECONDARY_PROCESSOR_REGISTER ssp_pcap_register,U32 ssp_pcap_register_value); ++extern SSP_PCAP_STATUS SSP_PCAP_read_data_from_PCAP(SSP_PCAP_SECONDARY_PROCESSOR_REGISTER ssp_pcap_register,P_U32 p_ssp_pcap_register_value); ++ ++extern SSP_PCAP_STATUS SSP_PCAP_bit_set(SSP_PCAP_SECONDARY_PROCESSOR_REGISTER_BIT_TYPE ssp_pcap_bit ) ; ++extern SSP_PCAP_STATUS SSP_PCAP_bit_clean(SSP_PCAP_SECONDARY_PROCESSOR_REGISTER_BIT_TYPE ssp_pcap_bit ) ; ++extern SSP_PCAP_BIT_STATUS SSP_PCAP_get_bit_from_buffer(SSP_PCAP_SECONDARY_PROCESSOR_REGISTER_BIT_TYPE ssp_pcap_bit ) ; ++extern SSP_PCAP_BIT_STATUS SSP_PCAP_get_bit_from_PCAP(SSP_PCAP_SECONDARY_PROCESSOR_REGISTER_BIT_TYPE ssp_pcap_bit ) ; ++extern U32 SSP_PCAP_get_register_value_from_buffer(SSP_PCAP_SECONDARY_PROCESSOR_REGISTER ssp_pcap_register ) ; ++ ++extern SSP_PCAP_STATUS SSP_PCAP_TSI_mode_set(TOUCH_SCREEN_DETECT_TYPE mode_Type ); ++extern SSP_PCAP_STATUS SSP_PCAP_TSI_start_XY_read(void); ++extern SSP_PCAP_STATUS SSP_PCAP_TSI_get_XY_value(P_U16 p_x,P_U16 p_y); ++extern SSP_PCAP_STATUS SSP_PCAP_CDC_CLK_set(PHONE_CDC_CLOCK_TYPE clkType); ++ ++extern SSP_PCAP_STATUS SSP_PCAP_CDC_SR_set(ST_SAMPLE_RATE_TYPE srType); ++extern SSP_PCAP_STATUS SSP_PCAP_BCLK_set(ST_BCLK_TIME_SLOT_TYPE bclkType); ++extern SSP_PCAP_STATUS SSP_PCAP_STCLK_set(ST_CLK_TYPE stClkType); ++extern SSP_PCAP_STATUS SSP_PCAP_DIG_AUD_FS_set(DIG_AUD_MODE_TYPE fsType); ++extern SSP_PCAP_STATUS SSP_PCAP_AUDIG_set(U32 audioInGain); ++extern SSP_PCAP_STATUS SSP_PCAP_MONO_set(MONO_TYPE monoType); ++extern SSP_PCAP_STATUS SSP_PCAP_AUDOG_set(U32 audioOutGain); ++ ++extern SSP_PCAP_STATUS SSP_PCAP_V_VIB_level_set(VibratorVoltageLevel_TYPE VIBLevelType); ++extern SSP_PCAP_STATUS SSP_PCAP_configure_USB_UART_transeiver(SSP_PCAP_PORT_TYPE portType); ++extern SSP_PCAP_BIT_STATUS SSP_PCAP_get_audio_in_status(void); ++ ++/* for log */ ++extern void pcap_log_add_pure_data(u8* pData,u32 len); ++extern void pcap_log_add_data(u8* pData,u32 len); ++ ++/* screen lock on/off handler */ ++extern void ssp_pcap_screenlock_lock(u32 data); ++extern void ssp_pcap_screenlock_unlock(u32 data); ++ ++#endif +Index: linux-2.6.20.7/include/asm-arm/arch-pxa/irqs.h +=================================================================== +--- linux-2.6.20.7.orig/include/asm-arm/arch-pxa/irqs.h 2007-04-21 08:26:32.000000000 -0300 ++++ linux-2.6.20.7/include/asm-arm/arch-pxa/irqs.h 2007-04-21 08:26:37.000000000 -0300 +@@ -176,7 +176,8 @@ + #define NR_IRQS (IRQ_LOCOMO_SPI_TEND + 1) + #elif defined(CONFIG_ARCH_LUBBOCK) || \ + defined(CONFIG_MACH_LOGICPD_PXA270) || \ +- defined(CONFIG_MACH_MAINSTONE) ++ defined(CONFIG_MACH_MAINSTONE) || \ ++ defined(CONFIG_PXA_EZX) + #define NR_IRQS (IRQ_BOARD_END) + #else + #define NR_IRQS (IRQ_BOARD_START) +@@ -222,3 +223,16 @@ + #define IRQ_LOCOMO_GPIO_BASE (IRQ_BOARD_START + 1) + #define IRQ_LOCOMO_LT_BASE (IRQ_BOARD_START + 2) + #define IRQ_LOCOMO_SPI_BASE (IRQ_BOARD_START + 3) ++ ++/* EZX Interrupts (CONFIG_EZX) */ ++#define EZX_IRQ(x) (IRQ_BOARD_START + (x)) ++#define EZX_IRQ_ADCDONE EZX_IRQ(0) /* PCAP */ ++#define EZX_IRQ_TS EZX_IRQ(1) /* PCAP */ ++#define EZX_IRQ_USB4V EZX_IRQ(2) /* PCAP */ ++#define EZX_IRQ_USB1V EZX_IRQ(3) /* PCAP */ ++#define EZX_IRQ_HEADJACK EZX_IRQ(4) /* PCAP */ ++#define EZX_IRQ_MIC EZX_IRQ(5) /* PCAP */ ++#define EZX_IRQ_ADCDONE2 EZX_IRQ(6) /* PCAP */ ++#define EZX_IRQ_ONOFF EZX_IRQ(7) ++#define EZX_IRQ_ONOFF2 EZX_IRQ(8) ++ +Index: linux-2.6.20.7/arch/arm/mach-pxa/Makefile +=================================================================== +--- linux-2.6.20.7.orig/arch/arm/mach-pxa/Makefile 2007-04-21 08:26:37.000000000 -0300 ++++ linux-2.6.20.7/arch/arm/mach-pxa/Makefile 2007-04-21 08:45:09.000000000 -0300 +@@ -18,7 +18,7 @@ + obj-$(CONFIG_MACH_AKITA) += akita-ioexp.o + obj-$(CONFIG_MACH_POODLE) += poodle.o corgi_ssp.o + obj-$(CONFIG_MACH_TOSA) += tosa.o +-obj-$(CONFIG_PXA_EZX) += ezx.o ezx_lcd.o ezx_ssp.o ++obj-$(CONFIG_PXA_EZX) += ezx.o ezx_lcd.o ezx_ssp.o ezx-pcap.o + + # Support for blinky lights + led-y := leds.o +Index: linux-2.6.20.7/arch/arm/mach-pxa/ezx.c +=================================================================== +--- linux-2.6.20.7.orig/arch/arm/mach-pxa/ezx.c 2007-04-21 08:26:37.000000000 -0300 ++++ linux-2.6.20.7/arch/arm/mach-pxa/ezx.c 2007-04-21 08:51:15.000000000 -0300 +@@ -73,6 +73,24 @@ + .clk_pcap = 1, + }; + ++/* PCAP */ ++static struct resource ezxpcap_resources[] = { ++ [0] = { ++ .start = IRQ_GPIO1, ++ .end = IRQ_GPIO1, ++ .flags = IORESOURCE_IRQ, ++ }, ++}; ++ ++struct platform_device ezxpcap_device = { ++ .name = "ezx-pcap", ++ .id = -1, ++ .dev = { ++ .parent = &ezxssp_device.dev, ++ }, ++ .num_resources = ARRAY_SIZE(ezxpcap_resources), ++ .resource = ezxpcap_resources, ++}; + + /* OHCI Controller */ + +@@ -236,7 +254,7 @@ + }; + + +-static struct resource ezx_bp_resources[] = { ++static struct resource ezxbp_resources[] = { + [0] = { + .start = GPIO_BP_RDY, + .end = GPIO_BP_RDY, +@@ -256,15 +274,15 @@ + #endif + }; + +-static struct platform_device ezx_bp_device = { ++static struct platform_device ezxbp_device = { + .name = "ezx-bp", + .dev = { + //.parent = + //.platform_data = + }, + .id = -1, +- .num_resources = ARRAY_SIZE(ezx_bp_resources), +- .resource = ezx_bp_resources, ++ .num_resources = ARRAY_SIZE(ezxbp_resources), ++ .resource = ezxbp_resources, + }; + + static void __init ezx_init_gpio_irq(void) +@@ -297,7 +315,8 @@ + + static struct platform_device *devices[] __initdata = { + &ezxssp_device, +- &ezx_bp_device, ++ &ezxpcap_device, ++ &ezxbp_device, + }; + + static void __init a780_init(void) diff --git a/packages/linux/linux-ezx-2.6.20.7/ezx-serial-bug-workaround.patch b/packages/linux/linux-ezx-2.6.20.7/ezx-serial-bug-workaround.patch new file mode 100644 index 0000000000..9f30cc35fe --- /dev/null +++ b/packages/linux/linux-ezx-2.6.20.7/ezx-serial-bug-workaround.patch @@ -0,0 +1,45 @@ +Work around some errata in the pxa serial code (copied from motorolas 2.4.x tree) + +Index: linux-2.6.20.7/drivers/serial/pxa.c +=================================================================== +--- linux-2.6.20.7.orig/drivers/serial/pxa.c 2007-04-21 13:57:46.000000000 -0300 ++++ linux-2.6.20.7/drivers/serial/pxa.c 2007-04-21 14:05:03.000000000 -0300 +@@ -29,6 +29,10 @@ + #define SUPPORT_SYSRQ + #endif + ++#define pxa_buggy_port(x) ({ \ ++ int cpu_ver; asm("mrc%? p15, 0, %0, c0, c0" : "=r" (cpu_ver)); \ ++ ((x) == PORT_PXA && (cpu_ver & ~1) == 0x69052100); }) ++ + #include <linux/module.h> + #include <linux/ioport.h> + #include <linux/init.h> +@@ -195,7 +199,7 @@ + if (uart_circ_empty(xmit)) + serial_pxa_stop_tx(&up->port); + } +- ++static inline irqreturn_t serial_pxa_irq(int, void *); + static void serial_pxa_start_tx(struct uart_port *port) + { + struct uart_pxa_port *up = (struct uart_pxa_port *)port; +@@ -203,6 +207,8 @@ + if (!(up->ier & UART_IER_THRI)) { + up->ier |= UART_IER_THRI; + serial_out(up, UART_IER, up->ier); ++ if (pxa_buggy_port(up->port.type)) ++ serial_pxa_irq(up->port.irq, NULL); + } + } + +@@ -298,6 +304,9 @@ + + mcr |= up->mcr; + ++ if (pxa_buggy_port(up->port.type) && up->port.irq != 0) ++ mcr ^= UART_MCR_OUT2; ++ + serial_out(up, UART_MCR, mcr); + } + diff --git a/packages/linux/linux-ezx-2.6.20.7/mux-fix-init-errorpath.patch b/packages/linux/linux-ezx-2.6.20.7/mux-fix-init-errorpath.patch new file mode 100644 index 0000000000..716ef86fd1 --- /dev/null +++ b/packages/linux/linux-ezx-2.6.20.7/mux-fix-init-errorpath.patch @@ -0,0 +1,20 @@ +Index: linux-2.6.16/drivers/char/ts0710_mux_usb.c +=================================================================== +--- linux-2.6.16.orig/drivers/char/ts0710_mux_usb.c 2007-01-17 00:10:32.000000000 +0100 ++++ linux-2.6.16/drivers/char/ts0710_mux_usb.c 2007-01-17 00:42:23.000000000 +0100 +@@ -811,7 +811,6 @@ + /*init the related mux interface*/ + if (!(bvd_ipc = kzalloc(sizeof(struct ipc_usb_data), GFP_KERNEL))) { + err("usb_ipc_init: Out of memory."); +- usb_deregister(&usb_ipc_driver); + return -ENOMEM; + } + bvd_dbg("usb_ipc_init: Address of bvd_ipc:%p", bvd_ipc); +@@ -819,7 +818,6 @@ + if (!(bvd_ipc->xmit.buf = kmalloc(IPC_USB_XMIT_SIZE, GFP_KERNEL))) { + err("usb_ipc_init: Not enough memory for the input buffer."); + kfree(bvd_ipc); +- usb_deregister(&usb_ipc_driver); + return -ENOMEM; + } + bvd_dbg("usb_ipc_init: bvd_ipc->xmit.buf address:%p", diff --git a/packages/linux/linux-ezx-2.6.20.7/mux-fix-makefile.patch b/packages/linux/linux-ezx-2.6.20.7/mux-fix-makefile.patch new file mode 100644 index 0000000000..f7884ca524 --- /dev/null +++ b/packages/linux/linux-ezx-2.6.20.7/mux-fix-makefile.patch @@ -0,0 +1,14 @@ +Index: linux-2.6.20.7/drivers/char/Makefile +=================================================================== +--- linux-2.6.20.7.orig/drivers/char/Makefile 2007-04-22 10:51:23.000000000 +0200 ++++ linux-2.6.20.7/drivers/char/Makefile 2007-04-22 10:52:48.000000000 +0200 +@@ -101,7 +101,8 @@ + obj-$(CONFIG_HANGCHECK_TIMER) += hangcheck-timer.o + obj-$(CONFIG_TCG_TPM) += tpm/ + +-obj-$(CONFIG_TS0710_MUX) += ts0710_mux.o ts0710_mux_usb.o ++obj-$(CONFIG_TS0710_MUX_USB) += ts0710_mux_usb.o ++obj-$(CONFIG_TS0710_MUX) += ts0710_mux.o + + + # Files generated that shall be removed upon make clean diff --git a/packages/linux/linux-ezx-2.6.20.7/mux-fix-tty-driver.patch b/packages/linux/linux-ezx-2.6.20.7/mux-fix-tty-driver.patch new file mode 100644 index 0000000000..2e1aabd952 --- /dev/null +++ b/packages/linux/linux-ezx-2.6.20.7/mux-fix-tty-driver.patch @@ -0,0 +1,125 @@ +Index: linux-2.6.20.7/drivers/char/ts0710_mux.c +=================================================================== +--- linux-2.6.20.7.orig/drivers/char/ts0710_mux.c 2007-04-22 10:51:31.000000000 +0200 ++++ linux-2.6.20.7/drivers/char/ts0710_mux.c 2007-04-22 10:53:05.000000000 +0200 +@@ -241,7 +241,8 @@ + static volatile __u8 mux_recv_info_flags[NR_MUXS]; + static mux_recv_struct *mux_recv_queue = NULL; + +-static struct tty_driver mux_driver; ++// Local for 2.6? ++static struct tty_driver *mux_driver; + + #ifdef USB_FOR_MUX + #define COMM_FOR_MUX_DRIVER usb_for_mux_driver +@@ -3007,6 +3008,7 @@ + #else + mux_tty[line]++; + dlci = tty2dlci[line]; ++ mux_table[line] = tty; + + /* if( dlci == 1 ) { */ + /* Open server channel 0 first */ +@@ -3087,6 +3089,7 @@ + } + } + ++ + retval = 0; + #endif + out: +@@ -3894,43 +3897,50 @@ + INIT_WORK(&receive_tqueue, receive_worker, NULL); + INIT_WORK(&post_recv_tqueue, post_recv_worker, NULL); + +- memset(&mux_driver, 0, sizeof(struct tty_driver)); +- memset(&mux_tty, 0, sizeof(mux_tty)); +- mux_driver.magic = TTY_DRIVER_MAGIC; +- mux_driver.driver_name = "ts0710mux"; +- mux_driver.name = "ts0710mux"; +- mux_driver.major = TS0710MUX_MAJOR; +- mux_driver.minor_start = TS0710MUX_MINOR_START; +- mux_driver.num = NR_MUXS; +- mux_driver.type = TTY_DRIVER_TYPE_SERIAL; +- mux_driver.subtype = SERIAL_TYPE_NORMAL; +- mux_driver.init_termios = tty_std_termios; +- mux_driver.init_termios.c_iflag = 0; +- mux_driver.init_termios.c_oflag = 0; +- mux_driver.init_termios.c_cflag = B38400 | CS8 | CREAD; +- mux_driver.init_termios.c_lflag = 0; +- mux_driver.flags = TTY_DRIVER_RESET_TERMIOS | TTY_DRIVER_REAL_RAW; +- +- mux_driver.ttys = mux_table; +- mux_driver.termios = mux_termios; +- mux_driver.termios_locked = mux_termios_locked; ++ mux_driver = alloc_tty_driver(NR_MUXS); ++ if (!mux_driver) ++ return -ENOMEM; ++ ++ mux_driver->owner = THIS_MODULE; ++ mux_driver->driver_name = "ts0710mux"; ++ mux_driver->name = "mux"; ++ mux_driver->devfs_name = "mux"; ++ mux_driver->major = TS0710MUX_MAJOR; ++ mux_driver->minor_start = TS0710MUX_MINOR_START; ++ mux_driver->type = TTY_DRIVER_TYPE_SERIAL; ++ mux_driver->subtype = SERIAL_TYPE_NORMAL; ++ mux_driver->flags = TTY_DRIVER_RESET_TERMIOS | TTY_DRIVER_REAL_RAW; ++ ++ mux_driver->init_termios = tty_std_termios; ++ mux_driver->init_termios.c_iflag = 0; ++ mux_driver->init_termios.c_oflag = 0; ++ mux_driver->init_termios.c_cflag = B38400 | CS8 | CREAD; ++ mux_driver->init_termios.c_lflag = 0; ++ ++// mux_driver.ttys = mux_table; ++ mux_driver->termios = mux_termios; ++ mux_driver->termios_locked = mux_termios_locked; + // mux_driver.driver_state = mux_state; +- mux_driver.other = NULL; ++ mux_driver->other = NULL; + +- mux_driver.open = mux_open; +- mux_driver.close = mux_close; +- mux_driver.write = mux_write; +- mux_driver.write_room = mux_write_room; +- mux_driver.flush_buffer = mux_flush_buffer; +- mux_driver.chars_in_buffer = mux_chars_in_buffer; +- mux_driver.throttle = mux_throttle; +- mux_driver.unthrottle = mux_unthrottle; +- mux_driver.ioctl = mux_ioctl; +- mux_driver.owner = THIS_MODULE; ++ mux_driver->open = mux_open; ++ mux_driver->close = mux_close; ++ mux_driver->write = mux_write; ++ mux_driver->write_room = mux_write_room; ++ mux_driver->flush_buffer = mux_flush_buffer; ++ mux_driver->chars_in_buffer = mux_chars_in_buffer; ++ mux_driver->throttle = mux_throttle; ++ mux_driver->unthrottle = mux_unthrottle; ++ mux_driver->ioctl = mux_ioctl; + +- if (tty_register_driver(&mux_driver)) ++ // FIXME: No panic() here ++ if (tty_register_driver(mux_driver)) + panic("Couldn't register mux driver"); + ++ for (j=0; j<NR_MUXS; j++) ++ tty_register_device(mux_driver, j, NULL); ++ ++ + COMM_MUX_DISPATCHER = mux_dispatcher; + COMM_MUX_SENDER = mux_sender; + +@@ -3964,7 +3974,10 @@ + mux_recv_info[j] = 0; + } + +- if (tty_unregister_driver(&mux_driver)) ++ for (j=0; j<NR_MUXS; j++) ++ tty_unregister_device(mux_driver, j); ++ ++ if (tty_unregister_driver(mux_driver)) + panic("Couldn't unregister mux driver"); + } + diff --git a/packages/linux/linux-ezx-2.6.20.7/mux-fix.patch b/packages/linux/linux-ezx-2.6.20.7/mux-fix.patch new file mode 100644 index 0000000000..b820762f41 --- /dev/null +++ b/packages/linux/linux-ezx-2.6.20.7/mux-fix.patch @@ -0,0 +1,164 @@ +Index: linux-2.6.20.7/drivers/char/ts0710_mux_usb.c +=================================================================== +--- linux-2.6.20.7.orig/drivers/char/ts0710_mux_usb.c 2007-04-21 18:07:45.000000000 +0200 ++++ linux-2.6.20.7/drivers/char/ts0710_mux_usb.c 2007-04-21 20:55:13.000000000 +0200 +@@ -626,7 +626,6 @@ + } + + interface = &intf->cur_altsetting->desc; +- endpoint = &intf->cur_altsetting->endpoint[0].desc; + /* Start checking for two bulk endpoints or ... FIXME: This is a future + * enhancement...*/ + bvd_dbg("usb_ipc_probe: Number of Endpoints:%d", +@@ -638,30 +637,26 @@ + + ep_cnt = have_bulk_in_mux = have_bulk_out_mux = 0; + +- bvd_dbg("usb_ipc_probe: endpoint[0] is:%x", +- (&endpoint[0])->bEndpointAddress); +- bvd_dbg("usb_ipc_probe: endpoint[1] is:%x ", +- (&endpoint[1])->bEndpointAddress); +- + while (ep_cnt < interface->bNumEndpoints) { +- +- if (!have_bulk_in_mux && IS_EP_BULK_IN(endpoint[ep_cnt])) { +- bvd_dbg("usb_ipc_probe: bEndpointAddress(IN) is:%x ", +- (&endpoint[ep_cnt])->bEndpointAddress); +- have_bulk_in_mux = +- (&endpoint[ep_cnt])->bEndpointAddress; +- readsize = (&endpoint[ep_cnt])->wMaxPacketSize; ++ endpoint = &intf->cur_altsetting->endpoint[ep_cnt].desc; ++ bvd_dbg("usb_ipc_probe: endpoint[%i] is: %x", ep_cnt, ++ endpoint->bEndpointAddress); ++ ++ if (!have_bulk_in_mux && IS_EP_BULK_IN(*endpoint)) { ++ bvd_dbg("usb_ipc_probe: bEndpointAddress(IN) is: %x ", ++ endpoint->bEndpointAddress); ++ have_bulk_in_mux = endpoint->bEndpointAddress; ++ readsize = endpoint->wMaxPacketSize; + bvd_dbg("usb_ipc_probe: readsize=%d", readsize); + ep_cnt++; + continue; + } + +- if (!have_bulk_out_mux && IS_EP_BULK_OUT(endpoint[ep_cnt])) { +- bvd_dbg("usb_ipc_probe: bEndpointAddress(OUT) is:%x ", +- (&endpoint[ep_cnt])->bEndpointAddress); +- have_bulk_out_mux = +- (&endpoint[ep_cnt])->bEndpointAddress; +- writesize = (&endpoint[ep_cnt])->wMaxPacketSize; ++ if (!have_bulk_out_mux && IS_EP_BULK_OUT(*endpoint)) { ++ bvd_dbg("usb_ipc_probe: bEndpointAddress(OUT) is: %x ", ++ endpoint->bEndpointAddress); ++ have_bulk_out_mux = endpoint->bEndpointAddress; ++ writesize = endpoint->wMaxPacketSize; + bvd_dbg("usb_ipc_probe: writesize=%d", writesize); + ep_cnt++; + continue; +@@ -718,21 +713,27 @@ + bvd_ipc->bh_bp.func = usbipc_bh_bp_func; + bvd_ipc->bh_bp.data = (unsigned long) bvd_ipc; + ++ bvd_dbg("after assignements"); + /*Build a write urb*/ ++ usb_init_urb(&bvd_ipc->writeurb_mux); + usb_fill_bulk_urb(&bvd_ipc->writeurb_mux, usbdev, + usb_sndbulkpipe(bvd_ipc->ipc_dev, + bvd_ipc->bulk_out_ep_mux), + bvd_ipc->obuf, writesize, usb_ipc_write_bulk, + bvd_ipc); + //bvd_ipc->writeurb_mux.transfer_flags |= USB_ASYNC_UNLINK; ++ bvd_dbg("after write urb"); + + /*Build a read urb and send a IN token first time*/ ++ usb_init_urb(&bvd_ipc->readurb_mux); + usb_fill_bulk_urb(&bvd_ipc->readurb_mux, usbdev, + usb_rcvbulkpipe(usbdev, bvd_ipc->bulk_in_ep_mux), + bvd_ipc->ibuf, readsize, usb_ipc_read_bulk, bvd_ipc); + //bvd_ipc->readurb_mux.transfer_flags |= USB_ASYNC_UNLINK; ++ bvd_dbg("after read urb"); + +- usb_driver_claim_interface(&usb_ipc_driver, intf, bvd_ipc); ++ //usb_driver_claim_interface(&usb_ipc_driver, intf, bvd_ipc); ++ bvd_dbg("after claim interface"); + //usb_driver_claim_interface(&usb_ipc_driver, &ipccfg->interface[1], bvd_ipc); + + // a2590c: dsplog is not supported by this driver +@@ -740,6 +741,8 @@ + // &ipccfg->interface[2], bvd_ipc); + /*send a IN token first time*/ + bvd_ipc->readurb_mux.dev = bvd_ipc->ipc_dev; ++ bvd_dbg("after assignement"); ++ + if (usb_submit_urb(&bvd_ipc->readurb_mux, GFP_ATOMIC)) + printk("usb_ipc_prob: usb_submit_urb(read mux bulk) failed!\n"); + +@@ -750,7 +753,7 @@ + tasklet_schedule(&bvd_ipc->bh); + } + +- printk("usb_ipc_probe: completed probe!"); ++ printk("usb_ipc_probe: completed probe!\n"); + usb_set_intfdata(intf, &bvd_ipc); + return 0; + } +@@ -760,21 +763,23 @@ + //struct usb_device *usbdev = interface_to_usbdev(intf); + struct ipc_usb_data *bvd_ipc_disconnect = usb_get_intfdata(intf); + +- printk("usb_ipc_disconnect:*** \n"); + ++ printk("usb_ipc_disconnect. bvd_ipc_disconnect address: %p\n", bvd_ipc_disconnect); ++ ++ //FIXME: Memory leak? + if ((UHCRHPS3 & 0x4) == 0) +- usb_unlink_urb(&bvd_ipc_disconnect->readurb_mux); ++ // usb_unlink_urb(&bvd_ipc_disconnect->readurb_mux); + +- usb_unlink_urb(&bvd_ipc_disconnect->writeurb_mux); ++ //usb_unlink_urb(&bvd_ipc_disconnect->writeurb_mux); + + bvd_ipc_disconnect->ipc_flag = IPC_USB_PROBE_NOT_READY; + kfree(bvd_ipc_disconnect->ibuf); + kfree(bvd_ipc_disconnect->obuf); + +- usb_driver_release_interface(&usb_ipc_driver, +- bvd_ipc_disconnect->ipc_dev->actconfig->interface[0]); +- usb_driver_release_interface(&usb_ipc_driver, +- bvd_ipc_disconnect->ipc_dev->actconfig->interface[1]); ++ //usb_driver_release_interface(&usb_ipc_driver, ++ // bvd_ipc_disconnect->ipc_dev->actconfig->interface[0]); ++ //usb_driver_release_interface(&usb_ipc_driver, ++ // bvd_ipc_disconnect->ipc_dev->actconfig->interface[1]); + + //a2590c: dsplog interface is not supported by this driver + //usb_driver_release_interface(&usb_ipc_driver, &bvd_ipc_disconnect->ipc_dev->actconfig->interface[2]); +@@ -803,13 +808,6 @@ + int result; + + bvd_dbg("init usb_ipc"); +- /* register driver at the USB subsystem */ +- result = usb_register(&usb_ipc_driver); +- if (result < 0) { +- err ("usb ipc driver could not be registered"); +- return result; +- } +- + /*init the related mux interface*/ + if (!(bvd_ipc = kzalloc(sizeof(struct ipc_usb_data), GFP_KERNEL))) { + err("usb_ipc_init: Out of memory."); +@@ -836,6 +834,14 @@ + usb_for_mux_driver = &ipcusb_tty_driver; + usb_for_mux_tty = &ipcusb_tty; + ++ /* register driver at the USB subsystem */ ++ // this was called before bvd_ipc was allocated ++ result = usb_register(&usb_ipc_driver); ++ if (result < 0) { ++ err ("usb ipc driver could not be registered"); ++ return result; ++ } ++ + /* init timers for ipcusb read process and usb suspend */ + init_timer(&ipcusb_timer); + ipcusb_timer.function = ipcusb_timeout; diff --git a/packages/linux/linux-ezx-2.6.20.7/mux-ifdef-ezx-features.patch b/packages/linux/linux-ezx-2.6.20.7/mux-ifdef-ezx-features.patch new file mode 100644 index 0000000000..f9ad633c76 --- /dev/null +++ b/packages/linux/linux-ezx-2.6.20.7/mux-ifdef-ezx-features.patch @@ -0,0 +1,85 @@ +diff -pruN linux-2.6.20.7/drivers/char/ts0710_mux_usb.c linux-2.6.20.7_x386/drivers/char/ts0710_mux_usb.c +--- linux-2.6.20.7/drivers/char/ts0710_mux_usb.c 2007-04-22 10:51:38.000000000 +0200 ++++ linux-2.6.20.7_x386/drivers/char/ts0710_mux_usb.c 2007-04-22 11:44:54.000000000 +0200 +@@ -35,10 +35,14 @@ + #include <linux/list.h> + #include <linux/errno.h> + #include <asm/uaccess.h> ++ ++#ifdef CONFIG_PXA_EZX + #include <asm/hardware.h> + #include <asm/arch/hardware.h> + #include <asm/arch-pxa/pxa-regs.h> + #include <asm/arch-pxa/ezx.h> ++#endif ++ + #include <linux/slab.h> + #include <linux/miscdevice.h> + #include <linux/init.h> +@@ -341,8 +345,10 @@ static void usb_ipc_write_bulk(struct ur + + static void wakeup_timeout(unsigned long data) + { ++#ifdef CONFIG_PXA_EZX + GPSR(GPIO_MCU_INT_SW) = GPIO_bit(GPIO_MCU_INT_SW); + bvd_dbg("wakup_timeout: send GPIO_MCU_INT_SW signal!"); ++#endif + } + + static void suspend_timeout(unsigned long data) +@@ -353,10 +359,12 @@ static void suspend_timeout(unsigned lon + bvd_dbg("suspend_timeout: add the suspend timer again"); + } else { + unlink_urbs(&bvd_ipc->readurb_mux); ++#ifdef CONFIG_PXA_EZX + UHCRHPS3 = 0x4; + mdelay(40); + bvd_dbg("suspend_timeout: send SUSPEND signal! UHCRHPS3=0x%x", + UHCRHPS3); ++#endif + } + } + +@@ -404,6 +412,7 @@ static void ipcusb_xmit_data(void) + bvd_ipc->writeurb_mux.transfer_buffer_length = buf_num; + bvd_dbg("ipcusb_xmit_data: copy data to write urb finished! "); + ++#ifdef CONFIG_PXA_EZX + if ((UHCRHPS3 & 0x4) == 0x4) { + static int ret; + int time = 0; +@@ -442,6 +451,7 @@ static void ipcusb_xmit_data(void) + "failed! status=%d\n", ret); + bvd_dbg("ipcusb_xmit_data: Send a IN token successfully!"); + } ++#endif + + sumbit_times++; + bvd_ipc->write_finished_flag = 0; +@@ -464,12 +474,16 @@ static void usbipc_bh_func(unsigned long + + static void usbipc_bh_bp_func(unsigned long param) + { ++#ifdef CONFIG_PXA_EZX + if ((UHCRHPS3 & 0x4) == 0x4) { + UHCRHPS3 = 0x8; ++#endif + mdelay(40); ++#ifdef CONFIG_PXA_EZX + bvd_dbg("ipcusb_softint_send_readurb: Send RESUME signal! " + "UHCRHPS3=0x%x", UHCRHPS3); + } ++#endif + if (bvd_ipc->ipc_flag == IPC_USB_PROBE_READY) { + //get_halted_bit(); + +@@ -734,7 +748,9 @@ static void usb_ipc_disconnect(struct us + printk("usb_ipc_disconnect. bvd_ipc_disconnect address: %p\n", bvd_ipc_disconnect); + + //FIXME: Memory leak? ++#ifdef CONFIG_PXA_EZX + if ((UHCRHPS3 & 0x4) == 0) ++#endif + // usb_unlink_urb(&bvd_ipc_disconnect->readurb_mux); + + //usb_unlink_urb(&bvd_ipc_disconnect->writeurb_mux); diff --git a/packages/linux/linux-ezx-2.6.20.7/mux-linux-2.6.20.7-fix.patch b/packages/linux/linux-ezx-2.6.20.7/mux-linux-2.6.20.7-fix.patch new file mode 100644 index 0000000000..bc6e3972b6 --- /dev/null +++ b/packages/linux/linux-ezx-2.6.20.7/mux-linux-2.6.20.7-fix.patch @@ -0,0 +1,96 @@ +diff -pruN linux-2.6.20.7/drivers/char/ts0710.h linux-2.6.20.7_x386/drivers/char/ts0710.h +--- linux-2.6.20.7/drivers/char/ts0710.h 2007-04-22 10:51:23.000000000 +0200 ++++ linux-2.6.20.7_x386/drivers/char/ts0710.h 2007-04-22 11:16:37.000000000 +0200 +@@ -45,7 +45,7 @@ + * 11/18/2002 Modified + */ + +-#include <linux/config.h> ++//#include <linux/config.h> + #include <linux/module.h> + + #include <linux/errno.h> +@@ -58,7 +58,7 @@ + #include <linux/major.h> + #include <linux/mm.h> + #include <linux/init.h> +-#include <linux/devfs_fs_kernel.h> ++//#include <linux/devfs_fs_kernel.h> + + #include <asm/uaccess.h> + #include <asm/system.h> +diff -pruN linux-2.6.20.7/drivers/char/ts0710_mux.c linux-2.6.20.7_x386/drivers/char/ts0710_mux.c +--- linux-2.6.20.7/drivers/char/ts0710_mux.c 2007-04-22 10:53:05.000000000 +0200 ++++ linux-2.6.20.7_x386/drivers/char/ts0710_mux.c 2007-04-22 11:20:07.000000000 +0200 +@@ -46,7 +46,7 @@ + * 11/18/2002 Second version + * 04/21/2004 Add GPRS PROC + */ +-#include <linux/config.h> ++//#include <linux/config.h> + #include <linux/module.h> + #include <linux/types.h> + +@@ -70,7 +70,7 @@ + #include <linux/mm.h> + #include <linux/slab.h> + #include <linux/init.h> +-#include <linux/devfs_fs_kernel.h> ++//#include <linux/devfs_fs_kernel.h> + //#include <syslog.h> + + #include <asm/uaccess.h> +@@ -1894,11 +1894,14 @@ int ts0710_recv_data(ts0710_con * ts0710 + if (test_bit(TTY_THROTTLED, &tty->flags)) { + queue_data = 1; + } else { ++ /* + if (test_bit + (TTY_DONT_FLIP, &tty->flags)) { + queue_data = 1; + post_recv = 1; +- } else if (recv_info->total) { ++ } else ++ */ ++ if (recv_info->total) { + queue_data = 1; + post_recv = 1; + } else if (recv_room < uih_len) { +@@ -3499,11 +3502,14 @@ static void post_recv_worker(void *priva + if (test_bit(TTY_THROTTLED, &tty->flags)) { + add_post_recv_queue(&post_recv_q, recv_info); + continue; +- } else if (test_bit(TTY_DONT_FLIP, &tty->flags)) { ++ } ++ /* ++ else if (test_bit(TTY_DONT_FLIP, &tty->flags)) { + post_recv = 1; + add_post_recv_queue(&post_recv_q, recv_info); + continue; + } ++ */ + + flow_control = 0; + recv_packet2 = recv_info->mux_packet; +@@ -3893,9 +3899,9 @@ static int __init mux_init(void) + } + post_recv_count_flag = 0; + +- INIT_WORK(&send_tqueue, send_worker, NULL); +- INIT_WORK(&receive_tqueue, receive_worker, NULL); +- INIT_WORK(&post_recv_tqueue, post_recv_worker, NULL); ++ INIT_WORK(&send_tqueue, send_worker); ++ INIT_WORK(&receive_tqueue, receive_worker); ++ INIT_WORK(&post_recv_tqueue, post_recv_worker); + + mux_driver = alloc_tty_driver(NR_MUXS); + if (!mux_driver) +@@ -3904,7 +3910,7 @@ static int __init mux_init(void) + mux_driver->owner = THIS_MODULE; + mux_driver->driver_name = "ts0710mux"; + mux_driver->name = "mux"; +- mux_driver->devfs_name = "mux"; ++ //mux_driver->devfs_name = "mux"; + mux_driver->major = TS0710MUX_MAJOR; + mux_driver->minor_start = TS0710MUX_MINOR_START; + mux_driver->type = TTY_DRIVER_TYPE_SERIAL; diff --git a/packages/linux/linux-ezx-2.6.20.7/mux-remove-flipbuffers.patch b/packages/linux/linux-ezx-2.6.20.7/mux-remove-flipbuffers.patch new file mode 100644 index 0000000000..d4781f9fc7 --- /dev/null +++ b/packages/linux/linux-ezx-2.6.20.7/mux-remove-flipbuffers.patch @@ -0,0 +1,269 @@ +Index: linux-2.6.16/drivers/char/ts0710_mux_usb.c +=================================================================== +--- linux-2.6.16.orig/drivers/char/ts0710_mux_usb.c 2007-01-17 00:52:25.000000000 +0100 ++++ linux-2.6.16/drivers/char/ts0710_mux_usb.c 2007-01-17 00:52:26.000000000 +0100 +@@ -133,6 +133,7 @@ + + struct circ_buf xmit; /* write cric bufffer */ + struct list_head in_buf_list; ++ spinlock_t in_buf_lock; + char bulk_in_ep_mux, + bulk_out_ep_mux, + bulk_in_ep_dsplog; +@@ -204,9 +205,39 @@ + return; + } + memcpy(inbuf->body, (unsigned char*)urb->transfer_buffer, count); ++ spin_lock(&bvd_ipc->in_buf_lock); + list_add_tail(&inbuf->list, &bvd_ipc->in_buf_list); ++ spin_unlock(&bvd_ipc->in_buf_lock); + } + ++int get_from_inbuf_list(const unsigned char *buf, int dst_count) ++{ ++ int ret = 0; ++ spin_lock(&bvd_ipc->in_buf_lock); ++ if (!(list_empty(&bvd_ipc->in_buf_list))) { ++ int src_count; ++ buf_list_t *inbuf; ++ struct list_head *ptr; ++ ++ ptr = bvd_ipc->in_buf_list.next; ++ inbuf = list_entry(ptr, buf_list_t, list); ++ src_count = inbuf->size; ++ if (dst_count >= src_count) { ++ memcpy(buf, inbuf->body, src_count); ++ ret = src_count; ++ list_del(ptr); ++ kfree(inbuf->body); ++ kfree(inbuf); ++ } else { ++ bvd_dbg("get_from_inbuf_list: not enough space in destination buffer"); ++ } ++ } ++ spin_unlock(&bvd_ipc->in_buf_lock); ++ ++ return ret; ++} ++EXPORT_SYMBOL(get_from_inbuf_list); ++ + static void ipcusb_timeout(unsigned long data) + { + struct tty_struct *tty = &ipcusb_tty; +@@ -214,13 +245,14 @@ + + bvd_dbg("ipcusb_timeout***"); + ++ spin_lock(&bvd_ipc->in_buf_lock); + while (!(list_empty(&bvd_ipc->in_buf_list))) { + int count; + buf_list_t *inbuf; + struct list_head *ptr = NULL; + + ptr = bvd_ipc->in_buf_list.next; +- inbuf = list_entry (ptr, buf_list_t, list); ++ inbuf = list_entry(ptr, buf_list_t, list); + count = inbuf->size; + if (tty_insert_flip_string(tty, inbuf->body, count) >= count) { + list_del(ptr); +@@ -232,10 +264,12 @@ + break; + } + } ++ spin_unlock(&bvd_ipc->in_buf_lock); + + if (usb_mux_dispatcher) + usb_mux_dispatcher(tty); /**call Liu changhui's func.**/ + ++ spin_lock(&bvd_ipc->in_buf_lock); + if (list_empty(&bvd_ipc->in_buf_list)) { + urb->actual_length = 0; + urb->dev = bvd_ipc->ipc_dev; +@@ -246,6 +280,7 @@ + ipcusb_timer.data = (unsigned long)urb; + mod_timer(&ipcusb_timer, jiffies+(10*HZ/1000)); + } ++ spin_unlock(&bvd_ipc->in_buf_lock); + } + + static void usb_ipc_read_bulk(struct urb *urb, struct pt_regs *regs) +@@ -266,69 +301,11 @@ + if (count > 0 && ((*ipcusb_bp_to_ap) != NULL)) + (*ipcusb_bp_to_ap)(urb->transfer_buffer, urb->actual_length); + +- if (!(list_empty(&bvd_ipc->in_buf_list))) { +- int need_mux = 0; +- +- bvd_dbg("usb_ipc_read_bulk: some urbs in_buf_list"); +- if (count > 0) { +- bvd_ipc->suspend_flag = 1; +- append_to_inbuf_list(urb); /* append the current received urb */ +-#if 0 +- if(jiffies - last_jiff > ICL_EVENT_INTERVAL) +- { +- last_jiff = jiffies; +- queue_apm_event(KRNL_ICL, NULL); +- } +-#endif +- } +- +- while (!(list_empty(&bvd_ipc->in_buf_list))) { +- struct list_head* ptr = NULL; +- ptr = bvd_ipc->in_buf_list.next; +- inbuf = list_entry(ptr, buf_list_t, list); +- count = inbuf->size; +- need_mux = 1; +- +- tty_insert_flip_string(tty, inbuf->body, count); +- +- list_del(ptr); +- kfree(inbuf->body); +- inbuf->body = NULL; +- kfree(inbuf); +- } +- +- if (usb_mux_dispatcher && need_mux) +- usb_mux_dispatcher(tty); /* call Liu changhui's func. */ +- +- if (list_empty(&bvd_ipc->in_buf_list)) { +- urb->actual_length = 0; +- urb->dev = bvd_ipc->ipc_dev; +- if (usb_submit_urb(urb, GFP_ATOMIC)) +- bvd_dbg("usb_ipc_read_bulk: " +- "failed resubmitting read urb"); +- bvd_dbg("usb_ipc_read_bulk: resubmited read urb"); +- } else { +- ipcusb_timer.data = (unsigned long)urb; +- mod_timer(&ipcusb_timer, jiffies+(10*HZ/1000)); +- } +- } else if (count > 0) { +- bvd_dbg("usb_ipc_read_bulk: no urbs in_buf_list"); ++ if (count > 0) { ++ bvd_dbg("usb_ipc_read_bulk: inserting buffer into in_buf_list"); + bvd_ipc->suspend_flag = 1; + +- if (tty_insert_flip_string(tty, urb->transfer_buffer, +- count) < count) { +- bvd_ipc->suspend_flag = 1; +- append_to_inbuf_list(urb); +- ipcusb_timer.data = (unsigned long)urb; +- mod_timer(&ipcusb_timer, jiffies+(10*HZ/1000)); +-#if 0 +- if(jiffies - last_jiff > ICL_EVENT_INTERVAL) +- { +- last_jiff = jiffies; +- queue_apm_event(KRNL_ICL, NULL); +- } +-#endif +- } ++ append_to_inbuf_list(urb); + + if (usb_mux_dispatcher) + usb_mux_dispatcher(tty); /* call Liu changhui's func. */ +@@ -337,13 +314,6 @@ + urb->dev = bvd_ipc->ipc_dev; + if (usb_submit_urb(urb, GFP_ATOMIC)) + bvd_dbg("failed resubmitting read urb"); +-#if 0 +- if(jiffies - last_jiff > ICL_EVENT_INTERVAL) +- { +- last_jiff = jiffies; +- queue_apm_event(KRNL_ICL, NULL); +- } +-#endif + bvd_dbg("usb_ipc_read_bulk: resubmited read urb"); + } + +@@ -705,7 +675,8 @@ + bvd_ipc->bulk_out_ep_mux= have_bulk_out_mux; + bvd_ipc->ipc_dev = usbdev; + bvd_ipc->writesize = writesize; +- INIT_LIST_HEAD (&bvd_ipc->in_buf_list); ++ INIT_LIST_HEAD(&bvd_ipc->in_buf_list); ++ bvd_ipc->in_buf_lock = SPIN_LOCK_UNLOCKED; + + bvd_ipc->bh.func = usbipc_bh_func; + bvd_ipc->bh.data = (unsigned long) bvd_ipc; +Index: linux-2.6.16/drivers/char/ts0710_mux.c +=================================================================== +--- linux-2.6.16.orig/drivers/char/ts0710_mux.c 2007-01-17 00:52:23.000000000 +0100 ++++ linux-2.6.16/drivers/char/ts0710_mux.c 2007-01-17 00:52:26.000000000 +0100 +@@ -3149,7 +3149,7 @@ + static void receive_worker(void *private_) + { + struct tty_struct *tty = COMM_FOR_MUX_TTY; +- int i, count; ++ int i, count, tbuf_free, tbuf_read; + static unsigned char tbuf[TS0710MUX_MAX_BUF_SIZE]; + static unsigned char *tbuf_ptr = &tbuf[0]; + static unsigned char *start_flag = 0; +@@ -3167,29 +3167,39 @@ + + UNUSED_PARAM(private_); + +- if (!tty) +- return; ++ if (!tty) ++ return; ++ ++ while (1) { ++ tbuf_free = TS0710MUX_MAX_BUF_SIZE - (tbuf_ptr - tbuf); ++ TS0710_PRINTK("Reading max %i bytes from ts0710_mux_usb inbuf.\n", tbuf_free); ++ tbuf_read = get_from_inbuf_list(tbuf_ptr, tbuf_free); ++ if (tbuf_read == 0) { ++ break; ++ } else { ++ TS0710_PRINTK("Read %i bytes.\n", tbuf_read); ++ }; ++ tbuf_ptr += tbuf_read; ++ }; ++ ++ count = (tbuf_ptr - tbuf); ++ ++ // Should be impossible? ++ //if (count > (TS0710MUX_MAX_BUF_SIZE - (tbuf_ptr - tbuf))) { ++ // TS0710_PRINTK ++ // ("MUX receive_worker: !!!!! Exceed buffer boundary !!!!!\n"); ++ // count = (TS0710MUX_MAX_BUF_SIZE - (tbuf_ptr - tbuf)); ++ //} + + #ifdef USB_FOR_MUX +- TS0710_DEBUG("Receive following bytes from IPC-USB"); ++ TS0710_DEBUG("Received following bytes from IPC-USB"); + #else +- TS0710_DEBUG("Receive following bytes from UART"); ++ TS0710_DEBUG("Received following bytes from UART"); + #endif +- +- TS0710_DEBUGHEX(cp, count); +- +- if (count > (TS0710MUX_MAX_BUF_SIZE - (tbuf_ptr - tbuf))) { +- TS0710_PRINTK +- ("MUX receive_worker: !!!!! Exceed buffer boundary !!!!!\n"); +- count = (TS0710MUX_MAX_BUF_SIZE - (tbuf_ptr - tbuf)); +- } +- +- count = tty_buffer_request_room(tty, count); +- +- for (i = 0; i < count; i++) +- tty_insert_flip_char(tty, tbuf_ptr[i], TTY_NORMAL); +- +- tbuf_ptr += count; ++ TS0710_DEBUGHEX(tbuf, count); ++ ++ //gets updated above ++ //tbuf_ptr += count; + search = &tbuf[0]; + + if (test_and_set_bit(RECV_RUNNING, &mux_recv_flags)) { +Index: linux-2.6.16/drivers/char/ts0710_mux_usb.h +=================================================================== +--- linux-2.6.16.orig/drivers/char/ts0710_mux_usb.h 2007-01-17 00:52:23.000000000 +0100 ++++ linux-2.6.16/drivers/char/ts0710_mux_usb.h 2007-01-17 00:52:26.000000000 +0100 +@@ -27,3 +27,6 @@ + extern struct tty_struct *usb_for_mux_tty; + extern void (*usb_mux_dispatcher)(struct tty_struct *tty); + extern void (*usb_mux_sender)(void); ++ ++extern int get_from_inbuf_list(const unsigned char *buf, int dst_count); ++ diff --git a/packages/linux/linux-ezx-2.6.20.7/mux-remove-get_halted_bit.patch b/packages/linux/linux-ezx-2.6.20.7/mux-remove-get_halted_bit.patch new file mode 100644 index 0000000000..0ebe27d03b --- /dev/null +++ b/packages/linux/linux-ezx-2.6.20.7/mux-remove-get_halted_bit.patch @@ -0,0 +1,22 @@ +Index: linux-2.6.16/drivers/char/ts0710_mux_usb.c +=================================================================== +--- linux-2.6.16.orig/drivers/char/ts0710_mux_usb.c 2007-01-17 01:06:21.000000000 +0100 ++++ linux-2.6.16/drivers/char/ts0710_mux_usb.c 2007-01-17 01:06:31.000000000 +0100 +@@ -461,7 +461,7 @@ + ipcusb_xmit_data(); + } + +-extern void get_halted_bit(void); ++//extern void get_halted_bit(void); + + static void usbipc_bh_bp_func(unsigned long param) + { +@@ -472,7 +472,7 @@ + "UHCRHPS3=0x%x", UHCRHPS3); + } + if (bvd_ipc->ipc_flag == IPC_USB_PROBE_READY) { +- get_halted_bit(); ++ //get_halted_bit(); + + /*send a IN token*/ + bvd_ipc->readurb_mux.dev = bvd_ipc->ipc_dev; diff --git a/packages/linux/linux-ezx-2.6.20.7/mux-remove-usbh_finished_resume.patch b/packages/linux/linux-ezx-2.6.20.7/mux-remove-usbh_finished_resume.patch new file mode 100644 index 0000000000..c415ded428 --- /dev/null +++ b/packages/linux/linux-ezx-2.6.20.7/mux-remove-usbh_finished_resume.patch @@ -0,0 +1,22 @@ +Index: linux-2.6.16/drivers/char/ts0710_mux_usb.c +=================================================================== +--- linux-2.6.16.orig/drivers/char/ts0710_mux_usb.c 2007-01-17 01:12:23.000000000 +0100 ++++ linux-2.6.16/drivers/char/ts0710_mux_usb.c 2007-01-17 01:12:37.000000000 +0100 +@@ -97,7 +97,6 @@ + static int sumbit_times = 0; + static int callback_times = 0; + //static unsigned long last_jiff = 0; +-extern int usbh_finished_resume; + /*end global values defined*/ + + MODULE_AUTHOR(DRIVER_AUTHOR); +@@ -546,9 +545,6 @@ + void usb_send_readurb(void) + { + //printk("usb_send_readurb: begining!UHCRHPS3=0x%x, usbh_finished_resume=%d\n", UHCRHPS3, usbh_finished_resume); +- +- if (usbh_finished_resume == 0) +- return; + + tasklet_schedule(&bvd_ipc->bh_bp); + } diff --git a/packages/linux/linux-ezx-2.6.20.7/mux_cli.patch b/packages/linux/linux-ezx-2.6.20.7/mux_cli.patch new file mode 100644 index 0000000000..c86e3b40e4 --- /dev/null +++ b/packages/linux/linux-ezx-2.6.20.7/mux_cli.patch @@ -0,0 +1,5395 @@ +Index: linux-2.6.20.7/drivers/char/Kconfig +=================================================================== +--- linux-2.6.20.7.orig/drivers/char/Kconfig 2007-04-13 22:48:14.000000000 +0200 ++++ linux-2.6.20.7/drivers/char/Kconfig 2007-04-21 18:04:56.000000000 +0200 +@@ -1030,5 +1030,17 @@ + sysfs directory, /sys/devices/platform/telco_clock, with a number of + files for controlling the behavior of this hardware. + ++config TS0710_MUX ++ tristate "GSM TS 07.10 Multiplex driver" ++ help ++ This implements the GSM 07.10 multiplex. ++ ++config TS0710_MUX_USB ++ tristate "Motorola USB support for TS 07.10 Multiplex driver" ++ depends on TS0710_MUX ++ help ++ This ads support for TS 07.10 over USB, as found in motorola ++ Smartphones. ++ + endmenu + +Index: linux-2.6.20.7/drivers/char/Makefile +=================================================================== +--- linux-2.6.20.7.orig/drivers/char/Makefile 2007-04-13 22:48:14.000000000 +0200 ++++ linux-2.6.20.7/drivers/char/Makefile 2007-04-21 18:06:42.000000000 +0200 +@@ -101,6 +101,9 @@ + obj-$(CONFIG_HANGCHECK_TIMER) += hangcheck-timer.o + obj-$(CONFIG_TCG_TPM) += tpm/ + ++obj-$(CONFIG_TS0710_MUX) += ts0710_mux.o ts0710_mux_usb.o ++ ++ + # Files generated that shall be removed upon make clean + clean-files := consolemap_deftbl.c defkeymap.c + +Index: linux-2.6.20.7/drivers/char/ts0710.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-2.6.20.7/drivers/char/ts0710.h 2007-04-21 18:04:56.000000000 +0200 +@@ -0,0 +1,368 @@ ++/* ++ * File: ts0710.h ++ * ++ * Portions derived from rfcomm.c, original header as follows: ++ * ++ * Copyright (C) 2000, 2001 Axis Communications AB ++ * ++ * Author: Mats Friden <mats.friden@axis.com> ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License ++ * as published by the Free Software Foundation; either version 2 ++ * of the License, or (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. ++ * ++ * Exceptionally, Axis Communications AB grants discretionary and ++ * conditional permissions for additional use of the text contained ++ * in the company's release of the AXIS OpenBT Stack under the ++ * provisions set forth hereunder. ++ * ++ * Provided that, if you use the AXIS OpenBT Stack with other files, ++ * that do not implement functionality as specified in the Bluetooth ++ * System specification, to produce an executable, this does not by ++ * itself cause the resulting executable to be covered by the GNU ++ * General Public License. Your use of that executable is in no way ++ * restricted on account of using the AXIS OpenBT Stack code with it. ++ * ++ * This exception does not however invalidate any other reasons why ++ * the executable file might be covered by the provisions of the GNU ++ * General Public License. ++ * ++ */ ++/* ++ * Copyright (C) 2002 Motorola ++ * ++ * 07/28/2002 Initial version based on rfcomm.c ++ * 11/18/2002 Modified ++ */ ++ ++#include <linux/config.h> ++#include <linux/module.h> ++ ++#include <linux/errno.h> ++#include <linux/sched.h> ++#include <linux/interrupt.h> ++#include <linux/tty.h> ++#include <linux/tty_flip.h> ++#include <linux/fcntl.h> ++#include <linux/string.h> ++#include <linux/major.h> ++#include <linux/mm.h> ++#include <linux/init.h> ++#include <linux/devfs_fs_kernel.h> ++ ++#include <asm/uaccess.h> ++#include <asm/system.h> ++#include <asm/bitops.h> ++ ++#include <asm/byteorder.h> ++#include <asm/types.h> ++ ++#define TS0710_MAX_CHN 14 ++ ++#define SET_PF(ctr) ((ctr) | (1 << 4)) ++#define CLR_PF(ctr) ((ctr) & 0xef) ++#define GET_PF(ctr) (((ctr) >> 4) & 0x1) ++ ++#define GET_PN_MSG_FRAME_SIZE(pn) ( ((pn)->frame_sizeh << 8) | ((pn)->frame_sizel)) ++#define SET_PN_MSG_FRAME_SIZE(pn, size) ({ (pn)->frame_sizel = (size) & 0xff; \ ++ (pn)->frame_sizeh = (size) >> 8; }) ++ ++#define GET_LONG_LENGTH(a) ( ((a).h_len << 7) | ((a).l_len) ) ++#define SET_LONG_LENGTH(a, length) ({ (a).ea = 0; \ ++ (a).l_len = length & 0x7F; \ ++ (a).h_len = (length >> 7) & 0xFF; }) ++ ++#define SHORT_CRC_CHECK 3 ++#define LONG_CRC_CHECK 4 ++ ++/* FIXME: Should thsi one be define here? */ ++#define SHORT_PAYLOAD_SIZE 127 ++ ++#define EA 1 ++#define FCS_SIZE 1 ++#define FLAG_SIZE 2 ++ ++#define TS0710_MAX_HDR_SIZE 5 ++#define DEF_TS0710_MTU 256 ++ ++#define TS0710_BASIC_FLAG 0xF9 ++/* the control field */ ++#define SABM 0x2f ++#define SABM_SIZE 4 ++#define UA 0x63 ++#define UA_SIZE 4 ++#define DM 0x0f ++#define DISC 0x43 ++#define UIH 0xef ++ ++/* the type field in a multiplexer command packet */ ++#define TEST 0x8 ++#define FCON 0x28 ++#define FCOFF 0x18 ++#define MSC 0x38 ++#define RPN 0x24 ++#define RLS 0x14 ++#define PN 0x20 ++#define NSC 0x4 ++ ++/* V.24 modem control signals */ ++#define FC 0x2 ++#define RTC 0x4 ++#define RTR 0x8 ++#define IC 0x40 ++#define DV 0x80 ++ ++#define CTRL_CHAN 0 /* The control channel is defined as DLCI 0 */ ++#define MCC_CMD 1 /* Multiplexer command cr */ ++#define MCC_RSP 0 /* Multiplexer response cr */ ++ ++#ifdef __LITTLE_ENDIAN_BITFIELD ++ ++typedef struct { ++ __u8 ea:1; ++ __u8 cr:1; ++ __u8 d:1; ++ __u8 server_chn:5; ++} __attribute__ ((packed)) address_field; ++ ++typedef struct { ++ __u8 ea:1; ++ __u8 len:7; ++} __attribute__ ((packed)) short_length; ++ ++typedef struct { ++ __u8 ea:1; ++ __u8 l_len:7; ++ __u8 h_len; ++} __attribute__ ((packed)) long_length; ++ ++typedef struct { ++ address_field addr; ++ __u8 control; ++ short_length length; ++} __attribute__ ((packed)) short_frame_head; ++ ++typedef struct { ++ short_frame_head h; ++ __u8 data[0]; ++} __attribute__ ((packed)) short_frame; ++ ++typedef struct { ++ address_field addr; ++ __u8 control; ++ long_length length; ++ __u8 data[0]; ++} __attribute__ ((packed)) long_frame_head; ++ ++typedef struct { ++ long_frame_head h; ++ __u8 data[0]; ++} __attribute__ ((packed)) long_frame; ++ ++/* Typedefinitions for structures used for the multiplexer commands */ ++typedef struct { ++ __u8 ea:1; ++ __u8 cr:1; ++ __u8 type:6; ++} __attribute__ ((packed)) mcc_type; ++ ++typedef struct { ++ mcc_type type; ++ short_length length; ++ __u8 value[0]; ++} __attribute__ ((packed)) mcc_short_frame_head; ++ ++typedef struct { ++ mcc_short_frame_head h; ++ __u8 value[0]; ++} __attribute__ ((packed)) mcc_short_frame; ++ ++typedef struct { ++ mcc_type type; ++ long_length length; ++ __u8 value[0]; ++} __attribute__ ((packed)) mcc_long_frame_head; ++ ++typedef struct { ++ mcc_long_frame_head h; ++ __u8 value[0]; ++} __attribute__ ((packed)) mcc_long_frame; ++ ++/* MSC-command */ ++typedef struct { ++ __u8 ea:1; ++ __u8 fc:1; ++ __u8 rtc:1; ++ __u8 rtr:1; ++ __u8 reserved:2; ++ __u8 ic:1; ++ __u8 dv:1; ++} __attribute__ ((packed)) v24_sigs; ++ ++typedef struct { ++ __u8 ea:1; ++ __u8 b1:1; ++ __u8 b2:1; ++ __u8 b3:1; ++ __u8 len:4; ++} __attribute__ ((packed)) brk_sigs; ++ ++typedef struct { ++ short_frame_head s_head; ++ mcc_short_frame_head mcc_s_head; ++ address_field dlci; ++ __u8 v24_sigs; ++ //brk_sigs break_signals; ++ __u8 fcs; ++} __attribute__ ((packed)) msc_msg; ++ ++#if 0 ++/* conflict with termios.h */ ++/* RPN command */ ++#define B2400 0 ++#define B4800 1 ++#define B7200 2 ++#define B9600 3 ++#define B19200 4 ++#define B38400 5 ++#define B57600 6 ++#define B115200 7 ++#define D230400 8 ++#endif ++ ++/* ++typedef struct{ ++ __u8 bit_rate:1; ++ __u8 data_bits:1; ++ __u8 stop_bit:1; ++ __u8 parity:1; ++ __u8 parity_type:1; ++ __u8 xon_u8:1; ++ __u8 xoff_u8:1; ++ __u8 res1:1; ++ __u8 xon_input:1; ++ __u8 xon_output:1; ++ __u8 rtr_input:1; ++ __u8 rtr_output:1; ++ __u8 rtc_input:1; ++ __u8 rtc_output:1; ++ __u8 res2:2; ++} __attribute__((packed)) parameter_mask; ++ ++typedef struct{ ++ __u8 bit_rate; ++ __u8 data_bits:2; ++ __u8 stop_bit:1; ++ __u8 parity:1; ++ __u8 parity_type:2; ++ __u8 res1:2; ++ __u8 xon_input:1; ++ __u8 xon_output:1; ++ __u8 rtr_input:1; ++ __u8 rtr_output:1; ++ __u8 rtc_input:1; ++ __u8 rtc_output:1; ++ __u8 res2:2; ++ __u8 xon_u8; ++ __u8 xoff_u8; ++ parameter_mask pm; ++} __attribute__((packed)) rpn_values; ++ ++typedef struct{ ++ short_frame_head s_head; ++ mcc_short_frame_head mcc_s_head; ++ address_field dlci; ++ rpn_values rpn_val; ++ __u8 fcs; ++} __attribute__((packed)) rpn_msg; ++*/ ++ ++/* RLS-command */ ++/* ++typedef struct{ ++ short_frame_head s_head; ++ mcc_short_frame_head mcc_s_head; ++ address_field dlci; ++ __u8 error:4; ++ __u8 res:4; ++ __u8 fcs; ++} __attribute__((packed)) rls_msg; ++*/ ++ ++/* PN-command */ ++typedef struct { ++ short_frame_head s_head; ++ mcc_short_frame_head mcc_s_head; ++ __u8 dlci:6; ++ __u8 res1:2; ++ __u8 frame_type:4; ++ __u8 credit_flow:4; ++ __u8 prior:6; ++ __u8 res2:2; ++ __u8 ack_timer; ++ __u8 frame_sizel; ++ __u8 frame_sizeh; ++ __u8 max_nbrof_retrans; ++ __u8 credits; ++ __u8 fcs; ++} __attribute__ ((packed)) pn_msg; ++ ++/* NSC-command */ ++typedef struct { ++ short_frame_head s_head; ++ mcc_short_frame_head mcc_s_head; ++ mcc_type command_type; ++ __u8 fcs; ++} __attribute__ ((packed)) nsc_msg; ++ ++#else ++#error Only littel-endianess supported now! ++#endif ++ ++enum { ++ REJECTED = 0, ++ DISCONNECTED, ++ CONNECTING, ++ NEGOTIATING, ++ CONNECTED, ++ DISCONNECTING, ++ FLOW_STOPPED ++}; ++ ++enum ts0710_events { ++ CONNECT_IND, ++ CONNECT_CFM, ++ DISCONN_CFM ++}; ++ ++typedef struct { ++ volatile __u8 state; ++ volatile __u8 flow_control; ++ volatile __u8 initiated; ++ volatile __u8 initiator; ++ volatile __u16 mtu; ++ wait_queue_head_t open_wait; ++ wait_queue_head_t close_wait; ++} dlci_struct; ++ ++/* user space interfaces */ ++typedef struct { ++ volatile __u8 initiator; ++ volatile __u8 c_dlci; ++ volatile __u16 mtu; ++ volatile __u8 be_testing; ++ volatile __u32 test_errs; ++ wait_queue_head_t test_wait; ++ ++ dlci_struct dlci[TS0710_MAX_CHN]; ++} ts0710_con; +Index: linux-2.6.20.7/drivers/char/ts0710_mux.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-2.6.20.7/drivers/char/ts0710_mux.c 2007-04-21 18:08:02.000000000 +0200 +@@ -0,0 +1,3966 @@ ++/* ++ * File: mux_driver.c ++ * ++ * Portions derived from rfcomm.c, original header as follows: ++ * ++ * Copyright (C) 2000, 2001 Axis Communications AB ++ * ++ * Author: Mats Friden <mats.friden@axis.com> ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License ++ * as published by the Free Software Foundation; either version 2 ++ * of the License, or (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. ++ * ++ * Exceptionally, Axis Communications AB grants discretionary and ++ * conditional permissions for additional use of the text contained ++ * in the company's release of the AXIS OpenBT Stack under the ++ * provisions set forth hereunder. ++ * ++ * Provided that, if you use the AXIS OpenBT Stack with other files, ++ * that do not implement functionality as specified in the Bluetooth ++ * System specification, to produce an executable, this does not by ++ * itself cause the resulting executable to be covered by the GNU ++ * General Public License. Your use of that executable is in no way ++ * restricted on account of using the AXIS OpenBT Stack code with it. ++ * ++ * This exception does not however invalidate any other reasons why ++ * the executable file might be covered by the provisions of the GNU ++ * General Public License. ++ * ++ */ ++/* ++ * Copyright (C) 2002-2004 Motorola ++ * Copyright (C) 2006 Harald Welte <laforge@openezx.org> ++ * ++ * 07/28/2002 Initial version ++ * 11/18/2002 Second version ++ * 04/21/2004 Add GPRS PROC ++ */ ++#include <linux/config.h> ++#include <linux/module.h> ++#include <linux/types.h> ++ ++#include <linux/kernel.h> ++#include <linux/proc_fs.h> ++ ++#define USB_FOR_MUX ++ ++#ifndef USB_FOR_MUX ++#include <linux/serial.h> ++#endif ++ ++#include <linux/errno.h> ++#include <linux/sched.h> ++#include <linux/interrupt.h> ++#include <linux/tty.h> ++#include <linux/tty_flip.h> ++#include <linux/fcntl.h> ++#include <linux/string.h> ++#include <linux/major.h> ++#include <linux/mm.h> ++#include <linux/slab.h> ++#include <linux/init.h> ++#include <linux/devfs_fs_kernel.h> ++//#include <syslog.h> ++ ++#include <asm/uaccess.h> ++#include <asm/system.h> ++#include <asm/bitops.h> ++ ++#ifdef USB_FOR_MUX ++//#include <linux/usb.h> ++#include "ts0710_mux_usb.h" ++#endif ++ ++#include "ts0710.h" ++#include "ts0710_mux.h" ++ ++#define TS0710MUX_GPRS_SESSION_MAX 2 ++#define TS0710MUX_MAJOR 250 ++#define TS0710MUX_MINOR_START 0 ++#define NR_MUXS 16 ++ ++ /*#define TS0710MUX_TIME_OUT 30 *//* 300ms */ ++#define TS0710MUX_TIME_OUT 250 /* 2500ms, for BP UART hardware flow control AP UART */ ++ ++#define TS0710MUX_IO_DLCI_FC_ON 0x54F2 ++#define TS0710MUX_IO_DLCI_FC_OFF 0x54F3 ++#define TS0710MUX_IO_FC_ON 0x54F4 ++#define TS0710MUX_IO_FC_OFF 0x54F5 ++ ++#define TS0710MUX_MAX_BUF_SIZE 2048 ++ ++#define TS0710MUX_SEND_BUF_OFFSET 10 ++#define TS0710MUX_SEND_BUF_SIZE (DEF_TS0710_MTU + TS0710MUX_SEND_BUF_OFFSET + 34) ++#define TS0710MUX_RECV_BUF_SIZE TS0710MUX_SEND_BUF_SIZE ++ ++/*For BP UART problem Begin*/ ++#ifdef TS0710SEQ2 ++#define ACK_SPACE 66 /* 6 * 11(ACK frame size) */ ++#else ++#define ACK_SPACE 42 /* 6 * 7(ACK frame size) */ ++#endif ++/*For BP UART problem End*/ ++ ++ /*#define TS0710MUX_SERIAL_BUF_SIZE (DEF_TS0710_MTU + TS0710_MAX_HDR_SIZE)*//* For BP UART problem */ ++#define TS0710MUX_SERIAL_BUF_SIZE (DEF_TS0710_MTU + TS0710_MAX_HDR_SIZE + ACK_SPACE) /* For BP UART problem: ACK_SPACE */ ++ ++#define TS0710MUX_MAX_TOTAL_FRAME_SIZE (DEF_TS0710_MTU + TS0710_MAX_HDR_SIZE + FLAG_SIZE) ++#define TS0710MUX_MAX_CHARS_IN_BUF 65535 ++#define TS0710MUX_THROTTLE_THRESHOLD DEF_TS0710_MTU ++ ++#define TEST_PATTERN_SIZE 250 ++ ++#define CMDTAG 0x55 ++#define DATATAG 0xAA ++ ++#define ACK 0x4F /*For BP UART problem */ ++ ++/*For BP UART problem Begin*/ ++#ifdef TS0710SEQ2 ++#define FIRST_BP_SEQ_OFFSET 1 /*offset from start flag */ ++#define SECOND_BP_SEQ_OFFSET 2 /*offset from start flag */ ++#define FIRST_AP_SEQ_OFFSET 3 /*offset from start flag */ ++#define SECOND_AP_SEQ_OFFSET 4 /*offset from start flag */ ++#define SLIDE_BP_SEQ_OFFSET 5 /*offset from start flag */ ++#define SEQ_FIELD_SIZE 5 ++#else ++#define SLIDE_BP_SEQ_OFFSET 1 /*offset from start flag */ ++#define SEQ_FIELD_SIZE 1 ++#endif ++ ++#define ADDRESS_FIELD_OFFSET (1 + SEQ_FIELD_SIZE) /*offset from start flag */ ++/*For BP UART problem End*/ ++ ++#ifndef UNUSED_PARAM ++#define UNUSED_PARAM(v) (void)(v) ++#endif ++ ++#define TS0710MUX_GPRS1_DLCI 7 ++#define TS0710MUX_GPRS2_DLCI 8 ++ ++#define TS0710MUX_GPRS1_RECV_COUNT_IDX 0 ++#define TS0710MUX_GPRS1_SEND_COUNT_IDX 1 ++#define TS0710MUX_GPRS2_RECV_COUNT_IDX 2 ++#define TS0710MUX_GPRS2_SEND_COUNT_IDX 3 ++#define TS0710MUX_COUNT_MAX_IDX 3 ++#define TS0710MUX_COUNT_IDX_NUM (TS0710MUX_COUNT_MAX_IDX + 1) ++ ++static volatile int mux_data_count[TS0710MUX_COUNT_IDX_NUM] = { 0, 0, 0, 0 }; ++static volatile int mux_data_count2[TS0710MUX_COUNT_IDX_NUM] = { 0, 0, 0, 0 }; ++static struct semaphore mux_data_count_mutex[TS0710MUX_COUNT_IDX_NUM]; ++static volatile __u8 post_recv_count_flag = 0; ++ ++/*PROC file*/ ++struct proc_dir_entry *gprs_proc_file = NULL; ++ssize_t file_proc_read(struct file *file, char *buf, size_t size, ++ loff_t * ppos); ++ssize_t file_proc_write(struct file *file, const char *buf, size_t count, ++ loff_t * ppos); ++struct file_operations file_proc_operations = { ++ read:file_proc_read, ++ write:file_proc_write, ++}; ++typedef struct { ++ int recvBytes; ++ int sentBytes; ++} gprs_bytes; ++ ++static __u8 tty2dlci[NR_MUXS] = ++ { 1, 2, 3, 4, 5, 6, 7, 8, 6, 7, 8, 9, 10, 11, 12, 13 }; ++static __u8 iscmdtty[NR_MUXS] = ++ { 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0 }; ++typedef struct { ++ __u8 cmdtty; ++ __u8 datatty; ++} dlci_tty; ++static dlci_tty dlci2tty[] = { {0, 0}, /* DLCI 0 */ ++{0, 0}, /* DLCI 1 */ ++{1, 1}, /* DLCI 2 */ ++{2, 2}, /* DLCI 3 */ ++{3, 3}, /* DLCI 4 */ ++{4, 4}, /* DLCI 5 */ ++{5, 8}, /* DLCI 6 */ ++{6, 9}, /* DLCI 7 */ ++{7, 10}, /* DLCI 8 */ ++{11, 11}, /* DLCI 9 */ ++{12, 12}, /* DLCI 10 */ ++{13, 13}, /* DLCI 11 */ ++{14, 14}, /* DLCI 12 */ ++{15, 15} ++}; /* DLCI 13 */ ++ ++typedef struct { ++ volatile __u8 buf[TS0710MUX_SEND_BUF_SIZE]; ++ volatile __u8 *frame; ++ unsigned long flags; ++ volatile __u16 length; ++ volatile __u8 filled; ++ volatile __u8 dummy; /* Allignment to 4*n bytes */ ++} mux_send_struct; ++ ++/* Bit number in flags of mux_send_struct */ ++#define BUF_BUSY 0 ++ ++struct mux_recv_packet_tag { ++ __u8 *data; ++ __u32 length; ++ struct mux_recv_packet_tag *next; ++}; ++typedef struct mux_recv_packet_tag mux_recv_packet; ++ ++struct mux_recv_struct_tag { ++ __u8 data[TS0710MUX_RECV_BUF_SIZE]; ++ __u32 length; ++ __u32 total; ++ mux_recv_packet *mux_packet; ++ struct mux_recv_struct_tag *next; ++ int no_tty; ++ volatile __u8 post_unthrottle; ++}; ++typedef struct mux_recv_struct_tag mux_recv_struct; ++ ++#define RECV_RUNNING 0 ++static unsigned long mux_recv_flags = 0; ++ ++static mux_send_struct *mux_send_info[NR_MUXS]; ++static volatile __u8 mux_send_info_flags[NR_MUXS]; ++static volatile __u8 mux_send_info_idx = NR_MUXS; ++ ++static mux_recv_struct *mux_recv_info[NR_MUXS]; ++static volatile __u8 mux_recv_info_flags[NR_MUXS]; ++static mux_recv_struct *mux_recv_queue = NULL; ++ ++static struct tty_driver mux_driver; ++ ++#ifdef USB_FOR_MUX ++#define COMM_FOR_MUX_DRIVER usb_for_mux_driver ++#define COMM_FOR_MUX_TTY usb_for_mux_tty ++#define COMM_MUX_DISPATCHER usb_mux_dispatcher ++#define COMM_MUX_SENDER usb_mux_sender ++#else ++#define COMM_FOR_MUX_DRIVER serial_for_mux_driver ++#define COMM_FOR_MUX_TTY serial_for_mux_tty ++#define COMM_MUX_DISPATCHER serial_mux_dispatcher ++#define COMM_MUX_SENDER serial_mux_sender ++ ++extern struct list_head *tq_serial_for_mux; ++#endif ++ ++extern struct tty_driver *COMM_FOR_MUX_DRIVER; ++extern struct tty_struct *COMM_FOR_MUX_TTY; ++extern void (*COMM_MUX_DISPATCHER) (struct tty_struct * tty); ++extern void (*COMM_MUX_SENDER) (void); ++ ++static struct work_struct send_tqueue; ++static struct work_struct receive_tqueue; ++static struct work_struct post_recv_tqueue; ++ ++static struct tty_struct *mux_table[NR_MUXS]; ++static struct termios *mux_termios[NR_MUXS]; ++static struct termios *mux_termios_locked[NR_MUXS]; ++static volatile short int mux_tty[NR_MUXS]; ++ ++#ifdef min ++#undef min ++#define min(a,b) ( (a)<(b) ? (a):(b) ) ++#endif ++ ++static int get_count(__u8 idx); ++static int set_count(__u8 idx, int count); ++static int add_count(__u8 idx, int count); ++ ++static int send_ua(ts0710_con * ts0710, __u8 dlci); ++static int send_dm(ts0710_con * ts0710, __u8 dlci); ++static int send_sabm(ts0710_con * ts0710, __u8 dlci); ++static int send_disc(ts0710_con * ts0710, __u8 dlci); ++static void queue_uih(mux_send_struct * send_info, __u16 len, ++ ts0710_con * ts0710, __u8 dlci); ++static int send_pn_msg(ts0710_con * ts0710, __u8 prior, __u32 frame_size, ++ __u8 credit_flow, __u8 credits, __u8 dlci, __u8 cr); ++static int send_nsc_msg(ts0710_con * ts0710, mcc_type cmd, __u8 cr); ++static void set_uih_hdr(short_frame * uih_pkt, __u8 dlci, __u32 len, __u8 cr); ++ ++static __u32 crc_check(__u8 * data, __u32 length, __u8 check_sum); ++static __u8 crc_calc(__u8 * data, __u32 length); ++static void create_crctable(__u8 table[]); ++ ++static void mux_sched_send(void); ++ ++static __u8 crctable[256]; ++ ++static ts0710_con ts0710_connection; ++/* ++static rpn_values rpn_val; ++*/ ++ ++static int valid_dlci(__u8 dlci) ++{ ++ if ((dlci < TS0710_MAX_CHN) && (dlci > 0)) ++ return 1; ++ else ++ return 0; ++} ++ ++#ifdef TS0710DEBUG ++ ++#ifdef PRINT_OUTPUT_PRINTK ++#define TS0710_DEBUG(fmt, arg...) printk(KERN_INFO "MUX " __FUNCTION__ ": " fmt "\n" , ## arg) ++#else ++#include "ezxlog.h" ++static __u8 strDebug[256]; ++#define TS0710_DEBUG(fmt, arg...) ({ snprintf(strDebug, sizeof(strDebug), "MUX " __FUNCTION__ ": " fmt "\n" , ## arg); \ ++ /*printk("%s", strDebug)*/ezxlogk("MX", strDebug, strlen(strDebug)); }) ++#endif /* End #ifdef PRINT_OUTPUT_PRINTK */ ++ ++#else ++#define TS0710_DEBUG(fmt...) ++#endif /* End #ifdef TS0710DEBUG */ ++ ++#ifdef TS0710LOG ++static unsigned char g_tbuf[TS0710MUX_MAX_BUF_SIZE]; ++#ifdef PRINT_OUTPUT_PRINTK ++#define TS0710_LOG(fmt, arg...) printk(fmt, ## arg) ++#define TS0710_PRINTK(fmt, arg...) printk(fmt, ## arg) ++#else ++#include "ezxlog.h" ++static __u8 strLog[256]; ++#define TS0710_LOG(fmt, arg...) ({ snprintf(strLog, sizeof(strLog), fmt, ## arg); \ ++ /*printk("%s", strLog)*/ezxlogk("MX", strLog, strlen(strLog)); }) ++#define TS0710_PRINTK(fmt, arg...) ({ printk(fmt, ## arg); \ ++ TS0710_LOG(fmt, ## arg); }) ++#endif /* End #ifdef PRINT_OUTPUT_PRINTK */ ++ ++#else ++#define TS0710_LOG(fmt...) ++#define TS0710_PRINTK(fmt, arg...) printk(fmt, ## arg) ++#endif /* End #ifdef TS0710LOG */ ++ ++#ifdef TS0710DEBUG ++static void TS0710_DEBUGHEX(__u8 * buf, int len) ++{ ++ static unsigned char tbuf[TS0710MUX_MAX_BUF_SIZE]; ++ ++ int i; ++ int c; ++ ++ if (len <= 0) { ++ return; ++ } ++ ++ c = 0; ++ for (i = 0; (i < len) && (c < (TS0710MUX_MAX_BUF_SIZE - 3)); i++) { ++ sprintf(&tbuf[c], "%02x ", buf[i]); ++ c += 3; ++ } ++ tbuf[c] = 0; ++ ++#ifdef PRINT_OUTPUT_PRINTK ++ TS0710_DEBUG("%s", tbuf); ++#else ++ /*printk("%s\n", tbuf) */ ezxlogk("MX", tbuf, c); ++#endif ++} ++static void TS0710_DEBUGSTR(__u8 * buf, int len) ++{ ++ static unsigned char tbuf[TS0710MUX_MAX_BUF_SIZE]; ++ ++ if (len <= 0) { ++ return; ++ } ++ ++ if (len > (TS0710MUX_MAX_BUF_SIZE - 1)) { ++ len = (TS0710MUX_MAX_BUF_SIZE - 1); ++ } ++ ++ memcpy(tbuf, buf, len); ++ tbuf[len] = 0; ++ ++#ifdef PRINT_OUTPUT_PRINTK ++ /* 0x00 byte in the string pointed by tbuf may truncate the print result */ ++ TS0710_DEBUG("%s", tbuf); ++#else ++ /*printk("%s\n", tbuf) */ ezxlogk("MX", tbuf, len); ++#endif ++} ++#else ++#define TS0710_DEBUGHEX(buf, len) ++#define TS0710_DEBUGSTR(buf, len) ++#endif /* End #ifdef TS0710DEBUG */ ++ ++#ifdef TS0710LOG ++static void TS0710_LOGSTR_FRAME(__u8 send, __u8 * data, int len) ++{ ++ short_frame *short_pkt; ++ long_frame *long_pkt; ++ __u8 *uih_data_start; ++ __u32 uih_len; ++ __u8 dlci; ++ int pos; ++ ++ if (len <= 0) { ++ return; ++ } ++ ++ pos = 0; ++ if (send) { ++ pos += sprintf(&g_tbuf[pos], "<"); ++ short_pkt = (short_frame *) (data + 1); /*For BP UART problem */ ++ } else { ++ /*For BP UART problem */ ++ /*pos += sprintf(&g_tbuf[pos], ">"); */ ++ pos += sprintf(&g_tbuf[pos], ">%d ", *(data + SLIDE_BP_SEQ_OFFSET)); /*For BP UART problem */ ++ ++#ifdef TS0710SEQ2 ++ pos += sprintf(&g_tbuf[pos], "%02x %02x %02x %02x ", *(data + FIRST_BP_SEQ_OFFSET), *(data + SECOND_BP_SEQ_OFFSET), *(data + FIRST_AP_SEQ_OFFSET), *(data + SECOND_AP_SEQ_OFFSET)); /*For BP UART problem */ ++#endif ++ ++ short_pkt = (short_frame *) (data + ADDRESS_FIELD_OFFSET); /*For BP UART problem */ ++ } ++ ++ /*For BP UART problem */ ++ /*short_pkt = (short_frame *)(data + 1); */ ++ ++ dlci = short_pkt->h.addr.server_chn << 1 | short_pkt->h.addr.d; ++ switch (CLR_PF(short_pkt->h.control)) { ++ case SABM: ++ pos += sprintf(&g_tbuf[pos], "C SABM %d ::", dlci); ++ break; ++ case UA: ++ pos += sprintf(&g_tbuf[pos], "C UA %d ::", dlci); ++ break; ++ case DM: ++ pos += sprintf(&g_tbuf[pos], "C DM %d ::", dlci); ++ break; ++ case DISC: ++ pos += sprintf(&g_tbuf[pos], "C DISC %d ::", dlci); ++ break; ++ ++ /*For BP UART problem Begin */ ++ case ACK: ++ pos += sprintf(&g_tbuf[pos], "C ACK %d ", short_pkt->data[0]); ++ ++#ifdef TS0710SEQ2 ++ pos += sprintf(&g_tbuf[pos], "%02x %02x %02x %02x ", short_pkt->data[1], short_pkt->data[2], short_pkt->data[3], short_pkt->data[4]); /*For BP UART problem */ ++#endif ++ ++ pos += sprintf(&g_tbuf[pos], "::"); ++ break; ++ /*For BP UART problem End */ ++ ++ case UIH: ++ if (!dlci) { ++ pos += sprintf(&g_tbuf[pos], "C MCC %d ::", dlci); ++ } else { ++ ++ if ((short_pkt->h.length.ea) == 0) { ++ long_pkt = (long_frame *) short_pkt; ++ uih_len = GET_LONG_LENGTH(long_pkt->h.length); ++ uih_data_start = long_pkt->h.data; ++ } else { ++ uih_len = short_pkt->h.length.len; ++ uih_data_start = short_pkt->data; ++ } ++ switch (*uih_data_start) { ++ case CMDTAG: ++ pos += ++ sprintf(&g_tbuf[pos], "I %d A %d ::", dlci, ++ uih_len); ++ break; ++ case DATATAG: ++ default: ++ pos += ++ sprintf(&g_tbuf[pos], "I %d D %d ::", dlci, ++ uih_len); ++ break; ++ } ++ ++ } ++ break; ++ default: ++ pos += sprintf(&g_tbuf[pos], "N!!! %d ::", dlci); ++ break; ++ } ++ ++ if (len > (sizeof(g_tbuf) - pos - 1)) { ++ len = (sizeof(g_tbuf) - pos - 1); ++ } ++ ++ memcpy(&g_tbuf[pos], data, len); ++ pos += len; ++ g_tbuf[pos] = 0; ++ ++#ifdef PRINT_OUTPUT_PRINTK ++ /* 0x00 byte in the string pointed by g_tbuf may truncate the print result */ ++ TS0710_LOG("%s\n", g_tbuf); ++#else ++ /*printk("%s\n", g_tbuf) */ ezxlogk("MX", g_tbuf, pos); ++#endif ++} ++#else ++#define TS0710_LOGSTR_FRAME(send, data, len) ++#endif ++ ++#ifdef TS0710SIG ++#define my_for_each_task(p) \ ++ for ((p) = current; ((p) = (p)->next_task) != current; ) ++ ++static void TS0710_SIG2APLOGD(void) ++{ ++ struct task_struct *p; ++ static __u8 sig = 0; ++ ++ if (sig) { ++ return; ++ } ++ ++ read_lock(&tasklist_lock); ++ my_for_each_task(p) { ++ if (strncmp(p->comm, "aplogd", 6) == 0) { ++ sig = 1; ++ if (send_sig(SIGUSR2, p, 1) == 0) { ++ TS0710_PRINTK ++ ("MUX: success to send SIGUSR2 to aplogd!\n"); ++ } else { ++ TS0710_PRINTK ++ ("MUX: failure to send SIGUSR2 to aplogd!\n"); ++ } ++ break; ++ } ++ } ++ read_unlock(&tasklist_lock); ++ ++ if (!sig) { ++ TS0710_PRINTK("MUX: not found aplogd!\n"); ++ } ++} ++#else ++#define TS0710_SIG2APLOGD() ++#endif ++ ++static int basic_write(ts0710_con * ts0710, __u8 * buf, int len) ++{ ++ int res; ++ ++ UNUSED_PARAM(ts0710); ++ ++ buf[0] = TS0710_BASIC_FLAG; ++ buf[len + 1] = TS0710_BASIC_FLAG; ++ ++ if ((COMM_FOR_MUX_DRIVER == 0) || (COMM_FOR_MUX_TTY == 0)) { ++ TS0710_PRINTK ++ ("MUX basic_write: (COMM_FOR_MUX_DRIVER == 0) || (COMM_FOR_MUX_TTY == 0)\n"); ++ ++#ifndef USB_FOR_MUX ++ TS0710_PRINTK ++ ("MUX basic_write: tapisrv might be down!!! (serial_for_mux_driver == 0) || (serial_for_mux_tty == 0)\n"); ++ TS0710_SIG2APLOGD(); ++#endif ++ ++ return -1; ++ } ++ ++ TS0710_LOGSTR_FRAME(1, buf, len + 2); ++ TS0710_DEBUGHEX(buf, len + 2); ++ ++ res = COMM_FOR_MUX_DRIVER->write(COMM_FOR_MUX_TTY, buf, len + 2); ++ ++ if (res != len + 2) { ++ TS0710_PRINTK("MUX basic_write: Write Error!\n"); ++ return -1; ++ } ++ ++ return len + 2; ++} ++ ++/* Functions for the crc-check and calculation */ ++ ++#define CRC_VALID 0xcf ++ ++static __u32 crc_check(__u8 * data, __u32 length, __u8 check_sum) ++{ ++ __u8 fcs = 0xff; ++ ++ while (length--) { ++ fcs = crctable[fcs ^ *data++]; ++ } ++ fcs = crctable[fcs ^ check_sum]; ++ TS0710_DEBUG("fcs : %d\n", fcs); ++ if (fcs == (uint) 0xcf) { /*CRC_VALID) */ ++ TS0710_DEBUG("crc_check: CRC check OK\n"); ++ return 0; ++ } else { ++ TS0710_PRINTK("MUX crc_check: CRC check failed\n"); ++ return 1; ++ } ++} ++ ++/* Calculates the checksum according to the ts0710 specification */ ++ ++static __u8 crc_calc(__u8 * data, __u32 length) ++{ ++ __u8 fcs = 0xff; ++ ++ while (length--) { ++ fcs = crctable[fcs ^ *data++]; ++ } ++ ++ return 0xff - fcs; ++} ++ ++/* Calulates a reversed CRC table for the FCS check */ ++ ++static void create_crctable(__u8 table[]) ++{ ++ int i, j; ++ ++ __u8 data; ++ __u8 code_word = (__u8) 0xe0; ++ __u8 sr = (__u8) 0; ++ ++ for (j = 0; j < 256; j++) { ++ data = (__u8) j; ++ ++ for (i = 0; i < 8; i++) { ++ if ((data & 0x1) ^ (sr & 0x1)) { ++ sr >>= 1; ++ sr ^= code_word; ++ } else { ++ sr >>= 1; ++ } ++ ++ data >>= 1; ++ sr &= 0xff; ++ } ++ ++ table[j] = sr; ++ sr = 0; ++ } ++} ++ ++static void ts0710_reset_dlci(__u8 j) ++{ ++ if (j >= TS0710_MAX_CHN) ++ return; ++ ++ ts0710_connection.dlci[j].state = DISCONNECTED; ++ ts0710_connection.dlci[j].flow_control = 0; ++ ts0710_connection.dlci[j].mtu = DEF_TS0710_MTU; ++ ts0710_connection.dlci[j].initiated = 0; ++ ts0710_connection.dlci[j].initiator = 0; ++ init_waitqueue_head(&ts0710_connection.dlci[j].open_wait); ++ init_waitqueue_head(&ts0710_connection.dlci[j].close_wait); ++} ++ ++static void ts0710_reset_con(void) ++{ ++ __u8 j; ++ ++ ts0710_connection.initiator = 0; ++ ts0710_connection.mtu = DEF_TS0710_MTU + TS0710_MAX_HDR_SIZE; ++ ts0710_connection.be_testing = 0; ++ ts0710_connection.test_errs = 0; ++ init_waitqueue_head(&ts0710_connection.test_wait); ++ ++ for (j = 0; j < TS0710_MAX_CHN; j++) { ++ ts0710_reset_dlci(j); ++ } ++} ++ ++static void ts0710_init(void) ++{ ++ create_crctable(crctable); ++ ++ ts0710_reset_con(); ++ ++ /* Set the values in the rpn octets */ ++/* ++ rpn_val.bit_rate = 7; ++ rpn_val.data_bits = 3; ++ rpn_val.stop_bit = 0; ++ rpn_val.parity = 0; ++ rpn_val.parity_type = 0; ++ rpn_val.res1 = 0; ++ rpn_val.xon_input = 0; ++ rpn_val.xon_output = 0; ++ rpn_val.rtr_input = 0; ++ rpn_val.rtr_output = 0; ++ rpn_val.rtc_input = 0; ++ rpn_val.rtc_output = 0; ++ rpn_val.res2 = 0; ++ rpn_val.xon_u8 = 0x11; ++ rpn_val.xoff_u8 = 0x13; ++ memset(&rpn_val.pm, 0 , 2); *//* Set the mask to zero */ ++} ++ ++static void ts0710_upon_disconnect(void) ++{ ++ ts0710_con *ts0710 = &ts0710_connection; ++ __u8 j; ++ ++ for (j = 0; j < TS0710_MAX_CHN; j++) { ++ ts0710->dlci[j].state = DISCONNECTED; ++ wake_up_interruptible(&ts0710->dlci[j].open_wait); ++ wake_up_interruptible(&ts0710->dlci[j].close_wait); ++ } ++ ts0710->be_testing = 0; ++ wake_up_interruptible(&ts0710->test_wait); ++ ts0710_reset_con(); ++} ++ ++/* Sending packet functions */ ++ ++/* Creates a UA packet and puts it at the beginning of the pkt pointer */ ++ ++static int send_ua(ts0710_con * ts0710, __u8 dlci) ++{ ++ __u8 buf[sizeof(short_frame) + FCS_SIZE + FLAG_SIZE]; ++ short_frame *ua; ++ ++ TS0710_DEBUG("send_ua: Creating UA packet to DLCI %d\n", dlci); ++ ++ ua = (short_frame *) (buf + 1); ++ ua->h.addr.ea = 1; ++ ua->h.addr.cr = ((~(ts0710->initiator)) & 0x1); ++ ua->h.addr.d = (dlci) & 0x1; ++ ua->h.addr.server_chn = (dlci) >> 0x1; ++ ua->h.control = SET_PF(UA); ++ ua->h.length.ea = 1; ++ ua->h.length.len = 0; ++ ua->data[0] = crc_calc((__u8 *) ua, SHORT_CRC_CHECK); ++ ++ return basic_write(ts0710, buf, sizeof(short_frame) + FCS_SIZE); ++} ++ ++/* Creates a DM packet and puts it at the beginning of the pkt pointer */ ++ ++static int send_dm(ts0710_con * ts0710, __u8 dlci) ++{ ++ __u8 buf[sizeof(short_frame) + FCS_SIZE + FLAG_SIZE]; ++ short_frame *dm; ++ ++ TS0710_DEBUG("send_dm: Creating DM packet to DLCI %d\n", dlci); ++ ++ dm = (short_frame *) (buf + 1); ++ dm->h.addr.ea = 1; ++ dm->h.addr.cr = ((~(ts0710->initiator)) & 0x1); ++ dm->h.addr.d = dlci & 0x1; ++ dm->h.addr.server_chn = dlci >> 0x1; ++ dm->h.control = SET_PF(DM); ++ dm->h.length.ea = 1; ++ dm->h.length.len = 0; ++ dm->data[0] = crc_calc((__u8 *) dm, SHORT_CRC_CHECK); ++ ++ return basic_write(ts0710, buf, sizeof(short_frame) + FCS_SIZE); ++} ++ ++static int send_sabm(ts0710_con * ts0710, __u8 dlci) ++{ ++ __u8 buf[sizeof(short_frame) + FCS_SIZE + FLAG_SIZE]; ++ short_frame *sabm; ++ ++ TS0710_DEBUG("send_sabm: Creating SABM packet to DLCI %d\n", dlci); ++ ++ sabm = (short_frame *) (buf + 1); ++ sabm->h.addr.ea = 1; ++ sabm->h.addr.cr = ((ts0710->initiator) & 0x1); ++ sabm->h.addr.d = dlci & 0x1; ++ sabm->h.addr.server_chn = dlci >> 0x1; ++ sabm->h.control = SET_PF(SABM); ++ sabm->h.length.ea = 1; ++ sabm->h.length.len = 0; ++ sabm->data[0] = crc_calc((__u8 *) sabm, SHORT_CRC_CHECK); ++ ++ return basic_write(ts0710, buf, sizeof(short_frame) + FCS_SIZE); ++} ++ ++static int send_disc(ts0710_con * ts0710, __u8 dlci) ++{ ++ __u8 buf[sizeof(short_frame) + FCS_SIZE + FLAG_SIZE]; ++ short_frame *disc; ++ ++ TS0710_DEBUG("send_disc: Creating DISC packet to DLCI %d\n", dlci); ++ ++ disc = (short_frame *) (buf + 1); ++ disc->h.addr.ea = 1; ++ disc->h.addr.cr = ((ts0710->initiator) & 0x1); ++ disc->h.addr.d = dlci & 0x1; ++ disc->h.addr.server_chn = dlci >> 0x1; ++ disc->h.control = SET_PF(DISC); ++ disc->h.length.ea = 1; ++ disc->h.length.len = 0; ++ disc->data[0] = crc_calc((__u8 *) disc, SHORT_CRC_CHECK); ++ ++ return basic_write(ts0710, buf, sizeof(short_frame) + FCS_SIZE); ++} ++ ++static void queue_uih(mux_send_struct * send_info, __u16 len, ++ ts0710_con * ts0710, __u8 dlci) ++{ ++ __u32 size; ++ ++ TS0710_DEBUG ++ ("queue_uih: Creating UIH packet with %d bytes data to DLCI %d\n", ++ len, dlci); ++ ++ if (len > SHORT_PAYLOAD_SIZE) { ++ long_frame *l_pkt; ++ ++ size = sizeof(long_frame) + len + FCS_SIZE; ++ l_pkt = (long_frame *) (send_info->frame - sizeof(long_frame)); ++ set_uih_hdr((void *)l_pkt, dlci, len, ts0710->initiator); ++ l_pkt->data[len] = crc_calc((__u8 *) l_pkt, LONG_CRC_CHECK); ++ send_info->frame = ((__u8 *) l_pkt) - 1; ++ } else { ++ short_frame *s_pkt; ++ ++ size = sizeof(short_frame) + len + FCS_SIZE; ++ s_pkt = ++ (short_frame *) (send_info->frame - sizeof(short_frame)); ++ set_uih_hdr((void *)s_pkt, dlci, len, ts0710->initiator); ++ s_pkt->data[len] = crc_calc((__u8 *) s_pkt, SHORT_CRC_CHECK); ++ send_info->frame = ((__u8 *) s_pkt) - 1; ++ } ++ send_info->length = size; ++} ++ ++/* Multiplexer command packets functions */ ++ ++/* Turns on the ts0710 flow control */ ++ ++static int ts0710_fcon_msg(ts0710_con * ts0710, __u8 cr) ++{ ++ __u8 buf[30]; ++ mcc_short_frame *mcc_pkt; ++ short_frame *uih_pkt; ++ __u32 size; ++ ++ size = sizeof(short_frame) + sizeof(mcc_short_frame) + FCS_SIZE; ++ uih_pkt = (short_frame *) (buf + 1); ++ set_uih_hdr(uih_pkt, CTRL_CHAN, sizeof(mcc_short_frame), ++ ts0710->initiator); ++ uih_pkt->data[sizeof(mcc_short_frame)] = ++ crc_calc((__u8 *) uih_pkt, SHORT_CRC_CHECK); ++ mcc_pkt = (mcc_short_frame *) (uih_pkt->data); ++ ++ mcc_pkt->h.type.ea = EA; ++ mcc_pkt->h.type.cr = cr; ++ mcc_pkt->h.type.type = FCON; ++ mcc_pkt->h.length.ea = EA; ++ mcc_pkt->h.length.len = 0; ++ ++ return basic_write(ts0710, buf, size); ++} ++ ++/* Turns off the ts0710 flow control */ ++ ++static int ts0710_fcoff_msg(ts0710_con * ts0710, __u8 cr) ++{ ++ __u8 buf[30]; ++ mcc_short_frame *mcc_pkt; ++ short_frame *uih_pkt; ++ __u32 size; ++ ++ size = (sizeof(short_frame) + sizeof(mcc_short_frame) + FCS_SIZE); ++ uih_pkt = (short_frame *) (buf + 1); ++ set_uih_hdr(uih_pkt, CTRL_CHAN, sizeof(mcc_short_frame), ++ ts0710->initiator); ++ uih_pkt->data[sizeof(mcc_short_frame)] = ++ crc_calc((__u8 *) uih_pkt, SHORT_CRC_CHECK); ++ mcc_pkt = (mcc_short_frame *) (uih_pkt->data); ++ ++ mcc_pkt->h.type.ea = 1; ++ mcc_pkt->h.type.cr = cr; ++ mcc_pkt->h.type.type = FCOFF; ++ mcc_pkt->h.length.ea = 1; ++ mcc_pkt->h.length.len = 0; ++ ++ return basic_write(ts0710, buf, size); ++} ++ ++/* ++static int ts0710_rpn_msg(ts0710_con *ts0710, __u8 cr, __u8 dlci, __u8 req) ++{ ++ char buf[100]; ++ rpn_msg* rpn_pkt; ++ __u32 fsize; ++ __u32 psize; ++ ++ fsize = sizeof(rpn_msg); ++ ++ if (req) { ++ fsize -= sizeof(rpn_values); ++ } ++ ++ psize = (fsize - sizeof(short_frame) - FCS_SIZE); ++ ++ rpn_pkt = (rpn_msg *) buf; ++ ++ set_uih_hdr((short_frame *) rpn_pkt, CTRL_CHAN, psize, ts0710->initiator); ++ ++ rpn_pkt->fcs = crc_calc((__u8*) rpn_pkt, SHORT_CRC_CHECK); ++ ++ rpn_pkt->mcc_s_head.type.ea = EA; ++ rpn_pkt->mcc_s_head.type.cr = cr; ++ rpn_pkt->mcc_s_head.type.type = RPN; ++ rpn_pkt->mcc_s_head.length.ea = EA; ++ ++ rpn_pkt->dlci.ea = EA; ++ rpn_pkt->dlci.cr = 1; ++ rpn_pkt->dlci.d = dlci & 1; ++ rpn_pkt->dlci.server_chn = (dlci >> 1); ++ ++ if (req) { ++ rpn_pkt->mcc_s_head.length.len = 1; ++ rpn_pkt->rpn_val.bit_rate = rpn_pkt->fcs; ++ } else { ++ rpn_pkt->mcc_s_head.length.len = 8; ++ memcpy(&(rpn_pkt->rpn_val), &rpn_val, sizeof(rpn_values)); ++ } ++ return basic_write(ts0710, buf, fsize); ++} ++*/ ++/* ++static int ts0710_rls_msg(ts0710_con *ts0710, __u8 cr, __u8 dlci, __u8 err_code) ++{ ++ char buf[100]; ++ rls_msg *rls_pkt; ++ __u32 fsize; ++ __u32 psize; ++ ++ fsize = sizeof(rls_msg); ++ psize = fsize - sizeof(short_frame) - FCS_SIZE; ++ rls_pkt = (rls_msg *) buf; ++ ++ set_uih_hdr((short_frame *) rls_pkt, CTRL_CHAN, psize, ts0710->initiator); ++ rls_pkt->fcs = crc_calc((__u8*) rls_pkt, SHORT_CRC_CHECK); ++ ++ rls_pkt->mcc_s_head.type.ea = EA; ++ rls_pkt->mcc_s_head.type.cr = cr; ++ rls_pkt->mcc_s_head.type.type = RLS; ++ rls_pkt->mcc_s_head.length.ea = EA; ++ rls_pkt->mcc_s_head.length.len = 2; ++ ++ rls_pkt->dlci.ea = EA; ++ rls_pkt->dlci.cr = 1; ++ rls_pkt->dlci.d = dlci & 1; ++ rls_pkt->dlci.server_chn = dlci >> 1; ++ rls_pkt->error = err_code; ++ rls_pkt->res = 0; ++ ++ return basic_write(ts0710, buf, fsize); ++} ++*/ ++ ++/* Sends an PN-messages and sets the not negotiable parameters to their ++ default values in ts0710 */ ++ ++static int send_pn_msg(ts0710_con * ts0710, __u8 prior, __u32 frame_size, ++ __u8 credit_flow, __u8 credits, __u8 dlci, __u8 cr) ++{ ++ __u8 buf[30]; ++ pn_msg *pn_pkt; ++ __u32 size; ++ TS0710_DEBUG ++ ("send_pn_msg: DLCI 0x%02x, prior:0x%02x, frame_size:%d, credit_flow:%x, credits:%d, cr:%x\n", ++ dlci, prior, frame_size, credit_flow, credits, cr); ++ ++ size = sizeof(pn_msg); ++ pn_pkt = (pn_msg *) (buf + 1); ++ ++ set_uih_hdr((void *)pn_pkt, CTRL_CHAN, ++ size - (sizeof(short_frame) + FCS_SIZE), ts0710->initiator); ++ pn_pkt->fcs = crc_calc((__u8 *) pn_pkt, SHORT_CRC_CHECK); ++ ++ pn_pkt->mcc_s_head.type.ea = 1; ++ pn_pkt->mcc_s_head.type.cr = cr; ++ pn_pkt->mcc_s_head.type.type = PN; ++ pn_pkt->mcc_s_head.length.ea = 1; ++ pn_pkt->mcc_s_head.length.len = 8; ++ ++ pn_pkt->res1 = 0; ++ pn_pkt->res2 = 0; ++ pn_pkt->dlci = dlci; ++ pn_pkt->frame_type = 0; ++ pn_pkt->credit_flow = credit_flow; ++ pn_pkt->prior = prior; ++ pn_pkt->ack_timer = 0; ++ SET_PN_MSG_FRAME_SIZE(pn_pkt, frame_size); ++ pn_pkt->credits = credits; ++ pn_pkt->max_nbrof_retrans = 0; ++ ++ return basic_write(ts0710, buf, size); ++} ++ ++/* Send a Not supported command - command, which needs 3 bytes */ ++ ++static int send_nsc_msg(ts0710_con * ts0710, mcc_type cmd, __u8 cr) ++{ ++ __u8 buf[30]; ++ nsc_msg *nsc_pkt; ++ __u32 size; ++ ++ size = sizeof(nsc_msg); ++ nsc_pkt = (nsc_msg *) (buf + 1); ++ ++ set_uih_hdr((void *)nsc_pkt, CTRL_CHAN, ++ sizeof(nsc_msg) - sizeof(short_frame) - FCS_SIZE, ++ ts0710->initiator); ++ ++ nsc_pkt->fcs = crc_calc((__u8 *) nsc_pkt, SHORT_CRC_CHECK); ++ ++ nsc_pkt->mcc_s_head.type.ea = 1; ++ nsc_pkt->mcc_s_head.type.cr = cr; ++ nsc_pkt->mcc_s_head.type.type = NSC; ++ nsc_pkt->mcc_s_head.length.ea = 1; ++ nsc_pkt->mcc_s_head.length.len = 1; ++ ++ nsc_pkt->command_type.ea = 1; ++ nsc_pkt->command_type.cr = cmd.cr; ++ nsc_pkt->command_type.type = cmd.type; ++ ++ return basic_write(ts0710, buf, size); ++} ++ ++static int ts0710_msc_msg(ts0710_con * ts0710, __u8 value, __u8 cr, __u8 dlci) ++{ ++ __u8 buf[30]; ++ msc_msg *msc_pkt; ++ __u32 size; ++ ++ size = sizeof(msc_msg); ++ msc_pkt = (msc_msg *) (buf + 1); ++ ++ set_uih_hdr((void *)msc_pkt, CTRL_CHAN, ++ sizeof(msc_msg) - sizeof(short_frame) - FCS_SIZE, ++ ts0710->initiator); ++ ++ msc_pkt->fcs = crc_calc((__u8 *) msc_pkt, SHORT_CRC_CHECK); ++ ++ msc_pkt->mcc_s_head.type.ea = 1; ++ msc_pkt->mcc_s_head.type.cr = cr; ++ msc_pkt->mcc_s_head.type.type = MSC; ++ msc_pkt->mcc_s_head.length.ea = 1; ++ msc_pkt->mcc_s_head.length.len = 2; ++ ++ msc_pkt->dlci.ea = 1; ++ msc_pkt->dlci.cr = 1; ++ msc_pkt->dlci.d = dlci & 1; ++ msc_pkt->dlci.server_chn = (dlci >> 1) & 0x1f; ++ ++ msc_pkt->v24_sigs = value; ++ ++ return basic_write(ts0710, buf, size); ++} ++ ++static int ts0710_test_msg(ts0710_con * ts0710, __u8 * test_pattern, __u32 len, ++ __u8 cr, __u8 * f_buf /*Frame buf */ ) ++{ ++ __u32 size; ++ ++ if (len > SHORT_PAYLOAD_SIZE) { ++ long_frame *uih_pkt; ++ mcc_long_frame *mcc_pkt; ++ ++ size = ++ (sizeof(long_frame) + sizeof(mcc_long_frame) + len + ++ FCS_SIZE); ++ uih_pkt = (long_frame *) (f_buf + 1); ++ ++ set_uih_hdr((short_frame *) uih_pkt, CTRL_CHAN, len + ++ sizeof(mcc_long_frame), ts0710->initiator); ++ uih_pkt->data[GET_LONG_LENGTH(uih_pkt->h.length)] = ++ crc_calc((__u8 *) uih_pkt, LONG_CRC_CHECK); ++ mcc_pkt = (mcc_long_frame *) uih_pkt->data; ++ ++ mcc_pkt->h.type.ea = EA; ++ /* cr tells whether it is a commmand (1) or a response (0) */ ++ mcc_pkt->h.type.cr = cr; ++ mcc_pkt->h.type.type = TEST; ++ SET_LONG_LENGTH(mcc_pkt->h.length, len); ++ memcpy(mcc_pkt->value, test_pattern, len); ++ } else if (len > (SHORT_PAYLOAD_SIZE - sizeof(mcc_short_frame))) { ++ long_frame *uih_pkt; ++ mcc_short_frame *mcc_pkt; ++ ++ /* Create long uih packet and short mcc packet */ ++ size = ++ (sizeof(long_frame) + sizeof(mcc_short_frame) + len + ++ FCS_SIZE); ++ uih_pkt = (long_frame *) (f_buf + 1); ++ ++ set_uih_hdr((short_frame *) uih_pkt, CTRL_CHAN, ++ len + sizeof(mcc_short_frame), ts0710->initiator); ++ uih_pkt->data[GET_LONG_LENGTH(uih_pkt->h.length)] = ++ crc_calc((__u8 *) uih_pkt, LONG_CRC_CHECK); ++ mcc_pkt = (mcc_short_frame *) uih_pkt->data; ++ ++ mcc_pkt->h.type.ea = EA; ++ mcc_pkt->h.type.cr = cr; ++ mcc_pkt->h.type.type = TEST; ++ mcc_pkt->h.length.ea = EA; ++ mcc_pkt->h.length.len = len; ++ memcpy(mcc_pkt->value, test_pattern, len); ++ } else { ++ short_frame *uih_pkt; ++ mcc_short_frame *mcc_pkt; ++ ++ size = ++ (sizeof(short_frame) + sizeof(mcc_short_frame) + len + ++ FCS_SIZE); ++ uih_pkt = (short_frame *) (f_buf + 1); ++ ++ set_uih_hdr((void *)uih_pkt, CTRL_CHAN, len ++ + sizeof(mcc_short_frame), ts0710->initiator); ++ uih_pkt->data[uih_pkt->h.length.len] = ++ crc_calc((__u8 *) uih_pkt, SHORT_CRC_CHECK); ++ mcc_pkt = (mcc_short_frame *) uih_pkt->data; ++ ++ mcc_pkt->h.type.ea = EA; ++ mcc_pkt->h.type.cr = cr; ++ mcc_pkt->h.type.type = TEST; ++ mcc_pkt->h.length.ea = EA; ++ mcc_pkt->h.length.len = len; ++ memcpy(mcc_pkt->value, test_pattern, len); ++ ++ } ++ return basic_write(ts0710, f_buf, size); ++} ++ ++static void set_uih_hdr(short_frame * uih_pkt, __u8 dlci, __u32 len, __u8 cr) ++{ ++ uih_pkt->h.addr.ea = 1; ++ uih_pkt->h.addr.cr = cr; ++ uih_pkt->h.addr.d = dlci & 0x1; ++ uih_pkt->h.addr.server_chn = dlci >> 1; ++ uih_pkt->h.control = CLR_PF(UIH); ++ ++ if (len > SHORT_PAYLOAD_SIZE) { ++ SET_LONG_LENGTH(((long_frame *) uih_pkt)->h.length, len); ++ } else { ++ uih_pkt->h.length.ea = 1; ++ uih_pkt->h.length.len = len; ++ } ++} ++ ++/* Parses a multiplexer control channel packet */ ++ ++void process_mcc(__u8 * data, __u32 len, ts0710_con * ts0710, int longpkt) ++{ ++ __u8 *tbuf = NULL; ++ mcc_short_frame *mcc_short_pkt; ++ int j; ++ ++ if (longpkt) { ++ mcc_short_pkt = ++ (mcc_short_frame *) (((long_frame *) data)->data); ++ } else { ++ mcc_short_pkt = ++ (mcc_short_frame *) (((short_frame *) data)->data); ++ } ++ ++ switch (mcc_short_pkt->h.type.type) { ++ case TEST: ++ if (mcc_short_pkt->h.type.cr == MCC_RSP) { ++ TS0710_DEBUG("Received test command response\n"); ++ ++ if (ts0710->be_testing) { ++ if ((mcc_short_pkt->h.length.ea) == 0) { ++ mcc_long_frame *mcc_long_pkt; ++ mcc_long_pkt = ++ (mcc_long_frame *) mcc_short_pkt; ++ if (GET_LONG_LENGTH ++ (mcc_long_pkt->h.length) != ++ TEST_PATTERN_SIZE) { ++ ts0710->test_errs = ++ TEST_PATTERN_SIZE; ++ TS0710_DEBUG ++ ("Err: received test pattern is %d bytes long, not expected %d\n", ++ GET_LONG_LENGTH ++ (mcc_long_pkt->h.length), ++ TEST_PATTERN_SIZE); ++ } else { ++ ts0710->test_errs = 0; ++ for (j = 0; ++ j < TEST_PATTERN_SIZE; ++ j++) { ++ if (mcc_long_pkt-> ++ value[j] != ++ (j & 0xFF)) { ++ (ts0710-> ++ test_errs)++; ++ } ++ } ++ } ++ ++ } else { ++ ++#if TEST_PATTERN_SIZE < 128 ++ if (mcc_short_pkt->h.length.len != ++ TEST_PATTERN_SIZE) { ++#endif ++ ++ ts0710->test_errs = ++ TEST_PATTERN_SIZE; ++ TS0710_DEBUG ++ ("Err: received test pattern is %d bytes long, not expected %d\n", ++ mcc_short_pkt->h.length. ++ len, TEST_PATTERN_SIZE); ++ ++#if TEST_PATTERN_SIZE < 128 ++ } else { ++ ts0710->test_errs = 0; ++ for (j = 0; ++ j < TEST_PATTERN_SIZE; ++ j++) { ++ if (mcc_short_pkt-> ++ value[j] != ++ (j & 0xFF)) { ++ (ts0710-> ++ test_errs)++; ++ } ++ } ++ } ++#endif ++ ++ } ++ ++ ts0710->be_testing = 0; /* Clear the flag */ ++ wake_up_interruptible(&ts0710->test_wait); ++ } else { ++ TS0710_DEBUG ++ ("Err: shouldn't or late to get test cmd response\n"); ++ } ++ } else { ++ tbuf = (__u8 *) kmalloc(len + 32, GFP_ATOMIC); ++ if (!tbuf) { ++ break; ++ } ++ ++ if ((mcc_short_pkt->h.length.ea) == 0) { ++ mcc_long_frame *mcc_long_pkt; ++ mcc_long_pkt = (mcc_long_frame *) mcc_short_pkt; ++ ts0710_test_msg(ts0710, mcc_long_pkt->value, ++ GET_LONG_LENGTH(mcc_long_pkt->h. ++ length), ++ MCC_RSP, tbuf); ++ } else { ++ ts0710_test_msg(ts0710, mcc_short_pkt->value, ++ mcc_short_pkt->h.length.len, ++ MCC_RSP, tbuf); ++ } ++ ++ kfree(tbuf); ++ } ++ break; ++ ++ case FCON: /*Flow control on command */ ++ TS0710_PRINTK ++ ("MUX Received Flow control(all channels) on command\n"); ++ if (mcc_short_pkt->h.type.cr == MCC_CMD) { ++ ts0710->dlci[0].state = CONNECTED; ++ ts0710_fcon_msg(ts0710, MCC_RSP); ++ mux_sched_send(); ++ } ++ break; ++ ++ case FCOFF: /*Flow control off command */ ++ TS0710_PRINTK ++ ("MUX Received Flow control(all channels) off command\n"); ++ if (mcc_short_pkt->h.type.cr == MCC_CMD) { ++ for (j = 0; j < TS0710_MAX_CHN; j++) { ++ ts0710->dlci[j].state = FLOW_STOPPED; ++ } ++ ts0710_fcoff_msg(ts0710, MCC_RSP); ++ } ++ break; ++ ++ case MSC: /*Modem status command */ ++ { ++ __u8 dlci; ++ __u8 v24_sigs; ++ ++ dlci = (mcc_short_pkt->value[0]) >> 2; ++ v24_sigs = mcc_short_pkt->value[1]; ++ ++ if ((ts0710->dlci[dlci].state != CONNECTED) ++ && (ts0710->dlci[dlci].state != FLOW_STOPPED)) { ++ send_dm(ts0710, dlci); ++ break; ++ } ++ if (mcc_short_pkt->h.type.cr == MCC_CMD) { ++ TS0710_DEBUG("Received Modem status command\n"); ++ if (v24_sigs & 2) { ++ if (ts0710->dlci[dlci].state == ++ CONNECTED) { ++ TS0710_LOG ++ ("MUX Received Flow off on dlci %d\n", ++ dlci); ++ ts0710->dlci[dlci].state = ++ FLOW_STOPPED; ++ } ++ } else { ++ if (ts0710->dlci[dlci].state == ++ FLOW_STOPPED) { ++ ts0710->dlci[dlci].state = ++ CONNECTED; ++ TS0710_LOG ++ ("MUX Received Flow on on dlci %d\n", ++ dlci); ++ mux_sched_send(); ++ } ++ } ++ ++ ts0710_msc_msg(ts0710, v24_sigs, MCC_RSP, dlci); ++/* ++ if (!(ts0710->dlci[dlci].initiated) && !(ts0710->dlci[dlci].initiator)) { ++ ts0710_msc_msg(ts0710, EA | RTR | RTC | DV, MCC_CMD, dlci); ++ ts0710->dlci[dlci].initiated = 1; ++ } ++*/ ++ } else { ++ TS0710_DEBUG ++ ("Received Modem status response\n"); ++ ++ if (v24_sigs & 2) { ++ TS0710_DEBUG("Flow stop accepted\n"); ++ } ++ } ++ break; ++ } ++ ++ /* case RPN: *//*Remote port negotiation command */ ++ ++/* { ++ __u8 dlci; ++ ++ dlci = (mcc_short_pkt->value[0]) >> 2; ++ ++ if (mcc_short_pkt->h.type.cr == MCC_CMD) { ++ if (mcc_short_pkt->h.length.len == 1) { ++ TS0710_DEBUG("Received Remote port negotiation command\n"); ++ ts0710_rpn_msg(ts0710, MCC_RSP, dlci, 0); ++ } else { ++*/ ++ /* Accept the other sides settings (accept all for now) */ ++/* TS0710_DEBUG("Received Remote port negotiation respons\n"); ++ memcpy(&rpn_val, &mcc_short_pkt->value[1], 8); ++ ts0710_rpn_msg(ts0710, MCC_RSP, dlci, 0); ++*/ ++ /* Zero the parametermask after response */ ++/* memset(&rpn_val.pm, 0, 2); ++ } ++ } ++ break; ++ } ++*/ ++/* ++ case RLS: *//*Remote line status */ ++/* { ++ __u8 dlci; ++ __u8 err_code; ++ ++ TS0710_DEBUG("Received Remote line status\n"); ++ if (mcc_short_pkt->h.type.cr == MCC_CMD) { ++ dlci = mcc_short_pkt->value[0] >> 2; ++ err_code = mcc_short_pkt->value[1]; ++ ++ ts0710_rls_msg(ts0710, MCC_RSP, dlci, err_code); ++ } ++ break; ++ } ++*/ ++ case PN: /*DLC parameter negotiation */ ++ { ++ __u8 dlci; ++ __u16 frame_size; ++ pn_msg *pn_pkt; ++ ++ pn_pkt = (pn_msg *) data; ++ dlci = pn_pkt->dlci; ++ frame_size = GET_PN_MSG_FRAME_SIZE(pn_pkt); ++ TS0710_DEBUG ++ ("Received DLC parameter negotiation, PN\n"); ++ if (pn_pkt->mcc_s_head.type.cr == MCC_CMD) { ++ TS0710_DEBUG("received PN command with:\n"); ++ TS0710_DEBUG("Frame size:%d\n", frame_size); ++ ++ frame_size = ++ min(frame_size, ts0710->dlci[dlci].mtu); ++ send_pn_msg(ts0710, pn_pkt->prior, frame_size, ++ 0, 0, dlci, MCC_RSP); ++ ts0710->dlci[dlci].mtu = frame_size; ++ TS0710_DEBUG("process_mcc : mtu set to %d\n", ++ ts0710->dlci[dlci].mtu); ++ } else { ++ TS0710_DEBUG("received PN response with:\n"); ++ TS0710_DEBUG("Frame size:%d\n", frame_size); ++ ++ frame_size = ++ min(frame_size, ts0710->dlci[dlci].mtu); ++ ts0710->dlci[dlci].mtu = frame_size; ++ ++ TS0710_DEBUG ++ ("process_mcc : mtu set on dlci:%d to %d\n", ++ dlci, ts0710->dlci[dlci].mtu); ++ ++ if (ts0710->dlci[dlci].state == NEGOTIATING) { ++ ts0710->dlci[dlci].state = CONNECTING; ++ wake_up_interruptible(&ts0710-> ++ dlci[dlci]. ++ open_wait); ++ } ++ } ++ break; ++ } ++ ++ case NSC: /*Non supported command resonse */ ++ TS0710_LOG("MUX Received Non supported command response\n"); ++ break; ++ ++ default: /*Non supported command received */ ++ TS0710_LOG("MUX Received a non supported command\n"); ++ send_nsc_msg(ts0710, mcc_short_pkt->h.type, MCC_RSP); ++ break; ++ } ++} ++ ++static mux_recv_packet *get_mux_recv_packet(__u32 size) ++{ ++ mux_recv_packet *recv_packet; ++ ++ TS0710_DEBUG("Enter into get_mux_recv_packet"); ++ ++ recv_packet = ++ (mux_recv_packet *) kmalloc(sizeof(mux_recv_packet), GFP_ATOMIC); ++ if (!recv_packet) { ++ return 0; ++ } ++ ++ recv_packet->data = (__u8 *) kmalloc(size, GFP_ATOMIC); ++ if (!(recv_packet->data)) { ++ kfree(recv_packet); ++ return 0; ++ } ++ recv_packet->length = 0; ++ recv_packet->next = 0; ++ return recv_packet; ++} ++ ++static void free_mux_recv_packet(mux_recv_packet * recv_packet) ++{ ++ TS0710_DEBUG("Enter into free_mux_recv_packet"); ++ ++ if (!recv_packet) { ++ return; ++ } ++ ++ if (recv_packet->data) { ++ kfree(recv_packet->data); ++ } ++ kfree(recv_packet); ++} ++ ++static void free_mux_recv_struct(mux_recv_struct * recv_info) ++{ ++ mux_recv_packet *recv_packet1, *recv_packet2; ++ ++ if (!recv_info) { ++ return; ++ } ++ ++ recv_packet1 = recv_info->mux_packet; ++ while (recv_packet1) { ++ recv_packet2 = recv_packet1->next; ++ free_mux_recv_packet(recv_packet1); ++ recv_packet1 = recv_packet2; ++ } ++ ++ kfree(recv_info); ++} ++ ++static inline void add_post_recv_queue(mux_recv_struct ** head, ++ mux_recv_struct * new_item) ++{ ++ new_item->next = *head; ++ *head = new_item; ++} ++ ++static void ts0710_flow_on(__u8 dlci, ts0710_con * ts0710) ++{ ++ int i; ++ __u8 cmdtty; ++ __u8 datatty; ++ struct tty_struct *tty; ++ mux_recv_struct *recv_info; ++ ++ if ((ts0710->dlci[0].state != CONNECTED) ++ && (ts0710->dlci[0].state != FLOW_STOPPED)) { ++ return; ++ } else if ((ts0710->dlci[dlci].state != CONNECTED) ++ && (ts0710->dlci[dlci].state != FLOW_STOPPED)) { ++ return; ++ } ++ ++ if (!(ts0710->dlci[dlci].flow_control)) { ++ return; ++ } ++ ++ cmdtty = dlci2tty[dlci].cmdtty; ++ datatty = dlci2tty[dlci].datatty; ++ ++ if (cmdtty != datatty) { ++ /* Check AT cmd tty */ ++ tty = mux_table[cmdtty]; ++ if (mux_tty[cmdtty] && tty) { ++ if (test_bit(TTY_THROTTLED, &tty->flags)) { ++ return; ++ } ++ } ++ recv_info = mux_recv_info[cmdtty]; ++ if (mux_recv_info_flags[cmdtty] && recv_info) { ++ if (recv_info->total) { ++ return; ++ } ++ } ++ ++ /* Check data tty */ ++ tty = mux_table[datatty]; ++ if (mux_tty[datatty] && tty) { ++ if (test_bit(TTY_THROTTLED, &tty->flags)) { ++ return; ++ } ++ } ++ recv_info = mux_recv_info[datatty]; ++ if (mux_recv_info_flags[datatty] && recv_info) { ++ if (recv_info->total) { ++ return; ++ } ++ } ++ } ++ ++ for (i = 0; i < 3; i++) { ++ if (ts0710_msc_msg(ts0710, EA | RTC | RTR | DV, MCC_CMD, dlci) < ++ 0) { ++ continue; ++ } else { ++ TS0710_LOG("MUX send Flow on on dlci %d\n", dlci); ++ ts0710->dlci[dlci].flow_control = 0; ++ break; ++ } ++ } ++} ++ ++static void ts0710_flow_off(struct tty_struct *tty, __u8 dlci, ++ ts0710_con * ts0710) ++{ ++ int i; ++ ++ if (test_and_set_bit(TTY_THROTTLED, &tty->flags)) { ++ return; ++ } ++ ++ if ((ts0710->dlci[0].state != CONNECTED) ++ && (ts0710->dlci[0].state != FLOW_STOPPED)) { ++ return; ++ } else if ((ts0710->dlci[dlci].state != CONNECTED) ++ && (ts0710->dlci[dlci].state != FLOW_STOPPED)) { ++ return; ++ } ++ ++ if (ts0710->dlci[dlci].flow_control) { ++ return; ++ } ++ ++ for (i = 0; i < 3; i++) { ++ if (ts0710_msc_msg ++ (ts0710, EA | FC | RTC | RTR | DV, MCC_CMD, dlci) < 0) { ++ continue; ++ } else { ++ TS0710_LOG("MUX send Flow off on dlci %d\n", dlci); ++ ts0710->dlci[dlci].flow_control = 1; ++ break; ++ } ++ } ++} ++ ++int ts0710_recv_data(ts0710_con * ts0710, char *data, int len) ++{ ++ short_frame *short_pkt; ++ long_frame *long_pkt; ++ __u8 *uih_data_start; ++ __u32 uih_len; ++ __u8 dlci; ++ __u8 be_connecting; ++#ifdef TS0710DEBUG ++ unsigned long t; ++#endif ++ ++ short_pkt = (short_frame *) data; ++ ++ dlci = short_pkt->h.addr.server_chn << 1 | short_pkt->h.addr.d; ++ switch (CLR_PF(short_pkt->h.control)) { ++ case SABM: ++ TS0710_DEBUG("SABM-packet received\n"); ++ ++/*For BP UART problem ++ if( crc_check((__u8*) short_pkt, SHORT_CRC_CHECK, short_pkt->data[0]) ) ++ break; ++*/ ++ ++ if (!dlci) { ++ TS0710_DEBUG("server channel == 0\n"); ++ ts0710->dlci[0].state = CONNECTED; ++ ++ TS0710_DEBUG("sending back UA - control channel\n"); ++ send_ua(ts0710, dlci); ++ wake_up_interruptible(&ts0710->dlci[0].open_wait); ++ ++ } else if (valid_dlci(dlci)) { ++ ++ TS0710_DEBUG("Incomming connect on channel %d\n", dlci); ++ ++ TS0710_DEBUG("sending UA, dlci %d\n", dlci); ++ send_ua(ts0710, dlci); ++ ++ ts0710->dlci[dlci].state = CONNECTED; ++ wake_up_interruptible(&ts0710->dlci[dlci].open_wait); ++ ++ } else { ++ TS0710_DEBUG("invalid dlci %d, sending DM\n", dlci); ++ send_dm(ts0710, dlci); ++ } ++ ++ break; ++ ++ case UA: ++ TS0710_DEBUG("UA packet received\n"); ++ ++/*For BP UART problem ++ if( crc_check((__u8*) short_pkt, SHORT_CRC_CHECK, short_pkt->data[0]) ) ++ break; ++*/ ++ ++ if (!dlci) { ++ TS0710_DEBUG("server channel == 0\n"); ++ ++ if (ts0710->dlci[0].state == CONNECTING) { ++ ts0710->dlci[0].state = CONNECTED; ++ wake_up_interruptible(&ts0710->dlci[0]. ++ open_wait); ++ } else if (ts0710->dlci[0].state == DISCONNECTING) { ++ ts0710_upon_disconnect(); ++ } else { ++ TS0710_DEBUG ++ (" Something wrong receiving UA packet\n"); ++ } ++ } else if (valid_dlci(dlci)) { ++ TS0710_DEBUG("Incomming UA on channel %d\n", dlci); ++ ++ if (ts0710->dlci[dlci].state == CONNECTING) { ++ ts0710->dlci[dlci].state = CONNECTED; ++ wake_up_interruptible(&ts0710->dlci[dlci]. ++ open_wait); ++ } else if (ts0710->dlci[dlci].state == DISCONNECTING) { ++ ts0710->dlci[dlci].state = DISCONNECTED; ++ wake_up_interruptible(&ts0710->dlci[dlci]. ++ open_wait); ++ wake_up_interruptible(&ts0710->dlci[dlci]. ++ close_wait); ++ ts0710_reset_dlci(dlci); ++ } else { ++ TS0710_DEBUG ++ (" Something wrong receiving UA packet\n"); ++ } ++ } else { ++ TS0710_DEBUG("invalid dlci %d\n", dlci); ++ } ++ ++ break; ++ ++ case DM: ++ TS0710_DEBUG("DM packet received\n"); ++ ++/*For BP UART problem ++ if( crc_check((__u8*) short_pkt, SHORT_CRC_CHECK, short_pkt->data[0]) ) ++ break; ++*/ ++ ++ if (!dlci) { ++ TS0710_DEBUG("server channel == 0\n"); ++ ++ if (ts0710->dlci[0].state == CONNECTING) { ++ be_connecting = 1; ++ } else { ++ be_connecting = 0; ++ } ++ ts0710_upon_disconnect(); ++ if (be_connecting) { ++ ts0710->dlci[0].state = REJECTED; ++ } ++ } else if (valid_dlci(dlci)) { ++ TS0710_DEBUG("Incomming DM on channel %d\n", dlci); ++ ++ if (ts0710->dlci[dlci].state == CONNECTING) { ++ ts0710->dlci[dlci].state = REJECTED; ++ } else { ++ ts0710->dlci[dlci].state = DISCONNECTED; ++ } ++ wake_up_interruptible(&ts0710->dlci[dlci].open_wait); ++ wake_up_interruptible(&ts0710->dlci[dlci].close_wait); ++ ts0710_reset_dlci(dlci); ++ } else { ++ TS0710_DEBUG("invalid dlci %d\n", dlci); ++ } ++ ++ break; ++ ++ case DISC: ++ TS0710_DEBUG("DISC packet received\n"); ++ ++/*For BP UART problem ++ if( crc_check((__u8*) short_pkt, SHORT_CRC_CHECK, short_pkt->data[0]) ) ++ break; ++*/ ++ ++ if (!dlci) { ++ TS0710_DEBUG("server channel == 0\n"); ++ ++ send_ua(ts0710, dlci); ++ TS0710_DEBUG("DISC, sending back UA\n"); ++ ++ ts0710_upon_disconnect(); ++ } else if (valid_dlci(dlci)) { ++ TS0710_DEBUG("Incomming DISC on channel %d\n", dlci); ++ ++ send_ua(ts0710, dlci); ++ TS0710_DEBUG("DISC, sending back UA\n"); ++ ++ ts0710->dlci[dlci].state = DISCONNECTED; ++ wake_up_interruptible(&ts0710->dlci[dlci].open_wait); ++ wake_up_interruptible(&ts0710->dlci[dlci].close_wait); ++ ts0710_reset_dlci(dlci); ++ } else { ++ TS0710_DEBUG("invalid dlci %d\n", dlci); ++ } ++ ++ break; ++ ++ case UIH: ++ TS0710_DEBUG("UIH packet received\n"); ++ ++ if ((dlci >= TS0710_MAX_CHN)) { ++ TS0710_DEBUG("invalid dlci %d\n", dlci); ++ send_dm(ts0710, dlci); ++ break; ++ } ++ ++ if (GET_PF(short_pkt->h.control)) { ++ TS0710_LOG ++ ("MUX Error %s: UIH packet with P/F set, discard it!\n", ++ __FUNCTION__); ++ break; ++ } ++ ++ if ((ts0710->dlci[dlci].state != CONNECTED) ++ && (ts0710->dlci[dlci].state != FLOW_STOPPED)) { ++ TS0710_LOG ++ ("MUX Error %s: DLCI %d not connected, discard it!\n", ++ __FUNCTION__, dlci); ++ send_dm(ts0710, dlci); ++ break; ++ } ++ ++ if ((short_pkt->h.length.ea) == 0) { ++ TS0710_DEBUG("Long UIH packet received\n"); ++ long_pkt = (long_frame *) data; ++ uih_len = GET_LONG_LENGTH(long_pkt->h.length); ++ uih_data_start = long_pkt->h.data; ++ TS0710_DEBUG("long packet length %d\n", uih_len); ++ ++/*For BP UART problem ++ if (crc_check(data, LONG_CRC_CHECK, *(uih_data_start + uih_len))) ++ break; ++*/ ++ } else { ++ TS0710_DEBUG("Short UIH pkt received\n"); ++ uih_len = short_pkt->h.length.len; ++ uih_data_start = short_pkt->data; ++ ++/*For BP UART problem ++ if (crc_check(data, SHORT_CRC_CHECK, *(uih_data_start + uih_len))) ++ break; ++*/ ++ } ++ ++ if (dlci == 0) { ++ TS0710_DEBUG("UIH on serv_channel 0\n"); ++ process_mcc(data, len, ts0710, ++ !(short_pkt->h.length.ea)); ++ } else if (valid_dlci(dlci)) { ++ /* do tty dispatch */ ++ __u8 tag; ++ __u8 tty_idx; ++ struct tty_struct *tty; ++ __u8 queue_data; ++ __u8 post_recv; ++ __u8 flow_control; ++ mux_recv_struct *recv_info; ++ int recv_room; ++ mux_recv_packet *recv_packet, *recv_packet2; ++ ++ TS0710_DEBUG("UIH on channel %d\n", dlci); ++ ++ if (uih_len > ts0710->dlci[dlci].mtu) { ++ TS0710_PRINTK ++ ("MUX Error: DLCI:%d, uih_len:%d is bigger than mtu:%d, discard data!\n", ++ dlci, uih_len, ts0710->dlci[dlci].mtu); ++ break; ++ } ++ ++ tag = *uih_data_start; ++ uih_data_start++; ++ uih_len--; ++ ++ if (!uih_len) { ++ break; ++ } ++ ++ switch (tag) { ++ case CMDTAG: ++ tty_idx = dlci2tty[dlci].cmdtty; ++ TS0710_DEBUG("CMDTAG on DLCI:%d, /dev/mux%d\n", ++ dlci, tty_idx); ++ TS0710_DEBUGSTR(uih_data_start, uih_len); ++ if (!(iscmdtty[tty_idx])) { ++ TS0710_PRINTK ++ ("MUX Error: %s: Wrong CMDTAG on DLCI:%d, /dev/mux%d\n", ++ __FUNCTION__, dlci, tty_idx); ++ } ++ break; ++ case DATATAG: ++ default: ++ tty_idx = dlci2tty[dlci].datatty; ++ TS0710_DEBUG ++ ("NON-CMDTAG on DLCI:%d, /dev/mux%d\n", ++ dlci, tty_idx); ++ if (iscmdtty[tty_idx]) { ++ TS0710_PRINTK ++ ("MUX Error: %s: Wrong NON-CMDTAG on DLCI:%d, /dev/mux%d\n", ++ __FUNCTION__, dlci, tty_idx); ++ } ++ break; ++ } ++ tty = mux_table[tty_idx]; ++ if ((!mux_tty[tty_idx]) || (!tty)) { ++ TS0710_PRINTK ++ ("MUX: No application waiting for, discard it! /dev/mux%d\n", ++ tty_idx); ++ } else { /* Begin processing received data */ ++ if ((!mux_recv_info_flags[tty_idx]) ++ || (!mux_recv_info[tty_idx])) { ++ TS0710_PRINTK ++ ("MUX Error: No mux_recv_info, discard it! /dev/mux%d\n", ++ tty_idx); ++ break; ++ } ++ ++ recv_info = mux_recv_info[tty_idx]; ++ if (recv_info->total > 8192) { ++ TS0710_PRINTK ++ ("MUX : discard data for tty_idx:%d, recv_info->total > 8192 \n", ++ tty_idx); ++ break; ++ } ++ ++ queue_data = 0; ++ post_recv = 0; ++ flow_control = 0; ++ recv_room = 65535; ++ if (tty->receive_room) ++ recv_room = tty->receive_room; ++ ++ if (test_bit(TTY_THROTTLED, &tty->flags)) { ++ queue_data = 1; ++ } else { ++ if (test_bit ++ (TTY_DONT_FLIP, &tty->flags)) { ++ queue_data = 1; ++ post_recv = 1; ++ } else if (recv_info->total) { ++ queue_data = 1; ++ post_recv = 1; ++ } else if (recv_room < uih_len) { ++ queue_data = 1; ++ flow_control = 1; ++ } ++ ++ if ((recv_room - ++ (uih_len + recv_info->total)) < ++ ts0710->dlci[dlci].mtu) { ++ flow_control = 1; ++ } ++ } ++ ++ if (!queue_data) { ++ /* Put received data into read buffer of tty */ ++ TS0710_DEBUG ++ ("Put received data into read buffer of /dev/mux%d", ++ tty_idx); ++ ++#ifdef TS0710DEBUG ++ t = jiffies; ++#endif ++ ++ (tty->ldisc.receive_buf) (tty, ++ uih_data_start, ++ NULL, ++ uih_len); ++ ++#ifdef TS0710DEBUG ++ TS0710_DEBUG ++ ("tty->ldisc.receive_buf take ticks: %lu", ++ (jiffies - t)); ++#endif ++ ++ } else { /* Queue data */ ++ ++ TS0710_DEBUG ++ ("Put received data into recv queue of /dev/mux%d", ++ tty_idx); ++ if (recv_info->total) { ++ /* recv_info is already linked into mux_recv_queue */ ++ ++ recv_packet = ++ get_mux_recv_packet ++ (uih_len); ++ if (!recv_packet) { ++ TS0710_PRINTK ++ ("MUX %s: no memory\n", ++ __FUNCTION__); ++ break; ++ } ++ ++ memcpy(recv_packet->data, ++ uih_data_start, uih_len); ++ recv_packet->length = uih_len; ++ recv_info->total += uih_len; ++ recv_packet->next = NULL; ++ ++ if (!(recv_info->mux_packet)) { ++ recv_info->mux_packet = ++ recv_packet; ++ } else { ++ recv_packet2 = ++ recv_info-> ++ mux_packet; ++ while (recv_packet2-> ++ next) { ++ recv_packet2 = ++ recv_packet2-> ++ next; ++ } ++ recv_packet2->next = ++ recv_packet; ++ } /* End if( !(recv_info->mux_packet) ) */ ++ } else { /* recv_info->total == 0 */ ++ if (uih_len > ++ TS0710MUX_RECV_BUF_SIZE) { ++ TS0710_PRINTK ++ ("MUX Error: tty_idx:%d, uih_len == %d is too big\n", ++ tty_idx, uih_len); ++ uih_len = ++ TS0710MUX_RECV_BUF_SIZE; ++ } ++ memcpy(recv_info->data, ++ uih_data_start, uih_len); ++ recv_info->length = uih_len; ++ recv_info->total = uih_len; ++ ++ add_post_recv_queue ++ (&mux_recv_queue, ++ recv_info); ++ } /* End recv_info->total == 0 */ ++ } /* End Queue data */ ++ ++ if (flow_control) { ++ /* Do something for flow control */ ++ ts0710_flow_off(tty, dlci, ts0710); ++ } ++ ++ if (tty_idx == ++ dlci2tty[TS0710MUX_GPRS1_DLCI].datatty) { ++ if (add_count ++ (TS0710MUX_GPRS1_RECV_COUNT_IDX, ++ uih_len) < 0) { ++ post_recv_count_flag = 1; ++ post_recv = 1; ++ mux_data_count2 ++ [TS0710MUX_GPRS1_RECV_COUNT_IDX] ++ += uih_len; ++ } ++ } else if (tty_idx == ++ dlci2tty[TS0710MUX_GPRS2_DLCI]. ++ datatty) { ++ if (add_count ++ (TS0710MUX_GPRS2_RECV_COUNT_IDX, ++ uih_len) < 0) { ++ post_recv_count_flag = 1; ++ post_recv = 1; ++ mux_data_count2 ++ [TS0710MUX_GPRS2_RECV_COUNT_IDX] ++ += uih_len; ++ } ++ } ++ ++ if (post_recv) ++ schedule_work(&post_recv_tqueue); ++ } /* End processing received data */ ++ } else { ++ TS0710_DEBUG("invalid dlci %d\n", dlci); ++ } ++ ++ break; ++ ++ default: ++ TS0710_DEBUG("illegal packet\n"); ++ break; ++ } ++ return 0; ++} ++ ++/* ++int ts0710_send_data(ts0710_con *ts0710, __u8 dlci, __u8 *data, __u32 count) ++{ ++ __u32 c, total = 0; ++ __u8 tag, first; ++ ++ if( ts0710->dlci[0].state == FLOW_STOPPED ){ ++ TS0710_DEBUG("Flow stopped on all channels, returning zero\n"); ++*/ ++/* ++ return -EFLOWSTOPPED; ++ } else if( ts0710->dlci[dlci].state == FLOW_STOPPED ){ ++ TS0710_DEBUG("Flow stopped, returning zero\n"); ++*/ ++/* ++ return -EFLOWSTOPPED; ++ } else if( ts0710->dlci[dlci].state == CONNECTED ){ ++ ++ TS0710_DEBUG("trying to send %d bytes\n", count); ++ tag = *data; ++ first = 1; ++*/ ++ /* The first byte is always a Cmd/Data tag */ ++/* ++ while( count > 1 ){ ++ ++ c = min(count, ts0710->dlci[dlci].mtu); ++ if( queue_uih(data, c, ts0710, dlci) <= 0 ) { ++ break; ++ } ++ ++ total += (c - 1); ++ data += (c - 1); ++ *data = tag; ++ count -= (c - 1); ++ ++ if( first ) { ++ first = 0; ++ total++; ++ } ++ } ++ TS0710_DEBUG("sent %d bytes\n", total); ++ return total; ++ } else { ++ TS0710_DEBUG("DLCI %d not connected\n", dlci); ++ return -EDISCONNECTED; ++ } ++} ++*/ ++ ++/* Close ts0710 channel */ ++static void ts0710_close_channel(__u8 dlci) ++{ ++ ts0710_con *ts0710 = &ts0710_connection; ++ int try; ++ unsigned long t; ++ ++ TS0710_DEBUG("ts0710_disc_command on channel %d\n", dlci); ++ ++ if ((ts0710->dlci[dlci].state == DISCONNECTED) ++ || (ts0710->dlci[dlci].state == REJECTED)) { ++ return; ++ } else if (ts0710->dlci[dlci].state == DISCONNECTING) { ++ /* Reentry */ ++ return; ++ } else { ++ ts0710->dlci[dlci].state = DISCONNECTING; ++ try = 3; ++ while (try--) { ++ t = jiffies; ++ send_disc(ts0710, dlci); ++ interruptible_sleep_on_timeout(&ts0710->dlci[dlci]. ++ close_wait, ++ TS0710MUX_TIME_OUT); ++ if (ts0710->dlci[dlci].state == DISCONNECTED) { ++ break; ++ } else if (signal_pending(current)) { ++ TS0710_PRINTK ++ ("MUX DLCI %d Send DISC got signal!\n", ++ dlci); ++ break; ++ } else if ((jiffies - t) >= TS0710MUX_TIME_OUT) { ++ TS0710_PRINTK ++ ("MUX DLCI %d Send DISC timeout!\n", dlci); ++ continue; ++ } ++ } ++ ++ if (ts0710->dlci[dlci].state != DISCONNECTED) { ++ if (dlci == 0) { /* Control Channel */ ++ ts0710_upon_disconnect(); ++ } else { /* Other Channel */ ++ ts0710->dlci[dlci].state = DISCONNECTED; ++ wake_up_interruptible(&ts0710->dlci[dlci]. ++ close_wait); ++ ts0710_reset_dlci(dlci); ++ } ++ } ++ } ++} ++ ++int ts0710_open_channel(__u8 dlci) ++{ ++ ts0710_con *ts0710 = &ts0710_connection; ++ int try; ++ int retval; ++ unsigned long t; ++ ++ retval = -ENODEV; ++ if (dlci == 0) { // control channel ++ if ((ts0710->dlci[0].state == CONNECTED) ++ || (ts0710->dlci[0].state == FLOW_STOPPED)) { ++ return 0; ++ } else if (ts0710->dlci[0].state == CONNECTING) { ++ /* Reentry */ ++ TS0710_PRINTK ++ ("MUX DLCI: 0, reentry to open DLCI 0, pid: %d, %s !\n", ++ current->pid, current->comm); ++ try = 11; ++ while (try--) { ++ t = jiffies; ++ interruptible_sleep_on_timeout(&ts0710->dlci[0]. ++ open_wait, ++ TS0710MUX_TIME_OUT); ++ if ((ts0710->dlci[0].state == CONNECTED) ++ || (ts0710->dlci[0].state == ++ FLOW_STOPPED)) { ++ retval = 0; ++ break; ++ } else if (ts0710->dlci[0].state == REJECTED) { ++ retval = -EREJECTED; ++ break; ++ } else if (ts0710->dlci[0].state == ++ DISCONNECTED) { ++ break; ++ } else if (signal_pending(current)) { ++ TS0710_PRINTK ++ ("MUX DLCI:%d Wait for connecting got signal!\n", ++ dlci); ++ retval = -EAGAIN; ++ break; ++ } else if ((jiffies - t) >= TS0710MUX_TIME_OUT) { ++ TS0710_PRINTK ++ ("MUX DLCI:%d Wait for connecting timeout!\n", ++ dlci); ++ continue; ++ } else if (ts0710->dlci[0].state == CONNECTING) { ++ continue; ++ } ++ } ++ ++ if (ts0710->dlci[0].state == CONNECTING) { ++ ts0710->dlci[0].state = DISCONNECTED; ++ } ++ } else if ((ts0710->dlci[0].state != DISCONNECTED) ++ && (ts0710->dlci[0].state != REJECTED)) { ++ TS0710_PRINTK("MUX DLCI:%d state is invalid!\n", dlci); ++ return retval; ++ } else { ++ ts0710->initiator = 1; ++ ts0710->dlci[0].state = CONNECTING; ++ ts0710->dlci[0].initiator = 1; ++ try = 10; ++ while (try--) { ++ t = jiffies; ++ send_sabm(ts0710, 0); ++ interruptible_sleep_on_timeout(&ts0710->dlci[0]. ++ open_wait, ++ TS0710MUX_TIME_OUT); ++ if ((ts0710->dlci[0].state == CONNECTED) ++ || (ts0710->dlci[0].state == ++ FLOW_STOPPED)) { ++ retval = 0; ++ break; ++ } else if (ts0710->dlci[0].state == REJECTED) { ++ TS0710_PRINTK ++ ("MUX DLCI:%d Send SABM got rejected!\n", ++ dlci); ++ retval = -EREJECTED; ++ break; ++ } else if (signal_pending(current)) { ++ TS0710_PRINTK ++ ("MUX DLCI:%d Send SABM got signal!\n", ++ dlci); ++ retval = -EAGAIN; ++ break; ++ } else if ((jiffies - t) >= TS0710MUX_TIME_OUT) { ++ TS0710_PRINTK ++ ("MUX DLCI:%d Send SABM timeout!\n", ++ dlci); ++ continue; ++ } ++ } ++ ++ if (ts0710->dlci[0].state == CONNECTING) { ++ ts0710->dlci[0].state = DISCONNECTED; ++ } ++ wake_up_interruptible(&ts0710->dlci[0].open_wait); ++ } ++ } else { // other channel ++ if ((ts0710->dlci[0].state != CONNECTED) ++ && (ts0710->dlci[0].state != FLOW_STOPPED)) { ++ return retval; ++ } else if ((ts0710->dlci[dlci].state == CONNECTED) ++ || (ts0710->dlci[dlci].state == FLOW_STOPPED)) { ++ return 0; ++ } else if ((ts0710->dlci[dlci].state == NEGOTIATING) ++ || (ts0710->dlci[dlci].state == CONNECTING)) { ++ /* Reentry */ ++ try = 8; ++ while (try--) { ++ t = jiffies; ++ interruptible_sleep_on_timeout(&ts0710-> ++ dlci[dlci]. ++ open_wait, ++ TS0710MUX_TIME_OUT); ++ if ((ts0710->dlci[dlci].state == CONNECTED) ++ || (ts0710->dlci[dlci].state == ++ FLOW_STOPPED)) { ++ retval = 0; ++ break; ++ } else if (ts0710->dlci[dlci].state == REJECTED) { ++ retval = -EREJECTED; ++ break; ++ } else if (ts0710->dlci[dlci].state == ++ DISCONNECTED) { ++ break; ++ } else if (signal_pending(current)) { ++ TS0710_PRINTK ++ ("MUX DLCI:%d Wait for connecting got signal!\n", ++ dlci); ++ retval = -EAGAIN; ++ break; ++ } else if ((jiffies - t) >= TS0710MUX_TIME_OUT) { ++ TS0710_PRINTK ++ ("MUX DLCI:%d Wait for connecting timeout!\n", ++ dlci); ++ continue; ++ } else ++ if ((ts0710->dlci[dlci].state == ++ NEGOTIATING) ++ || (ts0710->dlci[dlci].state == ++ CONNECTING)) { ++ continue; ++ } ++ } ++ ++ if ((ts0710->dlci[dlci].state == NEGOTIATING) ++ || (ts0710->dlci[dlci].state == CONNECTING)) { ++ ts0710->dlci[dlci].state = DISCONNECTED; ++ } ++ } else if ((ts0710->dlci[dlci].state != DISCONNECTED) ++ && (ts0710->dlci[dlci].state != REJECTED)) { ++ TS0710_PRINTK("MUX DLCI:%d state is invalid!\n", dlci); ++ return retval; ++ } else { ++ ts0710->dlci[dlci].state = NEGOTIATING; ++ ts0710->dlci[dlci].initiator = 1; ++ try = 3; ++ while (try--) { ++ t = jiffies; ++ send_pn_msg(ts0710, 7, ts0710->dlci[dlci].mtu, ++ 0, 0, dlci, 1); ++ interruptible_sleep_on_timeout(&ts0710-> ++ dlci[dlci]. ++ open_wait, ++ TS0710MUX_TIME_OUT); ++ if (ts0710->dlci[dlci].state == CONNECTING) { ++ break; ++ } else if (signal_pending(current)) { ++ TS0710_PRINTK ++ ("MUX DLCI:%d Send pn_msg got signal!\n", ++ dlci); ++ retval = -EAGAIN; ++ break; ++ } else if ((jiffies - t) >= TS0710MUX_TIME_OUT) { ++ TS0710_PRINTK ++ ("MUX DLCI:%d Send pn_msg timeout!\n", ++ dlci); ++ continue; ++ } ++ } ++ ++ if (ts0710->dlci[dlci].state == CONNECTING) { ++ try = 3; ++ while (try--) { ++ t = jiffies; ++ send_sabm(ts0710, dlci); ++ interruptible_sleep_on_timeout(&ts0710-> ++ dlci ++ [dlci]. ++ open_wait, ++ TS0710MUX_TIME_OUT); ++ if ((ts0710->dlci[dlci].state == ++ CONNECTED) ++ || (ts0710->dlci[dlci].state == ++ FLOW_STOPPED)) { ++ retval = 0; ++ break; ++ } else if (ts0710->dlci[dlci].state == ++ REJECTED) { ++ TS0710_PRINTK ++ ("MUX DLCI:%d Send SABM got rejected!\n", ++ dlci); ++ retval = -EREJECTED; ++ break; ++ } else if (signal_pending(current)) { ++ TS0710_PRINTK ++ ("MUX DLCI:%d Send SABM got signal!\n", ++ dlci); ++ retval = -EAGAIN; ++ break; ++ } else if ((jiffies - t) >= ++ TS0710MUX_TIME_OUT) { ++ TS0710_PRINTK ++ ("MUX DLCI:%d Send SABM timeout!\n", ++ dlci); ++ continue; ++ } ++ } ++ } ++ ++ if ((ts0710->dlci[dlci].state == NEGOTIATING) ++ || (ts0710->dlci[dlci].state == CONNECTING)) { ++ ts0710->dlci[dlci].state = DISCONNECTED; ++ } ++ wake_up_interruptible(&ts0710->dlci[dlci].open_wait); ++ } ++ } ++ return retval; ++} ++ ++static int ts0710_exec_test_cmd(void) ++{ ++ ts0710_con *ts0710 = &ts0710_connection; ++ __u8 *f_buf; /* Frame buffer */ ++ __u8 *d_buf; /* Data buffer */ ++ int retval = -EFAULT; ++ int j; ++ unsigned long t; ++ ++ if (ts0710->be_testing) { ++ /* Reentry */ ++ t = jiffies; ++ interruptible_sleep_on_timeout(&ts0710->test_wait, ++ 3 * TS0710MUX_TIME_OUT); ++ if (ts0710->be_testing == 0) { ++ if (ts0710->test_errs == 0) { ++ retval = 0; ++ } else { ++ retval = -EFAULT; ++ } ++ } else if (signal_pending(current)) { ++ TS0710_DEBUG ++ ("Wait for Test_cmd response got signal!\n"); ++ retval = -EAGAIN; ++ } else if ((jiffies - t) >= 3 * TS0710MUX_TIME_OUT) { ++ TS0710_DEBUG("Wait for Test_cmd response timeout!\n"); ++ retval = -EFAULT; ++ } ++ } else { ++ ts0710->be_testing = 1; /* Set the flag */ ++ ++ f_buf = (__u8 *) kmalloc(TEST_PATTERN_SIZE + 32, GFP_KERNEL); ++ d_buf = (__u8 *) kmalloc(TEST_PATTERN_SIZE + 32, GFP_KERNEL); ++ if ((!f_buf) || (!d_buf)) { ++ if (f_buf) { ++ kfree(f_buf); ++ } ++ if (d_buf) { ++ kfree(d_buf); ++ } ++ ++ ts0710->be_testing = 0; /* Clear the flag */ ++ ts0710->test_errs = TEST_PATTERN_SIZE; ++ wake_up_interruptible(&ts0710->test_wait); ++ return -ENOMEM; ++ } ++ ++ for (j = 0; j < TEST_PATTERN_SIZE; j++) { ++ d_buf[j] = j & 0xFF; ++ } ++ ++ t = jiffies; ++ ts0710_test_msg(ts0710, d_buf, TEST_PATTERN_SIZE, MCC_CMD, ++ f_buf); ++ interruptible_sleep_on_timeout(&ts0710->test_wait, ++ 2 * TS0710MUX_TIME_OUT); ++ if (ts0710->be_testing == 0) { ++ if (ts0710->test_errs == 0) { ++ retval = 0; ++ } else { ++ retval = -EFAULT; ++ } ++ } else if (signal_pending(current)) { ++ TS0710_DEBUG("Send Test_cmd got signal!\n"); ++ retval = -EAGAIN; ++ } else if ((jiffies - t) >= 2 * TS0710MUX_TIME_OUT) { ++ TS0710_DEBUG("Send Test_cmd timeout!\n"); ++ ts0710->test_errs = TEST_PATTERN_SIZE; ++ retval = -EFAULT; ++ } ++ ++ ts0710->be_testing = 0; /* Clear the flag */ ++ wake_up_interruptible(&ts0710->test_wait); ++ ++ /* Release buffer */ ++ if (f_buf) { ++ kfree(f_buf); ++ } ++ if (d_buf) { ++ kfree(d_buf); ++ } ++ } ++ ++ return retval; ++} ++ ++static void mux_sched_send(void) ++{ ++ ++#ifdef USB_FOR_MUX ++ schedule_work(&send_tqueue); ++#else ++ if (!tq_serial_for_mux) { ++ TS0710_PRINTK("MUX Error: %s: tq_serial_for_mux == 0\n", ++ __FUNCTION__); ++ return; ++ } ++ schedule_work(&send_tqueue); ++ mark_bh(SERIAL_BH); ++#endif ++ ++} ++ ++/**************************** ++ * TTY driver routines ++*****************************/ ++ ++static void mux_close(struct tty_struct *tty, struct file *filp) ++{ ++ ts0710_con *ts0710 = &ts0710_connection; ++ int line; ++ __u8 dlci; ++ __u8 cmdtty; ++ __u8 datatty; ++ ++ UNUSED_PARAM(filp); ++ ++ if (!tty) { ++ return; ++ } ++ line = tty->index; ++ if ((line < 0) || (line >= NR_MUXS)) { ++ return; ++ } ++ if (mux_tty[line] > 0) ++ mux_tty[line]--; ++ ++ dlci = tty2dlci[line]; ++ cmdtty = dlci2tty[dlci].cmdtty; ++ datatty = dlci2tty[dlci].datatty; ++ if ((mux_tty[cmdtty] == 0) && (mux_tty[datatty] == 0)) { ++ if (dlci == 1) { ++ ts0710_close_channel(0); ++ TS0710_PRINTK ++ ("MUX mux_close: tapisrv might be down!!! Close DLCI 1\n"); ++ TS0710_SIG2APLOGD(); ++ } ++ ts0710_close_channel(dlci); ++ } ++ ++ if (mux_tty[line] == 0) { ++ if ((mux_send_info_flags[line]) ++ && (mux_send_info[line]) ++ /*&& (mux_send_info[line]->filled == 0) */ ++ ) { ++ mux_send_info_flags[line] = 0; ++ kfree(mux_send_info[line]); ++ mux_send_info[line] = 0; ++ TS0710_DEBUG("Free mux_send_info for /dev/mux%d", line); ++ } ++ ++ if ((mux_recv_info_flags[line]) ++ && (mux_recv_info[line]) ++ && (mux_recv_info[line]->total == 0)) { ++ mux_recv_info_flags[line] = 0; ++ free_mux_recv_struct(mux_recv_info[line]); ++ mux_recv_info[line] = 0; ++ TS0710_DEBUG("Free mux_recv_info for /dev/mux%d", line); ++ } ++ ++ ts0710_flow_on(dlci, ts0710); ++ schedule_work(&post_recv_tqueue); ++ ++ wake_up_interruptible(&tty->read_wait); ++ wake_up_interruptible(&tty->write_wait); ++ tty->packet = 0; ++ } ++} ++ ++static void mux_throttle(struct tty_struct *tty) ++{ ++ ts0710_con *ts0710 = &ts0710_connection; ++ int line; ++ int i; ++ __u8 dlci; ++ ++ if (!tty) { ++ return; ++ } ++ ++ line = tty->index; ++ if ((line < 0) || (line >= NR_MUXS)) { ++ return; ++ } ++ ++ TS0710_DEBUG("Enter into %s, minor number is: %d\n", __FUNCTION__, ++ line); ++ ++ dlci = tty2dlci[line]; ++ if ((ts0710->dlci[0].state != CONNECTED) ++ && (ts0710->dlci[0].state != FLOW_STOPPED)) { ++ return; ++ } else if ((ts0710->dlci[dlci].state != CONNECTED) ++ && (ts0710->dlci[dlci].state != FLOW_STOPPED)) { ++ return; ++ } ++ ++ if (ts0710->dlci[dlci].flow_control) { ++ return; ++ } ++ ++ for (i = 0; i < 3; i++) { ++ if (ts0710_msc_msg ++ (ts0710, EA | FC | RTC | RTR | DV, MCC_CMD, dlci) < 0) { ++ continue; ++ } else { ++ TS0710_LOG("MUX Send Flow off on dlci %d\n", dlci); ++ ts0710->dlci[dlci].flow_control = 1; ++ break; ++ } ++ } ++} ++ ++static void mux_unthrottle(struct tty_struct *tty) ++{ ++ ts0710_con *ts0710 = &ts0710_connection; ++ int line; ++ __u8 dlci; ++ mux_recv_struct *recv_info; ++ ++ if (!tty) { ++ return; ++ } ++ line = tty->index; ++ if ((line < 0) || (line >= NR_MUXS)) { ++ return; ++ } ++ ++ if ((!mux_recv_info_flags[line]) || (!mux_recv_info[line])) { ++ return; ++ } ++ ++ TS0710_DEBUG("Enter into %s, minor number is: %d\n", __FUNCTION__, ++ line); ++ ++ recv_info = mux_recv_info[line]; ++ dlci = tty2dlci[line]; ++ ++ if (recv_info->total) { ++ recv_info->post_unthrottle = 1; ++ schedule_work(&post_recv_tqueue); ++ } else { ++ ts0710_flow_on(dlci, ts0710); ++ } ++} ++ ++static int mux_chars_in_buffer(struct tty_struct *tty) ++{ ++ ts0710_con *ts0710 = &ts0710_connection; ++ int retval; ++ int line; ++ __u8 dlci; ++ mux_send_struct *send_info; ++ ++ retval = TS0710MUX_MAX_CHARS_IN_BUF; ++ if (!tty) { ++ goto out; ++ } ++ line = tty->index; ++ if ((line < 0) || (line >= NR_MUXS)) { ++ goto out; ++ } ++ ++ dlci = tty2dlci[line]; ++ if (ts0710->dlci[0].state == FLOW_STOPPED) { ++ TS0710_DEBUG ++ ("Flow stopped on all channels, returning MAX chars in buffer\n"); ++ goto out; ++ } else if (ts0710->dlci[dlci].state == FLOW_STOPPED) { ++ TS0710_DEBUG("Flow stopped, returning MAX chars in buffer\n"); ++ goto out; ++ } else if (ts0710->dlci[dlci].state != CONNECTED) { ++ TS0710_DEBUG("DLCI %d not connected\n", dlci); ++ goto out; ++ } ++ ++ if (!(mux_send_info_flags[line])) { ++ goto out; ++ } ++ send_info = mux_send_info[line]; ++ if (!send_info) { ++ goto out; ++ } ++ if (send_info->filled) { ++ goto out; ++ } ++ ++ retval = 0; ++ ++ out: ++ return retval; ++} ++ ++static int mux_chars_in_serial_buffer(struct tty_struct *tty) ++{ ++ UNUSED_PARAM(tty); ++ ++ if ((COMM_FOR_MUX_DRIVER == 0) || (COMM_FOR_MUX_TTY == 0)) { ++ TS0710_PRINTK ++ ("MUX %s: (COMM_FOR_MUX_DRIVER == 0) || (COMM_FOR_MUX_TTY == 0)\n", ++ __FUNCTION__); ++ ++#ifndef USB_FOR_MUX ++ TS0710_PRINTK ++ ("MUX %s: tapisrv might be down!!! (serial_for_mux_driver == 0) || (serial_for_mux_tty == 0)\n", ++ __FUNCTION__); ++ TS0710_SIG2APLOGD(); ++#endif ++ ++ return 0; ++ } ++ return COMM_FOR_MUX_DRIVER->chars_in_buffer(COMM_FOR_MUX_TTY); ++} ++ ++static int mux_write(struct tty_struct *tty, ++ const unsigned char *buf, int count) ++{ ++ ts0710_con *ts0710 = &ts0710_connection; ++ int line; ++ __u8 dlci; ++ mux_send_struct *send_info; ++ __u8 *d_buf; ++ __u16 c; ++ __u8 post_recv; ++ ++ if (count <= 0) { ++ return 0; ++ } ++ ++ if (!tty) { ++ return 0; ++ } ++ ++ line = tty->index; ++ if ((line < 0) || (line >= NR_MUXS)) ++ return -ENODEV; ++ ++ dlci = tty2dlci[line]; ++ if (ts0710->dlci[0].state == FLOW_STOPPED) { ++ TS0710_DEBUG ++ ("Flow stopped on all channels, returning zero /dev/mux%d\n", ++ line); ++ return 0; ++ } else if (ts0710->dlci[dlci].state == FLOW_STOPPED) { ++ TS0710_DEBUG("Flow stopped, returning zero /dev/mux%d\n", line); ++ return 0; ++ } else if (ts0710->dlci[dlci].state == CONNECTED) { ++ ++ if (!(mux_send_info_flags[line])) { ++ TS0710_PRINTK ++ ("MUX Error: mux_write: mux_send_info_flags[%d] == 0\n", ++ line); ++ return -ENODEV; ++ } ++ send_info = mux_send_info[line]; ++ if (!send_info) { ++ TS0710_PRINTK ++ ("MUX Error: mux_write: mux_send_info[%d] == 0\n", ++ line); ++ return -ENODEV; ++ } ++ ++ c = min(count, (ts0710->dlci[dlci].mtu - 1)); ++ if (c <= 0) { ++ return 0; ++ } ++ ++ if (test_and_set_bit(BUF_BUSY, &send_info->flags)) ++ return 0; ++ ++ if (send_info->filled) { ++ clear_bit(BUF_BUSY, &send_info->flags); ++ return 0; ++ } ++ ++ d_buf = ((__u8 *) send_info->buf) + TS0710MUX_SEND_BUF_OFFSET; ++ memcpy(&d_buf[1], buf, c); ++ ++ TS0710_DEBUG("Prepare to send %d bytes from /dev/mux%d", c, ++ line); ++ if (iscmdtty[line]) { ++ TS0710_DEBUGSTR(&d_buf[1], c); ++ TS0710_DEBUG("CMDTAG"); ++ d_buf[0] = CMDTAG; ++ } else { ++ TS0710_DEBUG("DATATAG"); ++ d_buf[0] = DATATAG; ++ } ++ ++ TS0710_DEBUGHEX(d_buf, c + 1); ++ ++ send_info->frame = d_buf; ++ queue_uih(send_info, c + 1, ts0710, dlci); ++ send_info->filled = 1; ++ clear_bit(BUF_BUSY, &send_info->flags); ++ ++ post_recv = 0; ++ if (dlci == TS0710MUX_GPRS1_DLCI) { ++ if (add_count ++ (TS0710MUX_GPRS1_SEND_COUNT_IDX, c) < 0) { ++ post_recv_count_flag = 1; ++ post_recv = 1; ++ mux_data_count2[TS0710MUX_GPRS1_SEND_COUNT_IDX] ++ += c; ++ } ++ } else if (dlci == TS0710MUX_GPRS2_DLCI) { ++ if (add_count ++ (TS0710MUX_GPRS2_SEND_COUNT_IDX, c) < 0) { ++ post_recv_count_flag = 1; ++ post_recv = 1; ++ mux_data_count2[TS0710MUX_GPRS2_SEND_COUNT_IDX] ++ += c; ++ } ++ } ++ ++ if (post_recv) ++ schedule_work(&post_recv_tqueue); ++ ++ if (mux_chars_in_serial_buffer(COMM_FOR_MUX_TTY) == 0) { ++ /* Sending bottom half should be ++ run after return from this function */ ++ mux_sched_send(); ++ } ++ return c; ++ } else { ++ TS0710_PRINTK("MUX mux_write: DLCI %d not connected\n", dlci); ++ return -EDISCONNECTED; ++ } ++} ++ ++static int mux_write_room(struct tty_struct *tty) ++{ ++ ts0710_con *ts0710 = &ts0710_connection; ++ int retval; ++ int line; ++ __u8 dlci; ++ mux_send_struct *send_info; ++ ++ retval = 0; ++ if (!tty) { ++ goto out; ++ } ++ line = tty->index; ++ if ((line < 0) || (line >= NR_MUXS)) { ++ goto out; ++ } ++ ++ dlci = tty2dlci[line]; ++ if (ts0710->dlci[0].state == FLOW_STOPPED) { ++ TS0710_DEBUG("Flow stopped on all channels, returning ZERO\n"); ++ goto out; ++ } else if (ts0710->dlci[dlci].state == FLOW_STOPPED) { ++ TS0710_DEBUG("Flow stopped, returning ZERO\n"); ++ goto out; ++ } else if (ts0710->dlci[dlci].state != CONNECTED) { ++ TS0710_DEBUG("DLCI %d not connected\n", dlci); ++ goto out; ++ } ++ ++ if (!(mux_send_info_flags[line])) { ++ goto out; ++ } ++ send_info = mux_send_info[line]; ++ if (!send_info) { ++ goto out; ++ } ++ if (send_info->filled) { ++ goto out; ++ } ++ ++ retval = ts0710->dlci[dlci].mtu - 1; ++ ++ out: ++ return retval; ++} ++ ++static int mux_ioctl(struct tty_struct *tty, struct file *file, ++ unsigned int cmd, unsigned long arg) ++{ ++ ts0710_con *ts0710 = &ts0710_connection; ++ int line; ++ __u8 dlci; ++ ++ UNUSED_PARAM(file); ++ UNUSED_PARAM(arg); ++ ++ if (!tty) { ++ return -EIO; ++ } ++ line = tty->index; ++ if ((line < 0) || (line >= NR_MUXS)) { ++ return -ENODEV; ++ } ++ ++ dlci = tty2dlci[line]; ++ switch (cmd) { ++ case TS0710MUX_IO_MSC_HANGUP: ++ if (ts0710_msc_msg(ts0710, EA | RTR | DV, MCC_CMD, dlci) < 0) { ++ return -EAGAIN; ++ } else { ++ return 0; ++ } ++ ++ case TS0710MUX_IO_TEST_CMD: ++ return ts0710_exec_test_cmd(); ++/* ++ case TS0710MUX_IO_DLCI_FC_ON: ++ if( line == 0 ) { ++ break; ++ } ++ if( ts0710_msc_msg(ts0710, EA | RTC | RTR | DV, MCC_CMD, (__u8)line) < 0) { ++ return -EAGAIN; ++ } else { ++ return 0; ++ } ++ ++ case TS0710MUX_IO_DLCI_FC_OFF: ++ if( line == 0 ) { ++ break; ++ } ++ if( ts0710_msc_msg(ts0710, EA | FC | RTC | RTR | DV, MCC_CMD, (__u8)line) < 0) { ++ return -EAGAIN; ++ } else { ++ return 0; ++ } ++ ++ case TS0710MUX_IO_FC_ON: ++ if( line != 0 ) { ++ break; ++ } ++ if( ts0710_fcon_msg(ts0710, MCC_CMD) < 0) { ++ return -EAGAIN; ++ } else { ++ return 0; ++ } ++ ++ case TS0710MUX_IO_FC_OFF: ++ if( line != 0 ) { ++ break; ++ } ++ if( ts0710_fcoff_msg(ts0710, MCC_CMD) < 0) { ++ return -EAGAIN; ++ } else { ++ return 0; ++ } ++*/ ++ default: ++ break; ++ } ++ return -ENOIOCTLCMD; ++} ++ ++static void mux_flush_buffer(struct tty_struct *tty) ++{ ++ int line; ++ ++ if (!tty) { ++ return; ++ } ++ ++ line = tty->index; ++ if ((line < 0) || (line >= NR_MUXS)) { ++ return; ++ } ++ ++ TS0710_PRINTK("MUX %s: line is:%d\n", __FUNCTION__, line); ++ ++ if ((mux_send_info_flags[line]) ++ && (mux_send_info[line]) ++ && (mux_send_info[line]->filled)) { ++ ++ mux_send_info[line]->filled = 0; ++ } ++ ++ wake_up_interruptible(&tty->write_wait); ++#ifdef SERIAL_HAVE_POLL_WAIT ++ wake_up_interruptible(&tty->poll_wait); ++#endif ++ if ((tty->flags & (1 << TTY_DO_WRITE_WAKEUP)) && ++ tty->ldisc.write_wakeup) { ++ (tty->ldisc.write_wakeup) (tty); ++ } ++ ++/* ++ if( (COMM_FOR_MUX_DRIVER == 0) || (COMM_FOR_MUX_TTY == 0) ) { ++ TS0710_PRINTK("MUX %s: (COMM_FOR_MUX_DRIVER == 0) || (COMM_FOR_MUX_TTY == 0)\n", __FUNCTION__); ++ ++#ifndef USB_FOR_MUX ++ TS0710_PRINTK("MUX %s: tapisrv might be down!!! (serial_for_mux_driver == 0) || (serial_for_mux_tty == 0)\n", __FUNCTION__); ++ TS0710_SIG2APLOGD(); ++#endif ++ ++ return; ++ } ++ return COMM_FOR_MUX_DRIVER->flush_buffer(COMM_FOR_MUX_TTY); ++*/ ++} ++ ++static int mux_open(struct tty_struct *tty, struct file *filp) ++{ ++ int retval; ++ int line; ++ __u8 dlci; ++ __u8 cmdtty; ++ __u8 datatty; ++ mux_send_struct *send_info; ++ mux_recv_struct *recv_info; ++ ++ UNUSED_PARAM(filp); ++ ++ retval = -ENODEV; ++ if ((COMM_FOR_MUX_DRIVER == NULL) || (COMM_FOR_MUX_TTY == NULL)) { ++ ++#ifdef USB_FOR_MUX ++ TS0710_PRINTK("MUX: please install and open IPC-USB first\n"); ++#else ++ TS0710_PRINTK("MUX: please install and open ttyS0 first\n"); ++#endif ++ ++ goto out; ++ } ++ ++ if (!tty) { ++ goto out; ++ } ++ line = tty->index; ++ if ((line < 0) || (line >= NR_MUXS)) { ++ goto out; ++ } ++#ifdef TS0710SERVER ++ /* do nothing as a server */ ++ mux_tty[line]++; ++ retval = 0; ++#else ++ mux_tty[line]++; ++ dlci = tty2dlci[line]; ++ ++/* if( dlci == 1 ) { */ ++ /* Open server channel 0 first */ ++ if ((retval = ts0710_open_channel(0)) != 0) { ++ TS0710_PRINTK("MUX: Can't connect server channel 0!\n"); ++ ts0710_init(); ++ ++ mux_tty[line]--; ++ goto out; ++ } ++/* } */ ++ ++ /* Allocate memory first. As soon as connection has been established, MUX may receive */ ++ if (mux_send_info_flags[line] == 0) { ++ send_info = ++ (mux_send_struct *) kmalloc(sizeof(mux_send_struct), ++ GFP_KERNEL); ++ if (!send_info) { ++ retval = -ENOMEM; ++ ++ mux_tty[line]--; ++ goto out; ++ } ++ send_info->length = 0; ++ send_info->flags = 0; ++ send_info->filled = 0; ++ mux_send_info[line] = send_info; ++ mux_send_info_flags[line] = 1; ++ TS0710_DEBUG("Allocate mux_send_info for /dev/mux%d", line); ++ } ++ ++ if (mux_recv_info_flags[line] == 0) { ++ recv_info = ++ (mux_recv_struct *) kmalloc(sizeof(mux_recv_struct), ++ GFP_KERNEL); ++ if (!recv_info) { ++ mux_send_info_flags[line] = 0; ++ kfree(mux_send_info[line]); ++ mux_send_info[line] = 0; ++ TS0710_DEBUG("Free mux_send_info for /dev/mux%d", line); ++ retval = -ENOMEM; ++ ++ mux_tty[line]--; ++ goto out; ++ } ++ recv_info->length = 0; ++ recv_info->total = 0; ++ recv_info->mux_packet = 0; ++ recv_info->next = 0; ++ recv_info->no_tty = line; ++ recv_info->post_unthrottle = 0; ++ mux_recv_info[line] = recv_info; ++ mux_recv_info_flags[line] = 1; ++ TS0710_DEBUG("Allocate mux_recv_info for /dev/mux%d", line); ++ } ++ ++ /* Now establish DLCI connection */ ++ cmdtty = dlci2tty[dlci].cmdtty; ++ datatty = dlci2tty[dlci].datatty; ++ if ((mux_tty[cmdtty] > 0) || (mux_tty[datatty] > 0)) { ++ if ((retval = ts0710_open_channel(dlci)) != 0) { ++ TS0710_PRINTK("MUX: Can't connected channel %d!\n", ++ dlci); ++ ts0710_reset_dlci(dlci); ++ ++ mux_send_info_flags[line] = 0; ++ kfree(mux_send_info[line]); ++ mux_send_info[line] = 0; ++ TS0710_DEBUG("Free mux_send_info for /dev/mux%d", line); ++ ++ mux_recv_info_flags[line] = 0; ++ free_mux_recv_struct(mux_recv_info[line]); ++ mux_recv_info[line] = 0; ++ TS0710_DEBUG("Free mux_recv_info for /dev/mux%d", line); ++ ++ mux_tty[line]--; ++ goto out; ++ } ++ } ++ ++ retval = 0; ++#endif ++ out: ++ return retval; ++} ++ ++/* mux dispatcher, call from serial.c receiver_chars() */ ++void mux_dispatcher(struct tty_struct *tty) ++{ ++ UNUSED_PARAM(tty); ++ ++ schedule_work(&receive_tqueue); ++} ++ ++/*For BP UART problem Begin*/ ++#ifdef TS0710SEQ2 ++static int send_ack(ts0710_con * ts0710, __u8 seq_num, __u8 bp_seq1, ++ __u8 bp_seq2) ++#else ++static int send_ack(ts0710_con * ts0710, __u8 seq_num) ++#endif ++{ ++ __u8 buf[20]; ++ short_frame *ack; ++ ++#ifdef TS0710SEQ2 ++ static __u16 ack_seq = 0; ++#endif ++ ++ ack = (short_frame *) (buf + 1); ++ ack->h.addr.ea = 1; ++ ack->h.addr.cr = ((ts0710->initiator) & 0x1); ++ ack->h.addr.d = 0; ++ ack->h.addr.server_chn = 0; ++ ack->h.control = ACK; ++ ack->h.length.ea = 1; ++ ++#ifdef TS0710SEQ2 ++ ack->h.length.len = 5; ++ ack->data[0] = seq_num; ++ ack->data[1] = bp_seq1; ++ ack->data[2] = bp_seq2; ++ ack->data[3] = (ack_seq & 0xFF); ++ ack->data[4] = (ack_seq >> 8) & 0xFF; ++ ack_seq++; ++ ack->data[5] = crc_calc((__u8 *) ack, SHORT_CRC_CHECK); ++#else ++ ack->h.length.len = 1; ++ ack->data[0] = seq_num; ++ ack->data[1] = crc_calc((__u8 *) ack, SHORT_CRC_CHECK); ++#endif ++ ++ return basic_write(ts0710, buf, ++ (sizeof(short_frame) + FCS_SIZE + ++ ack->h.length.len)); ++} ++ ++/*For BP UART problem End*/ ++ ++static void receive_worker(void *private_) ++{ ++ struct tty_struct *tty = COMM_FOR_MUX_TTY; ++ int i, count; ++ static unsigned char tbuf[TS0710MUX_MAX_BUF_SIZE]; ++ static unsigned char *tbuf_ptr = &tbuf[0]; ++ static unsigned char *start_flag = 0; ++ unsigned char *search, *to, *from; ++ short_frame *short_pkt; ++ long_frame *long_pkt; ++ static int framelen = -1; ++ ++ /*For BP UART problem Begin */ ++ static __u8 expect_seq = 0; ++ __u32 crc_error; ++ __u8 *uih_data_start; ++ __u32 uih_len; ++ /*For BP UART problem End */ ++ ++ UNUSED_PARAM(private_); ++ ++ if (!tty) ++ return; ++ ++#ifdef USB_FOR_MUX ++ TS0710_DEBUG("Receive following bytes from IPC-USB"); ++#else ++ TS0710_DEBUG("Receive following bytes from UART"); ++#endif ++ ++ TS0710_DEBUGHEX(cp, count); ++ ++ if (count > (TS0710MUX_MAX_BUF_SIZE - (tbuf_ptr - tbuf))) { ++ TS0710_PRINTK ++ ("MUX receive_worker: !!!!! Exceed buffer boundary !!!!!\n"); ++ count = (TS0710MUX_MAX_BUF_SIZE - (tbuf_ptr - tbuf)); ++ } ++ ++ count = tty_buffer_request_room(tty, count); ++ ++ for (i = 0; i < count; i++) ++ tty_insert_flip_char(tty, tbuf_ptr[i], TTY_NORMAL); ++ ++ tbuf_ptr += count; ++ search = &tbuf[0]; ++ ++ if (test_and_set_bit(RECV_RUNNING, &mux_recv_flags)) { ++ schedule_work(&receive_tqueue); ++ return; ++ } ++ ++ if ((start_flag != 0) && (framelen != -1)) { ++ if ((tbuf_ptr - start_flag) < framelen) { ++ clear_bit(RECV_RUNNING, &mux_recv_flags); ++ return; ++ } ++ } ++ ++ while (1) { ++ if (start_flag == 0) { /* Frame Start Flag not found */ ++ framelen = -1; ++ while (search < tbuf_ptr) { ++ if (*search == TS0710_BASIC_FLAG) { ++ start_flag = search; ++ break; ++ } ++#ifdef TS0710LOG ++ else { ++ TS0710_LOG(">S %02x %c\n", *search, ++ *search); ++ } ++#endif ++ ++ search++; ++ } ++ ++ if (start_flag == 0) { ++ tbuf_ptr = &tbuf[0]; ++ break; ++ } ++ } else { /* Frame Start Flag found */ ++ /* 1 start flag + 1 address + 1 control + 1 or 2 length + lengths data + 1 FCS + 1 end flag */ ++ /* For BP UART problem 1 start flag + 1 seq_num + 1 address + ...... */ ++ /*if( (framelen == -1) && ((tbuf_ptr - start_flag) > TS0710_MAX_HDR_SIZE) ) */ ++ if ((framelen == -1) && ((tbuf_ptr - start_flag) > (TS0710_MAX_HDR_SIZE + SEQ_FIELD_SIZE))) { /*For BP UART problem */ ++ /*short_pkt = (short_frame *) (start_flag + 1); */ ++ short_pkt = (short_frame *) (start_flag + ADDRESS_FIELD_OFFSET); /*For BP UART problem */ ++ if (short_pkt->h.length.ea == 1) { /* short frame */ ++ /*framelen = TS0710_MAX_HDR_SIZE + short_pkt->h.length.len + 1; */ ++ framelen = TS0710_MAX_HDR_SIZE + short_pkt->h.length.len + 1 + SEQ_FIELD_SIZE; /*For BP UART problem */ ++ } else { /* long frame */ ++ /*long_pkt = (long_frame *) (start_flag + 1); */ ++ long_pkt = (long_frame *) (start_flag + ADDRESS_FIELD_OFFSET); /*For BP UART problem */ ++ /*framelen = TS0710_MAX_HDR_SIZE + GET_LONG_LENGTH( long_pkt->h.length ) + 2; */ ++ framelen = TS0710_MAX_HDR_SIZE + GET_LONG_LENGTH(long_pkt->h.length) + 2 + SEQ_FIELD_SIZE; /*For BP UART problem */ ++ } ++ ++ /*if( framelen > TS0710MUX_MAX_TOTAL_FRAME_SIZE ) { */ ++ if (framelen > (TS0710MUX_MAX_TOTAL_FRAME_SIZE + SEQ_FIELD_SIZE)) { /*For BP UART problem */ ++ TS0710_LOGSTR_FRAME(0, start_flag, ++ (tbuf_ptr - ++ start_flag)); ++ TS0710_PRINTK ++ ("MUX Error: %s: frame length:%d is bigger than Max total frame size:%d\n", ++ /*__FUNCTION__, framelen, TS0710MUX_MAX_TOTAL_FRAME_SIZE);*/ ++ __FUNCTION__, framelen, (TS0710MUX_MAX_TOTAL_FRAME_SIZE + SEQ_FIELD_SIZE)); /*For BP UART problem */ ++ search = start_flag + 1; ++ start_flag = 0; ++ framelen = -1; ++ continue; ++ } ++ } ++ ++ if ((framelen != -1) ++ && ((tbuf_ptr - start_flag) >= framelen)) { ++ if (*(start_flag + framelen - 1) == TS0710_BASIC_FLAG) { /* OK, We got one frame */ ++ ++ /*For BP UART problem Begin */ ++ TS0710_LOGSTR_FRAME(0, start_flag, ++ framelen); ++ TS0710_DEBUGHEX(start_flag, framelen); ++ ++ short_pkt = ++ (short_frame *) (start_flag + ++ ADDRESS_FIELD_OFFSET); ++ if ((short_pkt->h.length.ea) == 0) { ++ long_pkt = ++ (long_frame *) (start_flag + ++ ADDRESS_FIELD_OFFSET); ++ uih_len = ++ GET_LONG_LENGTH(long_pkt->h. ++ length); ++ uih_data_start = ++ long_pkt->h.data; ++ ++ crc_error = ++ crc_check((__u8 ++ *) (start_flag + ++ SLIDE_BP_SEQ_OFFSET), ++ LONG_CRC_CHECK + ++ 1, ++ *(uih_data_start + ++ uih_len)); ++ } else { ++ uih_len = ++ short_pkt->h.length.len; ++ uih_data_start = ++ short_pkt->data; ++ ++ crc_error = ++ crc_check((__u8 ++ *) (start_flag + ++ SLIDE_BP_SEQ_OFFSET), ++ SHORT_CRC_CHECK + ++ 1, ++ *(uih_data_start + ++ uih_len)); ++ } ++ ++ if (!crc_error) { ++ if (expect_seq == ++ *(start_flag + ++ SLIDE_BP_SEQ_OFFSET)) { ++ expect_seq++; ++ if (expect_seq >= 4) { ++ expect_seq = 0; ++ } ++#ifdef TS0710SEQ2 ++ send_ack ++ (&ts0710_connection, ++ expect_seq, ++ *(start_flag + ++ FIRST_BP_SEQ_OFFSET), ++ *(start_flag + ++ SECOND_BP_SEQ_OFFSET)); ++#else ++ send_ack ++ (&ts0710_connection, ++ expect_seq); ++#endif ++ ++ ts0710_recv_data ++ (&ts0710_connection, ++ start_flag + ++ ADDRESS_FIELD_OFFSET, ++ framelen - 2 - ++ SEQ_FIELD_SIZE); ++ } else { ++ ++#ifdef TS0710DEBUG ++ if (* ++ (start_flag + ++ SLIDE_BP_SEQ_OFFSET) ++ != 0x9F) { ++#endif ++ ++ TS0710_LOG ++ ("MUX sequence number %d is not expected %d, discard data!\n", ++ * ++ (start_flag ++ + ++ SLIDE_BP_SEQ_OFFSET), ++ expect_seq); ++ ++#ifdef TS0710SEQ2 ++ send_ack ++ (&ts0710_connection, ++ expect_seq, ++ * ++ (start_flag ++ + ++ FIRST_BP_SEQ_OFFSET), ++ * ++ (start_flag ++ + ++ SECOND_BP_SEQ_OFFSET)); ++#else ++ send_ack ++ (&ts0710_connection, ++ expect_seq); ++#endif ++ ++#ifdef TS0710DEBUG ++ } else { ++ *(uih_data_start ++ + uih_len) = ++ 0; ++ TS0710_PRINTK ++ ("MUX bp log: %s\n", ++ uih_data_start); ++ } ++#endif ++ ++ } ++ } else { /* crc_error */ ++ search = start_flag + 1; ++ start_flag = 0; ++ framelen = -1; ++ continue; ++ } /*End if(!crc_error) */ ++ ++ /*For BP UART problem End */ ++ ++/*For BP UART problem ++ TS0710_LOGSTR_FRAME(0, start_flag, framelen); ++ TS0710_DEBUGHEX(start_flag, framelen); ++ ts0710_recv_data(&ts0710_connection, start_flag + 1, framelen - 2); ++*/ ++ search = start_flag + framelen; ++ } else { ++ TS0710_LOGSTR_FRAME(0, start_flag, ++ framelen); ++ TS0710_DEBUGHEX(start_flag, framelen); ++ TS0710_PRINTK ++ ("MUX: Lost synchronization!\n"); ++ search = start_flag + 1; ++ } ++ ++ start_flag = 0; ++ framelen = -1; ++ continue; ++ } ++ ++ if (start_flag != &tbuf[0]) { ++ to = tbuf; ++ from = start_flag; ++ count = tbuf_ptr - start_flag; ++ while (count--) { ++ *to++ = *from++; ++ } ++ ++ tbuf_ptr -= (start_flag - tbuf); ++ start_flag = tbuf; ++ } ++ break; ++ } /* End Frame Start Flag found */ ++ } /* End while(1) */ ++ ++ clear_bit(RECV_RUNNING, &mux_recv_flags); ++} ++ ++static void post_recv_worker(void *private_) ++{ ++ ts0710_con *ts0710 = &ts0710_connection; ++ int tty_idx; ++ struct tty_struct *tty; ++ __u8 post_recv; ++ __u8 flow_control; ++ __u8 dlci; ++ mux_recv_struct *recv_info, *recv_info2, *post_recv_q; ++ int recv_room; ++ mux_recv_packet *recv_packet, *recv_packet2; ++ __u8 j; ++ ++ UNUSED_PARAM(private_); ++ ++ if (test_and_set_bit(RECV_RUNNING, &mux_recv_flags)) { ++ schedule_work(&post_recv_tqueue); ++ return; ++ } ++ ++ TS0710_DEBUG("Enter into post_recv_worker"); ++ ++ post_recv = 0; ++ if (!mux_recv_queue) { ++ goto out; ++ } ++ ++ post_recv_q = NULL; ++ recv_info2 = mux_recv_queue; ++ while ((recv_info = recv_info2)) { ++ recv_info2 = recv_info->next; ++ ++ if (!(recv_info->total)) { ++ TS0710_PRINTK ++ ("MUX Error: %s: Should not get here, recv_info->total == 0 \n", ++ __FUNCTION__); ++ continue; ++ } ++ ++ tty_idx = recv_info->no_tty; ++ dlci = tty2dlci[tty_idx]; ++ tty = mux_table[tty_idx]; ++ if ((!mux_tty[tty_idx]) || (!tty)) { ++ TS0710_PRINTK ++ ("MUX: No application waiting for, free recv_info! tty_idx:%d\n", ++ tty_idx); ++ mux_recv_info_flags[tty_idx] = 0; ++ free_mux_recv_struct(mux_recv_info[tty_idx]); ++ mux_recv_info[tty_idx] = 0; ++ ts0710_flow_on(dlci, ts0710); ++ continue; ++ } ++ ++ TS0710_DEBUG("/dev/mux%d recv_info->total is: %d", tty_idx, ++ recv_info->total); ++ ++ if (test_bit(TTY_THROTTLED, &tty->flags)) { ++ add_post_recv_queue(&post_recv_q, recv_info); ++ continue; ++ } else if (test_bit(TTY_DONT_FLIP, &tty->flags)) { ++ post_recv = 1; ++ add_post_recv_queue(&post_recv_q, recv_info); ++ continue; ++ } ++ ++ flow_control = 0; ++ recv_packet2 = recv_info->mux_packet; ++ while (recv_info->total) { ++ recv_room = 65535; ++ if (tty->receive_room) ++ recv_room = tty->receive_room; ++ ++ if (recv_info->length) { ++ if (recv_room < recv_info->length) { ++ flow_control = 1; ++ break; ++ } ++ ++ /* Put queued data into read buffer of tty */ ++ TS0710_DEBUG ++ ("Put queued recv data into read buffer of /dev/mux%d", ++ tty_idx); ++ TS0710_DEBUGHEX(recv_info->data, ++ recv_info->length); ++ (tty->ldisc.receive_buf) (tty, recv_info->data, ++ NULL, ++ recv_info->length); ++ recv_info->total -= recv_info->length; ++ recv_info->length = 0; ++ } else { /* recv_info->length == 0 */ ++ if ((recv_packet = recv_packet2)) { ++ recv_packet2 = recv_packet->next; ++ ++ if (recv_room < recv_packet->length) { ++ flow_control = 1; ++ recv_info->mux_packet = ++ recv_packet; ++ break; ++ } ++ ++ /* Put queued data into read buffer of tty */ ++ TS0710_DEBUG ++ ("Put queued recv data into read buffer of /dev/mux%d", ++ tty_idx); ++ TS0710_DEBUGHEX(recv_packet->data, ++ recv_packet->length); ++ (tty->ldisc.receive_buf) (tty, ++ recv_packet-> ++ data, NULL, ++ recv_packet-> ++ length); ++ recv_info->total -= recv_packet->length; ++ free_mux_recv_packet(recv_packet); ++ } else { ++ TS0710_PRINTK ++ ("MUX Error: %s: Should not get here, recv_info->total is:%u \n", ++ __FUNCTION__, recv_info->total); ++ } ++ } /* End recv_info->length == 0 */ ++ } /* End while( recv_info->total ) */ ++ ++ if (!(recv_info->total)) { ++ /* Important clear */ ++ recv_info->mux_packet = 0; ++ ++ if (recv_info->post_unthrottle) { ++ /* Do something for post_unthrottle */ ++ ts0710_flow_on(dlci, ts0710); ++ recv_info->post_unthrottle = 0; ++ } ++ } else { ++ add_post_recv_queue(&post_recv_q, recv_info); ++ ++ if (flow_control) { ++ /* Do something for flow control */ ++ if (recv_info->post_unthrottle) { ++ set_bit(TTY_THROTTLED, &tty->flags); ++ recv_info->post_unthrottle = 0; ++ } else { ++ ts0710_flow_off(tty, dlci, ts0710); ++ } ++ } /* End if( flow_control ) */ ++ } ++ } /* End while( (recv_info = recv_info2) ) */ ++ ++ mux_recv_queue = post_recv_q; ++ ++ out: ++ if (post_recv_count_flag) { ++ post_recv_count_flag = 0; ++ for (j = 0; j < TS0710MUX_COUNT_IDX_NUM; j++) { ++ if (mux_data_count2[j] > 0) { ++ if (add_count(j, mux_data_count2[j]) == 0) { ++ mux_data_count2[j] = 0; ++ } else { ++ post_recv_count_flag = 1; ++ post_recv = 1; ++ } ++ } ++ } /* End for (j = 0; j < TS0710MUX_COUNT_IDX_NUM; j++) */ ++ } ++ /* End if( post_recv_count_flag ) */ ++ if (post_recv) ++ schedule_work(&post_recv_tqueue); ++ clear_bit(RECV_RUNNING, &mux_recv_flags); ++} ++ ++/* mux sender, call from serial.c transmit_chars() */ ++void mux_sender(void) ++{ ++ mux_send_struct *send_info; ++ int chars; ++ __u8 idx; ++ ++ chars = mux_chars_in_serial_buffer(COMM_FOR_MUX_TTY); ++ if (!chars) { ++ /* chars == 0 */ ++ TS0710_LOG("<[]\n"); ++ mux_sched_send(); ++ return; ++ } ++ ++ idx = mux_send_info_idx; ++ if ((idx < NR_MUXS) && (mux_send_info_flags[idx])) { ++ send_info = mux_send_info[idx]; ++ if ((send_info) ++ && (send_info->filled) ++ && (send_info->length <= ++ (TS0710MUX_SERIAL_BUF_SIZE - chars))) { ++ ++ mux_sched_send(); ++ } ++ } ++} ++ ++static void send_worker(void *private_) ++{ ++ ts0710_con *ts0710 = &ts0710_connection; ++ __u8 j; ++ mux_send_struct *send_info; ++ int chars; ++ struct tty_struct *tty; ++ __u8 dlci; ++ ++ UNUSED_PARAM(private_); ++ ++ TS0710_DEBUG("Enter into send_worker"); ++ ++ mux_send_info_idx = NR_MUXS; ++ ++ if (ts0710->dlci[0].state == FLOW_STOPPED) { ++ TS0710_DEBUG("Flow stopped on all channels\n"); ++ return; ++ } ++ ++ for (j = 0; j < NR_MUXS; j++) { ++ ++ if (!(mux_send_info_flags[j])) { ++ continue; ++ } ++ ++ send_info = mux_send_info[j]; ++ if (!send_info) { ++ continue; ++ } ++ ++ if (!(send_info->filled)) { ++ continue; ++ } ++ ++ dlci = tty2dlci[j]; ++ if (ts0710->dlci[dlci].state == FLOW_STOPPED) { ++ TS0710_DEBUG("Flow stopped on channel DLCI: %d\n", ++ dlci); ++ continue; ++ } else if (ts0710->dlci[dlci].state != CONNECTED) { ++ TS0710_DEBUG("DLCI %d not connected\n", dlci); ++ send_info->filled = 0; ++ continue; ++ } ++ ++ chars = mux_chars_in_serial_buffer(COMM_FOR_MUX_TTY); ++ if (send_info->length <= (TS0710MUX_SERIAL_BUF_SIZE - chars)) { ++ TS0710_DEBUG("Send queued UIH for /dev/mux%d", j); ++ basic_write(ts0710, (__u8 *) send_info->frame, ++ send_info->length); ++ send_info->length = 0; ++ send_info->filled = 0; ++ } else { ++ mux_send_info_idx = j; ++ break; ++ } ++ } /* End for() loop */ ++ ++ /* Queue UIH data to be transmitted */ ++ for (j = 0; j < NR_MUXS; j++) { ++ ++ if (!(mux_send_info_flags[j])) { ++ continue; ++ } ++ ++ send_info = mux_send_info[j]; ++ if (!send_info) { ++ continue; ++ } ++ ++ if (send_info->filled) { ++ continue; ++ } ++ ++ /* Now queue UIH data to send_info->buf */ ++ ++ if (!mux_tty[j]) { ++ continue; ++ } ++ ++ tty = mux_table[j]; ++ if (!tty) { ++ continue; ++ } ++ ++ dlci = tty2dlci[j]; ++ if (ts0710->dlci[dlci].state == FLOW_STOPPED) { ++ TS0710_DEBUG("Flow stopped on channel DLCI: %d\n", ++ dlci); ++ continue; ++ } else if (ts0710->dlci[dlci].state != CONNECTED) { ++ TS0710_DEBUG("DLCI %d not connected\n", dlci); ++ continue; ++ } ++ ++ if ((tty->flags & (1 << TTY_DO_WRITE_WAKEUP)) ++ && tty->ldisc.write_wakeup) { ++ (tty->ldisc.write_wakeup) (tty); ++ } ++ wake_up_interruptible(&tty->write_wait); ++ ++#ifdef SERIAL_HAVE_POLL_WAIT ++ wake_up_interruptible(&tty->poll_wait); ++#endif ++ ++ if (send_info->filled) { ++ if (j < mux_send_info_idx) { ++ mux_send_info_idx = j; ++ } ++ } ++ } /* End for() loop */ ++} ++ ++static int get_count(__u8 idx) ++{ ++ int ret; ++ ++ if (idx > TS0710MUX_COUNT_MAX_IDX) { ++ TS0710_PRINTK("MUX get_count: invalid idx: %d!\n", idx); ++ return -1; ++ } ++ ++ down(&mux_data_count_mutex[idx]); ++ ret = mux_data_count[idx]; ++ up(&mux_data_count_mutex[idx]); ++ ++ return ret; ++} ++ ++static int set_count(__u8 idx, int count) ++{ ++ if (idx > TS0710MUX_COUNT_MAX_IDX) { ++ TS0710_PRINTK("MUX set_count: invalid idx: %d!\n", idx); ++ return -1; ++ } ++ if (count < 0) { ++ TS0710_PRINTK("MUX set_count: invalid count: %d!\n", count); ++ return -1; ++ } ++ ++ down(&mux_data_count_mutex[idx]); ++ mux_data_count[idx] = count; ++ up(&mux_data_count_mutex[idx]); ++ ++ return 0; ++} ++ ++static int add_count(__u8 idx, int count) ++{ ++ if (idx > TS0710MUX_COUNT_MAX_IDX) { ++ TS0710_PRINTK("MUX add_count: invalid idx: %d!\n", idx); ++ return -1; ++ } ++ if (count <= 0) { ++ TS0710_PRINTK("MUX add_count: invalid count: %d!\n", count); ++ return -1; ++ } ++ ++ if (down_trylock(&mux_data_count_mutex[idx])) ++ return -1; ++ mux_data_count[idx] += count; ++ up(&mux_data_count_mutex[idx]); ++ ++ return 0; ++} ++ ++ssize_t file_proc_read(struct file * file, char *buf, size_t size, ++ loff_t * ppos) ++{ ++ gprs_bytes gprsData[TS0710MUX_GPRS_SESSION_MAX]; ++ int bufLen = sizeof(gprs_bytes) * TS0710MUX_GPRS_SESSION_MAX; ++ ++ UNUSED_PARAM(file); ++ UNUSED_PARAM(size); ++ UNUSED_PARAM(ppos); ++ ++ gprsData[0].recvBytes = get_count(TS0710MUX_GPRS1_RECV_COUNT_IDX); ++ gprsData[0].sentBytes = get_count(TS0710MUX_GPRS1_SEND_COUNT_IDX); ++ gprsData[TS0710MUX_GPRS_SESSION_MAX - 1].recvBytes = ++ get_count(TS0710MUX_GPRS2_RECV_COUNT_IDX); ++ gprsData[TS0710MUX_GPRS_SESSION_MAX - 1].sentBytes = ++ get_count(TS0710MUX_GPRS2_SEND_COUNT_IDX); ++ ++ copy_to_user(buf, gprsData, bufLen); ++ ++ return bufLen; ++} ++ ++ssize_t file_proc_write(struct file * file, const char *buf, size_t count, ++ loff_t * ppos) ++{ ++ gprs_bytes gprsData[TS0710MUX_GPRS_SESSION_MAX]; ++ int bufLen = sizeof(gprs_bytes) * TS0710MUX_GPRS_SESSION_MAX; ++ ++ UNUSED_PARAM(file); ++ UNUSED_PARAM(count); ++ UNUSED_PARAM(ppos); ++ ++ memset(gprsData, 0, bufLen); ++ ++ copy_from_user(gprsData, buf, bufLen); ++ ++ set_count(TS0710MUX_GPRS1_RECV_COUNT_IDX, gprsData[0].recvBytes); ++ set_count(TS0710MUX_GPRS1_SEND_COUNT_IDX, gprsData[0].sentBytes); ++ set_count(TS0710MUX_GPRS2_RECV_COUNT_IDX, ++ gprsData[TS0710MUX_GPRS_SESSION_MAX - 1].recvBytes); ++ set_count(TS0710MUX_GPRS2_SEND_COUNT_IDX, ++ gprsData[TS0710MUX_GPRS_SESSION_MAX - 1].sentBytes); ++ ++ return bufLen; ++} ++ ++static void gprs_proc_init(void) ++{ ++ gprs_proc_file = ++ create_proc_entry("gprsbytes", S_IRUSR | S_IWUSR, NULL); ++ gprs_proc_file->proc_fops = &file_proc_operations; ++} ++ ++static void gprs_proc_exit(void) ++{ ++ remove_proc_entry("gprsbytes", gprs_proc_file); ++} ++ ++static int __init mux_init(void) ++{ ++ __u8 j; ++ ++ if (COMM_FOR_MUX_DRIVER == NULL) { ++ ++#ifdef USB_FOR_MUX ++ panic("please install IPC-USB first\n"); ++#else ++ panic("please install ttyS0 first\n"); ++#endif ++ ++ } ++ ++ ts0710_init(); ++ ++ for (j = 0; j < NR_MUXS; j++) { ++ mux_send_info_flags[j] = 0; ++ mux_send_info[j] = 0; ++ mux_recv_info_flags[j] = 0; ++ mux_recv_info[j] = 0; ++ } ++ mux_send_info_idx = NR_MUXS; ++ mux_recv_queue = NULL; ++ mux_recv_flags = 0; ++ ++ for (j = 0; j < TS0710MUX_COUNT_IDX_NUM; j++) { ++ mux_data_count[j] = 0; ++ mux_data_count2[j] = 0; ++ init_MUTEX(&mux_data_count_mutex[j]); ++ } ++ post_recv_count_flag = 0; ++ ++ INIT_WORK(&send_tqueue, send_worker, NULL); ++ INIT_WORK(&receive_tqueue, receive_worker, NULL); ++ INIT_WORK(&post_recv_tqueue, post_recv_worker, NULL); ++ ++ memset(&mux_driver, 0, sizeof(struct tty_driver)); ++ memset(&mux_tty, 0, sizeof(mux_tty)); ++ mux_driver.magic = TTY_DRIVER_MAGIC; ++ mux_driver.driver_name = "ts0710mux"; ++ mux_driver.name = "ts0710mux"; ++ mux_driver.major = TS0710MUX_MAJOR; ++ mux_driver.minor_start = TS0710MUX_MINOR_START; ++ mux_driver.num = NR_MUXS; ++ mux_driver.type = TTY_DRIVER_TYPE_SERIAL; ++ mux_driver.subtype = SERIAL_TYPE_NORMAL; ++ mux_driver.init_termios = tty_std_termios; ++ mux_driver.init_termios.c_iflag = 0; ++ mux_driver.init_termios.c_oflag = 0; ++ mux_driver.init_termios.c_cflag = B38400 | CS8 | CREAD; ++ mux_driver.init_termios.c_lflag = 0; ++ mux_driver.flags = TTY_DRIVER_RESET_TERMIOS | TTY_DRIVER_REAL_RAW; ++ ++ mux_driver.ttys = mux_table; ++ mux_driver.termios = mux_termios; ++ mux_driver.termios_locked = mux_termios_locked; ++// mux_driver.driver_state = mux_state; ++ mux_driver.other = NULL; ++ ++ mux_driver.open = mux_open; ++ mux_driver.close = mux_close; ++ mux_driver.write = mux_write; ++ mux_driver.write_room = mux_write_room; ++ mux_driver.flush_buffer = mux_flush_buffer; ++ mux_driver.chars_in_buffer = mux_chars_in_buffer; ++ mux_driver.throttle = mux_throttle; ++ mux_driver.unthrottle = mux_unthrottle; ++ mux_driver.ioctl = mux_ioctl; ++ mux_driver.owner = THIS_MODULE; ++ ++ if (tty_register_driver(&mux_driver)) ++ panic("Couldn't register mux driver"); ++ ++ COMM_MUX_DISPATCHER = mux_dispatcher; ++ COMM_MUX_SENDER = mux_sender; ++ ++ gprs_proc_init(); ++ ++ return 0; ++} ++ ++static void __exit mux_exit(void) ++{ ++ __u8 j; ++ ++ COMM_MUX_DISPATCHER = NULL; ++ COMM_MUX_SENDER = NULL; ++ ++ gprs_proc_exit(); ++ ++ mux_send_info_idx = NR_MUXS; ++ mux_recv_queue = NULL; ++ for (j = 0; j < NR_MUXS; j++) { ++ if ((mux_send_info_flags[j]) && (mux_send_info[j])) { ++ kfree(mux_send_info[j]); ++ } ++ mux_send_info_flags[j] = 0; ++ mux_send_info[j] = 0; ++ ++ if ((mux_recv_info_flags[j]) && (mux_recv_info[j])) { ++ free_mux_recv_struct(mux_recv_info[j]); ++ } ++ mux_recv_info_flags[j] = 0; ++ mux_recv_info[j] = 0; ++ } ++ ++ if (tty_unregister_driver(&mux_driver)) ++ panic("Couldn't unregister mux driver"); ++} ++ ++module_init(mux_init); ++module_exit(mux_exit); ++ ++MODULE_LICENSE("GPL"); ++MODULE_AUTHOR("Harald Welte <laforge@openezx.org>"); ++MODULE_DESCRIPTION("TS 07.10 Multiplexer"); +Index: linux-2.6.20.7/drivers/char/ts0710_mux.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-2.6.20.7/drivers/char/ts0710_mux.h 2007-04-21 18:04:56.000000000 +0200 +@@ -0,0 +1,103 @@ ++/* ++ * mux_macro.h ++ * ++ * Copyright (C) 2002 2005 Motorola ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. ++ * ++ * ++ * 11/18/2002 (Motorola) - Initial version ++ * ++ */ ++ ++/* ++* This header file should be included by both MUX and other applications ++* which access MUX device files. It gives the additional macro definitions ++* shared between MUX and applications. ++*/ ++ ++/* MUX DLCI(Data Link Connection Identifier) Configuration */ ++/* ++* DLCI Service ++* 0 Control Channel ++* 1 Voice Call & Network-related ++* 2 SMS MO ++* 3 SMS MT ++* 4 Phonebook & related ++* 5 MISC ++* 6 CSD/FAX ++* 7 GPRS1 ++* 8 GPRS2 ++* 9 Logger CMD ++* 10 Logger Data ++* 11 Test CMD ++* 12 AGPS ++* 13 Net Monitor ++*/ ++ ++/* Mapping between DLCI and MUX device files */ ++/* ++* File Name Minor DLCI AT Command/Data ++* /dev/mux0 0 1 AT Command ++* /dev/mux1 1 2 AT Command ++* /dev/mux2 2 3 AT Command ++* /dev/mux3 3 4 AT Command ++* /dev/mux4 4 5 AT Command ++* /dev/mux5 5 6 AT Command ++* /dev/mux6 6 7 AT Command ++* /dev/mux7 7 8 AT Command ++* /dev/mux8 8 6 Data ++* /dev/mux9 9 7 Data ++* /dev/mux10 10 8 Data ++* /dev/mux11 11 9 Data ++* /dev/mux12 12 10 Data ++* /dev/mux13 13 11 Data ++* /dev/mux14 14 12 Data ++* /dev/mux15 15 13 Data ++*/ ++ ++#define MUX_CMD_FILE_VOICE_CALL "/dev/mux0" ++#define MUX_CMD_FILE_SMS_MO "/dev/mux1" ++#define MUX_CMD_FILE_SMS_MT "/dev/mux2" ++#define MUX_CMD_FILE_PHONEBOOK "/dev/mux3" ++#define MUX_CMD_FILE_MISC "/dev/mux4" ++#define MUX_CMD_FILE_CSD "/dev/mux5" ++#define MUX_CMD_FILE_GPRS1 "/dev/mux6" ++#define MUX_CMD_FILE_GPRS2 "/dev/mux7" ++ ++#define MUX_DATA_FILE_CSD "/dev/mux8" ++#define MUX_DATA_FILE_GPRS1 "/dev/mux9" ++#define MUX_DATA_FILE_GPRS2 "/dev/mux10" ++#define MUX_DATA_FILE_LOGGER_CMD "/dev/mux11" ++#define MUX_DATA_FILE_LOGGER_DATA "/dev/mux12" ++#define MUX_DATA_FILE_TEST_CMD "/dev/mux13" ++#define MUX_DATA_FILE_AGPS "/dev/mux14" ++#define MUX_DATA_FILE_NET_MONITOR "/dev/mux15" ++ ++#define NUM_MUX_CMD_FILES 8 ++#define NUM_MUX_DATA_FILES 8 ++#define NUM_MUX_FILES ( NUM_MUX_CMD_FILES + NUM_MUX_DATA_FILES ) ++ ++/* Special ioctl() upon a MUX device file for hanging up a call */ ++#define TS0710MUX_IO_MSC_HANGUP 0x54F0 ++ ++/* Special ioctl() upon a MUX device file for MUX loopback test */ ++#define TS0710MUX_IO_TEST_CMD 0x54F1 ++ ++/* Special Error code might be return from write() to a MUX device file */ ++#define EDISCONNECTED 900 /* Logical data link is disconnected */ ++ ++/* Special Error code might be return from open() to a MUX device file */ ++#define EREJECTED 901 /* Logical data link connection request is rejected */ +Index: linux-2.6.20.7/drivers/char/ts0710_mux_usb.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-2.6.20.7/drivers/char/ts0710_mux_usb.c 2007-04-21 18:07:45.000000000 +0200 +@@ -0,0 +1,868 @@ ++/* ++ * linux/drivers/usb/ipcusb.c ++ * ++ * Implementation of a ipc driver based Intel's Bulverde USB Host ++ * Controller. ++ * ++ * Copyright (C) 2003-2005 Motorola ++ * Copyright (C) 2006 Harald Welte <laforge@openezx.org> ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA ++ * ++ * 2003-Nov-03 - (Motorola) created ++ * 2004-Feb-20 - (Motorola) Add Power Manager codes ++ * 2004-Apr-14 - (Motorola) Update Suspend/Resume codes ++ * 2004-May-10 - (Motorola) Add unlink_urbs codes and do some updates of send ++ * out urb sequence ++ * 2006-Jun-22 - (Harald Welte) port to Linux 2.6.x ++ * ++ */ ++ ++#include <linux/kernel.h> ++#include <linux/module.h> ++#include <linux/list.h> ++#include <linux/errno.h> ++#include <asm/uaccess.h> ++#include <asm/hardware.h> ++#include <asm/arch/hardware.h> ++#include <asm/arch-pxa/pxa-regs.h> ++#include <asm/arch-pxa/ezx.h> ++#include <linux/slab.h> ++#include <linux/miscdevice.h> ++#include <linux/init.h> ++#include <linux/timer.h> ++#include <linux/delay.h> ++#include <linux/sched.h> ++#include <linux/tty.h> ++#include <linux/tty_driver.h> ++#include <linux/tty_flip.h> ++#include <linux/circ_buf.h> ++#include <linux/usb.h> ++ ++#include "ts0710_mux_usb.h" ++ ++/*Macro defined for this driver*/ ++#define DRIVER_VERSION "1.0alpha1" ++#define DRIVER_AUTHOR "Motorola / Harald Welte <laforge@openezx.org>" ++#define DRIVER_DESC "USB IPC Driver (TS07.10 lowlevel)" ++#define MOTO_IPC_VID 0x22b8 ++#define MOTO_IPC_PID 0x3006 ++#define IBUF_SIZE 32 /*urb size*/ ++#define IPC_USB_XMIT_SIZE 1024 ++#define IPC_URB_SIZE 32 ++#define IPC_USB_WRITE_INIT 0 ++#define IPC_USB_WRITE_XMIT 1 ++#define IPC_USB_PROBE_READY 3 ++#define IPC_USB_PROBE_NOT_READY 4 ++#define DBG_MAX_BUF_SIZE 1024 ++#define ICL_EVENT_INTERVAL (HZ) ++#undef BVD_DEBUG ++ ++#define IS_EP_BULK(ep) ((ep).bmAttributes == USB_ENDPOINT_XFER_BULK ? 1 : 0) ++#define IS_EP_BULK_IN(ep) (IS_EP_BULK(ep) && ((ep).bEndpointAddress & USB_ENDPOINT_DIR_MASK) == USB_DIR_IN) ++#define IS_EP_BULK_OUT(ep) (IS_EP_BULK(ep) && ((ep).bEndpointAddress & USB_ENDPOINT_DIR_MASK) == USB_DIR_OUT) ++/*End defined macro*/ ++ ++/*global values defined*/ ++static struct usb_driver usb_ipc_driver; ++static struct timer_list ipcusb_timer; ++static struct timer_list suspend_timer; ++static struct timer_list wakeup_timer; ++static struct tty_struct ipcusb_tty; /* the coresponding tty struct, we just use flip buffer here. */ ++static struct tty_driver ipcusb_tty_driver; /* the coresponding tty driver, we just use write and chars in buff here*/ ++struct tty_driver *usb_for_mux_driver = NULL; ++struct tty_struct *usb_for_mux_tty = NULL; ++void (*usb_mux_dispatcher)(struct tty_struct *tty) = NULL; ++void (*usb_mux_sender)(void) = NULL; ++void (*ipcusb_ap_to_bp)(unsigned char*, int) = NULL; ++void (*ipcusb_bp_to_ap)(unsigned char*, int) = NULL; ++EXPORT_SYMBOL(usb_for_mux_driver); ++EXPORT_SYMBOL(usb_for_mux_tty); ++EXPORT_SYMBOL(usb_mux_dispatcher); ++EXPORT_SYMBOL(usb_mux_sender); ++EXPORT_SYMBOL(ipcusb_ap_to_bp); ++EXPORT_SYMBOL(ipcusb_bp_to_ap); ++static int sumbit_times = 0; ++static int callback_times = 0; ++//static unsigned long last_jiff = 0; ++extern int usbh_finished_resume; ++/*end global values defined*/ ++ ++MODULE_AUTHOR(DRIVER_AUTHOR); ++MODULE_DESCRIPTION(DRIVER_DESC); ++MODULE_LICENSE("GPL"); ++ ++#ifdef BVD_DEBUG ++#define bvd_dbg(format, arg...) printk(__FILE__ ": " format "\n" , ## arg) ++#else ++#define bvd_dbg(format, arg...) do {} while (0) ++#endif ++ ++/* USB device context */ ++typedef struct { ++ struct list_head list; ++ int size; ++ char *body; ++} buf_list_t; ++ ++struct ipc_usb_data { ++ u_int8_t write_finished_flag; ++ u_int8_t write_flag, ++ ipc_flag, ++ suspend_flag; ++ struct usb_device *ipc_dev; ++ struct urb readurb_mux, ++ writeurb_mux, ++ writeurb_dsplog; ++ char *obuf, *ibuf; ++ int writesize; /* max packet size for the ++ output bulk endpoint * ++ transfer buffers */ ++ ++ struct circ_buf xmit; /* write cric bufffer */ ++ struct list_head in_buf_list; ++ char bulk_in_ep_mux, ++ bulk_out_ep_mux, ++ bulk_in_ep_dsplog; ++ unsigned int ifnum; ++ ++ struct tasklet_struct bh, ++ bh_bp; ++ ++ spinlock_t lock; ++}; ++ ++struct ipc_usb_data *bvd_ipc; ++ ++#ifdef BVD_DEBUG ++static void bvd_dbg_hex(__u8 *buf, int len) ++{ ++ static unsigned char tbuf[DBG_MAX_BUF_SIZE]; ++ int i, c; ++ ++ if (len <= 0) ++ return; ++ ++ c = 0; ++ for (i=0; (i < len) && (c < (DBG_MAX_BUF_SIZE - 3)); i++) { ++ sprintf(&tbuf[c], "%02x ",buf[i]); ++ c += 3; ++ } ++ tbuf[c] = 0; ++ ++ printk("%s: %s\n", __FUNCTION__, tbuf); ++} ++#else ++#define bvd_dbg_hex(buf, len) ++#endif ++ ++static int unlink_urbs(struct urb *urb) ++{ ++ unsigned long flags; ++ int retval; ++ ++ spin_lock_irqsave(&bvd_ipc->lock, flags); ++ ++ retval = usb_unlink_urb(urb); ++ if (retval != -EINPROGRESS && retval != 0) ++ printk("unlink urb err, %d", retval); ++ ++ spin_unlock_irqrestore(&bvd_ipc->lock, flags); ++ return retval; ++} ++ ++static void append_to_inbuf_list(struct urb *urb) ++{ ++ buf_list_t *inbuf; ++ int count = urb->actual_length; ++ ++ inbuf = kmalloc(sizeof(buf_list_t), GFP_KERNEL); ++ if (!inbuf) { ++ printk("append_to_inbuf_list: (%d) out of memory!\n", ++ sizeof(buf_list_t)); ++ return; ++ } ++ ++ inbuf->size = count; ++ inbuf->body = kmalloc(sizeof(char)*count, GFP_KERNEL); ++ if (!inbuf->body) { ++ kfree(inbuf); ++ printk("append_to_inbuf_list: (%d) out of memory!\n", ++ sizeof(char)*count); ++ return; ++ } ++ memcpy(inbuf->body, (unsigned char*)urb->transfer_buffer, count); ++ list_add_tail(&inbuf->list, &bvd_ipc->in_buf_list); ++} ++ ++static void ipcusb_timeout(unsigned long data) ++{ ++ struct tty_struct *tty = &ipcusb_tty; ++ struct urb *urb = (struct urb *)data; ++ ++ bvd_dbg("ipcusb_timeout***"); ++ ++ while (!(list_empty(&bvd_ipc->in_buf_list))) { ++ int count; ++ buf_list_t *inbuf; ++ struct list_head *ptr = NULL; ++ ++ ptr = bvd_ipc->in_buf_list.next; ++ inbuf = list_entry (ptr, buf_list_t, list); ++ count = inbuf->size; ++ if (tty_insert_flip_string(tty, inbuf->body, count) >= count) { ++ list_del(ptr); ++ kfree(inbuf->body); ++ inbuf->body = NULL; ++ kfree(inbuf); ++ } else { ++ bvd_dbg("ipcusb_timeout: bvd_ipc->in_buf_list empty!"); ++ break; ++ } ++ } ++ ++ if (usb_mux_dispatcher) ++ usb_mux_dispatcher(tty); /**call Liu changhui's func.**/ ++ ++ if (list_empty(&bvd_ipc->in_buf_list)) { ++ urb->actual_length = 0; ++ urb->dev = bvd_ipc->ipc_dev; ++ if (usb_submit_urb(urb, GFP_ATOMIC)) ++ bvd_dbg("ipcusb_timeout: failed resubmitting read urb"); ++ bvd_dbg("ipcusb_timeout: resubmited read urb"); ++ } else { ++ ipcusb_timer.data = (unsigned long)urb; ++ mod_timer(&ipcusb_timer, jiffies+(10*HZ/1000)); ++ } ++} ++ ++static void usb_ipc_read_bulk(struct urb *urb, struct pt_regs *regs) ++{ ++ buf_list_t *inbuf; ++ int count = urb->actual_length; ++ struct tty_struct *tty = &ipcusb_tty; ++ ++ bvd_dbg("usb_ipc_read_bulk: begining!"); ++ if (urb->status) ++ printk("nonzero read bulk status received: %d\n", urb->status); ++ ++ bvd_dbg("usb_ipc_read_bulk: urb->actual_length=%d", urb->actual_length); ++ bvd_dbg("usb_ipc_read_bulk: urb->transfer_buffer:"); ++ ++ bvd_dbg_hex((unsigned char*)urb->transfer_buffer, urb->actual_length); ++ ++ if (count > 0 && ((*ipcusb_bp_to_ap) != NULL)) ++ (*ipcusb_bp_to_ap)(urb->transfer_buffer, urb->actual_length); ++ ++ if (!(list_empty(&bvd_ipc->in_buf_list))) { ++ int need_mux = 0; ++ ++ bvd_dbg("usb_ipc_read_bulk: some urbs in_buf_list"); ++ if (count > 0) { ++ bvd_ipc->suspend_flag = 1; ++ append_to_inbuf_list(urb); /* append the current received urb */ ++#if 0 ++ if(jiffies - last_jiff > ICL_EVENT_INTERVAL) ++ { ++ last_jiff = jiffies; ++ queue_apm_event(KRNL_ICL, NULL); ++ } ++#endif ++ } ++ ++ while (!(list_empty(&bvd_ipc->in_buf_list))) { ++ struct list_head* ptr = NULL; ++ ptr = bvd_ipc->in_buf_list.next; ++ inbuf = list_entry(ptr, buf_list_t, list); ++ count = inbuf->size; ++ need_mux = 1; ++ ++ tty_insert_flip_string(tty, inbuf->body, count); ++ ++ list_del(ptr); ++ kfree(inbuf->body); ++ inbuf->body = NULL; ++ kfree(inbuf); ++ } ++ ++ if (usb_mux_dispatcher && need_mux) ++ usb_mux_dispatcher(tty); /* call Liu changhui's func. */ ++ ++ if (list_empty(&bvd_ipc->in_buf_list)) { ++ urb->actual_length = 0; ++ urb->dev = bvd_ipc->ipc_dev; ++ if (usb_submit_urb(urb, GFP_ATOMIC)) ++ bvd_dbg("usb_ipc_read_bulk: " ++ "failed resubmitting read urb"); ++ bvd_dbg("usb_ipc_read_bulk: resubmited read urb"); ++ } else { ++ ipcusb_timer.data = (unsigned long)urb; ++ mod_timer(&ipcusb_timer, jiffies+(10*HZ/1000)); ++ } ++ } else if (count > 0) { ++ bvd_dbg("usb_ipc_read_bulk: no urbs in_buf_list"); ++ bvd_ipc->suspend_flag = 1; ++ ++ if (tty_insert_flip_string(tty, urb->transfer_buffer, ++ count) < count) { ++ bvd_ipc->suspend_flag = 1; ++ append_to_inbuf_list(urb); ++ ipcusb_timer.data = (unsigned long)urb; ++ mod_timer(&ipcusb_timer, jiffies+(10*HZ/1000)); ++#if 0 ++ if(jiffies - last_jiff > ICL_EVENT_INTERVAL) ++ { ++ last_jiff = jiffies; ++ queue_apm_event(KRNL_ICL, NULL); ++ } ++#endif ++ } ++ ++ if (usb_mux_dispatcher) ++ usb_mux_dispatcher(tty); /* call Liu changhui's func. */ ++ ++ urb->actual_length = 0; ++ urb->dev = bvd_ipc->ipc_dev; ++ if (usb_submit_urb(urb, GFP_ATOMIC)) ++ bvd_dbg("failed resubmitting read urb"); ++#if 0 ++ if(jiffies - last_jiff > ICL_EVENT_INTERVAL) ++ { ++ last_jiff = jiffies; ++ queue_apm_event(KRNL_ICL, NULL); ++ } ++#endif ++ bvd_dbg("usb_ipc_read_bulk: resubmited read urb"); ++ } ++ ++ bvd_dbg("usb_ipc_read_bulk: completed!!!"); ++} ++ ++static void usb_ipc_write_bulk(struct urb *urb, struct pt_regs *regs) ++{ ++ callback_times++; ++ bvd_ipc->write_finished_flag = 1; ++ ++ bvd_dbg("usb_ipc_write_bulk: begining!"); ++ //printk("%s: write_finished_flag=%d\n", __FUNCTION__, bvd_ipc->write_finished_flag); ++ ++ if (urb->status) ++ printk("nonzero write bulk status received: %d\n", urb->status); ++ ++ if (usb_mux_sender) ++ usb_mux_sender(); /**call Liu changhui's func**/ ++ ++ //printk("usb_ipc_write_bulk: mark ipcusb_softint!\n"); ++ tasklet_schedule(&bvd_ipc->bh); ++ ++ bvd_dbg("usb_ipc_write_bulk: finished!"); ++} ++ ++static void wakeup_timeout(unsigned long data) ++{ ++ GPSR(GPIO_MCU_INT_SW) = GPIO_bit(GPIO_MCU_INT_SW); ++ bvd_dbg("wakup_timeout: send GPIO_MCU_INT_SW signal!"); ++} ++ ++static void suspend_timeout(unsigned long data) ++{ ++ if (bvd_ipc->suspend_flag == 1) { ++ bvd_ipc->suspend_flag = 0; ++ mod_timer(&suspend_timer, jiffies+(5000*HZ/1000)); ++ bvd_dbg("suspend_timeout: add the suspend timer again"); ++ } else { ++ unlink_urbs(&bvd_ipc->readurb_mux); ++ UHCRHPS3 = 0x4; ++ mdelay(40); ++ bvd_dbg("suspend_timeout: send SUSPEND signal! UHCRHPS3=0x%x", ++ UHCRHPS3); ++ } ++} ++ ++static void ipcusb_xmit_data(void) ++{ ++ int c, count = IPC_URB_SIZE; ++ int result = 0; ++ int buf_flag = 0; ++ int buf_num = 0; ++ ++ //printk("%s: sumbit_times=%d, callback_times=%d\n", __FUNCTION__, sumbit_times, callback_times); ++ if (bvd_ipc->write_finished_flag == 0) ++ return; ++ ++ while (1) { ++ c = CIRC_CNT_TO_END(bvd_ipc->xmit.head, bvd_ipc->xmit.tail, ++ IPC_USB_XMIT_SIZE); ++ if (count < c) ++ c = count; ++ if (c <= 0) ++ break; ++ ++ memcpy(bvd_ipc->obuf+buf_num, ++ bvd_ipc->xmit.buf + bvd_ipc->xmit.tail, c); ++ buf_flag = 1; ++ bvd_ipc->xmit.tail = ((bvd_ipc->xmit.tail + c) ++ & (IPC_USB_XMIT_SIZE-1)); ++ count -= c; ++ buf_num += c; ++ } ++ ++ if (buf_num == 0) { ++ bvd_dbg("ipcusb_xmit_data: buf_num=%d, add suspend_timer", ++ buf_num); ++ bvd_ipc->suspend_flag = 0; ++ mod_timer(&suspend_timer, jiffies+(5000*HZ/1000)); ++ } ++ ++ bvd_dbg("ipcusb_xmit_data: buf_num=%d", buf_num); ++ bvd_dbg("ipcusb_xmit_data: bvd_ipc->obuf: "); ++ ++ bvd_dbg_hex((bvd_ipc->obuf)-buf_num, buf_num); ++ ++ if (buf_flag) { ++ bvd_ipc->writeurb_mux.transfer_buffer_length = buf_num; ++ bvd_dbg("ipcusb_xmit_data: copy data to write urb finished! "); ++ ++ if ((UHCRHPS3 & 0x4) == 0x4) { ++ static int ret; ++ int time = 0; ++ ++ /* if BP sleep, wake up BP first */ ++ pxa_gpio_mode(GPIO_IN | 41); ++ if (GPIO_is_high(41)) { ++ if (GPIO_is_high(GPIO_MCU_INT_SW)) ++ GPCR(GPIO_MCU_INT_SW) = GPIO_bit(GPIO_MCU_INT_SW); ++ else ++ GPSR(GPIO_MCU_INT_SW) = GPIO_bit(GPIO_MCU_INT_SW); ++ ++ time = jiffies; ++ while (GPIO_is_high(41) && (jiffies < (time+HZ))); ++ ++ if (GPIO_is_high(41)) { ++ printk("%s: Wakeup BP timeout! BP state is %d\n", ++ __FUNCTION__, GPIO_is_high(41)); ++ } ++ if (GPIO_is_high(GPIO_MCU_INT_SW)) ++ GPCR(GPIO_MCU_INT_SW) = GPIO_bit(GPIO_MCU_INT_SW); ++ else ++ GPSR(GPIO_MCU_INT_SW) = GPIO_bit(GPIO_MCU_INT_SW); ++ } ++ ++ /* Resume BP */ ++ UHCRHPS3 = 0x8; ++ mdelay(40); ++ bvd_dbg("ipcusb_xmit_data: Send RESUME signal! UHCRHPS3=0x%x", ++ UHCRHPS3); ++ /*send IN token*/ ++ bvd_ipc->readurb_mux.actual_length = 0; ++ bvd_ipc->readurb_mux.dev = bvd_ipc->ipc_dev; ++ if (ret = usb_submit_urb(&bvd_ipc->readurb_mux, GFP_ATOMIC)) ++ printk("ipcusb_xmit_data: usb_submit_urb(read mux bulk)" ++ "failed! status=%d\n", ret); ++ bvd_dbg("ipcusb_xmit_data: Send a IN token successfully!"); ++ } ++ ++ sumbit_times++; ++ bvd_ipc->write_finished_flag = 0; ++ //printk("%s: clear write_finished_flag:%d\n", __FUNCTION__, bvd_ipc->write_finished_flag); ++ bvd_ipc->writeurb_mux.dev = bvd_ipc->ipc_dev; ++ if (result = usb_submit_urb(&bvd_ipc->writeurb_mux, GFP_ATOMIC)) ++ warn("ipcusb_xmit_data: funky result! result=%d\n", result); ++ ++ bvd_dbg("ipcusb_xmit_data: usb_submit_urb finished! result:%d", result); ++ ++ } ++} ++ ++static void usbipc_bh_func(unsigned long param) ++{ ++ ipcusb_xmit_data(); ++} ++ ++extern void get_halted_bit(void); ++ ++static void usbipc_bh_bp_func(unsigned long param) ++{ ++ if ((UHCRHPS3 & 0x4) == 0x4) { ++ UHCRHPS3 = 0x8; ++ mdelay(40); ++ bvd_dbg("ipcusb_softint_send_readurb: Send RESUME signal! " ++ "UHCRHPS3=0x%x", UHCRHPS3); ++ } ++ if (bvd_ipc->ipc_flag == IPC_USB_PROBE_READY) { ++ get_halted_bit(); ++ ++ /*send a IN token*/ ++ bvd_ipc->readurb_mux.dev = bvd_ipc->ipc_dev; ++ if (usb_submit_urb(&bvd_ipc->readurb_mux, GFP_ATOMIC)) { ++ bvd_dbg("ipcusb_softint_send_readurb: " ++ "usb_submit_urb(read mux bulk) failed!"); ++ } ++ bvd_dbg("ipcusb_softint_send_readurb: Send a IN token successfully!"); ++ bvd_ipc->suspend_flag = 0; ++ bvd_dbg("ipcusb_softint_send_readurb: add suspend_timer"); ++ mod_timer(&suspend_timer, jiffies+(5000*HZ/1000)); ++ } ++} ++ ++static int usb_ipc_write(struct tty_struct *tty, ++ const unsigned char *buf, int count) ++{ ++ int c, ret = 0; ++ ++ bvd_dbg("usb_ipc_write: count=%d, buf: ", count); ++ bvd_dbg_hex(buf, count); ++ ++ if (count <= 0) ++ return 0; ++ ++ if (*ipcusb_ap_to_bp != NULL) ++ (*ipcusb_ap_to_bp)(buf, count); ++ ++ bvd_ipc->suspend_flag = 1; ++ ++ if ((bvd_ipc->ipc_flag == IPC_USB_PROBE_READY) && ++ (bvd_ipc->xmit.head == bvd_ipc->xmit.tail)) { ++ bvd_dbg("usb_ipc_write: set write_flag"); ++ bvd_ipc->write_flag = IPC_USB_WRITE_XMIT; ++ } ++ ++ while (1) { ++ c = CIRC_SPACE_TO_END(bvd_ipc->xmit.head, ++ bvd_ipc->xmit.tail, IPC_USB_XMIT_SIZE); ++ if (count < c) ++ c = count; ++ if (c <= 0) ++ break; ++ ++ memcpy(bvd_ipc->xmit.buf + bvd_ipc->xmit.head, buf, c); ++ bvd_ipc->xmit.head = ((bvd_ipc->xmit.head + c) ++ & (IPC_USB_XMIT_SIZE-1)); ++ buf += c; ++ count -= c; ++ ret += c; ++ } ++ bvd_dbg("usb_ipc_write: ret=%d, bvd_ipc->xmit.buf: ", ret); ++ ++ bvd_dbg_hex(bvd_ipc->xmit.buf, ret); ++ ++ if (bvd_ipc->write_flag == IPC_USB_WRITE_XMIT) { ++ bvd_ipc->write_flag = IPC_USB_WRITE_INIT; ++ bvd_dbg("usb_ipc_write: mark ipcusb_softint"); ++ tasklet_schedule(&bvd_ipc->bh); ++ } ++ ++ bvd_dbg("usb_ipc_write: ret=%d\n", ret); ++ return ret; ++} ++ ++static int usb_ipc_chars_in_buffer(struct tty_struct *tty) ++{ ++ return CIRC_CNT(bvd_ipc->xmit.head, bvd_ipc->xmit.tail, IPC_USB_XMIT_SIZE); ++} ++ ++void usb_send_readurb(void) ++{ ++ //printk("usb_send_readurb: begining!UHCRHPS3=0x%x, usbh_finished_resume=%d\n", UHCRHPS3, usbh_finished_resume); ++ ++ if (usbh_finished_resume == 0) ++ return; ++ ++ tasklet_schedule(&bvd_ipc->bh_bp); ++} ++ ++static int usb_ipc_probe(struct usb_interface *intf, ++ const struct usb_device_id *id) ++{ ++ struct usb_device *usbdev = interface_to_usbdev(intf); ++ struct usb_config_descriptor *ipccfg; ++ struct usb_interface_descriptor *interface; ++ struct usb_endpoint_descriptor *endpoint; ++ int ep_cnt, readsize, writesize; ++ char have_bulk_in_mux, have_bulk_out_mux; ++ ++ bvd_dbg("usb_ipc_probe: vendor id 0x%x, device id 0x%x", ++ usbdev->descriptor.idVendor, usbdev->descriptor.idProduct); ++ ++ if ((usbdev->descriptor.idVendor != MOTO_IPC_VID) || ++ (usbdev->descriptor.idProduct != MOTO_IPC_PID)) ++ return -ENODEV; ++ ++ /* a2590c : dsplog interface is not supported by this driver */ ++ if (intf->minor == 2) /* dsplog interface number is 2 */ ++ return -1; ++ ++ bvd_dbg("usb_ipc_probe: USB dev address:%p", usbdev); ++ bvd_dbg("usb_ipc_probe: ifnum:%u", intf->minor); ++ ++ ipccfg = &usbdev->actconfig->desc; ++ bvd_dbg("usb_ipc_prob: config%d", ipccfg->bConfigurationValue); ++ bvd_dbg("usb_ipc_prob: bNumInterfaces = %d", ipccfg->bNumInterfaces); ++ ++ /* After this point we can be a little noisy about what we are trying ++ * to configure, hehe. */ ++ if (usbdev->descriptor.bNumConfigurations != 1) { ++ info("usb_ipc_probe: Only one device configuration " ++ "is supported."); ++ return -1; ++ } ++ ++ if (usbdev->config[0].desc.bNumInterfaces != 3) { ++ info("usb_ipc_probe: Only three device interfaces are " ++ "supported."); ++ return -1; ++ } ++ ++ interface = &intf->cur_altsetting->desc; ++ endpoint = &intf->cur_altsetting->endpoint[0].desc; ++ /* Start checking for two bulk endpoints or ... FIXME: This is a future ++ * enhancement...*/ ++ bvd_dbg("usb_ipc_probe: Number of Endpoints:%d", ++ (int) interface->bNumEndpoints); ++ if (interface->bNumEndpoints != 2) { ++ info("usb_ipc_probe: Only two endpoints supported."); ++ return -1; ++ } ++ ++ ep_cnt = have_bulk_in_mux = have_bulk_out_mux = 0; ++ ++ bvd_dbg("usb_ipc_probe: endpoint[0] is:%x", ++ (&endpoint[0])->bEndpointAddress); ++ bvd_dbg("usb_ipc_probe: endpoint[1] is:%x ", ++ (&endpoint[1])->bEndpointAddress); ++ ++ while (ep_cnt < interface->bNumEndpoints) { ++ ++ if (!have_bulk_in_mux && IS_EP_BULK_IN(endpoint[ep_cnt])) { ++ bvd_dbg("usb_ipc_probe: bEndpointAddress(IN) is:%x ", ++ (&endpoint[ep_cnt])->bEndpointAddress); ++ have_bulk_in_mux = ++ (&endpoint[ep_cnt])->bEndpointAddress; ++ readsize = (&endpoint[ep_cnt])->wMaxPacketSize; ++ bvd_dbg("usb_ipc_probe: readsize=%d", readsize); ++ ep_cnt++; ++ continue; ++ } ++ ++ if (!have_bulk_out_mux && IS_EP_BULK_OUT(endpoint[ep_cnt])) { ++ bvd_dbg("usb_ipc_probe: bEndpointAddress(OUT) is:%x ", ++ (&endpoint[ep_cnt])->bEndpointAddress); ++ have_bulk_out_mux = ++ (&endpoint[ep_cnt])->bEndpointAddress; ++ writesize = (&endpoint[ep_cnt])->wMaxPacketSize; ++ bvd_dbg("usb_ipc_probe: writesize=%d", writesize); ++ ep_cnt++; ++ continue; ++ } ++ ++ info("usb_ipc_probe: Undetected endpoint ^_^ "); ++ /* Shouldn't ever get here unless we have something weird */ ++ return -1; ++ } ++ ++ /* Perform a quick check to make sure that everything worked as it ++ * should have. */ ++ ++ switch (interface->bNumEndpoints) { ++ case 2: ++ if (!have_bulk_in_mux || !have_bulk_out_mux) { ++ info("usb_ipc_probe: Two bulk endpoints required."); ++ return -1; ++ } ++ break; ++ default: ++ info("usb_ipc_probe: Endpoint determination failed ^_^ "); ++ return -1; ++ } ++ ++ /* Ok, now initialize all the relevant values */ ++ if (!(bvd_ipc->obuf = (char *)kmalloc(writesize, GFP_KERNEL))) { ++ err("usb_ipc_probe: Not enough memory for the output buffer."); ++ kfree(bvd_ipc); ++ return -1; ++ } ++ bvd_dbg("usb_ipc_probe: obuf address:%p", bvd_ipc->obuf); ++ ++ if (!(bvd_ipc->ibuf = (char *)kmalloc(readsize, GFP_KERNEL))) { ++ err("usb_ipc_probe: Not enough memory for the input buffer."); ++ kfree(bvd_ipc->obuf); ++ kfree(bvd_ipc); ++ return -1; ++ } ++ bvd_dbg("usb_ipc_probe: ibuf address:%p", bvd_ipc->ibuf); ++ ++ bvd_ipc->ipc_flag = IPC_USB_PROBE_READY; ++ bvd_ipc->write_finished_flag = 1; ++ bvd_ipc->suspend_flag = 1; ++ bvd_ipc->bulk_in_ep_mux= have_bulk_in_mux; ++ bvd_ipc->bulk_out_ep_mux= have_bulk_out_mux; ++ bvd_ipc->ipc_dev = usbdev; ++ bvd_ipc->writesize = writesize; ++ INIT_LIST_HEAD (&bvd_ipc->in_buf_list); ++ ++ bvd_ipc->bh.func = usbipc_bh_func; ++ bvd_ipc->bh.data = (unsigned long) bvd_ipc; ++ ++ bvd_ipc->bh_bp.func = usbipc_bh_bp_func; ++ bvd_ipc->bh_bp.data = (unsigned long) bvd_ipc; ++ ++ /*Build a write urb*/ ++ usb_fill_bulk_urb(&bvd_ipc->writeurb_mux, usbdev, ++ usb_sndbulkpipe(bvd_ipc->ipc_dev, ++ bvd_ipc->bulk_out_ep_mux), ++ bvd_ipc->obuf, writesize, usb_ipc_write_bulk, ++ bvd_ipc); ++ //bvd_ipc->writeurb_mux.transfer_flags |= USB_ASYNC_UNLINK; ++ ++ /*Build a read urb and send a IN token first time*/ ++ usb_fill_bulk_urb(&bvd_ipc->readurb_mux, usbdev, ++ usb_rcvbulkpipe(usbdev, bvd_ipc->bulk_in_ep_mux), ++ bvd_ipc->ibuf, readsize, usb_ipc_read_bulk, bvd_ipc); ++ //bvd_ipc->readurb_mux.transfer_flags |= USB_ASYNC_UNLINK; ++ ++ usb_driver_claim_interface(&usb_ipc_driver, intf, bvd_ipc); ++ //usb_driver_claim_interface(&usb_ipc_driver, &ipccfg->interface[1], bvd_ipc); ++ ++ // a2590c: dsplog is not supported by this driver ++ // usb_driver_claim_interface(&usb_ipc_driver, ++ // &ipccfg->interface[2], bvd_ipc); ++ /*send a IN token first time*/ ++ bvd_ipc->readurb_mux.dev = bvd_ipc->ipc_dev; ++ if (usb_submit_urb(&bvd_ipc->readurb_mux, GFP_ATOMIC)) ++ printk("usb_ipc_prob: usb_submit_urb(read mux bulk) failed!\n"); ++ ++ bvd_dbg("usb_ipc_prob: Send a IN token successfully!"); ++ ++ if (bvd_ipc->xmit.head != bvd_ipc->xmit.tail) { ++ printk("usb_ipc_probe: mark ipcusb_softint!\n"); ++ tasklet_schedule(&bvd_ipc->bh); ++ } ++ ++ printk("usb_ipc_probe: completed probe!"); ++ usb_set_intfdata(intf, &bvd_ipc); ++ return 0; ++} ++ ++static void usb_ipc_disconnect(struct usb_interface *intf) ++{ ++ //struct usb_device *usbdev = interface_to_usbdev(intf); ++ struct ipc_usb_data *bvd_ipc_disconnect = usb_get_intfdata(intf); ++ ++ printk("usb_ipc_disconnect:*** \n"); ++ ++ if ((UHCRHPS3 & 0x4) == 0) ++ usb_unlink_urb(&bvd_ipc_disconnect->readurb_mux); ++ ++ usb_unlink_urb(&bvd_ipc_disconnect->writeurb_mux); ++ ++ bvd_ipc_disconnect->ipc_flag = IPC_USB_PROBE_NOT_READY; ++ kfree(bvd_ipc_disconnect->ibuf); ++ kfree(bvd_ipc_disconnect->obuf); ++ ++ usb_driver_release_interface(&usb_ipc_driver, ++ bvd_ipc_disconnect->ipc_dev->actconfig->interface[0]); ++ usb_driver_release_interface(&usb_ipc_driver, ++ bvd_ipc_disconnect->ipc_dev->actconfig->interface[1]); ++ ++ //a2590c: dsplog interface is not supported by this driver ++ //usb_driver_release_interface(&usb_ipc_driver, &bvd_ipc_disconnect->ipc_dev->actconfig->interface[2]); ++ ++ bvd_ipc_disconnect->ipc_dev = NULL; ++ ++ usb_set_intfdata(intf, NULL); ++ ++ printk("usb_ipc_disconnect completed!\n"); ++} ++ ++static struct usb_device_id usb_ipc_id_table[] = { ++ { USB_DEVICE(MOTO_IPC_VID, MOTO_IPC_PID) }, ++ { } /* Terminating entry */ ++}; ++ ++static struct usb_driver usb_ipc_driver = { ++ .name = "usb ipc", ++ .probe = usb_ipc_probe, ++ .disconnect = usb_ipc_disconnect, ++ .id_table = usb_ipc_id_table, ++}; ++ ++static int __init usb_ipc_init(void) ++{ ++ int result; ++ ++ bvd_dbg("init usb_ipc"); ++ /* register driver at the USB subsystem */ ++ result = usb_register(&usb_ipc_driver); ++ if (result < 0) { ++ err ("usb ipc driver could not be registered"); ++ return result; ++ } ++ ++ /*init the related mux interface*/ ++ if (!(bvd_ipc = kzalloc(sizeof(struct ipc_usb_data), GFP_KERNEL))) { ++ err("usb_ipc_init: Out of memory."); ++ usb_deregister(&usb_ipc_driver); ++ return -ENOMEM; ++ } ++ bvd_dbg("usb_ipc_init: Address of bvd_ipc:%p", bvd_ipc); ++ ++ if (!(bvd_ipc->xmit.buf = kmalloc(IPC_USB_XMIT_SIZE, GFP_KERNEL))) { ++ err("usb_ipc_init: Not enough memory for the input buffer."); ++ kfree(bvd_ipc); ++ usb_deregister(&usb_ipc_driver); ++ return -ENOMEM; ++ } ++ bvd_dbg("usb_ipc_init: bvd_ipc->xmit.buf address:%p", ++ bvd_ipc->xmit.buf); ++ bvd_ipc->ipc_dev = NULL; ++ bvd_ipc->xmit.head = bvd_ipc->xmit.tail = 0; ++ bvd_ipc->write_flag = IPC_USB_WRITE_INIT; ++ ++ ipcusb_tty_driver.write = usb_ipc_write; ++ ipcusb_tty_driver.chars_in_buffer = usb_ipc_chars_in_buffer; ++ ++ usb_for_mux_driver = &ipcusb_tty_driver; ++ usb_for_mux_tty = &ipcusb_tty; ++ ++ /* init timers for ipcusb read process and usb suspend */ ++ init_timer(&ipcusb_timer); ++ ipcusb_timer.function = ipcusb_timeout; ++ ++ init_timer(&suspend_timer); ++ suspend_timer.function = suspend_timeout; ++ ++ init_timer(&wakeup_timer); ++ wakeup_timer.function = wakeup_timeout; ++ ++ info("USB Host(Bulverde) IPC driver registered."); ++ info(DRIVER_VERSION ":" DRIVER_DESC); ++ ++ return 0; ++} ++ ++static void __exit usb_ipc_exit(void) ++{ ++ bvd_dbg("cleanup bvd_ipc"); ++ ++ kfree(bvd_ipc->xmit.buf); ++ kfree(bvd_ipc); ++ usb_deregister(&usb_ipc_driver); ++ ++ info("USB Host(Bulverde) IPC driver deregistered."); ++} ++ ++module_init(usb_ipc_init); ++module_exit(usb_ipc_exit); ++EXPORT_SYMBOL(usb_send_readurb); +Index: linux-2.6.20.7/drivers/char/ts0710_mux_usb.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-2.6.20.7/drivers/char/ts0710_mux_usb.h 2007-04-21 18:07:21.000000000 +0200 +@@ -0,0 +1,29 @@ ++/* ++ * linux/drivers/usb/ipcusb.h ++ * ++ * Implementation of a ipc driver based Intel's Bulverde USB Host ++ * Controller. ++ * ++ * Copyright (C) 2003-2005 Motorola ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA ++ * ++ * 2003-Nov-18 - (Motorola) created ++ * ++ */ ++extern struct tty_driver *usb_for_mux_driver; ++extern struct tty_struct *usb_for_mux_tty; ++extern void (*usb_mux_dispatcher)(struct tty_struct *tty); ++extern void (*usb_mux_sender)(void); diff --git a/packages/linux/linux-ezx-2.6.20.7/mux_debug.patch b/packages/linux/linux-ezx-2.6.20.7/mux_debug.patch new file mode 100644 index 0000000000..58cb25a0b6 --- /dev/null +++ b/packages/linux/linux-ezx-2.6.20.7/mux_debug.patch @@ -0,0 +1,551 @@ +Index: linux-2.6.20.7/drivers/char/ts0710_mux.c +=================================================================== +--- linux-2.6.20.7.orig/drivers/char/ts0710_mux.c 2007-04-22 12:24:18.000000000 +0200 ++++ linux-2.6.20.7/drivers/char/ts0710_mux.c 2007-04-22 12:26:47.000000000 +0200 +@@ -85,6 +85,9 @@ + #include "ts0710.h" + #include "ts0710_mux.h" + ++#define TS0710DEBUG ++#define PRINT_OUTPUT_PRINTK ++ + #define TS0710MUX_GPRS_SESSION_MAX 2 + #define TS0710MUX_MAJOR 250 + #define TS0710MUX_MINOR_START 0 +@@ -316,7 +319,7 @@ + #ifdef TS0710DEBUG + + #ifdef PRINT_OUTPUT_PRINTK +-#define TS0710_DEBUG(fmt, arg...) printk(KERN_INFO "MUX " __FUNCTION__ ": " fmt "\n" , ## arg) ++#define TS0710_DEBUG(fmt, arg...) printk(KERN_INFO "MUX %s: " fmt "\n" , __func__, ## arg) + #else + #include "ezxlog.h" + static __u8 strDebug[256]; +@@ -530,10 +533,10 @@ + if (strncmp(p->comm, "aplogd", 6) == 0) { + sig = 1; + if (send_sig(SIGUSR2, p, 1) == 0) { +- TS0710_PRINTK ++ TS0710_DEBUG + ("MUX: success to send SIGUSR2 to aplogd!\n"); + } else { +- TS0710_PRINTK ++ TS0710_DEBUG + ("MUX: failure to send SIGUSR2 to aplogd!\n"); + } + break; +@@ -542,7 +545,7 @@ + read_unlock(&tasklist_lock); + + if (!sig) { +- TS0710_PRINTK("MUX: not found aplogd!\n"); ++ TS0710_DEBUG("MUX: not found aplogd!\n"); + } + } + #else +@@ -559,11 +562,11 @@ + buf[len + 1] = TS0710_BASIC_FLAG; + + if ((COMM_FOR_MUX_DRIVER == 0) || (COMM_FOR_MUX_TTY == 0)) { +- TS0710_PRINTK ++ TS0710_DEBUG + ("MUX basic_write: (COMM_FOR_MUX_DRIVER == 0) || (COMM_FOR_MUX_TTY == 0)\n"); + + #ifndef USB_FOR_MUX +- TS0710_PRINTK ++ TS0710_DEBUG + ("MUX basic_write: tapisrv might be down!!! (serial_for_mux_driver == 0) || (serial_for_mux_tty == 0)\n"); + TS0710_SIG2APLOGD(); + #endif +@@ -577,7 +580,7 @@ + res = COMM_FOR_MUX_DRIVER->write(COMM_FOR_MUX_TTY, buf, len + 2); + + if (res != len + 2) { +- TS0710_PRINTK("MUX basic_write: Write Error!\n"); ++ TS0710_DEBUG("MUX basic_write: Write Error!\n"); + return -1; + } + +@@ -601,7 +604,7 @@ + TS0710_DEBUG("crc_check: CRC check OK\n"); + return 0; + } else { +- TS0710_PRINTK("MUX crc_check: CRC check failed\n"); ++ TS0710_DEBUG("MUX crc_check: CRC check failed\n"); + return 1; + } + } +@@ -1266,7 +1269,7 @@ + break; + + case FCON: /*Flow control on command */ +- TS0710_PRINTK ++ TS0710_DEBUG + ("MUX Received Flow control(all channels) on command\n"); + if (mcc_short_pkt->h.type.cr == MCC_CMD) { + ts0710->dlci[0].state = CONNECTED; +@@ -1276,7 +1279,7 @@ + break; + + case FCOFF: /*Flow control off command */ +- TS0710_PRINTK ++ TS0710_DEBUG + ("MUX Received Flow control(all channels) off command\n"); + if (mcc_short_pkt->h.type.cr == MCC_CMD) { + for (j = 0; j < TS0710_MAX_CHN; j++) { +@@ -1823,7 +1826,7 @@ + TS0710_DEBUG("UIH on channel %d\n", dlci); + + if (uih_len > ts0710->dlci[dlci].mtu) { +- TS0710_PRINTK ++ TS0710_DEBUG + ("MUX Error: DLCI:%d, uih_len:%d is bigger than mtu:%d, discard data!\n", + dlci, uih_len, ts0710->dlci[dlci].mtu); + break; +@@ -1844,7 +1847,7 @@ + dlci, tty_idx); + TS0710_DEBUGSTR(uih_data_start, uih_len); + if (!(iscmdtty[tty_idx])) { +- TS0710_PRINTK ++ TS0710_DEBUG + ("MUX Error: %s: Wrong CMDTAG on DLCI:%d, /dev/mux%d\n", + __FUNCTION__, dlci, tty_idx); + } +@@ -1856,7 +1859,7 @@ + ("NON-CMDTAG on DLCI:%d, /dev/mux%d\n", + dlci, tty_idx); + if (iscmdtty[tty_idx]) { +- TS0710_PRINTK ++ TS0710_DEBUG + ("MUX Error: %s: Wrong NON-CMDTAG on DLCI:%d, /dev/mux%d\n", + __FUNCTION__, dlci, tty_idx); + } +@@ -1864,13 +1867,14 @@ + } + tty = mux_table[tty_idx]; + if ((!mux_tty[tty_idx]) || (!tty)) { +- TS0710_PRINTK ++ TS0710_DEBUG + ("MUX: No application waiting for, discard it! /dev/mux%d\n", + tty_idx); ++ TS0710_DEBUG("MUX: mux_tty[%d] = %d, tty is at %i", tty_idx, mux_tty[tty_idx], tty); + } else { /* Begin processing received data */ + if ((!mux_recv_info_flags[tty_idx]) + || (!mux_recv_info[tty_idx])) { +- TS0710_PRINTK ++ TS0710_DEBUG + ("MUX Error: No mux_recv_info, discard it! /dev/mux%d\n", + tty_idx); + break; +@@ -1878,7 +1882,7 @@ + + recv_info = mux_recv_info[tty_idx]; + if (recv_info->total > 8192) { +- TS0710_PRINTK ++ TS0710_DEBUG + ("MUX : discard data for tty_idx:%d, recv_info->total > 8192 \n", + tty_idx); + break; +@@ -1949,7 +1953,7 @@ + get_mux_recv_packet + (uih_len); + if (!recv_packet) { +- TS0710_PRINTK ++ TS0710_DEBUG + ("MUX %s: no memory\n", + __FUNCTION__); + break; +@@ -1980,7 +1984,7 @@ + } else { /* recv_info->total == 0 */ + if (uih_len > + TS0710MUX_RECV_BUF_SIZE) { +- TS0710_PRINTK ++ TS0710_DEBUG + ("MUX Error: tty_idx:%d, uih_len == %d is too big\n", + tty_idx, uih_len); + uih_len = +@@ -2120,12 +2124,12 @@ + if (ts0710->dlci[dlci].state == DISCONNECTED) { + break; + } else if (signal_pending(current)) { +- TS0710_PRINTK ++ TS0710_DEBUG + ("MUX DLCI %d Send DISC got signal!\n", + dlci); + break; + } else if ((jiffies - t) >= TS0710MUX_TIME_OUT) { +- TS0710_PRINTK ++ TS0710_DEBUG + ("MUX DLCI %d Send DISC timeout!\n", dlci); + continue; + } +@@ -2158,7 +2162,7 @@ + return 0; + } else if (ts0710->dlci[0].state == CONNECTING) { + /* Reentry */ +- TS0710_PRINTK ++ TS0710_DEBUG + ("MUX DLCI: 0, reentry to open DLCI 0, pid: %d, %s !\n", + current->pid, current->comm); + try = 11; +@@ -2179,13 +2183,13 @@ + DISCONNECTED) { + break; + } else if (signal_pending(current)) { +- TS0710_PRINTK ++ TS0710_DEBUG + ("MUX DLCI:%d Wait for connecting got signal!\n", + dlci); + retval = -EAGAIN; + break; + } else if ((jiffies - t) >= TS0710MUX_TIME_OUT) { +- TS0710_PRINTK ++ TS0710_DEBUG + ("MUX DLCI:%d Wait for connecting timeout!\n", + dlci); + continue; +@@ -2199,7 +2203,7 @@ + } + } else if ((ts0710->dlci[0].state != DISCONNECTED) + && (ts0710->dlci[0].state != REJECTED)) { +- TS0710_PRINTK("MUX DLCI:%d state is invalid!\n", dlci); ++ TS0710_DEBUG("MUX DLCI:%d state is invalid!\n", dlci); + return retval; + } else { + ts0710->initiator = 1; +@@ -2218,19 +2222,19 @@ + retval = 0; + break; + } else if (ts0710->dlci[0].state == REJECTED) { +- TS0710_PRINTK ++ TS0710_DEBUG + ("MUX DLCI:%d Send SABM got rejected!\n", + dlci); + retval = -EREJECTED; + break; + } else if (signal_pending(current)) { +- TS0710_PRINTK ++ TS0710_DEBUG + ("MUX DLCI:%d Send SABM got signal!\n", + dlci); + retval = -EAGAIN; + break; + } else if ((jiffies - t) >= TS0710MUX_TIME_OUT) { +- TS0710_PRINTK ++ TS0710_DEBUG + ("MUX DLCI:%d Send SABM timeout!\n", + dlci); + continue; +@@ -2271,13 +2275,13 @@ + DISCONNECTED) { + break; + } else if (signal_pending(current)) { +- TS0710_PRINTK ++ TS0710_DEBUG + ("MUX DLCI:%d Wait for connecting got signal!\n", + dlci); + retval = -EAGAIN; + break; + } else if ((jiffies - t) >= TS0710MUX_TIME_OUT) { +- TS0710_PRINTK ++ TS0710_DEBUG + ("MUX DLCI:%d Wait for connecting timeout!\n", + dlci); + continue; +@@ -2296,7 +2300,7 @@ + } + } else if ((ts0710->dlci[dlci].state != DISCONNECTED) + && (ts0710->dlci[dlci].state != REJECTED)) { +- TS0710_PRINTK("MUX DLCI:%d state is invalid!\n", dlci); ++ TS0710_DEBUG("MUX DLCI:%d state is invalid!\n", dlci); + return retval; + } else { + ts0710->dlci[dlci].state = NEGOTIATING; +@@ -2313,13 +2317,13 @@ + if (ts0710->dlci[dlci].state == CONNECTING) { + break; + } else if (signal_pending(current)) { +- TS0710_PRINTK ++ TS0710_DEBUG + ("MUX DLCI:%d Send pn_msg got signal!\n", + dlci); + retval = -EAGAIN; + break; + } else if ((jiffies - t) >= TS0710MUX_TIME_OUT) { +- TS0710_PRINTK ++ TS0710_DEBUG + ("MUX DLCI:%d Send pn_msg timeout!\n", + dlci); + continue; +@@ -2344,20 +2348,20 @@ + break; + } else if (ts0710->dlci[dlci].state == + REJECTED) { +- TS0710_PRINTK ++ TS0710_DEBUG + ("MUX DLCI:%d Send SABM got rejected!\n", + dlci); + retval = -EREJECTED; + break; + } else if (signal_pending(current)) { +- TS0710_PRINTK ++ TS0710_DEBUG + ("MUX DLCI:%d Send SABM got signal!\n", + dlci); + retval = -EAGAIN; + break; + } else if ((jiffies - t) >= + TS0710MUX_TIME_OUT) { +- TS0710_PRINTK ++ TS0710_DEBUG + ("MUX DLCI:%d Send SABM timeout!\n", + dlci); + continue; +@@ -2468,7 +2472,7 @@ + schedule_work(&send_tqueue); + #else + if (!tq_serial_for_mux) { +- TS0710_PRINTK("MUX Error: %s: tq_serial_for_mux == 0\n", ++ TS0710_DEBUG("MUX Error: %s: tq_serial_for_mux == 0\n", + __FUNCTION__); + return; + } +@@ -2508,7 +2512,7 @@ + if ((mux_tty[cmdtty] == 0) && (mux_tty[datatty] == 0)) { + if (dlci == 1) { + ts0710_close_channel(0); +- TS0710_PRINTK ++ TS0710_DEBUG + ("MUX mux_close: tapisrv might be down!!! Close DLCI 1\n"); + TS0710_SIG2APLOGD(); + } +@@ -2673,12 +2677,12 @@ + UNUSED_PARAM(tty); + + if ((COMM_FOR_MUX_DRIVER == 0) || (COMM_FOR_MUX_TTY == 0)) { +- TS0710_PRINTK ++ TS0710_DEBUG + ("MUX %s: (COMM_FOR_MUX_DRIVER == 0) || (COMM_FOR_MUX_TTY == 0)\n", + __FUNCTION__); + + #ifndef USB_FOR_MUX +- TS0710_PRINTK ++ TS0710_DEBUG + ("MUX %s: tapisrv might be down!!! (serial_for_mux_driver == 0) || (serial_for_mux_tty == 0)\n", + __FUNCTION__); + TS0710_SIG2APLOGD(); +@@ -2724,14 +2728,14 @@ + } else if (ts0710->dlci[dlci].state == CONNECTED) { + + if (!(mux_send_info_flags[line])) { +- TS0710_PRINTK ++ TS0710_DEBUG + ("MUX Error: mux_write: mux_send_info_flags[%d] == 0\n", + line); + return -ENODEV; + } + send_info = mux_send_info[line]; + if (!send_info) { +- TS0710_PRINTK ++ TS0710_DEBUG + ("MUX Error: mux_write: mux_send_info[%d] == 0\n", + line); + return -ENODEV; +@@ -2800,7 +2804,7 @@ + } + return c; + } else { +- TS0710_PRINTK("MUX mux_write: DLCI %d not connected\n", dlci); ++ TS0710_DEBUG("MUX mux_write: DLCI %d not connected\n", dlci); + return -EDISCONNECTED; + } + } +@@ -2940,7 +2944,7 @@ + return; + } + +- TS0710_PRINTK("MUX %s: line is:%d\n", __FUNCTION__, line); ++ TS0710_DEBUG("MUX %s: line is:%d\n", __FUNCTION__, line); + + if ((mux_send_info_flags[line]) + && (mux_send_info[line]) +@@ -2960,10 +2964,10 @@ + + /* + if( (COMM_FOR_MUX_DRIVER == 0) || (COMM_FOR_MUX_TTY == 0) ) { +- TS0710_PRINTK("MUX %s: (COMM_FOR_MUX_DRIVER == 0) || (COMM_FOR_MUX_TTY == 0)\n", __FUNCTION__); ++ TS0710_DEBUG("MUX %s: (COMM_FOR_MUX_DRIVER == 0) || (COMM_FOR_MUX_TTY == 0)\n", __FUNCTION__); + + #ifndef USB_FOR_MUX +- TS0710_PRINTK("MUX %s: tapisrv might be down!!! (serial_for_mux_driver == 0) || (serial_for_mux_tty == 0)\n", __FUNCTION__); ++ TS0710_DEBUG("MUX %s: tapisrv might be down!!! (serial_for_mux_driver == 0) || (serial_for_mux_tty == 0)\n", __FUNCTION__); + TS0710_SIG2APLOGD(); + #endif + +@@ -2989,9 +2993,9 @@ + if ((COMM_FOR_MUX_DRIVER == NULL) || (COMM_FOR_MUX_TTY == NULL)) { + + #ifdef USB_FOR_MUX +- TS0710_PRINTK("MUX: please install and open IPC-USB first\n"); ++ TS0710_DEBUG("MUX: please install and open IPC-USB first\n"); + #else +- TS0710_PRINTK("MUX: please install and open ttyS0 first\n"); ++ TS0710_DEBUG("MUX: please install and open ttyS0 first\n"); + #endif + + goto out; +@@ -3016,7 +3020,7 @@ + /* if( dlci == 1 ) { */ + /* Open server channel 0 first */ + if ((retval = ts0710_open_channel(0)) != 0) { +- TS0710_PRINTK("MUX: Can't connect server channel 0!\n"); ++ TS0710_DEBUG("MUX: Can't connect server channel 0!\n"); + ts0710_init(); + + mux_tty[line]--; +@@ -3073,7 +3077,7 @@ + datatty = dlci2tty[dlci].datatty; + if ((mux_tty[cmdtty] > 0) || (mux_tty[datatty] > 0)) { + if ((retval = ts0710_open_channel(dlci)) != 0) { +- TS0710_PRINTK("MUX: Can't connected channel %d!\n", ++ TS0710_DEBUG("MUX: Can't connected channel %d!\n", + dlci); + ts0710_reset_dlci(dlci); + +@@ -3096,6 +3100,7 @@ + retval = 0; + #endif + out: ++ TS0710_DEBUG("returning %d for open of /dev/mux%d (mux_tty[%d] = %d", retval, line, line, mux_tty[line]); + return retval; + } + +@@ -3178,12 +3183,12 @@ + + while (1) { + tbuf_free = TS0710MUX_MAX_BUF_SIZE - (tbuf_ptr - tbuf); +- TS0710_PRINTK("Reading max %i bytes from ts0710_mux_usb inbuf.\n", tbuf_free); ++ TS0710_DEBUG("Reading max %i bytes from ts0710_mux_usb inbuf.\n", tbuf_free); + tbuf_read = get_from_inbuf_list(tbuf_ptr, tbuf_free); + if (tbuf_read == 0) { + break; + } else { +- TS0710_PRINTK("Read %i bytes.\n", tbuf_read); ++ TS0710_DEBUG("Read %i bytes.\n", tbuf_read); + }; + tbuf_ptr += tbuf_read; + }; +@@ -3192,7 +3197,7 @@ + + // Should be impossible? + //if (count > (TS0710MUX_MAX_BUF_SIZE - (tbuf_ptr - tbuf))) { +- // TS0710_PRINTK ++ // TS0710_DEBUG + // ("MUX receive_worker: !!!!! Exceed buffer boundary !!!!!\n"); + // count = (TS0710MUX_MAX_BUF_SIZE - (tbuf_ptr - tbuf)); + //} +@@ -3264,7 +3269,7 @@ + TS0710_LOGSTR_FRAME(0, start_flag, + (tbuf_ptr - + start_flag)); +- TS0710_PRINTK ++ TS0710_DEBUG + ("MUX Error: %s: frame length:%d is bigger than Max total frame size:%d\n", + /*__FUNCTION__, framelen, TS0710MUX_MAX_TOTAL_FRAME_SIZE);*/ + __FUNCTION__, framelen, (TS0710MUX_MAX_TOTAL_FRAME_SIZE + SEQ_FIELD_SIZE)); /*For BP UART problem */ +@@ -3389,7 +3394,7 @@ + *(uih_data_start + + uih_len) = + 0; +- TS0710_PRINTK ++ TS0710_DEBUG + ("MUX bp log: %s\n", + uih_data_start); + } +@@ -3415,7 +3420,7 @@ + TS0710_LOGSTR_FRAME(0, start_flag, + framelen); + TS0710_DEBUGHEX(start_flag, framelen); +- TS0710_PRINTK ++ TS0710_DEBUG + ("MUX: Lost synchronization!\n"); + search = start_flag + 1; + } +@@ -3476,7 +3481,7 @@ + recv_info2 = recv_info->next; + + if (!(recv_info->total)) { +- TS0710_PRINTK ++ TS0710_DEBUG + ("MUX Error: %s: Should not get here, recv_info->total == 0 \n", + __FUNCTION__); + continue; +@@ -3486,7 +3491,7 @@ + dlci = tty2dlci[tty_idx]; + tty = mux_table[tty_idx]; + if ((!mux_tty[tty_idx]) || (!tty)) { +- TS0710_PRINTK ++ TS0710_DEBUG + ("MUX: No application waiting for, free recv_info! tty_idx:%d\n", + tty_idx); + mux_recv_info_flags[tty_idx] = 0; +@@ -3560,7 +3565,7 @@ + recv_info->total -= recv_packet->length; + free_mux_recv_packet(recv_packet); + } else { +- TS0710_PRINTK ++ TS0710_DEBUG + ("MUX Error: %s: Should not get here, recv_info->total is:%u \n", + __FUNCTION__, recv_info->total); + } +@@ -3760,7 +3765,7 @@ + int ret; + + if (idx > TS0710MUX_COUNT_MAX_IDX) { +- TS0710_PRINTK("MUX get_count: invalid idx: %d!\n", idx); ++ TS0710_DEBUG("MUX get_count: invalid idx: %d!\n", idx); + return -1; + } + +@@ -3774,11 +3779,11 @@ + static int set_count(__u8 idx, int count) + { + if (idx > TS0710MUX_COUNT_MAX_IDX) { +- TS0710_PRINTK("MUX set_count: invalid idx: %d!\n", idx); ++ TS0710_DEBUG("MUX set_count: invalid idx: %d!\n", idx); + return -1; + } + if (count < 0) { +- TS0710_PRINTK("MUX set_count: invalid count: %d!\n", count); ++ TS0710_DEBUG("MUX set_count: invalid count: %d!\n", count); + return -1; + } + +@@ -3792,11 +3797,11 @@ + static int add_count(__u8 idx, int count) + { + if (idx > TS0710MUX_COUNT_MAX_IDX) { +- TS0710_PRINTK("MUX add_count: invalid idx: %d!\n", idx); ++ TS0710_DEBUG("MUX add_count: invalid idx: %d!\n", idx); + return -1; + } + if (count <= 0) { +- TS0710_PRINTK("MUX add_count: invalid count: %d!\n", count); ++ TS0710_DEBUG("MUX add_count: invalid count: %d!\n", count); + return -1; + } + +Index: linux-2.6.20.7/drivers/char/ts0710_mux_usb.c +=================================================================== +--- linux-2.6.20.7.orig/drivers/char/ts0710_mux_usb.c 2007-04-22 12:26:47.000000000 +0200 ++++ linux-2.6.20.7/drivers/char/ts0710_mux_usb.c 2007-04-22 12:26:47.000000000 +0200 +@@ -72,7 +72,8 @@ + #define IPC_USB_PROBE_NOT_READY 4 + #define DBG_MAX_BUF_SIZE 1024 + #define ICL_EVENT_INTERVAL (HZ) +-#undef BVD_DEBUG ++ ++#define BVD_DEBUG + + #define IS_EP_BULK(ep) ((ep).bmAttributes == USB_ENDPOINT_XFER_BULK ? 1 : 0) + #define IS_EP_BULK_IN(ep) (IS_EP_BULK(ep) && ((ep).bEndpointAddress & USB_ENDPOINT_DIR_MASK) == USB_DIR_IN) diff --git a/packages/linux/linux-ezx-2.6.20.7/usb_add_epalloc-r3.patch b/packages/linux/linux-ezx-2.6.20.7/usb_add_epalloc-r3.patch new file mode 100644 index 0000000000..fc9daf5297 --- /dev/null +++ b/packages/linux/linux-ezx-2.6.20.7/usb_add_epalloc-r3.patch @@ -0,0 +1,282 @@ +Index: linux-2.6.20.7/drivers/usb/gadget/epautoconf.c +=================================================================== +--- linux-2.6.20.7.orig/drivers/usb/gadget/epautoconf.c 2007-04-21 11:24:21.000000000 -0300 ++++ linux-2.6.20.7/drivers/usb/gadget/epautoconf.c 2007-04-21 11:27:53.000000000 -0300 +@@ -228,14 +228,19 @@ + * + * On failure, this returns a null endpoint descriptor. + */ +-struct usb_ep * __devinit usb_ep_autoconfig ( ++struct usb_ep * usb_ep_autoconfig ( + struct usb_gadget *gadget, +- struct usb_endpoint_descriptor *desc ++ struct usb_endpoint_descriptor *desc, ++ struct usb_endpoint_config *epconfig, int numconfigs + ) + { + struct usb_ep *ep; + u8 type; + ++ /* Use device specific ep allocation code if provided */ ++ if (gadget->ops->ep_alloc) ++ return gadget->ops->ep_alloc(gadget, desc, epconfig, numconfigs); ++ + type = desc->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK; + + /* First, apply chip-specific "best usage" knowledge. +Index: linux-2.6.20.7/drivers/usb/gadget/ether.c +=================================================================== +--- linux-2.6.20.7.orig/drivers/usb/gadget/ether.c 2007-04-21 11:27:52.000000000 -0300 ++++ linux-2.6.20.7/drivers/usb/gadget/ether.c 2007-04-21 11:27:53.000000000 -0300 +@@ -2219,7 +2219,8 @@ + struct eth_dev *dev; + struct net_device *net; + u8 cdc = 1, zlp = 1, rndis = 1; +- struct usb_ep *in_ep, *out_ep, *status_ep = NULL; ++ struct usb_ep *in_ep = NULL , *out_ep = NULL, *status_ep = NULL; ++ struct usb_endpoint_config ep_config[2]; + int status = -ENOMEM; + int gcnum; + +@@ -2318,7 +2319,26 @@ + + /* all we really need is bulk IN/OUT */ + usb_ep_autoconfig_reset (gadget); +- in_ep = usb_ep_autoconfig (gadget, &fs_source_desc); ++ ++ ep_config[0].config = DEV_CONFIG_VALUE; ++#if defined(DEV_CONFIG_CDC) ++ ep_config[0].interface = data_intf.bInterfaceNumber; ++ ep_config[0].altinterface = data_intf.bAlternateSetting; ++#else /* DEV_CONFIG_SUBSET */ ++ ep_config[0].interface = subset_data_intf.bInterfaceNumber; ++ ep_config[0].altinterface = subset_data_intf.bAlternateSetting; ++#endif ++ ++#ifdef CONFIG_USB_ETH_RNDIS ++ ep_config[1].config = DEV_RNDIS_CONFIG_VALUE; ++ ep_config[1].interface = rndis_data_intf.bInterfaceNumber; ++ ep_config[1].altinterface = rndis_data_intf.bAlternateSetting; ++ ++ in_ep = usb_ep_autoconfig(gadget, &fs_source_desc, &ep_config[0], 2); ++#else ++ in_ep = usb_ep_autoconfig(gadget, &fs_source_desc, &ep_config[0], 1); ++#endif ++ + if (!in_ep) { + autoconf_fail: + dev_err (&gadget->dev, +@@ -2328,7 +2348,12 @@ + } + in_ep->driver_data = in_ep; /* claim */ + +- out_ep = usb_ep_autoconfig (gadget, &fs_sink_desc); ++#ifdef CONFIG_USB_ETH_RNDIS ++ out_ep = usb_ep_autoconfig(gadget, &fs_sink_desc, &ep_config[0], 2); ++#else ++ out_ep = usb_ep_autoconfig(gadget, &fs_sink_desc, &ep_config[0], 1); ++#endif ++ + if (!out_ep) + goto autoconf_fail; + out_ep->driver_data = out_ep; /* claim */ +@@ -2338,7 +2363,25 @@ + * Since some hosts expect one, try to allocate one anyway. + */ + if (cdc || rndis) { +- status_ep = usb_ep_autoconfig (gadget, &fs_status_desc); ++#ifdef DEV_CONFIG_CDC ++ ep_config[0].config = DEV_CONFIG_VALUE; ++ ep_config[0].interface = control_intf.bInterfaceNumber; ++ ep_config[0].altinterface = control_intf.bAlternateSetting; ++#endif ++#ifdef CONFIG_USB_ETH_RNDIS ++ ep_config[1].config = DEV_RNDIS_CONFIG_VALUE; ++ ep_config[1].interface = rndis_control_intf.bInterfaceNumber; ++ ep_config[1].altinterface = rndis_control_intf.bAlternateSetting; ++#endif ++ ++#if defined(DEV_CONFIG_CDC) && defined(CONFIG_USB_ETH_RNDIS) ++ status_ep = usb_ep_autoconfig(gadget, &fs_status_desc, &ep_config[0], 2); ++#elif defined(CONFIG_USB_ETH_RNDIS) ++ status_ep = usb_ep_autoconfig(gadget, &fs_status_desc, &ep_config[1], 1); ++#else ++ status_ep = usb_ep_autoconfig(gadget, &fs_status_desc, &ep_config[0], 1); ++#endif ++ + if (status_ep) { + status_ep->driver_data = status_ep; /* claim */ + } else if (rndis) { +Index: linux-2.6.20.7/drivers/usb/gadget/file_storage.c +=================================================================== +--- linux-2.6.20.7.orig/drivers/usb/gadget/file_storage.c 2007-04-21 11:24:21.000000000 -0300 ++++ linux-2.6.20.7/drivers/usb/gadget/file_storage.c 2007-04-21 11:27:53.000000000 -0300 +@@ -3850,6 +3850,7 @@ + struct usb_ep *ep; + struct usb_request *req; + char *pathbuf, *p; ++ struct usb_endpoint_config ep_config; + + fsg->gadget = gadget; + set_gadget_data(gadget, fsg); +@@ -3920,21 +3921,25 @@ + } + + /* Find all the endpoints we will use */ ++ ep_config.config = CONFIG_VALUE; ++ ep_config.interface = intf_desc.bInterfaceNumber; ++ ep_config.altinterface = intf_desc.bAlternateSetting; ++ + usb_ep_autoconfig_reset(gadget); +- ep = usb_ep_autoconfig(gadget, &fs_bulk_in_desc); ++ ep = usb_ep_autoconfig(gadget, &fs_bulk_in_desc, &ep_config, 1); + if (!ep) + goto autoconf_fail; + ep->driver_data = fsg; // claim the endpoint + fsg->bulk_in = ep; + +- ep = usb_ep_autoconfig(gadget, &fs_bulk_out_desc); ++ ep = usb_ep_autoconfig(gadget, &fs_bulk_out_desc, &ep_config, 1); + if (!ep) + goto autoconf_fail; + ep->driver_data = fsg; // claim the endpoint + fsg->bulk_out = ep; + + if (transport_is_cbi()) { +- ep = usb_ep_autoconfig(gadget, &fs_intr_in_desc); ++ ep = usb_ep_autoconfig(gadget, &fs_intr_in_desc, &ep_config, 1); + if (!ep) + goto autoconf_fail; + ep->driver_data = fsg; // claim the endpoint +Index: linux-2.6.20.7/drivers/usb/gadget/serial.c +=================================================================== +--- linux-2.6.20.7.orig/drivers/usb/gadget/serial.c 2007-04-21 11:24:21.000000000 -0300 ++++ linux-2.6.20.7/drivers/usb/gadget/serial.c 2007-04-21 11:27:53.000000000 -0300 +@@ -1357,6 +1357,7 @@ + struct usb_ep *ep; + struct gs_dev *dev; + int gcnum; ++ struct usb_endpoint_config ep_config[2]; + + /* Some controllers can't support CDC ACM: + * - sh doesn't support multiple interfaces or configs; +@@ -1377,22 +1378,33 @@ + __constant_cpu_to_le16(GS_VERSION_NUM|0x0099); + } + ++ ep_config[0].config = GS_BULK_CONFIG_ID; ++ ep_config[0].interface = gs_bulk_interface_desc.bInterfaceNumber; ++ ep_config[0].altinterface = gs_bulk_interface_desc.bAlternateSetting; ++ ep_config[1].config = GS_ACM_CONFIG_ID; ++ ep_config[1].interface = gs_data_interface_desc.bInterfaceNumber; ++ ep_config[1].altinterface = gs_data_interface_desc.bAlternateSetting; ++ + usb_ep_autoconfig_reset(gadget); + +- ep = usb_ep_autoconfig(gadget, &gs_fullspeed_in_desc); ++ ep = usb_ep_autoconfig(gadget, &gs_fullspeed_in_desc, &ep_config[0], 2); + if (!ep) + goto autoconf_fail; + EP_IN_NAME = ep->name; + ep->driver_data = ep; /* claim the endpoint */ + +- ep = usb_ep_autoconfig(gadget, &gs_fullspeed_out_desc); ++ ep = usb_ep_autoconfig(gadget, &gs_fullspeed_out_desc, &ep_config[0], 2); + if (!ep) + goto autoconf_fail; + EP_OUT_NAME = ep->name; + ep->driver_data = ep; /* claim the endpoint */ + + if (use_acm) { +- ep = usb_ep_autoconfig(gadget, &gs_fullspeed_notify_desc); ++ ep_config[0].config = GS_ACM_CONFIG_ID; ++ ep_config[0].interface = gs_control_interface_desc.bInterfaceNumber; ++ ep_config[0].altinterface = gs_control_interface_desc.bAlternateSetting; ++ ++ ep = usb_ep_autoconfig(gadget, &gs_fullspeed_notify_desc, &ep_config[0], 1); + if (!ep) { + printk(KERN_ERR "gs_bind: cannot run ACM on %s\n", gadget->name); + goto autoconf_fail; +Index: linux-2.6.20.7/drivers/usb/gadget/zero.c +=================================================================== +--- linux-2.6.20.7.orig/drivers/usb/gadget/zero.c 2007-04-21 11:24:21.000000000 -0300 ++++ linux-2.6.20.7/drivers/usb/gadget/zero.c 2007-04-21 11:27:53.000000000 -0300 +@@ -1144,6 +1144,7 @@ + struct zero_dev *dev; + struct usb_ep *ep; + int gcnum; ++ struct usb_endpoint_config ep_config[2]; + + /* FIXME this can't yet work right with SH ... it has only + * one configuration, numbered one. +@@ -1156,7 +1157,15 @@ + * but there may also be important quirks to address. + */ + usb_ep_autoconfig_reset (gadget); +- ep = usb_ep_autoconfig (gadget, &fs_source_desc); ++ ++ ep_config[0].config = CONFIG_SOURCE_SINK; ++ ep_config[0].interface = source_sink_intf.bInterfaceNumber; ++ ep_config[0].altinterface = source_sink_intf.bAlternateSetting; ++ ep_config[1].config = CONFIG_LOOPBACK; ++ ep_config[1].interface = loopback_intf.bInterfaceNumber; ++ ep_config[1].altinterface = loopback_intf.bAlternateSetting; ++ ++ ep = usb_ep_autoconfig(gadget, &fs_source_desc, &ep_config[0], 2); + if (!ep) { + autoconf_fail: + printk (KERN_ERR "%s: can't autoconfigure on %s\n", +@@ -1166,7 +1175,7 @@ + EP_IN_NAME = ep->name; + ep->driver_data = ep; /* claim */ + +- ep = usb_ep_autoconfig (gadget, &fs_sink_desc); ++ ep = usb_ep_autoconfig(gadget, &fs_sink_desc, &ep_config[0], 2); + if (!ep) + goto autoconf_fail; + EP_OUT_NAME = ep->name; +Index: linux-2.6.20.7/include/linux/usb_gadget.h +=================================================================== +--- linux-2.6.20.7.orig/include/linux/usb_gadget.h 2007-04-21 11:24:21.000000000 -0300 ++++ linux-2.6.20.7/include/linux/usb_gadget.h 2007-04-21 11:27:53.000000000 -0300 +@@ -445,10 +445,28 @@ + + struct usb_gadget; + ++/** ++ * struct usb_endpoint_config - possible configurations of a given endpoint ++ * @config: the configuration number ++ * @interface: the interface number ++ * @altinterface: the altinterface number ++ * ++ * Used as an array to pass information about the possible configurations ++ * of a given endpoint to the bus controller. ++ */ ++struct usb_endpoint_config { ++ u8 config; ++ u8 interface; ++ u8 altinterface; ++}; ++ + /* the rest of the api to the controller hardware: device operations, + * which don't involve endpoints (or i/o). + */ + struct usb_gadget_ops { ++ struct usb_ep* (*ep_alloc)(struct usb_gadget *, ++ struct usb_endpoint_descriptor *, ++ struct usb_endpoint_config *, int); + int (*get_frame)(struct usb_gadget *); + int (*wakeup)(struct usb_gadget *); + int (*set_selfpowered) (struct usb_gadget *, int is_selfpowered); +@@ -872,7 +890,10 @@ + /* utility wrapping a simple endpoint selection policy */ + + extern struct usb_ep *usb_ep_autoconfig (struct usb_gadget *, +- struct usb_endpoint_descriptor *) __devinit; ++ struct usb_endpoint_descriptor *, ++ struct usb_endpoint_config *, ++ int numconfigs ++); + + extern void usb_ep_autoconfig_reset (struct usb_gadget *) __devinit; + diff --git a/packages/linux/linux-ezx-2.6.20.7/usb_pxa27x_udc-r3.patch b/packages/linux/linux-ezx-2.6.20.7/usb_pxa27x_udc-r3.patch new file mode 100644 index 0000000000..2e60d5b9ce --- /dev/null +++ b/packages/linux/linux-ezx-2.6.20.7/usb_pxa27x_udc-r3.patch @@ -0,0 +1,2868 @@ + arch/arm/mach-pxa/spitz.c | 27 + drivers/usb/gadget/Kconfig | 20 + drivers/usb/gadget/Makefile | 1 + drivers/usb/gadget/ether.c | 12 + drivers/usb/gadget/pxa27x_udc.c | 2412 ++++++++++++++++++++++++++++++++++++++++ + drivers/usb/gadget/pxa27x_udc.h | 298 ++++ + drivers/usb/gadget/pxa2xx_udc.h | 7 + 7 files changed, 2774 insertions(+), 3 deletions(-) + +Index: linux-2.6.20.7/arch/arm/mach-pxa/spitz.c +=================================================================== +--- linux-2.6.20.7.orig/arch/arm/mach-pxa/spitz.c 2007-04-21 12:21:53.000000000 -0300 ++++ linux-2.6.20.7/arch/arm/mach-pxa/spitz.c 2007-04-21 12:22:00.000000000 -0300 +@@ -348,6 +348,32 @@ + + + /* ++ * USB Client (Gadget/UDC) ++ */ ++static void spitz_udc_command(int cmd) ++{ ++ switch(cmd) { ++ case PXA2XX_UDC_CMD_CONNECT: ++ UP2OCR = UP2OCR_HXOE | UP2OCR_DMPUE | UP2OCR_DMPUBE; ++ break; ++ case PXA2XX_UDC_CMD_DISCONNECT: ++ //UP2OCR = UP2OCR_HXOE | UP2OCR_DMPUE | UP2OCR_DMPUBE; ++ break; ++ } ++} ++ ++static int spitz_udc_detect(void) ++{ ++ return 1; ++} ++ ++static struct pxa2xx_udc_mach_info spitz_udc_info __initdata = { ++ .udc_is_connected = spitz_udc_detect, ++ .udc_command = spitz_udc_command, ++}; ++ ++ ++/* + * USB Host (OHCI) + */ + static int spitz_ohci_init(struct device *dev) +@@ -498,6 +524,7 @@ + pxa_gpio_mode(SPITZ_GPIO_HSYNC | GPIO_IN); + + platform_add_devices(devices, ARRAY_SIZE(devices)); ++ pxa_set_udc_info(&spitz_udc_info); + pxa_set_mci_info(&spitz_mci_platform_data); + pxa_set_ohci_info(&spitz_ohci_platform_data); + pxa_set_ficp_info(&spitz_ficp_platform_data); +Index: linux-2.6.20.7/drivers/usb/gadget/Kconfig +=================================================================== +--- linux-2.6.20.7.orig/drivers/usb/gadget/Kconfig 2007-04-21 12:21:53.000000000 -0300 ++++ linux-2.6.20.7/drivers/usb/gadget/Kconfig 2007-04-21 12:22:00.000000000 -0300 +@@ -121,6 +121,26 @@ + default y if USB_ETH + default y if USB_G_SERIAL + ++config USB_GADGET_PXA27X ++ boolean "PXA 27x" ++ depends on ARCH_PXA && PXA27x ++ help ++ Intel's PXA 27x series XScale ARM-5TE processors include ++ an integrated full speed USB 1.1 device controller. ++ ++ It has 23 endpoints, as well as endpoint zero (for control ++ transfers). ++ ++ Say "y" to link the driver statically, or "m" to build a ++ dynamically linked module called "pxa27x_udc" and force all ++ gadget drivers to also be dynamically linked. ++ ++config USB_PXA27X ++ tristate ++ depends on USB_GADGET_PXA27X ++ default USB_GADGET ++ select USB_GADGET_SELECTED ++ + config USB_GADGET_GOKU + boolean "Toshiba TC86C001 'Goku-S'" + depends on PCI +Index: linux-2.6.20.7/drivers/usb/gadget/Makefile +=================================================================== +--- linux-2.6.20.7.orig/drivers/usb/gadget/Makefile 2007-04-21 12:21:53.000000000 -0300 ++++ linux-2.6.20.7/drivers/usb/gadget/Makefile 2007-04-21 12:22:00.000000000 -0300 +@@ -4,6 +4,7 @@ + obj-$(CONFIG_USB_DUMMY_HCD) += dummy_hcd.o + obj-$(CONFIG_USB_NET2280) += net2280.o + obj-$(CONFIG_USB_PXA2XX) += pxa2xx_udc.o ++obj-$(CONFIG_USB_PXA27X) += pxa27x_udc.o + obj-$(CONFIG_USB_GOKU) += goku_udc.o + obj-$(CONFIG_USB_OMAP) += omap_udc.o + obj-$(CONFIG_USB_LH7A40X) += lh7a40x_udc.o +Index: linux-2.6.20.7/drivers/usb/gadget/pxa27x_udc.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-2.6.20.7/drivers/usb/gadget/pxa27x_udc.c 2007-04-21 12:29:05.000000000 -0300 +@@ -0,0 +1,2412 @@ ++/* ++ * Handles the Intel 27x USB Device Controller (UDC) ++ * ++ * Copyright (C) 2002 Intrinsyc, Inc. (Frank Becker) ++ * Copyright (C) 2003 Robert Schwebel, Pengutronix ++ * Copyright (C) 2003 Benedikt Spranger, Pengutronix ++ * Copyright (C) 2003 David Brownell ++ * Copyright (C) 2003 Joshua Wise ++ * Copyright (C) 2004 Intel Corporation ++ * Copyright (C) 2005 SDG Systems, LLC (Aric Blumer) ++ * Copyright (C) 2005-2006 Openedhand Ltd. (Richard Purdie) ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA ++ * ++ */ ++ ++#undef DEBUG ++//#define DEBUG 1 ++//#define VERBOSE DBG_VERBOSE ++ ++#include <linux/module.h> ++#include <linux/kernel.h> ++#include <linux/ioport.h> ++#include <linux/types.h> ++#include <linux/version.h> ++#include <linux/errno.h> ++#include <linux/platform_device.h> ++#include <linux/delay.h> ++#include <linux/sched.h> ++#include <linux/slab.h> ++#include <linux/init.h> ++#include <linux/timer.h> ++#include <linux/list.h> ++#include <linux/interrupt.h> ++#include <linux/proc_fs.h> ++#include <linux/mm.h> ++#include <linux/device.h> ++#include <linux/dma-mapping.h> ++ ++#include <asm/byteorder.h> ++#include <asm/dma.h> ++#include <asm/io.h> ++#include <asm/irq.h> ++#include <asm/system.h> ++#include <asm/mach-types.h> ++#include <asm/unaligned.h> ++#include <asm/hardware.h> ++#include <asm/arch/pxa-regs.h> ++ ++#include <linux/usb_ch9.h> ++#include <linux/usb_gadget.h> ++ ++#include <asm/arch/udc.h> ++ ++/* ++ * This driver handles the USB Device Controller (UDC) in Intel's PXA 27x ++ * series processors. ++ * ++ * Such controller drivers work with a gadget driver. The gadget driver ++ * returns descriptors, implements configuration and data protocols used ++ * by the host to interact with this device, and allocates endpoints to ++ * the different protocol interfaces. The controller driver virtualizes ++ * usb hardware so that the gadget drivers will be more portable. ++ * ++ * This UDC hardware wants to implement a bit too much USB protocol. The ++ * biggest issue is that the endpoints have to be setup before the controller ++ * can be enabled and each endpoint can only have one configuration, interface ++ * and alternative interface number. Once enabled, these cannot be changed ++ * without a controller reset. ++ * ++ * Intel Errata #22 mentions issues when changing alternate interface. ++ * The exact meaning of this remains uncertain as gadget drivers using alternate ++ * interfaces such as CDC-Ethernet appear to work... ++ */ ++ ++#define DRIVER_VERSION "01-01-2006" ++#define DRIVER_DESC "PXA 27x USB Device Controller driver" ++ ++static const char driver_name [] = "pxa27x_udc"; ++ ++static const char ep0name [] = "ep0"; ++ ++ ++#define USE_DMA ++//#undef USE_DMA ++ ++#ifdef CONFIG_PROC_FS ++#define UDC_PROC_FILE ++#endif ++ ++#include "pxa27x_udc.h" ++ ++#ifdef USE_DMA ++static int use_dma = 1; ++module_param(use_dma, bool, 0); ++MODULE_PARM_DESC(use_dma, "true to use dma"); ++ ++static void dma_nodesc_handler(int dmach, void *_ep); ++static void kick_dma(struct pxa27x_ep *ep, struct pxa27x_request *req); ++ ++#define DMASTR " (dma support)" ++ ++#else /* !USE_DMA */ ++#define DMASTR " (pio only)" ++#endif ++ ++#define UDCISR0_IR0 0x3 ++#define UDCISR_INT_MASK (UDC_INT_FIFOERROR | UDC_INT_PACKETCMP) ++#define UDCICR_INT_MASK UDCISR_INT_MASK ++ ++#define UDCCSR_MASK (UDCCSR_FST | UDCCSR_DME) ++ ++static void pxa27x_ep_fifo_flush(struct usb_ep *ep); ++static void nuke(struct pxa27x_ep *, int status); ++static void udc_init_ep(struct pxa27x_udc *dev); ++ ++ ++/* ++ * Endpoint Functions ++ */ ++static void pio_irq_enable(int ep_num) ++{ ++ if (ep_num < 16) ++ UDCICR0 |= 3 << (ep_num * 2); ++ else { ++ ep_num -= 16; ++ UDCICR1 |= 3 << (ep_num * 2); ++ } ++} ++ ++static void pio_irq_disable(int ep_num) ++{ ++ ep_num &= 0xf; ++ if (ep_num < 16) ++ UDCICR0 &= ~(3 << (ep_num * 2)); ++ else { ++ ep_num -= 16; ++ UDCICR1 &= ~(3 << (ep_num * 2)); ++ } ++} ++ ++/* The UDCCR reg contains mask and interrupt status bits, ++ * so using '|=' isn't safe as it may ack an interrupt. ++ */ ++#define UDCCR_MASK_BITS (UDCCR_OEN | UDCCR_UDE) ++ ++static inline void udc_set_mask_UDCCR(int mask) ++{ ++ UDCCR = (UDCCR & UDCCR_MASK_BITS) | (mask & UDCCR_MASK_BITS); ++} ++ ++static inline void udc_clear_mask_UDCCR(int mask) ++{ ++ UDCCR = (UDCCR & UDCCR_MASK_BITS) & ~(mask & UDCCR_MASK_BITS); ++} ++ ++static inline void udc_ack_int_UDCCR(int mask) ++{ ++ /* udccr contains the bits we dont want to change */ ++ __u32 udccr = UDCCR & UDCCR_MASK_BITS; ++ ++ UDCCR = udccr | (mask & ~UDCCR_MASK_BITS); ++} ++ ++/* ++ * Endpoint enable/disable ++ * ++ * Not much to do here as the ep_alloc function sets up most things. Once ++ * enabled, not much of the pxa27x configuration can be changed. ++ * ++ */ ++static int pxa27x_ep_enable(struct usb_ep *_ep, const struct usb_endpoint_descriptor *desc) ++{ ++ struct pxa27x_virt_ep *virt_ep = container_of(_ep, struct pxa27x_virt_ep, usb_ep); ++ struct pxa27x_ep *ep = virt_ep->pxa_ep; ++ struct pxa27x_udc *dev; ++ ++ if (!_ep || !desc || _ep->name == ep0name ++ || desc->bDescriptorType != USB_DT_ENDPOINT ++ || ep->fifo_size < le16_to_cpu(desc->wMaxPacketSize)) { ++ dev_err(ep->dev->dev, "%s, bad ep or descriptor\n", __FUNCTION__); ++ return -EINVAL; ++ } ++ ++ /* xfer types must match, except that interrupt ~= bulk */ ++ if( ep->ep_type != USB_ENDPOINT_XFER_BULK ++ && desc->bmAttributes != USB_ENDPOINT_XFER_INT) { ++ dev_err(ep->dev->dev, "%s, %s type mismatch\n", __FUNCTION__, _ep->name); ++ return -EINVAL; ++ } ++ ++ /* hardware _could_ do smaller, but driver doesn't */ ++ if ((desc->bmAttributes == USB_ENDPOINT_XFER_BULK ++ && le16_to_cpu (desc->wMaxPacketSize) ++ != BULK_FIFO_SIZE) ++ || !desc->wMaxPacketSize) { ++ dev_err(ep->dev->dev, "%s, bad %s maxpacket\n", __FUNCTION__, _ep->name); ++ return -ERANGE; ++ } ++ ++ dev = ep->dev; ++ if (!dev->driver || dev->gadget.speed == USB_SPEED_UNKNOWN) { ++ dev_err(ep->dev->dev, "%s, bogus device state\n", __FUNCTION__); ++ return -ESHUTDOWN; ++ } ++ ++ ep->desc = desc; ++ ep->dma = -1; ++ ep->stopped = 0; ++ ep->pio_irqs = ep->dma_irqs = 0; ++ ep->usb_ep->maxpacket = le16_to_cpu(desc->wMaxPacketSize); ++ ++ /* flush fifo (mostly for OUT buffers) */ ++ pxa27x_ep_fifo_flush(_ep); ++ ++ /* ... reset halt state too, if we could ... */ ++ ++#ifdef USE_DMA ++ /* for (some) bulk and ISO endpoints, try to get a DMA channel and ++ * bind it to the endpoint. otherwise use PIO. ++ */ ++ dev_dbg(ep->dev->dev, "%s: called attributes=%d\n", __FUNCTION__, ep->ep_type); ++ switch (ep->ep_type) { ++ case USB_ENDPOINT_XFER_ISOC: ++ if (le16_to_cpu(desc->wMaxPacketSize) % 32) ++ break; ++ // fall through ++ case USB_ENDPOINT_XFER_BULK: ++ if (!use_dma || !ep->reg_drcmr) ++ break; ++ ep->dma = pxa_request_dma((char *)_ep->name, (le16_to_cpu(desc->wMaxPacketSize) > 64) ++ ? DMA_PRIO_MEDIUM : DMA_PRIO_LOW, dma_nodesc_handler, ep); ++ if (ep->dma >= 0) { ++ *ep->reg_drcmr = DRCMR_MAPVLD | ep->dma; ++ dev_dbg(ep->dev->dev, "%s using dma%d\n", _ep->name, ep->dma); ++ } ++ default: ++ break; ++ } ++#endif ++ DBG(DBG_VERBOSE, "enabled %s\n", _ep->name); ++ return 0; ++} ++ ++static int pxa27x_ep_disable(struct usb_ep *_ep) ++{ ++ struct pxa27x_virt_ep *virt_ep = container_of(_ep, struct pxa27x_virt_ep, usb_ep); ++ struct pxa27x_ep *ep = virt_ep->pxa_ep; ++ unsigned long flags; ++ ++ if (!_ep || !ep->desc) { ++ dev_err(ep->dev->dev, "%s, %s not enabled\n", __FUNCTION__, ++ _ep ? _ep->name : NULL); ++ return -EINVAL; ++ } ++ local_irq_save(flags); ++ nuke(ep, -ESHUTDOWN); ++ ++#ifdef USE_DMA ++ if (ep->dma >= 0) { ++ *ep->reg_drcmr = 0; ++ pxa_free_dma(ep->dma); ++ ep->dma = -1; ++ } ++#endif ++ ++ /* flush fifo (mostly for IN buffers) */ ++ pxa27x_ep_fifo_flush(_ep); ++ ++ ep->desc = 0; ++ ep->stopped = 1; ++ ++ local_irq_restore(flags); ++ DBG(DBG_VERBOSE, "%s disabled\n", _ep->name); ++ return 0; ++} ++ ++ ++ ++/* for the pxa27x, these can just wrap kmalloc/kfree. gadget drivers ++ * must still pass correctly initialized endpoints, since other controller ++ * drivers may care about how it's currently set up (dma issues etc). ++ */ ++ ++/* ++ * pxa27x_ep_alloc_request - allocate a request data structure ++ */ ++static struct usb_request * ++pxa27x_ep_alloc_request(struct usb_ep *_ep, unsigned gfp_flags) ++{ ++ struct pxa27x_request *req; ++ ++ req = kzalloc(sizeof *req, gfp_flags); ++ if (!req) ++ return 0; ++ ++ INIT_LIST_HEAD(&req->queue); ++ return &req->req; ++} ++ ++ ++/* ++ * pxa27x_ep_free_request - deallocate a request data structure ++ */ ++static void ++pxa27x_ep_free_request(struct usb_ep *_ep, struct usb_request *_req) ++{ ++ struct pxa27x_request *req; ++ ++ req = container_of(_req, struct pxa27x_request, req); ++ WARN_ON(!list_empty(&req->queue)); ++ kfree(req); ++} ++ ++ ++/* PXA cache needs flushing with DMA I/O (it's dma-incoherent), but there's ++ * no device-affinity and the heap works perfectly well for i/o buffers. ++ * It wastes much less memory than dma_alloc_coherent() would, and even ++ * prevents cacheline (32 bytes wide) sharing problems. ++ */ ++static void * ++pxa27x_ep_alloc_buffer(struct usb_ep *_ep, unsigned bytes, dma_addr_t *dma, unsigned gfp_flags) ++{ ++ char *retval; ++ ++ retval = kmalloc(bytes, gfp_flags & ~(__GFP_DMA|__GFP_HIGHMEM)); ++ if (retval) ++ *dma = virt_to_bus(retval); ++ return retval; ++} ++ ++static void ++pxa27x_ep_free_buffer(struct usb_ep *_ep, void *buf, dma_addr_t dma, unsigned bytes) ++{ ++ kfree(buf); ++} ++ ++/*-------------------------------------------------------------------------*/ ++ ++/* ++ * done - retire a request; caller blocked irqs ++ */ ++static void done(struct pxa27x_ep *ep, struct pxa27x_request *req, int status) ++{ ++ list_del_init(&req->queue); ++ if (likely (req->req.status == -EINPROGRESS)) ++ req->req.status = status; ++ else ++ status = req->req.status; ++ ++ if (status && status != -ESHUTDOWN) ++ DBG(DBG_VERBOSE, "complete %s req %p stat %d len %u/%u\n", ++ ep->usb_ep->name, &req->req, status, ++ req->req.actual, req->req.length); ++ ++ /* don't modify queue heads during completion callback */ ++ req->req.complete(ep->usb_ep, &req->req); ++} ++ ++ ++static inline void ep0_idle(struct pxa27x_udc *dev) ++{ ++ dev->ep0state = EP0_IDLE; ++} ++ ++static int write_packet(volatile u32 *uddr, struct pxa27x_request *req, unsigned max) ++{ ++ u32 *buf; ++ int length, count, remain; ++ ++ buf = (u32*)(req->req.buf + req->req.actual); ++ prefetch(buf); ++ ++ /* how big will this packet be? */ ++ length = min(req->req.length - req->req.actual, max); ++ req->req.actual += length; ++ ++ remain = length & 0x3; ++ count = length & ~(0x3); ++ ++ //dev_dbg(ep->dev->dev, "Length %d, Remain %d, Count %d\n",length, remain, count); ++ ++ while (likely(count)) { ++ //dev_dbg(ep->dev->dev, "Sending:0x%x\n", *buf); ++ *uddr = *buf++; ++ count -= 4; ++ } ++ ++ if (remain) { ++ volatile u8* reg=(u8*)uddr; ++ char *rd =(u8*)buf; ++ ++ while (remain--) { ++ *reg=*rd++; ++ } ++ } ++ ++ return length; ++} ++ ++/* ++ * write to an IN endpoint fifo, as many packets as possible. ++ * irqs will use this to write the rest later. ++ * caller guarantees at least one packet buffer is ready (or a zlp). ++ */ ++static int ++write_fifo(struct pxa27x_ep *ep, struct pxa27x_request *req) ++{ ++ unsigned max; ++ ++ max = le16_to_cpu(ep->desc->wMaxPacketSize); ++ do { ++ int count, is_last, is_short; ++ ++ //dev_dbg(ep->dev->dev, "write_fifo7 %x\n", *ep->reg_udccsr); ++ ++ if (*ep->reg_udccsr & UDCCSR_PC) { ++ //dev_dbg(ep->dev->dev, "Transmit Complete\n"); ++ *ep->reg_udccsr = UDCCSR_PC | (*ep->reg_udccsr & UDCCSR_MASK); ++ } ++ ++ if (*ep->reg_udccsr & UDCCSR_TRN) { ++ //dev_dbg(ep->dev->dev, "Clearing Underrun\n"); ++ *ep->reg_udccsr = UDCCSR_TRN | (*ep->reg_udccsr & UDCCSR_MASK); ++ } ++ //dev_dbg(ep->dev->dev, "write_fifo8 %x\n", *ep->reg_udccsr); ++ ++ count = write_packet(ep->reg_udcdr, req, max); ++ ++ /* last packet is usually short (or a zlp) */ ++ if (unlikely (count != max)) ++ is_last = is_short = 1; ++ else { ++ if (likely(req->req.length != req->req.actual) ++ || req->req.zero) ++ is_last = 0; ++ else ++ is_last = 1; ++ /* interrupt/iso maxpacket may not fill the fifo */ ++ is_short = unlikely (max < ep->fifo_size); ++ } ++ ++ //dev_dbg(ep->dev->dev, "write_fifo0 %x\n", *ep->reg_udccsr); ++ ++ dev_dbg(ep->dev->dev, "wrote %s count:%d bytes%s%s %d left %p\n", ++ ep->usb_ep->name, count, ++ is_last ? "/L" : "", is_short ? "/S" : "", ++ req->req.length - req->req.actual, &req->req); ++ ++ /* let loose that packet. maybe try writing another one, ++ * double buffering might work. ++ */ ++ ++ if (is_short) ++ *ep->reg_udccsr = UDCCSR_SP | (*ep->reg_udccsr & UDCCSR_MASK); ++ ++ dev_dbg(ep->dev->dev, "write_fifo0.5 %x\n", *ep->reg_udccsr); ++ ++ /* requests complete when all IN data is in the FIFO */ ++ if (is_last) { ++ done(ep, req, 0); ++ if (list_empty(&ep->queue) || unlikely(ep->dma >= 0)) { ++ pio_irq_disable(ep->pxa_ep_num); ++ //dev_dbg(ep->dev->dev, "write_fifo1 %x\n", *ep->reg_udccsr); ++#ifdef USE_DMA ++ /* unaligned data and zlps couldn't use dma */ ++ if (unlikely(!list_empty(&ep->queue))) { ++ req = list_entry(ep->queue.next, ++ struct pxa27x_request, queue); ++ kick_dma(ep,req); ++ return 0; ++ } ++#endif ++ } ++ //dev_dbg(ep->dev->dev, "write_fifo2 %x\n", *ep->reg_udccsr); ++ return 1; ++ } ++ ++ // TODO experiment: how robust can fifo mode tweaking be? ++ // double buffering is off in the default fifo mode, which ++ // prevents TFS from being set here. ++ ++ } while (*ep->reg_udccsr & UDCCSR_FS); ++ //dev_dbg(ep->dev->dev, "write_fifo2 %x\n", *ep->reg_udccsr); ++ return 0; ++} ++ ++/* caller asserts req->pending (ep0 irq status nyet cleared); starts ++ * ep0 data stage. these chips want very simple state transitions. ++ */ ++static inline ++void ep0start(struct pxa27x_udc *dev, u32 flags, const char *tag) ++{ ++ UDCCSR0 = flags|UDCCSR0_SA|UDCCSR0_OPC; ++ UDCISR0 = UDCICR_INT(0, UDC_INT_FIFOERROR | UDC_INT_PACKETCMP); ++ dev->req_pending = 0; ++ DBG(DBG_VERY_NOISY, "%s %s, %02x/%02x\n", ++ __FUNCTION__, tag, UDCCSR0, flags); ++} ++ ++static int ++write_ep0_fifo(struct pxa27x_ep *ep, struct pxa27x_request *req) ++{ ++ unsigned count; ++ int is_short; ++ ++ count = write_packet(&UDCDR0, req, EP0_FIFO_SIZE); ++ ep->dev->stats.write.bytes += count; ++ ++ /* last packet "must be" short (or a zlp) */ ++ is_short = (count != EP0_FIFO_SIZE); ++ ++ DBG(DBG_VERY_NOISY, "ep0in %d bytes %d left %p\n", count, ++ req->req.length - req->req.actual, &req->req); ++ ++ if (unlikely (is_short)) { ++ if (ep->dev->req_pending) ++ ep0start(ep->dev, UDCCSR0_IPR, "short IN"); ++ else ++ UDCCSR0 = UDCCSR0_IPR; ++ ++ count = req->req.length; ++ done(ep, req, 0); ++ ep0_idle(ep->dev); ++#if 0 ++ /* This seems to get rid of lost status irqs in some cases: ++ * host responds quickly, or next request involves config ++ * change automagic, or should have been hidden, or ... ++ * ++ * FIXME get rid of all udelays possible... ++ */ ++ if (count >= EP0_FIFO_SIZE) { ++ count = 100; ++ do { ++ if ((UDCCSR0 & UDCCSR0_OPC) != 0) { ++ /* clear OPC, generate ack */ ++ UDCCSR0 = UDCCSR0_OPC; ++ break; ++ } ++ count--; ++ udelay(1); ++ } while (count); ++ } ++#endif ++ } else if (ep->dev->req_pending) ++ ep0start(ep->dev, 0, "IN"); ++ return is_short; ++} ++ ++ ++/* ++ * read_fifo - unload packet(s) from the fifo we use for usb OUT ++ * transfers and put them into the request. caller should have made ++ * sure there's at least one packet ready. ++ * ++ * returns true if the request completed because of short packet or the ++ * request buffer having filled (and maybe overran till end-of-packet). ++ */ ++static int read_fifo(struct pxa27x_ep *ep, struct pxa27x_request *req) ++{ ++ for (;;) { ++ u32 *buf; ++ int bufferspace, count, is_short; ++ ++ /* make sure there's a packet in the FIFO.*/ ++ if (unlikely ((*ep->reg_udccsr & UDCCSR_PC) == 0)) ++ break; ++ buf =(u32*) (req->req.buf + req->req.actual); ++ prefetchw(buf); ++ bufferspace = req->req.length - req->req.actual; ++ ++ /* read all bytes from this packet */ ++ if (likely (*ep->reg_udccsr & UDCCSR_BNE)) { ++ count = 0x3ff & *ep->reg_udcbcr; ++ req->req.actual += min(count, bufferspace); ++ } else /* zlp */ ++ count = 0; ++ ++ is_short = (count < ep->usb_ep->maxpacket); ++ dev_dbg(ep->dev->dev, "read %s udccsr:%02x, count:%d bytes%s req %p %d/%d\n", ++ ep->usb_ep->name, *ep->reg_udccsr, count, ++ is_short ? "/S" : "", ++ &req->req, req->req.actual, req->req.length); ++ ++ count = min(count, bufferspace); ++ while (likely (count > 0)) { ++ *buf++ = *ep->reg_udcdr; ++ count -= 4; ++ } ++ dev_dbg(ep->dev->dev, "Buf:0x%p\n", req->req.buf); ++ ++ *ep->reg_udccsr = UDCCSR_PC; ++ /* RPC/RSP/RNE could now reflect the other packet buffer */ ++ ++ /* completion */ ++ if (is_short || req->req.actual == req->req.length) { ++ done(ep, req, 0); ++ if (list_empty(&ep->queue)) ++ pio_irq_disable(ep->pxa_ep_num); ++ return 1; ++ } ++ ++ /* finished that packet. the next one may be waiting... */ ++ } ++ return 0; ++} ++ ++/* ++ * special ep0 version of the above. no UBCR0 or double buffering; status ++ * handshaking is magic. most device protocols don't need control-OUT. ++ * CDC vendor commands (and RNDIS), mass storage CB/CBI, and some other ++ * protocols do use them. ++ */ ++static int read_ep0_fifo(struct pxa27x_ep *ep, struct pxa27x_request *req) ++{ ++ u32 *buf, word; ++ unsigned bufferspace; ++ ++ buf = (u32*) (req->req.buf + req->req.actual); ++ bufferspace = req->req.length - req->req.actual; ++ ++ while (UDCCSR0 & UDCCSR0_RNE) { ++ word = UDCDR0; ++ ++ if (unlikely (bufferspace == 0)) { ++ /* this happens when the driver's buffer ++ * is smaller than what the host sent. ++ * discard the extra data. ++ */ ++ if (req->req.status != -EOVERFLOW) ++ dev_info(ep->dev->dev, "%s overflow\n", ep->usb_ep->name); ++ req->req.status = -EOVERFLOW; ++ } else { ++ *buf++ = word; ++ req->req.actual += 4; ++ bufferspace -= 4; ++ } ++ } ++ ++ UDCCSR0 = UDCCSR0_OPC ; ++ ++ /* completion */ ++ if (req->req.actual >= req->req.length) ++ return 1; ++ ++ /* finished that packet. the next one may be waiting... */ ++ return 0; ++} ++ ++#ifdef USE_DMA ++ ++#define MAX_IN_DMA ((DCMD_LENGTH + 1) - BULK_FIFO_SIZE) ++static void kick_dma(struct pxa27x_ep *ep, struct pxa27x_request *req) ++{ ++ u32 dcmd = 0; ++ u32 len = req->req.length; ++ u32 buf = req->req.dma; ++ u32 fifo = io_v2p((u32)ep->reg_udcdr); ++ ++ buf += req->req.actual; ++ len -= req->req.actual; ++ ep->dma_con = 0; ++ ++ DMSG("%s: req:0x%p length:%d, actual:%d dma:%d\n", ++ __FUNCTION__, &req->req, req->req.length, ++ req->req.actual,ep->dma); ++ ++ /* no-descriptor mode can be simple for bulk-in, iso-in, iso-out */ ++ DCSR(ep->dma) = DCSR_NODESC; ++ if (buf & 0x3) ++ DALGN |= 1 << ep->dma; ++ else ++ DALGN &= ~(1 << ep->dma); ++ ++ if (ep->dir_in) { ++ DSADR(ep->dma) = buf; ++ DTADR(ep->dma) = fifo; ++ if (len > MAX_IN_DMA) { ++ len= MAX_IN_DMA; ++ ep->dma_con =1 ; ++ } else if (len >= ep->usb_ep->maxpacket) { ++ if ((ep->dma_con = (len % ep->usb_ep->maxpacket) != 0)) ++ len = ep->usb_ep->maxpacket; ++ } ++ dcmd = len | DCMD_BURST32 | DCMD_WIDTH4 | DCMD_ENDIRQEN ++ | DCMD_FLOWTRG | DCMD_INCSRCADDR; ++ } else { ++ DSADR(ep->dma) = fifo; ++ DTADR(ep->dma) = buf; ++ dcmd = len | DCMD_BURST32 | DCMD_WIDTH4 | DCMD_ENDIRQEN ++ | DCMD_FLOWSRC | DCMD_INCTRGADDR; ++ } ++ *ep->reg_udccsr = UDCCSR_DME; ++ DCMD(ep->dma) = dcmd; ++ DCSR(ep->dma) = DCSR_NODESC | DCSR_EORIRQEN \ ++ | ((ep->dir_in) ? DCSR_STOPIRQEN : 0); ++ *ep->reg_drcmr = ep->dma | DRCMR_MAPVLD; ++ DCSR(ep->dma) |= DCSR_RUN; ++} ++ ++static void cancel_dma(struct pxa27x_ep *ep) ++{ ++ struct pxa27x_request *req; ++ u32 tmp; ++ ++ if (DCSR(ep->dma) == 0 || list_empty(&ep->queue)) ++ return; ++ ++ DMSG("hehe dma:%d,dcsr:0x%x\n", ep->dma, DCSR(ep->dma)); ++ DCSR(ep->dma) = 0; ++ while ((DCSR(ep->dma) & DCSR_STOPSTATE) == 0) ++ cpu_relax(); ++ ++ req = list_entry(ep->queue.next, struct pxa27x_request, queue); ++ tmp = DCMD(ep->dma) & DCMD_LENGTH; ++ req->req.actual = req->req.length - tmp; ++ ++ /* the last tx packet may be incomplete, so flush the fifo. ++ * FIXME correct req.actual if we can ++ */ ++ *ep->reg_udccsr = UDCCSR_FEF; ++} ++ ++static void dma_nodesc_handler(int dmach, void *_ep) ++{ ++ struct pxa27x_ep *ep = _ep; ++ struct pxa27x_request *req, *req_next; ++ u32 dcsr, tmp, completed; ++ ++ local_irq_disable(); ++ ++ req = list_entry(ep->queue.next, struct pxa27x_request, queue); ++ ++ DMSG("%s, buf:0x%p\n",__FUNCTION__, req->req.buf); ++ ++ ep->dma_irqs++; ++ ep->dev->stats.irqs++; ++ ++ completed = 0; ++ ++ dcsr = DCSR(dmach); ++ DCSR(ep->dma) &= ~DCSR_RUN; ++ ++ if (dcsr & DCSR_BUSERR) { ++ DCSR(dmach) = DCSR_BUSERR; ++ dev_err(ep->dev->dev, "DMA Bus Error\n"); ++ req->req.status = -EIO; ++ completed = 1; ++ } else if (dcsr & DCSR_ENDINTR) { ++ DCSR(dmach) = DCSR_ENDINTR; ++ if (ep->dir_in) { ++ tmp = req->req.length - req->req.actual; ++ /* Last packet is a short one*/ ++ if (tmp < ep->usb_ep->maxpacket) { ++ int count = 0; ++ ++ *ep->reg_udccsr = UDCCSR_SP | \ ++ (*ep->reg_udccsr & UDCCSR_MASK); ++ /*Wait for packet out */ ++ while( (count++ < 10000) && \ ++ !(*ep->reg_udccsr & UDCCSR_FS)); ++ if (count >= 10000) ++ DMSG("Failed to send packet\n"); ++ else ++ DMSG("%s: short packet sent len:%d," ++ "length:%d,actual:%d\n", __FUNCTION__, ++ tmp, req->req.length, req->req.actual); ++ req->req.actual = req->req.length; ++ completed = 1; ++ /* There are still packets to transfer */ ++ } else if ( ep->dma_con) { ++ DMSG("%s: more packets,length:%d,actual:%d\n", ++ __FUNCTION__,req->req.length, ++ req->req.actual); ++ req->req.actual += ep->usb_ep->maxpacket; ++ completed = 0; ++ } else { ++ DMSG("%s: no more packets,length:%d," ++ "actual:%d\n", __FUNCTION__, ++ req->req.length, req->req.actual); ++ req->req.actual = req->req.length; ++ completed = 1; ++ } ++ } else { ++ req->req.actual = req->req.length; ++ completed = 1; ++ } ++ } else if (dcsr & DCSR_EORINTR) { //Only happened in OUT DMA ++ int remain,udccsr ; ++ ++ DCSR(dmach) = DCSR_EORINTR; ++ remain = DCMD(dmach) & DCMD_LENGTH; ++ req->req.actual = req->req.length - remain; ++ ++ udccsr = *ep->reg_udccsr; ++ if (udccsr & UDCCSR_SP) { ++ *ep->reg_udccsr = UDCCSR_PC | (udccsr & UDCCSR_MASK); ++ completed = 1; ++ } ++ DMSG("%s: length:%d actual:%d\n", ++ __FUNCTION__, req->req.length, req->req.actual); ++ } else ++ DMSG("%s: Others dma:%d DCSR:0x%x DCMD:0x%x\n", ++ __FUNCTION__, dmach, DCSR(dmach), DCMD(dmach)); ++ ++ if (likely(completed)) { ++ if (req->queue.next != &ep->queue) { ++ req_next = list_entry(req->queue.next, ++ struct pxa27x_request, queue); ++ kick_dma(ep, req_next); ++ } ++ done(ep, req, 0); ++ } else { ++ kick_dma(ep, req); ++ } ++ ++ local_irq_enable(); ++} ++ ++#endif ++/*-------------------------------------------------------------------------*/ ++ ++static int ++pxa27x_ep_queue(struct usb_ep *_ep, struct usb_request *_req, unsigned gfp_flags) ++{ ++ struct pxa27x_virt_ep *virt_ep; ++ struct pxa27x_ep *ep; ++ struct pxa27x_request *req; ++ struct pxa27x_udc *dev; ++ unsigned long flags; ++ ++ virt_ep = container_of(_ep, struct pxa27x_virt_ep, usb_ep); ++ ep = virt_ep->pxa_ep; ++ ++ req = container_of(_req, struct pxa27x_request, req); ++ if (unlikely (!_req || !_req->complete || !_req->buf|| ++ !list_empty(&req->queue))) { ++ DMSG("%s, bad params\n", __FUNCTION__); ++ return -EINVAL; ++ } ++ ++ if (unlikely (!_ep || (!ep->desc && _ep->name != ep0name))) { ++ DMSG("%s, bad ep\n", __FUNCTION__); ++ return -EINVAL; ++ } ++ ++ DMSG("%s, ep point %d is queue\n", __FUNCTION__, ep->ep_num); ++ ++ dev = ep->dev; ++ if (unlikely (!dev->driver ++ || dev->gadget.speed == USB_SPEED_UNKNOWN)) { ++ DMSG("%s, bogus device state\n", __FUNCTION__); ++ return -ESHUTDOWN; ++ } ++ ++ /* iso is always one packet per request, that's the only way ++ * we can report per-packet status. that also helps with dma. ++ */ ++ if (unlikely (ep->ep_type == USB_ENDPOINT_XFER_ISOC ++ && req->req.length > le16_to_cpu ++ (ep->desc->wMaxPacketSize))) ++ return -EMSGSIZE; ++ ++#ifdef USE_DMA ++ // FIXME caller may already have done the dma mapping ++ if (ep->dma >= 0) { ++ _req->dma = dma_map_single(dev->dev, _req->buf, _req->length, ++ (ep->dir_in) ? DMA_TO_DEVICE : DMA_FROM_DEVICE); ++ } ++#endif ++ ++ DBG(DBG_NOISY, "%s queue req %p, len %d buf %p\n", ++ _ep->name, _req, _req->length, _req->buf); ++ ++ local_irq_save(flags); ++ ++ _req->status = -EINPROGRESS; ++ _req->actual = 0; ++ ++ /* kickstart this i/o queue? */ ++ if (list_empty(&ep->queue) && !ep->stopped) { ++ if (ep->desc == 0 /* ep0 */) { ++ unsigned length = _req->length; ++ ++ switch (dev->ep0state) { ++ case EP0_IN_DATA_PHASE: ++ dev->stats.write.ops++; ++ if (write_ep0_fifo(ep, req)) ++ req = 0; ++ break; ++ ++ case EP0_OUT_DATA_PHASE: ++ dev->stats.read.ops++; ++ if (dev->req_pending) ++ ep0start(dev, UDCCSR0_IPR, "OUT"); ++ if (length == 0 || ((UDCCSR0 & UDCCSR0_RNE) != 0 ++ && read_ep0_fifo(ep, req))) { ++ ep0_idle(dev); ++ done(ep, req, 0); ++ req = 0; ++ } ++ break; ++ case EP0_NO_ACTION: ++ ep0_idle(dev); ++ req=0; ++ break; ++ default: ++ DMSG("ep0 i/o, odd state %d\n", dev->ep0state); ++ local_irq_restore (flags); ++ return -EL2HLT; ++ } ++#ifdef USE_DMA ++ /* either start dma or prime pio pump */ ++ } else if (ep->dma >= 0) { ++ kick_dma(ep, req); ++#endif ++ /* can the FIFO can satisfy the request immediately? */ ++ } else if (ep->dir_in && (*ep->reg_udccsr & UDCCSR_FS) != 0 ++ && write_fifo(ep, req)) { ++ req = 0; ++ } else if ((*ep->reg_udccsr & UDCCSR_FS) != 0 ++ && read_fifo(ep, req)) { ++ req = 0; ++ } ++ DMSG("req:%p,ep->desc:%p,ep->dma:%d\n", req, ep->desc, ep->dma); ++ if (likely (req && ep->desc) && ep->dma < 0) ++ pio_irq_enable(ep->pxa_ep_num); ++ } ++ ++ /* pio or dma irq handler advances the queue. */ ++ if (likely (req != 0)) ++ list_add_tail(&req->queue, &ep->queue); ++ local_irq_restore(flags); ++ ++ return 0; ++} ++ ++ ++/* ++ * nuke - dequeue ALL requests ++ */ ++static void nuke(struct pxa27x_ep *ep, int status) ++{ ++ struct pxa27x_request *req; ++ ++ /* called with irqs blocked */ ++#ifdef USE_DMA ++ if (ep->dma >= 0 && !ep->stopped) ++ cancel_dma(ep); ++#endif ++ while (!list_empty(&ep->queue)) { ++ req = list_entry(ep->queue.next, struct pxa27x_request, queue); ++ done(ep, req, status); ++ } ++ if (ep->desc) ++ pio_irq_disable(ep->pxa_ep_num); ++} ++ ++ ++/* dequeue JUST ONE request */ ++static int pxa27x_ep_dequeue(struct usb_ep *_ep, struct usb_request *_req) ++{ ++ struct pxa27x_virt_ep *virt_ep = container_of(_ep, struct pxa27x_virt_ep, usb_ep); ++ struct pxa27x_ep *ep = virt_ep->pxa_ep; ++ struct pxa27x_request *req; ++ unsigned long flags; ++ ++ if (!_ep || _ep->name == ep0name) ++ return -EINVAL; ++ ++ local_irq_save(flags); ++ ++ /* make sure it's actually queued on this endpoint */ ++ list_for_each_entry(req, &ep->queue, queue) { ++ if (&req->req == _req) ++ break; ++ } ++ if (&req->req != _req) { ++ local_irq_restore(flags); ++ return -EINVAL; ++ } ++ ++#ifdef USE_DMA ++ if (ep->dma >= 0 && ep->queue.next == &req->queue && !ep->stopped) { ++ cancel_dma(ep); ++ done(ep, req, -ECONNRESET); ++ /* restart i/o */ ++ if (!list_empty(&ep->queue)) { ++ req = list_entry(ep->queue.next, ++ struct pxa27x_request, queue); ++ kick_dma(ep, req); ++ } ++ } else ++#endif ++ done(ep, req, -ECONNRESET); ++ ++ local_irq_restore(flags); ++ return 0; ++} ++ ++/*-------------------------------------------------------------------------*/ ++ ++static int pxa27x_ep_set_halt(struct usb_ep *_ep, int value) ++{ ++ struct pxa27x_virt_ep *virt_ep = container_of(_ep, struct pxa27x_virt_ep, usb_ep); ++ struct pxa27x_ep *ep = virt_ep->pxa_ep; ++ unsigned long flags; ++ ++ DMSG("%s is called\n", __FUNCTION__); ++ if (unlikely (!_ep || (!ep->desc && _ep->name != ep0name)) ++ || ep->ep_type == USB_ENDPOINT_XFER_ISOC) { ++ DMSG("%s, bad ep\n", __FUNCTION__); ++ return -EINVAL; ++ } ++ if (value == 0) { ++ /* this path (reset toggle+halt) is needed to implement ++ * SET_INTERFACE on normal hardware. but it can't be ++ * done from software on the PXA UDC, and the hardware ++ * forgets to do it as part of SET_INTERFACE automagic. ++ */ ++ DMSG("only host can clear %s halt\n", _ep->name); ++ return -EROFS; ++ } ++ ++ local_irq_save(flags); ++ ++ if (ep->dir_in && ((*ep->reg_udccsr & UDCCSR_FS) == 0 ++ || !list_empty(&ep->queue))) { ++ local_irq_restore(flags); ++ return -EAGAIN; ++ } ++ ++ /* FST bit is the same for control, bulk in, bulk out, interrupt in */ ++ *ep->reg_udccsr = UDCCSR_FST|UDCCSR_FEF; ++ ++ /* ep0 needs special care */ ++ if (!ep->desc) { ++ start_watchdog(ep->dev); ++ ep->dev->req_pending = 0; ++ ep->dev->ep0state = EP0_STALL; ++ ++ /* and bulk/intr endpoints like dropping stalls too */ ++ } else { ++ unsigned i; ++ for (i = 0; i < 1000; i += 20) { ++ if (*ep->reg_udccsr & UDCCSR_SST) ++ break; ++ udelay(20); ++ } ++ } ++ local_irq_restore(flags); ++ ++ DBG(DBG_VERBOSE, "%s halt\n", _ep->name); ++ return 0; ++} ++ ++static int pxa27x_ep_fifo_status(struct usb_ep *_ep) ++{ ++ struct pxa27x_virt_ep *virt_ep = container_of(_ep, struct pxa27x_virt_ep, usb_ep); ++ struct pxa27x_ep *ep = virt_ep->pxa_ep; ++ ++ if (!_ep) { ++ DMSG("%s, bad ep\n", __FUNCTION__); ++ return -ENODEV; ++ } ++ /* pxa can't report unclaimed bytes from IN fifos */ ++ if (ep->dir_in) ++ return -EOPNOTSUPP; ++ if (ep->dev->gadget.speed == USB_SPEED_UNKNOWN ++ || (*ep->reg_udccsr & UDCCSR_FS) == 0) ++ return 0; ++ else ++ return (*ep->reg_udcbcr & 0xfff) + 1; ++} ++ ++static void pxa27x_ep_fifo_flush(struct usb_ep *_ep) ++{ ++ struct pxa27x_virt_ep *virt_ep = container_of(_ep, struct pxa27x_virt_ep, usb_ep); ++ struct pxa27x_ep *ep = virt_ep->pxa_ep; ++ ++ DMSG("pxa27x_ep_fifo_flush\n"); ++ ++ if (!_ep || _ep->name == ep0name || !list_empty(&ep->queue)) { ++ DMSG("%s, bad ep\n", __FUNCTION__); ++ return; ++ } ++ ++ /* toggle and halt bits stay unchanged */ ++ ++ /* for OUT, just read and discard the FIFO contents. */ ++ if (!ep->dir_in) { ++ while (((*ep->reg_udccsr) & UDCCSR_BNE) != 0) ++ (void) *ep->reg_udcdr; ++ return; ++ } ++ ++ /* most IN status is the same, but ISO can't stall */ ++ *ep->reg_udccsr = UDCCSR_PC|UDCCSR_FST|UDCCSR_TRN ++ | (ep->ep_type == USB_ENDPOINT_XFER_ISOC) ++ ? 0 : UDCCSR_SST; ++} ++ ++ ++static struct usb_ep_ops pxa27x_ep_ops = { ++ .enable = pxa27x_ep_enable, ++ .disable = pxa27x_ep_disable, ++ ++ .alloc_request = pxa27x_ep_alloc_request, ++ .free_request = pxa27x_ep_free_request, ++ ++ .alloc_buffer = pxa27x_ep_alloc_buffer, ++ .free_buffer = pxa27x_ep_free_buffer, ++ ++ .queue = pxa27x_ep_queue, ++ .dequeue = pxa27x_ep_dequeue, ++ ++ .set_halt = pxa27x_ep_set_halt, ++ .fifo_status = pxa27x_ep_fifo_status, ++ .fifo_flush = pxa27x_ep_fifo_flush, ++}; ++ ++ ++/* --------------------------------------------------------------------------- ++ * device-scoped parts of the api to the usb controller hardware ++ * --------------------------------------------------------------------------- ++ */ ++ ++static inline unsigned int validate_fifo_size(u8 bmAttributes) ++{ ++ switch (bmAttributes & USB_ENDPOINT_XFERTYPE_MASK) { ++ case USB_ENDPOINT_XFER_CONTROL: ++ return EP0_FIFO_SIZE; ++ break; ++ case USB_ENDPOINT_XFER_ISOC: ++ return ISO_FIFO_SIZE; ++ break; ++ case USB_ENDPOINT_XFER_BULK: ++ return BULK_FIFO_SIZE; ++ break; ++ case USB_ENDPOINT_XFER_INT: ++ return INT_FIFO_SIZE; ++ break; ++ default: ++ break; ++ } ++} ++ ++static void pxa27x_ep_free(struct usb_gadget *gadget, struct usb_ep *_ep) ++{ ++ struct pxa27x_udc *dev = the_controller; ++ struct pxa27x_virt_ep *virt_ep; ++ int i; ++ ++ virt_ep = container_of(_ep, struct pxa27x_virt_ep, usb_ep); ++ ++ for (i = 1; i < UDC_EP_NUM; i++) { ++ if (dev->ep[i].usb_ep == &virt_ep->usb_ep) { ++ if (dev->ep[i].desc) { ++ virt_ep->pxa_ep = &dev->ep[i]; ++ pxa27x_ep_disable(&virt_ep->usb_ep); ++ } ++ dev->ep[i].usb_ep = NULL; ++ } ++ } ++ ++ if (!list_empty(&virt_ep->usb_ep.ep_list)) ++ list_del_init(&virt_ep->usb_ep.ep_list); ++ ++ kfree(virt_ep->usb_ep.name); ++ kfree(virt_ep); ++} ++ ++static void pxa27x_ep_freeall(struct usb_gadget *gadget) ++{ ++ struct pxa27x_udc *dev = the_controller; ++ int i; ++ ++ for (i = 1; i < UDC_EP_NUM; i++) { ++ if(dev->ep[i].usb_ep) ++ pxa27x_ep_free(gadget, dev->ep[i].usb_ep); ++ } ++} ++ ++#define NAME_SIZE 18 ++ ++static int pxa27x_find_free_ep(struct pxa27x_udc *dev) ++{ ++ int i; ++ for (i = 1; i < UDC_EP_NUM; i++) { ++ if(!dev->ep[i].assigned) ++ return i; ++ } ++ return -1; ++} ++ ++/* ++ * Endpoint Allocation/Configuration ++ * ++ * pxa27x endpoint configuration is fixed when the device is enabled. Any pxa ++ * endpoint is only active in one configuration, interface and alternate ++ * interface combination so to support gadget drivers, we map one usb_ep to ++ * one of several pxa ep's. One pxa endpoint is assigned per configuration ++ * combination. ++ */ ++static struct usb_ep* pxa27x_ep_alloc(struct usb_gadget *gadget, struct usb_endpoint_descriptor *desc, ++ struct usb_endpoint_config *epconfig, int configs) ++{ ++ struct pxa27x_udc *dev = the_controller; ++ struct pxa27x_virt_ep *virt_ep; ++ unsigned int i, fifo_size; ++ char *name; ++ ++ if (unlikely(configs < 1)) { ++ dev_err(dev->dev, "%s: Error in config data\n", __FUNCTION__); ++ return NULL; ++ } ++ ++ virt_ep = kmalloc(sizeof(struct pxa27x_virt_ep), GFP_KERNEL); ++ name = kmalloc(NAME_SIZE, GFP_KERNEL); ++ if (!virt_ep || !name) { ++ dev_err(dev->dev, "%s: -ENOMEM\n", __FUNCTION__); ++ kfree(name); ++ kfree(virt_ep); ++ return NULL; ++ } ++ ++ if (!(desc->wMaxPacketSize)) { ++ fifo_size = validate_fifo_size(desc->bmAttributes); ++ desc->wMaxPacketSize = fifo_size; ++ } else { ++ fifo_size = desc->wMaxPacketSize; ++ } ++ ++ DMSG("pxa27x_ep_alloc: bLength: %d, bDescriptorType: %x, bEndpointAddress: %x,\n" ++ " bmAttributes: %x, wMaxPacketSize: %d\n", desc->bLength, ++ desc->bDescriptorType, desc->bEndpointAddress, desc->bmAttributes, ++ desc->wMaxPacketSize); ++ ++ if (!(desc->bEndpointAddress & 0xF)) ++ desc->bEndpointAddress |= dev->ep_num; ++ ++ for (i = 0; i < configs; i++) ++ { ++ struct pxa27x_ep *pxa_ep; ++ int j; ++ ++ DMSG("pxa27x_ep_alloc: config: %d, interface: %d, altinterface: %x,\n", ++ epconfig->config, epconfig->interface, epconfig->altinterface); ++ ++ j = pxa27x_find_free_ep(dev); ++ ++ if (unlikely(j < 0)) { ++ dev_err(dev->dev, "pxa27x_ep_alloc: Failed to find a spare endpoint\n"); ++ pxa27x_ep_free(gadget, &virt_ep->usb_ep); ++ return NULL; ++ } ++ ++ pxa_ep = &dev->ep[j]; ++ ++ if (i == 0) ++ virt_ep->pxa_ep = pxa_ep; ++ ++ pxa_ep->assigned = 1; ++ pxa_ep->ep_num = dev->ep_num; ++ pxa_ep->pxa_ep_num = j; ++ pxa_ep->usb_ep = &virt_ep->usb_ep; ++ pxa_ep->dev = dev; ++ pxa_ep->desc = desc; ++ pxa_ep->pio_irqs = pxa_ep->dma_irqs = 0; ++ pxa_ep->dma = -1; ++ ++ pxa_ep->fifo_size = fifo_size; ++ pxa_ep->dir_in = (desc->bEndpointAddress & USB_DIR_IN) ? 1 : 0; ++ pxa_ep->ep_type = desc->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK; ++ pxa_ep->stopped = 1; ++ pxa_ep->dma_con = 0; ++ pxa_ep->config = epconfig->config; ++ pxa_ep->interface = epconfig->interface; ++ pxa_ep->aisn = epconfig->altinterface; ++ ++ pxa_ep->reg_udccsr = &UDCCSR0 + j; ++ pxa_ep->reg_udcbcr = &UDCBCR0 + j; ++ pxa_ep->reg_udcdr = &UDCDR0 + j ; ++ pxa_ep->reg_udccr = &UDCCRA - 1 + j; ++#ifdef USE_DMA ++ pxa_ep->reg_drcmr = &DRCMR24 + j; ++#endif ++ ++ /* Configure UDCCR */ ++ *pxa_ep->reg_udccr = ((pxa_ep->config << UDCCONR_CN_S) & UDCCONR_CN) ++ | ((pxa_ep->interface << UDCCONR_IN_S) & UDCCONR_IN) ++ | ((pxa_ep->aisn << UDCCONR_AISN_S) & UDCCONR_AISN) ++ | ((dev->ep_num << UDCCONR_EN_S) & UDCCONR_EN) ++ | ((pxa_ep->ep_type << UDCCONR_ET_S) & UDCCONR_ET) ++ | ((pxa_ep->dir_in) ? UDCCONR_ED : 0) ++ | ((min(pxa_ep->fifo_size, (unsigned)desc->wMaxPacketSize) << UDCCONR_MPS_S ) & UDCCONR_MPS) ++ | UDCCONR_EE; ++// | UDCCONR_DE | UDCCONR_EE; ++ ++ ++ ++#ifdef USE_DMA ++ /* Only BULK use DMA */ ++ if ((pxa_ep->ep_type & USB_ENDPOINT_XFERTYPE_MASK)\ ++ == USB_ENDPOINT_XFER_BULK) ++ *pxa_ep->reg_udccsr = UDCCSR_DME; ++#endif ++ ++ DMSG("UDCCR: 0x%p is 0x%x\n", pxa_ep->reg_udccr,*pxa_ep->reg_udccr); ++ ++ epconfig++; ++ } ++ ++ /* Fill ep name*/ ++ switch (desc->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK) { ++ case USB_ENDPOINT_XFER_BULK: ++ sprintf(name, "ep%d%s-bulk", dev->ep_num, ++ ((desc->bEndpointAddress & USB_DIR_IN) ? "in":"out")); ++ break; ++ case USB_ENDPOINT_XFER_INT: ++ sprintf(name, "ep%d%s-intr", dev->ep_num, ++ ((desc->bEndpointAddress & USB_DIR_IN) ? "in":"out")); ++ break; ++ default: ++ sprintf(name, "ep%d%s", dev->ep_num, ++ ((desc->bEndpointAddress & USB_DIR_IN) ? "in":"out")); ++ break; ++ } ++ ++ virt_ep->desc = desc; ++ virt_ep->usb_ep.name = name; ++ virt_ep->usb_ep.ops = &pxa27x_ep_ops; ++ virt_ep->usb_ep.maxpacket = min((ushort)fifo_size, desc->wMaxPacketSize); ++ ++ list_add_tail(&virt_ep->usb_ep.ep_list, &gadget->ep_list); ++ ++ dev->ep_num++; ++ return &virt_ep->usb_ep; ++} ++ ++static int pxa27x_udc_get_frame(struct usb_gadget *_gadget) ++{ ++ return (UDCFNR & 0x7FF); ++} ++ ++static int pxa27x_udc_wakeup(struct usb_gadget *_gadget) ++{ ++ /* host may not have enabled remote wakeup */ ++ if ((UDCCR & UDCCR_DWRE) == 0) ++ return -EHOSTUNREACH; ++ udc_set_mask_UDCCR(UDCCR_UDR); ++ return 0; ++} ++ ++static const struct usb_gadget_ops pxa27x_udc_ops = { ++ .ep_alloc = pxa27x_ep_alloc, ++ .get_frame = pxa27x_udc_get_frame, ++ .wakeup = pxa27x_udc_wakeup, ++ // current versions must always be self-powered ++}; ++ ++ ++/*-------------------------------------------------------------------------*/ ++ ++#ifdef UDC_PROC_FILE ++ ++static const char proc_node_name [] = "driver/udc"; ++ ++static int ++udc_proc_read(char *page, char **start, off_t off, int count, ++ int *eof, void *_dev) ++{ ++ char *buf = page; ++ struct pxa27x_udc *dev = _dev; ++ char *next = buf; ++ unsigned size = count; ++ unsigned long flags; ++ int i, t; ++ u32 tmp; ++ ++ if (off != 0) ++ return 0; ++ ++ local_irq_save(flags); ++ ++ /* basic device status */ ++ t = scnprintf(next, size, DRIVER_DESC "\n" ++ "%s version: %s\nGadget driver: %s\n", ++ driver_name, DRIVER_VERSION DMASTR, ++ dev->driver ? dev->driver->driver.name : "(none)"); ++ size -= t; ++ next += t; ++ ++ /* registers for device and ep0 */ ++ t = scnprintf(next, size, ++ "uicr %02X.%02X, usir %02X.%02x, ufnr %02X\n", ++ UDCICR1, UDCICR0, UDCISR1, UDCISR0, UDCFNR); ++ size -= t; ++ next += t; ++ ++ tmp = UDCCR; ++ t = scnprintf(next, size,"udccr %02X =%s%s%s%s%s%s%s%s%s%s, con=%d,inter=%d,altinter=%d\n", tmp, ++ (tmp & UDCCR_OEN) ? " oen":"", ++ (tmp & UDCCR_AALTHNP) ? " aalthnp":"", ++ (tmp & UDCCR_AHNP) ? " rem" : "", ++ (tmp & UDCCR_BHNP) ? " rstir" : "", ++ (tmp & UDCCR_DWRE) ? " dwre" : "", ++ (tmp & UDCCR_SMAC) ? " smac" : "", ++ (tmp & UDCCR_EMCE) ? " emce" : "", ++ (tmp & UDCCR_UDR) ? " udr" : "", ++ (tmp & UDCCR_UDA) ? " uda" : "", ++ (tmp & UDCCR_UDE) ? " ude" : "", ++ (tmp & UDCCR_ACN) >> UDCCR_ACN_S, ++ (tmp & UDCCR_AIN) >> UDCCR_AIN_S, ++ (tmp & UDCCR_AAISN)>> UDCCR_AAISN_S ); ++ ++ size -= t; ++ next += t; ++ ++ tmp = UDCCSR0; ++ t = scnprintf(next, size, ++ "udccsr0 %02X =%s%s%s%s%s%s%s\n", tmp, ++ (tmp & UDCCSR0_SA) ? " sa" : "", ++ (tmp & UDCCSR0_RNE) ? " rne" : "", ++ (tmp & UDCCSR0_FST) ? " fst" : "", ++ (tmp & UDCCSR0_SST) ? " sst" : "", ++ (tmp & UDCCSR0_DME) ? " dme" : "", ++ (tmp & UDCCSR0_IPR) ? " ipr" : "", ++ (tmp & UDCCSR0_OPC) ? " opc" : ""); ++ size -= t; ++ next += t; ++ ++ if (!dev->driver) ++ goto done; ++ ++ t = scnprintf(next, size, "ep0 IN %lu/%lu, OUT %lu/%lu\nirqs %lu\n\n", ++ dev->stats.write.bytes, dev->stats.write.ops, ++ dev->stats.read.bytes, dev->stats.read.ops, ++ dev->stats.irqs); ++ size -= t; ++ next += t; ++ ++ /* dump endpoint queues */ ++ for (i = 0; i < UDC_EP_NUM; i++) { ++ struct pxa27x_ep *ep = &dev->ep [i]; ++ struct pxa27x_request *req; ++ int t; ++ ++ if (i != 0) { ++ const struct usb_endpoint_descriptor *d; ++ ++ d = ep->desc; ++ if (!d) ++ continue; ++ tmp = *dev->ep [i].reg_udccsr; ++ t = scnprintf(next, size, ++ "%d max %d %s udccs %02x udccr:0x%x\n", ++ i, le16_to_cpu (d->wMaxPacketSize), ++ (ep->dma >= 0) ? "dma" : "pio", tmp, ++ *dev->ep[i].reg_udccr); ++ /* TODO translate all five groups of udccs bits! */ ++ ++ } else /* ep0 should only have one transfer queued */ ++ t = scnprintf(next, size, "ep0 max 16 pio irqs %lu\n", ++ ep->pio_irqs); ++ if (t <= 0 || t > size) ++ goto done; ++ size -= t; ++ next += t; ++ ++ if (list_empty(&ep->queue)) { ++ t = scnprintf(next, size, "\t(nothing queued)\n"); ++ if (t <= 0 || t > size) ++ goto done; ++ size -= t; ++ next += t; ++ continue; ++ } ++ list_for_each_entry(req, &ep->queue, queue) { ++#ifdef USE_DMA ++ if (ep->dma >= 0 && req->queue.prev == &ep->queue) ++ t = scnprintf(next, size, "\treq %p len %d/%d " ++ "buf %p (dma%d dcmd %08x)\n", ++ &req->req, req->req.actual, ++ req->req.length, req->req.buf, ++ ep->dma, DCMD(ep->dma) ++ /* low 13 bits == bytes-to-go */); ++ else ++#endif ++ t = scnprintf(next, size, ++ "\treq %p len %d/%d buf %p\n", ++ &req->req, req->req.actual, ++ req->req.length, req->req.buf); ++ if (t <= 0 || t > size) ++ goto done; ++ size -= t; ++ next += t; ++ } ++ } ++ ++done: ++ local_irq_restore(flags); ++ *eof = 1; ++ return count - size; ++} ++ ++#define create_proc_files() \ ++ create_proc_read_entry(proc_node_name, 0, NULL, udc_proc_read, dev) ++#define remove_proc_files() \ ++ remove_proc_entry(proc_node_name, NULL) ++ ++#else /* !UDC_PROC_FILE */ ++#define create_proc_files() do {} while (0) ++#define remove_proc_files() do {} while (0) ++ ++#endif /* UDC_PROC_FILE */ ++ ++/* "function" sysfs attribute */ ++static ssize_t show_function(struct device *_dev, struct device_attribute *attr, char *buf) ++{ ++ struct pxa27x_udc *dev = dev_get_drvdata(_dev); ++ ++ if (!dev->driver || !dev->driver->function ++ || strlen(dev->driver->function) > PAGE_SIZE) ++ return 0; ++ return scnprintf(buf, PAGE_SIZE, "%s\n", dev->driver->function); ++} ++static DEVICE_ATTR(function, S_IRUGO, show_function, NULL); ++ ++/*-------------------------------------------------------------------------*/ ++ ++/* ++ * udc_disable - disable USB device controller ++ */ ++static void udc_disable(struct pxa27x_udc *dev) ++{ ++ UDCICR0 = UDCICR1 = 0x00000000; ++ ++ udc_clear_mask_UDCCR(UDCCR_UDE); ++ ++ /* Disable clock for USB device */ ++ pxa_set_cken(CKEN11_USB, 0); ++ ++ ep0_idle(dev); ++ dev->gadget.speed = USB_SPEED_UNKNOWN; ++ dev->mach->udc_command(PXA2XX_UDC_CMD_DISCONNECT); ++} ++ ++ ++/* ++ * udc_reinit - initialize software state ++ */ ++static void udc_reinit(struct pxa27x_udc *dev) ++{ ++ u32 i; ++ ++ dev->ep0state = EP0_IDLE; ++ ++ /* basic endpoint records init */ ++ for (i = 0; i < UDC_EP_NUM; i++) { ++ struct pxa27x_ep *ep = &dev->ep[i]; ++ ++ ep->stopped = 0; ++ ep->pio_irqs = ep->dma_irqs = 0; ++ } ++ dev->configuration = 0; ++ dev->interface = 0; ++ dev->alternate = 0; ++ /* the rest was statically initialized, and is read-only */ ++} ++ ++/* until it's enabled, this UDC should be completely invisible ++ * to any USB host. ++ */ ++static void udc_enable(struct pxa27x_udc *dev) ++{ ++ udc_clear_mask_UDCCR(UDCCR_UDE); ++ ++ /* Enable clock for USB device */ ++ pxa_set_cken(CKEN11_USB, 1); ++ ++ UDCICR0 = UDCICR1 = 0; ++ ++ ep0_idle(dev); ++ dev->gadget.speed = USB_SPEED_FULL; ++ dev->stats.irqs = 0; ++ ++ udc_set_mask_UDCCR(UDCCR_UDE); ++ udelay(2); ++ if (UDCCR & UDCCR_EMCE) ++ dev_err(dev->dev, "There are error in configuration, udc disabled\n"); ++ ++ /* caller must be able to sleep in order to cope ++ * with startup transients. ++ */ ++ msleep(100); ++ ++ /* enable suspend/resume and reset irqs */ ++ UDCICR1 = UDCICR1_IECC | UDCICR1_IERU | UDCICR1_IESU | UDCICR1_IERS; ++ ++ /* enable ep0 irqs */ ++ UDCICR0 = UDCICR_INT(0,UDCICR_INT_MASK); ++ ++ DMSG("Connecting\n"); ++ /* RPFIXME */ ++ UP2OCR = UP2OCR_HXOE | UP2OCR_DPPUE | UP2OCR_DPPUBE; ++ //dev->mach->udc_command(PXA2XX_UDC_CMD_CONNECT); ++} ++ ++ ++/* when a driver is successfully registered, it will receive ++ * control requests including set_configuration(), which enables ++ * non-control requests. then usb traffic follows until a ++ * disconnect is reported. then a host may connect again, or ++ * the driver might get unbound. ++ */ ++int usb_gadget_register_driver(struct usb_gadget_driver *driver) ++{ ++ struct pxa27x_udc *dev = the_controller; ++ int retval; ++ ++ if (!driver || driver->speed != USB_SPEED_FULL || !driver->bind ++ || !driver->unbind || !driver->disconnect || !driver->setup) ++ return -EINVAL; ++ if (!dev) ++ return -ENODEV; ++ if (dev->driver) ++ return -EBUSY; ++ ++ udc_disable(dev); ++ udc_init_ep(dev); ++ udc_reinit(dev); ++ ++ /* first hook up the driver ... */ ++ dev->driver = driver; ++ dev->gadget.dev.driver = &driver->driver; ++ dev->ep_num = 1; ++ ++ retval = device_add(&dev->gadget.dev); ++ if (retval) { ++ DMSG("device_add error %d\n", retval); ++ goto add_fail; ++ } ++ retval = driver->bind(&dev->gadget); ++ if (retval) { ++ DMSG("bind to driver %s --> error %d\n", ++ driver->driver.name, retval); ++ goto bind_fail; ++ } ++ retval = device_create_file(dev->dev, &dev_attr_function); ++ if (retval) { ++ DMSG("device_create_file failed: %d\n", retval); ++ goto create_file_fail; ++ } ++ ++ /* ... then enable host detection and ep0; and we're ready ++ * for set_configuration as well as eventual disconnect. ++ * NOTE: this shouldn't power up until later. ++ */ ++ DMSG("registered gadget driver '%s'\n", driver->driver.name); ++ udc_enable(dev); ++ dump_state(dev); ++ return 0; ++ ++create_file_fail: ++ driver->unbind(&dev->gadget); ++bind_fail: ++ device_del(&dev->gadget.dev); ++add_fail: ++ dev->driver = 0; ++ dev->gadget.dev.driver = 0; ++ return retval; ++} ++EXPORT_SYMBOL(usb_gadget_register_driver); ++ ++static void ++stop_activity(struct pxa27x_udc *dev, struct usb_gadget_driver *driver) ++{ ++ int i; ++ ++ DMSG("Trace path 1\n"); ++ /* don't disconnect drivers more than once */ ++ if (dev->gadget.speed == USB_SPEED_UNKNOWN) ++ driver = 0; ++ dev->gadget.speed = USB_SPEED_UNKNOWN; ++ ++ /* prevent new request submissions, kill any outstanding requests */ ++ for (i = 0; i < UDC_EP_NUM; i++) { ++ struct pxa27x_ep *ep = &dev->ep[i]; ++ ++ ep->stopped = 1; ++ nuke(ep, -ESHUTDOWN); ++ } ++ del_timer_sync(&dev->timer); ++ ++ /* report disconnect; the driver is already quiesced */ ++ if (driver) ++ driver->disconnect(&dev->gadget); ++ ++ /* re-init driver-visible data structures */ ++ udc_reinit(dev); ++} ++ ++int usb_gadget_unregister_driver(struct usb_gadget_driver *driver) ++{ ++ struct pxa27x_udc *dev = the_controller; ++ ++ if (!dev) ++ return -ENODEV; ++ if (!driver || driver != dev->driver) ++ return -EINVAL; ++ ++ local_irq_disable(); ++ udc_disable(dev); ++ stop_activity(dev, driver); ++ local_irq_enable(); ++ ++ driver->unbind(&dev->gadget); ++ pxa27x_ep_freeall(&dev->gadget); ++ dev->driver = 0; ++ ++ device_del(&dev->gadget.dev); ++ device_remove_file(dev->dev, &dev_attr_function); ++ ++ DMSG("unregistered gadget driver '%s'\n", driver->driver.name); ++ dump_state(dev); ++ return 0; ++} ++EXPORT_SYMBOL(usb_gadget_unregister_driver); ++ ++ ++/*-------------------------------------------------------------------------*/ ++ ++static inline void clear_ep_state(struct pxa27x_udc *dev) ++{ ++ unsigned i; ++ ++ /* hardware SET_{CONFIGURATION,INTERFACE} automagic resets endpoint ++ * fifos, and pending transactions mustn't be continued in any case. ++ */ ++ for (i = 1; i < UDC_EP_NUM; i++) ++ nuke(&dev->ep[i], -ECONNABORTED); ++} ++ ++static void udc_watchdog(unsigned long _dev) ++{ ++ struct pxa27x_udc *dev = (void *)_dev; ++ ++ local_irq_disable(); ++ if (dev->ep0state == EP0_STALL ++ && (UDCCSR0 & UDCCSR0_FST) == 0 ++ && (UDCCSR0 & UDCCSR0_SST) == 0) { ++ UDCCSR0 = UDCCSR0_FST|UDCCSR0_FTF; ++ DBG(DBG_VERBOSE, "ep0 re-stall\n"); ++ start_watchdog(dev); ++ } ++ local_irq_enable(); ++} ++ ++static void handle_ep0(struct pxa27x_udc *dev) ++{ ++ u32 udccsr0 = UDCCSR0; ++ struct pxa27x_ep *ep = &dev->ep[0]; ++ struct pxa27x_request *req; ++ union { ++ struct usb_ctrlrequest r; ++ u8 raw[8]; ++ u32 word[2]; ++ } u; ++ ++ if (list_empty(&ep->queue)) ++ req = 0; ++ else ++ req = list_entry(ep->queue.next, struct pxa27x_request, queue); ++ ++ /* clear stall status */ ++ if (udccsr0 & UDCCSR0_SST) { ++ nuke(ep, -EPIPE); ++ UDCCSR0 = UDCCSR0_SST; ++ del_timer(&dev->timer); ++ ep0_idle(dev); ++ } ++ ++ /* previous request unfinished? non-error iff back-to-back ... */ ++ if ((udccsr0 & UDCCSR0_SA) != 0 && dev->ep0state != EP0_IDLE) { ++ nuke(ep, 0); ++ del_timer(&dev->timer); ++ ep0_idle(dev); ++ } ++ ++ switch (dev->ep0state) { ++ case EP0_NO_ACTION: ++ dev_info(dev->dev, "%s: Busy\n", __FUNCTION__); ++ /*Fall through */ ++ case EP0_IDLE: ++ /* late-breaking status? */ ++ udccsr0 = UDCCSR0; ++ ++ /* start control request? */ ++ if (likely((udccsr0 & (UDCCSR0_OPC|UDCCSR0_SA|UDCCSR0_RNE)) ++ == (UDCCSR0_OPC|UDCCSR0_SA|UDCCSR0_RNE))) { ++ int i; ++ ++ nuke(ep, -EPROTO); ++ /* read SETUP packet */ ++ for (i = 0; i < 2; i++) { ++ if (unlikely(!(UDCCSR0 & UDCCSR0_RNE))) { ++bad_setup: ++ DMSG("SETUP %d!\n", i); ++ goto stall; ++ } ++ u.word [i] = UDCDR0; ++ } ++ if (unlikely((UDCCSR0 & UDCCSR0_RNE) != 0)) ++ goto bad_setup; ++ ++ le16_to_cpus(&u.r.wValue); ++ le16_to_cpus(&u.r.wIndex); ++ le16_to_cpus(&u.r.wLength); ++ ++ DBG(DBG_VERBOSE, "SETUP %02x.%02x v%04x i%04x l%04x\n", ++ u.r.bRequestType, u.r.bRequest, ++ u.r.wValue, u.r.wIndex, u.r.wLength); ++ /* cope with automagic for some standard requests. */ ++ dev->req_std = (u.r.bRequestType & USB_TYPE_MASK) ++ == USB_TYPE_STANDARD; ++ dev->req_config = 0; ++ dev->req_pending = 1; ++#if 0 ++ switch (u.r.bRequest) { ++ /* hardware was supposed to hide this */ ++ case USB_REQ_SET_CONFIGURATION: ++ case USB_REQ_SET_INTERFACE: ++ case USB_REQ_SET_ADDRESS: ++ dev_err(dev->dev, "Should not come here\n"); ++ break; ++ } ++ ++#endif ++ if (u.r.bRequestType & USB_DIR_IN) ++ dev->ep0state = EP0_IN_DATA_PHASE; ++ else ++ dev->ep0state = EP0_OUT_DATA_PHASE; ++ i = dev->driver->setup(&dev->gadget, &u.r); ++ ++ if (i < 0) { ++ /* hardware automagic preventing STALL... */ ++ if (dev->req_config) { ++ /* hardware sometimes neglects to tell ++ * tell us about config change events, ++ * so later ones may fail... ++ */ ++ WARN("config change %02x fail %d?\n", ++ u.r.bRequest, i); ++ return; ++ /* TODO experiment: if has_cfr, ++ * hardware didn't ACK; maybe we ++ * could actually STALL! ++ */ ++ } ++ DBG(DBG_VERBOSE, "protocol STALL, " ++ "%02x err %d\n", UDCCSR0, i); ++stall: ++ /* the watchdog timer helps deal with cases ++ * where udc seems to clear FST wrongly, and ++ * then NAKs instead of STALLing. ++ */ ++ ep0start(dev, UDCCSR0_FST|UDCCSR0_FTF, "stall"); ++ start_watchdog(dev); ++ dev->ep0state = EP0_STALL; ++ ++ /* deferred i/o == no response yet */ ++ } else if (dev->req_pending) { ++ if (likely(dev->ep0state == EP0_IN_DATA_PHASE ++ || dev->req_std || u.r.wLength)) ++ ep0start(dev, 0, "defer"); ++ else ++ ep0start(dev, UDCCSR0_IPR, "defer/IPR"); ++ } ++ ++ /* expect at least one data or status stage irq */ ++ return; ++ ++ } else { ++ /* some random early IRQ: ++ * - we acked FST ++ * - IPR cleared ++ * - OPC got set, without SA (likely status stage) ++ */ ++ UDCCSR0 = udccsr0 & (UDCCSR0_SA|UDCCSR0_OPC); ++ } ++ break; ++ case EP0_IN_DATA_PHASE: /* GET_DESCRIPTOR etc */ ++ if (udccsr0 & UDCCSR0_OPC) { ++ UDCCSR0 = UDCCSR0_OPC|UDCCSR0_FTF; ++ DBG(DBG_VERBOSE, "ep0in premature status\n"); ++ if (req) ++ done(ep, req, 0); ++ ep0_idle(dev); ++ } else /* irq was IPR clearing */ { ++ if (req) { ++ /* this IN packet might finish the request */ ++ (void) write_ep0_fifo(ep, req); ++ } /* else IN token before response was written */ ++ } ++ break; ++ case EP0_OUT_DATA_PHASE: /* SET_DESCRIPTOR etc */ ++ if (udccsr0 & UDCCSR0_OPC) { ++ if (req) { ++ /* this OUT packet might finish the request */ ++ if (read_ep0_fifo(ep, req)) ++ done(ep, req, 0); ++ /* else more OUT packets expected */ ++ } /* else OUT token before read was issued */ ++ } else /* irq was IPR clearing */ { ++ DBG(DBG_VERBOSE, "ep0out premature status\n"); ++ if (req) ++ done(ep, req, 0); ++ ep0_idle(dev); ++ } ++ break; ++ case EP0_STALL: ++ UDCCSR0 = UDCCSR0_FST; ++ break; ++ } ++ UDCISR0 = UDCISR_INT(0, UDCISR_INT_MASK); ++} ++ ++ ++static void handle_ep(struct pxa27x_ep *ep) ++{ ++ struct pxa27x_request *req; ++ int completed; ++ u32 udccsr=0; ++ ++ DMSG("%s is called\n", __FUNCTION__); ++ do { ++ completed = 0; ++ if (likely (!list_empty(&ep->queue))) { ++ req = list_entry(ep->queue.next, ++ struct pxa27x_request, queue); ++ } else ++ req = 0; ++ ++// udccsr = *ep->reg_udccsr; ++ DMSG("%s: req:%p, udcisr0:0x%x udccsr %p:0x%x\n", __FUNCTION__, ++ req, UDCISR0, ep->reg_udccsr, *ep->reg_udccsr); ++ if (unlikely(ep->dir_in)) { ++ udccsr = (UDCCSR_SST | UDCCSR_TRN) & *ep->reg_udccsr; ++ if (unlikely (udccsr)) ++ *ep->reg_udccsr = udccsr; ++ ++ if (req && likely ((*ep->reg_udccsr & UDCCSR_FS) != 0)) ++ completed = write_fifo(ep, req); ++ ++ } else { ++ udccsr = (UDCCSR_SST | UDCCSR_TRN) & *ep->reg_udccsr; ++ if (unlikely(udccsr)) ++ *ep->reg_udccsr = udccsr; ++ ++ /* fifos can hold packets, ready for reading... */ ++ if (likely(req)) { ++ completed = read_fifo(ep, req); ++ } else { ++ pio_irq_disable (ep->pxa_ep_num); ++ //*ep->reg_udccsr = UDCCSR_FEF; ++ DMSG("%s: no req for out data\n", ++ __FUNCTION__); ++ } ++ } ++ ep->pio_irqs++; ++ } while (completed); ++} ++ ++static void pxa27x_update_eps(struct pxa27x_udc *dev) ++{ ++ struct pxa27x_virt_ep *virt_ep; ++ int i; ++ ++ for (i = 1; i < UDC_EP_NUM; i++) { ++ if(!dev->ep[i].assigned || !dev->ep[i].usb_ep) ++ continue; ++ virt_ep = container_of(dev->ep[i].usb_ep, struct pxa27x_virt_ep, usb_ep); ++ ++ DMSG("%s, Updating eps %d:%d, %d:%d, %d:%d, %p,%p\n", __FUNCTION__, dev->ep[i].config, dev->configuration ++ ,dev->ep[i].interface, dev->interface, dev->ep[i].aisn, dev->alternate, virt_ep->pxa_ep, &dev->ep[i]); ++ ++ if(dev->ep[i].config == dev->configuration && virt_ep->pxa_ep != &dev->ep[i]) { ++ if ((dev->ep[i].interface == dev->interface && ++ dev->ep[i].aisn == dev->alternate) || virt_ep->pxa_ep->config != dev->configuration) { ++ ++ if (virt_ep->pxa_ep->desc) { ++ DMSG("%s, Changing end point to %d (en/dis)\n", __FUNCTION__, i); ++ pxa27x_ep_disable(&virt_ep->usb_ep); ++ virt_ep->pxa_ep = &dev->ep[i]; ++ pxa27x_ep_enable(&virt_ep->usb_ep, virt_ep->desc); ++ } else { ++ DMSG("%s, Changing end point to %d (no en/dis)\n", __FUNCTION__, i); ++ virt_ep->pxa_ep = &dev->ep[i]; ++ } ++ } ++ } ++ } ++} ++ ++static void pxa27x_change_configuration(struct pxa27x_udc *dev) ++{ ++ struct usb_ctrlrequest req ; ++ ++ pxa27x_update_eps(dev); ++ ++ req.bRequestType = 0; ++ req.bRequest = USB_REQ_SET_CONFIGURATION; ++ req.wValue = dev->configuration; ++ req.wIndex = 0; ++ req.wLength = 0; ++ ++ dev->ep0state = EP0_NO_ACTION; ++ dev->driver->setup(&dev->gadget, &req); ++} ++ ++static void pxa27x_change_interface(struct pxa27x_udc *dev) ++{ ++ struct usb_ctrlrequest req; ++ ++ pxa27x_update_eps(dev); ++ ++ req.bRequestType = USB_RECIP_INTERFACE; ++ req.bRequest = USB_REQ_SET_INTERFACE; ++ req.wValue = dev->alternate; ++ req.wIndex = dev->interface; ++ req.wLength = 0; ++ ++ dev->ep0state = EP0_NO_ACTION; ++ dev->driver->setup(&dev->gadget, &req); ++} ++ ++/* ++ * pxa27x_udc_irq - interrupt handler ++ * ++ * avoid delays in ep0 processing. the control handshaking isn't always ++ * under software control (pxa250c0 and the pxa255 are better), and delays ++ * could cause usb protocol errors. ++ */ ++static irqreturn_t pxa27x_udc_irq(int irq, void *_dev) ++{ ++ struct pxa27x_udc *dev = _dev; ++ int handled; ++ ++ dev->stats.irqs++; ++ ++ DBG(DBG_VERBOSE, "Interrupt, UDCISR0:0x%08x, UDCISR1:0x%08x, " ++ "UDCCR:0x%08x\n", UDCISR0, UDCISR1, UDCCR); ++ do { ++ u32 udcir = UDCISR1 & 0xF8000000; ++ ++ handled = 0; ++ ++ /* SUSpend Interrupt Request */ ++ if (unlikely(udcir & UDCISR1_IRSU)) { ++ UDCISR1 = UDCISR1_IRSU; ++ handled = 1; ++ DBG(DBG_VERBOSE, "USB suspend\n"); ++ if (dev->gadget.speed != USB_SPEED_UNKNOWN ++ && dev->driver ++ && dev->driver->suspend) ++ dev->driver->suspend(&dev->gadget); ++ ep0_idle(dev); ++ } ++ ++ /* RESume Interrupt Request */ ++ if (unlikely(udcir & UDCISR1_IRRU)) { ++ UDCISR1 = UDCISR1_IRRU; ++ handled = 1; ++ DBG(DBG_VERBOSE, "USB resume\n"); ++ ++ if (dev->gadget.speed != USB_SPEED_UNKNOWN ++ && dev->driver ++ && dev->driver->resume) ++ dev->driver->resume(&dev->gadget); ++ } ++ ++ if (unlikely(udcir & UDCISR1_IRCC)) { ++ unsigned config, interface, alternate; ++ ++ handled = 1; ++ DBG(DBG_VERBOSE, "USB SET_CONFIGURATION or " ++ "SET_INTERFACE command received\n"); ++ ++ config = (UDCCR & UDCCR_ACN) >> UDCCR_ACN_S; ++ ++ if (dev->configuration != config) { ++ dev->configuration = config; ++ pxa27x_change_configuration(dev) ; ++ } ++ ++ interface = (UDCCR & UDCCR_AIN) >> UDCCR_AIN_S; ++ alternate = (UDCCR & UDCCR_AAISN) >> UDCCR_AAISN_S; ++ ++ if ((dev->interface != interface) || (dev->alternate != alternate)) { ++ dev->interface = interface; ++ dev->alternate = alternate; ++ pxa27x_change_interface(dev); ++ } ++ ++ UDCCR |= UDCCR_SMAC; ++ ++ UDCISR1 = UDCISR1_IRCC; ++ DMSG("%s: con:%d,inter:%d,alt:%d\n", ++ __FUNCTION__, config,interface, alternate); ++ } ++ ++ /* ReSeT Interrupt Request - USB reset */ ++ if (unlikely(udcir & UDCISR1_IRRS)) { ++ UDCISR1 = UDCISR1_IRRS; ++ handled = 1; ++ ++ if ((UDCCR & UDCCR_UDA) == 0) { ++ DBG(DBG_VERBOSE, "USB reset start\n"); ++ ++ /* reset driver and endpoints, ++ * in case that's not yet done ++ */ ++ stop_activity(dev, dev->driver); ++ } ++ INFO("USB reset\n"); ++ dev->gadget.speed = USB_SPEED_FULL; ++ memset(&dev->stats, 0, sizeof dev->stats); ++ ++ } else { ++ u32 udcisr0 = UDCISR0 ; ++ u32 udcisr1 = UDCISR1 & 0xFFFF; ++ int i; ++ ++ if (unlikely (!udcisr0 && !udcisr1)) ++ continue; ++ ++ DBG(DBG_VERY_NOISY, "irq %02x.%02x\n", udcisr1,udcisr0); ++ ++ /* control traffic */ ++ if (udcisr0 & UDCISR0_IR0) { ++ dev->ep[0].pio_irqs++; ++ handle_ep0(dev); ++ handled = 1; ++ } ++ ++ udcisr0 >>= 2; ++ /* endpoint data transfers */ ++ for (i = 1; udcisr0!=0 && i < 16; udcisr0>>=2,i++) { ++ UDCISR0 = UDCISR_INT(i, UDCISR_INT_MASK); ++ ++ if (udcisr0 & UDC_INT_FIFOERROR) ++ dev_err(dev->dev, " Endpoint %d Fifo error\n", i); ++ if (udcisr0 & UDC_INT_PACKETCMP) { ++ handle_ep(&dev->ep[i]); ++ handled = 1; ++ } ++ ++ } ++ ++ for (i = 0; udcisr1!=0 && i < 8; udcisr1 >>= 2, i++) { ++ UDCISR1 = UDCISR_INT(i, UDCISR_INT_MASK); ++ ++ if (udcisr1 & UDC_INT_FIFOERROR) { ++ dev_err(dev->dev, "Endpoint %d fifo error\n", (i+16)); ++ } ++ ++ if (udcisr1 & UDC_INT_PACKETCMP) { ++ handle_ep(&dev->ep[i+16]); ++ handled = 1; ++ } ++ } ++ } ++ ++ /* we could also ask for 1 msec SOF (SIR) interrupts */ ++ ++ } while (handled); ++ return IRQ_HANDLED; ++} ++ ++int write_ep0_zlp(void) ++{ ++ UDCCSR0 = UDCCSR0_IPR; ++ return 0; ++} ++EXPORT_SYMBOL(write_ep0_zlp); ++ ++static void udc_init_ep(struct pxa27x_udc *dev) ++{ ++ int i; ++ ++ INIT_LIST_HEAD(&dev->gadget.ep_list); ++ INIT_LIST_HEAD(&dev->gadget.ep0->ep_list); ++ ++ for (i = 0; i < UDC_EP_NUM; i++) { ++ struct pxa27x_ep *ep = &dev->ep[i]; ++ ++ ep->dma = -1; ++ if (i != 0) { ++ memset(ep, 0, sizeof(*ep)); ++ } ++ INIT_LIST_HEAD(&ep->queue); ++ } ++} ++ ++/*-------------------------------------------------------------------------*/ ++ ++static void nop_release(struct device *dev) ++{ ++ DMSG("%s %s\n", __FUNCTION__, dev->bus_id); ++} ++ ++/* this uses load-time allocation and initialization (instead of ++ * doing it at run-time) to save code, eliminate fault paths, and ++ * be more obviously correct. ++ */ ++ ++static struct pxa27x_udc memory = { ++ .gadget = { ++ .ops = &pxa27x_udc_ops, ++ .ep0 = &memory.virt_ep0.usb_ep, ++ .name = driver_name, ++ .dev = { ++ .bus_id = "gadget", ++ .release = nop_release, ++ }, ++ }, ++ ++ /* control endpoint */ ++ .virt_ep0 = { ++ .pxa_ep = &memory.ep[0], ++ .usb_ep = { ++ .name = ep0name, ++ .ops = &pxa27x_ep_ops, ++ .maxpacket = EP0_FIFO_SIZE, ++ }, ++ }, ++ ++ .ep[0] = { ++ .usb_ep = &memory.virt_ep0.usb_ep, ++ .dev = &memory, ++ .reg_udccsr = &UDCCSR0, ++ .reg_udcdr = &UDCDR0, ++ }, ++}; ++ ++static int __init pxa27x_udc_probe(struct platform_device *_dev) ++{ ++ struct pxa27x_udc *dev = &memory; ++ int retval; ++ ++ /* other non-static parts of init */ ++ dev->dev = &_dev->dev; ++ dev->mach = _dev->dev.platform_data; ++ ++ /* RPFIXME */ ++ UP2OCR = UP2OCR_HXOE | UP2OCR_DPPUE | UP2OCR_DPPUBE; ++ ++ init_timer(&dev->timer); ++ dev->timer.function = udc_watchdog; ++ dev->timer.data = (unsigned long) dev; ++ ++ device_initialize(&dev->gadget.dev); ++ dev->gadget.dev.parent = &_dev->dev; ++ dev->gadget.dev.dma_mask = _dev->dev.dma_mask; ++ ++ the_controller = dev; ++ platform_set_drvdata(_dev, dev); ++ ++ udc_disable(dev); ++ udc_init_ep(dev); ++ udc_reinit(dev); ++ ++ /* irq setup after old hardware state is cleaned up */ ++ retval = request_irq(IRQ_USB, pxa27x_udc_irq, ++ SA_INTERRUPT, driver_name, dev); ++ if (retval != 0) { ++ dev_err(dev->dev, "%s: can't get irq %i, err %d\n", ++ driver_name, IRQ_USB, retval); ++ return -EBUSY; ++ } ++ dev->got_irq = 1; ++ ++ create_proc_files(); ++ ++ return 0; ++} ++ ++static int pxa27x_udc_remove(struct platform_device *_dev) ++{ ++ struct pxa27x_udc *dev = platform_get_drvdata(_dev); ++ ++ udc_disable(dev); ++ remove_proc_files(); ++ usb_gadget_unregister_driver(dev->driver); ++ ++ pxa27x_ep_freeall(&dev->gadget); ++ ++ if (dev->got_irq) { ++ free_irq(IRQ_USB, dev); ++ dev->got_irq = 0; ++ } ++ platform_set_drvdata(_dev, 0); ++ the_controller = 0; ++ return 0; ++} ++ ++#ifdef CONFIG_PM ++static void pxa27x_udc_shutdown(struct platform_device *_dev) ++{ ++ struct pxa27x_udc *dev = platform_get_drvdata(_dev); ++ ++ udc_disable(dev); ++} ++ ++static int pxa27x_udc_suspend(struct platform_device *_dev, pm_message_t state) ++{ ++ int i; ++ struct pxa27x_udc *dev = platform_get_drvdata(_dev); ++ ++ DMSG("%s is called\n", __FUNCTION__); ++ ++ dev->udccsr0 = UDCCSR0; ++ for(i=1; (i<UDC_EP_NUM); i++) { ++ if (dev->ep[i].assigned) { ++ struct pxa27x_ep *ep = &dev->ep[i]; ++ ep->udccsr_value = *ep->reg_udccsr; ++ ep->udccr_value = *ep->reg_udccr; ++ DMSG("EP%d, udccsr:0x%x, udccr:0x%x\n", ++ i, *ep->reg_udccsr, *ep->reg_udccr); ++ } ++ } ++ ++ udc_clear_mask_UDCCR(UDCCR_UDE); ++ pxa_set_cken(CKEN11_USB, 0); ++ ++ return 0; ++} ++ ++static int pxa27x_udc_resume(struct platform_device *_dev) ++{ ++ int i; ++ struct pxa27x_udc *dev = platform_get_drvdata(_dev); ++ ++ DMSG("%s is called\n", __FUNCTION__); ++ UDCCSR0 = dev->udccsr0 & (UDCCSR0_FST | UDCCSR0_DME); ++ for (i=1; i < UDC_EP_NUM; i++) { ++ if (dev->ep[i].assigned) { ++ struct pxa27x_ep *ep = &dev->ep[i]; ++ *ep->reg_udccsr = ep->udccsr_value; ++ *ep->reg_udccr = ep->udccr_value; ++ DMSG("EP%d, udccsr:0x%x, udccr:0x%x\n", ++ i, *ep->reg_udccsr, *ep->reg_udccr); ++ } ++ } ++ ++ udc_enable(dev); ++ ++ /* OTGPH bit is set when sleep mode is entered. ++ * it indicates that OTG pad is retaining its state. ++ * Upon exit from sleep mode and before clearing OTGPH, ++ * Software must configure the USB OTG pad, UDC, and UHC ++ * to the state they were in before entering sleep mode.*/ ++ PSSR |= PSSR_OTGPH; ++ ++ return 0; ++} ++#endif ++ ++/*-------------------------------------------------------------------------*/ ++ ++static struct platform_driver udc_driver = { ++ .driver = { ++ .name = "pxa2xx-udc", ++ }, ++ .probe = pxa27x_udc_probe, ++ .remove = pxa27x_udc_remove, ++#ifdef CONFIG_PM ++ .shutdown = pxa27x_udc_shutdown, ++ .suspend = pxa27x_udc_suspend, ++ .resume = pxa27x_udc_resume ++#endif ++}; ++ ++static int __init udc_init(void) ++{ ++ printk(KERN_INFO "%s: version %s\n", driver_name, DRIVER_VERSION); ++ return platform_driver_register(&udc_driver); ++} ++module_init(udc_init); ++ ++static void __exit udc_exit(void) ++{ ++ platform_driver_unregister(&udc_driver); ++} ++module_exit(udc_exit); ++ ++MODULE_DESCRIPTION(DRIVER_DESC); ++MODULE_AUTHOR("Frank Becker, Robert Schwebel, David Brownell"); ++MODULE_LICENSE("GPL"); +Index: linux-2.6.20.7/drivers/usb/gadget/pxa27x_udc.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-2.6.20.7/drivers/usb/gadget/pxa27x_udc.h 2007-04-21 12:22:00.000000000 -0300 +@@ -0,0 +1,298 @@ ++/* ++ * linux/drivers/usb/gadget/pxa27x_udc.h ++ * Intel PXA27x on-chip full speed USB device controller ++ * ++ * Copyright (C) 2003 Robert Schwebel <r.schwebel@pengutronix.de>, Pengutronix ++ * Copyright (C) 2003 David Brownell ++ * Copyright (C) 2004 Intel Corporation ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA ++ */ ++ ++#ifndef __LINUX_USB_GADGET_PXA27X_H ++#define __LINUX_USB_GADGET_PXA27X_H ++ ++#include <linux/types.h> ++ ++struct pxa27x_udc; ++ ++struct pxa27x_ep { ++ struct pxa27x_udc *dev; ++ struct usb_ep *usb_ep; ++ const struct usb_endpoint_descriptor *desc; ++ ++ struct list_head queue; ++ unsigned long pio_irqs; ++ unsigned long dma_irqs; ++ ++ unsigned pxa_ep_num; ++ int dma; ++ unsigned fifo_size; ++ unsigned ep_type; ++ ++ unsigned stopped : 1; ++ unsigned dma_con : 1; ++ unsigned dir_in : 1; ++ unsigned assigned : 1; ++ ++ unsigned ep_num; ++ unsigned config; ++ unsigned interface; ++ unsigned aisn; ++ /* UDCCSR = UDC Control/Status Register for this EP ++ * UBCR = UDC Byte Count Remaining (contents of OUT fifo) ++ * UDCDR = UDC Endpoint Data Register (the fifo) ++ * UDCCR = UDC Endpoint Configuration Registers ++ * DRCM = DMA Request Channel Map ++ */ ++ volatile u32 *reg_udccsr; ++ volatile u32 *reg_udcbcr; ++ volatile u32 *reg_udcdr; ++ volatile u32 *reg_udccr; ++#ifdef USE_DMA ++ volatile u32 *reg_drcmr; ++#define drcmr(n) .reg_drcmr = & DRCMR ## n , ++#else ++#define drcmr(n) ++#endif ++ ++#ifdef CONFIG_PM ++ unsigned udccsr_value; ++ unsigned udccr_value; ++#endif ++}; ++ ++struct pxa27x_virt_ep { ++ struct usb_ep usb_ep; ++ const struct usb_endpoint_descriptor *desc; ++ struct pxa27x_ep *pxa_ep; ++}; ++ ++struct pxa27x_request { ++ struct usb_request req; ++ struct list_head queue; ++}; ++ ++enum ep0_state { ++ EP0_IDLE, ++ EP0_IN_DATA_PHASE, ++ EP0_OUT_DATA_PHASE, ++// EP0_END_XFER, ++ EP0_STALL, ++ EP0_NO_ACTION ++}; ++ ++#define EP0_FIFO_SIZE ((unsigned)16) ++#define BULK_FIFO_SIZE ((unsigned)64) ++#define ISO_FIFO_SIZE ((unsigned)256) ++#define INT_FIFO_SIZE ((unsigned)8) ++ ++struct udc_stats { ++ struct ep0stats { ++ unsigned long ops; ++ unsigned long bytes; ++ } read, write; ++ unsigned long irqs; ++}; ++ ++#define UDC_EP_NUM 24 ++ ++ ++struct pxa27x_udc { ++ struct usb_gadget gadget; ++ struct usb_gadget_driver *driver; ++ ++ enum ep0_state ep0state; ++ struct udc_stats stats; ++ unsigned got_irq : 1, ++ has_cfr : 1, ++ req_pending : 1, ++ req_std : 1, ++ req_config : 1; ++ ++#define start_watchdog(dev) mod_timer(&dev->timer, jiffies + (HZ/200)) ++ struct timer_list timer; ++ ++ struct device *dev; ++ struct pxa2xx_udc_mach_info *mach; ++ u64 dma_mask; ++ struct pxa27x_virt_ep virt_ep0; ++ struct pxa27x_ep ep[UDC_EP_NUM]; ++ unsigned int ep_num; ++ ++ unsigned configuration, ++ interface, ++ alternate; ++#ifdef CONFIG_PM ++ unsigned udccsr0; ++#endif ++}; ++ ++static struct pxa27x_udc *the_controller; ++ ++#if 0 ++/*-------------------------------------------------------------------------*/ ++ ++ ++/* one GPIO should be used to detect host disconnect */ ++static inline int is_usb_connected(void) ++{ ++ if (!the_controller->mach->udc_is_connected) ++ return 1; ++ return the_controller->mach->udc_is_connected(); ++} ++ ++/* one GPIO should force the host to see this device (or not) */ ++static inline void make_usb_disappear(void) ++{ ++ if (!the_controller->mach->udc_command) ++ return; ++ the_controller->mach->udc_command(PXA27X_UDC_CMD_DISCONNECT); ++} ++ ++static inline void let_usb_appear(void) ++{ ++ if (!the_controller->mach->udc_command) ++ return; ++ the_controller->mach->udc_command(PXA2XX_UDC_CMD_CONNECT); ++} ++#endif ++ ++/*-------------------------------------------------------------------------*/ ++ ++/* ++ * Debugging support vanishes in non-debug builds. DBG_NORMAL should be ++ * mostly silent during normal use/testing, with no timing side-effects. ++ */ ++#define DBG_NORMAL 1 /* error paths, device state transitions */ ++#define DBG_VERBOSE 2 /* add some success path trace info */ ++#define DBG_NOISY 3 /* ... even more: request level */ ++#define DBG_VERY_NOISY 4 /* ... even more: packet level */ ++ ++#ifdef DEBUG ++static const char *state_name[] = { ++ "EP0_IDLE", ++ "EP0_IN_DATA_PHASE", "EP0_OUT_DATA_PHASE", ++ "EP0_END_XFER", "EP0_STALL" ++}; ++ ++#define DMSG(stuff...) printk(KERN_ERR "udc: " stuff) ++ ++#ifdef VERBOSE ++# define UDC_DEBUG DBG_VERBOSE ++#else ++# define UDC_DEBUG DBG_NORMAL ++#endif ++ ++static void __attribute__ ((__unused__)) ++dump_udccr(const char *label) ++{ ++ u32 udccr = UDCCR; ++ DMSG("%s 0x%08x =%s%s%s%s%s%s%s%s%s%s, con=%d,inter=%d,altinter=%d\n", ++ label, udccr, ++ (udccr & UDCCR_OEN) ? " oen":"", ++ (udccr & UDCCR_AALTHNP) ? " aalthnp":"", ++ (udccr & UDCCR_AHNP) ? " rem" : "", ++ (udccr & UDCCR_BHNP) ? " rstir" : "", ++ (udccr & UDCCR_DWRE) ? " dwre" : "", ++ (udccr & UDCCR_SMAC) ? " smac" : "", ++ (udccr & UDCCR_EMCE) ? " emce" : "", ++ (udccr & UDCCR_UDR) ? " udr" : "", ++ (udccr & UDCCR_UDA) ? " uda" : "", ++ (udccr & UDCCR_UDE) ? " ude" : "", ++ (udccr & UDCCR_ACN) >> UDCCR_ACN_S, ++ (udccr & UDCCR_AIN) >> UDCCR_AIN_S, ++ (udccr & UDCCR_AAISN)>> UDCCR_AAISN_S ); ++} ++ ++static void __attribute__ ((__unused__)) ++dump_udccsr0(const char *label) ++{ ++ u32 udccsr0 = UDCCSR0; ++ ++ DMSG("%s %s 0x%08x =%s%s%s%s%s%s%s\n", ++ label, state_name[the_controller->ep0state], udccsr0, ++ (udccsr0 & UDCCSR0_SA) ? " sa" : "", ++ (udccsr0 & UDCCSR0_RNE) ? " rne" : "", ++ (udccsr0 & UDCCSR0_FST) ? " fst" : "", ++ (udccsr0 & UDCCSR0_SST) ? " sst" : "", ++ (udccsr0 & UDCCSR0_DME) ? " dme" : "", ++ (udccsr0 & UDCCSR0_IPR) ? " ipr" : "", ++ (udccsr0 & UDCCSR0_OPC) ? " opr" : ""); ++} ++ ++static void __attribute__ ((__unused__)) ++dump_state(struct pxa27x_udc *dev) ++{ ++ unsigned i; ++ ++ DMSG("%s, udcicr %02X.%02X, udcsir %02X.%02x, udcfnr %02X\n", ++ state_name[dev->ep0state], ++ UDCICR1, UDCICR0, UDCISR1, UDCISR0, UDCFNR); ++ dump_udccr("udccr"); ++ ++ if (!dev->driver) { ++ DMSG("no gadget driver bound\n"); ++ return; ++ } else ++ DMSG("ep0 driver '%s'\n", dev->driver->driver.name); ++ ++ ++ dump_udccsr0 ("udccsr0"); ++ DMSG("ep0 IN %lu/%lu, OUT %lu/%lu\n", ++ dev->stats.write.bytes, dev->stats.write.ops, ++ dev->stats.read.bytes, dev->stats.read.ops); ++ ++ for (i = 1; i < UDC_EP_NUM; i++) { ++ if (dev->ep[i].assigned) ++ DMSG ("udccs%d = %02x\n", i, *dev->ep->reg_udccsr); ++ } ++} ++ ++#if 0 ++static void dump_regs(u8 ep) ++{ ++ DMSG("EP:%d UDCCSR:0x%08x UDCBCR:0x%08x\n UDCCR:0x%08x\n", ++ ep,UDCCSN(ep), UDCBCN(ep), UDCCN(ep)); ++} ++static void dump_req (struct pxa27x_request *req) ++{ ++ struct usb_request *r = &req->req; ++ ++ DMSG("%s: buf:0x%08x length:%d dma:0x%08x actual:%d\n", ++ __FUNCTION__, (unsigned)r->buf, r->length, ++ r->dma, r->actual); ++} ++#endif ++ ++#else ++ ++#define DMSG(stuff...) do{}while(0) ++ ++#define dump_udccr(x) do{}while(0) ++#define dump_udccsr0(x) do{}while(0) ++#define dump_state(x) do{}while(0) ++ ++#define UDC_DEBUG ((unsigned)4) ++ ++#endif ++ ++#define DBG(lvl, stuff...) do{if ((lvl) <= UDC_DEBUG) DMSG(stuff);}while(0) ++ ++#define WARN(stuff...) printk(KERN_WARNING "udc: " stuff) ++#define INFO(stuff...) printk(KERN_INFO "udc: " stuff) ++ ++ ++#endif /* __LINUX_USB_GADGET_PXA27X_H */ +Index: linux-2.6.20.7/drivers/usb/gadget/pxa2xx_udc.h +=================================================================== +--- linux-2.6.20.7.orig/drivers/usb/gadget/pxa2xx_udc.h 2007-04-21 12:21:53.000000000 -0300 ++++ linux-2.6.20.7/drivers/usb/gadget/pxa2xx_udc.h 2007-04-21 12:22:00.000000000 -0300 +@@ -259,7 +259,8 @@ + unsigned i; + + DMSG("%s %s, uicr %02X.%02X, usir %02X.%02x, ufnr %02X.%02X\n", +- is_usb_connected() ? "host " : "disconnected", ++ //is_usb_connected() ? "host " : "disconnected", ++ "host ", + state_name[dev->ep0state], + UICR1, UICR0, USIR1, USIR0, UFNRH, UFNRL); + dump_udccr("udccr"); +@@ -276,8 +277,8 @@ + } else + DMSG("ep0 driver '%s'\n", dev->driver->driver.name); + +- if (!is_usb_connected()) +- return; ++ //if (!is_usb_connected()) ++ // return; + + dump_udccs0 ("udccs0"); + DMSG("ep0 IN %lu/%lu, OUT %lu/%lu\n", +Index: linux-2.6.20.7/drivers/usb/gadget/ether.c +=================================================================== +--- linux-2.6.20.7.orig/drivers/usb/gadget/ether.c 2007-04-21 12:21:53.000000000 -0300 ++++ linux-2.6.20.7/drivers/usb/gadget/ether.c 2007-04-21 12:29:18.000000000 -0300 +@@ -1275,6 +1275,10 @@ + /* done sending after USB_CDC_GET_ENCAPSULATED_RESPONSE */ + } + ++#ifdef CONFIG_USB_GADGET_PXA27X ++int write_ep0_zlp(void); ++#endif ++ + static void rndis_command_complete (struct usb_ep *ep, struct usb_request *req) + { + struct eth_dev *dev = ep->driver_data; +@@ -1285,6 +1289,10 @@ + status = rndis_msg_parser (dev->rndis_config, (u8 *) req->buf); + if (status < 0) + ERROR(dev, "%s: rndis parse error %d\n", __FUNCTION__, status); ++ ++#ifdef CONFIG_USB_GADGET_PXA27X ++ write_ep0_zlp(); ++#endif + spin_unlock(&dev->lock); + } + diff --git a/packages/linux/linux-ezx-2.6.21/.mtn2git_empty b/packages/linux/linux-ezx-2.6.21/.mtn2git_empty new file mode 100644 index 0000000000..e69de29bb2 --- /dev/null +++ b/packages/linux/linux-ezx-2.6.21/.mtn2git_empty diff --git a/packages/linux/linux-ezx-2.6.21/defconfig-a780 b/packages/linux/linux-ezx-2.6.21/defconfig-a780 new file mode 100644 index 0000000000..42fb38751c --- /dev/null +++ b/packages/linux/linux-ezx-2.6.21/defconfig-a780 @@ -0,0 +1,1253 @@ +# +# Automatically generated make config: don't edit +# Linux kernel version: 2.6.21 +# Fri Apr 27 21:27:36 2007 +# +CONFIG_ARM=y +CONFIG_SYS_SUPPORTS_APM_EMULATION=y +CONFIG_GENERIC_GPIO=y +CONFIG_GENERIC_TIME=y +CONFIG_MMU=y +# CONFIG_NO_IOPORT is not set +CONFIG_GENERIC_HARDIRQS=y +CONFIG_TRACE_IRQFLAGS_SUPPORT=y +CONFIG_HARDIRQS_SW_RESEND=y +CONFIG_GENERIC_IRQ_PROBE=y +CONFIG_RWSEM_GENERIC_SPINLOCK=y +# CONFIG_ARCH_HAS_ILOG2_U32 is not set +# CONFIG_ARCH_HAS_ILOG2_U64 is not set +CONFIG_GENERIC_HWEIGHT=y +CONFIG_GENERIC_CALIBRATE_DELAY=y +CONFIG_ZONE_DMA=y +CONFIG_ARCH_MTD_XIP=y +CONFIG_VECTORS_BASE=0xffff0000 +CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" + +# +# Code maturity level options +# +CONFIG_EXPERIMENTAL=y +CONFIG_BROKEN_ON_SMP=y +CONFIG_LOCK_KERNEL=y +CONFIG_INIT_ENV_ARG_LIMIT=32 + +# +# General setup +# +CONFIG_LOCALVERSION="-ezxdev" +# CONFIG_LOCALVERSION_AUTO is not set +# CONFIG_SWAP is not set +CONFIG_SYSVIPC=y +# CONFIG_IPC_NS is not set +CONFIG_SYSVIPC_SYSCTL=y +# CONFIG_POSIX_MQUEUE is not set +# CONFIG_BSD_PROCESS_ACCT is not set +# CONFIG_TASKSTATS is not set +# CONFIG_UTS_NS is not set +# CONFIG_AUDIT is not set +CONFIG_IKCONFIG=y +CONFIG_IKCONFIG_PROC=y +# CONFIG_SYSFS_DEPRECATED is not set +# CONFIG_RELAY is not set +# CONFIG_BLK_DEV_INITRD is not set +CONFIG_CC_OPTIMIZE_FOR_SIZE=y +CONFIG_SYSCTL=y +CONFIG_EMBEDDED=y +CONFIG_UID16=y +CONFIG_SYSCTL_SYSCALL=y +CONFIG_KALLSYMS=y +# CONFIG_KALLSYMS_ALL is not set +# CONFIG_KALLSYMS_EXTRA_PASS is not set +CONFIG_HOTPLUG=y +CONFIG_PRINTK=y +CONFIG_BUG=y +CONFIG_ELF_CORE=y +CONFIG_BASE_FULL=y +CONFIG_FUTEX=y +CONFIG_EPOLL=y +# CONFIG_SHMEM is not set +CONFIG_SLAB=y +CONFIG_VM_EVENT_COUNTERS=y +CONFIG_RT_MUTEXES=y +CONFIG_TINY_SHMEM=y +CONFIG_BASE_SMALL=0 +# CONFIG_SLOB is not set + +# +# Loadable module support +# +CONFIG_MODULES=y +CONFIG_MODULE_UNLOAD=y +CONFIG_MODULE_FORCE_UNLOAD=y +CONFIG_MODVERSIONS=y +# CONFIG_MODULE_SRCVERSION_ALL is not set +CONFIG_KMOD=y + +# +# Block layer +# +CONFIG_BLOCK=y +# CONFIG_LBD is not set +# CONFIG_BLK_DEV_IO_TRACE is not set +# CONFIG_LSF is not set + +# +# IO Schedulers +# +CONFIG_IOSCHED_NOOP=y +# CONFIG_IOSCHED_AS is not set +CONFIG_IOSCHED_DEADLINE=y +# CONFIG_IOSCHED_CFQ is not set +# CONFIG_DEFAULT_AS is not set +CONFIG_DEFAULT_DEADLINE=y +# CONFIG_DEFAULT_CFQ is not set +# CONFIG_DEFAULT_NOOP is not set +CONFIG_DEFAULT_IOSCHED="deadline" + +# +# System Type +# +# CONFIG_ARCH_AAEC2000 is not set +# CONFIG_ARCH_INTEGRATOR is not set +# CONFIG_ARCH_REALVIEW is not set +# CONFIG_ARCH_VERSATILE is not set +# CONFIG_ARCH_AT91 is not set +# CONFIG_ARCH_CLPS7500 is not set +# CONFIG_ARCH_CLPS711X is not set +# CONFIG_ARCH_CO285 is not set +# CONFIG_ARCH_EBSA110 is not set +# CONFIG_ARCH_EP93XX is not set +# CONFIG_ARCH_FOOTBRIDGE is not set +# CONFIG_ARCH_NETX is not set +# CONFIG_ARCH_H720X is not set +# CONFIG_ARCH_IMX is not set +# CONFIG_ARCH_IOP32X is not set +# CONFIG_ARCH_IOP33X is not set +# CONFIG_ARCH_IOP13XX is not set +# CONFIG_ARCH_IXP4XX is not set +# CONFIG_ARCH_IXP2000 is not set +# CONFIG_ARCH_IXP23XX is not set +# CONFIG_ARCH_L7200 is not set +# CONFIG_ARCH_NS9XXX is not set +# CONFIG_ARCH_PNX4008 is not set +CONFIG_ARCH_PXA=y +# CONFIG_ARCH_RPC is not set +# CONFIG_ARCH_SA1100 is not set +# CONFIG_ARCH_S3C2410 is not set +# CONFIG_ARCH_SHARK is not set +# CONFIG_ARCH_LH7A40X is not set +# CONFIG_ARCH_OMAP is not set + +# +# Intel PXA2xx Implementations +# +# CONFIG_ARCH_LUBBOCK is not set +# CONFIG_MACH_LOGICPD_PXA270 is not set +# CONFIG_MACH_MAINSTONE is not set +# CONFIG_ARCH_PXA_IDP is not set +# CONFIG_PXA_SHARPSL is not set +# CONFIG_MACH_TRIZEPS4 is not set +CONFIG_PXA_EZX=y +# CONFIG_PXA_EZX_E680 is not set +CONFIG_PXA_EZX_A780=y +# CONFIG_PXA_EZX_E2 is not set +CONFIG_PXA_EZX_EMU=y +CONFIG_PXA_EZX_EMU_USB=y +# CONFIG_PXA_EZX_EMU_UART is not set +# CONFIG_PXA_EZX_EMU_NOTHING is not set +CONFIG_PXA27x=y +CONFIG_PXA_SSP=y + +# +# Processor Type +# +CONFIG_CPU_32=y +CONFIG_CPU_XSCALE=y +CONFIG_CPU_32v5=y +CONFIG_CPU_ABRT_EV5T=y +CONFIG_CPU_CACHE_VIVT=y +CONFIG_CPU_TLB_V4WBI=y +CONFIG_CPU_CP15=y +CONFIG_CPU_CP15_MMU=y + +# +# Processor Features +# +CONFIG_ARM_THUMB=y +# CONFIG_CPU_DCACHE_DISABLE is not set +# CONFIG_OUTER_CACHE is not set +CONFIG_IWMMXT=y +CONFIG_XSCALE_PMU=y + +# +# Bus support +# + +# +# PCCARD (PCMCIA/CardBus) support +# +# CONFIG_PCCARD is not set + +# +# Kernel Features +# +CONFIG_PREEMPT=y +# CONFIG_NO_IDLE_HZ is not set +CONFIG_HZ=100 +CONFIG_AEABI=y +CONFIG_OABI_COMPAT=y +# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set +CONFIG_SELECT_MEMORY_MODEL=y +CONFIG_FLATMEM_MANUAL=y +# CONFIG_DISCONTIGMEM_MANUAL is not set +# CONFIG_SPARSEMEM_MANUAL is not set +CONFIG_FLATMEM=y +CONFIG_FLAT_NODE_MEM_MAP=y +# CONFIG_SPARSEMEM_STATIC is not set +CONFIG_SPLIT_PTLOCK_CPUS=4096 +# CONFIG_RESOURCES_64BIT is not set +CONFIG_ZONE_DMA_FLAG=1 +CONFIG_ALIGNMENT_TRAP=y + +# +# Boot options +# +CONFIG_ZBOOT_ROM_TEXT=0 +CONFIG_ZBOOT_ROM_BSS=0 +CONFIG_CMDLINE="console=tty1 noinitrd root=/dev/mmcblk0p2 rootfstype=ext3 ip=169.254.1.11:169.254.1.10:169.254.1.10:255.255.255.254:ezx:usb0:off debug mem=32M@0xA0000000 mem=16M@0xAC000000" +# CONFIG_XIP_KERNEL is not set +# CONFIG_KEXEC is not set + +# +# Floating point emulation +# + +# +# At least one emulation must be selected +# +CONFIG_FPE_NWFPE=y +# CONFIG_FPE_NWFPE_XP is not set +# CONFIG_FPE_FASTFPE is not set + +# +# Userspace binary formats +# +CONFIG_BINFMT_ELF=y +CONFIG_BINFMT_AOUT=m +CONFIG_BINFMT_MISC=m + +# +# Power management options +# +CONFIG_PM=y +# CONFIG_PM_LEGACY is not set +# CONFIG_PM_DEBUG is not set +# CONFIG_PM_SYSFS_DEPRECATED is not set +CONFIG_APM_EMULATION=y + +# +# Networking +# +CONFIG_NET=y + +# +# Networking options +# +# CONFIG_NETDEBUG is not set +CONFIG_PACKET=y +# CONFIG_PACKET_MMAP is not set +CONFIG_UNIX=y +CONFIG_XFRM=y +# CONFIG_XFRM_USER is not set +# CONFIG_XFRM_SUB_POLICY is not set +# CONFIG_XFRM_MIGRATE is not set +# CONFIG_NET_KEY is not set +CONFIG_INET=y +# CONFIG_IP_MULTICAST is not set +# CONFIG_IP_ADVANCED_ROUTER is not set +CONFIG_IP_FIB_HASH=y +CONFIG_IP_PNP=y +CONFIG_IP_PNP_DHCP=y +# CONFIG_IP_PNP_BOOTP is not set +# CONFIG_IP_PNP_RARP is not set +# CONFIG_NET_IPIP is not set +# CONFIG_NET_IPGRE is not set +# CONFIG_ARPD is not set +CONFIG_SYN_COOKIES=y +# CONFIG_INET_AH is not set +# CONFIG_INET_ESP is not set +# CONFIG_INET_IPCOMP is not set +# CONFIG_INET_XFRM_TUNNEL is not set +# CONFIG_INET_TUNNEL is not set +CONFIG_INET_XFRM_MODE_TRANSPORT=y +CONFIG_INET_XFRM_MODE_TUNNEL=y +CONFIG_INET_XFRM_MODE_BEET=y +CONFIG_INET_DIAG=y +CONFIG_INET_TCP_DIAG=y +# CONFIG_TCP_CONG_ADVANCED is not set +CONFIG_TCP_CONG_CUBIC=y +CONFIG_DEFAULT_TCP_CONG="cubic" +# CONFIG_TCP_MD5SIG is not set +# CONFIG_IPV6 is not set +# CONFIG_INET6_XFRM_TUNNEL is not set +# CONFIG_INET6_TUNNEL is not set +# CONFIG_NETWORK_SECMARK is not set +# CONFIG_NETFILTER is not set + +# +# DCCP Configuration (EXPERIMENTAL) +# +# CONFIG_IP_DCCP is not set + +# +# SCTP Configuration (EXPERIMENTAL) +# +# CONFIG_IP_SCTP is not set + +# +# TIPC Configuration (EXPERIMENTAL) +# +# CONFIG_TIPC is not set +# CONFIG_ATM is not set +# CONFIG_BRIDGE is not set +# CONFIG_VLAN_8021Q is not set +# CONFIG_DECNET is not set +# CONFIG_LLC2 is not set +# CONFIG_IPX is not set +# CONFIG_ATALK is not set +# CONFIG_X25 is not set +# CONFIG_LAPB is not set +# CONFIG_ECONET is not set +# CONFIG_WAN_ROUTER is not set + +# +# QoS and/or fair queueing +# +# CONFIG_NET_SCHED is not set + +# +# Network testing +# +# CONFIG_NET_PKTGEN is not set +# CONFIG_HAMRADIO is not set +# CONFIG_IRDA is not set +CONFIG_BT=m +CONFIG_BT_L2CAP=m +CONFIG_BT_SCO=m +CONFIG_BT_RFCOMM=m +CONFIG_BT_RFCOMM_TTY=y +CONFIG_BT_BNEP=m +CONFIG_BT_BNEP_MC_FILTER=y +CONFIG_BT_BNEP_PROTO_FILTER=y +CONFIG_BT_HIDP=m + +# +# Bluetooth device drivers +# +# CONFIG_BT_HCIUSB is not set +CONFIG_BT_HCIUART=m +CONFIG_BT_HCIUART_H4=y +# CONFIG_BT_HCIUART_BCSP is not set +# CONFIG_BT_HCIBCM203X is not set +# CONFIG_BT_HCIBPA10X is not set +# CONFIG_BT_HCIBFUSB is not set +# CONFIG_BT_HCIVHCI is not set +# CONFIG_IEEE80211 is not set + +# +# Device Drivers +# + +# +# Generic Driver Options +# +CONFIG_STANDALONE=y +CONFIG_PREVENT_FIRMWARE_BUILD=y +CONFIG_FW_LOADER=m +# CONFIG_DEBUG_DRIVER is not set +# CONFIG_DEBUG_DEVRES is not set +# CONFIG_SYS_HYPERVISOR is not set + +# +# Connector - unified userspace <-> kernelspace linker +# +CONFIG_CONNECTOR=m + +# +# Memory Technology Devices (MTD) +# +CONFIG_MTD=m +# CONFIG_MTD_DEBUG is not set +CONFIG_MTD_CONCAT=m +CONFIG_MTD_PARTITIONS=y +# CONFIG_MTD_REDBOOT_PARTS is not set +# CONFIG_MTD_AFS_PARTS is not set + +# +# User Modules And Translation Layers +# +CONFIG_MTD_CHAR=m +# CONFIG_MTD_BLKDEVS is not set +# CONFIG_MTD_BLOCK is not set +# CONFIG_MTD_BLOCK_RO is not set +# CONFIG_FTL is not set +# CONFIG_NFTL is not set +# CONFIG_INFTL is not set +# CONFIG_RFD_FTL is not set +# CONFIG_SSFDC is not set + +# +# RAM/ROM/Flash chip drivers +# +CONFIG_MTD_CFI=m +# CONFIG_MTD_JEDECPROBE is not set +CONFIG_MTD_GEN_PROBE=m +# CONFIG_MTD_CFI_ADV_OPTIONS is not set +CONFIG_MTD_MAP_BANK_WIDTH_1=y +CONFIG_MTD_MAP_BANK_WIDTH_2=y +CONFIG_MTD_MAP_BANK_WIDTH_4=y +# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set +CONFIG_MTD_CFI_I1=y +CONFIG_MTD_CFI_I2=y +# CONFIG_MTD_CFI_I4 is not set +# CONFIG_MTD_CFI_I8 is not set +CONFIG_MTD_CFI_INTELEXT=m +# CONFIG_MTD_CFI_AMDSTD is not set +# CONFIG_MTD_CFI_STAA is not set +CONFIG_MTD_CFI_UTIL=m +# CONFIG_MTD_RAM is not set +# CONFIG_MTD_ROM is not set +# CONFIG_MTD_ABSENT is not set +# CONFIG_MTD_OBSOLETE_CHIPS is not set +CONFIG_MTD_XIP=y + +# +# Mapping drivers for chip access +# +CONFIG_MTD_COMPLEX_MAPPINGS=y +# CONFIG_MTD_PHYSMAP is not set +# CONFIG_MTD_ARM_INTEGRATOR is not set +# CONFIG_MTD_SHARP_SL is not set +CONFIG_MTD_EZX=m +# CONFIG_MTD_EZX_A780 is not set +CONFIG_MTD_EZX_A780_ALTERNATE=y +# CONFIG_MTD_EZX_E2 is not set +# CONFIG_MTD_PLATRAM is not set + +# +# Self-contained MTD device drivers +# +# CONFIG_MTD_DATAFLASH is not set +# CONFIG_MTD_M25P80 is not set +# CONFIG_MTD_SLRAM is not set +# CONFIG_MTD_PHRAM is not set +# CONFIG_MTD_MTDRAM is not set +# CONFIG_MTD_BLOCK2MTD is not set + +# +# Disk-On-Chip Device Drivers +# +# CONFIG_MTD_DOC2000 is not set +# CONFIG_MTD_DOC2001 is not set +# CONFIG_MTD_DOC2001PLUS is not set + +# +# NAND Flash Device Drivers +# +# CONFIG_MTD_NAND is not set + +# +# OneNAND Flash Device Drivers +# +# CONFIG_MTD_ONENAND is not set + +# +# Parallel port support +# +# CONFIG_PARPORT is not set + +# +# Plug and Play support +# +# CONFIG_PNPACPI is not set + +# +# Block devices +# +# CONFIG_BLK_DEV_COW_COMMON is not set +CONFIG_BLK_DEV_LOOP=m +# CONFIG_BLK_DEV_CRYPTOLOOP is not set +# CONFIG_BLK_DEV_NBD is not set +# CONFIG_BLK_DEV_UB is not set +# CONFIG_BLK_DEV_RAM is not set +# CONFIG_CDROM_PKTCDVD is not set +# CONFIG_ATA_OVER_ETH is not set + +# +# ATA/ATAPI/MFM/RLL support +# +# CONFIG_IDE is not set + +# +# SCSI device support +# +# CONFIG_RAID_ATTRS is not set +# CONFIG_SCSI is not set +# CONFIG_SCSI_NETLINK is not set + +# +# Serial ATA (prod) and Parallel ATA (experimental) drivers +# +# CONFIG_ATA is not set + +# +# Multi-device support (RAID and LVM) +# +# CONFIG_MD is not set + +# +# Fusion MPT device support +# +# CONFIG_FUSION is not set + +# +# IEEE 1394 (FireWire) support +# + +# +# I2O device support +# + +# +# Network device support +# +CONFIG_NETDEVICES=y +CONFIG_DUMMY=y +# CONFIG_BONDING is not set +# CONFIG_EQUALIZER is not set +# CONFIG_TUN is not set + +# +# PHY device support +# + +# +# Ethernet (10 or 100Mbit) +# +# CONFIG_NET_ETHERNET is not set + +# +# Ethernet (1000 Mbit) +# + +# +# Ethernet (10000 Mbit) +# + +# +# Token Ring devices +# + +# +# Wireless LAN (non-hamradio) +# +# CONFIG_NET_RADIO is not set + +# +# Wan interfaces +# +# CONFIG_WAN is not set +# CONFIG_PPP is not set +# CONFIG_SLIP is not set +# CONFIG_SHAPER is not set +# CONFIG_NETCONSOLE is not set +# CONFIG_NETPOLL is not set +# CONFIG_NET_POLL_CONTROLLER is not set + +# +# ISDN subsystem +# +# CONFIG_ISDN is not set + +# +# Input device support +# +CONFIG_INPUT=y +# CONFIG_INPUT_FF_MEMLESS is not set + +# +# Userland interfaces +# +# CONFIG_INPUT_MOUSEDEV is not set +# CONFIG_INPUT_JOYDEV is not set +CONFIG_INPUT_TSDEV=y +CONFIG_INPUT_TSDEV_SCREEN_X=240 +CONFIG_INPUT_TSDEV_SCREEN_Y=320 +CONFIG_INPUT_EVDEV=y +# CONFIG_INPUT_EVBUG is not set + +# +# Input Device Drivers +# +CONFIG_INPUT_KEYBOARD=y +# CONFIG_KEYBOARD_ATKBD is not set +# CONFIG_KEYBOARD_SUNKBD is not set +# CONFIG_KEYBOARD_LKKBD is not set +# CONFIG_KEYBOARD_XTKBD is not set +# CONFIG_KEYBOARD_NEWTON is not set +# CONFIG_KEYBOARD_STOWAWAY is not set +CONFIG_KEYBOARD_GPIO=y +# CONFIG_INPUT_MOUSE is not set +# CONFIG_INPUT_JOYSTICK is not set +CONFIG_INPUT_TOUCHSCREEN=y +# CONFIG_TOUCHSCREEN_ADS7846 is not set +# CONFIG_TOUCHSCREEN_GUNZE is not set +# CONFIG_TOUCHSCREEN_ELO is not set +# CONFIG_TOUCHSCREEN_MTOUCH is not set +# CONFIG_TOUCHSCREEN_MK712 is not set +# CONFIG_TOUCHSCREEN_PENMOUNT is not set +# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set +# CONFIG_TOUCHSCREEN_TOUCHWIN is not set +# CONFIG_TOUCHSCREEN_UCB1400 is not set +# CONFIG_INPUT_MISC is not set + +# +# Hardware I/O ports +# +# CONFIG_SERIO is not set +# CONFIG_GAMEPORT is not set + +# +# Character devices +# +CONFIG_VT=y +CONFIG_VT_CONSOLE=y +CONFIG_HW_CONSOLE=y +# CONFIG_VT_HW_CONSOLE_BINDING is not set +# CONFIG_SERIAL_NONSTANDARD is not set + +# +# Serial drivers +# +# CONFIG_SERIAL_8250 is not set + +# +# Non-8250 serial port support +# +CONFIG_SERIAL_PXA=y +CONFIG_SERIAL_PXA_CONSOLE=y +CONFIG_SERIAL_CORE=y +CONFIG_SERIAL_CORE_CONSOLE=y +CONFIG_UNIX98_PTYS=y +CONFIG_LEGACY_PTYS=y +CONFIG_LEGACY_PTY_COUNT=8 + +# +# IPMI +# +# CONFIG_IPMI_HANDLER is not set + +# +# Watchdog Cards +# +# CONFIG_WATCHDOG is not set +# CONFIG_HW_RANDOM is not set +# CONFIG_NVRAM is not set +# CONFIG_DTLK is not set +# CONFIG_R3964 is not set +# CONFIG_RAW_DRIVER is not set + +# +# TPM devices +# +# CONFIG_TCG_TPM is not set +CONFIG_TS0710_MUX=y +CONFIG_TS0710_MUX_USB=y + +# +# I2C support +# +CONFIG_I2C=m +CONFIG_I2C_CHARDEV=m + +# +# I2C Algorithms +# +# CONFIG_I2C_ALGOBIT is not set +# CONFIG_I2C_ALGOPCF is not set +# CONFIG_I2C_ALGOPCA is not set + +# +# I2C Hardware Bus support +# +CONFIG_I2C_PXA=m +# CONFIG_I2C_PXA_SLAVE is not set +# CONFIG_I2C_OCORES is not set +# CONFIG_I2C_PARPORT_LIGHT is not set +# CONFIG_I2C_STUB is not set +# CONFIG_I2C_PCA_ISA is not set + +# +# Miscellaneous I2C Chip support +# +# CONFIG_SENSORS_DS1337 is not set +# CONFIG_SENSORS_DS1374 is not set +# CONFIG_SENSORS_EEPROM is not set +# CONFIG_SENSORS_PCF8574 is not set +# CONFIG_SENSORS_PCA9539 is not set +# CONFIG_SENSORS_PCF8591 is not set +# CONFIG_SENSORS_MAX6875 is not set +# CONFIG_I2C_DEBUG_CORE is not set +# CONFIG_I2C_DEBUG_ALGO is not set +# CONFIG_I2C_DEBUG_BUS is not set +# CONFIG_I2C_DEBUG_CHIP is not set + +# +# SPI support +# +CONFIG_SPI=y +CONFIG_SPI_DEBUG=y +CONFIG_SPI_MASTER=y + +# +# SPI Master Controller Drivers +# +# CONFIG_SPI_BITBANG is not set +CONFIG_SPI_PXA2XX=y + +# +# SPI Protocol Masters +# +# CONFIG_SPI_AT25 is not set + +# +# Dallas's 1-wire bus +# +# CONFIG_W1 is not set + +# +# Hardware Monitoring support +# +# CONFIG_HWMON is not set +# CONFIG_HWMON_VID is not set + +# +# Misc devices +# + +# +# Multifunction device drivers +# +# CONFIG_MFD_SM501 is not set + +# +# LED devices +# +# CONFIG_NEW_LEDS is not set + +# +# LED drivers +# + +# +# LED Triggers +# + +# +# Multimedia devices +# +# CONFIG_VIDEO_DEV is not set + +# +# Digital Video Broadcasting Devices +# +# CONFIG_DVB is not set +# CONFIG_USB_DABUSB is not set + +# +# Graphics support +# +CONFIG_BACKLIGHT_LCD_SUPPORT=y +CONFIG_BACKLIGHT_CLASS_DEVICE=y +# CONFIG_LCD_CLASS_DEVICE is not set +CONFIG_FB=y +# CONFIG_FIRMWARE_EDID is not set +# CONFIG_FB_DDC is not set +CONFIG_FB_CFB_FILLRECT=y +CONFIG_FB_CFB_COPYAREA=y +CONFIG_FB_CFB_IMAGEBLIT=y +# CONFIG_FB_SVGALIB is not set +# CONFIG_FB_MACMODES is not set +# CONFIG_FB_BACKLIGHT is not set +# CONFIG_FB_MODE_HELPERS is not set +# CONFIG_FB_TILEBLITTING is not set + +# +# Frame buffer hardware drivers +# +# CONFIG_FB_S1D13XXX is not set +CONFIG_FB_PXA=y +CONFIG_FB_PXA_PARAMETERS=y +# CONFIG_FB_MBX is not set +# CONFIG_FB_VIRTUAL is not set + +# +# Console display driver support +# +# CONFIG_VGA_CONSOLE is not set +CONFIG_DUMMY_CONSOLE=y +CONFIG_FRAMEBUFFER_CONSOLE=y +# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set +CONFIG_FONTS=y +# CONFIG_FONT_8x8 is not set +# CONFIG_FONT_8x16 is not set +# CONFIG_FONT_6x11 is not set +# CONFIG_FONT_7x14 is not set +# CONFIG_FONT_PEARL_8x8 is not set +# CONFIG_FONT_ACORN_8x8 is not set +CONFIG_FONT_MINI_4x6=y +# CONFIG_FONT_SUN8x16 is not set +# CONFIG_FONT_SUN12x22 is not set +# CONFIG_FONT_10x18 is not set + +# +# Logo configuration +# +# CONFIG_LOGO is not set + +# +# Sound +# +# CONFIG_SOUND is not set + +# +# HID Devices +# +CONFIG_HID=y +# CONFIG_HID_DEBUG is not set + +# +# USB support +# +CONFIG_USB_ARCH_HAS_HCD=y +CONFIG_USB_ARCH_HAS_OHCI=y +# CONFIG_USB_ARCH_HAS_EHCI is not set +CONFIG_USB=y +# CONFIG_USB_DEBUG is not set + +# +# Miscellaneous USB options +# +# CONFIG_USB_DEVICEFS is not set +# CONFIG_USB_DYNAMIC_MINORS is not set +# CONFIG_USB_SUSPEND is not set +# CONFIG_USB_OTG is not set + +# +# USB Host Controller Drivers +# +# CONFIG_USB_ISP116X_HCD is not set +CONFIG_USB_OHCI_HCD=y +# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set +# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set +CONFIG_USB_OHCI_LITTLE_ENDIAN=y +# CONFIG_USB_SL811_HCD is not set + +# +# USB Device Class drivers +# +# CONFIG_USB_ACM is not set +# CONFIG_USB_PRINTER is not set + +# +# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' +# + +# +# may also be needed; see USB_STORAGE Help for more information +# +# CONFIG_USB_LIBUSUAL is not set + +# +# USB Input Devices +# +# CONFIG_USB_HID is not set + +# +# USB HID Boot Protocol drivers +# +# CONFIG_USB_KBD is not set +# CONFIG_USB_MOUSE is not set +# CONFIG_USB_AIPTEK is not set +# CONFIG_USB_WACOM is not set +# CONFIG_USB_ACECAD is not set +# CONFIG_USB_KBTAB is not set +# CONFIG_USB_POWERMATE is not set +# CONFIG_USB_TOUCHSCREEN is not set +# CONFIG_USB_YEALINK is not set +# CONFIG_USB_XPAD is not set +# CONFIG_USB_ATI_REMOTE is not set +# CONFIG_USB_ATI_REMOTE2 is not set +# CONFIG_USB_KEYSPAN_REMOTE is not set +# CONFIG_USB_APPLETOUCH is not set +# CONFIG_USB_GTCO is not set + +# +# USB Imaging devices +# +# CONFIG_USB_MDC800 is not set + +# +# USB Network Adapters +# +# CONFIG_USB_CATC is not set +# CONFIG_USB_KAWETH is not set +# CONFIG_USB_PEGASUS is not set +# CONFIG_USB_RTL8150 is not set +# CONFIG_USB_USBNET_MII is not set +# CONFIG_USB_USBNET is not set +CONFIG_USB_MON=y + +# +# USB port drivers +# + +# +# USB Serial Converter support +# +# CONFIG_USB_SERIAL is not set + +# +# USB Miscellaneous drivers +# +# CONFIG_USB_EMI62 is not set +# CONFIG_USB_EMI26 is not set +# CONFIG_USB_ADUTUX is not set +# CONFIG_USB_AUERSWALD is not set +# CONFIG_USB_RIO500 is not set +# CONFIG_USB_LEGOTOWER is not set +# CONFIG_USB_LCD is not set +# CONFIG_USB_BERRY_CHARGE is not set +# CONFIG_USB_LED is not set +# CONFIG_USB_CYPRESS_CY7C63 is not set +# CONFIG_USB_CYTHERM is not set +# CONFIG_USB_PHIDGET is not set +# CONFIG_USB_IDMOUSE is not set +# CONFIG_USB_FTDI_ELAN is not set +# CONFIG_USB_APPLEDISPLAY is not set +# CONFIG_USB_LD is not set +# CONFIG_USB_TRANCEVIBRATOR is not set +# CONFIG_USB_IOWARRIOR is not set + +# +# USB DSL modem support +# + +# +# USB Gadget Support +# +CONFIG_USB_GADGET=y +# CONFIG_USB_GADGET_DEBUG_FILES is not set +CONFIG_USB_GADGET_SELECTED=y +# CONFIG_USB_GADGET_NET2280 is not set +# CONFIG_USB_GADGET_PXA2XX is not set +CONFIG_USB_GADGET_PXA27X=y +CONFIG_USB_PXA27X=y +# CONFIG_USB_PXA2XX_SMALL is not set +# CONFIG_USB_GADGET_GOKU is not set +# CONFIG_USB_GADGET_LH7A40X is not set +# CONFIG_USB_GADGET_OMAP is not set +# CONFIG_USB_GADGET_AT91 is not set +# CONFIG_USB_GADGET_DUMMY_HCD is not set +# CONFIG_USB_GADGET_DUALSPEED is not set +# CONFIG_USB_ZERO is not set +CONFIG_USB_ETH=y +# CONFIG_USB_ETH_RNDIS is not set +# CONFIG_USB_GADGETFS is not set +# CONFIG_USB_FILE_STORAGE is not set +# CONFIG_USB_G_SERIAL is not set +# CONFIG_USB_MIDI_GADGET is not set + +# +# MMC/SD Card support +# +CONFIG_MMC=y +# CONFIG_MMC_DEBUG is not set +CONFIG_MMC_BLOCK=y +CONFIG_MMC_PXA=y + +# +# Real Time Clock +# +CONFIG_RTC_LIB=y +CONFIG_RTC_CLASS=m + +# +# RTC interfaces +# +CONFIG_RTC_INTF_SYSFS=m +CONFIG_RTC_INTF_PROC=m +CONFIG_RTC_INTF_DEV=m +# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set + +# +# RTC drivers +# +# CONFIG_RTC_DRV_CMOS is not set +# CONFIG_RTC_DRV_X1205 is not set +# CONFIG_RTC_DRV_DS1307 is not set +# CONFIG_RTC_DRV_DS1553 is not set +# CONFIG_RTC_DRV_ISL1208 is not set +# CONFIG_RTC_DRV_DS1672 is not set +# CONFIG_RTC_DRV_DS1742 is not set +# CONFIG_RTC_DRV_PCF8563 is not set +# CONFIG_RTC_DRV_RS5C348 is not set +# CONFIG_RTC_DRV_RS5C372 is not set +# CONFIG_RTC_DRV_M48T86 is not set +CONFIG_RTC_DRV_SA1100=m +# CONFIG_RTC_DRV_TEST is not set +# CONFIG_RTC_DRV_MAX6902 is not set +# CONFIG_RTC_DRV_V3020 is not set + +# +# File systems +# +CONFIG_EXT2_FS=m +CONFIG_EXT2_FS_XATTR=y +CONFIG_EXT2_FS_POSIX_ACL=y +CONFIG_EXT2_FS_SECURITY=y +# CONFIG_EXT2_FS_XIP is not set +CONFIG_EXT3_FS=y +CONFIG_EXT3_FS_XATTR=y +CONFIG_EXT3_FS_POSIX_ACL=y +CONFIG_EXT3_FS_SECURITY=y +# CONFIG_EXT4DEV_FS is not set +CONFIG_JBD=y +# CONFIG_JBD_DEBUG is not set +CONFIG_FS_MBCACHE=y +CONFIG_REISERFS_FS=m +# CONFIG_REISERFS_CHECK is not set +# CONFIG_REISERFS_PROC_INFO is not set +CONFIG_REISERFS_FS_XATTR=y +CONFIG_REISERFS_FS_POSIX_ACL=y +CONFIG_REISERFS_FS_SECURITY=y +# CONFIG_JFS_FS is not set +CONFIG_FS_POSIX_ACL=y +# CONFIG_XFS_FS is not set +# CONFIG_GFS2_FS is not set +# CONFIG_OCFS2_FS is not set +# CONFIG_MINIX_FS is not set +# CONFIG_ROMFS_FS is not set +CONFIG_INOTIFY=y +CONFIG_INOTIFY_USER=y +# CONFIG_QUOTA is not set +CONFIG_DNOTIFY=y +CONFIG_AUTOFS_FS=y +CONFIG_AUTOFS4_FS=y +# CONFIG_FUSE_FS is not set + +# +# CD-ROM/DVD Filesystems +# +# CONFIG_ISO9660_FS is not set +# CONFIG_UDF_FS is not set + +# +# DOS/FAT/NT Filesystems +# +CONFIG_FAT_FS=m +CONFIG_MSDOS_FS=m +CONFIG_VFAT_FS=m +CONFIG_FAT_DEFAULT_CODEPAGE=437 +CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" +# CONFIG_NTFS_FS is not set + +# +# Pseudo filesystems +# +CONFIG_PROC_FS=y +CONFIG_PROC_SYSCTL=y +CONFIG_SYSFS=y +# CONFIG_TMPFS is not set +# CONFIG_HUGETLB_PAGE is not set +CONFIG_RAMFS=y +# CONFIG_CONFIGFS_FS is not set + +# +# Miscellaneous filesystems +# +# CONFIG_ADFS_FS is not set +# CONFIG_AFFS_FS is not set +# CONFIG_HFS_FS is not set +# CONFIG_HFSPLUS_FS is not set +# CONFIG_BEFS_FS is not set +# CONFIG_BFS_FS is not set +# CONFIG_EFS_FS is not set +# CONFIG_JFFS2_FS is not set +CONFIG_CRAMFS=y +# CONFIG_VXFS_FS is not set +# CONFIG_HPFS_FS is not set +# CONFIG_QNX4FS_FS is not set +# CONFIG_SYSV_FS is not set +# CONFIG_UFS_FS is not set + +# +# Network File Systems +# +CONFIG_NFS_FS=y +CONFIG_NFS_V3=y +CONFIG_NFS_V3_ACL=y +# CONFIG_NFS_V4 is not set +CONFIG_NFS_DIRECTIO=y +CONFIG_NFSD=m +CONFIG_NFSD_V2_ACL=y +CONFIG_NFSD_V3=y +CONFIG_NFSD_V3_ACL=y +# CONFIG_NFSD_V4 is not set +CONFIG_NFSD_TCP=y +CONFIG_ROOT_NFS=y +CONFIG_LOCKD=y +CONFIG_LOCKD_V4=y +CONFIG_EXPORTFS=m +CONFIG_NFS_ACL_SUPPORT=y +CONFIG_NFS_COMMON=y +CONFIG_SUNRPC=y +# CONFIG_RPCSEC_GSS_KRB5 is not set +# CONFIG_RPCSEC_GSS_SPKM3 is not set +CONFIG_SMB_FS=m +# CONFIG_SMB_NLS_DEFAULT is not set +CONFIG_CIFS=m +CONFIG_CIFS_STATS=y +# CONFIG_CIFS_STATS2 is not set +CONFIG_CIFS_WEAK_PW_HASH=y +CONFIG_CIFS_XATTR=y +CONFIG_CIFS_POSIX=y +# CONFIG_CIFS_DEBUG2 is not set +# CONFIG_CIFS_EXPERIMENTAL is not set +# CONFIG_NCP_FS is not set +# CONFIG_CODA_FS is not set +# CONFIG_AFS_FS is not set +# CONFIG_9P_FS is not set + +# +# Partition Types +# +# CONFIG_PARTITION_ADVANCED is not set +CONFIG_MSDOS_PARTITION=y + +# +# Native Language Support +# +CONFIG_NLS=y +CONFIG_NLS_DEFAULT="iso8859-1" +CONFIG_NLS_CODEPAGE_437=m +CONFIG_NLS_CODEPAGE_737=m +CONFIG_NLS_CODEPAGE_775=m +CONFIG_NLS_CODEPAGE_850=m +CONFIG_NLS_CODEPAGE_852=m +CONFIG_NLS_CODEPAGE_855=m +CONFIG_NLS_CODEPAGE_857=m +CONFIG_NLS_CODEPAGE_860=m +CONFIG_NLS_CODEPAGE_861=m +CONFIG_NLS_CODEPAGE_862=m +CONFIG_NLS_CODEPAGE_863=m +CONFIG_NLS_CODEPAGE_864=m +CONFIG_NLS_CODEPAGE_865=m +CONFIG_NLS_CODEPAGE_866=m +CONFIG_NLS_CODEPAGE_869=m +CONFIG_NLS_CODEPAGE_936=m +CONFIG_NLS_CODEPAGE_950=m +CONFIG_NLS_CODEPAGE_932=m +CONFIG_NLS_CODEPAGE_949=m +CONFIG_NLS_CODEPAGE_874=m +CONFIG_NLS_ISO8859_8=m +CONFIG_NLS_CODEPAGE_1250=m +CONFIG_NLS_CODEPAGE_1251=m +CONFIG_NLS_ASCII=m +CONFIG_NLS_ISO8859_1=m +CONFIG_NLS_ISO8859_2=m +CONFIG_NLS_ISO8859_3=m +CONFIG_NLS_ISO8859_4=m +CONFIG_NLS_ISO8859_5=m +CONFIG_NLS_ISO8859_6=m +CONFIG_NLS_ISO8859_7=m +CONFIG_NLS_ISO8859_9=m +CONFIG_NLS_ISO8859_13=m +CONFIG_NLS_ISO8859_14=m +CONFIG_NLS_ISO8859_15=m +CONFIG_NLS_KOI8_R=m +CONFIG_NLS_KOI8_U=m +CONFIG_NLS_UTF8=m + +# +# Distributed Lock Manager +# +# CONFIG_DLM is not set + +# +# Profiling support +# +# CONFIG_PROFILING is not set + +# +# Kernel hacking +# +# CONFIG_PRINTK_TIME is not set +CONFIG_ENABLE_MUST_CHECK=y +# CONFIG_MAGIC_SYSRQ is not set +# CONFIG_UNUSED_SYMBOLS is not set +# CONFIG_DEBUG_FS is not set +# CONFIG_HEADERS_CHECK is not set +CONFIG_DEBUG_KERNEL=y +# CONFIG_DEBUG_SHIRQ is not set +CONFIG_LOG_BUF_SHIFT=14 +CONFIG_DETECT_SOFTLOCKUP=y +# CONFIG_SCHEDSTATS is not set +# CONFIG_TIMER_STATS is not set +# CONFIG_DEBUG_SLAB is not set +CONFIG_DEBUG_PREEMPT=y +CONFIG_DEBUG_RT_MUTEXES=y +CONFIG_DEBUG_PI_LIST=y +# CONFIG_RT_MUTEX_TESTER is not set +CONFIG_DEBUG_SPINLOCK=y +CONFIG_DEBUG_MUTEXES=y +CONFIG_DEBUG_SPINLOCK_SLEEP=y +# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set +# CONFIG_DEBUG_KOBJECT is not set +CONFIG_DEBUG_BUGVERBOSE=y +# CONFIG_DEBUG_INFO is not set +# CONFIG_DEBUG_VM is not set +# CONFIG_DEBUG_LIST is not set +CONFIG_FRAME_POINTER=y +CONFIG_FORCED_INLINING=y +# CONFIG_RCU_TORTURE_TEST is not set +# CONFIG_FAULT_INJECTION is not set +# CONFIG_DEBUG_USER is not set +CONFIG_DEBUG_ERRORS=y +# CONFIG_DEBUG_LL is not set + +# +# Security options +# +# CONFIG_KEYS is not set +# CONFIG_SECURITY is not set + +# +# Cryptographic options +# +# CONFIG_CRYPTO is not set + +# +# Library routines +# +CONFIG_BITREVERSE=y +CONFIG_CRC_CCITT=m +CONFIG_CRC16=m +CONFIG_CRC32=y +CONFIG_LIBCRC32C=m +CONFIG_ZLIB_INFLATE=y +CONFIG_PLIST=y +CONFIG_HAS_IOMEM=y +CONFIG_HAS_IOPORT=y diff --git a/packages/linux/linux-ezx-2.6.21/ezx-core.patch b/packages/linux/linux-ezx-2.6.21/ezx-core.patch new file mode 100644 index 0000000000..81be0ef159 --- /dev/null +++ b/packages/linux/linux-ezx-2.6.21/ezx-core.patch @@ -0,0 +1,1116 @@ +Index: linux-2.6.21/arch/arm/boot/compressed/head-xscale.S +=================================================================== +--- linux-2.6.21.orig/arch/arm/boot/compressed/head-xscale.S 2007-04-26 00:08:32.000000000 -0300 ++++ linux-2.6.21/arch/arm/boot/compressed/head-xscale.S 2007-04-26 20:27:42.000000000 -0300 +@@ -53,3 +53,6 @@ + str r1, [r0, #0x18] + #endif + ++#ifdef CONFIG_ARCH_EZX ++ mov r7, #MACH_TYPE_EZX ++#endif +Index: linux-2.6.21/arch/arm/mach-pxa/Kconfig +=================================================================== +--- linux-2.6.21.orig/arch/arm/mach-pxa/Kconfig 2007-04-26 00:08:32.000000000 -0300 ++++ linux-2.6.21/arch/arm/mach-pxa/Kconfig 2007-04-26 20:27:42.000000000 -0300 +@@ -37,6 +37,10 @@ + bool "Keith und Koep Trizeps4 DIMM-Module" + select PXA27x + ++config PXA_EZX ++ bool "Motorola EZX Platform" ++ select PXA_SSP ++ + endchoice + + if PXA_SHARPSL +@@ -71,6 +75,27 @@ + + endif + ++if PXA_EZX ++ ++choice ++ prompt "Select target EZX device" ++ ++config PXA_EZX_E680 ++ bool "Motorola E680 GSM Phone" ++ select PXA27x ++ ++config PXA_EZX_A780 ++ bool "Motorola A780 GSM Phone" ++ select PXA27x ++ ++config PXA_EZX_E2 ++ bool "Motorola E2 GSM Phone" ++ select PXA27x ++ ++endchoice ++ ++endif ++ + endmenu + + config MACH_POODLE +@@ -144,4 +169,5 @@ + tristate + help + Enable support for PXA2xx SSP ports ++ + endif +Index: linux-2.6.21/arch/arm/mach-pxa/Makefile +=================================================================== +--- linux-2.6.21.orig/arch/arm/mach-pxa/Makefile 2007-04-26 00:08:32.000000000 -0300 ++++ linux-2.6.21/arch/arm/mach-pxa/Makefile 2007-04-26 20:27:42.000000000 -0300 +@@ -18,6 +18,7 @@ + obj-$(CONFIG_MACH_AKITA) += akita-ioexp.o + obj-$(CONFIG_MACH_POODLE) += poodle.o corgi_ssp.o + obj-$(CONFIG_MACH_TOSA) += tosa.o ++obj-$(CONFIG_PXA_EZX) += ezx.o ezx_lcd.o ezx_ssp.o + + # Support for blinky lights + led-y := leds.o +Index: linux-2.6.21/arch/arm/mach-pxa/ezx.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-2.6.21/arch/arm/mach-pxa/ezx.c 2007-04-26 20:27:42.000000000 -0300 +@@ -0,0 +1,379 @@ ++/* ++ * linux/arch/arm/mach-ezx/a780.c ++ * ++ * Support for the Motorola Ezx A780 Development Platform. ++ * ++ * Author: Zhuang Xiaofan ++ * Created: Nov 25, 2003 ++ * Copyright: Motorola Inc. ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ */ ++ ++#include <linux/init.h> ++#include <linux/major.h> ++#include <linux/fs.h> ++#include <linux/interrupt.h> ++#include <linux/sched.h> ++#include <linux/bitops.h> ++#include <linux/apm_bios.h> ++#include <linux/platform_device.h> ++#include <linux/input.h> ++ ++#include <asm/types.h> ++#include <asm/setup.h> ++#include <asm/memory.h> ++#include <asm/mach-types.h> ++#include <asm/hardware.h> ++#include <asm/irq.h> ++ ++#include <asm/mach/arch.h> ++#include <asm/mach/map.h> ++#include <asm/mach/irq.h> ++ ++#include <asm/arch/ohci.h> ++#include <asm/arch/pxa-regs.h> ++ ++#include "ezx.h" ++#include "generic.h" ++#include <linux/tty.h> ++#include <linux/apm_bios.h> ++ ++ ++extern void usb_send_readurb(void); ++extern int ezx_ssp_set_machinfo(struct ezxssp_machinfo *); ++//FIXME extern void pm_do_poweroff(void); ++ ++/* BP Handshake */ ++#define FIRST_STEP 2 ++#define LAST_STEP 3 ++#define BP_RDY_TIMEOUT 0x000c0000 ++ ++/* check power down condition */ ++inline void check_power_off(void) ++{ ++ if (!(GPIO_is_high(GPIO_BB_WDI2))) { ++#ifdef CONFIG_PM ++//FIXME pm_do_poweroff(); ++#endif ++ } ++} ++ ++/* SSP */ ++struct platform_device ezxssp_device = { ++ .name = "ezx-ssp", ++ .id = -1, ++}; ++ ++struct ezxssp_machinfo ezx_ssp_machinfo = { ++ .port = 1, ++ .cs_pcap = GPIO_SPI_CE, ++ .clk_pcap = 1, ++}; ++ ++ ++/* OHCI Controller */ ++ ++static int ezx_ohci_init(struct device *dev) ++{ ++ /* for A780 support (connected with Neptune) */ ++ pxa_gpio_mode(GPIO30_USB_P3_2); /* GPIO30 - USB_P3_2/ICL_TXENB */ ++ pxa_gpio_mode(GPIO31_USB_P3_6); /* GPIO31 - USB_P3_6/ICL_VPOUT */ ++ pxa_gpio_mode(GPIO90_USB_P3_5); /* GPIO90 - USB_P3_5/ICL_VPIN */ ++ pxa_gpio_mode(GPIO91_USB_P3_1); /* GPIO91 - USB_P3_1/ICL_XRXD */ ++ pxa_gpio_mode(GPIO56_USB_P3_4); /* GPIO56 - USB_P3_4/ICL_VMOUT */ ++ pxa_gpio_mode(GPIO113_USB_P3_3);/* GPIO113 - USB_P3_3/ICL_VMIN */ ++ UP3OCR = 0x00000002; ++ ++ UHCHR = UHCHR & ~(UHCHR_SSEP2 | UHCHR_SSEP3 | UHCHR_SSE); ++ ++ return 0; ++} ++ ++static struct pxaohci_platform_data ezx_ohci_platform_data = { ++ .port_mode = PMM_NPS_MODE, ++ .init = ezx_ohci_init, ++}; ++ ++static int step = FIRST_STEP; ++void handshake(void) ++{ ++ /* step 1: check MCU_INT_SW or BP_RDY is low (now it is checked in apboot) */ ++ if (step == 1) { ++ int timeout = BP_RDY_TIMEOUT; ++ ++ /* config MCU_INT_SW, BP_RDY as input */ ++ GPDR(GPIO_MCU_INT_SW) &= ~GPIO_bit(GPIO_MCU_INT_SW); ++ GPDR(GPIO_BP_RDY) &= ~GPIO_bit(GPIO_BP_RDY); ++ ++ while ( timeout -- ) { ++ if ( (!(GPIO_is_high(GPIO_MCU_INT_SW))) ++ || (!(GPIO_is_high(GPIO_BP_RDY))) ) { ++ step ++; ++ break; ++ } ++ ++ check_power_off(); ++ } ++ } ++ ++ /* step 2: wait BP_RDY is low */ ++ if (step == 2) { ++ if (!(GPIO_is_high(GPIO_BP_RDY))) { ++ ++ /* config MCU_INT_SW as output */ ++ pxa_gpio_mode(GPIO_MCU_INT_SW | GPIO_OUT); ++ clr_GPIO(GPIO_MCU_INT_SW); ++ ++ step ++; ++ } ++ } ++ ++ /* step 3: wait BP_RDY is high */ ++ if (step == 3) { ++ if (GPIO_is_high(GPIO_BP_RDY)) { ++ step ++; ++ //FIXME delay_bklight(); ++ set_GPIO(GPIO_MCU_INT_SW); ++ } ++ } ++} ++ ++#ifdef CONFIG_APM ++static unsigned long idle_limit = 0; ++int pm_handle_irq(int irq) ++{ ++ ++ //FIXME: extern unsigned long idle_limit; ++ //FIXME: extern int can_idle, can_sleep; ++ static unsigned long tmp_jiffy; /* for temporary store of jiffies */ ++ ++ /* ++ * if idle_limit is zero, never enter idle. ++ * if not OS timer, reset idle timer count ++ */ ++ if (idle_limit == 0) { ++ tmp_jiffy = jiffies; ++ return irq; ++ } ++#if 0 ++ if (irq != IRQ_OST0) { ++ tmp_jiffy = jiffies; ++ can_idle = 0; ++ can_sleep = 0; ++ } else if (jiffies > tmp_jiffy + idle_limit) { ++ ++ /* ++ * I think this is enough to prevent from reentering here ++ * due to jiffies will be stoped ++ */ ++ tmp_jiffy = jiffies; ++ ++ /* if pm idle timer expired, queue event */ ++ apm_queue_event(KRNL_PROC_INACT); ++ can_idle = 1; ++ } ++#endif ++ ++ return irq; ++} ++ ++irqreturn_t bp_wdi_intr(int irq, void *dev_id) ++{ ++//FIXME apm_queue_event(KRNL_BP_WDI); ++ return IRQ_HANDLED; ++} ++ ++static struct irqaction bp_wdi_irq = { ++ .name = "BP wdi", ++ .handler = &bp_wdi_intr, ++}; ++#endif ++ ++int handshake_pass(void) ++{ ++ return (step > LAST_STEP); ++} ++ ++static irqreturn_t bp_rdy_intr(int irq, void *dev_id) ++{ ++ static int usbipc_ready = 0; ++ ++ if (!usbipc_ready) { ++ handshake(); ++ if (handshake_pass()) { ++ disable_irq(IRQ_GPIO(GPIO_BB_WDI2)); ++ ++ /* set bp_rdy handle for usb ipc */ ++ set_irq_type(GPIO_BP_RDY, IRQT_FALLING); ++ usbipc_ready = 1; ++ } ++ } else ++ // FIXME usb_send_readurb(); ++ {} ++ ++ return IRQ_HANDLED; ++} ++ ++static struct irqaction bp_rdy_irq = { ++ .name = "BP rdy", ++ .handler = bp_rdy_intr, ++}; ++ ++static irqreturn_t bp_wdi2_intr(int irq, void *dev_id) ++{ ++#ifdef CONFIG_PM ++//FIXME pm_do_poweroff(); ++#endif ++ return IRQ_HANDLED; ++} ++ ++static struct irqaction bp_wdi2_irq = { ++ .name = "BP wdi2", ++ .handler = bp_wdi2_intr, ++}; ++ ++ ++static struct resource ezx_bp_resources[] = { ++ [0] = { ++ .start = GPIO_BP_RDY, ++ .end = GPIO_BP_RDY, ++ .flags = IORESOURCE_IRQ, ++ }, ++ [1] = { ++ .start = GPIO_BB_WDI2, ++ .end = GPIO_BB_WDI2, ++ .flags = IORESOURCE_IRQ, ++ }, ++#ifdef CONFIG_APM ++ [2] = { ++ .start = GPIO_BB_WDI, ++ .end = GPIO_BB_WDI, ++ .flags = IORESOURCE_IRQ, ++ }, ++#endif ++}; ++ ++static struct platform_device ezx_bp_device = { ++ .name = "ezx-bp", ++ .dev = { ++ //.parent = ++ //.platform_data = ++ }, ++ .id = -1, ++ .num_resources = ARRAY_SIZE(ezx_bp_resources), ++ .resource = ezx_bp_resources, ++}; ++ ++static void __init ezx_init_gpio_irq(void) ++{ ++#ifdef CONFIG_APM ++ set_irq_type(GPIO_BB_WDI, IRQT_FALLING); ++ setup_irq(IRQ_GPIO(GPIO_BB_WDI), &bp_wdi_irq); ++#endif ++ set_irq_type(GPIO_BP_RDY, IRQT_BOTHEDGE); ++ setup_irq(IRQ_GPIO(GPIO_BP_RDY), &bp_rdy_irq); ++ ++ set_irq_type(GPIO_BB_WDI2, IRQT_FALLING); ++ setup_irq(IRQ_GPIO(GPIO_BB_WDI2), &bp_wdi2_irq); ++} ++ ++static void __init a780_init_irq(void) ++{ ++ pxa_init_irq(); ++ ++ /* init ezx specfic gpio irq */ ++ ezx_init_gpio_irq(); ++ ++ check_power_off(); ++ handshake(); ++ if (handshake_pass()) { ++ disable_irq(IRQ_GPIO(GPIO_BP_RDY)); ++ disable_irq(IRQ_GPIO(GPIO_BB_WDI2)); ++ } ++} ++ ++static struct platform_device *devices[] __initdata = { ++ &ezxssp_device, ++ &ezx_bp_device, ++}; ++ ++static void __init a780_init(void) ++{ ++//FIXME CKEN = CKEN9_OSTIMER | CKEN22_MEMC | CKEN5_STUART; ++ ++ ezx_ssp_set_machinfo(&ezx_ssp_machinfo); ++ ++ /* set BB_RESET PIN out put high */ ++ pxa_gpio_mode(GPIO_BB_RESET|GPIO_OUT); ++ set_GPIO(GPIO_BB_RESET); ++ ++ pxa_gpio_mode(GPIO_ICL_FFRXD_MD); ++ pxa_gpio_mode(GPIO_ICL_FFTXD_MD); ++ pxa_gpio_mode(GPIO_ICL_FFCTS_MD); ++ pxa_gpio_mode(GPIO_ICL_FFRTS_MD); ++ ++ pxa_gpio_mode(GPIO42_BTRXD_MD); ++ pxa_gpio_mode(GPIO43_BTTXD_MD); ++ pxa_gpio_mode(GPIO44_BTCTS_MD); ++ pxa_gpio_mode(GPIO45_BTRTS_MD); ++ ++ /* clear EMU MUX1/MUX2 (low) to close the audio path to EMU */ ++ pxa_gpio_mode(GPIO_EMU_MUX1|GPIO_OUT); ++ clr_GPIO(GPIO_EMU_MUX1); ++ pxa_gpio_mode(GPIO_EMU_MUX2|GPIO_OUT); ++ clr_GPIO(GPIO_EMU_MUX2); ++ ++#if defined(CONFIG_PXA_EZX_E680) ++ pxa_gpio_mode(GPIO46_STRXD_MD); ++ pxa_gpio_mode(GPIO47_STTXD_MD); ++ ++ /* setup sleep mode values */ ++ PWER = 0xc000f803; // disable usb 0xdc00f803; ++ PFER = 0x0000f803; ++ PRER = 0x00001802; ++ // keypad wakeup (PKWR,PGSR3) should be in keypad.c ++ PGSR0 = 0x00000010; ++ PGSR1 = 0x02800000; ++ PGSR2 = 0x00040000; ++ PGSR3 = 0x00000000; ++ PCFR = PCFR_DC_EN | PCFR_FS | PCFR_FP | PCFR_OPDE; ++ PSLR = 0x05800f00; ++ ++#elif defined(CONFIG_PXA_EZX_A780) ++ ++ /* Standard UART */ ++ pxa_gpio_mode(GPIO46_STRXD_MD); ++ pxa_gpio_mode(GPIO47_STTXD_MD); ++ ++ /* setup sleep mode values */ ++ PWER = 0xc0007803; // disable usb, GPIO15 NC ++ PFER = 0x00007803; ++ PRER = 0x00001802; ++ // keypad wakeup (PKWR,PGSR3) should be in keypad.c ++ PGSR0 = 0x00000010; ++ PGSR1 = 0x02800000; ++ PGSR2 = 0x00040000; ++ PGSR3 = 0x00000008; ++ PCFR = PCFR_DC_EN | PCFR_FS | PCFR_FP | PCFR_OPDE; ++ PSLR = 0x05800f00; ++ ++#endif ++ pxa_set_ohci_info(&ezx_ohci_platform_data); ++ ++ platform_add_devices(devices, ARRAY_SIZE(devices)); ++ ++} ++ ++MACHINE_START(EZX, "Motorola Ezx Platform") ++ /* Maintainer: Harald Welte <laforge@gnumonks.org> */ ++ .phys_io = 0x40000000, ++ .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, ++ .boot_params = 0xa0000100, ++ .map_io = pxa_map_io, ++ .init_irq = a780_init_irq, ++ .timer = &pxa_timer, ++ .init_machine = a780_init, ++MACHINE_END +Index: linux-2.6.21/include/asm-arm/arch-pxa/ezx.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-2.6.21/include/asm-arm/arch-pxa/ezx.h 2007-04-26 20:27:42.000000000 -0300 +@@ -0,0 +1,225 @@ ++/* ++ * linux/include/asm-arm/arch-pxa/ezx.h ++ * ++ * Specific macro defines for Motorola Ezx Development Platform ++ * ++ * Author: Zhuang Xiaofan ++ * Created: Nov 25, 2003 ++ * Copyright: Motorola Inc. ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ */ ++ ++/* support E680 p3 and ealier PCB */ ++//#define E680_P3_AND_EARLY ++ ++#define GPIO_is_high(x) (GPLR(x) & GPIO_bit(x)) ++#define set_GPIO(x) (GPSR(x) = GPIO_bit(x)) ++#define clr_GPIO(x) (GPCR(x) = GPIO_bit(x)) ++ ++/* ++ * Flags in memory for sleep use ++ */ ++#define FLAG_ADDR PHYS_OFFSET ++#define RESUME_ADDR (PHYS_OFFSET + 4) ++#define BPSIG_ADDR (PHYS_OFFSET + 8) ++ ++#define USER_OFF_FLAG 0x5a5a5a5a ++#define SLEEP_FLAG 0x6b6b6b6b ++#define OFF_FLAG 0x7c7c7c7c ++#define REFLASH_FLAG 0x0C1D2E3F ++#define PASS_THRU_FLAG 0x12345678 ++ ++#define WDI_FLAG 0xbb00dead ++#define NO_FLAG 0xaa00dead ++ ++/* ++ * GPIO control pin, have to change when hardware lock down ++ */ ++ ++#ifdef E680_P3_AND_EARLY ++ ++/* shakehand with BP's PIN */ ++#define GPIO_BP_RDY 0 /* BP_RDY */ ++#define GPIO_BB_WDI 13 /* BB_WDI */ ++#define GPIO_BB_WDI2 3 /* BB_WDI2 */ ++#define GPIO_BB_RESET 57 /* BB_RESET */ ++#define GPIO_MCU_INT_SW 115 /* MCU_INT_SW */ ++#define GPIO_TC_MM_EN 89 /* TC_MM_EN */ ++ ++/* control PCAP direct PIN */ ++#define GPIO_WDI_AP 4 /* WDI_AP */ ++#define GPIO_SYS_RESTART 55 /* restart PCAP power */ ++#define GPIO_AP_STANDBY 28 /* make pcap enter standby mode */ ++ ++/* communicate with PCAP's PIN */ ++#define GPIO_PCAP_SEC_INT 1 /* PCAP interrupt PIN to AP */ ++#define GPIO_SPI_CLK 23 /* PCAP SPI port clock */ ++#define GPIO_SPI_CE 24 /* PCAP SPI port SSPFRM */ ++#define GPIO_SPI_MOSI 25 /* PCAP SPI port SSPTXD */ ++#define GPIO_SPI_MISO 26 /* PCAP SPI port SSPRXD */ ++ ++/* blue tooth control PIN */ ++#define GPIO_BT_WAKEUP 2 /* AP wake up bluetooth module */ ++#define GPIO_BT_HOSTWAKE 14 /* bluetooth module wake up Ap module */ ++#define GPIO_BT_RESET 56 /* AP reset bluetooth module */ ++ ++/* control LCD high - OFF low -- ON */ ++#define GPIO_LCD_OFF 116 /* control LCD */ ++ ++/* FFUART PIN */ ++#define GPIO_ICL_FFRXD_MD (34 | GPIO_ALT_FN_1_IN) ++#define GPIO_ICL_FFCTS_MD (35 | GPIO_ALT_FN_1_IN) ++#define GPIO_ICL_FFTXD_MD (39 | GPIO_ALT_FN_2_OUT) ++#define GPIO_ICL_FFRTS_MD (41 | GPIO_ALT_FN_2_OUT) ++ ++#elif defined(A780_P1_AND_EARLY) ++ ++/* shakehand with BP's PIN */ ++#define GPIO_BP_RDY 0 /* BP_RDY */ ++#define GPIO_BB_WDI 13 /* BB_WDI */ ++#define GPIO_BB_WDI2 3 /* BB_WDI2 */ ++#define GPIO_BB_RESET 82 /* BB_RESET */ ++#define GPIO_MCU_INT_SW 57 /* MCU_INT_SW */ ++#define GPIO_TC_MM_EN 89 /* TC_MM_EN */ ++ ++/* control PCAP direct PIN */ ++#define GPIO_WDI_AP 4 /* WDI_AP */ ++#define GPIO_SYS_RESTART 55 /* restart PCAP power */ ++#define GPIO_AP_STANDBY 28 /* make pcap enter standby mode */ ++ ++/* communicate with PCAP's PIN */ ++#define GPIO_PCAP_SEC_INT 1 /* PCAP interrupt PIN to AP */ ++#define GPIO_SPI_CLK 29 /* PCAP SPI port clock */ ++#define GPIO_SPI_CE 24 /* PCAP SPI port SSPFRM */ ++#define GPIO_SPI_MOSI 25 /* PCAP SPI port SSPTXD */ ++#define GPIO_SPI_MISO 26 /* PCAP SPI port SSPRXD */ ++ ++/* blue tooth control PIN */ ++#define GPIO_BT_WAKEUP 2 /* AP wake up bluetooth module */ ++#define GPIO_BT_HOSTWAKE 14 /* bluetooth module wake up Ap module */ ++#define GPIO_BT_RESET 56 /* AP reset bluetooth module */ ++ ++/* control LCD high - OFF low -- ON */ ++#define GPIO_LCD_OFF 116 /* control LCD */ ++ ++/* FFUART PIN */ ++#define GPIO_ICL_FFRXD_MD (53 | GPIO_ALT_FN_1_IN) ++#define GPIO_ICL_FFCTS_MD (35 | GPIO_ALT_FN_1_IN) ++#define GPIO_ICL_FFTXD_MD (39 | GPIO_ALT_FN_2_OUT) ++#define GPIO_ICL_FFRTS_MD (41 | GPIO_ALT_FN_2_OUT) ++ ++#else ++ ++/* shakehand with BP's PIN */ ++#define GPIO_BP_RDY 0 /* BP_RDY */ ++#define GPIO_BB_WDI 13 /* BB_WDI */ ++#define GPIO_BB_WDI2 3 /* BB_WDI2 */ ++#define GPIO_BB_RESET 82 /* BB_RESET */ ++#define GPIO_MCU_INT_SW 57 /* MCU_INT_SW */ ++#define GPIO_TC_MM_EN 99 /* TC_MM_EN */ ++ ++/* control PCAP direct PIN */ ++#define GPIO_WDI_AP 4 /* WDI_AP */ ++#define GPIO_SYS_RESTART 55 /* restart PCAP power */ ++//#define GPIO_AP_STANDBY 28 /* make pcap enter standby mode */ ++ ++/* communicate with PCAP's PIN */ ++#define GPIO_PCAP_SEC_INT 1 /* PCAP interrupt PIN to AP */ ++#define GPIO_SPI_CLK 29 /* PCAP SPI port clock */ ++#define GPIO_SPI_CE 24 /* PCAP SPI port SSPFRM */ ++#define GPIO_SPI_MOSI 25 /* PCAP SPI port SSPTXD */ ++#define GPIO_SPI_MISO 26 /* PCAP SPI port SSPRXD */ ++ ++/* blue tooth control PIN */ ++#define GPIO_BT_WAKEUP 28 /* AP wake up bluetooth module */ ++#define GPIO_BT_HOSTWAKE 14 /* AP wake up bluetooth module */ ++#define GPIO_BT_RESET 48 /* AP reset bluetooth module */ ++ ++/* control LCD high - OFF low -- ON */ ++#define GPIO_LCD_OFF 116 /* control LCD */ ++ ++/* FFUART PIN */ ++#define GPIO_ICL_FFRXD_MD (53 | GPIO_ALT_FN_1_IN) ++#define GPIO_ICL_FFCTS_MD (35 | GPIO_ALT_FN_1_IN) ++#define GPIO_ICL_FFTXD_MD (39 | GPIO_ALT_FN_2_OUT) ++#define GPIO_ICL_FFRTS_MD (41 | GPIO_ALT_FN_2_OUT) ++ ++#endif ++/* ++ * ezx platform, wake up source edge detect bit ++ */ ++#define PEDR_INT_SEC 1 ++ ++#define GPIO_FLIP_PIN 12 ++/*E680 screen lock button*/ ++ ++#define GPIO_LOCK_SCREEN_PIN GPIO_FLIP_PIN ++ ++/* MMC interface */ ++#define GPIO_MMC_DETECT 11 ++#define GPIO_MMC_CLK 32 ++#define GPIO_MMC_DATA0 92 ++#define GPIO_MMC_WP 107 ++#define GPIO_MMC_DATA1 109 ++#define GPIO_MMC_DATA2 110 ++#define GPIO_MMC_DATA3 111 ++#define GPIO_MMC_CMD 112 ++ ++/* interface function */ ++#define GPIO_MMC_CLK_MD (GPIO_MMC_CLK | GPIO_ALT_FN_2_OUT) ++#define GPIO_MMC_DATA0_MD (GPIO_MMC_DATA0 | GPIO_ALT_FN_1_IN | GPIO_ALT_FN_1_OUT) ++#define GPIO_MMC_DATA1_MD (GPIO_MMC_DATA1 | GPIO_ALT_FN_1_IN | GPIO_ALT_FN_1_OUT) ++#define GPIO_MMC_DATA2_MD (GPIO_MMC_DATA2 | GPIO_ALT_FN_1_IN | GPIO_ALT_FN_1_OUT) ++#define GPIO_MMC_DATA3_MD (GPIO_MMC_DATA3 | GPIO_ALT_FN_1_IN | GPIO_ALT_FN_1_OUT) ++ ++#define GPIO_MMC_CMD_MD (GPIO_MMC_CMD | GPIO_ALT_FN_1_IN | GPIO_ALT_FN_1_OUT) ++ ++/* EMU GPIO 119 ---MUX2 120 --- MUX1 */ ++#define GPIO_EMU_MUX1 120 ++#define GPIO_EMU_MUX2 119 ++#define GPIO_SNP_INT_CTL 86 ++#define GPIO_SNP_INT_IN 87 ++ ++ ++/* audio related pins */ ++#define AP_13MHZ_OUTPUT_PIN 9 ++ ++#ifdef CONFIG_ARCH_EZX_E680 ++#define GPIO_VA_SEL_BUL 79 ++#define GPIO_FLT_SEL_BUL 80 /* out filter select pin */ ++#define GPIO_MIDI_RESET 78 /* GPIO used by MIDI chipset */ ++#define GPIO_MIDI_CS 33 ++#define GPIO_MIDI_IRQ 15 ++#define GPIO_MIDI_NPWE 49 ++#define GPIO_MIDI_RDY 18 ++#endif ++ ++#ifdef CONFIG_ARCH_EZX_A780 ++#define GPIO_HW_ATTENUATE_A780 96 /* hw noise attenuation be used or bypassed, for receiver or louderspeaker mode */ ++#endif ++ ++ ++/* bp status pin */ ++#define GPIO_BP_STATE 41 ++ ++/* define usb related pin */ ++#define GPIO34_TXENB 34 ++#define GPIO35_XRXD 35 ++#define GPIO36_VMOUT 36 ++#define GPIO39_VPOUT 39 ++#define GPIO40_VPIN 40 ++#define GPIO53_VMIN 53 ++ ++/* USB client 6 pin defination */ ++#define GPIO34_TXENB_MD (GPIO34_TXENB | GPIO_ALT_FN_1_OUT) ++#define GPIO35_XRXD_MD (GPIO35_XRXD | GPIO_ALT_FN_2_IN ) ++#define GPIO36_VMOUT_MD (GPIO36_VMOUT | GPIO_ALT_FN_1_OUT) ++#define GPIO39_VPOUT_MD (GPIO39_VPOUT | GPIO_ALT_FN_1_OUT) ++#define GPIO40_VPIN_MD (GPIO40_VPIN | GPIO_ALT_FN_3_IN ) ++#define GPIO53_VMIN_MD (GPIO53_VMIN | GPIO_ALT_FN_2_IN ) ++ ++#define GPIO53_FFRXD_MD (53 | GPIO_ALT_FN_1_IN) ++ +Index: linux-2.6.21/include/asm-arm/arch-pxa/pxa-regs.h +=================================================================== +--- linux-2.6.21.orig/include/asm-arm/arch-pxa/pxa-regs.h 2007-04-26 00:08:32.000000000 -0300 ++++ linux-2.6.21/include/asm-arm/arch-pxa/pxa-regs.h 2007-04-26 20:28:45.000000000 -0300 +@@ -849,6 +849,8 @@ + #define UP2OCR_HXOE (1 << 17) /* Host Port 2 Transceiver Output Enable */ + #define UP2OCR_SEOS (1 << 24) /* Single-Ended Output Select */ + ++#define UP3OCR __REG(0x40600024) /* USB Port 3 Output Control register */ ++ + #define UDCCSN(x) __REG2(0x40600100, (x) << 2) + #define UDCCSR0 __REG(0x40600100) /* UDC Control/Status register - Endpoint 0 */ + #define UDCCSR0_SA (1 << 7) /* Setup Active */ +@@ -1252,6 +1254,7 @@ + #define GPIO33_nCS_5 33 /* chip select 5 */ + #define GPIO34_FFRXD 34 /* FFUART receive */ + #define GPIO34_MMCCS0 34 /* MMC Chip Select 0 */ ++#define GPIO34_USB_P2_2 34 /* USB Port2 Pin 2 */ + #define GPIO35_FFCTS 35 /* FFUART Clear to send */ + #define GPIO36_FFDCD 36 /* FFUART Data carrier detect */ + #define GPIO37_FFDSR 37 /* FFUART data set ready */ +@@ -1365,6 +1368,7 @@ + #define GPIO18_RDY_MD (18 | GPIO_ALT_FN_1_IN) + #define GPIO19_DREQ1_MD (19 | GPIO_ALT_FN_1_IN) + #define GPIO20_DREQ0_MD (20 | GPIO_ALT_FN_1_IN) ++#define GPIO22_SCLK2_MD (22 | GPIO_ALT_FN_3_IN) + #define GPIO23_SCLK_MD (23 | GPIO_ALT_FN_2_OUT) + #define GPIO24_SFRM_MD (24 | GPIO_ALT_FN_2_OUT) + #define GPIO25_STXD_MD (25 | GPIO_ALT_FN_2_OUT) +@@ -1375,23 +1379,33 @@ + #define GPIO28_BITCLK_OUT_I2S_MD (28 | GPIO_ALT_FN_1_OUT) + #define GPIO29_SDATA_IN_AC97_MD (29 | GPIO_ALT_FN_1_IN) + #define GPIO29_SDATA_IN_I2S_MD (29 | GPIO_ALT_FN_2_IN) ++#define GPIO29_SCLK_MD (29 | GPIO_ALT_FN_3_IN) + #define GPIO30_SDATA_OUT_AC97_MD (30 | GPIO_ALT_FN_2_OUT) + #define GPIO30_SDATA_OUT_I2S_MD (30 | GPIO_ALT_FN_1_OUT) ++#define GPIO30_USB_P3_2 (30 | GPIO_ALT_FN_3_OUT) + #define GPIO31_SYNC_I2S_MD (31 | GPIO_ALT_FN_1_OUT) + #define GPIO31_SYNC_AC97_MD (31 | GPIO_ALT_FN_2_OUT) ++#define GPIO31_USB_P3_6 (31 | GPIO_ALT_FN_3_OUT) + #define GPIO32_SDATA_IN1_AC97_MD (32 | GPIO_ALT_FN_1_IN) + #define GPIO32_SYSCLK_I2S_MD (32 | GPIO_ALT_FN_1_OUT) + #define GPIO32_MMCCLK_MD ( 32 | GPIO_ALT_FN_2_OUT) + #define GPIO33_nCS_5_MD (33 | GPIO_ALT_FN_2_OUT) + #define GPIO34_FFRXD_MD (34 | GPIO_ALT_FN_1_IN) + #define GPIO34_MMCCS0_MD (34 | GPIO_ALT_FN_2_OUT) ++#define GPIO34_USB_P2_2_MD (34 | GPIO_ALT_FN_1_OUT) + #define GPIO35_FFCTS_MD (35 | GPIO_ALT_FN_1_IN) ++#define GPIO35_USB_P2_1_MD (35 | GPIO_ALT_FN_2_IN) + #define GPIO36_FFDCD_MD (36 | GPIO_ALT_FN_1_IN) ++#define GPIO36_USB_P2_4_MD (36 | GPIO_ALT_FN_1_OUT) + #define GPIO37_FFDSR_MD (37 | GPIO_ALT_FN_1_IN) ++#define GPIO37_SFRM2_MD (37 | GPIO_ALT_FN_2_IN) + #define GPIO38_FFRI_MD (38 | GPIO_ALT_FN_1_IN) ++#define GPIO38_STXD2_MD (38 | GPIO_ALT_FN_2_OUT) + #define GPIO39_MMCCS1_MD (39 | GPIO_ALT_FN_1_OUT) + #define GPIO39_FFTXD_MD (39 | GPIO_ALT_FN_2_OUT) ++#define GPIO39_USB_P2_6_MD (39 | GPIO_ALT_FN_1_OUT) + #define GPIO40_FFDTR_MD (40 | GPIO_ALT_FN_2_OUT) ++#define GPIO40_USB_P2_5_MD (40 | GPIO_ALT_FN_3_IN) + #define GPIO41_FFRTS_MD (41 | GPIO_ALT_FN_2_OUT) + #define GPIO42_BTRXD_MD (42 | GPIO_ALT_FN_1_IN) + #define GPIO42_HWRXD_MD (42 | GPIO_ALT_FN_3_IN) +@@ -1416,13 +1430,17 @@ + #define GPIO51_HWRTS_MD (51 | GPIO_ALT_FN_1_OUT) + #define GPIO51_nPIOW_MD (51 | GPIO_ALT_FN_2_OUT) + #define GPIO52_nPCE_1_MD (52 | GPIO_ALT_FN_2_OUT) ++#define GPIO52_SCLK3_MD (52 | GPIO_ALT_FN_2_OUT) + #define GPIO53_nPCE_2_MD (53 | GPIO_ALT_FN_2_OUT) + #define GPIO53_MMCCLK_MD (53 | GPIO_ALT_FN_1_OUT) ++#define GPIO53_FFRXD_MD (53 | GPIO_ALT_FN_1_IN) ++#define GPIO53_USB_P2_3_MD (53 | GPIO_ALT_FN_2_IN) + #define GPIO54_MMCCLK_MD (54 | GPIO_ALT_FN_1_OUT) + #define GPIO54_nPCE_2_MD (54 | GPIO_ALT_FN_2_OUT) + #define GPIO54_pSKTSEL_MD (54 | GPIO_ALT_FN_2_OUT) + #define GPIO55_nPREG_MD (55 | GPIO_ALT_FN_2_OUT) + #define GPIO56_nPWAIT_MD (56 | GPIO_ALT_FN_1_IN) ++#define GPIO56_USB_P3_4 (56 | GPIO_ALT_FN_1_OUT) + #define GPIO57_nIOIS16_MD (57 | GPIO_ALT_FN_1_IN) + #define GPIO58_LDD_0_MD (58 | GPIO_ALT_FN_2_OUT) + #define GPIO59_LDD_1_MD (59 | GPIO_ALT_FN_2_OUT) +@@ -1458,13 +1476,19 @@ + #define GPIO80_nCS_4_MD (80 | GPIO_ALT_FN_2_OUT) + #define GPIO81_NSSP_CLK_OUT (81 | GPIO_ALT_FN_1_OUT) + #define GPIO81_NSSP_CLK_IN (81 | GPIO_ALT_FN_1_IN) ++#define GPIO81_STXD3_MD (81 | GPIO_ALT_FN_1_OUT) + #define GPIO82_NSSP_FRM_OUT (82 | GPIO_ALT_FN_1_OUT) + #define GPIO82_NSSP_FRM_IN (82 | GPIO_ALT_FN_1_IN) + #define GPIO83_NSSP_TX (83 | GPIO_ALT_FN_1_OUT) + #define GPIO83_NSSP_RX (83 | GPIO_ALT_FN_2_IN) ++#define GPIO83_SFRM3_MD (83 | GPIO_ALT_FN_1_IN) + #define GPIO84_NSSP_TX (84 | GPIO_ALT_FN_1_OUT) + #define GPIO84_NSSP_RX (84 | GPIO_ALT_FN_2_IN) + #define GPIO85_nPCE_1_MD (85 | GPIO_ALT_FN_1_OUT) ++#define GPIO88_SRXD2_MD (88 | GPIO_ALT_FN_2_IN) ++#define GPIO89_SRXD3_MD (89 | GPIO_ALT_FN_1_IN) ++#define GPIO90_USB_P3_5 (90 | GPIO_ALT_FN_2_IN) ++#define GPIO91_USB_P3_1 (91 | GPIO_ALT_FN_2_IN) + #define GPIO92_MMCDAT0_MD (92 | GPIO_ALT_FN_1_OUT) + #define GPIO102_nPCE_1_MD (102 | GPIO_ALT_FN_1_OUT) + #define GPIO104_pSKTSEL_MD (104 | GPIO_ALT_FN_1_OUT) +@@ -1476,6 +1500,7 @@ + #define GPIO112_MMCCMD_MD (112 | GPIO_ALT_FN_1_OUT) + #define GPIO113_I2S_SYSCLK_MD (113 | GPIO_ALT_FN_1_OUT) + #define GPIO113_AC97_RESET_N_MD (113 | GPIO_ALT_FN_2_OUT) ++#define GPIO113_USB_P3_3 (113 | GPIO_ALT_FN_3_IN) + #define GPIO117_I2CSCL_MD (117 | GPIO_ALT_FN_1_IN) + #define GPIO118_I2CSDA_MD (118 | GPIO_ALT_FN_1_IN) + +@@ -1491,6 +1516,7 @@ + #define PFER __REG(0x40F00014) /* Power Manager GPIO Falling-Edge Detect Enable Register */ + #define PEDR __REG(0x40F00018) /* Power Manager GPIO Edge Detect Status Register */ + #define PCFR __REG(0x40F0001C) /* Power Manager General Configuration Register */ ++#define PGSR(x) (__REG(0x40F00020 + ((unsigned long)(x)/32*4))) + #define PGSR0 __REG(0x40F00020) /* Power Manager GPIO Sleep State Register for GP[31-0] */ + #define PGSR1 __REG(0x40F00024) /* Power Manager GPIO Sleep State Register for GP[63-32] */ + #define PGSR2 __REG(0x40F00028) /* Power Manager GPIO Sleep State Register for GP[84-64] */ +Index: linux-2.6.21/arch/arm/boot/compressed/head.S +=================================================================== +--- linux-2.6.21.orig/arch/arm/boot/compressed/head.S 2007-04-26 00:08:32.000000000 -0300 ++++ linux-2.6.21/arch/arm/boot/compressed/head.S 2007-04-26 20:27:42.000000000 -0300 +@@ -117,6 +117,9 @@ + mov r0, r0 + .endr + ++ mov r1, #0x300 @ mach_id 0x363 is official EZX ++ orr r1, r1, #0x63 @ bootloader JUMP doesn't set r1 ++ + b 1f + .word 0x016f2818 @ Magic numbers to help the loader + .word start @ absolute load/run zImage address +Index: linux-2.6.21/include/asm-arm/arch-pxa/uncompress.h +=================================================================== +--- linux-2.6.21.orig/include/asm-arm/arch-pxa/uncompress.h 2007-04-26 00:08:32.000000000 -0300 ++++ linux-2.6.21/include/asm-arm/arch-pxa/uncompress.h 2007-04-26 20:27:42.000000000 -0300 +@@ -14,14 +14,14 @@ + #define STUART ((volatile unsigned long *)0x40700000) + #define HWUART ((volatile unsigned long *)0x41600000) + +-#define UART FFUART ++#define UART STUART + + + static inline void putc(char c) + { +- while (!(UART[5] & 0x20)) ++/* while (!(UART[5] & 0x40)) + barrier(); +- UART[0] = c; ++ UART[0] = c;*/ + } + + /* +Index: linux-2.6.21/arch/arm/mach-pxa/ezx_ssp.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-2.6.21/arch/arm/mach-pxa/ezx_ssp.c 2007-04-26 20:27:42.000000000 -0300 +@@ -0,0 +1,126 @@ ++/* ++ * SSP control code for Motorola EZX phones ++ * ++ * Copyright (c) 2007 Daniel Ribeiro <drwyrm@gmail.com> ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ * ++ */ ++ ++#include <linux/module.h> ++#include <linux/init.h> ++#include <linux/kernel.h> ++#include <linux/sched.h> ++#include <linux/slab.h> ++#include <linux/delay.h> ++#include <linux/platform_device.h> ++#include <asm/hardware.h> ++#include <asm/mach-types.h> ++ ++#include <asm/arch/ssp.h> ++#include <asm/arch/pxa-regs.h> ++ ++#include "ezx.h" ++ ++static DEFINE_SPINLOCK(ezx_ssp_lock); ++static struct ssp_dev ezx_ssp_dev; ++static struct ssp_state ezx_ssp_state; ++static struct ezxssp_machinfo *ssp_machinfo; ++ ++/* PCAP */ ++unsigned long ezx_ssp_pcap_putget(ulong data) ++{ ++ unsigned long flag; ++ u32 ret = 0; ++ ++ spin_lock_irqsave(&ezx_ssp_lock, flag); ++ if (ssp_machinfo->cs_pcap >= 0) ++ GPCR(ssp_machinfo->cs_pcap) = GPIO_bit(ssp_machinfo->cs_pcap); ++ ++ ssp_write_word(&ezx_ssp_dev,data); ++ ssp_read_word(&ezx_ssp_dev, &ret); ++ ++ if (ssp_machinfo->cs_pcap >= 0) ++ GPSR(ssp_machinfo->cs_pcap) = GPIO_bit(ssp_machinfo->cs_pcap); ++ spin_unlock_irqrestore(&ezx_ssp_lock, flag); ++ ++ return ret; ++} ++EXPORT_SYMBOL(ezx_ssp_pcap_putget); ++ ++void __init ezx_ssp_set_machinfo(struct ezxssp_machinfo *machinfo) ++{ ++ ssp_machinfo = machinfo; ++} ++ ++static int __init ezx_ssp_probe(struct platform_device *dev) ++{ ++ int ret; ++ /* PCAP init */ ++ pxa_gpio_mode(29|GPIO_ALT_FN_3_OUT); ++ pxa_gpio_mode(GPIO24_SFRM_MD); ++ pxa_gpio_mode(GPIO25_STXD_MD); ++ pxa_gpio_mode(GPIO26_SRXD_MD); ++ ++ /* Chip Select - Disable All */ ++ if (ssp_machinfo->cs_pcap >= 0) ++ pxa_gpio_mode(ssp_machinfo->cs_pcap | GPIO_OUT | GPIO_DFLT_HIGH); ++ ++ ret = ssp_init(&ezx_ssp_dev, ssp_machinfo->port, 0); ++ ++ if (ret) ++ printk(KERN_ERR "Unable to register SSP handler!\n"); ++ else { ++ ssp_disable(&ezx_ssp_dev); ++ ssp_config(&ezx_ssp_dev, ++ (SSCR0_Motorola | SSCR0_DataSize(16) | SSCR0_EDSS), ++ (SSCR1_TxTresh(1) | SSCR1_RxTresh(1)), ++ 0, SSCR0_SerClkDiv(ssp_machinfo->clk_pcap)); ++ ssp_enable(&ezx_ssp_dev); ++ } ++ ++ return ret; ++} ++ ++static int ezx_ssp_remove(struct platform_device *dev) ++{ ++ ssp_exit(&ezx_ssp_dev); ++ return 0; ++} ++ ++static int ezx_ssp_suspend(struct platform_device *dev, pm_message_t state) ++{ ++ ssp_flush(&ezx_ssp_dev); ++ ssp_save_state(&ezx_ssp_dev,&ezx_ssp_state); ++ ++ return 0; ++} ++ ++static int ezx_ssp_resume(struct platform_device *dev) ++{ ++ if (ssp_machinfo->cs_pcap >= 0) ++ GPSR(ssp_machinfo->cs_pcap) = GPIO_bit(ssp_machinfo->cs_pcap); ++ ssp_restore_state(&ezx_ssp_dev,&ezx_ssp_state); ++ ssp_enable(&ezx_ssp_dev); ++ ++ return 0; ++} ++ ++static struct platform_driver ezxssp_driver = { ++ .probe = ezx_ssp_probe, ++ .remove = ezx_ssp_remove, ++ .suspend = ezx_ssp_suspend, ++ .resume = ezx_ssp_resume, ++ .driver = { ++ .name = "ezx-ssp", ++ }, ++}; ++ ++int __init ezx_ssp_init(void) ++{ ++ return platform_driver_register(&ezxssp_driver); ++} ++ ++arch_initcall(ezx_ssp_init); +Index: linux-2.6.21/arch/arm/mach-pxa/ezx.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-2.6.21/arch/arm/mach-pxa/ezx.h 2007-04-26 20:27:42.000000000 -0300 +@@ -0,0 +1,9 @@ ++#include <asm/arch/ezx.h> ++ ++/* SSP */ ++struct ezxssp_machinfo { ++ int port; ++ int cs_pcap; ++ int clk_pcap; ++}; ++ +Index: linux-2.6.21/arch/arm/mach-pxa/ezx_lcd.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-2.6.21/arch/arm/mach-pxa/ezx_lcd.c 2007-04-26 20:27:42.000000000 -0300 +@@ -0,0 +1,112 @@ ++/* ++ * linux/arch/arm/mach-ezx/a780.c ++ * ++ * Support for the Motorola Ezx A780 Development Platform. ++ * ++ * Author: Zhuang Xiaofan ++ * Created: Nov 25, 2003 ++ * Copyright: Motorola Inc. ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ */ ++ ++#include <linux/fb.h> ++#include <linux/delay.h> ++#include <asm/arch/pxafb.h> ++#include <asm/arch/pxa-regs.h> ++ ++/* ++ * EZX PXA Framebuffer ++ */ ++ ++static void pxafb_lcd_power(int on, struct fb_var_screeninfo *var) ++{ ++ if (on) { ++// mdelay(1); ++ GPSR3 = 0x00100000; ++ mdelay(10); ++ GPCR3 = 0x00100000; ++ GPDR3 |= 0x00100000; ++ } else { ++ GPSR3 = 0x00100000; ++ PGSR3 |= 0x00100000; ++ mdelay(41); ++ LCCR0 &= ~LCCR0_LDM; /* disable lcd disable done interrupt */ ++ LCCR0 |= LCCR0_DIS; /* normal disable lcd */ ++ mdelay(18); ++ } ++} ++ ++#ifdef CONFIG_PXA_E2 ++static void sumatra_backlight_power(int on) ++{ ++ if (on) { ++ pxa_gpio_mode(GPIO16_PWM0_MD); ++ pxa_set_cken(CKEN0_PWM0, 1); ++ PWM_CTRL0 = 0; ++ PWM_PWDUTY0 = 0x3ff; ++ PWM_PERVAL0 = 0x3ff; ++ } else { ++ PWM_CTRL0 = 0; ++ PWM_PWDUTY0 = 0x0; ++ PWM_PERVAL0 = 0x3FF; ++ pxa_set_cken(CKEN0_PWM0, 0); ++ } ++} ++ ++static struct pxafb_mode_info mode_ezx = { ++ .pixclock = 192308, ++ .xres = 240, ++ .yres = 320, ++ .bpp = 8, ++ .hsync_len = 10, ++ .left_margin = 20, ++ .right_margin = 10, ++ .vsync_len = 2, ++ .upper_margin = 3, ++ .lower_margin = 2, ++ .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, ++}; ++ ++static struct pxafb_mach_info ezx_fb_info __initdata = { ++ .modes = &mode_ezx, ++ .num_modes = 1, ++ .lccr0 = 0x022008B8, ++ .lccr3 = 0xC130FF13, ++ .pxafb_backlight_power = sumatra_backlight_power, ++ .pxafb_lcd_power = &pxafb_lcd_power, ++}; ++ ++#else ++static struct pxafb_mode_info mode_ezx = { ++ .pixclock = 150000, ++ .xres = 240, ++ .yres = 320, ++ .bpp = 16, ++ .hsync_len = 10, ++ .left_margin = 20, ++ .right_margin = 10, ++ .vsync_len = 2, ++ .upper_margin = 3, ++ .lower_margin = 2, ++ .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, ++}; ++ ++static struct pxafb_mach_info ezx_fb_info __initdata = { ++ .modes = &mode_ezx, ++ .num_modes = 1, ++ .lccr0 = 0x002008F8, ++ .lccr3 = 0x0430FF09, ++ .pxafb_lcd_power= &pxafb_lcd_power, ++}; ++#endif ++ ++int __init __ezx_lcd_init (void) ++{ ++ set_pxa_fb_info(&ezx_fb_info); ++ return 0; ++} ++ ++arch_initcall(__ezx_lcd_init); +Index: linux-2.6.21/arch/arm/mm/init.c +=================================================================== +--- linux-2.6.21.orig/arch/arm/mm/init.c 2007-04-26 00:08:32.000000000 -0300 ++++ linux-2.6.21/arch/arm/mm/init.c 2007-04-26 20:27:42.000000000 -0300 +@@ -241,6 +241,10 @@ + */ + reserve_bootmem_node(pgdat, boot_pfn << PAGE_SHIFT, + boot_pages << PAGE_SHIFT); ++#ifdef CONFIG_ARCH_EZX ++ /* reserve the first page memory for exiting sleep and user off */ ++ reserve_bootmem_node(pgdat, PHYS_OFFSET, PAGE_SIZE); ++#endif + + #ifdef CONFIG_BLK_DEV_INITRD + /* diff --git a/packages/linux/linux-ezx-2.6.21/ezx-emu.patch b/packages/linux/linux-ezx-2.6.21/ezx-emu.patch new file mode 100644 index 0000000000..cb3bfc53e7 --- /dev/null +++ b/packages/linux/linux-ezx-2.6.21/ezx-emu.patch @@ -0,0 +1,300 @@ +Index: linux-2.6.20.7/arch/arm/mach-pxa/ezx-emu.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-2.6.20.7/arch/arm/mach-pxa/ezx-emu.c 2007-04-23 01:14:40.000000000 -0300 +@@ -0,0 +1,200 @@ ++/* ++ * EMU Driver for Motorola EZX phones ++ * ++ * Copyright (c) 2007 Daniel Ribeiro <drwyrm@gmail.com> ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ */ ++ ++#include <linux/kernel.h> ++#include <linux/interrupt.h> ++#include <linux/module.h> ++#include <linux/platform_device.h> ++ ++#include <asm/arch/hardware.h> ++#include <asm/arch/pxa-regs.h> ++#include <asm/arch/ezx.h> ++#include <asm/arch/ezx-pcap.h> ++#include <asm/arch/udc.h> ++ ++static struct pxa2xx_udc_mach_info ezx_udc_info; ++extern int ezx_pcap_bit_set(u_int32_t, u_int8_t); ++extern int ezx_pcap_read_bit(u_int32_t); ++ ++#if defined CONFIG_PXA_EZX_EMU_USB ++#define emu_switch_to_default() emu_switch_to_usb() ++#elif defined CONFIG_PXA_EZX_EMU_UART ++#define emu_switch_to_default() emu_switch_to_uart() ++#else ++#define emu_switch_to_default() emu_switch_to_nothing() ++#endif ++ ++void emu_switch_to_usb(void) ++{ ++ pxa_gpio_mode(GPIO34_USB_P2_2_MD); ++ pxa_gpio_mode(GPIO35_USB_P2_1_MD); ++ pxa_gpio_mode(GPIO36_USB_P2_4_MD); ++ pxa_gpio_mode(GPIO39_USB_P2_6_MD); ++ pxa_gpio_mode(GPIO40_USB_P2_5_MD); ++ pxa_gpio_mode(GPIO53_USB_P2_3_MD); ++ UP2OCR = 0x02000000; ++ ezx_pcap_bit_set(SSP_PCAP_ADJ_BIT_BUSCTRL_RS232ENB, 1); ++ ezx_pcap_bit_set(SSP_PCAP_ADJ_BIT_BUSCTRL_FSENB, 0); ++ ezx_pcap_bit_set(SSP_PCAP_ADJ_BIT_BUSCTRL_VUSB_EN, 1); ++ clr_GPIO(GPIO_EMU_MUX1); ++ clr_GPIO(GPIO_EMU_MUX2); ++} ++ ++void emu_switch_to_uart(void) ++{ ++ ezx_pcap_bit_set(SSP_PCAP_ADJ_BIT_BUSCTRL_VUSB_EN,0); ++ ezx_pcap_bit_set(SSP_PCAP_ADJ_BIT_BUSCTRL_RS232ENB, 0); ++ ezx_pcap_bit_set(SSP_PCAP_ADJ_BIT_BUSCTRL_RS232_DIR, 1); ++ set_GPIO(GPIO39_FFTXD); ++ pxa_gpio_mode(GPIO34_TXENB | GPIO_OUT); ++ set_GPIO(GPIO34_TXENB); ++ pxa_gpio_mode(GPIO35_XRXD | GPIO_IN); ++ pxa_gpio_mode(GPIO36_VMOUT | GPIO_IN); ++ pxa_gpio_mode(GPIO40_VPIN | GPIO_IN); ++ pxa_gpio_mode(GPIO39_FFTXD_MD); ++ pxa_gpio_mode(GPIO53_FFRXD_MD); ++ CKEN |= CKEN6_FFUART; ++ clr_GPIO(GPIO_EMU_MUX1); ++ clr_GPIO(GPIO_EMU_MUX2); ++ ++} ++ ++void emu_switch_to_audio(int stereo) ++{ ++ clr_GPIO(GPIO39_VPOUT); ++ if (stereo) { ++ pxa_gpio_mode(GPIO34_TXENB | GPIO_IN); ++ clr_GPIO(GPIO39_VPOUT); ++ } else { ++ pxa_gpio_mode(GPIO34_TXENB | GPIO_OUT); ++ set_GPIO(GPIO34_TXENB); ++ } ++ ++ pxa_gpio_mode(GPIO35_XRXD | GPIO_IN); ++ pxa_gpio_mode(GPIO36_VMOUT | GPIO_IN); ++ pxa_gpio_mode(GPIO39_VPOUT | GPIO_IN); ++ pxa_gpio_mode(GPIO40_VPIN | GPIO_IN); ++ pxa_gpio_mode(GPIO53_VMIN | GPIO_IN); ++ set_GPIO(GPIO_EMU_MUX1); ++ if (stereo) ++ set_GPIO(GPIO_EMU_MUX2); ++ else ++ clr_GPIO(GPIO_EMU_MUX2); ++} ++ ++void emu_switch_to_nothing(void) ++{ ++ ezx_pcap_bit_set(SSP_PCAP_ADJ_BIT_BUSCTRL_VUSB_EN, 0); ++ ezx_pcap_bit_set(SSP_PCAP_ADJ_BIT_BUSCTRL_RS232ENB, 1); ++ pxa_gpio_mode(GPIO34_TXENB | GPIO_OUT); ++ set_GPIO(GPIO34_TXENB); ++ pxa_gpio_mode(GPIO35_XRXD | GPIO_IN); ++ pxa_gpio_mode(GPIO36_VMOUT | GPIO_IN); ++ pxa_gpio_mode(GPIO39_VPOUT | GPIO_IN); ++ pxa_gpio_mode(GPIO40_VPIN | GPIO_IN); ++ pxa_gpio_mode(GPIO53_VMIN | GPIO_IN); ++} ++ ++ ++static irqreturn_t emu_irq(int irq, void *data) ++{ ++ switch (irq) { ++ case EZX_IRQ_USB4V: ++ if(ezx_pcap_read_bit(SSP_PCAP_ADJ_BIT_PSTAT_USBDET_4V)) ++ emu_switch_to_default(); ++ break; ++ case EZX_IRQ_USB1V: ++ if(!ezx_pcap_read_bit(SSP_PCAP_ADJ_BIT_PSTAT_USBDET_1V)) ++ emu_switch_to_nothing(); ++ break; ++ } ++ ++ return IRQ_HANDLED; ++} ++ ++static int __init ezx_emu_probe(struct platform_device *dev) ++{ ++ pxa_gpio_mode(GPIO_SNP_INT_IN | GPIO_IN); ++ pxa_gpio_mode(GPIO_EMU_MUX1 | GPIO_OUT); ++ pxa_gpio_mode(GPIO_EMU_MUX2 | GPIO_OUT); ++ ++ request_irq(EZX_IRQ_USB4V, &emu_irq, SA_INTERRUPT, "usb 4v", NULL); ++ request_irq(EZX_IRQ_USB1V, &emu_irq, SA_INTERRUPT, "usb 1v", NULL); ++ ++ pxa_set_udc_info(&ezx_udc_info); ++ ++ emu_switch_to_default(); ++ ++ return 0; ++} ++ ++static int ezx_emu_remove(struct platform_device *dev) ++{ ++ free_irq(EZX_IRQ_USB4V, NULL); ++ free_irq(EZX_IRQ_USB1V, NULL); ++ ++ return 0; ++} ++ ++/* USB Device Controller */ ++static int udc_connected_status; ++static void ezx_udc_command(int cmd) ++{ ++ switch (cmd) { ++ case PXA2XX_UDC_CMD_DISCONNECT: ++ printk(KERN_NOTICE "USB cmd disconnect\n"); ++ ezx_pcap_bit_set(SSP_PCAP_ADJ_BIT_BUSCTRL_USB_PU,0); ++ udc_connected_status = 0; ++ break; ++ case PXA2XX_UDC_CMD_CONNECT: ++ printk(KERN_NOTICE "USB cmd connect\n"); ++ ezx_pcap_bit_set(SSP_PCAP_ADJ_BIT_BUSCTRL_USB_PU,1); ++ udc_connected_status = 1; ++ break; ++ } ++} ++ ++static int ezx_udc_is_connected(void) ++{ ++ return udc_connected_status; ++} ++ ++static struct pxa2xx_udc_mach_info ezx_udc_info __initdata = { ++ .udc_is_connected = ezx_udc_is_connected, ++ .udc_command = ezx_udc_command, ++}; ++ ++static struct platform_driver ezxemu_driver = { ++ .probe = ezx_emu_probe, ++ .remove = ezx_emu_remove, ++ //.suspend = ezx_emu_suspend, ++ //.resume = ezx_emu_resume, ++ .driver = { ++ .name = "ezx-emu", ++ .owner = THIS_MODULE, ++ }, ++}; ++ ++int __init ezx_emu_init(void) ++{ ++ return platform_driver_register(&ezxemu_driver); ++} ++ ++void ezx_emu_fini(void) ++{ ++ return platform_driver_unregister(&ezxemu_driver); ++} ++ ++module_init(ezx_emu_init); ++module_exit(ezx_emu_fini); ++ ++MODULE_DESCRIPTION("Motorola Enchanced Mini Usb driver"); ++MODULE_AUTHOR("Daniel Ribeiro <drwyrm@gmail.com>"); ++MODULE_LICENSE("GPL"); +Index: linux-2.6.20.7/arch/arm/mach-pxa/Kconfig +=================================================================== +--- linux-2.6.20.7.orig/arch/arm/mach-pxa/Kconfig 2007-04-22 15:02:54.000000000 -0300 ++++ linux-2.6.20.7/arch/arm/mach-pxa/Kconfig 2007-04-22 15:23:10.000000000 -0300 +@@ -94,6 +94,27 @@ + + endchoice + ++config PXA_EZX_EMU ++ bool "Motorola Enchanced Mini Usb" ++ ++if PXA_EZX_EMU ++ ++choice ++ prompt "Select default EMU mode" ++ ++config PXA_EZX_EMU_USB ++ bool "USB" ++ ++config PXA_EZX_EMU_UART ++ bool "UART" ++ ++config PXA_EZX_EMU_NOTHING ++ bool "nothing" ++ ++endchoice ++ ++endif ++ + endif + + endmenu +Index: linux-2.6.20.7/arch/arm/mach-pxa/Makefile +=================================================================== +--- linux-2.6.20.7.orig/arch/arm/mach-pxa/Makefile 2007-04-22 15:23:01.000000000 -0300 ++++ linux-2.6.20.7/arch/arm/mach-pxa/Makefile 2007-04-22 15:23:10.000000000 -0300 +@@ -19,6 +19,7 @@ + obj-$(CONFIG_MACH_POODLE) += poodle.o corgi_ssp.o + obj-$(CONFIG_MACH_TOSA) += tosa.o + obj-$(CONFIG_PXA_EZX) += ezx.o ezx_lcd.o ezx_ssp.o ezx-pcap.o ezx-mci.o ++obj-$(CONFIG_PXA_EZX_EMU) += ezx-emu.o + + # Support for blinky lights + led-y := leds.o +Index: linux-2.6.20.7/arch/arm/mach-pxa/ezx.c +=================================================================== +--- linux-2.6.20.7.orig/arch/arm/mach-pxa/ezx.c 2007-04-22 15:22:55.000000000 -0300 ++++ linux-2.6.20.7/arch/arm/mach-pxa/ezx.c 2007-04-23 01:02:05.000000000 -0300 +@@ -36,6 +36,7 @@ + #include <asm/arch/ohci.h> + #include <asm/arch/pxa-regs.h> + ++ + #include "ezx.h" + #include "generic.h" + #include <linux/tty.h> +@@ -92,6 +93,30 @@ + .resource = ezxpcap_resources, + }; + ++/* EMU */ ++static struct resource ezxemu_resources[] = { ++ [0] = { ++ .start = EZX_IRQ_USB4V, ++ .end = EZX_IRQ_USB4V, ++ .flags = IORESOURCE_IRQ, ++ }, ++ [1] = { ++ .start = EZX_IRQ_USB1V, ++ .end = EZX_IRQ_USB1V, ++ .flags = IORESOURCE_IRQ, ++ }, ++}; ++ ++struct platform_device ezxemu_device = { ++ .name = "ezx-emu", ++ .id = -1, ++ .dev = { ++ .parent = &ezxpcap_device.dev, ++ }, ++ .num_resources = ARRAY_SIZE(ezxemu_resources), ++ .resource = ezxemu_resources, ++}; ++ + /* OHCI Controller */ + + static int ezx_ohci_init(struct device *dev) +@@ -317,6 +342,7 @@ + &ezxssp_device, + &ezxpcap_device, + &ezxbp_device, ++ &ezxemu_device, + }; + + static void __init a780_init(void) diff --git a/packages/linux/linux-ezx-2.6.21/ezx-mci.patch b/packages/linux/linux-ezx-2.6.21/ezx-mci.patch new file mode 100644 index 0000000000..d16693e3e4 --- /dev/null +++ b/packages/linux/linux-ezx-2.6.21/ezx-mci.patch @@ -0,0 +1,177 @@ +Index: linux-2.6.20.7/arch/arm/mach-pxa/ezx-mci.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-2.6.20.7/arch/arm/mach-pxa/ezx-mci.c 2007-04-20 01:10:13.000000000 -0300 +@@ -0,0 +1,159 @@ ++/* ++ * linux/arch/arm/mach-ezx/a780.c ++ * ++ * Support for the Motorola Ezx A780 Development Platform. ++ * ++ * Author: Zhuang Xiaofan ++ * Created: Nov 25, 2003 ++ * Copyright: Motorola Inc. ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ */ ++ ++#include <linux/mmc/host.h> ++#include <linux/irq.h> ++#include <asm/irq.h> ++#include <asm/arch/pxa-regs.h> ++#include <asm/arch/ezx-pcap.h> ++#include <asm/arch/mmc.h> ++#include <asm/arch/hardware.h> ++ ++extern int ezx_pcap_mmcsd_power(int); ++extern void ezx_pcap_mmcsd_voltage(u_int32_t); ++ ++static struct pxamci_platform_data ezx_mci_platform_data; ++ ++static int ezx_mci_init(struct device *dev, ++ irqreturn_t (*ezx_detect_int)(int, void *), ++ void *data) ++{ ++ int err; ++ printk("%s entered\n", __FUNCTION__); ++ ++ /* Setup GPIO for PXA27x MMC/SD controller */ ++ pxa_gpio_mode(GPIO32_MMCCLK_MD); ++ pxa_gpio_mode(GPIO112_MMCCMD_MD); ++ pxa_gpio_mode(GPIO92_MMCDAT0_MD); ++ pxa_gpio_mode(GPIO109_MMCDAT1_MD); ++ pxa_gpio_mode(GPIO110_MMCDAT2_MD); ++ pxa_gpio_mode(GPIO111_MMCDAT3_MD); ++ ++ ezx_pcap_mmcsd_power(1); ++ ++ ezx_mci_platform_data.detect_delay = msecs_to_jiffies(250); ++ ++ err = request_irq(0x49, ezx_detect_int, SA_INTERRUPT, ++ "MMC card detect", data); ++ if (err) { ++ printk(KERN_ERR "ezx_mci_detect: MMC/SD: can't request " ++ "MMC card detect IRQ\n"); ++ return -1; ++ } ++ ++ set_irq_type(0x0b, IRQT_BOTHEDGE); ++ ++ return 0; ++} ++ ++static int ezx_mci_get_ro(struct device *dev) ++{ ++ printk("%s entered\n", __FUNCTION__); ++#if defined(CONFIG_PXA_EZX_E680) ++ /* this is only e680, i guess */ ++ // return GPIO_is_high(96+4); ++ return (GPLR3 & 0x800); ++#else ++ return 0; ++#endif ++} ++ ++#if defined(CONFIG_PXA_EZX_A780) ++static u_int8_t mmc_voltage[] = { ++ [MMC_VDD_160] = 5, ++ [MMC_VDD_170] = 5, ++ [MMC_VDD_180] = 6, ++ [MMC_VDD_190] = 6, ++ [MMC_VDD_200] = 7, ++ [MMC_VDD_210] = 7, ++ [MMC_VDD_220] = 8, ++ [MMC_VDD_230] = 8, ++ [MMC_VDD_240] = 9, ++ [MMC_VDD_250] = 9, ++ [MMC_VDD_260] = 10, ++ [MMC_VDD_270] = 10, ++ [MMC_VDD_280] = 11, ++ [MMC_VDD_290] = 11, ++ [MMC_VDD_300] = 12, ++ [MMC_VDD_310] = 12, ++ [MMC_VDD_320] = 13, ++ [MMC_VDD_330] = 13, ++ [MMC_VDD_340] = 14, ++ [MMC_VDD_350] = 14, ++ [MMC_VDD_360] = 15, ++}; ++#elif defined(CONFIG_PXA_EZX_E680) ++static u_int8_t mmc_voltage[] = { ++ [MMC_VDD_160] = 3, ++ [MMC_VDD_170] = 3, ++ [MMC_VDD_180] = 3, ++ [MMC_VDD_190] = 3, ++ [MMC_VDD_200] = 3, ++ [MMC_VDD_210] = 3, ++ [MMC_VDD_220] = 3, ++ [MMC_VDD_230] = 3, ++ [MMC_VDD_240] = 3, ++ [MMC_VDD_250] = 3, ++ [MMC_VDD_260] = 3, ++ [MMC_VDD_270] = 3, ++ [MMC_VDD_280] = 3, ++ [MMC_VDD_290] = 3, ++ [MMC_VDD_300] = 3, ++ [MMC_VDD_310] = 3, ++ [MMC_VDD_320] = 3, ++ [MMC_VDD_330] = 3, ++ [MMC_VDD_340] = 3, ++ [MMC_VDD_350] = 3, ++ [MMC_VDD_360] = 3, ++}; ++#endif ++ ++static void ezx_mci_setpower(struct device *dev, unsigned int vdd) ++{ ++ printk("%s(vdd=%u) entered\n", __FUNCTION__, vdd); ++ if (vdd <= MMC_VDD_360) ++ ezx_pcap_mmcsd_voltage(mmc_voltage[vdd]); ++ ++ ezx_pcap_mmcsd_power(1); ++} ++ ++static void ezx_mci_exit(struct device *dev, void *data) ++{ ++ printk("%s entered\n", __FUNCTION__); ++ ezx_pcap_mmcsd_power(0); ++ free_irq(0x49, data); ++} ++ ++static struct pxamci_platform_data ezx_mci_platform_data = { ++#if defined(CONFIG_PXA_EZX_E680) ++ .ocr_mask = MMC_VDD_27_28, ++#elif defined(CONFIG_PXA_EZX_A780) ++ .ocr_mask = MMC_VDD_160_165|MMC_VDD_18_19|MMC_VDD_20_21 ++ |MMC_VDD_22_23|MMC_VDD_24_25|MMC_VDD_26_27 ++ |MMC_VDD_28_29|MMC_VDD_30_31|MMC_VDD_32_33 ++ |MMC_VDD_34_35|MMC_VDD_35_36, ++#endif ++ .init = ezx_mci_init, ++ .get_ro = ezx_mci_get_ro, ++ .setpower = ezx_mci_setpower, ++ .exit = ezx_mci_exit, ++}; ++ ++int __init __ezx_mci_init (void) ++{ ++ pxa_set_mci_info(&ezx_mci_platform_data); ++ return 0; ++} ++ ++arch_initcall(__ezx_mci_init); +Index: linux-2.6.20.7/arch/arm/mach-pxa/Makefile +=================================================================== +--- linux-2.6.20.7.orig/arch/arm/mach-pxa/Makefile 2007-04-21 02:56:16.000000000 -0300 ++++ linux-2.6.20.7/arch/arm/mach-pxa/Makefile 2007-04-21 03:00:03.000000000 -0300 +@@ -18,7 +18,7 @@ + obj-$(CONFIG_MACH_AKITA) += akita-ioexp.o + obj-$(CONFIG_MACH_POODLE) += poodle.o corgi_ssp.o + obj-$(CONFIG_MACH_TOSA) += tosa.o +-obj-$(CONFIG_PXA_EZX) += ezx.o ezx_lcd.o ezx_ssp.o ezx-pcap.o ++obj-$(CONFIG_PXA_EZX) += ezx.o ezx_lcd.o ezx_ssp.o ezx-pcap.o ezx-mci.o + + # Support for blinky lights + led-y := leds.o diff --git a/packages/linux/linux-ezx-2.6.21/ezx-mtd-map.patch b/packages/linux/linux-ezx-2.6.21/ezx-mtd-map.patch new file mode 100644 index 0000000000..7ef42f0ffc --- /dev/null +++ b/packages/linux/linux-ezx-2.6.21/ezx-mtd-map.patch @@ -0,0 +1,274 @@ +Index: linux-2.6.21/drivers/mtd/maps/Kconfig +=================================================================== +--- linux-2.6.21.orig/drivers/mtd/maps/Kconfig 2007-04-26 00:08:32.000000000 -0300 ++++ linux-2.6.21/drivers/mtd/maps/Kconfig 2007-04-26 20:49:33.000000000 -0300 +@@ -595,6 +595,28 @@ + help + This enables access to the flash chip on the Sharp SL Series of PDAs. + ++config MTD_EZX ++ tristate "Map driver for Motorola EZX Platform" ++ depends on MTD && PXA_EZX ++ ++if MTD_EZX ++ ++choice ++ prompt "Select partition mapping for EZX platform" ++ ++config MTD_EZX_A780 ++ bool "A780/E680 Original Mapping" ++ ++config MTD_EZX_A780_ALTERNATE ++ bool "A780/E680 Alternate Mapping for BLOB2" ++ ++config MTD_EZX_E2 ++ bool "E2 Original Mapping" ++ ++endchoice ++ ++endif ++ + config MTD_PLATRAM + tristate "Map driver for platform device RAM (mtd-ram)" + depends on MTD +Index: linux-2.6.21/drivers/mtd/maps/Makefile +=================================================================== +--- linux-2.6.21.orig/drivers/mtd/maps/Makefile 2007-04-26 00:08:32.000000000 -0300 ++++ linux-2.6.21/drivers/mtd/maps/Makefile 2007-04-26 20:30:30.000000000 -0300 +@@ -72,3 +72,4 @@ + obj-$(CONFIG_MTD_OMAP_NOR) += omap_nor.o + obj-$(CONFIG_MTD_MTX1) += mtx-1_flash.o + obj-$(CONFIG_MTD_TQM834x) += tqm834x.o ++obj-$(CONFIG_MTD_EZX) += ezx-flash.o +Index: linux-2.6.21/drivers/mtd/maps/ezx-flash.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-2.6.21/drivers/mtd/maps/ezx-flash.c 2007-04-26 20:30:30.000000000 -0300 +@@ -0,0 +1,227 @@ ++/* ++ * $Id: $ ++ * ++ * Map driver for the PXA27x ++ * ++ * Author: Harald Welte ++ * Copyright: (C) 2001 MontaVista Software Inc. ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ * ++ * Mar 3, 2007 - (Daniel Ribeiro) Alternate partition table ++ * ++ */ ++ ++#include <linux/module.h> ++#include <linux/types.h> ++#include <linux/kernel.h> ++#include <linux/init.h> ++#include <linux/dma-mapping.h> ++#include <linux/slab.h> ++ ++#include <linux/mtd/mtd.h> ++#include <linux/mtd/map.h> ++#include <linux/mtd/partitions.h> ++ ++#include <asm/io.h> ++#include <asm/hardware.h> ++#include <asm/arch/pxa-regs.h> ++#include <asm/arch/mainstone.h> ++ ++#define WINDOW_ADDR 0x0 ++#define WINDOW_SIZE (32*1024*1024) ++#define WINDOW_CACHE_ADDR 0x0 ++#define WINDOW_CACHE_SIZE 0x1a00000 ++ ++static void pxa27x_map_inval_cache(struct map_info *map, unsigned long from, ++ ssize_t len) ++{ ++#if 0 ++ unsigned long endaddress, i, j; ++ endaddress = from + len -1; ++ from &= ~(32-1); ++ endaddress &= ~(32-1); ++ for (i = from; i <= endaddress; i += 32) ++ asm("mcr p15, 0, %0, c7, c6, 1"::"r"(i)); ++ ++ asm( "mrc p15, 0, %0, c2, c0, 0\n" ++ "mov %0, %0\n" ++ "sub pc, pc #4" ++ :"=r"(j)); ++#else ++ consistent_sync((char *)map->cached + from, len, DMA_FROM_DEVICE); ++#endif ++} ++ ++ ++struct map_info pxa27x_map = { ++ .name = "PXA27x flash", ++ .size = WINDOW_SIZE, ++ .phys = WINDOW_ADDR, ++ .inval_cache = &pxa27x_map_inval_cache, ++}; ++ ++#if defined CONFIG_MTD_EZX_A780_ALTERNATE ++static struct mtd_partition pxa27x_partitions[] = { ++ { ++ .name = "Bootloader (RO)", ++ .size = 0x00020000, ++ .offset = 0, ++ .mask_flags = MTD_WRITEABLE, ++ }, { ++ .name = "Bootloader 2", ++ .size = 0x00020000, ++ .offset = 0x00020000, ++ } , { ++ .name = "Kernel 1", ++ .size = 0x000e0000, // 896KB ++ .offset = 0x00040000, ++ } , { ++ .name = "rootfs", ++ .size = 0x01760000, ++ .offset = 0x00120000, ++ } , { ++ .name = "Kernel 2", ++ .size = 0x00180000, // 1.5MB ++ .offset = 0x01880000, ++ } , { ++ .name = "VFM_Filesystem", ++ .size = 0x005a0000, ++ .offset = 0x01a00000, ++ } , { ++ .name = "setup", ++ .size = 0x00020000, ++ .offset = 0x01fa0000, ++ } , { ++ .name = "Logo", ++ .size = 0x00020000, ++ .offset = 0x01fc0000, ++ }, ++}; ++#elif defined CONFIG_MTD_EZX_A780 ++static struct mtd_partition pxa27x_partitions[] = { ++ { ++ .name = "Bootloader", ++ .size = 0x00020000, ++ .offset = 0, ++ .mask_flags = MTD_WRITEABLE, ++ }, { ++ .name = "Kernel", ++ .size = 0x000e0000, ++ .offset = 0x00020000, ++ } , { ++ .name = "rootfs", ++ .size = 0x018e0000, ++ .offset = 0x00120000, ++ } , { ++ .name = "VFM_Filesystem", ++ .size = 0x00580000, ++ .offset = 0x01a00000, ++ } , { ++ .name = "setup", ++ .size = 0x00020000, ++ .offset = 0x01fa0000, ++ } , { ++ .name = "Logo", ++ .size = 0x00020000, ++ .offset = 0x01fc0000, ++ }, ++}; ++#else ++#error "please define partition for this PXA27x implementation" ++#endif ++ ++ ++static struct mtd_info *mymtd; ++static struct mtd_partition *parsed_parts; ++ ++static const char *probes[] = { "RedBoot", "cmdlinepart", NULL }; ++ ++static int __init init_pxa27x(void) ++{ ++ struct mtd_partition *parts; ++ int nb_parts = 0; ++ int parsed_nr_parts = 0; ++ char *part_type = "static"; ++ ++ pxa27x_map.bankwidth = (BOOT_DEF & 1) ? 2 : 4; ++ ++ printk("Probing PXA27x flash at physical address 0x%08x (%d-bit bankwidth)\n", ++ WINDOW_ADDR, pxa27x_map.bankwidth * 8); ++ pxa27x_map.virt = ioremap(pxa27x_map.phys, pxa27x_map.size); ++ ++ if (!pxa27x_map.virt) { ++ printk("Failed to ioremap\n"); ++ return -EIO; ++ } ++ ++ mymtd = do_map_probe("cfi_probe", &pxa27x_map); ++ if (!mymtd) { ++ iounmap((void *)pxa27x_map.virt); ++ return -ENXIO; ++ } ++ mymtd->owner = THIS_MODULE; ++ ++#if 0 ++ /* ioremap the first flash chip as cacheable */ ++ pxa27x_map.cached = ioremap_cached(pxa27x_map.phys, pxa27x_map.size); ++ if (!pxa27x_map.cached) { ++ printk("Failed to do cacheable-ioremap\n"); ++ iounmap((void *)pxa27x_map.virt); ++ return -EIO; ++ } ++#endif ++ simple_map_init(&pxa27x_map); ++ ++ if (parsed_nr_parts == 0) { ++ int ret = parse_mtd_partitions(mymtd, probes, &parsed_parts, 0); ++ ++ if (ret > 0) { ++ part_type = "RedBoot"; ++ parsed_nr_parts = ret; ++ } ++ } ++ ++ if (parsed_nr_parts > 0) { ++ parts = parsed_parts; ++ nb_parts = parsed_nr_parts; ++ } else { ++ parts = pxa27x_partitions; ++ nb_parts = ARRAY_SIZE(pxa27x_partitions); ++ } ++ ++ if (nb_parts) { ++ printk(KERN_NOTICE "Using %s partition definition\n", part_type); ++ add_mtd_partitions(mymtd, parts, nb_parts); ++ } else { ++ add_mtd_device(mymtd); ++ } ++#if 0 ++ if (ret = ezx_partition_init()) ++#endif ++ return 0; ++} ++ ++static void __exit cleanup_pxa27x(void) ++{ ++ if (mymtd) { ++ del_mtd_partitions(mymtd); ++ map_destroy(mymtd); ++ if (parsed_parts) ++ kfree(parsed_parts); ++ } ++ if (pxa27x_map.virt) ++ iounmap((void *)pxa27x_map.virt); ++ if (pxa27x_map.cached) ++ iounmap((void *)pxa27x_map.cached); ++ return; ++} ++ ++module_init(init_pxa27x); ++module_exit(cleanup_pxa27x); ++ ++MODULE_LICENSE("GPL"); ++MODULE_AUTHOR("Harald Welte <laforge@gnumonks.org>"); ++MODULE_DESCRIPTION("MTD map driver for Motorola EZX platform"); diff --git a/packages/linux/linux-ezx-2.6.21/ezx-pcap.patch b/packages/linux/linux-ezx-2.6.21/ezx-pcap.patch new file mode 100644 index 0000000000..22c5d44f36 --- /dev/null +++ b/packages/linux/linux-ezx-2.6.21/ezx-pcap.patch @@ -0,0 +1,1197 @@ +Index: linux-2.6.20.7/arch/arm/mach-pxa/ezx-pcap.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-2.6.20.7/arch/arm/mach-pxa/ezx-pcap.c 2007-04-21 08:26:37.000000000 -0300 +@@ -0,0 +1,411 @@ ++/* Driver for Motorola PCAP2 as present in EZX phones ++ * ++ * This is both a SPI device driver for PCAP itself, as well as ++ * an IRQ demultiplexer for handling PCAP generated events such as ++ * headphone jack sense by downstream drivers. ++ * ++ * (C) 2006 by Harald Welte <laforge@openezx.org> ++ * ++ * 2007, April - Daniel Ribeiro <drwyrm@gmail.com> ++ * Altered to work with corgi's SSP code. ++ * Fixed irq handling routine. ++ */ ++ ++#include <linux/module.h> ++#include <linux/kernel.h> ++#include <linux/platform_device.h> ++#include <linux/interrupt.h> ++#include <linux/kernel_stat.h> ++ ++#include <asm/hardware.h> ++#include <asm/mach-types.h> ++ ++#include <asm/arch/ssp.h> ++#include <asm/arch/pxa-regs.h> ++#include <asm/arch/ezx-pcap.h> ++#include <asm/arch/irqs.h> ++#include <asm/mach/irq.h> ++ ++#include "ezx.h" ++ ++#if 0 ++#define DEBUGP(x, args...) printk(x, ## args) ++#else ++#define DEBUGP(x, args...) ++#endif ++ ++extern unsigned long ezx_ssp_pcap_putget(ulong); ++ ++int ezx_pcap_write(u_int8_t reg_num, u_int32_t value) ++{ ++ value &= SSP_PCAP_REGISTER_VALUE_MASK; ++ value |= SSP_PCAP_REGISTER_WRITE_OP_BIT ++ | (reg_num<<SSP_PCAP_REGISTER_ADDRESS_SHIFT); ++ ++ local_irq_disable(); ++ ezx_ssp_pcap_putget(value); ++ local_irq_enable(); ++ ++ DEBUGP("pcap write r%x: 0x%08x\n", reg_num, value); ++ return 0; ++} ++EXPORT_SYMBOL_GPL(ezx_pcap_write); ++ ++int ezx_pcap_read(u_int8_t reg_num, u_int32_t *value) ++{ ++ u_int32_t frame = SSP_PCAP_REGISTER_READ_OP_BIT ++ | (reg_num<<SSP_PCAP_REGISTER_ADDRESS_SHIFT); ++ ++ local_irq_disable(); ++ *value = ezx_ssp_pcap_putget(frame); ++ local_irq_enable(); ++ ++ DEBUGP("pcap read r%x: 0x%08x\n", reg_num, *value); ++ return 0; ++} ++EXPORT_SYMBOL_GPL(ezx_pcap_read); ++ ++int ezx_pcap_bit_set(u_int32_t sspPcapBit, u_int8_t to) ++{ ++ int ret; ++ u_int32_t tmp; ++ u_int32_t bit = (sspPcapBit & SSP_PCAP_REGISTER_VALUE_MASK); ++ u_int8_t reg_num = (sspPcapBit & SSP_PCAP_REGISTER_ADDRESS_MASK) ++ >> SSP_PCAP_REGISTER_ADDRESS_SHIFT; ++ ++ ret = ezx_pcap_read(reg_num, &tmp); ++ if (ret < 0) ++ return ret; ++ ++ if (to == 0) ++ tmp &= ~bit; ++ else ++ tmp |= bit; ++ ++ return ezx_pcap_write(reg_num, tmp); ++} ++EXPORT_SYMBOL_GPL(ezx_pcap_bit_set); ++ ++int ezx_pcap_read_bit(u_int32_t bit) ++{ ++ int ret; ++ u_int32_t tmp; ++ u_int8_t reg_num = (bit & SSP_PCAP_REGISTER_ADDRESS_MASK) ++ >> SSP_PCAP_REGISTER_ADDRESS_SHIFT; ++ ++ ret = ezx_pcap_read(reg_num, &tmp); ++ if (ret < 0) ++ return ret; ++ ++ return tmp & (bit & SSP_PCAP_REGISTER_VALUE_MASK); ++} ++EXPORT_SYMBOL_GPL(ezx_pcap_read_bit); ++ ++ ++static int ezx_pcap_vibrator_level(u_int32_t bit) ++{ ++ /* FIXME */ ++ return 0; ++} ++EXPORT_SYMBOL_GPL(ezx_pcap_vibrator_level); ++ ++ ++static int pcap_init(void) ++{ ++ /* initialize registers */ ++ /* FIXME: this should be board-level, not chip-level */ ++ /* implement a per board pcap init reg array? */ ++ ++ ezx_pcap_bit_set(SSP_PCAP_ADJ_BIT_ISR_USB4VI, 1); ++ ezx_pcap_bit_set(SSP_PCAP_ADJ_BIT_MSR_USB4VM, 0); ++ ezx_pcap_bit_set(SSP_PCAP_ADJ_BIT_ISR_USB1VI, 1); ++ ezx_pcap_bit_set(SSP_PCAP_ADJ_BIT_MSR_USB1VM, 0); ++ // disable all interrupts ++ //ezx_pcap_write(SSP_PCAP_ADJ_MSR_REGISTER, 0x03ffffff); ++ ++ ezx_pcap_bit_set(SSP_PCAP_ADJ_BIT_AUD_RX_AMPS_A1CTRL, 1); ++ ezx_pcap_vibrator_level(PCAP_VIBRATOR_VOLTAGE_LEVEL3); ++ ezx_pcap_vibrator_level(PCAP_VIBRATOR_VOLTAGE_LEVEL3); ++ ++ /* set SW1 sleep to keep SW1 1.3v in sync mode */ ++ ezx_pcap_bit_set(SSP_PCAP_ADJ_BIT_LOWPWR_CTRL_SW1_MODE10, 0); ++ ezx_pcap_bit_set(SSP_PCAP_ADJ_BIT_LOWPWR_CTRL_SW1_MODE11, 0); ++ /* SW1 active in sync mode */ ++ ezx_pcap_bit_set(SSP_PCAP_ADJ_BIT_LOWPWR_CTRL_SW1_MODE00, 1); ++ ezx_pcap_bit_set(SSP_PCAP_ADJ_BIT_LOWPWR_CTRL_SW1_MODE01, 0); ++ /* at SW1 -core voltage to 1.30V */ ++ ezx_pcap_bit_set(SSP_PCAP_ADJ_BIT_LOWPWR_CTRL_SW10_DVS, 1); ++ ezx_pcap_bit_set(SSP_PCAP_ADJ_BIT_LOWPWR_CTRL_SW11_DVS, 1); ++ ezx_pcap_bit_set(SSP_PCAP_ADJ_BIT_LOWPWR_CTRL_SW12_DVS, 1); ++ ezx_pcap_bit_set(SSP_PCAP_ADJ_BIT_LOWPWR_CTRL_SW13_DVS, 0); ++ ++ /* when STANDY2 PIN ACTIVE (high) set V3-- sram V8 -- pll off */ ++ ezx_pcap_bit_set(SSP_PCAP_ADJ_BIT_VREG2_V3_STBY, 1); ++ ezx_pcap_bit_set(SSP_PCAP_ADJ_BIT_VREG2_V3_LOWPWR, 0); ++ ++ ezx_pcap_bit_set(SSP_PCAP_ADJ_BIT_VREG2_V8_STBY, 1); ++ ezx_pcap_bit_set(SSP_PCAP_ADJ_BIT_VREG2_V8_LOWPWR, 0); ++ ++ /* when STANDY2 PIN ACTIVE (high) set V4-- lcd only for e680 V6 --- ++ * camera for e680 */ ++ ezx_pcap_bit_set(SSP_PCAP_ADJ_BIT_VREG2_V4_STBY, 1); ++ ezx_pcap_bit_set(SSP_PCAP_ADJ_BIT_VREG2_V4_LOWPWR, 1); ++ ++ ezx_pcap_bit_set(SSP_PCAP_ADJ_BIT_VREG2_V6_STBY, 1); ++ ezx_pcap_bit_set(SSP_PCAP_ADJ_BIT_VREG2_V6_LOWPWR, 0); ++ ++ /* set Vc to low power mode when AP sleep */ ++ //SSP_PCAP_bit_set( SSP_PCAP_ADJ_BIT_LOWPWR_CTRL_VC_STBY); ++ ++ /* set VAUX2 to voltage 2.775V and low power mode when AP sleep */ ++ ezx_pcap_bit_set(SSP_PCAP_ADJ_BIT_AUX_VREG_VAUX2_1, 1); ++ ezx_pcap_bit_set(SSP_PCAP_ADJ_BIT_AUX_VREG_VAUX2_0, 0); ++ ezx_pcap_bit_set(SSP_PCAP_ADJ_BIT_LOWPWR_CTRL_VAUX2_STBY, 1); ++ ezx_pcap_bit_set(SSP_PCAP_ADJ_BIT_LOWPWR_CTRL_VAUX2_LOWPWR, 1); ++ ezx_pcap_bit_set(SSP_PCAP_ADJ_BIT_AUX_VREG_VAUX2_EN, 1); ++ ++ PGSR(GPIO34_TXENB) |= GPIO_bit(GPIO34_TXENB); ++ ++ return 0; ++} ++/* MMC/SD specific functions */ ++ ++void ezx_pcap_mmcsd_voltage(u_int32_t bits) ++{ ++ unsigned int tmp; ++ ezx_pcap_read(SSP_PCAP_ADJ_AUX_VREG_REGISTER, &tmp); ++#if defined(CONFIG_PXA_EZX_E680) ++ tmp &= 0xffffff9f; /* zero all vaux2 bits */ ++ tmp |= (bits & 0x3) << 5; ++#elif defined(CONFIG_PXA_EZX_A780) ++ tmp &= 0xfffff0ff; /* zero all vaux3 bits */ ++ tmp |= (bits & 0xf) << 8; ++#endif ++ ezx_pcap_write(SSP_PCAP_ADJ_AUX_VREG_REGISTER, tmp); ++} ++EXPORT_SYMBOL(ezx_pcap_mmcsd_voltage); ++ ++int ezx_pcap_mmcsd_power(int on) ++{ ++ if (on) { ++#if defined(CONFIG_PXA_EZX_E680) ++ return ezx_pcap_bit_set(SSP_PCAP_ADJ_BIT_AUX_VREG_VAUX2_EN, 1); ++#else ++ return ezx_pcap_bit_set(SSP_PCAP_ADJ_BIT_AUX_VREG_VAUX3_EN, 1); ++#endif ++ } else { ++#if defined(CONFIG_PXA_EZX_E680) ++ return ezx_pcap_bit_set(SSP_PCAP_ADJ_BIT_AUX_VREG_VAUX2_EN, 0); ++#else ++ return ezx_pcap_bit_set(SSP_PCAP_ADJ_BIT_AUX_VREG_VAUX3_EN, 0); ++#endif ++ } ++} ++EXPORT_SYMBOL_GPL(ezx_pcap_mmcsd_power); ++ ++/* IRQ Handling */ ++ ++/* Array indexed by BIT POSITION of PCAP register, returns IRQ number */ ++static unsigned int pcap2irq[] = { ++ [0] = EZX_IRQ_ADCDONE, ++ [1] = EZX_IRQ_TS, ++ [2] = 0, /* 1HZ */ ++ [3] = 0, /* WI */ ++ [4] = 0, /* WI */ ++ [5] = 0, /* TODA */ ++ [6] = EZX_IRQ_USB4V, ++ [7] = 0, /* ONOFF */ ++ [8] = 0, /* ONOFF2 */ ++ [9] = EZX_IRQ_USB1V, ++ [10] = 0, /* MOBPORT */ ++ [11] = EZX_IRQ_MIC, ++ [12] = EZX_IRQ_HEADJACK, ++ [13] = 0, /* ST */ ++ [14] = 0, /* PC */ ++ [15] = 0, /* WARM */ ++ [16] = 0, /* EOL */ ++ [17] = 0, /* CLK */ ++ [18] = 0, /* SYS_RST */ ++ [19] = 0, ++ [20] = EZX_IRQ_ADCDONE2, ++ [21] = 0, /* SOFT_RESET */ ++ [22] = 0, /* MNEXB */ ++}; ++ ++/* Array indexed by IRQ NUMBER, returns PCAP absolute value */ ++static unsigned int irq2pcap[] = { ++ [EZX_IRQ_ADCDONE] = SSP_PCAP_ADJ_BIT_ISR_ADCDONEI, ++ [EZX_IRQ_TS] = SSP_PCAP_ADJ_BIT_ISR_TSI, ++ [EZX_IRQ_USB4V] = SSP_PCAP_ADJ_BIT_ISR_USB4VI, ++ [EZX_IRQ_USB1V] = SSP_PCAP_ADJ_BIT_ISR_USB1VI, ++ [EZX_IRQ_HEADJACK] = SSP_PCAP_ADJ_BIT_ISR_A1I, ++ [EZX_IRQ_MIC] = SSP_PCAP_ADJ_BIT_ISR_MB2I, ++ [EZX_IRQ_ADCDONE2] = SSP_PCAP_ADJ_BIT_ISR_ADCDONE2I, ++}; ++ ++static void pcap_ack_irq(unsigned int irq) ++{ ++ DEBUGP("pcap_ack_irq: %u\n", irq); ++ ezx_pcap_write(SSP_PCAP_ADJ_ISR_REGISTER, irq2pcap[irq]); ++} ++ ++static void pcap_mask_irq(unsigned int irq) ++{ ++ u_int32_t reg; ++ ++ DEBUGP("pcap_mask_irq: %u\n", irq); ++ ++ /* this needs to be atomic... but we're not on SMP so it is */ ++ ezx_pcap_read(SSP_PCAP_ADJ_MSR_REGISTER, ®); ++ reg |= irq2pcap[irq]; ++ ezx_pcap_write(SSP_PCAP_ADJ_MSR_REGISTER, reg); ++} ++ ++static void pcap_unmask_irq(unsigned int irq) ++{ ++ u_int32_t tmp; ++ DEBUGP("pcap_unmask_irq: %u\n", irq); ++ ++ /* this needs to be atomic... but we're not on SMP so it is */ ++ ezx_pcap_read(SSP_PCAP_ADJ_MSR_REGISTER, &tmp); ++ tmp &= ~irq2pcap[irq]; ++ ezx_pcap_write(SSP_PCAP_ADJ_MSR_REGISTER, tmp); ++} ++ ++static struct irq_chip pcap_chip = { ++ .ack = pcap_ack_irq, ++ .mask = pcap_mask_irq, ++ .unmask = pcap_unmask_irq, ++}; ++ ++/* handler for interrupt received from PCAP via GPIO */ ++static void pcap_irq_demux_handler(unsigned int irq, struct irq_desc *desc) ++{ ++ int i; ++ const unsigned int cpu = smp_processor_id(); ++ u_int32_t reg; ++ ++ DEBUGP("pcap_irq_demux_handler(%u,,) entered\n", irq); ++ ++ spin_lock(&desc->lock); ++ ++ desc->status &= ~(IRQ_REPLAY | IRQ_WAITING); ++ ++ if (unlikely(desc->status & IRQ_INPROGRESS)) { ++ DEBUGP("irq busy, masking it off\n"); ++ desc->status |= (IRQ_PENDING | IRQ_MASKED); ++ desc->chip->mask(irq); ++ desc->chip->ack(irq); ++ goto out_unlock; ++ } ++ ++ kstat_cpu(cpu).irqs[irq]++; ++ desc->status |= IRQ_INPROGRESS; ++ ++ do { ++ if (unlikely((desc->status & ++ (IRQ_PENDING | IRQ_MASKED | IRQ_DISABLED)) == ++ (IRQ_PENDING | IRQ_MASKED))) { ++ DEBUGP("dealing with pending IRQ, unmasking\n"); ++ desc->chip->unmask(irq); ++ desc->status &= ~IRQ_MASKED; ++ } ++ ++ desc->status &= ~IRQ_PENDING; ++ spin_unlock(&desc->lock); ++ ++ ezx_pcap_read(SSP_PCAP_ADJ_ISR_REGISTER, ®); ++ DEBUGP("pcap_irq_demux_handler: ISR=0x%08x\n", reg); ++ ++ for (i = ARRAY_SIZE(pcap2irq)-1; i >= 0; i--) { ++ unsigned int pirq = pcap2irq[i]; ++ if (pirq == 0) ++ continue; ++ ++ if (reg & (1 << i)) { ++ struct irq_desc *subdesc; ++ DEBUGP("found irq %u\n", pirq); ++ subdesc = irq_desc + pirq; ++ ++ // acknowledge pcap irq ++ // do just one pcap irq each time ++ subdesc->chip->ack(pirq); ++ i = 0; ++ ++ handle_IRQ_event(pirq, subdesc->action); ++ } ++ } ++ spin_lock(&desc->lock); ++ ++ } while ((desc->status & (IRQ_PENDING | IRQ_DISABLED)) == IRQ_PENDING); ++ ++ desc->status &= ~IRQ_INPROGRESS; ++ ++out_unlock: ++ spin_unlock(&desc->lock); ++} ++ ++static int ezx_pcap_remove(struct platform_device *pdev) ++{ ++ int irq; ++ DEBUGP("exz_pcap_remove entered\n"); ++ ++ set_irq_chained_handler(IRQ_GPIO1, NULL); ++ ++ for (irq = EZX_IRQ(0); irq <= EZX_IRQ(6); irq++) { ++ set_irq_chip(irq, NULL); ++ set_irq_handler(irq, NULL); ++ set_irq_flags(irq, 0); ++ } ++ ++ return 0; ++} ++ ++static int __init ezx_pcap_probe(struct platform_device *pdev) ++{ ++ unsigned int irq; ++ DEBUGP("ezx_pcap_probe entered\n"); ++ ++ pcap_init(); ++ ++ set_irq_type(IRQ_GPIO1, IRQT_RISING); ++ /* set up interrupt demultiplexing code for PCAP2 irqs */ ++ for (irq = EZX_IRQ(0); irq <= EZX_IRQ(6); irq++) { ++ set_irq_chip(irq, &pcap_chip); ++ set_irq_handler(irq, handle_edge_irq); ++ set_irq_flags(irq, IRQF_VALID); ++ } ++ set_irq_chained_handler(IRQ_GPIO1, pcap_irq_demux_handler); ++ ++ printk("PCAP2 SSP driver registered.\n"); ++ ++ return 0; ++} ++ ++static struct platform_driver ezxpcap_driver = { ++ .probe = ezx_pcap_probe, ++ .remove = ezx_pcap_remove, ++ .driver = { ++ .name = "ezx-pcap", ++ .owner = THIS_MODULE, ++ }, ++}; ++ ++static int __init ezx_pcap_init(void) ++{ ++ DEBUGP("ezx_pcap_init entered\n"); ++ return platform_driver_register(&ezxpcap_driver); ++} ++ ++static void __exit ezx_pcap_exit(void) ++{ ++ return platform_driver_unregister(&ezxpcap_driver); ++} ++ ++module_init(ezx_pcap_init); ++module_exit(ezx_pcap_exit); ++ ++MODULE_LICENSE("GPL"); ++MODULE_AUTHOR("Harald Welte"); ++MODULE_DESCRIPTION("SPI Driver for Motorola PCAP2"); ++ +Index: linux-2.6.20.7/include/asm-arm/arch-pxa/ezx-pcap.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-2.6.20.7/include/asm-arm/arch-pxa/ezx-pcap.h 2007-04-21 08:26:37.000000000 -0300 +@@ -0,0 +1,665 @@ ++/* (c) Copyright Motorola Beijing 2002 all rights reserved. ++ ++ Project Name : EZX ++ Project No. : ++ Title : ++ File Name : ++ Description : ++ ++ ************** REVISION HISTORY ********************************************** ++ Date Author Reference ++ ======== ========== ========================== ++ 2002-07-01 weiqiang lin create ++*/ ++#ifndef SSP_PCAP_H ++#define SSP_PCAP_H ++ ++#define SSP_vibrate_start_command() SSP_PCAP_bit_set(SSP_PCAP_ADJ_BIT_AUX_VREG_V_VIB_EN); \ ++ SSP_PCAP_bit_set(SSP_PCAP_ADJ_BIT_AUX_VREG_V_VIB_EN) ++ ++#define SSP_vibrate_stop_command() SSP_PCAP_bit_clean(SSP_PCAP_ADJ_BIT_AUX_VREG_V_VIB_EN); \ ++ SSP_PCAP_bit_clean(SSP_PCAP_ADJ_BIT_AUX_VREG_V_VIB_EN) ++ ++#define SSP_PCAP_REGISTER_VALUE_LENGTH 16 ++ ++#define SSP_PCAP_REGISTER_WRITE_OP_BIT 0x80000000 ++#define SSP_PCAP_REGISTER_READ_OP_BIT 0x00000000 ++ ++#define SSP_PCAP_REGISTER_VALUE_UP_WORD_MASK 0xffff0000 ++#define SSP_PCAP_REGISTER_VALUE_DOWN_WORD_MASK 0x0000ffff ++ ++#define SSP_PCAP_REGISTER_VALUE_MASK 0x01ffffff ++#define SSP_PCAP_REGISTER_VALUE_MASK 0x01ffffff ++#define SSP_PCAP_REGISTER_ADDRESS_MASK 0x7c000000 ++#define SSP_PCAP_REGISTER_ADDRESS_SHIFT 26 ++#define SSP_PCAP_REGISTER_NUMBER 32 ++ ++#define SSP_PCAP_ADC_START_VALUE_SET_MASK 0xfffffc00 ++#define SSP_PCAP_ADC_START_VALUE 0x000001dd ++ ++ ++#define SSP_PCAP_PHONE_CDC_CLOCK_MASK 0x000001c0 ++#define SSP_PCAP_STEREO_SAMPLE_RATE_MASK 0x00000f00 ++#define SSP_PCAP_STEREO_BCLK_TIME_SLOT_MASK 0x00018000 ++#define SSP_PCAP_STEREO_CLOCK_MASK 0x0000001c ++#define SSP_PCAP_DIGITAL_AUDIO_MODE_MASK 0x00006000 ++#define SSP_PCAP_TOUCH_PANEL_POSITION_DETECT_MODE_MASK 0x000e0000 ++#define SSP_PCAP_MONO_PGA_MASK 0x00180000 ++ ++#define SSP_PCAP_VIBRATOR_VOLTAGE_LEVEL_MASK 0x00300000 ++ ++#define SSP_PCAP_AUDIO_IN_GAIN_MASK 0x0000001f ++#define SSP_PCAP_AUDIO_IN_GAIN_SHIFT 0 ++#define SSP_PCAP_AUDIO_OUT_GAIN_MASK 0x0001e000 ++#define SSP_PCAP_AUDIO_OUT_GAIN_SHIFT 13 ++ ++ ++#define SSP_PCAP_ADD1_VALUE_MASK 0x000003ff ++#define SSP_PCAP_ADD1_VALUE_SHIFT 0 ++#define SSP_PCAP_ADD2_VALUE_MASK 0x000ffc00 ++#define SSP_PCAP_ADD2_VALUE_SHIFT 10 ++ ++ ++#define PCAP_AUDIO_IN_GAIN_MAX_VALUE 31 ++#define PCAP_AUDIO_OUT_GAIN_MAX_VALUE 15 ++ ++#define PCAP_CLEAR_INTERRUPT_REGISTER 0x00141fdf ++#define PCAP_MASK_ALL_INTERRUPT 0x0013ffff ++ ++#define SSP_PCAP_TS_KEEPER_TIMER 100 /* 1 second */ ++#define START_ADC_DELAY_TIMER 1991 /* 540 us */ ++ ++#define SSP_SEND_PM_ALART_INTERVAL 1000 *HZ/1000 /* 1 second */ ++#define SSP_SEND_MSG_USB_ACCESSORY_INFO_DEBOUNCE 200 *HZ/1000 /* 200ms */ ++ ++struct ssp_interrupt_info ++{ ++ u32 type; ++ u32 status; ++ void* privdata; ++}; ++ ++#ifndef U8 ++#define U8 unsigned char ++#endif ++ ++#ifndef U32 ++#define U32 unsigned long ++#endif ++ ++#ifndef U16 ++#define U16 unsigned short ++#endif ++ ++#ifndef P_U16 ++#define P_U16 U16* ++#endif ++ ++#ifndef P_U32 ++#define P_U32 U32* ++#endif ++ ++#define SSP_SELECT_BUFFER (volatile unsigned long *)(0xf4000000) ++ ++#define SSP_SR_RNE 0x00000008 ++#define SSP_PCAP_BASE 0x00001000 ++/************************ STRUCTURES, ENUMS, AND TYPEDEFS **************************/ ++typedef enum accessoryStatus ++{ ++ ACCESSORY_DEVICE_STATUS_DETACHED = 0, ++ ACCESSORY_DEVICE_STATUS_ATTACHED , ++ ACCESSORY_DEVICE_STATUS_UNKNOW =0x000000ff ++}ACCESSORY_DEVICE_STATUS; ++ ++typedef enum accessoryType ++{ ++ ACCESSORY_DEVICE_NONE = 0, ++ ACCESSORY_DEVICE_SERIAL_PORT , ++ ACCESSORY_DEVICE_USB_PORT , ++ ACCESSORY_DEVICE_UNKNOW =0x000000ff ++}ACCESSORY_TYPE; ++ ++typedef enum pcapReturnStatus ++{ ++ SSP_PCAP_SUCCESS = 0, ++ SSP_PCAP_ERROR_REGISTER = SSP_PCAP_BASE+1, ++ SSP_PCAP_ERROR_VALUE = SSP_PCAP_BASE+2, ++ ++ SSP_PCAP_NOT_RUN = SSP_PCAP_BASE+0xff ++}SSP_PCAP_STATUS; ++ ++typedef enum pcapPortType ++{ ++ SSP_PCAP_SERIAL_PORT = 0x00000000, ++ SSP_PCAP_LOW_USB_PORT = 0x00000001, ++ SSP_PCAP_HIGH_USB_PORT = 0x00000002, ++ SSP_PCAP_UNKNOW_PORT = 0x000000ff ++}SSP_PCAP_PORT_TYPE; ++ ++typedef enum pcapInitDriverType ++{ ++ SSP_PCAP_TS_OPEN = 0x00000000, ++ SSP_PCAP_AUDIO_OPEN = 0x00000001, ++ SSP_PCAP_UNKNOW_DRIVER_OPEN = 0x000000ff ++}SSP_PCAP_INIT_DRIVER_TYPE; ++ ++ ++typedef enum pcapReturnBitStatus ++{ ++ SSP_PCAP_BIT_ZERO = 0x00000000, ++ SSP_PCAP_BIT_ONE = 0x00000001, ++ SSP_PCAP_BIT_ERROR = 0xff000000 ++}SSP_PCAP_BIT_STATUS; ++ ++typedef enum pcapCDCClkType ++{ ++ PCAP_CDC_CLK_IN_13M0 = 0x00000000, ++ PCAP_CDC_CLK_IN_15M36 = 0x00000040, ++ PCAP_CDC_CLK_IN_16M8 = 0x00000080, ++ PCAP_CDC_CLK_IN_19M44 = 0x000000c0, ++ PCAP_CDC_CLK_IN_26M0 = 0x00000100 ++}PHONE_CDC_CLOCK_TYPE; ++ ++typedef enum pcapST_SR ++{ ++ PCAP_ST_SAMPLE_RATE_8K = 0x00000000, ++ PCAP_ST_SAMPLE_RATE_11K = 0x00000100, ++ PCAP_ST_SAMPLE_RATE_12K = 0x00000200, ++ PCAP_ST_SAMPLE_RATE_16K = 0x00000300, ++ PCAP_ST_SAMPLE_RATE_22K = 0x00000400, ++ PCAP_ST_SAMPLE_RATE_24K = 0x00000500, ++ PCAP_ST_SAMPLE_RATE_32K = 0x00000600, ++ PCAP_ST_SAMPLE_RATE_44K = 0x00000700, ++ PCAP_ST_SAMPLE_RATE_48K = 0x00000800 ++}ST_SAMPLE_RATE_TYPE; ++ ++typedef enum pcapST_BCLK ++{ ++ PCAP_ST_BCLK_SLOT_16 = 0x00000000, ++ PCAP_ST_BCLK_SLOT_8 = 0x00008000, ++ PCAP_ST_BCLK_SLOT_4 = 0x00010000, ++ PCAP_ST_BCLK_SLOT_2 = 0x00018000, ++}ST_BCLK_TIME_SLOT_TYPE; ++ ++typedef enum pcapST_CLK ++{ ++ PCAP_ST_CLK_PLL_CLK_IN_13M0 = 0x00000000, ++ PCAP_ST_CLK_PLL_CLK_IN_15M36 = 0x00000004, ++ PCAP_ST_CLK_PLL_CLK_IN_16M8 = 0x00000008, ++ PCAP_ST_CLK_PLL_CLK_IN_19M44 = 0x0000000c, ++ PCAP_ST_CLK_PLL_CLK_IN_26M0 = 0x00000010, ++ PCAP_ST_CLK_PLL_CLK_IN_EXT_MCLK = 0x00000014, ++ PCAP_ST_CLK_PLL_CLK_IN_FSYNC = 0x00000018, ++ PCAP_ST_CLK_PLL_CLK_IN_BITCLK = 0x0000001c ++}ST_CLK_TYPE; ++ ++typedef enum pcapDigitalAudioInterfaceMode ++{ ++ PCAP_DIGITAL_AUDIO_INTERFACE_NORMAL = 0x00000000, ++ PCAP_DIGITAL_AUDIO_INTERFACE_NETWORK = 0x00002000, ++ PCAP_DIGITAL_AUDIO_INTERFACE_I2S = 0x00004000 ++}DIG_AUD_MODE_TYPE; ++ ++typedef enum pcapMono ++{ ++ PCAP_MONO_PGA_R_L_STEREO = 0x00000000, ++ PCAP_MONO_PGA_RL = 0x00080000, ++ PCAP_MONO_PGA_RL_3DB = 0x00100000, ++ PCAP_MONO_PGA_RL_6DB = 0x00180000 ++}MONO_TYPE; ++ ++typedef enum pcapVibratorVoltageLevel ++{ ++ PCAP_VIBRATOR_VOLTAGE_LEVEL0 = 0x00000000, ++ PCAP_VIBRATOR_VOLTAGE_LEVEL1 = 0x00100000, ++ PCAP_VIBRATOR_VOLTAGE_LEVEL2 = 0x00200000, ++ PCAP_VIBRATOR_VOLTAGE_LEVEL3 = 0x00300000 ++}VibratorVoltageLevel_TYPE; ++ ++typedef enum pcapTouchScreenMode ++{ ++ PCAP_TS_POSITION_X_MEASUREMENT = 0x00000000, ++ PCAP_TS_POSITION_XY_MEASUREMENT = 0x00020000, ++ PCAP_TS_PRESSURE_MEASUREMENT = 0x00040000, ++ PCAP_TS_PLATE_X_MEASUREMENT = 0x00060000, ++ PCAP_TS_PLATE_Y_MEASUREMENT = 0x00080000, ++ PCAP_TS_STANDBY_MODE = 0x000a0000, ++ PCAP_TS_NONTS_MODE = 0x000c0000 ++}TOUCH_SCREEN_DETECT_TYPE; ++ ++typedef enum pcapADJRegister ++{ ++ SSP_PCAP_ADJ_ISR_REGISTER = 0x00, ++ SSP_PCAP_ADJ_MSR_REGISTER = 0x01, ++ SSP_PCAP_ADJ_PSTAT_REGISTER = 0x02, ++ SSP_PCAP_ADJ_VREG2_REGISTER = 0x06, ++ SSP_PCAP_ADJ_AUX_VREG_REGISTER = 0x07, ++ SSP_PCAP_ADJ_BATT_DAC_REGISTER = 0x08, ++ SSP_PCAP_ADJ_ADC1_REGISTER = 0x09, ++ SSP_PCAP_ADJ_ADC2_REGISTER = 0x0a, ++ SSP_PCAP_ADJ_AUD_CODEC_REGISTER = 0x0b, ++ SSP_PCAP_ADJ_AUD_RX_AMPS_REGISTER = 0x0c, ++ SSP_PCAP_ADJ_ST_DAC_REGISTER = 0x0d, ++ SSP_PCAP_ADJ_BUSCTRL_REGISTER = 0x14, ++ SSP_PCAP_ADJ_PERIPH_REGISTER = 0x15, ++ SSP_PCAP_ADJ_LOWPWR_CTRL_REGISTER = 0x18, ++ SSP_PCAP_ADJ_TX_AUD_AMPS_REGISTER = 0x1a, ++ SSP_PCAP_ADJ_GP_REG_REGISTER = 0x1b ++}SSP_PCAP_SECONDARY_PROCESSOR_REGISTER; ++ ++typedef enum pcapADJBit_SetType ++{ ++ SSP_PCAP_ADJ_BIT_ISR_ADCDONEI = 0x00000001, ++ SSP_PCAP_ADJ_BIT_ISR_TSI = 0x00000002, ++ SSP_PCAP_ADJ_BIT_ISR_1HZI = 0x00000004, ++ SSP_PCAP_ADJ_BIT_ISR_WHI = 0x00000008, ++ SSP_PCAP_ADJ_BIT_ISR_WLI = 0x00000010, ++ SSP_PCAP_ADJ_BIT_ISR_TODAI = 0x00000020, ++ SSP_PCAP_ADJ_BIT_ISR_USB4VI = 0x00000040, ++ SSP_PCAP_ADJ_BIT_ISR_ONOFFI = 0x00000080, ++ SSP_PCAP_ADJ_BIT_ISR_ONOFF2I = 0x00000100, ++ SSP_PCAP_ADJ_BIT_ISR_USB1VI = 0x00000200, ++ SSP_PCAP_ADJ_BIT_ISR_MOBPORTI = 0x00000400, ++ SSP_PCAP_ADJ_BIT_ISR_MB2I = 0x00000800, ++ SSP_PCAP_ADJ_BIT_ISR_A1I = 0x00001000, ++ SSP_PCAP_ADJ_BIT_ISR_STI = 0x00002000, ++ SSP_PCAP_ADJ_BIT_ISR_PCI = 0x00004000, ++ SSP_PCAP_ADJ_BIT_ISR_WARMI = 0x00008000, ++ SSP_PCAP_ADJ_BIT_ISR_EOLI = 0x00010000, ++ SSP_PCAP_ADJ_BIT_ISR_CLKI = 0x00020000, ++ SSP_PCAP_ADJ_BIT_ISR_SYS_RSTI = 0x00040000, ++ SSP_PCAP_ADJ_BIT_ISR_ADCDONE2I = 0x00100000, ++ SSP_PCAP_ADJ_BIT_ISR_SOFT_RESETI = 0x00200000, ++ SSP_PCAP_ADJ_BIT_ISR_MNEXBI = 0x00400000, ++ ++ SSP_PCAP_ADJ_BIT_MSR_ADCDONEM = 0x04000001, ++ SSP_PCAP_ADJ_BIT_MSR_TSM = 0x04000002, ++ SSP_PCAP_ADJ_BIT_MSR_1HZM = 0x04000004, ++ SSP_PCAP_ADJ_BIT_MSR_WHM = 0x04000008, ++ SSP_PCAP_ADJ_BIT_MSR_WLM = 0x04000010, ++ SSP_PCAP_ADJ_BIT_MSR_TODAM = 0x04000020, ++ SSP_PCAP_ADJ_BIT_MSR_USB4VM = 0x04000040, ++ SSP_PCAP_ADJ_BIT_MSR_ONOFFM = 0x04000080, ++ SSP_PCAP_ADJ_BIT_MSR_ONOFF2M = 0x04000100, ++ SSP_PCAP_ADJ_BIT_MSR_USB1VM = 0x04000200, ++ SSP_PCAP_ADJ_BIT_MSR_MOBPORTM = 0x04000400, ++ SSP_PCAP_ADJ_BIT_MSR_MB2M = 0x04000800, ++ SSP_PCAP_ADJ_BIT_MSR_A1M = 0x04001000, ++ SSP_PCAP_ADJ_BIT_MSR_STM = 0x04002000, ++ SSP_PCAP_ADJ_BIT_MSR_PCM = 0x04004000, ++ SSP_PCAP_ADJ_BIT_MSR_WARMM = 0x04008000, ++ SSP_PCAP_ADJ_BIT_MSR_EOLM = 0x04010000, ++ SSP_PCAP_ADJ_BIT_MSR_CLKM = 0x04020000, ++ SSP_PCAP_ADJ_BIT_MSR_SYS_RSTM = 0x04040000, ++ SSP_PCAP_ADJ_BIT_MSR_ADCDONE2M = 0x04100000, ++ SSP_PCAP_ADJ_BIT_MSR_SOFT_RESETM = 0x04200000, ++ SSP_PCAP_ADJ_BIT_MSR_MNEXBM = 0x04400000, ++ ++ SSP_PCAP_ADJ_BIT_PSTAT_USBDET_4V = 0x08000040, ++ SSP_PCAP_ADJ_BIT_PSTAT_ONOFFSNS = 0x08000080, ++ SSP_PCAP_ADJ_BIT_PSTAT_ONOFFSNS2 = 0x08000100, ++ SSP_PCAP_ADJ_BIT_PSTAT_USBDET_1V = 0x08000200, ++ SSP_PCAP_ADJ_BIT_PSTAT_MOBSENSB = 0x08000400, ++ SSP_PCAP_ADJ_BIT_PSTAT_MB2SNS = 0x08000800, ++ SSP_PCAP_ADJ_BIT_PSTAT_A1SNS = 0x08001000, ++ SSP_PCAP_ADJ_BIT_PSTAT_MSTB = 0x08002000, ++ SSP_PCAP_ADJ_BIT_PSTAT_EOL_STAT = 0x08010000, ++ SSP_PCAP_ADJ_BIT_PSTAT_CLK_STAT = 0x08020000, ++ SSP_PCAP_ADJ_BIT_PSTAT_SYS_RST = 0x08040000, ++ SSP_PCAP_ADJ_BIT_PSTAT_BATTFBSNS = 0x08080000, ++ SSP_PCAP_ADJ_BIT_PSTAT_BATT_DET_IN_SNS = 0x08200000, ++ SSP_PCAP_ADJ_BIT_PSTAT_MNEXBSNS = 0x08400000, ++ SSP_PCAP_ADJ_BIT_PSTAT_WARM_SYS_RST = 0x08800000, ++ ++ SSP_PCAP_ADJ_BIT_VREG2_V1_STBY = 0x18000001, ++ SSP_PCAP_ADJ_BIT_VREG2_V2_STBY = 0x18000002, ++ SSP_PCAP_ADJ_BIT_VREG2_V3_STBY = 0x18000004, ++ SSP_PCAP_ADJ_BIT_VREG2_V4_STBY = 0x18000008, ++ SSP_PCAP_ADJ_BIT_VREG2_V5_STBY = 0x18000010, ++ SSP_PCAP_ADJ_BIT_VREG2_V6_STBY = 0x18000020, ++ SSP_PCAP_ADJ_BIT_VREG2_V7_STBY = 0x18000040, ++ SSP_PCAP_ADJ_BIT_VREG2_V8_STBY = 0x18000080, ++ SSP_PCAP_ADJ_BIT_VREG2_V9_STBY = 0x18000100, ++ SSP_PCAP_ADJ_BIT_VREG2_V10_STBY = 0x18000200, ++ SSP_PCAP_ADJ_BIT_VREG2_V1_LOWPWR = 0x18000400, ++ SSP_PCAP_ADJ_BIT_VREG2_V2_LOWPWR = 0x18000800, ++ SSP_PCAP_ADJ_BIT_VREG2_V3_LOWPWR = 0x18001000, ++ SSP_PCAP_ADJ_BIT_VREG2_V4_LOWPWR = 0x18002000, ++ SSP_PCAP_ADJ_BIT_VREG2_V5_LOWPWR = 0x18004000, ++ SSP_PCAP_ADJ_BIT_VREG2_V6_LOWPWR = 0x18008000, ++ SSP_PCAP_ADJ_BIT_VREG2_V7_LOWPWR = 0x18010000, ++ SSP_PCAP_ADJ_BIT_VREG2_V8_LOWPWR = 0x18020000, ++ SSP_PCAP_ADJ_BIT_VREG2_V9_LOWPWR = 0x18040000, ++ SSP_PCAP_ADJ_BIT_VREG2_V10_LOWPWR = 0x18080000, ++ ++ SSP_PCAP_ADJ_BIT_AUX_VREG_VAUX1_EN = 0x1c000002, ++ SSP_PCAP_ADJ_BIT_AUX_VREG_VAUX1_0 = 0x1c000004, ++ SSP_PCAP_ADJ_BIT_AUX_VREG_VAUX1_1 = 0x1c000008, ++ SSP_PCAP_ADJ_BIT_AUX_VREG_VAUX2_EN = 0x1c000010, ++ SSP_PCAP_ADJ_BIT_AUX_VREG_VAUX2_0 = 0x1c000020, ++ SSP_PCAP_ADJ_BIT_AUX_VREG_VAUX2_1 = 0x1c000040, ++ SSP_PCAP_ADJ_BIT_AUX_VREG_VAUX3_EN = 0x1c000080, ++ SSP_PCAP_ADJ_BIT_AUX_VREG_VAUX3_0 = 0x1c000100, ++ SSP_PCAP_ADJ_BIT_AUX_VREG_VAUX3_1 = 0x1c000200, ++ SSP_PCAP_ADJ_BIT_AUX_VREG_VAUX3_2 = 0x1c000400, ++ SSP_PCAP_ADJ_BIT_AUX_VREG_VAUX3_3 = 0x1c000800, ++ SSP_PCAP_ADJ_BIT_AUX_VREG_VAUX4_EN = 0x1c001000, ++ SSP_PCAP_ADJ_BIT_AUX_VREG_VAUX4_0 = 0x1c002000, ++ SSP_PCAP_ADJ_BIT_AUX_VREG_VAUX4_1 = 0x1c004000, ++ SSP_PCAP_ADJ_BIT_AUX_VREG_VSIM2_EN = 0x1c010000, ++ SSP_PCAP_ADJ_BIT_AUX_VREG_VSIM_EN = 0x1c020000, ++ SSP_PCAP_ADJ_BIT_AUX_VREG_VSIM_0 = 0x1c040000, ++ SSP_PCAP_ADJ_BIT_AUX_VREG_V_VIB_EN = 0x1c080000, ++ SSP_PCAP_ADJ_BIT_AUX_VREG_V_VIB_0 = 0x1c100000, ++ SSP_PCAP_ADJ_BIT_AUX_VREG_V_VIB_1 = 0x1c200000, ++ SSP_PCAP_ADJ_BIT_AUX_VREG_VAUX1_STBY = 0x1c400000, ++ SSP_PCAP_ADJ_BIT_AUX_VREG_VAUX1_LOWPWR = 0x1c800000, ++ SSP_PCAP_ADJ_BIT_AUX_VREG_SW3_STBY = 0x1d000000, ++ ++ SSP_PCAP_ADJ_BIT_BATT_DAC_DAC0 = 0x20000001, ++ SSP_PCAP_ADJ_BIT_BATT_DAC_DAC1 = 0x20000002, ++ SSP_PCAP_ADJ_BIT_BATT_DAC_DAC2 = 0x20000004, ++ SSP_PCAP_ADJ_BIT_BATT_DAC_DAC3 = 0x20000008, ++ SSP_PCAP_ADJ_BIT_BATT_DAC_DAC4 = 0x20000010, ++ SSP_PCAP_ADJ_BIT_BATT_DAC_DAC5 = 0x20000020, ++ SSP_PCAP_ADJ_BIT_BATT_DAC_DAC6 = 0x20000040, ++ SSP_PCAP_ADJ_BIT_BATT_DAC_DAC7 = 0x20000080, ++ SSP_PCAP_ADJ_BIT_BATT_DAC_B_FDBK = 0x20000100, ++ SSP_PCAP_ADJ_BIT_BATT_DAC_EXT_ISENSE = 0x20000200, ++ SSP_PCAP_ADJ_BIT_BATT_DAC_V_COIN0 = 0x20000400, ++ SSP_PCAP_ADJ_BIT_BATT_DAC_V_COIN1 = 0x20000800, ++ SSP_PCAP_ADJ_BIT_BATT_DAC_V_COIN2 = 0x20001000, ++ SSP_PCAP_ADJ_BIT_BATT_DAC_V_COIN3 = 0x20002000, ++ SSP_PCAP_ADJ_BIT_BATT_DAC_I_COIN = 0x20004000, ++ SSP_PCAP_ADJ_BIT_BATT_DAC_COIN_CH_EN = 0x20008000, ++ SSP_PCAP_ADJ_BIT_BATT_DAC_EOL_SEL0 = 0x20020000, ++ SSP_PCAP_ADJ_BIT_BATT_DAC_EOL_SEL1 = 0x20040000, ++ SSP_PCAP_ADJ_BIT_BATT_DAC_EOL_SEL2 = 0x20080000, ++ SSP_PCAP_ADJ_BIT_BATT_DAC_EOL_CMP_EN = 0x20100000, ++ SSP_PCAP_ADJ_BIT_BATT_DAC_BATT_DET_EN = 0x20200000, ++ SSP_PCAP_ADJ_BIT_BATT_DAC_THERMBIAS_CTRL = 0x20400000, ++ ++ SSP_PCAP_ADJ_BIT_ADC1_ADEN = 0x24000001, ++ SSP_PCAP_ADJ_BIT_ADC1_RAND = 0x24000002, ++ SSP_PCAP_ADJ_BIT_ADC1_AD_SEL1 = 0x24000004, ++ SSP_PCAP_ADJ_BIT_ADC1_AD_SEL2 = 0x24000008, ++ SSP_PCAP_ADJ_BIT_ADC1_ADA10 = 0x24000010, ++ SSP_PCAP_ADJ_BIT_ADC1_ADA11 = 0x24000020, ++ SSP_PCAP_ADJ_BIT_ADC1_ADA12 = 0x24000040, ++ SSP_PCAP_ADJ_BIT_ADC1_ADA20 = 0x24000080, ++ SSP_PCAP_ADJ_BIT_ADC1_ADA21 = 0x24000100, ++ SSP_PCAP_ADJ_BIT_ADC1_ADA22 = 0x24000200, ++ SSP_PCAP_ADJ_BIT_ADC1_ATO0 = 0x24000400, ++ SSP_PCAP_ADJ_BIT_ADC1_ATO1 = 0x24000800, ++ SSP_PCAP_ADJ_BIT_ADC1_ATO2 = 0x24001000, ++ SSP_PCAP_ADJ_BIT_ADC1_ATO3 = 0x24002000, ++ SSP_PCAP_ADJ_BIT_ADC1_ATOX = 0x24004000, ++ SSP_PCAP_ADJ_BIT_ADC1_MTR1 = 0x24008000, ++ SSP_PCAP_ADJ_BIT_ADC1_MTR2 = 0x24010000, ++ SSP_PCAP_ADJ_BIT_ADC1_TS_M0 = 0x24020000, ++ SSP_PCAP_ADJ_BIT_ADC1_TS_M1 = 0x24040000, ++ SSP_PCAP_ADJ_BIT_ADC1_TS_M2 = 0x24080000, ++ SSP_PCAP_ADJ_BIT_ADC1_TS_REF_LOWPWR = 0x24100000, ++ SSP_PCAP_ADJ_BIT_ADC1_TS_REFENB = 0x24200000, ++ SSP_PCAP_ADJ_BIT_ADC1_BATT_I_POLARITY = 0x24400000, ++ SSP_PCAP_ADJ_BIT_ADC1_BATT_I_ADC = 0x24800000, ++ ++ SSP_PCAP_ADJ_BIT_ADC2_ADD10 = 0x28000001, ++ SSP_PCAP_ADJ_BIT_ADC2_ADD11 = 0x28000002, ++ SSP_PCAP_ADJ_BIT_ADC2_ADD12 = 0x28000004, ++ SSP_PCAP_ADJ_BIT_ADC2_ADD13 = 0x28000008, ++ SSP_PCAP_ADJ_BIT_ADC2_ADD14 = 0x28000010, ++ SSP_PCAP_ADJ_BIT_ADC2_ADD15 = 0x28000020, ++ SSP_PCAP_ADJ_BIT_ADC2_ADD16 = 0x28000040, ++ SSP_PCAP_ADJ_BIT_ADC2_ADD17 = 0x28000080, ++ SSP_PCAP_ADJ_BIT_ADC2_ADD18 = 0x28000100, ++ SSP_PCAP_ADJ_BIT_ADC2_ADD19 = 0x28000200, ++ SSP_PCAP_ADJ_BIT_ADC2_ADD20 = 0x28000400, ++ SSP_PCAP_ADJ_BIT_ADC2_ADD21 = 0x28000800, ++ SSP_PCAP_ADJ_BIT_ADC2_ADD22 = 0x28001000, ++ SSP_PCAP_ADJ_BIT_ADC2_ADD23 = 0x28002000, ++ SSP_PCAP_ADJ_BIT_ADC2_ADD24 = 0x28004000, ++ SSP_PCAP_ADJ_BIT_ADC2_ADD25 = 0x28008000, ++ SSP_PCAP_ADJ_BIT_ADC2_ADD26 = 0x28010000, ++ SSP_PCAP_ADJ_BIT_ADC2_ADD27 = 0x28020000, ++ SSP_PCAP_ADJ_BIT_ADC2_ADD28 = 0x28040000, ++ SSP_PCAP_ADJ_BIT_ADC2_ADD29 = 0x28080000, ++ SSP_PCAP_ADJ_BIT_ADC2_ADINC1 = 0x28100000, ++ SSP_PCAP_ADJ_BIT_ADC2_ADINC2 = 0x28200000, ++ SSP_PCAP_ADJ_BIT_ADC2_ASC = 0x28400000, ++ ++ SSP_PCAP_ADJ_BIT_AUD_CODEC_AUDIHPF = 0x2c000001, ++ SSP_PCAP_ADJ_BIT_AUD_CODEC_SMB = 0x2c000002, ++ SSP_PCAP_ADJ_BIT_AUD_CODEC_AUDOHPF = 0x2c000004, ++ SSP_PCAP_ADJ_BIT_AUD_CODEC_CD_TS = 0x2c000008, ++ SSP_PCAP_ADJ_BIT_AUD_CODEC_DLM = 0x2c000010, ++ SSP_PCAP_ADJ_BIT_AUD_CODEC_ADITH = 0x2c000020, ++ SSP_PCAP_ADJ_BIT_AUD_CODEC_CDC_CLK0 = 0x2c000040, ++ SSP_PCAP_ADJ_BIT_AUD_CODEC_CDC_CLK1 = 0x2c000080, ++ SSP_PCAP_ADJ_BIT_AUD_CODEC_CDC_CLK2 = 0x2c000100, ++ SSP_PCAP_ADJ_BIT_AUD_CODEC_CLK_INV = 0x2c000200, ++ SSP_PCAP_ADJ_BIT_AUD_CODEC_FS_INV = 0x2c000400, ++ SSP_PCAP_ADJ_BIT_AUD_CODEC_DF_RESET = 0x2c000800, ++ SSP_PCAP_ADJ_BIT_AUD_CODEC_CDC_EN = 0x2c001000, ++ SSP_PCAP_ADJ_BIT_AUD_CODEC_CDC_CLK_EN = 0x2c002000, ++ SSP_PCAP_ADJ_BIT_AUD_CODEC_FS_8K_16K = 0x2c004000, ++ SSP_PCAP_ADJ_BIT_AUD_CODEC_DIG_AUD_IN = 0x2c008000, ++ SSP_PCAP_ADJ_BIT_AUD_CODEC_CLK_IN_SEL = 0x2c010000, ++ SSP_PCAP_ADJ_BIT_AUD_CODEC_MIC2_MUX = 0x2c020000, ++ SSP_PCAP_ADJ_BIT_AUD_CODEC_MIC2IG0 = 0x2c040000, ++ SSP_PCAP_ADJ_BIT_AUD_CODEC_MIC2IG1 = 0x2c080000, ++ SSP_PCAP_ADJ_BIT_AUD_CODEC_MIC2IG2 = 0x2c100000, ++ SSP_PCAP_ADJ_BIT_AUD_CODEC_MIC2IG3 = 0x2c200000, ++ SSP_PCAP_ADJ_BIT_AUD_CODEC_MIC2IG4 = 0x2c400000, ++ SSP_PCAP_ADJ_BIT_AUD_CODEC_MIC2IG_PRI_ADJ = 0x2c800000, ++ SSP_PCAP_ADJ_BIT_AUD_CODEC_CDC_PRI_ADJ = 0x2c200000, ++ ++ SSP_PCAP_ADJ_BIT_AUD_RX_AMPS_A1_EN = 0x30000001, ++ SSP_PCAP_ADJ_BIT_AUD_RX_AMPS_A2_EN = 0x30000002, ++ SSP_PCAP_ADJ_BIT_AUD_RX_AMPS_A4_EN = 0x30000010, ++ SSP_PCAP_ADJ_BIT_AUD_RX_AMPS_ARIGHT_EN = 0x30000020, ++ SSP_PCAP_ADJ_BIT_AUD_RX_AMPS_ALEFT_EN = 0x30000040, ++ SSP_PCAP_ADJ_BIT_AUD_RX_AMPS_CD_BYP = 0x30000080, ++ SSP_PCAP_ADJ_BIT_AUD_RX_AMPS_CDC_SW = 0x30000100, ++ SSP_PCAP_ADJ_BIT_AUD_RX_AMPS_ST_DAC_SW = 0x30000200, ++ SSP_PCAP_ADJ_BIT_AUD_RX_AMPS_PGA_IN_SW = 0x30000400, ++ SSP_PCAP_ADJ_BIT_AUD_RX_AMPS_PGA_R_EN = 0x30000800, ++ SSP_PCAP_ADJ_BIT_AUD_RX_AMPS_PGA_L_EN = 0x30001000, ++ SSP_PCAP_ADJ_BIT_AUD_RX_AMPS_AUDOG0 = 0x30002000, ++ SSP_PCAP_ADJ_BIT_AUD_RX_AMPS_AUDOG1 = 0x30004000, ++ SSP_PCAP_ADJ_BIT_AUD_RX_AMPS_AUDOG2 = 0x30008000, ++ SSP_PCAP_ADJ_BIT_AUD_RX_AMPS_AUDOG3 = 0x30010000, ++ SSP_PCAP_ADJ_BIT_AUD_RX_AMPS_A1CTRL = 0x30020000, ++ SSP_PCAP_ADJ_BIT_AUD_RX_AMPS_MONO0 = 0x30080000, ++ SSP_PCAP_ADJ_BIT_AUD_RX_AMPS_MONO1 = 0x30100000, ++ SSP_PCAP_ADJ_BIT_AUD_RX_AMPS_AUDOG_PRI_ADJ = 0x30200000, ++ SSP_PCAP_ADJ_BIT_AUD_RX_AMPS_MONO_PRI_ADJ = 0x30400000, ++ SSP_PCAP_ADJ_BIT_AUD_RX_AMPS_RX_PRI_ADJ0 = 0x30800000, ++ SSP_PCAP_ADJ_BIT_AUD_RX_AMPS_RX_PRI_ADJ1 = 0x31000000, ++ ++ SSP_PCAP_ADJ_BIT_ST_DAC_SMB_ST_DAC = 0x34000001, ++ SSP_PCAP_ADJ_BIT_ST_DAC_STDET_EN = 0x34000002, ++ SSP_PCAP_ADJ_BIT_ST_DAC_ST_CLK0 = 0x34000004, ++ SSP_PCAP_ADJ_BIT_ST_DAC_ST_CLK1 = 0x34000008, ++ SSP_PCAP_ADJ_BIT_ST_DAC_ST_CLK2 = 0x34000010, ++ SSP_PCAP_ADJ_BIT_ST_DAC_ST_CLK_EN = 0x34000020, ++ SSP_PCAP_ADJ_BIT_ST_DAC_DF_RESET_ST_DAC = 0x34000040, ++ SSP_PCAP_ADJ_BIT_ST_DAC_ST_DAC_EN = 0x34000080, ++ SSP_PCAP_ADJ_BIT_ST_DAC_SR0 = 0x34000100, ++ SSP_PCAP_ADJ_BIT_ST_DAC_SR1 = 0x34000200, ++ SSP_PCAP_ADJ_BIT_ST_DAC_SR2 = 0x34000400, ++ SSP_PCAP_ADJ_BIT_ST_DAC_SR3 = 0x34000800, ++ SSP_PCAP_ADJ_BIT_ST_DAC_DIG_AUD_IN_ST_DAC = 0x34001000, ++ SSP_PCAP_ADJ_BIT_ST_DAC_DIG_AUD_FS0 = 0x34002000, ++ SSP_PCAP_ADJ_BIT_ST_DAC_DIG_AUD_FS1 = 0x34004000, ++ SSP_PCAP_ADJ_BIT_ST_DAC_BCLK0 = 0x34008000, ++ SSP_PCAP_ADJ_BIT_ST_DAC_BCLK1 = 0x34010000, ++ SSP_PCAP_ADJ_BIT_ST_DAC_ST_CLK_INV = 0x34020000, ++ SSP_PCAP_ADJ_BIT_ST_DAC_ST_FS_INV = 0x34040000, ++ SSP_PCAP_ADJ_BIT_ST_DAC_ST_DAC_CLK_IN_SEL = 0x34080000, ++ SSP_PCAP_ADJ_BIT_ST_DAC_ST_DAC_PRI_ADJ = 0x35000000, ++ ++ SSP_PCAP_ADJ_BIT_BUSCTRL_FSENB = 0x50000001, ++ SSP_PCAP_ADJ_BIT_BUSCTRL_USB_SUSPEND = 0x50000002, ++ SSP_PCAP_ADJ_BIT_BUSCTRL_USB_PU = 0x50000004, ++ SSP_PCAP_ADJ_BIT_BUSCTRL_USB_PD = 0x50000008, ++ SSP_PCAP_ADJ_BIT_BUSCTRL_VUSB_EN = 0x50000010, ++ SSP_PCAP_ADJ_BIT_BUSCTRL_USB_PS = 0x50000020, ++ SSP_PCAP_ADJ_BIT_BUSCTRL_VUSB_MSTR_EN = 0x50000040, ++ SSP_PCAP_ADJ_BIT_BUSCTRL_VBUS_PD_ENB = 0x50000080, ++ SSP_PCAP_ADJ_BIT_BUSCTRL_CURRLIM = 0x50000100, ++ SSP_PCAP_ADJ_BIT_BUSCTRL_RS232ENB = 0x50000200, ++ SSP_PCAP_ADJ_BIT_BUSCTRL_RS232_DIR = 0x50000400, ++ SSP_PCAP_ADJ_BIT_BUSCTRL_SE0_CONN = 0x50000800, ++ SSP_PCAP_ADJ_BIT_BUSCTRL_USB_PDM = 0x50001000, ++ SSP_PCAP_ADJ_BIT_BUSCTRL_BUS_PRI_ADJ = 0x51000000, ++ ++ SSP_PCAP_ADJ_BIT_PERIPH_BL_CTRL0 = 0x54000001, ++ SSP_PCAP_ADJ_BIT_PERIPH_BL_CTRL1 = 0x54000002, ++ SSP_PCAP_ADJ_BIT_PERIPH_BL_CTRL2 = 0x54000004, ++ SSP_PCAP_ADJ_BIT_PERIPH_BL_CTRL3 = 0x54000008, ++ SSP_PCAP_ADJ_BIT_PERIPH_BL_CTRL4 = 0x54000010, ++ SSP_PCAP_ADJ_BIT_PERIPH_LEDR_EN = 0x54000020, ++ SSP_PCAP_ADJ_BIT_PERIPH_LEDG_EN = 0x54000040, ++ SSP_PCAP_ADJ_BIT_PERIPH_LEDR_CTRL0 = 0x54000080, ++ SSP_PCAP_ADJ_BIT_PERIPH_LEDR_CTRL1 = 0x54000100, ++ SSP_PCAP_ADJ_BIT_PERIPH_LEDR_CTRL2 = 0x54000200, ++ SSP_PCAP_ADJ_BIT_PERIPH_LEDR_CTRL3 = 0x54000400, ++ SSP_PCAP_ADJ_BIT_PERIPH_LEDG_CTRL0 = 0x54000800, ++ SSP_PCAP_ADJ_BIT_PERIPH_LEDG_CTRL1 = 0x54001000, ++ SSP_PCAP_ADJ_BIT_PERIPH_LEDG_CTRL2 = 0x54002000, ++ SSP_PCAP_ADJ_BIT_PERIPH_LEDG_CTRL3 = 0x54004000, ++ SSP_PCAP_ADJ_BIT_PERIPH_LEDR_I0 = 0x54008000, ++ SSP_PCAP_ADJ_BIT_PERIPH_LEDR_I1 = 0x54010000, ++ SSP_PCAP_ADJ_BIT_PERIPH_LEDG_I0 = 0x54020000, ++ SSP_PCAP_ADJ_BIT_PERIPH_LEDG_I1 = 0x54040000, ++ SSP_PCAP_ADJ_BIT_PERIPH_SKIP = 0x54080000, ++ SSP_PCAP_ADJ_BIT_PERIPH_BL2_CTRL0 = 0x54100000, ++ SSP_PCAP_ADJ_BIT_PERIPH_BL2_CTRL1 = 0x54200000, ++ SSP_PCAP_ADJ_BIT_PERIPH_BL2_CTRL2 = 0x54400000, ++ SSP_PCAP_ADJ_BIT_PERIPH_BL2_CTRL3 = 0x54800000, ++ SSP_PCAP_ADJ_BIT_PERIPH_BL2_CTRL4 = 0x55000000, ++ ++ SSP_PCAP_ADJ_BIT_LOWPWR_CTRL_VAUX2_STBY = 0x60000001, ++ SSP_PCAP_ADJ_BIT_LOWPWR_CTRL_VAUX2_LOWPWR = 0x60000002, ++ SSP_PCAP_ADJ_BIT_LOWPWR_CTRL_VAUX3_STBY = 0x60000004, ++ SSP_PCAP_ADJ_BIT_LOWPWR_CTRL_VAUX3_LOWPWR = 0x60000008, ++ SSP_PCAP_ADJ_BIT_LOWPWR_CTRL_VAUX4_STBY = 0x60000010, ++ SSP_PCAP_ADJ_BIT_LOWPWR_CTRL_VAUX4_LOWPWR = 0x60000020, ++ SSP_PCAP_ADJ_BIT_LOWPWR_CTRL_VSIM_LOWPWR = 0x60000040, ++ SSP_PCAP_ADJ_BIT_LOWPWR_CTRL_VSIM2_LOWPWR = 0x60000080, ++ SSP_PCAP_ADJ_BIT_LOWPWR_CTRL_SW1_MODE00 = 0x60000100, ++ SSP_PCAP_ADJ_BIT_LOWPWR_CTRL_SW1_MODE01 = 0x60000200, ++ SSP_PCAP_ADJ_BIT_LOWPWR_CTRL_SW1_MODE10 = 0x60000400, ++ SSP_PCAP_ADJ_BIT_LOWPWR_CTRL_SW1_MODE11 = 0x60000800, ++ SSP_PCAP_ADJ_BIT_LOWPWR_CTRL_SW10_DVS = 0x60001000, ++ SSP_PCAP_ADJ_BIT_LOWPWR_CTRL_SW11_DVS = 0x60002000, ++ SSP_PCAP_ADJ_BIT_LOWPWR_CTRL_SW12_DVS = 0x60004000, ++ SSP_PCAP_ADJ_BIT_LOWPWR_CTRL_SW13_DVS = 0x60008000, ++ SSP_PCAP_ADJ_BIT_LOWPWR_CTRL_SW2_MODE00 = 0x60010000, ++ SSP_PCAP_ADJ_BIT_LOWPWR_CTRL_SW2_MODE01 = 0x60020000, ++ SSP_PCAP_ADJ_BIT_LOWPWR_CTRL_SW2_MODE10 = 0x60040000, ++ SSP_PCAP_ADJ_BIT_LOWPWR_CTRL_SW2_MODE11 = 0x60080000, ++ SSP_PCAP_ADJ_BIT_LOWPWR_CTRL_SW20_DVS = 0x60100000, ++ SSP_PCAP_ADJ_BIT_LOWPWR_CTRL_SW21_DVS = 0x60200000, ++ SSP_PCAP_ADJ_BIT_LOWPWR_CTRL_SW22_DVS = 0x60400000, ++ SSP_PCAP_ADJ_BIT_LOWPWR_CTRL_SW23_DVS = 0x60800000, ++ SSP_PCAP_ADJ_BIT_LOWPWR_CTRL_VC_STBY = 0x61000000, ++ ++ SSP_PCAP_ADJ_BIT_TX_AUD_AMPS_AUDIG0 = 0x68000001, ++ SSP_PCAP_ADJ_BIT_TX_AUD_AMPS_AUDIG1 = 0x68000002, ++ SSP_PCAP_ADJ_BIT_TX_AUD_AMPS_AUDIG2 = 0x68000004, ++ SSP_PCAP_ADJ_BIT_TX_AUD_AMPS_AUDIG3 = 0x68000008, ++ SSP_PCAP_ADJ_BIT_TX_AUD_AMPS_AUDIG4 = 0x68000010, ++ SSP_PCAP_ADJ_BIT_TX_AUD_AMPS_A3_EN = 0x68000020, ++ SSP_PCAP_ADJ_BIT_TX_AUD_AMPS_A3_MUX = 0x68000040, ++ SSP_PCAP_ADJ_BIT_TX_AUD_AMPS_A5_EN = 0x68000080, ++ SSP_PCAP_ADJ_BIT_TX_AUD_AMPS_A5_MUX = 0x68000100, ++ SSP_PCAP_ADJ_BIT_TX_AUD_AMPS_EXT_MIC_MUX = 0x68000200, ++ SSP_PCAP_ADJ_BIT_TX_AUD_AMPS_MB_ON2 = 0x68000400, ++ SSP_PCAP_ADJ_BIT_TX_AUD_AMPS_MB_ON1 = 0x68000800, ++ SSP_PCAP_ADJ_BIT_TX_AUD_AMPS_A1ID_TX = 0x68001000, ++ SSP_PCAP_ADJ_BIT_TX_AUD_AMPS_A1_CONFIG = 0x68002000, ++ SSP_PCAP_ADJ_BIT_TX_AUD_AMPS_AHS_CONFIG = 0x68004000, ++ SSP_PCAP_ADJ_BIT_TX_AUD_AMPS_A2_CONFIG = 0x68008000, ++ SSP_PCAP_ADJ_BIT_TX_AUD_AMPS_AUDIO_LOWPWR = 0x68080000, ++ SSP_PCAP_ADJ_BIT_TX_AUD_AMPS_AUDIO_STBY = 0x68100000, ++ SSP_PCAP_ADJ_BIT_TX_AUD_AMPS_V2_EN_2 = 0x68200000, ++ SSP_PCAP_ADJ_BIT_TX_AUD_AMPS_AUDIG_PRI_ADJ = 0x68400000, ++ SSP_PCAP_ADJ_BIT_TX_AUD_AMPS_TX_PRI_ADJ0 = 0x68800000, ++ SSP_PCAP_ADJ_BIT_TX_AUD_AMPS_TX_PRI_ADJ1 = 0x69000000, ++ ++ SSP_PCAP_ADJ_BIT_SYS_RST_CLR = 0x6c000001, ++ SSP_PCAP_ADJ_BIT_SYS_RST_MODE0 = 0x6c000002, ++ SSP_PCAP_ADJ_BIT_SYS_RST_MODE1 = 0x6c000004, ++ SSP_PCAP_ADJ_BIT_SYS_VFLASH_0 = 0x6c000008, ++ SSP_PCAP_ADJ_BIT_SYS_VFLASH_1 = 0x6c000010, ++ SSP_PCAP_ADJ_BIT_SYS_MID_SELECT = 0x6c000020, ++ SSP_PCAP_ADJ_BIT_SYS_MID_FET = 0x6c000040, ++ SSP_PCAP_ADJ_BIT_SYS_MAIN_LOW = 0x6c000080, ++ SSP_PCAP_ADJ_BIT_SYS_BATTFB_DIS = 0x6c000100, ++ SSP_PCAP_ADJ_BIT_SYS_GP_REG9 = 0x6c000200, ++ SSP_PCAP_ADJ_BIT_SYS_GP_REG10 = 0x6c000400, ++ SSP_PCAP_ADJ_BIT_SYS_GP_REG11 = 0x6c000800, ++ SSP_PCAP_ADJ_BIT_SYS_GP_REG12 = 0x6c001000, ++ SSP_PCAP_ADJ_BIT_SYS_GP_REG13 = 0x6c002000, ++ SSP_PCAP_ADJ_BIT_SYS_GP_REG14 = 0x6c004000, ++ SSP_PCAP_ADJ_BIT_SYS_GP_REG15 = 0x6c008000, ++ SSP_PCAP_ADJ_BIT_SYS_GP_REG16 = 0x6c010000, ++ SSP_PCAP_ADJ_BIT_SYS_GP_REG17 = 0x6c020000, ++ SSP_PCAP_ADJ_BIT_SYS_GP_REG18 = 0x6c040000, ++ SSP_PCAP_ADJ_BIT_SYS_GP_REG19 = 0x6c080000, ++ SSP_PCAP_ADJ_BIT_SYS_GP_REG20 = 0x6c100000, ++ SSP_PCAP_ADJ_BIT_SYS_GP_REG21 = 0x6c200000, ++ SSP_PCAP_ADJ_BIT_SYS_GP_REG22 = 0x6c400000, ++ SSP_PCAP_ADJ_BIT_SYS_GP_REG23 = 0x6c800000, ++ SSP_PCAP_ADJ_BIT_SYS_GP_REG24 = 0x6d000000 ++ ++}SSP_PCAP_SECONDARY_PROCESSOR_REGISTER_BIT_TYPE; ++ ++/************************ FUNCTION PROTOTYPES **************************************/ ++extern void ssp_pcap_init(void); ++extern void ssp_pcap_release(void); ++ ++extern void ssp_pcap_open(SSP_PCAP_INIT_DRIVER_TYPE portType); ++extern void ssp_pcap_close(void); ++ ++extern void ssp_pcap_intoSleep_callBack(void); ++extern void ssp_pcap_wakeUp_callBack(void); ++ ++ ++extern SSP_PCAP_STATUS SSP_PCAP_write_data_to_PCAP(SSP_PCAP_SECONDARY_PROCESSOR_REGISTER ssp_pcap_register,U32 ssp_pcap_register_value); ++extern SSP_PCAP_STATUS SSP_PCAP_read_data_from_PCAP(SSP_PCAP_SECONDARY_PROCESSOR_REGISTER ssp_pcap_register,P_U32 p_ssp_pcap_register_value); ++ ++extern SSP_PCAP_STATUS SSP_PCAP_bit_set(SSP_PCAP_SECONDARY_PROCESSOR_REGISTER_BIT_TYPE ssp_pcap_bit ) ; ++extern SSP_PCAP_STATUS SSP_PCAP_bit_clean(SSP_PCAP_SECONDARY_PROCESSOR_REGISTER_BIT_TYPE ssp_pcap_bit ) ; ++extern SSP_PCAP_BIT_STATUS SSP_PCAP_get_bit_from_buffer(SSP_PCAP_SECONDARY_PROCESSOR_REGISTER_BIT_TYPE ssp_pcap_bit ) ; ++extern SSP_PCAP_BIT_STATUS SSP_PCAP_get_bit_from_PCAP(SSP_PCAP_SECONDARY_PROCESSOR_REGISTER_BIT_TYPE ssp_pcap_bit ) ; ++extern U32 SSP_PCAP_get_register_value_from_buffer(SSP_PCAP_SECONDARY_PROCESSOR_REGISTER ssp_pcap_register ) ; ++ ++extern SSP_PCAP_STATUS SSP_PCAP_TSI_mode_set(TOUCH_SCREEN_DETECT_TYPE mode_Type ); ++extern SSP_PCAP_STATUS SSP_PCAP_TSI_start_XY_read(void); ++extern SSP_PCAP_STATUS SSP_PCAP_TSI_get_XY_value(P_U16 p_x,P_U16 p_y); ++extern SSP_PCAP_STATUS SSP_PCAP_CDC_CLK_set(PHONE_CDC_CLOCK_TYPE clkType); ++ ++extern SSP_PCAP_STATUS SSP_PCAP_CDC_SR_set(ST_SAMPLE_RATE_TYPE srType); ++extern SSP_PCAP_STATUS SSP_PCAP_BCLK_set(ST_BCLK_TIME_SLOT_TYPE bclkType); ++extern SSP_PCAP_STATUS SSP_PCAP_STCLK_set(ST_CLK_TYPE stClkType); ++extern SSP_PCAP_STATUS SSP_PCAP_DIG_AUD_FS_set(DIG_AUD_MODE_TYPE fsType); ++extern SSP_PCAP_STATUS SSP_PCAP_AUDIG_set(U32 audioInGain); ++extern SSP_PCAP_STATUS SSP_PCAP_MONO_set(MONO_TYPE monoType); ++extern SSP_PCAP_STATUS SSP_PCAP_AUDOG_set(U32 audioOutGain); ++ ++extern SSP_PCAP_STATUS SSP_PCAP_V_VIB_level_set(VibratorVoltageLevel_TYPE VIBLevelType); ++extern SSP_PCAP_STATUS SSP_PCAP_configure_USB_UART_transeiver(SSP_PCAP_PORT_TYPE portType); ++extern SSP_PCAP_BIT_STATUS SSP_PCAP_get_audio_in_status(void); ++ ++/* for log */ ++extern void pcap_log_add_pure_data(u8* pData,u32 len); ++extern void pcap_log_add_data(u8* pData,u32 len); ++ ++/* screen lock on/off handler */ ++extern void ssp_pcap_screenlock_lock(u32 data); ++extern void ssp_pcap_screenlock_unlock(u32 data); ++ ++#endif +Index: linux-2.6.20.7/include/asm-arm/arch-pxa/irqs.h +=================================================================== +--- linux-2.6.20.7.orig/include/asm-arm/arch-pxa/irqs.h 2007-04-21 08:26:32.000000000 -0300 ++++ linux-2.6.20.7/include/asm-arm/arch-pxa/irqs.h 2007-04-21 08:26:37.000000000 -0300 +@@ -176,7 +176,8 @@ + #define NR_IRQS (IRQ_LOCOMO_SPI_TEND + 1) + #elif defined(CONFIG_ARCH_LUBBOCK) || \ + defined(CONFIG_MACH_LOGICPD_PXA270) || \ +- defined(CONFIG_MACH_MAINSTONE) ++ defined(CONFIG_MACH_MAINSTONE) || \ ++ defined(CONFIG_PXA_EZX) + #define NR_IRQS (IRQ_BOARD_END) + #else + #define NR_IRQS (IRQ_BOARD_START) +@@ -222,3 +223,16 @@ + #define IRQ_LOCOMO_GPIO_BASE (IRQ_BOARD_START + 1) + #define IRQ_LOCOMO_LT_BASE (IRQ_BOARD_START + 2) + #define IRQ_LOCOMO_SPI_BASE (IRQ_BOARD_START + 3) ++ ++/* EZX Interrupts (CONFIG_EZX) */ ++#define EZX_IRQ(x) (IRQ_BOARD_START + (x)) ++#define EZX_IRQ_ADCDONE EZX_IRQ(0) /* PCAP */ ++#define EZX_IRQ_TS EZX_IRQ(1) /* PCAP */ ++#define EZX_IRQ_USB4V EZX_IRQ(2) /* PCAP */ ++#define EZX_IRQ_USB1V EZX_IRQ(3) /* PCAP */ ++#define EZX_IRQ_HEADJACK EZX_IRQ(4) /* PCAP */ ++#define EZX_IRQ_MIC EZX_IRQ(5) /* PCAP */ ++#define EZX_IRQ_ADCDONE2 EZX_IRQ(6) /* PCAP */ ++#define EZX_IRQ_ONOFF EZX_IRQ(7) ++#define EZX_IRQ_ONOFF2 EZX_IRQ(8) ++ +Index: linux-2.6.20.7/arch/arm/mach-pxa/Makefile +=================================================================== +--- linux-2.6.20.7.orig/arch/arm/mach-pxa/Makefile 2007-04-21 08:26:37.000000000 -0300 ++++ linux-2.6.20.7/arch/arm/mach-pxa/Makefile 2007-04-21 08:45:09.000000000 -0300 +@@ -18,7 +18,7 @@ + obj-$(CONFIG_MACH_AKITA) += akita-ioexp.o + obj-$(CONFIG_MACH_POODLE) += poodle.o corgi_ssp.o + obj-$(CONFIG_MACH_TOSA) += tosa.o +-obj-$(CONFIG_PXA_EZX) += ezx.o ezx_lcd.o ezx_ssp.o ++obj-$(CONFIG_PXA_EZX) += ezx.o ezx_lcd.o ezx_ssp.o ezx-pcap.o + + # Support for blinky lights + led-y := leds.o +Index: linux-2.6.20.7/arch/arm/mach-pxa/ezx.c +=================================================================== +--- linux-2.6.20.7.orig/arch/arm/mach-pxa/ezx.c 2007-04-21 08:26:37.000000000 -0300 ++++ linux-2.6.20.7/arch/arm/mach-pxa/ezx.c 2007-04-21 08:51:15.000000000 -0300 +@@ -73,6 +73,24 @@ + .clk_pcap = 1, + }; + ++/* PCAP */ ++static struct resource ezxpcap_resources[] = { ++ [0] = { ++ .start = IRQ_GPIO1, ++ .end = IRQ_GPIO1, ++ .flags = IORESOURCE_IRQ, ++ }, ++}; ++ ++struct platform_device ezxpcap_device = { ++ .name = "ezx-pcap", ++ .id = -1, ++ .dev = { ++ .parent = &ezxssp_device.dev, ++ }, ++ .num_resources = ARRAY_SIZE(ezxpcap_resources), ++ .resource = ezxpcap_resources, ++}; + + /* OHCI Controller */ + +@@ -236,7 +254,7 @@ + }; + + +-static struct resource ezx_bp_resources[] = { ++static struct resource ezxbp_resources[] = { + [0] = { + .start = GPIO_BP_RDY, + .end = GPIO_BP_RDY, +@@ -256,15 +274,15 @@ + #endif + }; + +-static struct platform_device ezx_bp_device = { ++static struct platform_device ezxbp_device = { + .name = "ezx-bp", + .dev = { + //.parent = + //.platform_data = + }, + .id = -1, +- .num_resources = ARRAY_SIZE(ezx_bp_resources), +- .resource = ezx_bp_resources, ++ .num_resources = ARRAY_SIZE(ezxbp_resources), ++ .resource = ezxbp_resources, + }; + + static void __init ezx_init_gpio_irq(void) +@@ -297,7 +315,8 @@ + + static struct platform_device *devices[] __initdata = { + &ezxssp_device, +- &ezx_bp_device, ++ &ezxpcap_device, ++ &ezxbp_device, + }; + + static void __init a780_init(void) diff --git a/packages/linux/linux-ezx-2.6.21/ezx-serial-bug-workaround.patch b/packages/linux/linux-ezx-2.6.21/ezx-serial-bug-workaround.patch new file mode 100644 index 0000000000..9f30cc35fe --- /dev/null +++ b/packages/linux/linux-ezx-2.6.21/ezx-serial-bug-workaround.patch @@ -0,0 +1,45 @@ +Work around some errata in the pxa serial code (copied from motorolas 2.4.x tree) + +Index: linux-2.6.20.7/drivers/serial/pxa.c +=================================================================== +--- linux-2.6.20.7.orig/drivers/serial/pxa.c 2007-04-21 13:57:46.000000000 -0300 ++++ linux-2.6.20.7/drivers/serial/pxa.c 2007-04-21 14:05:03.000000000 -0300 +@@ -29,6 +29,10 @@ + #define SUPPORT_SYSRQ + #endif + ++#define pxa_buggy_port(x) ({ \ ++ int cpu_ver; asm("mrc%? p15, 0, %0, c0, c0" : "=r" (cpu_ver)); \ ++ ((x) == PORT_PXA && (cpu_ver & ~1) == 0x69052100); }) ++ + #include <linux/module.h> + #include <linux/ioport.h> + #include <linux/init.h> +@@ -195,7 +199,7 @@ + if (uart_circ_empty(xmit)) + serial_pxa_stop_tx(&up->port); + } +- ++static inline irqreturn_t serial_pxa_irq(int, void *); + static void serial_pxa_start_tx(struct uart_port *port) + { + struct uart_pxa_port *up = (struct uart_pxa_port *)port; +@@ -203,6 +207,8 @@ + if (!(up->ier & UART_IER_THRI)) { + up->ier |= UART_IER_THRI; + serial_out(up, UART_IER, up->ier); ++ if (pxa_buggy_port(up->port.type)) ++ serial_pxa_irq(up->port.irq, NULL); + } + } + +@@ -298,6 +304,9 @@ + + mcr |= up->mcr; + ++ if (pxa_buggy_port(up->port.type) && up->port.irq != 0) ++ mcr ^= UART_MCR_OUT2; ++ + serial_out(up, UART_MCR, mcr); + } + diff --git a/packages/linux/linux-ezx-2.6.21/mux-fix-init-errorpath.patch b/packages/linux/linux-ezx-2.6.21/mux-fix-init-errorpath.patch new file mode 100644 index 0000000000..716ef86fd1 --- /dev/null +++ b/packages/linux/linux-ezx-2.6.21/mux-fix-init-errorpath.patch @@ -0,0 +1,20 @@ +Index: linux-2.6.16/drivers/char/ts0710_mux_usb.c +=================================================================== +--- linux-2.6.16.orig/drivers/char/ts0710_mux_usb.c 2007-01-17 00:10:32.000000000 +0100 ++++ linux-2.6.16/drivers/char/ts0710_mux_usb.c 2007-01-17 00:42:23.000000000 +0100 +@@ -811,7 +811,6 @@ + /*init the related mux interface*/ + if (!(bvd_ipc = kzalloc(sizeof(struct ipc_usb_data), GFP_KERNEL))) { + err("usb_ipc_init: Out of memory."); +- usb_deregister(&usb_ipc_driver); + return -ENOMEM; + } + bvd_dbg("usb_ipc_init: Address of bvd_ipc:%p", bvd_ipc); +@@ -819,7 +818,6 @@ + if (!(bvd_ipc->xmit.buf = kmalloc(IPC_USB_XMIT_SIZE, GFP_KERNEL))) { + err("usb_ipc_init: Not enough memory for the input buffer."); + kfree(bvd_ipc); +- usb_deregister(&usb_ipc_driver); + return -ENOMEM; + } + bvd_dbg("usb_ipc_init: bvd_ipc->xmit.buf address:%p", diff --git a/packages/linux/linux-ezx-2.6.21/mux-fix-makefile.patch b/packages/linux/linux-ezx-2.6.21/mux-fix-makefile.patch new file mode 100644 index 0000000000..31452da847 --- /dev/null +++ b/packages/linux/linux-ezx-2.6.21/mux-fix-makefile.patch @@ -0,0 +1,14 @@ +Index: linux-2.6.21/drivers/char/Makefile +=================================================================== +--- linux-2.6.21.orig/drivers/char/Makefile 2007-04-26 20:09:29.000000000 +0200 ++++ linux-2.6.21/drivers/char/Makefile 2007-04-26 20:09:46.000000000 +0200 +@@ -104,7 +104,8 @@ + obj-$(CONFIG_HANGCHECK_TIMER) += hangcheck-timer.o + obj-$(CONFIG_TCG_TPM) += tpm/ + +-obj-$(CONFIG_TS0710_MUX) += ts0710_mux.o ts0710_mux_usb.o ++obj-$(CONFIG_TS0710_MUX_USB) += ts0710_mux_usb.o ++obj-$(CONFIG_TS0710_MUX) += ts0710_mux.o + + + # Files generated that shall be removed upon make clean diff --git a/packages/linux/linux-ezx-2.6.21/mux-fix-tty-driver.patch b/packages/linux/linux-ezx-2.6.21/mux-fix-tty-driver.patch new file mode 100644 index 0000000000..2e1aabd952 --- /dev/null +++ b/packages/linux/linux-ezx-2.6.21/mux-fix-tty-driver.patch @@ -0,0 +1,125 @@ +Index: linux-2.6.20.7/drivers/char/ts0710_mux.c +=================================================================== +--- linux-2.6.20.7.orig/drivers/char/ts0710_mux.c 2007-04-22 10:51:31.000000000 +0200 ++++ linux-2.6.20.7/drivers/char/ts0710_mux.c 2007-04-22 10:53:05.000000000 +0200 +@@ -241,7 +241,8 @@ + static volatile __u8 mux_recv_info_flags[NR_MUXS]; + static mux_recv_struct *mux_recv_queue = NULL; + +-static struct tty_driver mux_driver; ++// Local for 2.6? ++static struct tty_driver *mux_driver; + + #ifdef USB_FOR_MUX + #define COMM_FOR_MUX_DRIVER usb_for_mux_driver +@@ -3007,6 +3008,7 @@ + #else + mux_tty[line]++; + dlci = tty2dlci[line]; ++ mux_table[line] = tty; + + /* if( dlci == 1 ) { */ + /* Open server channel 0 first */ +@@ -3087,6 +3089,7 @@ + } + } + ++ + retval = 0; + #endif + out: +@@ -3894,43 +3897,50 @@ + INIT_WORK(&receive_tqueue, receive_worker, NULL); + INIT_WORK(&post_recv_tqueue, post_recv_worker, NULL); + +- memset(&mux_driver, 0, sizeof(struct tty_driver)); +- memset(&mux_tty, 0, sizeof(mux_tty)); +- mux_driver.magic = TTY_DRIVER_MAGIC; +- mux_driver.driver_name = "ts0710mux"; +- mux_driver.name = "ts0710mux"; +- mux_driver.major = TS0710MUX_MAJOR; +- mux_driver.minor_start = TS0710MUX_MINOR_START; +- mux_driver.num = NR_MUXS; +- mux_driver.type = TTY_DRIVER_TYPE_SERIAL; +- mux_driver.subtype = SERIAL_TYPE_NORMAL; +- mux_driver.init_termios = tty_std_termios; +- mux_driver.init_termios.c_iflag = 0; +- mux_driver.init_termios.c_oflag = 0; +- mux_driver.init_termios.c_cflag = B38400 | CS8 | CREAD; +- mux_driver.init_termios.c_lflag = 0; +- mux_driver.flags = TTY_DRIVER_RESET_TERMIOS | TTY_DRIVER_REAL_RAW; +- +- mux_driver.ttys = mux_table; +- mux_driver.termios = mux_termios; +- mux_driver.termios_locked = mux_termios_locked; ++ mux_driver = alloc_tty_driver(NR_MUXS); ++ if (!mux_driver) ++ return -ENOMEM; ++ ++ mux_driver->owner = THIS_MODULE; ++ mux_driver->driver_name = "ts0710mux"; ++ mux_driver->name = "mux"; ++ mux_driver->devfs_name = "mux"; ++ mux_driver->major = TS0710MUX_MAJOR; ++ mux_driver->minor_start = TS0710MUX_MINOR_START; ++ mux_driver->type = TTY_DRIVER_TYPE_SERIAL; ++ mux_driver->subtype = SERIAL_TYPE_NORMAL; ++ mux_driver->flags = TTY_DRIVER_RESET_TERMIOS | TTY_DRIVER_REAL_RAW; ++ ++ mux_driver->init_termios = tty_std_termios; ++ mux_driver->init_termios.c_iflag = 0; ++ mux_driver->init_termios.c_oflag = 0; ++ mux_driver->init_termios.c_cflag = B38400 | CS8 | CREAD; ++ mux_driver->init_termios.c_lflag = 0; ++ ++// mux_driver.ttys = mux_table; ++ mux_driver->termios = mux_termios; ++ mux_driver->termios_locked = mux_termios_locked; + // mux_driver.driver_state = mux_state; +- mux_driver.other = NULL; ++ mux_driver->other = NULL; + +- mux_driver.open = mux_open; +- mux_driver.close = mux_close; +- mux_driver.write = mux_write; +- mux_driver.write_room = mux_write_room; +- mux_driver.flush_buffer = mux_flush_buffer; +- mux_driver.chars_in_buffer = mux_chars_in_buffer; +- mux_driver.throttle = mux_throttle; +- mux_driver.unthrottle = mux_unthrottle; +- mux_driver.ioctl = mux_ioctl; +- mux_driver.owner = THIS_MODULE; ++ mux_driver->open = mux_open; ++ mux_driver->close = mux_close; ++ mux_driver->write = mux_write; ++ mux_driver->write_room = mux_write_room; ++ mux_driver->flush_buffer = mux_flush_buffer; ++ mux_driver->chars_in_buffer = mux_chars_in_buffer; ++ mux_driver->throttle = mux_throttle; ++ mux_driver->unthrottle = mux_unthrottle; ++ mux_driver->ioctl = mux_ioctl; + +- if (tty_register_driver(&mux_driver)) ++ // FIXME: No panic() here ++ if (tty_register_driver(mux_driver)) + panic("Couldn't register mux driver"); + ++ for (j=0; j<NR_MUXS; j++) ++ tty_register_device(mux_driver, j, NULL); ++ ++ + COMM_MUX_DISPATCHER = mux_dispatcher; + COMM_MUX_SENDER = mux_sender; + +@@ -3964,7 +3974,10 @@ + mux_recv_info[j] = 0; + } + +- if (tty_unregister_driver(&mux_driver)) ++ for (j=0; j<NR_MUXS; j++) ++ tty_unregister_device(mux_driver, j); ++ ++ if (tty_unregister_driver(mux_driver)) + panic("Couldn't unregister mux driver"); + } + diff --git a/packages/linux/linux-ezx-2.6.21/mux-fix.patch b/packages/linux/linux-ezx-2.6.21/mux-fix.patch new file mode 100644 index 0000000000..b820762f41 --- /dev/null +++ b/packages/linux/linux-ezx-2.6.21/mux-fix.patch @@ -0,0 +1,164 @@ +Index: linux-2.6.20.7/drivers/char/ts0710_mux_usb.c +=================================================================== +--- linux-2.6.20.7.orig/drivers/char/ts0710_mux_usb.c 2007-04-21 18:07:45.000000000 +0200 ++++ linux-2.6.20.7/drivers/char/ts0710_mux_usb.c 2007-04-21 20:55:13.000000000 +0200 +@@ -626,7 +626,6 @@ + } + + interface = &intf->cur_altsetting->desc; +- endpoint = &intf->cur_altsetting->endpoint[0].desc; + /* Start checking for two bulk endpoints or ... FIXME: This is a future + * enhancement...*/ + bvd_dbg("usb_ipc_probe: Number of Endpoints:%d", +@@ -638,30 +637,26 @@ + + ep_cnt = have_bulk_in_mux = have_bulk_out_mux = 0; + +- bvd_dbg("usb_ipc_probe: endpoint[0] is:%x", +- (&endpoint[0])->bEndpointAddress); +- bvd_dbg("usb_ipc_probe: endpoint[1] is:%x ", +- (&endpoint[1])->bEndpointAddress); +- + while (ep_cnt < interface->bNumEndpoints) { +- +- if (!have_bulk_in_mux && IS_EP_BULK_IN(endpoint[ep_cnt])) { +- bvd_dbg("usb_ipc_probe: bEndpointAddress(IN) is:%x ", +- (&endpoint[ep_cnt])->bEndpointAddress); +- have_bulk_in_mux = +- (&endpoint[ep_cnt])->bEndpointAddress; +- readsize = (&endpoint[ep_cnt])->wMaxPacketSize; ++ endpoint = &intf->cur_altsetting->endpoint[ep_cnt].desc; ++ bvd_dbg("usb_ipc_probe: endpoint[%i] is: %x", ep_cnt, ++ endpoint->bEndpointAddress); ++ ++ if (!have_bulk_in_mux && IS_EP_BULK_IN(*endpoint)) { ++ bvd_dbg("usb_ipc_probe: bEndpointAddress(IN) is: %x ", ++ endpoint->bEndpointAddress); ++ have_bulk_in_mux = endpoint->bEndpointAddress; ++ readsize = endpoint->wMaxPacketSize; + bvd_dbg("usb_ipc_probe: readsize=%d", readsize); + ep_cnt++; + continue; + } + +- if (!have_bulk_out_mux && IS_EP_BULK_OUT(endpoint[ep_cnt])) { +- bvd_dbg("usb_ipc_probe: bEndpointAddress(OUT) is:%x ", +- (&endpoint[ep_cnt])->bEndpointAddress); +- have_bulk_out_mux = +- (&endpoint[ep_cnt])->bEndpointAddress; +- writesize = (&endpoint[ep_cnt])->wMaxPacketSize; ++ if (!have_bulk_out_mux && IS_EP_BULK_OUT(*endpoint)) { ++ bvd_dbg("usb_ipc_probe: bEndpointAddress(OUT) is: %x ", ++ endpoint->bEndpointAddress); ++ have_bulk_out_mux = endpoint->bEndpointAddress; ++ writesize = endpoint->wMaxPacketSize; + bvd_dbg("usb_ipc_probe: writesize=%d", writesize); + ep_cnt++; + continue; +@@ -718,21 +713,27 @@ + bvd_ipc->bh_bp.func = usbipc_bh_bp_func; + bvd_ipc->bh_bp.data = (unsigned long) bvd_ipc; + ++ bvd_dbg("after assignements"); + /*Build a write urb*/ ++ usb_init_urb(&bvd_ipc->writeurb_mux); + usb_fill_bulk_urb(&bvd_ipc->writeurb_mux, usbdev, + usb_sndbulkpipe(bvd_ipc->ipc_dev, + bvd_ipc->bulk_out_ep_mux), + bvd_ipc->obuf, writesize, usb_ipc_write_bulk, + bvd_ipc); + //bvd_ipc->writeurb_mux.transfer_flags |= USB_ASYNC_UNLINK; ++ bvd_dbg("after write urb"); + + /*Build a read urb and send a IN token first time*/ ++ usb_init_urb(&bvd_ipc->readurb_mux); + usb_fill_bulk_urb(&bvd_ipc->readurb_mux, usbdev, + usb_rcvbulkpipe(usbdev, bvd_ipc->bulk_in_ep_mux), + bvd_ipc->ibuf, readsize, usb_ipc_read_bulk, bvd_ipc); + //bvd_ipc->readurb_mux.transfer_flags |= USB_ASYNC_UNLINK; ++ bvd_dbg("after read urb"); + +- usb_driver_claim_interface(&usb_ipc_driver, intf, bvd_ipc); ++ //usb_driver_claim_interface(&usb_ipc_driver, intf, bvd_ipc); ++ bvd_dbg("after claim interface"); + //usb_driver_claim_interface(&usb_ipc_driver, &ipccfg->interface[1], bvd_ipc); + + // a2590c: dsplog is not supported by this driver +@@ -740,6 +741,8 @@ + // &ipccfg->interface[2], bvd_ipc); + /*send a IN token first time*/ + bvd_ipc->readurb_mux.dev = bvd_ipc->ipc_dev; ++ bvd_dbg("after assignement"); ++ + if (usb_submit_urb(&bvd_ipc->readurb_mux, GFP_ATOMIC)) + printk("usb_ipc_prob: usb_submit_urb(read mux bulk) failed!\n"); + +@@ -750,7 +753,7 @@ + tasklet_schedule(&bvd_ipc->bh); + } + +- printk("usb_ipc_probe: completed probe!"); ++ printk("usb_ipc_probe: completed probe!\n"); + usb_set_intfdata(intf, &bvd_ipc); + return 0; + } +@@ -760,21 +763,23 @@ + //struct usb_device *usbdev = interface_to_usbdev(intf); + struct ipc_usb_data *bvd_ipc_disconnect = usb_get_intfdata(intf); + +- printk("usb_ipc_disconnect:*** \n"); + ++ printk("usb_ipc_disconnect. bvd_ipc_disconnect address: %p\n", bvd_ipc_disconnect); ++ ++ //FIXME: Memory leak? + if ((UHCRHPS3 & 0x4) == 0) +- usb_unlink_urb(&bvd_ipc_disconnect->readurb_mux); ++ // usb_unlink_urb(&bvd_ipc_disconnect->readurb_mux); + +- usb_unlink_urb(&bvd_ipc_disconnect->writeurb_mux); ++ //usb_unlink_urb(&bvd_ipc_disconnect->writeurb_mux); + + bvd_ipc_disconnect->ipc_flag = IPC_USB_PROBE_NOT_READY; + kfree(bvd_ipc_disconnect->ibuf); + kfree(bvd_ipc_disconnect->obuf); + +- usb_driver_release_interface(&usb_ipc_driver, +- bvd_ipc_disconnect->ipc_dev->actconfig->interface[0]); +- usb_driver_release_interface(&usb_ipc_driver, +- bvd_ipc_disconnect->ipc_dev->actconfig->interface[1]); ++ //usb_driver_release_interface(&usb_ipc_driver, ++ // bvd_ipc_disconnect->ipc_dev->actconfig->interface[0]); ++ //usb_driver_release_interface(&usb_ipc_driver, ++ // bvd_ipc_disconnect->ipc_dev->actconfig->interface[1]); + + //a2590c: dsplog interface is not supported by this driver + //usb_driver_release_interface(&usb_ipc_driver, &bvd_ipc_disconnect->ipc_dev->actconfig->interface[2]); +@@ -803,13 +808,6 @@ + int result; + + bvd_dbg("init usb_ipc"); +- /* register driver at the USB subsystem */ +- result = usb_register(&usb_ipc_driver); +- if (result < 0) { +- err ("usb ipc driver could not be registered"); +- return result; +- } +- + /*init the related mux interface*/ + if (!(bvd_ipc = kzalloc(sizeof(struct ipc_usb_data), GFP_KERNEL))) { + err("usb_ipc_init: Out of memory."); +@@ -836,6 +834,14 @@ + usb_for_mux_driver = &ipcusb_tty_driver; + usb_for_mux_tty = &ipcusb_tty; + ++ /* register driver at the USB subsystem */ ++ // this was called before bvd_ipc was allocated ++ result = usb_register(&usb_ipc_driver); ++ if (result < 0) { ++ err ("usb ipc driver could not be registered"); ++ return result; ++ } ++ + /* init timers for ipcusb read process and usb suspend */ + init_timer(&ipcusb_timer); + ipcusb_timer.function = ipcusb_timeout; diff --git a/packages/linux/linux-ezx-2.6.21/mux-ifdef-ezx-features.patch b/packages/linux/linux-ezx-2.6.21/mux-ifdef-ezx-features.patch new file mode 100644 index 0000000000..e7935a2598 --- /dev/null +++ b/packages/linux/linux-ezx-2.6.21/mux-ifdef-ezx-features.patch @@ -0,0 +1,86 @@ +Index: linux-2.6.20.7/drivers/char/ts0710_mux_usb.c +=================================================================== +--- linux-2.6.20.7.orig/drivers/char/ts0710_mux_usb.c 2007-04-24 16:31:51.000000000 +0200 ++++ linux-2.6.20.7/drivers/char/ts0710_mux_usb.c 2007-04-24 16:34:57.000000000 +0200 +@@ -35,10 +35,14 @@ + #include <linux/list.h> + #include <linux/errno.h> + #include <asm/uaccess.h> ++ ++#ifdef CONFIG_PXA_EZX + #include <asm/hardware.h> + #include <asm/arch/hardware.h> + #include <asm/arch-pxa/pxa-regs.h> + #include <asm/arch-pxa/ezx.h> ++#endif ++ + #include <linux/slab.h> + #include <linux/miscdevice.h> + #include <linux/init.h> +@@ -341,8 +345,10 @@ + + static void wakeup_timeout(unsigned long data) + { ++#ifdef CONFIG_PXA_EZX + GPSR(GPIO_MCU_INT_SW) = GPIO_bit(GPIO_MCU_INT_SW); + bvd_dbg("wakup_timeout: send GPIO_MCU_INT_SW signal!"); ++#endif + } + + static void suspend_timeout(unsigned long data) +@@ -353,10 +359,12 @@ + bvd_dbg("suspend_timeout: add the suspend timer again"); + } else { + unlink_urbs(&bvd_ipc->readurb_mux); ++#ifdef CONFIG_PXA_EZX + UHCRHPS3 = 0x4; + mdelay(40); + bvd_dbg("suspend_timeout: send SUSPEND signal! UHCRHPS3=0x%x", + UHCRHPS3); ++#endif + } + } + +@@ -404,6 +412,7 @@ + bvd_ipc->writeurb_mux.transfer_buffer_length = buf_num; + bvd_dbg("ipcusb_xmit_data: copy data to write urb finished! "); + ++#ifdef CONFIG_PXA_EZX + if ((UHCRHPS3 & 0x4) == 0x4) { + static int ret; + int time = 0; +@@ -442,6 +451,7 @@ + "failed! status=%d\n", ret); + bvd_dbg("ipcusb_xmit_data: Send a IN token successfully!"); + } ++#endif + + sumbit_times++; + bvd_ipc->write_finished_flag = 0; +@@ -464,12 +474,16 @@ + + static void usbipc_bh_bp_func(unsigned long param) + { ++#ifdef CONFIG_PXA_EZX + if ((UHCRHPS3 & 0x4) == 0x4) { + UHCRHPS3 = 0x8; ++#endif + mdelay(40); ++#ifdef CONFIG_PXA_EZX + bvd_dbg("ipcusb_softint_send_readurb: Send RESUME signal! " + "UHCRHPS3=0x%x", UHCRHPS3); + } ++#endif + if (bvd_ipc->ipc_flag == IPC_USB_PROBE_READY) { + //get_halted_bit(); + +@@ -734,7 +748,9 @@ + printk("usb_ipc_disconnect. bvd_ipc_disconnect address: %p\n", bvd_ipc_disconnect); + + //FIXME: Memory leak? ++#ifdef CONFIG_PXA_EZX + if ((UHCRHPS3 & 0x4) == 0) ++#endif + // usb_unlink_urb(&bvd_ipc_disconnect->readurb_mux); + + //usb_unlink_urb(&bvd_ipc_disconnect->writeurb_mux); diff --git a/packages/linux/linux-ezx-2.6.21/mux-linux-2.6.21-fix.patch b/packages/linux/linux-ezx-2.6.21/mux-linux-2.6.21-fix.patch new file mode 100644 index 0000000000..79f48ae581 --- /dev/null +++ b/packages/linux/linux-ezx-2.6.21/mux-linux-2.6.21-fix.patch @@ -0,0 +1,288 @@ +Index: linux-2.6.21/drivers/char/ts0710.h +=================================================================== +--- linux-2.6.21.orig/drivers/char/ts0710.h 2007-04-27 20:35:44.000000000 -0300 ++++ linux-2.6.21/drivers/char/ts0710.h 2007-04-27 20:36:03.000000000 -0300 +@@ -45,7 +45,6 @@ + * 11/18/2002 Modified + */ + +-#include <linux/config.h> + #include <linux/module.h> + + #include <linux/errno.h> +@@ -58,7 +57,6 @@ + #include <linux/major.h> + #include <linux/mm.h> + #include <linux/init.h> +-#include <linux/devfs_fs_kernel.h> + + #include <asm/uaccess.h> + #include <asm/system.h> +Index: linux-2.6.21/drivers/char/ts0710_mux.c +=================================================================== +--- linux-2.6.21.orig/drivers/char/ts0710_mux.c 2007-04-27 20:35:44.000000000 -0300 ++++ linux-2.6.21/drivers/char/ts0710_mux.c 2007-04-27 20:36:03.000000000 -0300 +@@ -46,7 +46,6 @@ + * 11/18/2002 Second version + * 04/21/2004 Add GPRS PROC + */ +-#include <linux/config.h> + #include <linux/module.h> + #include <linux/types.h> + +@@ -70,15 +69,12 @@ + #include <linux/mm.h> + #include <linux/slab.h> + #include <linux/init.h> +-#include <linux/devfs_fs_kernel.h> +-//#include <syslog.h> + + #include <asm/uaccess.h> + #include <asm/system.h> + #include <asm/bitops.h> + + #ifdef USB_FOR_MUX +-//#include <linux/usb.h> + #include "ts0710_mux_usb.h" + #endif + +@@ -268,8 +264,8 @@ + static struct work_struct post_recv_tqueue; + + static struct tty_struct *mux_table[NR_MUXS]; +-static struct termios *mux_termios[NR_MUXS]; +-static struct termios *mux_termios_locked[NR_MUXS]; ++static struct ktermios *mux_termios[NR_MUXS]; ++static struct ktermios *mux_termios_locked[NR_MUXS]; + static volatile short int mux_tty[NR_MUXS]; + + #ifdef min +@@ -1894,11 +1890,7 @@ + if (test_bit(TTY_THROTTLED, &tty->flags)) { + queue_data = 1; + } else { +- if (test_bit +- (TTY_DONT_FLIP, &tty->flags)) { +- queue_data = 1; +- post_recv = 1; +- } else if (recv_info->total) { ++ if (recv_info->total) { + queue_data = 1; + post_recv = 1; + } else if (recv_room < uih_len) { +@@ -3149,10 +3141,10 @@ + + /*For BP UART problem End*/ + +-static void receive_worker(void *private_) ++static void receive_worker(struct work_struct *work) + { + struct tty_struct *tty = COMM_FOR_MUX_TTY; +- int i, count, tbuf_free, tbuf_read; ++ int count, tbuf_free, tbuf_read; + static unsigned char tbuf[TS0710MUX_MAX_BUF_SIZE]; + static unsigned char *tbuf_ptr = &tbuf[0]; + static unsigned char *start_flag = 0; +@@ -3168,7 +3160,7 @@ + __u32 uih_len; + /*For BP UART problem End */ + +- UNUSED_PARAM(private_); ++ UNUSED_PARAM(work); + + if (!tty) + return; +@@ -3440,7 +3432,7 @@ + clear_bit(RECV_RUNNING, &mux_recv_flags); + } + +-static void post_recv_worker(void *private_) ++static void post_recv_worker(struct work_struct *work) + { + ts0710_con *ts0710 = &ts0710_connection; + int tty_idx; +@@ -3453,7 +3445,7 @@ + mux_recv_packet *recv_packet, *recv_packet2; + __u8 j; + +- UNUSED_PARAM(private_); ++ UNUSED_PARAM(work); + + if (test_and_set_bit(RECV_RUNNING, &mux_recv_flags)) { + schedule_work(&post_recv_tqueue); +@@ -3499,10 +3491,6 @@ + if (test_bit(TTY_THROTTLED, &tty->flags)) { + add_post_recv_queue(&post_recv_q, recv_info); + continue; +- } else if (test_bit(TTY_DONT_FLIP, &tty->flags)) { +- post_recv = 1; +- add_post_recv_queue(&post_recv_q, recv_info); +- continue; + } + + flow_control = 0; +@@ -3635,7 +3623,7 @@ + } + } + +-static void send_worker(void *private_) ++static void send_worker(struct work_struct *work) + { + ts0710_con *ts0710 = &ts0710_connection; + __u8 j; +@@ -3644,7 +3632,7 @@ + struct tty_struct *tty; + __u8 dlci; + +- UNUSED_PARAM(private_); ++ UNUSED_PARAM(work); + + TS0710_DEBUG("Enter into send_worker"); + +@@ -3819,7 +3807,8 @@ + gprsData[TS0710MUX_GPRS_SESSION_MAX - 1].sentBytes = + get_count(TS0710MUX_GPRS2_SEND_COUNT_IDX); + +- copy_to_user(buf, gprsData, bufLen); ++ if(copy_to_user(buf, gprsData, bufLen)) ++ return -EFAULT; + + return bufLen; + } +@@ -3836,7 +3825,8 @@ + + memset(gprsData, 0, bufLen); + +- copy_from_user(gprsData, buf, bufLen); ++ if(copy_from_user(gprsData, buf, bufLen)) ++ return -EFAULT; + + set_count(TS0710MUX_GPRS1_RECV_COUNT_IDX, gprsData[0].recvBytes); + set_count(TS0710MUX_GPRS1_SEND_COUNT_IDX, gprsData[0].sentBytes); +@@ -3893,9 +3883,9 @@ + } + post_recv_count_flag = 0; + +- INIT_WORK(&send_tqueue, send_worker, NULL); +- INIT_WORK(&receive_tqueue, receive_worker, NULL); +- INIT_WORK(&post_recv_tqueue, post_recv_worker, NULL); ++ INIT_WORK(&send_tqueue, send_worker); ++ INIT_WORK(&receive_tqueue, receive_worker); ++ INIT_WORK(&post_recv_tqueue, post_recv_worker); + + mux_driver = alloc_tty_driver(NR_MUXS); + if (!mux_driver) +@@ -3904,12 +3894,11 @@ + mux_driver->owner = THIS_MODULE; + mux_driver->driver_name = "ts0710mux"; + mux_driver->name = "mux"; +- mux_driver->devfs_name = "mux"; + mux_driver->major = TS0710MUX_MAJOR; + mux_driver->minor_start = TS0710MUX_MINOR_START; + mux_driver->type = TTY_DRIVER_TYPE_SERIAL; + mux_driver->subtype = SERIAL_TYPE_NORMAL; +- mux_driver->flags = TTY_DRIVER_RESET_TERMIOS | TTY_DRIVER_REAL_RAW; ++ mux_driver->flags = TTY_DRIVER_RESET_TERMIOS | TTY_DRIVER_REAL_RAW | TTY_DRIVER_DYNAMIC_DEV; + + mux_driver->init_termios = tty_std_termios; + mux_driver->init_termios.c_iflag = 0; +@@ -3917,10 +3906,10 @@ + mux_driver->init_termios.c_cflag = B38400 | CS8 | CREAD; + mux_driver->init_termios.c_lflag = 0; + +-// mux_driver.ttys = mux_table; ++ //mux_driver.ttys = mux_table; + mux_driver->termios = mux_termios; + mux_driver->termios_locked = mux_termios_locked; +-// mux_driver.driver_state = mux_state; ++ //mux_driver.driver_state = mux_state; + mux_driver->other = NULL; + + mux_driver->open = mux_open; +Index: linux-2.6.21/drivers/char/ts0710_mux_usb.c +=================================================================== +--- linux-2.6.21.orig/drivers/char/ts0710_mux_usb.c 2007-04-27 20:35:44.000000000 -0300 ++++ linux-2.6.21/drivers/char/ts0710_mux_usb.c 2007-04-27 22:28:55.000000000 -0300 +@@ -188,7 +188,8 @@ + buf_list_t *inbuf; + int count = urb->actual_length; + +- inbuf = kmalloc(sizeof(buf_list_t), GFP_KERNEL); ++ // we are called from interrupt context. ++ inbuf = kmalloc(sizeof(buf_list_t), GFP_ATOMIC); + if (!inbuf) { + printk("append_to_inbuf_list: (%d) out of memory!\n", + sizeof(buf_list_t)); +@@ -222,7 +223,7 @@ + inbuf = list_entry(ptr, buf_list_t, list); + src_count = inbuf->size; + if (dst_count >= src_count) { +- memcpy(buf, inbuf->body, src_count); ++ memcpy((unsigned char *)buf, inbuf->body, src_count); + ret = src_count; + list_del(ptr); + kfree(inbuf->body); +@@ -282,9 +283,8 @@ + spin_unlock(&bvd_ipc->in_buf_lock); + } + +-static void usb_ipc_read_bulk(struct urb *urb, struct pt_regs *regs) ++static void usb_ipc_read_bulk(struct urb *urb) + { +- buf_list_t *inbuf; + int count = urb->actual_length; + struct tty_struct *tty = &ipcusb_tty; + +@@ -319,7 +319,7 @@ + bvd_dbg("usb_ipc_read_bulk: completed!!!"); + } + +-static void usb_ipc_write_bulk(struct urb *urb, struct pt_regs *regs) ++static void usb_ipc_write_bulk(struct urb *urb) + { + callback_times++; + bvd_ipc->write_finished_flag = 1; +@@ -437,7 +437,7 @@ + /*send IN token*/ + bvd_ipc->readurb_mux.actual_length = 0; + bvd_ipc->readurb_mux.dev = bvd_ipc->ipc_dev; +- if (ret = usb_submit_urb(&bvd_ipc->readurb_mux, GFP_ATOMIC)) ++ if ((ret = usb_submit_urb(&bvd_ipc->readurb_mux, GFP_ATOMIC))) + printk("ipcusb_xmit_data: usb_submit_urb(read mux bulk)" + "failed! status=%d\n", ret); + bvd_dbg("ipcusb_xmit_data: Send a IN token successfully!"); +@@ -447,7 +447,7 @@ + bvd_ipc->write_finished_flag = 0; + //printk("%s: clear write_finished_flag:%d\n", __FUNCTION__, bvd_ipc->write_finished_flag); + bvd_ipc->writeurb_mux.dev = bvd_ipc->ipc_dev; +- if (result = usb_submit_urb(&bvd_ipc->writeurb_mux, GFP_ATOMIC)) ++ if ((result = usb_submit_urb(&bvd_ipc->writeurb_mux, GFP_ATOMIC))) + warn("ipcusb_xmit_data: funky result! result=%d\n", result); + + bvd_dbg("ipcusb_xmit_data: usb_submit_urb finished! result:%d", result); +@@ -498,7 +498,7 @@ + return 0; + + if (*ipcusb_ap_to_bp != NULL) +- (*ipcusb_ap_to_bp)(buf, count); ++ (*ipcusb_ap_to_bp)((unsigned char *)buf, count); + + bvd_ipc->suspend_flag = 1; + +@@ -602,6 +602,7 @@ + } + + ep_cnt = have_bulk_in_mux = have_bulk_out_mux = 0; ++ readsize = writesize = 0; + + while (ep_cnt < interface->bNumEndpoints) { + endpoint = &intf->cur_altsetting->endpoint[ep_cnt].desc; +@@ -792,6 +793,8 @@ + bvd_ipc->ipc_dev = NULL; + bvd_ipc->xmit.head = bvd_ipc->xmit.tail = 0; + bvd_ipc->write_flag = IPC_USB_WRITE_INIT; ++ spin_lock_init(&bvd_ipc->lock); ++ spin_lock_init(&bvd_ipc->in_buf_lock); + + ipcusb_tty_driver.write = usb_ipc_write; + ipcusb_tty_driver.chars_in_buffer = usb_ipc_chars_in_buffer; diff --git a/packages/linux/linux-ezx-2.6.21/mux-remove-flipbuffers.patch b/packages/linux/linux-ezx-2.6.21/mux-remove-flipbuffers.patch new file mode 100644 index 0000000000..d4781f9fc7 --- /dev/null +++ b/packages/linux/linux-ezx-2.6.21/mux-remove-flipbuffers.patch @@ -0,0 +1,269 @@ +Index: linux-2.6.16/drivers/char/ts0710_mux_usb.c +=================================================================== +--- linux-2.6.16.orig/drivers/char/ts0710_mux_usb.c 2007-01-17 00:52:25.000000000 +0100 ++++ linux-2.6.16/drivers/char/ts0710_mux_usb.c 2007-01-17 00:52:26.000000000 +0100 +@@ -133,6 +133,7 @@ + + struct circ_buf xmit; /* write cric bufffer */ + struct list_head in_buf_list; ++ spinlock_t in_buf_lock; + char bulk_in_ep_mux, + bulk_out_ep_mux, + bulk_in_ep_dsplog; +@@ -204,9 +205,39 @@ + return; + } + memcpy(inbuf->body, (unsigned char*)urb->transfer_buffer, count); ++ spin_lock(&bvd_ipc->in_buf_lock); + list_add_tail(&inbuf->list, &bvd_ipc->in_buf_list); ++ spin_unlock(&bvd_ipc->in_buf_lock); + } + ++int get_from_inbuf_list(const unsigned char *buf, int dst_count) ++{ ++ int ret = 0; ++ spin_lock(&bvd_ipc->in_buf_lock); ++ if (!(list_empty(&bvd_ipc->in_buf_list))) { ++ int src_count; ++ buf_list_t *inbuf; ++ struct list_head *ptr; ++ ++ ptr = bvd_ipc->in_buf_list.next; ++ inbuf = list_entry(ptr, buf_list_t, list); ++ src_count = inbuf->size; ++ if (dst_count >= src_count) { ++ memcpy(buf, inbuf->body, src_count); ++ ret = src_count; ++ list_del(ptr); ++ kfree(inbuf->body); ++ kfree(inbuf); ++ } else { ++ bvd_dbg("get_from_inbuf_list: not enough space in destination buffer"); ++ } ++ } ++ spin_unlock(&bvd_ipc->in_buf_lock); ++ ++ return ret; ++} ++EXPORT_SYMBOL(get_from_inbuf_list); ++ + static void ipcusb_timeout(unsigned long data) + { + struct tty_struct *tty = &ipcusb_tty; +@@ -214,13 +245,14 @@ + + bvd_dbg("ipcusb_timeout***"); + ++ spin_lock(&bvd_ipc->in_buf_lock); + while (!(list_empty(&bvd_ipc->in_buf_list))) { + int count; + buf_list_t *inbuf; + struct list_head *ptr = NULL; + + ptr = bvd_ipc->in_buf_list.next; +- inbuf = list_entry (ptr, buf_list_t, list); ++ inbuf = list_entry(ptr, buf_list_t, list); + count = inbuf->size; + if (tty_insert_flip_string(tty, inbuf->body, count) >= count) { + list_del(ptr); +@@ -232,10 +264,12 @@ + break; + } + } ++ spin_unlock(&bvd_ipc->in_buf_lock); + + if (usb_mux_dispatcher) + usb_mux_dispatcher(tty); /**call Liu changhui's func.**/ + ++ spin_lock(&bvd_ipc->in_buf_lock); + if (list_empty(&bvd_ipc->in_buf_list)) { + urb->actual_length = 0; + urb->dev = bvd_ipc->ipc_dev; +@@ -246,6 +280,7 @@ + ipcusb_timer.data = (unsigned long)urb; + mod_timer(&ipcusb_timer, jiffies+(10*HZ/1000)); + } ++ spin_unlock(&bvd_ipc->in_buf_lock); + } + + static void usb_ipc_read_bulk(struct urb *urb, struct pt_regs *regs) +@@ -266,69 +301,11 @@ + if (count > 0 && ((*ipcusb_bp_to_ap) != NULL)) + (*ipcusb_bp_to_ap)(urb->transfer_buffer, urb->actual_length); + +- if (!(list_empty(&bvd_ipc->in_buf_list))) { +- int need_mux = 0; +- +- bvd_dbg("usb_ipc_read_bulk: some urbs in_buf_list"); +- if (count > 0) { +- bvd_ipc->suspend_flag = 1; +- append_to_inbuf_list(urb); /* append the current received urb */ +-#if 0 +- if(jiffies - last_jiff > ICL_EVENT_INTERVAL) +- { +- last_jiff = jiffies; +- queue_apm_event(KRNL_ICL, NULL); +- } +-#endif +- } +- +- while (!(list_empty(&bvd_ipc->in_buf_list))) { +- struct list_head* ptr = NULL; +- ptr = bvd_ipc->in_buf_list.next; +- inbuf = list_entry(ptr, buf_list_t, list); +- count = inbuf->size; +- need_mux = 1; +- +- tty_insert_flip_string(tty, inbuf->body, count); +- +- list_del(ptr); +- kfree(inbuf->body); +- inbuf->body = NULL; +- kfree(inbuf); +- } +- +- if (usb_mux_dispatcher && need_mux) +- usb_mux_dispatcher(tty); /* call Liu changhui's func. */ +- +- if (list_empty(&bvd_ipc->in_buf_list)) { +- urb->actual_length = 0; +- urb->dev = bvd_ipc->ipc_dev; +- if (usb_submit_urb(urb, GFP_ATOMIC)) +- bvd_dbg("usb_ipc_read_bulk: " +- "failed resubmitting read urb"); +- bvd_dbg("usb_ipc_read_bulk: resubmited read urb"); +- } else { +- ipcusb_timer.data = (unsigned long)urb; +- mod_timer(&ipcusb_timer, jiffies+(10*HZ/1000)); +- } +- } else if (count > 0) { +- bvd_dbg("usb_ipc_read_bulk: no urbs in_buf_list"); ++ if (count > 0) { ++ bvd_dbg("usb_ipc_read_bulk: inserting buffer into in_buf_list"); + bvd_ipc->suspend_flag = 1; + +- if (tty_insert_flip_string(tty, urb->transfer_buffer, +- count) < count) { +- bvd_ipc->suspend_flag = 1; +- append_to_inbuf_list(urb); +- ipcusb_timer.data = (unsigned long)urb; +- mod_timer(&ipcusb_timer, jiffies+(10*HZ/1000)); +-#if 0 +- if(jiffies - last_jiff > ICL_EVENT_INTERVAL) +- { +- last_jiff = jiffies; +- queue_apm_event(KRNL_ICL, NULL); +- } +-#endif +- } ++ append_to_inbuf_list(urb); + + if (usb_mux_dispatcher) + usb_mux_dispatcher(tty); /* call Liu changhui's func. */ +@@ -337,13 +314,6 @@ + urb->dev = bvd_ipc->ipc_dev; + if (usb_submit_urb(urb, GFP_ATOMIC)) + bvd_dbg("failed resubmitting read urb"); +-#if 0 +- if(jiffies - last_jiff > ICL_EVENT_INTERVAL) +- { +- last_jiff = jiffies; +- queue_apm_event(KRNL_ICL, NULL); +- } +-#endif + bvd_dbg("usb_ipc_read_bulk: resubmited read urb"); + } + +@@ -705,7 +675,8 @@ + bvd_ipc->bulk_out_ep_mux= have_bulk_out_mux; + bvd_ipc->ipc_dev = usbdev; + bvd_ipc->writesize = writesize; +- INIT_LIST_HEAD (&bvd_ipc->in_buf_list); ++ INIT_LIST_HEAD(&bvd_ipc->in_buf_list); ++ bvd_ipc->in_buf_lock = SPIN_LOCK_UNLOCKED; + + bvd_ipc->bh.func = usbipc_bh_func; + bvd_ipc->bh.data = (unsigned long) bvd_ipc; +Index: linux-2.6.16/drivers/char/ts0710_mux.c +=================================================================== +--- linux-2.6.16.orig/drivers/char/ts0710_mux.c 2007-01-17 00:52:23.000000000 +0100 ++++ linux-2.6.16/drivers/char/ts0710_mux.c 2007-01-17 00:52:26.000000000 +0100 +@@ -3149,7 +3149,7 @@ + static void receive_worker(void *private_) + { + struct tty_struct *tty = COMM_FOR_MUX_TTY; +- int i, count; ++ int i, count, tbuf_free, tbuf_read; + static unsigned char tbuf[TS0710MUX_MAX_BUF_SIZE]; + static unsigned char *tbuf_ptr = &tbuf[0]; + static unsigned char *start_flag = 0; +@@ -3167,29 +3167,39 @@ + + UNUSED_PARAM(private_); + +- if (!tty) +- return; ++ if (!tty) ++ return; ++ ++ while (1) { ++ tbuf_free = TS0710MUX_MAX_BUF_SIZE - (tbuf_ptr - tbuf); ++ TS0710_PRINTK("Reading max %i bytes from ts0710_mux_usb inbuf.\n", tbuf_free); ++ tbuf_read = get_from_inbuf_list(tbuf_ptr, tbuf_free); ++ if (tbuf_read == 0) { ++ break; ++ } else { ++ TS0710_PRINTK("Read %i bytes.\n", tbuf_read); ++ }; ++ tbuf_ptr += tbuf_read; ++ }; ++ ++ count = (tbuf_ptr - tbuf); ++ ++ // Should be impossible? ++ //if (count > (TS0710MUX_MAX_BUF_SIZE - (tbuf_ptr - tbuf))) { ++ // TS0710_PRINTK ++ // ("MUX receive_worker: !!!!! Exceed buffer boundary !!!!!\n"); ++ // count = (TS0710MUX_MAX_BUF_SIZE - (tbuf_ptr - tbuf)); ++ //} + + #ifdef USB_FOR_MUX +- TS0710_DEBUG("Receive following bytes from IPC-USB"); ++ TS0710_DEBUG("Received following bytes from IPC-USB"); + #else +- TS0710_DEBUG("Receive following bytes from UART"); ++ TS0710_DEBUG("Received following bytes from UART"); + #endif +- +- TS0710_DEBUGHEX(cp, count); +- +- if (count > (TS0710MUX_MAX_BUF_SIZE - (tbuf_ptr - tbuf))) { +- TS0710_PRINTK +- ("MUX receive_worker: !!!!! Exceed buffer boundary !!!!!\n"); +- count = (TS0710MUX_MAX_BUF_SIZE - (tbuf_ptr - tbuf)); +- } +- +- count = tty_buffer_request_room(tty, count); +- +- for (i = 0; i < count; i++) +- tty_insert_flip_char(tty, tbuf_ptr[i], TTY_NORMAL); +- +- tbuf_ptr += count; ++ TS0710_DEBUGHEX(tbuf, count); ++ ++ //gets updated above ++ //tbuf_ptr += count; + search = &tbuf[0]; + + if (test_and_set_bit(RECV_RUNNING, &mux_recv_flags)) { +Index: linux-2.6.16/drivers/char/ts0710_mux_usb.h +=================================================================== +--- linux-2.6.16.orig/drivers/char/ts0710_mux_usb.h 2007-01-17 00:52:23.000000000 +0100 ++++ linux-2.6.16/drivers/char/ts0710_mux_usb.h 2007-01-17 00:52:26.000000000 +0100 +@@ -27,3 +27,6 @@ + extern struct tty_struct *usb_for_mux_tty; + extern void (*usb_mux_dispatcher)(struct tty_struct *tty); + extern void (*usb_mux_sender)(void); ++ ++extern int get_from_inbuf_list(const unsigned char *buf, int dst_count); ++ diff --git a/packages/linux/linux-ezx-2.6.21/mux-remove-get_halted_bit.patch b/packages/linux/linux-ezx-2.6.21/mux-remove-get_halted_bit.patch new file mode 100644 index 0000000000..0ebe27d03b --- /dev/null +++ b/packages/linux/linux-ezx-2.6.21/mux-remove-get_halted_bit.patch @@ -0,0 +1,22 @@ +Index: linux-2.6.16/drivers/char/ts0710_mux_usb.c +=================================================================== +--- linux-2.6.16.orig/drivers/char/ts0710_mux_usb.c 2007-01-17 01:06:21.000000000 +0100 ++++ linux-2.6.16/drivers/char/ts0710_mux_usb.c 2007-01-17 01:06:31.000000000 +0100 +@@ -461,7 +461,7 @@ + ipcusb_xmit_data(); + } + +-extern void get_halted_bit(void); ++//extern void get_halted_bit(void); + + static void usbipc_bh_bp_func(unsigned long param) + { +@@ -472,7 +472,7 @@ + "UHCRHPS3=0x%x", UHCRHPS3); + } + if (bvd_ipc->ipc_flag == IPC_USB_PROBE_READY) { +- get_halted_bit(); ++ //get_halted_bit(); + + /*send a IN token*/ + bvd_ipc->readurb_mux.dev = bvd_ipc->ipc_dev; diff --git a/packages/linux/linux-ezx-2.6.21/mux-remove-usbh_finished_resume.patch b/packages/linux/linux-ezx-2.6.21/mux-remove-usbh_finished_resume.patch new file mode 100644 index 0000000000..c415ded428 --- /dev/null +++ b/packages/linux/linux-ezx-2.6.21/mux-remove-usbh_finished_resume.patch @@ -0,0 +1,22 @@ +Index: linux-2.6.16/drivers/char/ts0710_mux_usb.c +=================================================================== +--- linux-2.6.16.orig/drivers/char/ts0710_mux_usb.c 2007-01-17 01:12:23.000000000 +0100 ++++ linux-2.6.16/drivers/char/ts0710_mux_usb.c 2007-01-17 01:12:37.000000000 +0100 +@@ -97,7 +97,6 @@ + static int sumbit_times = 0; + static int callback_times = 0; + //static unsigned long last_jiff = 0; +-extern int usbh_finished_resume; + /*end global values defined*/ + + MODULE_AUTHOR(DRIVER_AUTHOR); +@@ -546,9 +545,6 @@ + void usb_send_readurb(void) + { + //printk("usb_send_readurb: begining!UHCRHPS3=0x%x, usbh_finished_resume=%d\n", UHCRHPS3, usbh_finished_resume); +- +- if (usbh_finished_resume == 0) +- return; + + tasklet_schedule(&bvd_ipc->bh_bp); + } diff --git a/packages/linux/linux-ezx-2.6.21/mux_cli.patch b/packages/linux/linux-ezx-2.6.21/mux_cli.patch new file mode 100644 index 0000000000..2964f24fd2 --- /dev/null +++ b/packages/linux/linux-ezx-2.6.21/mux_cli.patch @@ -0,0 +1,5395 @@ +Index: linux-2.6.21/drivers/char/Kconfig +=================================================================== +--- linux-2.6.21.orig/drivers/char/Kconfig 2007-04-26 20:07:19.000000000 +0200 ++++ linux-2.6.21/drivers/char/Kconfig 2007-04-26 20:09:29.000000000 +0200 +@@ -1071,5 +1071,17 @@ + /sys/devices/platform/telco_clock, with a number of files for + controlling the behavior of this hardware. + ++config TS0710_MUX ++ tristate "GSM TS 07.10 Multiplex driver" ++ help ++ This implements the GSM 07.10 multiplex. ++ ++config TS0710_MUX_USB ++ tristate "Motorola USB support for TS 07.10 Multiplex driver" ++ depends on TS0710_MUX ++ help ++ This ads support for TS 07.10 over USB, as found in motorola ++ Smartphones. ++ + endmenu + +Index: linux-2.6.21/drivers/char/Makefile +=================================================================== +--- linux-2.6.21.orig/drivers/char/Makefile 2007-04-26 20:07:19.000000000 +0200 ++++ linux-2.6.21/drivers/char/Makefile 2007-04-26 20:09:29.000000000 +0200 +@@ -104,6 +104,9 @@ + obj-$(CONFIG_HANGCHECK_TIMER) += hangcheck-timer.o + obj-$(CONFIG_TCG_TPM) += tpm/ + ++obj-$(CONFIG_TS0710_MUX) += ts0710_mux.o ts0710_mux_usb.o ++ ++ + # Files generated that shall be removed upon make clean + clean-files := consolemap_deftbl.c defkeymap.c + +Index: linux-2.6.21/drivers/char/ts0710.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-2.6.21/drivers/char/ts0710.h 2007-04-26 20:09:29.000000000 +0200 +@@ -0,0 +1,368 @@ ++/* ++ * File: ts0710.h ++ * ++ * Portions derived from rfcomm.c, original header as follows: ++ * ++ * Copyright (C) 2000, 2001 Axis Communications AB ++ * ++ * Author: Mats Friden <mats.friden@axis.com> ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License ++ * as published by the Free Software Foundation; either version 2 ++ * of the License, or (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. ++ * ++ * Exceptionally, Axis Communications AB grants discretionary and ++ * conditional permissions for additional use of the text contained ++ * in the company's release of the AXIS OpenBT Stack under the ++ * provisions set forth hereunder. ++ * ++ * Provided that, if you use the AXIS OpenBT Stack with other files, ++ * that do not implement functionality as specified in the Bluetooth ++ * System specification, to produce an executable, this does not by ++ * itself cause the resulting executable to be covered by the GNU ++ * General Public License. Your use of that executable is in no way ++ * restricted on account of using the AXIS OpenBT Stack code with it. ++ * ++ * This exception does not however invalidate any other reasons why ++ * the executable file might be covered by the provisions of the GNU ++ * General Public License. ++ * ++ */ ++/* ++ * Copyright (C) 2002 Motorola ++ * ++ * 07/28/2002 Initial version based on rfcomm.c ++ * 11/18/2002 Modified ++ */ ++ ++#include <linux/config.h> ++#include <linux/module.h> ++ ++#include <linux/errno.h> ++#include <linux/sched.h> ++#include <linux/interrupt.h> ++#include <linux/tty.h> ++#include <linux/tty_flip.h> ++#include <linux/fcntl.h> ++#include <linux/string.h> ++#include <linux/major.h> ++#include <linux/mm.h> ++#include <linux/init.h> ++#include <linux/devfs_fs_kernel.h> ++ ++#include <asm/uaccess.h> ++#include <asm/system.h> ++#include <asm/bitops.h> ++ ++#include <asm/byteorder.h> ++#include <asm/types.h> ++ ++#define TS0710_MAX_CHN 14 ++ ++#define SET_PF(ctr) ((ctr) | (1 << 4)) ++#define CLR_PF(ctr) ((ctr) & 0xef) ++#define GET_PF(ctr) (((ctr) >> 4) & 0x1) ++ ++#define GET_PN_MSG_FRAME_SIZE(pn) ( ((pn)->frame_sizeh << 8) | ((pn)->frame_sizel)) ++#define SET_PN_MSG_FRAME_SIZE(pn, size) ({ (pn)->frame_sizel = (size) & 0xff; \ ++ (pn)->frame_sizeh = (size) >> 8; }) ++ ++#define GET_LONG_LENGTH(a) ( ((a).h_len << 7) | ((a).l_len) ) ++#define SET_LONG_LENGTH(a, length) ({ (a).ea = 0; \ ++ (a).l_len = length & 0x7F; \ ++ (a).h_len = (length >> 7) & 0xFF; }) ++ ++#define SHORT_CRC_CHECK 3 ++#define LONG_CRC_CHECK 4 ++ ++/* FIXME: Should thsi one be define here? */ ++#define SHORT_PAYLOAD_SIZE 127 ++ ++#define EA 1 ++#define FCS_SIZE 1 ++#define FLAG_SIZE 2 ++ ++#define TS0710_MAX_HDR_SIZE 5 ++#define DEF_TS0710_MTU 256 ++ ++#define TS0710_BASIC_FLAG 0xF9 ++/* the control field */ ++#define SABM 0x2f ++#define SABM_SIZE 4 ++#define UA 0x63 ++#define UA_SIZE 4 ++#define DM 0x0f ++#define DISC 0x43 ++#define UIH 0xef ++ ++/* the type field in a multiplexer command packet */ ++#define TEST 0x8 ++#define FCON 0x28 ++#define FCOFF 0x18 ++#define MSC 0x38 ++#define RPN 0x24 ++#define RLS 0x14 ++#define PN 0x20 ++#define NSC 0x4 ++ ++/* V.24 modem control signals */ ++#define FC 0x2 ++#define RTC 0x4 ++#define RTR 0x8 ++#define IC 0x40 ++#define DV 0x80 ++ ++#define CTRL_CHAN 0 /* The control channel is defined as DLCI 0 */ ++#define MCC_CMD 1 /* Multiplexer command cr */ ++#define MCC_RSP 0 /* Multiplexer response cr */ ++ ++#ifdef __LITTLE_ENDIAN_BITFIELD ++ ++typedef struct { ++ __u8 ea:1; ++ __u8 cr:1; ++ __u8 d:1; ++ __u8 server_chn:5; ++} __attribute__ ((packed)) address_field; ++ ++typedef struct { ++ __u8 ea:1; ++ __u8 len:7; ++} __attribute__ ((packed)) short_length; ++ ++typedef struct { ++ __u8 ea:1; ++ __u8 l_len:7; ++ __u8 h_len; ++} __attribute__ ((packed)) long_length; ++ ++typedef struct { ++ address_field addr; ++ __u8 control; ++ short_length length; ++} __attribute__ ((packed)) short_frame_head; ++ ++typedef struct { ++ short_frame_head h; ++ __u8 data[0]; ++} __attribute__ ((packed)) short_frame; ++ ++typedef struct { ++ address_field addr; ++ __u8 control; ++ long_length length; ++ __u8 data[0]; ++} __attribute__ ((packed)) long_frame_head; ++ ++typedef struct { ++ long_frame_head h; ++ __u8 data[0]; ++} __attribute__ ((packed)) long_frame; ++ ++/* Typedefinitions for structures used for the multiplexer commands */ ++typedef struct { ++ __u8 ea:1; ++ __u8 cr:1; ++ __u8 type:6; ++} __attribute__ ((packed)) mcc_type; ++ ++typedef struct { ++ mcc_type type; ++ short_length length; ++ __u8 value[0]; ++} __attribute__ ((packed)) mcc_short_frame_head; ++ ++typedef struct { ++ mcc_short_frame_head h; ++ __u8 value[0]; ++} __attribute__ ((packed)) mcc_short_frame; ++ ++typedef struct { ++ mcc_type type; ++ long_length length; ++ __u8 value[0]; ++} __attribute__ ((packed)) mcc_long_frame_head; ++ ++typedef struct { ++ mcc_long_frame_head h; ++ __u8 value[0]; ++} __attribute__ ((packed)) mcc_long_frame; ++ ++/* MSC-command */ ++typedef struct { ++ __u8 ea:1; ++ __u8 fc:1; ++ __u8 rtc:1; ++ __u8 rtr:1; ++ __u8 reserved:2; ++ __u8 ic:1; ++ __u8 dv:1; ++} __attribute__ ((packed)) v24_sigs; ++ ++typedef struct { ++ __u8 ea:1; ++ __u8 b1:1; ++ __u8 b2:1; ++ __u8 b3:1; ++ __u8 len:4; ++} __attribute__ ((packed)) brk_sigs; ++ ++typedef struct { ++ short_frame_head s_head; ++ mcc_short_frame_head mcc_s_head; ++ address_field dlci; ++ __u8 v24_sigs; ++ //brk_sigs break_signals; ++ __u8 fcs; ++} __attribute__ ((packed)) msc_msg; ++ ++#if 0 ++/* conflict with termios.h */ ++/* RPN command */ ++#define B2400 0 ++#define B4800 1 ++#define B7200 2 ++#define B9600 3 ++#define B19200 4 ++#define B38400 5 ++#define B57600 6 ++#define B115200 7 ++#define D230400 8 ++#endif ++ ++/* ++typedef struct{ ++ __u8 bit_rate:1; ++ __u8 data_bits:1; ++ __u8 stop_bit:1; ++ __u8 parity:1; ++ __u8 parity_type:1; ++ __u8 xon_u8:1; ++ __u8 xoff_u8:1; ++ __u8 res1:1; ++ __u8 xon_input:1; ++ __u8 xon_output:1; ++ __u8 rtr_input:1; ++ __u8 rtr_output:1; ++ __u8 rtc_input:1; ++ __u8 rtc_output:1; ++ __u8 res2:2; ++} __attribute__((packed)) parameter_mask; ++ ++typedef struct{ ++ __u8 bit_rate; ++ __u8 data_bits:2; ++ __u8 stop_bit:1; ++ __u8 parity:1; ++ __u8 parity_type:2; ++ __u8 res1:2; ++ __u8 xon_input:1; ++ __u8 xon_output:1; ++ __u8 rtr_input:1; ++ __u8 rtr_output:1; ++ __u8 rtc_input:1; ++ __u8 rtc_output:1; ++ __u8 res2:2; ++ __u8 xon_u8; ++ __u8 xoff_u8; ++ parameter_mask pm; ++} __attribute__((packed)) rpn_values; ++ ++typedef struct{ ++ short_frame_head s_head; ++ mcc_short_frame_head mcc_s_head; ++ address_field dlci; ++ rpn_values rpn_val; ++ __u8 fcs; ++} __attribute__((packed)) rpn_msg; ++*/ ++ ++/* RLS-command */ ++/* ++typedef struct{ ++ short_frame_head s_head; ++ mcc_short_frame_head mcc_s_head; ++ address_field dlci; ++ __u8 error:4; ++ __u8 res:4; ++ __u8 fcs; ++} __attribute__((packed)) rls_msg; ++*/ ++ ++/* PN-command */ ++typedef struct { ++ short_frame_head s_head; ++ mcc_short_frame_head mcc_s_head; ++ __u8 dlci:6; ++ __u8 res1:2; ++ __u8 frame_type:4; ++ __u8 credit_flow:4; ++ __u8 prior:6; ++ __u8 res2:2; ++ __u8 ack_timer; ++ __u8 frame_sizel; ++ __u8 frame_sizeh; ++ __u8 max_nbrof_retrans; ++ __u8 credits; ++ __u8 fcs; ++} __attribute__ ((packed)) pn_msg; ++ ++/* NSC-command */ ++typedef struct { ++ short_frame_head s_head; ++ mcc_short_frame_head mcc_s_head; ++ mcc_type command_type; ++ __u8 fcs; ++} __attribute__ ((packed)) nsc_msg; ++ ++#else ++#error Only littel-endianess supported now! ++#endif ++ ++enum { ++ REJECTED = 0, ++ DISCONNECTED, ++ CONNECTING, ++ NEGOTIATING, ++ CONNECTED, ++ DISCONNECTING, ++ FLOW_STOPPED ++}; ++ ++enum ts0710_events { ++ CONNECT_IND, ++ CONNECT_CFM, ++ DISCONN_CFM ++}; ++ ++typedef struct { ++ volatile __u8 state; ++ volatile __u8 flow_control; ++ volatile __u8 initiated; ++ volatile __u8 initiator; ++ volatile __u16 mtu; ++ wait_queue_head_t open_wait; ++ wait_queue_head_t close_wait; ++} dlci_struct; ++ ++/* user space interfaces */ ++typedef struct { ++ volatile __u8 initiator; ++ volatile __u8 c_dlci; ++ volatile __u16 mtu; ++ volatile __u8 be_testing; ++ volatile __u32 test_errs; ++ wait_queue_head_t test_wait; ++ ++ dlci_struct dlci[TS0710_MAX_CHN]; ++} ts0710_con; +Index: linux-2.6.21/drivers/char/ts0710_mux.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-2.6.21/drivers/char/ts0710_mux.c 2007-04-26 20:09:29.000000000 +0200 +@@ -0,0 +1,3966 @@ ++/* ++ * File: mux_driver.c ++ * ++ * Portions derived from rfcomm.c, original header as follows: ++ * ++ * Copyright (C) 2000, 2001 Axis Communications AB ++ * ++ * Author: Mats Friden <mats.friden@axis.com> ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License ++ * as published by the Free Software Foundation; either version 2 ++ * of the License, or (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. ++ * ++ * Exceptionally, Axis Communications AB grants discretionary and ++ * conditional permissions for additional use of the text contained ++ * in the company's release of the AXIS OpenBT Stack under the ++ * provisions set forth hereunder. ++ * ++ * Provided that, if you use the AXIS OpenBT Stack with other files, ++ * that do not implement functionality as specified in the Bluetooth ++ * System specification, to produce an executable, this does not by ++ * itself cause the resulting executable to be covered by the GNU ++ * General Public License. Your use of that executable is in no way ++ * restricted on account of using the AXIS OpenBT Stack code with it. ++ * ++ * This exception does not however invalidate any other reasons why ++ * the executable file might be covered by the provisions of the GNU ++ * General Public License. ++ * ++ */ ++/* ++ * Copyright (C) 2002-2004 Motorola ++ * Copyright (C) 2006 Harald Welte <laforge@openezx.org> ++ * ++ * 07/28/2002 Initial version ++ * 11/18/2002 Second version ++ * 04/21/2004 Add GPRS PROC ++ */ ++#include <linux/config.h> ++#include <linux/module.h> ++#include <linux/types.h> ++ ++#include <linux/kernel.h> ++#include <linux/proc_fs.h> ++ ++#define USB_FOR_MUX ++ ++#ifndef USB_FOR_MUX ++#include <linux/serial.h> ++#endif ++ ++#include <linux/errno.h> ++#include <linux/sched.h> ++#include <linux/interrupt.h> ++#include <linux/tty.h> ++#include <linux/tty_flip.h> ++#include <linux/fcntl.h> ++#include <linux/string.h> ++#include <linux/major.h> ++#include <linux/mm.h> ++#include <linux/slab.h> ++#include <linux/init.h> ++#include <linux/devfs_fs_kernel.h> ++//#include <syslog.h> ++ ++#include <asm/uaccess.h> ++#include <asm/system.h> ++#include <asm/bitops.h> ++ ++#ifdef USB_FOR_MUX ++//#include <linux/usb.h> ++#include "ts0710_mux_usb.h" ++#endif ++ ++#include "ts0710.h" ++#include "ts0710_mux.h" ++ ++#define TS0710MUX_GPRS_SESSION_MAX 2 ++#define TS0710MUX_MAJOR 250 ++#define TS0710MUX_MINOR_START 0 ++#define NR_MUXS 16 ++ ++ /*#define TS0710MUX_TIME_OUT 30 *//* 300ms */ ++#define TS0710MUX_TIME_OUT 250 /* 2500ms, for BP UART hardware flow control AP UART */ ++ ++#define TS0710MUX_IO_DLCI_FC_ON 0x54F2 ++#define TS0710MUX_IO_DLCI_FC_OFF 0x54F3 ++#define TS0710MUX_IO_FC_ON 0x54F4 ++#define TS0710MUX_IO_FC_OFF 0x54F5 ++ ++#define TS0710MUX_MAX_BUF_SIZE 2048 ++ ++#define TS0710MUX_SEND_BUF_OFFSET 10 ++#define TS0710MUX_SEND_BUF_SIZE (DEF_TS0710_MTU + TS0710MUX_SEND_BUF_OFFSET + 34) ++#define TS0710MUX_RECV_BUF_SIZE TS0710MUX_SEND_BUF_SIZE ++ ++/*For BP UART problem Begin*/ ++#ifdef TS0710SEQ2 ++#define ACK_SPACE 66 /* 6 * 11(ACK frame size) */ ++#else ++#define ACK_SPACE 42 /* 6 * 7(ACK frame size) */ ++#endif ++/*For BP UART problem End*/ ++ ++ /*#define TS0710MUX_SERIAL_BUF_SIZE (DEF_TS0710_MTU + TS0710_MAX_HDR_SIZE)*//* For BP UART problem */ ++#define TS0710MUX_SERIAL_BUF_SIZE (DEF_TS0710_MTU + TS0710_MAX_HDR_SIZE + ACK_SPACE) /* For BP UART problem: ACK_SPACE */ ++ ++#define TS0710MUX_MAX_TOTAL_FRAME_SIZE (DEF_TS0710_MTU + TS0710_MAX_HDR_SIZE + FLAG_SIZE) ++#define TS0710MUX_MAX_CHARS_IN_BUF 65535 ++#define TS0710MUX_THROTTLE_THRESHOLD DEF_TS0710_MTU ++ ++#define TEST_PATTERN_SIZE 250 ++ ++#define CMDTAG 0x55 ++#define DATATAG 0xAA ++ ++#define ACK 0x4F /*For BP UART problem */ ++ ++/*For BP UART problem Begin*/ ++#ifdef TS0710SEQ2 ++#define FIRST_BP_SEQ_OFFSET 1 /*offset from start flag */ ++#define SECOND_BP_SEQ_OFFSET 2 /*offset from start flag */ ++#define FIRST_AP_SEQ_OFFSET 3 /*offset from start flag */ ++#define SECOND_AP_SEQ_OFFSET 4 /*offset from start flag */ ++#define SLIDE_BP_SEQ_OFFSET 5 /*offset from start flag */ ++#define SEQ_FIELD_SIZE 5 ++#else ++#define SLIDE_BP_SEQ_OFFSET 1 /*offset from start flag */ ++#define SEQ_FIELD_SIZE 1 ++#endif ++ ++#define ADDRESS_FIELD_OFFSET (1 + SEQ_FIELD_SIZE) /*offset from start flag */ ++/*For BP UART problem End*/ ++ ++#ifndef UNUSED_PARAM ++#define UNUSED_PARAM(v) (void)(v) ++#endif ++ ++#define TS0710MUX_GPRS1_DLCI 7 ++#define TS0710MUX_GPRS2_DLCI 8 ++ ++#define TS0710MUX_GPRS1_RECV_COUNT_IDX 0 ++#define TS0710MUX_GPRS1_SEND_COUNT_IDX 1 ++#define TS0710MUX_GPRS2_RECV_COUNT_IDX 2 ++#define TS0710MUX_GPRS2_SEND_COUNT_IDX 3 ++#define TS0710MUX_COUNT_MAX_IDX 3 ++#define TS0710MUX_COUNT_IDX_NUM (TS0710MUX_COUNT_MAX_IDX + 1) ++ ++static volatile int mux_data_count[TS0710MUX_COUNT_IDX_NUM] = { 0, 0, 0, 0 }; ++static volatile int mux_data_count2[TS0710MUX_COUNT_IDX_NUM] = { 0, 0, 0, 0 }; ++static struct semaphore mux_data_count_mutex[TS0710MUX_COUNT_IDX_NUM]; ++static volatile __u8 post_recv_count_flag = 0; ++ ++/*PROC file*/ ++struct proc_dir_entry *gprs_proc_file = NULL; ++ssize_t file_proc_read(struct file *file, char *buf, size_t size, ++ loff_t * ppos); ++ssize_t file_proc_write(struct file *file, const char *buf, size_t count, ++ loff_t * ppos); ++struct file_operations file_proc_operations = { ++ read:file_proc_read, ++ write:file_proc_write, ++}; ++typedef struct { ++ int recvBytes; ++ int sentBytes; ++} gprs_bytes; ++ ++static __u8 tty2dlci[NR_MUXS] = ++ { 1, 2, 3, 4, 5, 6, 7, 8, 6, 7, 8, 9, 10, 11, 12, 13 }; ++static __u8 iscmdtty[NR_MUXS] = ++ { 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0 }; ++typedef struct { ++ __u8 cmdtty; ++ __u8 datatty; ++} dlci_tty; ++static dlci_tty dlci2tty[] = { {0, 0}, /* DLCI 0 */ ++{0, 0}, /* DLCI 1 */ ++{1, 1}, /* DLCI 2 */ ++{2, 2}, /* DLCI 3 */ ++{3, 3}, /* DLCI 4 */ ++{4, 4}, /* DLCI 5 */ ++{5, 8}, /* DLCI 6 */ ++{6, 9}, /* DLCI 7 */ ++{7, 10}, /* DLCI 8 */ ++{11, 11}, /* DLCI 9 */ ++{12, 12}, /* DLCI 10 */ ++{13, 13}, /* DLCI 11 */ ++{14, 14}, /* DLCI 12 */ ++{15, 15} ++}; /* DLCI 13 */ ++ ++typedef struct { ++ volatile __u8 buf[TS0710MUX_SEND_BUF_SIZE]; ++ volatile __u8 *frame; ++ unsigned long flags; ++ volatile __u16 length; ++ volatile __u8 filled; ++ volatile __u8 dummy; /* Allignment to 4*n bytes */ ++} mux_send_struct; ++ ++/* Bit number in flags of mux_send_struct */ ++#define BUF_BUSY 0 ++ ++struct mux_recv_packet_tag { ++ __u8 *data; ++ __u32 length; ++ struct mux_recv_packet_tag *next; ++}; ++typedef struct mux_recv_packet_tag mux_recv_packet; ++ ++struct mux_recv_struct_tag { ++ __u8 data[TS0710MUX_RECV_BUF_SIZE]; ++ __u32 length; ++ __u32 total; ++ mux_recv_packet *mux_packet; ++ struct mux_recv_struct_tag *next; ++ int no_tty; ++ volatile __u8 post_unthrottle; ++}; ++typedef struct mux_recv_struct_tag mux_recv_struct; ++ ++#define RECV_RUNNING 0 ++static unsigned long mux_recv_flags = 0; ++ ++static mux_send_struct *mux_send_info[NR_MUXS]; ++static volatile __u8 mux_send_info_flags[NR_MUXS]; ++static volatile __u8 mux_send_info_idx = NR_MUXS; ++ ++static mux_recv_struct *mux_recv_info[NR_MUXS]; ++static volatile __u8 mux_recv_info_flags[NR_MUXS]; ++static mux_recv_struct *mux_recv_queue = NULL; ++ ++static struct tty_driver mux_driver; ++ ++#ifdef USB_FOR_MUX ++#define COMM_FOR_MUX_DRIVER usb_for_mux_driver ++#define COMM_FOR_MUX_TTY usb_for_mux_tty ++#define COMM_MUX_DISPATCHER usb_mux_dispatcher ++#define COMM_MUX_SENDER usb_mux_sender ++#else ++#define COMM_FOR_MUX_DRIVER serial_for_mux_driver ++#define COMM_FOR_MUX_TTY serial_for_mux_tty ++#define COMM_MUX_DISPATCHER serial_mux_dispatcher ++#define COMM_MUX_SENDER serial_mux_sender ++ ++extern struct list_head *tq_serial_for_mux; ++#endif ++ ++extern struct tty_driver *COMM_FOR_MUX_DRIVER; ++extern struct tty_struct *COMM_FOR_MUX_TTY; ++extern void (*COMM_MUX_DISPATCHER) (struct tty_struct * tty); ++extern void (*COMM_MUX_SENDER) (void); ++ ++static struct work_struct send_tqueue; ++static struct work_struct receive_tqueue; ++static struct work_struct post_recv_tqueue; ++ ++static struct tty_struct *mux_table[NR_MUXS]; ++static struct termios *mux_termios[NR_MUXS]; ++static struct termios *mux_termios_locked[NR_MUXS]; ++static volatile short int mux_tty[NR_MUXS]; ++ ++#ifdef min ++#undef min ++#define min(a,b) ( (a)<(b) ? (a):(b) ) ++#endif ++ ++static int get_count(__u8 idx); ++static int set_count(__u8 idx, int count); ++static int add_count(__u8 idx, int count); ++ ++static int send_ua(ts0710_con * ts0710, __u8 dlci); ++static int send_dm(ts0710_con * ts0710, __u8 dlci); ++static int send_sabm(ts0710_con * ts0710, __u8 dlci); ++static int send_disc(ts0710_con * ts0710, __u8 dlci); ++static void queue_uih(mux_send_struct * send_info, __u16 len, ++ ts0710_con * ts0710, __u8 dlci); ++static int send_pn_msg(ts0710_con * ts0710, __u8 prior, __u32 frame_size, ++ __u8 credit_flow, __u8 credits, __u8 dlci, __u8 cr); ++static int send_nsc_msg(ts0710_con * ts0710, mcc_type cmd, __u8 cr); ++static void set_uih_hdr(short_frame * uih_pkt, __u8 dlci, __u32 len, __u8 cr); ++ ++static __u32 crc_check(__u8 * data, __u32 length, __u8 check_sum); ++static __u8 crc_calc(__u8 * data, __u32 length); ++static void create_crctable(__u8 table[]); ++ ++static void mux_sched_send(void); ++ ++static __u8 crctable[256]; ++ ++static ts0710_con ts0710_connection; ++/* ++static rpn_values rpn_val; ++*/ ++ ++static int valid_dlci(__u8 dlci) ++{ ++ if ((dlci < TS0710_MAX_CHN) && (dlci > 0)) ++ return 1; ++ else ++ return 0; ++} ++ ++#ifdef TS0710DEBUG ++ ++#ifdef PRINT_OUTPUT_PRINTK ++#define TS0710_DEBUG(fmt, arg...) printk(KERN_INFO "MUX " __FUNCTION__ ": " fmt "\n" , ## arg) ++#else ++#include "ezxlog.h" ++static __u8 strDebug[256]; ++#define TS0710_DEBUG(fmt, arg...) ({ snprintf(strDebug, sizeof(strDebug), "MUX " __FUNCTION__ ": " fmt "\n" , ## arg); \ ++ /*printk("%s", strDebug)*/ezxlogk("MX", strDebug, strlen(strDebug)); }) ++#endif /* End #ifdef PRINT_OUTPUT_PRINTK */ ++ ++#else ++#define TS0710_DEBUG(fmt...) ++#endif /* End #ifdef TS0710DEBUG */ ++ ++#ifdef TS0710LOG ++static unsigned char g_tbuf[TS0710MUX_MAX_BUF_SIZE]; ++#ifdef PRINT_OUTPUT_PRINTK ++#define TS0710_LOG(fmt, arg...) printk(fmt, ## arg) ++#define TS0710_PRINTK(fmt, arg...) printk(fmt, ## arg) ++#else ++#include "ezxlog.h" ++static __u8 strLog[256]; ++#define TS0710_LOG(fmt, arg...) ({ snprintf(strLog, sizeof(strLog), fmt, ## arg); \ ++ /*printk("%s", strLog)*/ezxlogk("MX", strLog, strlen(strLog)); }) ++#define TS0710_PRINTK(fmt, arg...) ({ printk(fmt, ## arg); \ ++ TS0710_LOG(fmt, ## arg); }) ++#endif /* End #ifdef PRINT_OUTPUT_PRINTK */ ++ ++#else ++#define TS0710_LOG(fmt...) ++#define TS0710_PRINTK(fmt, arg...) printk(fmt, ## arg) ++#endif /* End #ifdef TS0710LOG */ ++ ++#ifdef TS0710DEBUG ++static void TS0710_DEBUGHEX(__u8 * buf, int len) ++{ ++ static unsigned char tbuf[TS0710MUX_MAX_BUF_SIZE]; ++ ++ int i; ++ int c; ++ ++ if (len <= 0) { ++ return; ++ } ++ ++ c = 0; ++ for (i = 0; (i < len) && (c < (TS0710MUX_MAX_BUF_SIZE - 3)); i++) { ++ sprintf(&tbuf[c], "%02x ", buf[i]); ++ c += 3; ++ } ++ tbuf[c] = 0; ++ ++#ifdef PRINT_OUTPUT_PRINTK ++ TS0710_DEBUG("%s", tbuf); ++#else ++ /*printk("%s\n", tbuf) */ ezxlogk("MX", tbuf, c); ++#endif ++} ++static void TS0710_DEBUGSTR(__u8 * buf, int len) ++{ ++ static unsigned char tbuf[TS0710MUX_MAX_BUF_SIZE]; ++ ++ if (len <= 0) { ++ return; ++ } ++ ++ if (len > (TS0710MUX_MAX_BUF_SIZE - 1)) { ++ len = (TS0710MUX_MAX_BUF_SIZE - 1); ++ } ++ ++ memcpy(tbuf, buf, len); ++ tbuf[len] = 0; ++ ++#ifdef PRINT_OUTPUT_PRINTK ++ /* 0x00 byte in the string pointed by tbuf may truncate the print result */ ++ TS0710_DEBUG("%s", tbuf); ++#else ++ /*printk("%s\n", tbuf) */ ezxlogk("MX", tbuf, len); ++#endif ++} ++#else ++#define TS0710_DEBUGHEX(buf, len) ++#define TS0710_DEBUGSTR(buf, len) ++#endif /* End #ifdef TS0710DEBUG */ ++ ++#ifdef TS0710LOG ++static void TS0710_LOGSTR_FRAME(__u8 send, __u8 * data, int len) ++{ ++ short_frame *short_pkt; ++ long_frame *long_pkt; ++ __u8 *uih_data_start; ++ __u32 uih_len; ++ __u8 dlci; ++ int pos; ++ ++ if (len <= 0) { ++ return; ++ } ++ ++ pos = 0; ++ if (send) { ++ pos += sprintf(&g_tbuf[pos], "<"); ++ short_pkt = (short_frame *) (data + 1); /*For BP UART problem */ ++ } else { ++ /*For BP UART problem */ ++ /*pos += sprintf(&g_tbuf[pos], ">"); */ ++ pos += sprintf(&g_tbuf[pos], ">%d ", *(data + SLIDE_BP_SEQ_OFFSET)); /*For BP UART problem */ ++ ++#ifdef TS0710SEQ2 ++ pos += sprintf(&g_tbuf[pos], "%02x %02x %02x %02x ", *(data + FIRST_BP_SEQ_OFFSET), *(data + SECOND_BP_SEQ_OFFSET), *(data + FIRST_AP_SEQ_OFFSET), *(data + SECOND_AP_SEQ_OFFSET)); /*For BP UART problem */ ++#endif ++ ++ short_pkt = (short_frame *) (data + ADDRESS_FIELD_OFFSET); /*For BP UART problem */ ++ } ++ ++ /*For BP UART problem */ ++ /*short_pkt = (short_frame *)(data + 1); */ ++ ++ dlci = short_pkt->h.addr.server_chn << 1 | short_pkt->h.addr.d; ++ switch (CLR_PF(short_pkt->h.control)) { ++ case SABM: ++ pos += sprintf(&g_tbuf[pos], "C SABM %d ::", dlci); ++ break; ++ case UA: ++ pos += sprintf(&g_tbuf[pos], "C UA %d ::", dlci); ++ break; ++ case DM: ++ pos += sprintf(&g_tbuf[pos], "C DM %d ::", dlci); ++ break; ++ case DISC: ++ pos += sprintf(&g_tbuf[pos], "C DISC %d ::", dlci); ++ break; ++ ++ /*For BP UART problem Begin */ ++ case ACK: ++ pos += sprintf(&g_tbuf[pos], "C ACK %d ", short_pkt->data[0]); ++ ++#ifdef TS0710SEQ2 ++ pos += sprintf(&g_tbuf[pos], "%02x %02x %02x %02x ", short_pkt->data[1], short_pkt->data[2], short_pkt->data[3], short_pkt->data[4]); /*For BP UART problem */ ++#endif ++ ++ pos += sprintf(&g_tbuf[pos], "::"); ++ break; ++ /*For BP UART problem End */ ++ ++ case UIH: ++ if (!dlci) { ++ pos += sprintf(&g_tbuf[pos], "C MCC %d ::", dlci); ++ } else { ++ ++ if ((short_pkt->h.length.ea) == 0) { ++ long_pkt = (long_frame *) short_pkt; ++ uih_len = GET_LONG_LENGTH(long_pkt->h.length); ++ uih_data_start = long_pkt->h.data; ++ } else { ++ uih_len = short_pkt->h.length.len; ++ uih_data_start = short_pkt->data; ++ } ++ switch (*uih_data_start) { ++ case CMDTAG: ++ pos += ++ sprintf(&g_tbuf[pos], "I %d A %d ::", dlci, ++ uih_len); ++ break; ++ case DATATAG: ++ default: ++ pos += ++ sprintf(&g_tbuf[pos], "I %d D %d ::", dlci, ++ uih_len); ++ break; ++ } ++ ++ } ++ break; ++ default: ++ pos += sprintf(&g_tbuf[pos], "N!!! %d ::", dlci); ++ break; ++ } ++ ++ if (len > (sizeof(g_tbuf) - pos - 1)) { ++ len = (sizeof(g_tbuf) - pos - 1); ++ } ++ ++ memcpy(&g_tbuf[pos], data, len); ++ pos += len; ++ g_tbuf[pos] = 0; ++ ++#ifdef PRINT_OUTPUT_PRINTK ++ /* 0x00 byte in the string pointed by g_tbuf may truncate the print result */ ++ TS0710_LOG("%s\n", g_tbuf); ++#else ++ /*printk("%s\n", g_tbuf) */ ezxlogk("MX", g_tbuf, pos); ++#endif ++} ++#else ++#define TS0710_LOGSTR_FRAME(send, data, len) ++#endif ++ ++#ifdef TS0710SIG ++#define my_for_each_task(p) \ ++ for ((p) = current; ((p) = (p)->next_task) != current; ) ++ ++static void TS0710_SIG2APLOGD(void) ++{ ++ struct task_struct *p; ++ static __u8 sig = 0; ++ ++ if (sig) { ++ return; ++ } ++ ++ read_lock(&tasklist_lock); ++ my_for_each_task(p) { ++ if (strncmp(p->comm, "aplogd", 6) == 0) { ++ sig = 1; ++ if (send_sig(SIGUSR2, p, 1) == 0) { ++ TS0710_PRINTK ++ ("MUX: success to send SIGUSR2 to aplogd!\n"); ++ } else { ++ TS0710_PRINTK ++ ("MUX: failure to send SIGUSR2 to aplogd!\n"); ++ } ++ break; ++ } ++ } ++ read_unlock(&tasklist_lock); ++ ++ if (!sig) { ++ TS0710_PRINTK("MUX: not found aplogd!\n"); ++ } ++} ++#else ++#define TS0710_SIG2APLOGD() ++#endif ++ ++static int basic_write(ts0710_con * ts0710, __u8 * buf, int len) ++{ ++ int res; ++ ++ UNUSED_PARAM(ts0710); ++ ++ buf[0] = TS0710_BASIC_FLAG; ++ buf[len + 1] = TS0710_BASIC_FLAG; ++ ++ if ((COMM_FOR_MUX_DRIVER == 0) || (COMM_FOR_MUX_TTY == 0)) { ++ TS0710_PRINTK ++ ("MUX basic_write: (COMM_FOR_MUX_DRIVER == 0) || (COMM_FOR_MUX_TTY == 0)\n"); ++ ++#ifndef USB_FOR_MUX ++ TS0710_PRINTK ++ ("MUX basic_write: tapisrv might be down!!! (serial_for_mux_driver == 0) || (serial_for_mux_tty == 0)\n"); ++ TS0710_SIG2APLOGD(); ++#endif ++ ++ return -1; ++ } ++ ++ TS0710_LOGSTR_FRAME(1, buf, len + 2); ++ TS0710_DEBUGHEX(buf, len + 2); ++ ++ res = COMM_FOR_MUX_DRIVER->write(COMM_FOR_MUX_TTY, buf, len + 2); ++ ++ if (res != len + 2) { ++ TS0710_PRINTK("MUX basic_write: Write Error!\n"); ++ return -1; ++ } ++ ++ return len + 2; ++} ++ ++/* Functions for the crc-check and calculation */ ++ ++#define CRC_VALID 0xcf ++ ++static __u32 crc_check(__u8 * data, __u32 length, __u8 check_sum) ++{ ++ __u8 fcs = 0xff; ++ ++ while (length--) { ++ fcs = crctable[fcs ^ *data++]; ++ } ++ fcs = crctable[fcs ^ check_sum]; ++ TS0710_DEBUG("fcs : %d\n", fcs); ++ if (fcs == (uint) 0xcf) { /*CRC_VALID) */ ++ TS0710_DEBUG("crc_check: CRC check OK\n"); ++ return 0; ++ } else { ++ TS0710_PRINTK("MUX crc_check: CRC check failed\n"); ++ return 1; ++ } ++} ++ ++/* Calculates the checksum according to the ts0710 specification */ ++ ++static __u8 crc_calc(__u8 * data, __u32 length) ++{ ++ __u8 fcs = 0xff; ++ ++ while (length--) { ++ fcs = crctable[fcs ^ *data++]; ++ } ++ ++ return 0xff - fcs; ++} ++ ++/* Calulates a reversed CRC table for the FCS check */ ++ ++static void create_crctable(__u8 table[]) ++{ ++ int i, j; ++ ++ __u8 data; ++ __u8 code_word = (__u8) 0xe0; ++ __u8 sr = (__u8) 0; ++ ++ for (j = 0; j < 256; j++) { ++ data = (__u8) j; ++ ++ for (i = 0; i < 8; i++) { ++ if ((data & 0x1) ^ (sr & 0x1)) { ++ sr >>= 1; ++ sr ^= code_word; ++ } else { ++ sr >>= 1; ++ } ++ ++ data >>= 1; ++ sr &= 0xff; ++ } ++ ++ table[j] = sr; ++ sr = 0; ++ } ++} ++ ++static void ts0710_reset_dlci(__u8 j) ++{ ++ if (j >= TS0710_MAX_CHN) ++ return; ++ ++ ts0710_connection.dlci[j].state = DISCONNECTED; ++ ts0710_connection.dlci[j].flow_control = 0; ++ ts0710_connection.dlci[j].mtu = DEF_TS0710_MTU; ++ ts0710_connection.dlci[j].initiated = 0; ++ ts0710_connection.dlci[j].initiator = 0; ++ init_waitqueue_head(&ts0710_connection.dlci[j].open_wait); ++ init_waitqueue_head(&ts0710_connection.dlci[j].close_wait); ++} ++ ++static void ts0710_reset_con(void) ++{ ++ __u8 j; ++ ++ ts0710_connection.initiator = 0; ++ ts0710_connection.mtu = DEF_TS0710_MTU + TS0710_MAX_HDR_SIZE; ++ ts0710_connection.be_testing = 0; ++ ts0710_connection.test_errs = 0; ++ init_waitqueue_head(&ts0710_connection.test_wait); ++ ++ for (j = 0; j < TS0710_MAX_CHN; j++) { ++ ts0710_reset_dlci(j); ++ } ++} ++ ++static void ts0710_init(void) ++{ ++ create_crctable(crctable); ++ ++ ts0710_reset_con(); ++ ++ /* Set the values in the rpn octets */ ++/* ++ rpn_val.bit_rate = 7; ++ rpn_val.data_bits = 3; ++ rpn_val.stop_bit = 0; ++ rpn_val.parity = 0; ++ rpn_val.parity_type = 0; ++ rpn_val.res1 = 0; ++ rpn_val.xon_input = 0; ++ rpn_val.xon_output = 0; ++ rpn_val.rtr_input = 0; ++ rpn_val.rtr_output = 0; ++ rpn_val.rtc_input = 0; ++ rpn_val.rtc_output = 0; ++ rpn_val.res2 = 0; ++ rpn_val.xon_u8 = 0x11; ++ rpn_val.xoff_u8 = 0x13; ++ memset(&rpn_val.pm, 0 , 2); *//* Set the mask to zero */ ++} ++ ++static void ts0710_upon_disconnect(void) ++{ ++ ts0710_con *ts0710 = &ts0710_connection; ++ __u8 j; ++ ++ for (j = 0; j < TS0710_MAX_CHN; j++) { ++ ts0710->dlci[j].state = DISCONNECTED; ++ wake_up_interruptible(&ts0710->dlci[j].open_wait); ++ wake_up_interruptible(&ts0710->dlci[j].close_wait); ++ } ++ ts0710->be_testing = 0; ++ wake_up_interruptible(&ts0710->test_wait); ++ ts0710_reset_con(); ++} ++ ++/* Sending packet functions */ ++ ++/* Creates a UA packet and puts it at the beginning of the pkt pointer */ ++ ++static int send_ua(ts0710_con * ts0710, __u8 dlci) ++{ ++ __u8 buf[sizeof(short_frame) + FCS_SIZE + FLAG_SIZE]; ++ short_frame *ua; ++ ++ TS0710_DEBUG("send_ua: Creating UA packet to DLCI %d\n", dlci); ++ ++ ua = (short_frame *) (buf + 1); ++ ua->h.addr.ea = 1; ++ ua->h.addr.cr = ((~(ts0710->initiator)) & 0x1); ++ ua->h.addr.d = (dlci) & 0x1; ++ ua->h.addr.server_chn = (dlci) >> 0x1; ++ ua->h.control = SET_PF(UA); ++ ua->h.length.ea = 1; ++ ua->h.length.len = 0; ++ ua->data[0] = crc_calc((__u8 *) ua, SHORT_CRC_CHECK); ++ ++ return basic_write(ts0710, buf, sizeof(short_frame) + FCS_SIZE); ++} ++ ++/* Creates a DM packet and puts it at the beginning of the pkt pointer */ ++ ++static int send_dm(ts0710_con * ts0710, __u8 dlci) ++{ ++ __u8 buf[sizeof(short_frame) + FCS_SIZE + FLAG_SIZE]; ++ short_frame *dm; ++ ++ TS0710_DEBUG("send_dm: Creating DM packet to DLCI %d\n", dlci); ++ ++ dm = (short_frame *) (buf + 1); ++ dm->h.addr.ea = 1; ++ dm->h.addr.cr = ((~(ts0710->initiator)) & 0x1); ++ dm->h.addr.d = dlci & 0x1; ++ dm->h.addr.server_chn = dlci >> 0x1; ++ dm->h.control = SET_PF(DM); ++ dm->h.length.ea = 1; ++ dm->h.length.len = 0; ++ dm->data[0] = crc_calc((__u8 *) dm, SHORT_CRC_CHECK); ++ ++ return basic_write(ts0710, buf, sizeof(short_frame) + FCS_SIZE); ++} ++ ++static int send_sabm(ts0710_con * ts0710, __u8 dlci) ++{ ++ __u8 buf[sizeof(short_frame) + FCS_SIZE + FLAG_SIZE]; ++ short_frame *sabm; ++ ++ TS0710_DEBUG("send_sabm: Creating SABM packet to DLCI %d\n", dlci); ++ ++ sabm = (short_frame *) (buf + 1); ++ sabm->h.addr.ea = 1; ++ sabm->h.addr.cr = ((ts0710->initiator) & 0x1); ++ sabm->h.addr.d = dlci & 0x1; ++ sabm->h.addr.server_chn = dlci >> 0x1; ++ sabm->h.control = SET_PF(SABM); ++ sabm->h.length.ea = 1; ++ sabm->h.length.len = 0; ++ sabm->data[0] = crc_calc((__u8 *) sabm, SHORT_CRC_CHECK); ++ ++ return basic_write(ts0710, buf, sizeof(short_frame) + FCS_SIZE); ++} ++ ++static int send_disc(ts0710_con * ts0710, __u8 dlci) ++{ ++ __u8 buf[sizeof(short_frame) + FCS_SIZE + FLAG_SIZE]; ++ short_frame *disc; ++ ++ TS0710_DEBUG("send_disc: Creating DISC packet to DLCI %d\n", dlci); ++ ++ disc = (short_frame *) (buf + 1); ++ disc->h.addr.ea = 1; ++ disc->h.addr.cr = ((ts0710->initiator) & 0x1); ++ disc->h.addr.d = dlci & 0x1; ++ disc->h.addr.server_chn = dlci >> 0x1; ++ disc->h.control = SET_PF(DISC); ++ disc->h.length.ea = 1; ++ disc->h.length.len = 0; ++ disc->data[0] = crc_calc((__u8 *) disc, SHORT_CRC_CHECK); ++ ++ return basic_write(ts0710, buf, sizeof(short_frame) + FCS_SIZE); ++} ++ ++static void queue_uih(mux_send_struct * send_info, __u16 len, ++ ts0710_con * ts0710, __u8 dlci) ++{ ++ __u32 size; ++ ++ TS0710_DEBUG ++ ("queue_uih: Creating UIH packet with %d bytes data to DLCI %d\n", ++ len, dlci); ++ ++ if (len > SHORT_PAYLOAD_SIZE) { ++ long_frame *l_pkt; ++ ++ size = sizeof(long_frame) + len + FCS_SIZE; ++ l_pkt = (long_frame *) (send_info->frame - sizeof(long_frame)); ++ set_uih_hdr((void *)l_pkt, dlci, len, ts0710->initiator); ++ l_pkt->data[len] = crc_calc((__u8 *) l_pkt, LONG_CRC_CHECK); ++ send_info->frame = ((__u8 *) l_pkt) - 1; ++ } else { ++ short_frame *s_pkt; ++ ++ size = sizeof(short_frame) + len + FCS_SIZE; ++ s_pkt = ++ (short_frame *) (send_info->frame - sizeof(short_frame)); ++ set_uih_hdr((void *)s_pkt, dlci, len, ts0710->initiator); ++ s_pkt->data[len] = crc_calc((__u8 *) s_pkt, SHORT_CRC_CHECK); ++ send_info->frame = ((__u8 *) s_pkt) - 1; ++ } ++ send_info->length = size; ++} ++ ++/* Multiplexer command packets functions */ ++ ++/* Turns on the ts0710 flow control */ ++ ++static int ts0710_fcon_msg(ts0710_con * ts0710, __u8 cr) ++{ ++ __u8 buf[30]; ++ mcc_short_frame *mcc_pkt; ++ short_frame *uih_pkt; ++ __u32 size; ++ ++ size = sizeof(short_frame) + sizeof(mcc_short_frame) + FCS_SIZE; ++ uih_pkt = (short_frame *) (buf + 1); ++ set_uih_hdr(uih_pkt, CTRL_CHAN, sizeof(mcc_short_frame), ++ ts0710->initiator); ++ uih_pkt->data[sizeof(mcc_short_frame)] = ++ crc_calc((__u8 *) uih_pkt, SHORT_CRC_CHECK); ++ mcc_pkt = (mcc_short_frame *) (uih_pkt->data); ++ ++ mcc_pkt->h.type.ea = EA; ++ mcc_pkt->h.type.cr = cr; ++ mcc_pkt->h.type.type = FCON; ++ mcc_pkt->h.length.ea = EA; ++ mcc_pkt->h.length.len = 0; ++ ++ return basic_write(ts0710, buf, size); ++} ++ ++/* Turns off the ts0710 flow control */ ++ ++static int ts0710_fcoff_msg(ts0710_con * ts0710, __u8 cr) ++{ ++ __u8 buf[30]; ++ mcc_short_frame *mcc_pkt; ++ short_frame *uih_pkt; ++ __u32 size; ++ ++ size = (sizeof(short_frame) + sizeof(mcc_short_frame) + FCS_SIZE); ++ uih_pkt = (short_frame *) (buf + 1); ++ set_uih_hdr(uih_pkt, CTRL_CHAN, sizeof(mcc_short_frame), ++ ts0710->initiator); ++ uih_pkt->data[sizeof(mcc_short_frame)] = ++ crc_calc((__u8 *) uih_pkt, SHORT_CRC_CHECK); ++ mcc_pkt = (mcc_short_frame *) (uih_pkt->data); ++ ++ mcc_pkt->h.type.ea = 1; ++ mcc_pkt->h.type.cr = cr; ++ mcc_pkt->h.type.type = FCOFF; ++ mcc_pkt->h.length.ea = 1; ++ mcc_pkt->h.length.len = 0; ++ ++ return basic_write(ts0710, buf, size); ++} ++ ++/* ++static int ts0710_rpn_msg(ts0710_con *ts0710, __u8 cr, __u8 dlci, __u8 req) ++{ ++ char buf[100]; ++ rpn_msg* rpn_pkt; ++ __u32 fsize; ++ __u32 psize; ++ ++ fsize = sizeof(rpn_msg); ++ ++ if (req) { ++ fsize -= sizeof(rpn_values); ++ } ++ ++ psize = (fsize - sizeof(short_frame) - FCS_SIZE); ++ ++ rpn_pkt = (rpn_msg *) buf; ++ ++ set_uih_hdr((short_frame *) rpn_pkt, CTRL_CHAN, psize, ts0710->initiator); ++ ++ rpn_pkt->fcs = crc_calc((__u8*) rpn_pkt, SHORT_CRC_CHECK); ++ ++ rpn_pkt->mcc_s_head.type.ea = EA; ++ rpn_pkt->mcc_s_head.type.cr = cr; ++ rpn_pkt->mcc_s_head.type.type = RPN; ++ rpn_pkt->mcc_s_head.length.ea = EA; ++ ++ rpn_pkt->dlci.ea = EA; ++ rpn_pkt->dlci.cr = 1; ++ rpn_pkt->dlci.d = dlci & 1; ++ rpn_pkt->dlci.server_chn = (dlci >> 1); ++ ++ if (req) { ++ rpn_pkt->mcc_s_head.length.len = 1; ++ rpn_pkt->rpn_val.bit_rate = rpn_pkt->fcs; ++ } else { ++ rpn_pkt->mcc_s_head.length.len = 8; ++ memcpy(&(rpn_pkt->rpn_val), &rpn_val, sizeof(rpn_values)); ++ } ++ return basic_write(ts0710, buf, fsize); ++} ++*/ ++/* ++static int ts0710_rls_msg(ts0710_con *ts0710, __u8 cr, __u8 dlci, __u8 err_code) ++{ ++ char buf[100]; ++ rls_msg *rls_pkt; ++ __u32 fsize; ++ __u32 psize; ++ ++ fsize = sizeof(rls_msg); ++ psize = fsize - sizeof(short_frame) - FCS_SIZE; ++ rls_pkt = (rls_msg *) buf; ++ ++ set_uih_hdr((short_frame *) rls_pkt, CTRL_CHAN, psize, ts0710->initiator); ++ rls_pkt->fcs = crc_calc((__u8*) rls_pkt, SHORT_CRC_CHECK); ++ ++ rls_pkt->mcc_s_head.type.ea = EA; ++ rls_pkt->mcc_s_head.type.cr = cr; ++ rls_pkt->mcc_s_head.type.type = RLS; ++ rls_pkt->mcc_s_head.length.ea = EA; ++ rls_pkt->mcc_s_head.length.len = 2; ++ ++ rls_pkt->dlci.ea = EA; ++ rls_pkt->dlci.cr = 1; ++ rls_pkt->dlci.d = dlci & 1; ++ rls_pkt->dlci.server_chn = dlci >> 1; ++ rls_pkt->error = err_code; ++ rls_pkt->res = 0; ++ ++ return basic_write(ts0710, buf, fsize); ++} ++*/ ++ ++/* Sends an PN-messages and sets the not negotiable parameters to their ++ default values in ts0710 */ ++ ++static int send_pn_msg(ts0710_con * ts0710, __u8 prior, __u32 frame_size, ++ __u8 credit_flow, __u8 credits, __u8 dlci, __u8 cr) ++{ ++ __u8 buf[30]; ++ pn_msg *pn_pkt; ++ __u32 size; ++ TS0710_DEBUG ++ ("send_pn_msg: DLCI 0x%02x, prior:0x%02x, frame_size:%d, credit_flow:%x, credits:%d, cr:%x\n", ++ dlci, prior, frame_size, credit_flow, credits, cr); ++ ++ size = sizeof(pn_msg); ++ pn_pkt = (pn_msg *) (buf + 1); ++ ++ set_uih_hdr((void *)pn_pkt, CTRL_CHAN, ++ size - (sizeof(short_frame) + FCS_SIZE), ts0710->initiator); ++ pn_pkt->fcs = crc_calc((__u8 *) pn_pkt, SHORT_CRC_CHECK); ++ ++ pn_pkt->mcc_s_head.type.ea = 1; ++ pn_pkt->mcc_s_head.type.cr = cr; ++ pn_pkt->mcc_s_head.type.type = PN; ++ pn_pkt->mcc_s_head.length.ea = 1; ++ pn_pkt->mcc_s_head.length.len = 8; ++ ++ pn_pkt->res1 = 0; ++ pn_pkt->res2 = 0; ++ pn_pkt->dlci = dlci; ++ pn_pkt->frame_type = 0; ++ pn_pkt->credit_flow = credit_flow; ++ pn_pkt->prior = prior; ++ pn_pkt->ack_timer = 0; ++ SET_PN_MSG_FRAME_SIZE(pn_pkt, frame_size); ++ pn_pkt->credits = credits; ++ pn_pkt->max_nbrof_retrans = 0; ++ ++ return basic_write(ts0710, buf, size); ++} ++ ++/* Send a Not supported command - command, which needs 3 bytes */ ++ ++static int send_nsc_msg(ts0710_con * ts0710, mcc_type cmd, __u8 cr) ++{ ++ __u8 buf[30]; ++ nsc_msg *nsc_pkt; ++ __u32 size; ++ ++ size = sizeof(nsc_msg); ++ nsc_pkt = (nsc_msg *) (buf + 1); ++ ++ set_uih_hdr((void *)nsc_pkt, CTRL_CHAN, ++ sizeof(nsc_msg) - sizeof(short_frame) - FCS_SIZE, ++ ts0710->initiator); ++ ++ nsc_pkt->fcs = crc_calc((__u8 *) nsc_pkt, SHORT_CRC_CHECK); ++ ++ nsc_pkt->mcc_s_head.type.ea = 1; ++ nsc_pkt->mcc_s_head.type.cr = cr; ++ nsc_pkt->mcc_s_head.type.type = NSC; ++ nsc_pkt->mcc_s_head.length.ea = 1; ++ nsc_pkt->mcc_s_head.length.len = 1; ++ ++ nsc_pkt->command_type.ea = 1; ++ nsc_pkt->command_type.cr = cmd.cr; ++ nsc_pkt->command_type.type = cmd.type; ++ ++ return basic_write(ts0710, buf, size); ++} ++ ++static int ts0710_msc_msg(ts0710_con * ts0710, __u8 value, __u8 cr, __u8 dlci) ++{ ++ __u8 buf[30]; ++ msc_msg *msc_pkt; ++ __u32 size; ++ ++ size = sizeof(msc_msg); ++ msc_pkt = (msc_msg *) (buf + 1); ++ ++ set_uih_hdr((void *)msc_pkt, CTRL_CHAN, ++ sizeof(msc_msg) - sizeof(short_frame) - FCS_SIZE, ++ ts0710->initiator); ++ ++ msc_pkt->fcs = crc_calc((__u8 *) msc_pkt, SHORT_CRC_CHECK); ++ ++ msc_pkt->mcc_s_head.type.ea = 1; ++ msc_pkt->mcc_s_head.type.cr = cr; ++ msc_pkt->mcc_s_head.type.type = MSC; ++ msc_pkt->mcc_s_head.length.ea = 1; ++ msc_pkt->mcc_s_head.length.len = 2; ++ ++ msc_pkt->dlci.ea = 1; ++ msc_pkt->dlci.cr = 1; ++ msc_pkt->dlci.d = dlci & 1; ++ msc_pkt->dlci.server_chn = (dlci >> 1) & 0x1f; ++ ++ msc_pkt->v24_sigs = value; ++ ++ return basic_write(ts0710, buf, size); ++} ++ ++static int ts0710_test_msg(ts0710_con * ts0710, __u8 * test_pattern, __u32 len, ++ __u8 cr, __u8 * f_buf /*Frame buf */ ) ++{ ++ __u32 size; ++ ++ if (len > SHORT_PAYLOAD_SIZE) { ++ long_frame *uih_pkt; ++ mcc_long_frame *mcc_pkt; ++ ++ size = ++ (sizeof(long_frame) + sizeof(mcc_long_frame) + len + ++ FCS_SIZE); ++ uih_pkt = (long_frame *) (f_buf + 1); ++ ++ set_uih_hdr((short_frame *) uih_pkt, CTRL_CHAN, len + ++ sizeof(mcc_long_frame), ts0710->initiator); ++ uih_pkt->data[GET_LONG_LENGTH(uih_pkt->h.length)] = ++ crc_calc((__u8 *) uih_pkt, LONG_CRC_CHECK); ++ mcc_pkt = (mcc_long_frame *) uih_pkt->data; ++ ++ mcc_pkt->h.type.ea = EA; ++ /* cr tells whether it is a commmand (1) or a response (0) */ ++ mcc_pkt->h.type.cr = cr; ++ mcc_pkt->h.type.type = TEST; ++ SET_LONG_LENGTH(mcc_pkt->h.length, len); ++ memcpy(mcc_pkt->value, test_pattern, len); ++ } else if (len > (SHORT_PAYLOAD_SIZE - sizeof(mcc_short_frame))) { ++ long_frame *uih_pkt; ++ mcc_short_frame *mcc_pkt; ++ ++ /* Create long uih packet and short mcc packet */ ++ size = ++ (sizeof(long_frame) + sizeof(mcc_short_frame) + len + ++ FCS_SIZE); ++ uih_pkt = (long_frame *) (f_buf + 1); ++ ++ set_uih_hdr((short_frame *) uih_pkt, CTRL_CHAN, ++ len + sizeof(mcc_short_frame), ts0710->initiator); ++ uih_pkt->data[GET_LONG_LENGTH(uih_pkt->h.length)] = ++ crc_calc((__u8 *) uih_pkt, LONG_CRC_CHECK); ++ mcc_pkt = (mcc_short_frame *) uih_pkt->data; ++ ++ mcc_pkt->h.type.ea = EA; ++ mcc_pkt->h.type.cr = cr; ++ mcc_pkt->h.type.type = TEST; ++ mcc_pkt->h.length.ea = EA; ++ mcc_pkt->h.length.len = len; ++ memcpy(mcc_pkt->value, test_pattern, len); ++ } else { ++ short_frame *uih_pkt; ++ mcc_short_frame *mcc_pkt; ++ ++ size = ++ (sizeof(short_frame) + sizeof(mcc_short_frame) + len + ++ FCS_SIZE); ++ uih_pkt = (short_frame *) (f_buf + 1); ++ ++ set_uih_hdr((void *)uih_pkt, CTRL_CHAN, len ++ + sizeof(mcc_short_frame), ts0710->initiator); ++ uih_pkt->data[uih_pkt->h.length.len] = ++ crc_calc((__u8 *) uih_pkt, SHORT_CRC_CHECK); ++ mcc_pkt = (mcc_short_frame *) uih_pkt->data; ++ ++ mcc_pkt->h.type.ea = EA; ++ mcc_pkt->h.type.cr = cr; ++ mcc_pkt->h.type.type = TEST; ++ mcc_pkt->h.length.ea = EA; ++ mcc_pkt->h.length.len = len; ++ memcpy(mcc_pkt->value, test_pattern, len); ++ ++ } ++ return basic_write(ts0710, f_buf, size); ++} ++ ++static void set_uih_hdr(short_frame * uih_pkt, __u8 dlci, __u32 len, __u8 cr) ++{ ++ uih_pkt->h.addr.ea = 1; ++ uih_pkt->h.addr.cr = cr; ++ uih_pkt->h.addr.d = dlci & 0x1; ++ uih_pkt->h.addr.server_chn = dlci >> 1; ++ uih_pkt->h.control = CLR_PF(UIH); ++ ++ if (len > SHORT_PAYLOAD_SIZE) { ++ SET_LONG_LENGTH(((long_frame *) uih_pkt)->h.length, len); ++ } else { ++ uih_pkt->h.length.ea = 1; ++ uih_pkt->h.length.len = len; ++ } ++} ++ ++/* Parses a multiplexer control channel packet */ ++ ++void process_mcc(__u8 * data, __u32 len, ts0710_con * ts0710, int longpkt) ++{ ++ __u8 *tbuf = NULL; ++ mcc_short_frame *mcc_short_pkt; ++ int j; ++ ++ if (longpkt) { ++ mcc_short_pkt = ++ (mcc_short_frame *) (((long_frame *) data)->data); ++ } else { ++ mcc_short_pkt = ++ (mcc_short_frame *) (((short_frame *) data)->data); ++ } ++ ++ switch (mcc_short_pkt->h.type.type) { ++ case TEST: ++ if (mcc_short_pkt->h.type.cr == MCC_RSP) { ++ TS0710_DEBUG("Received test command response\n"); ++ ++ if (ts0710->be_testing) { ++ if ((mcc_short_pkt->h.length.ea) == 0) { ++ mcc_long_frame *mcc_long_pkt; ++ mcc_long_pkt = ++ (mcc_long_frame *) mcc_short_pkt; ++ if (GET_LONG_LENGTH ++ (mcc_long_pkt->h.length) != ++ TEST_PATTERN_SIZE) { ++ ts0710->test_errs = ++ TEST_PATTERN_SIZE; ++ TS0710_DEBUG ++ ("Err: received test pattern is %d bytes long, not expected %d\n", ++ GET_LONG_LENGTH ++ (mcc_long_pkt->h.length), ++ TEST_PATTERN_SIZE); ++ } else { ++ ts0710->test_errs = 0; ++ for (j = 0; ++ j < TEST_PATTERN_SIZE; ++ j++) { ++ if (mcc_long_pkt-> ++ value[j] != ++ (j & 0xFF)) { ++ (ts0710-> ++ test_errs)++; ++ } ++ } ++ } ++ ++ } else { ++ ++#if TEST_PATTERN_SIZE < 128 ++ if (mcc_short_pkt->h.length.len != ++ TEST_PATTERN_SIZE) { ++#endif ++ ++ ts0710->test_errs = ++ TEST_PATTERN_SIZE; ++ TS0710_DEBUG ++ ("Err: received test pattern is %d bytes long, not expected %d\n", ++ mcc_short_pkt->h.length. ++ len, TEST_PATTERN_SIZE); ++ ++#if TEST_PATTERN_SIZE < 128 ++ } else { ++ ts0710->test_errs = 0; ++ for (j = 0; ++ j < TEST_PATTERN_SIZE; ++ j++) { ++ if (mcc_short_pkt-> ++ value[j] != ++ (j & 0xFF)) { ++ (ts0710-> ++ test_errs)++; ++ } ++ } ++ } ++#endif ++ ++ } ++ ++ ts0710->be_testing = 0; /* Clear the flag */ ++ wake_up_interruptible(&ts0710->test_wait); ++ } else { ++ TS0710_DEBUG ++ ("Err: shouldn't or late to get test cmd response\n"); ++ } ++ } else { ++ tbuf = (__u8 *) kmalloc(len + 32, GFP_ATOMIC); ++ if (!tbuf) { ++ break; ++ } ++ ++ if ((mcc_short_pkt->h.length.ea) == 0) { ++ mcc_long_frame *mcc_long_pkt; ++ mcc_long_pkt = (mcc_long_frame *) mcc_short_pkt; ++ ts0710_test_msg(ts0710, mcc_long_pkt->value, ++ GET_LONG_LENGTH(mcc_long_pkt->h. ++ length), ++ MCC_RSP, tbuf); ++ } else { ++ ts0710_test_msg(ts0710, mcc_short_pkt->value, ++ mcc_short_pkt->h.length.len, ++ MCC_RSP, tbuf); ++ } ++ ++ kfree(tbuf); ++ } ++ break; ++ ++ case FCON: /*Flow control on command */ ++ TS0710_PRINTK ++ ("MUX Received Flow control(all channels) on command\n"); ++ if (mcc_short_pkt->h.type.cr == MCC_CMD) { ++ ts0710->dlci[0].state = CONNECTED; ++ ts0710_fcon_msg(ts0710, MCC_RSP); ++ mux_sched_send(); ++ } ++ break; ++ ++ case FCOFF: /*Flow control off command */ ++ TS0710_PRINTK ++ ("MUX Received Flow control(all channels) off command\n"); ++ if (mcc_short_pkt->h.type.cr == MCC_CMD) { ++ for (j = 0; j < TS0710_MAX_CHN; j++) { ++ ts0710->dlci[j].state = FLOW_STOPPED; ++ } ++ ts0710_fcoff_msg(ts0710, MCC_RSP); ++ } ++ break; ++ ++ case MSC: /*Modem status command */ ++ { ++ __u8 dlci; ++ __u8 v24_sigs; ++ ++ dlci = (mcc_short_pkt->value[0]) >> 2; ++ v24_sigs = mcc_short_pkt->value[1]; ++ ++ if ((ts0710->dlci[dlci].state != CONNECTED) ++ && (ts0710->dlci[dlci].state != FLOW_STOPPED)) { ++ send_dm(ts0710, dlci); ++ break; ++ } ++ if (mcc_short_pkt->h.type.cr == MCC_CMD) { ++ TS0710_DEBUG("Received Modem status command\n"); ++ if (v24_sigs & 2) { ++ if (ts0710->dlci[dlci].state == ++ CONNECTED) { ++ TS0710_LOG ++ ("MUX Received Flow off on dlci %d\n", ++ dlci); ++ ts0710->dlci[dlci].state = ++ FLOW_STOPPED; ++ } ++ } else { ++ if (ts0710->dlci[dlci].state == ++ FLOW_STOPPED) { ++ ts0710->dlci[dlci].state = ++ CONNECTED; ++ TS0710_LOG ++ ("MUX Received Flow on on dlci %d\n", ++ dlci); ++ mux_sched_send(); ++ } ++ } ++ ++ ts0710_msc_msg(ts0710, v24_sigs, MCC_RSP, dlci); ++/* ++ if (!(ts0710->dlci[dlci].initiated) && !(ts0710->dlci[dlci].initiator)) { ++ ts0710_msc_msg(ts0710, EA | RTR | RTC | DV, MCC_CMD, dlci); ++ ts0710->dlci[dlci].initiated = 1; ++ } ++*/ ++ } else { ++ TS0710_DEBUG ++ ("Received Modem status response\n"); ++ ++ if (v24_sigs & 2) { ++ TS0710_DEBUG("Flow stop accepted\n"); ++ } ++ } ++ break; ++ } ++ ++ /* case RPN: *//*Remote port negotiation command */ ++ ++/* { ++ __u8 dlci; ++ ++ dlci = (mcc_short_pkt->value[0]) >> 2; ++ ++ if (mcc_short_pkt->h.type.cr == MCC_CMD) { ++ if (mcc_short_pkt->h.length.len == 1) { ++ TS0710_DEBUG("Received Remote port negotiation command\n"); ++ ts0710_rpn_msg(ts0710, MCC_RSP, dlci, 0); ++ } else { ++*/ ++ /* Accept the other sides settings (accept all for now) */ ++/* TS0710_DEBUG("Received Remote port negotiation respons\n"); ++ memcpy(&rpn_val, &mcc_short_pkt->value[1], 8); ++ ts0710_rpn_msg(ts0710, MCC_RSP, dlci, 0); ++*/ ++ /* Zero the parametermask after response */ ++/* memset(&rpn_val.pm, 0, 2); ++ } ++ } ++ break; ++ } ++*/ ++/* ++ case RLS: *//*Remote line status */ ++/* { ++ __u8 dlci; ++ __u8 err_code; ++ ++ TS0710_DEBUG("Received Remote line status\n"); ++ if (mcc_short_pkt->h.type.cr == MCC_CMD) { ++ dlci = mcc_short_pkt->value[0] >> 2; ++ err_code = mcc_short_pkt->value[1]; ++ ++ ts0710_rls_msg(ts0710, MCC_RSP, dlci, err_code); ++ } ++ break; ++ } ++*/ ++ case PN: /*DLC parameter negotiation */ ++ { ++ __u8 dlci; ++ __u16 frame_size; ++ pn_msg *pn_pkt; ++ ++ pn_pkt = (pn_msg *) data; ++ dlci = pn_pkt->dlci; ++ frame_size = GET_PN_MSG_FRAME_SIZE(pn_pkt); ++ TS0710_DEBUG ++ ("Received DLC parameter negotiation, PN\n"); ++ if (pn_pkt->mcc_s_head.type.cr == MCC_CMD) { ++ TS0710_DEBUG("received PN command with:\n"); ++ TS0710_DEBUG("Frame size:%d\n", frame_size); ++ ++ frame_size = ++ min(frame_size, ts0710->dlci[dlci].mtu); ++ send_pn_msg(ts0710, pn_pkt->prior, frame_size, ++ 0, 0, dlci, MCC_RSP); ++ ts0710->dlci[dlci].mtu = frame_size; ++ TS0710_DEBUG("process_mcc : mtu set to %d\n", ++ ts0710->dlci[dlci].mtu); ++ } else { ++ TS0710_DEBUG("received PN response with:\n"); ++ TS0710_DEBUG("Frame size:%d\n", frame_size); ++ ++ frame_size = ++ min(frame_size, ts0710->dlci[dlci].mtu); ++ ts0710->dlci[dlci].mtu = frame_size; ++ ++ TS0710_DEBUG ++ ("process_mcc : mtu set on dlci:%d to %d\n", ++ dlci, ts0710->dlci[dlci].mtu); ++ ++ if (ts0710->dlci[dlci].state == NEGOTIATING) { ++ ts0710->dlci[dlci].state = CONNECTING; ++ wake_up_interruptible(&ts0710-> ++ dlci[dlci]. ++ open_wait); ++ } ++ } ++ break; ++ } ++ ++ case NSC: /*Non supported command resonse */ ++ TS0710_LOG("MUX Received Non supported command response\n"); ++ break; ++ ++ default: /*Non supported command received */ ++ TS0710_LOG("MUX Received a non supported command\n"); ++ send_nsc_msg(ts0710, mcc_short_pkt->h.type, MCC_RSP); ++ break; ++ } ++} ++ ++static mux_recv_packet *get_mux_recv_packet(__u32 size) ++{ ++ mux_recv_packet *recv_packet; ++ ++ TS0710_DEBUG("Enter into get_mux_recv_packet"); ++ ++ recv_packet = ++ (mux_recv_packet *) kmalloc(sizeof(mux_recv_packet), GFP_ATOMIC); ++ if (!recv_packet) { ++ return 0; ++ } ++ ++ recv_packet->data = (__u8 *) kmalloc(size, GFP_ATOMIC); ++ if (!(recv_packet->data)) { ++ kfree(recv_packet); ++ return 0; ++ } ++ recv_packet->length = 0; ++ recv_packet->next = 0; ++ return recv_packet; ++} ++ ++static void free_mux_recv_packet(mux_recv_packet * recv_packet) ++{ ++ TS0710_DEBUG("Enter into free_mux_recv_packet"); ++ ++ if (!recv_packet) { ++ return; ++ } ++ ++ if (recv_packet->data) { ++ kfree(recv_packet->data); ++ } ++ kfree(recv_packet); ++} ++ ++static void free_mux_recv_struct(mux_recv_struct * recv_info) ++{ ++ mux_recv_packet *recv_packet1, *recv_packet2; ++ ++ if (!recv_info) { ++ return; ++ } ++ ++ recv_packet1 = recv_info->mux_packet; ++ while (recv_packet1) { ++ recv_packet2 = recv_packet1->next; ++ free_mux_recv_packet(recv_packet1); ++ recv_packet1 = recv_packet2; ++ } ++ ++ kfree(recv_info); ++} ++ ++static inline void add_post_recv_queue(mux_recv_struct ** head, ++ mux_recv_struct * new_item) ++{ ++ new_item->next = *head; ++ *head = new_item; ++} ++ ++static void ts0710_flow_on(__u8 dlci, ts0710_con * ts0710) ++{ ++ int i; ++ __u8 cmdtty; ++ __u8 datatty; ++ struct tty_struct *tty; ++ mux_recv_struct *recv_info; ++ ++ if ((ts0710->dlci[0].state != CONNECTED) ++ && (ts0710->dlci[0].state != FLOW_STOPPED)) { ++ return; ++ } else if ((ts0710->dlci[dlci].state != CONNECTED) ++ && (ts0710->dlci[dlci].state != FLOW_STOPPED)) { ++ return; ++ } ++ ++ if (!(ts0710->dlci[dlci].flow_control)) { ++ return; ++ } ++ ++ cmdtty = dlci2tty[dlci].cmdtty; ++ datatty = dlci2tty[dlci].datatty; ++ ++ if (cmdtty != datatty) { ++ /* Check AT cmd tty */ ++ tty = mux_table[cmdtty]; ++ if (mux_tty[cmdtty] && tty) { ++ if (test_bit(TTY_THROTTLED, &tty->flags)) { ++ return; ++ } ++ } ++ recv_info = mux_recv_info[cmdtty]; ++ if (mux_recv_info_flags[cmdtty] && recv_info) { ++ if (recv_info->total) { ++ return; ++ } ++ } ++ ++ /* Check data tty */ ++ tty = mux_table[datatty]; ++ if (mux_tty[datatty] && tty) { ++ if (test_bit(TTY_THROTTLED, &tty->flags)) { ++ return; ++ } ++ } ++ recv_info = mux_recv_info[datatty]; ++ if (mux_recv_info_flags[datatty] && recv_info) { ++ if (recv_info->total) { ++ return; ++ } ++ } ++ } ++ ++ for (i = 0; i < 3; i++) { ++ if (ts0710_msc_msg(ts0710, EA | RTC | RTR | DV, MCC_CMD, dlci) < ++ 0) { ++ continue; ++ } else { ++ TS0710_LOG("MUX send Flow on on dlci %d\n", dlci); ++ ts0710->dlci[dlci].flow_control = 0; ++ break; ++ } ++ } ++} ++ ++static void ts0710_flow_off(struct tty_struct *tty, __u8 dlci, ++ ts0710_con * ts0710) ++{ ++ int i; ++ ++ if (test_and_set_bit(TTY_THROTTLED, &tty->flags)) { ++ return; ++ } ++ ++ if ((ts0710->dlci[0].state != CONNECTED) ++ && (ts0710->dlci[0].state != FLOW_STOPPED)) { ++ return; ++ } else if ((ts0710->dlci[dlci].state != CONNECTED) ++ && (ts0710->dlci[dlci].state != FLOW_STOPPED)) { ++ return; ++ } ++ ++ if (ts0710->dlci[dlci].flow_control) { ++ return; ++ } ++ ++ for (i = 0; i < 3; i++) { ++ if (ts0710_msc_msg ++ (ts0710, EA | FC | RTC | RTR | DV, MCC_CMD, dlci) < 0) { ++ continue; ++ } else { ++ TS0710_LOG("MUX send Flow off on dlci %d\n", dlci); ++ ts0710->dlci[dlci].flow_control = 1; ++ break; ++ } ++ } ++} ++ ++int ts0710_recv_data(ts0710_con * ts0710, char *data, int len) ++{ ++ short_frame *short_pkt; ++ long_frame *long_pkt; ++ __u8 *uih_data_start; ++ __u32 uih_len; ++ __u8 dlci; ++ __u8 be_connecting; ++#ifdef TS0710DEBUG ++ unsigned long t; ++#endif ++ ++ short_pkt = (short_frame *) data; ++ ++ dlci = short_pkt->h.addr.server_chn << 1 | short_pkt->h.addr.d; ++ switch (CLR_PF(short_pkt->h.control)) { ++ case SABM: ++ TS0710_DEBUG("SABM-packet received\n"); ++ ++/*For BP UART problem ++ if( crc_check((__u8*) short_pkt, SHORT_CRC_CHECK, short_pkt->data[0]) ) ++ break; ++*/ ++ ++ if (!dlci) { ++ TS0710_DEBUG("server channel == 0\n"); ++ ts0710->dlci[0].state = CONNECTED; ++ ++ TS0710_DEBUG("sending back UA - control channel\n"); ++ send_ua(ts0710, dlci); ++ wake_up_interruptible(&ts0710->dlci[0].open_wait); ++ ++ } else if (valid_dlci(dlci)) { ++ ++ TS0710_DEBUG("Incomming connect on channel %d\n", dlci); ++ ++ TS0710_DEBUG("sending UA, dlci %d\n", dlci); ++ send_ua(ts0710, dlci); ++ ++ ts0710->dlci[dlci].state = CONNECTED; ++ wake_up_interruptible(&ts0710->dlci[dlci].open_wait); ++ ++ } else { ++ TS0710_DEBUG("invalid dlci %d, sending DM\n", dlci); ++ send_dm(ts0710, dlci); ++ } ++ ++ break; ++ ++ case UA: ++ TS0710_DEBUG("UA packet received\n"); ++ ++/*For BP UART problem ++ if( crc_check((__u8*) short_pkt, SHORT_CRC_CHECK, short_pkt->data[0]) ) ++ break; ++*/ ++ ++ if (!dlci) { ++ TS0710_DEBUG("server channel == 0\n"); ++ ++ if (ts0710->dlci[0].state == CONNECTING) { ++ ts0710->dlci[0].state = CONNECTED; ++ wake_up_interruptible(&ts0710->dlci[0]. ++ open_wait); ++ } else if (ts0710->dlci[0].state == DISCONNECTING) { ++ ts0710_upon_disconnect(); ++ } else { ++ TS0710_DEBUG ++ (" Something wrong receiving UA packet\n"); ++ } ++ } else if (valid_dlci(dlci)) { ++ TS0710_DEBUG("Incomming UA on channel %d\n", dlci); ++ ++ if (ts0710->dlci[dlci].state == CONNECTING) { ++ ts0710->dlci[dlci].state = CONNECTED; ++ wake_up_interruptible(&ts0710->dlci[dlci]. ++ open_wait); ++ } else if (ts0710->dlci[dlci].state == DISCONNECTING) { ++ ts0710->dlci[dlci].state = DISCONNECTED; ++ wake_up_interruptible(&ts0710->dlci[dlci]. ++ open_wait); ++ wake_up_interruptible(&ts0710->dlci[dlci]. ++ close_wait); ++ ts0710_reset_dlci(dlci); ++ } else { ++ TS0710_DEBUG ++ (" Something wrong receiving UA packet\n"); ++ } ++ } else { ++ TS0710_DEBUG("invalid dlci %d\n", dlci); ++ } ++ ++ break; ++ ++ case DM: ++ TS0710_DEBUG("DM packet received\n"); ++ ++/*For BP UART problem ++ if( crc_check((__u8*) short_pkt, SHORT_CRC_CHECK, short_pkt->data[0]) ) ++ break; ++*/ ++ ++ if (!dlci) { ++ TS0710_DEBUG("server channel == 0\n"); ++ ++ if (ts0710->dlci[0].state == CONNECTING) { ++ be_connecting = 1; ++ } else { ++ be_connecting = 0; ++ } ++ ts0710_upon_disconnect(); ++ if (be_connecting) { ++ ts0710->dlci[0].state = REJECTED; ++ } ++ } else if (valid_dlci(dlci)) { ++ TS0710_DEBUG("Incomming DM on channel %d\n", dlci); ++ ++ if (ts0710->dlci[dlci].state == CONNECTING) { ++ ts0710->dlci[dlci].state = REJECTED; ++ } else { ++ ts0710->dlci[dlci].state = DISCONNECTED; ++ } ++ wake_up_interruptible(&ts0710->dlci[dlci].open_wait); ++ wake_up_interruptible(&ts0710->dlci[dlci].close_wait); ++ ts0710_reset_dlci(dlci); ++ } else { ++ TS0710_DEBUG("invalid dlci %d\n", dlci); ++ } ++ ++ break; ++ ++ case DISC: ++ TS0710_DEBUG("DISC packet received\n"); ++ ++/*For BP UART problem ++ if( crc_check((__u8*) short_pkt, SHORT_CRC_CHECK, short_pkt->data[0]) ) ++ break; ++*/ ++ ++ if (!dlci) { ++ TS0710_DEBUG("server channel == 0\n"); ++ ++ send_ua(ts0710, dlci); ++ TS0710_DEBUG("DISC, sending back UA\n"); ++ ++ ts0710_upon_disconnect(); ++ } else if (valid_dlci(dlci)) { ++ TS0710_DEBUG("Incomming DISC on channel %d\n", dlci); ++ ++ send_ua(ts0710, dlci); ++ TS0710_DEBUG("DISC, sending back UA\n"); ++ ++ ts0710->dlci[dlci].state = DISCONNECTED; ++ wake_up_interruptible(&ts0710->dlci[dlci].open_wait); ++ wake_up_interruptible(&ts0710->dlci[dlci].close_wait); ++ ts0710_reset_dlci(dlci); ++ } else { ++ TS0710_DEBUG("invalid dlci %d\n", dlci); ++ } ++ ++ break; ++ ++ case UIH: ++ TS0710_DEBUG("UIH packet received\n"); ++ ++ if ((dlci >= TS0710_MAX_CHN)) { ++ TS0710_DEBUG("invalid dlci %d\n", dlci); ++ send_dm(ts0710, dlci); ++ break; ++ } ++ ++ if (GET_PF(short_pkt->h.control)) { ++ TS0710_LOG ++ ("MUX Error %s: UIH packet with P/F set, discard it!\n", ++ __FUNCTION__); ++ break; ++ } ++ ++ if ((ts0710->dlci[dlci].state != CONNECTED) ++ && (ts0710->dlci[dlci].state != FLOW_STOPPED)) { ++ TS0710_LOG ++ ("MUX Error %s: DLCI %d not connected, discard it!\n", ++ __FUNCTION__, dlci); ++ send_dm(ts0710, dlci); ++ break; ++ } ++ ++ if ((short_pkt->h.length.ea) == 0) { ++ TS0710_DEBUG("Long UIH packet received\n"); ++ long_pkt = (long_frame *) data; ++ uih_len = GET_LONG_LENGTH(long_pkt->h.length); ++ uih_data_start = long_pkt->h.data; ++ TS0710_DEBUG("long packet length %d\n", uih_len); ++ ++/*For BP UART problem ++ if (crc_check(data, LONG_CRC_CHECK, *(uih_data_start + uih_len))) ++ break; ++*/ ++ } else { ++ TS0710_DEBUG("Short UIH pkt received\n"); ++ uih_len = short_pkt->h.length.len; ++ uih_data_start = short_pkt->data; ++ ++/*For BP UART problem ++ if (crc_check(data, SHORT_CRC_CHECK, *(uih_data_start + uih_len))) ++ break; ++*/ ++ } ++ ++ if (dlci == 0) { ++ TS0710_DEBUG("UIH on serv_channel 0\n"); ++ process_mcc(data, len, ts0710, ++ !(short_pkt->h.length.ea)); ++ } else if (valid_dlci(dlci)) { ++ /* do tty dispatch */ ++ __u8 tag; ++ __u8 tty_idx; ++ struct tty_struct *tty; ++ __u8 queue_data; ++ __u8 post_recv; ++ __u8 flow_control; ++ mux_recv_struct *recv_info; ++ int recv_room; ++ mux_recv_packet *recv_packet, *recv_packet2; ++ ++ TS0710_DEBUG("UIH on channel %d\n", dlci); ++ ++ if (uih_len > ts0710->dlci[dlci].mtu) { ++ TS0710_PRINTK ++ ("MUX Error: DLCI:%d, uih_len:%d is bigger than mtu:%d, discard data!\n", ++ dlci, uih_len, ts0710->dlci[dlci].mtu); ++ break; ++ } ++ ++ tag = *uih_data_start; ++ uih_data_start++; ++ uih_len--; ++ ++ if (!uih_len) { ++ break; ++ } ++ ++ switch (tag) { ++ case CMDTAG: ++ tty_idx = dlci2tty[dlci].cmdtty; ++ TS0710_DEBUG("CMDTAG on DLCI:%d, /dev/mux%d\n", ++ dlci, tty_idx); ++ TS0710_DEBUGSTR(uih_data_start, uih_len); ++ if (!(iscmdtty[tty_idx])) { ++ TS0710_PRINTK ++ ("MUX Error: %s: Wrong CMDTAG on DLCI:%d, /dev/mux%d\n", ++ __FUNCTION__, dlci, tty_idx); ++ } ++ break; ++ case DATATAG: ++ default: ++ tty_idx = dlci2tty[dlci].datatty; ++ TS0710_DEBUG ++ ("NON-CMDTAG on DLCI:%d, /dev/mux%d\n", ++ dlci, tty_idx); ++ if (iscmdtty[tty_idx]) { ++ TS0710_PRINTK ++ ("MUX Error: %s: Wrong NON-CMDTAG on DLCI:%d, /dev/mux%d\n", ++ __FUNCTION__, dlci, tty_idx); ++ } ++ break; ++ } ++ tty = mux_table[tty_idx]; ++ if ((!mux_tty[tty_idx]) || (!tty)) { ++ TS0710_PRINTK ++ ("MUX: No application waiting for, discard it! /dev/mux%d\n", ++ tty_idx); ++ } else { /* Begin processing received data */ ++ if ((!mux_recv_info_flags[tty_idx]) ++ || (!mux_recv_info[tty_idx])) { ++ TS0710_PRINTK ++ ("MUX Error: No mux_recv_info, discard it! /dev/mux%d\n", ++ tty_idx); ++ break; ++ } ++ ++ recv_info = mux_recv_info[tty_idx]; ++ if (recv_info->total > 8192) { ++ TS0710_PRINTK ++ ("MUX : discard data for tty_idx:%d, recv_info->total > 8192 \n", ++ tty_idx); ++ break; ++ } ++ ++ queue_data = 0; ++ post_recv = 0; ++ flow_control = 0; ++ recv_room = 65535; ++ if (tty->receive_room) ++ recv_room = tty->receive_room; ++ ++ if (test_bit(TTY_THROTTLED, &tty->flags)) { ++ queue_data = 1; ++ } else { ++ if (test_bit ++ (TTY_DONT_FLIP, &tty->flags)) { ++ queue_data = 1; ++ post_recv = 1; ++ } else if (recv_info->total) { ++ queue_data = 1; ++ post_recv = 1; ++ } else if (recv_room < uih_len) { ++ queue_data = 1; ++ flow_control = 1; ++ } ++ ++ if ((recv_room - ++ (uih_len + recv_info->total)) < ++ ts0710->dlci[dlci].mtu) { ++ flow_control = 1; ++ } ++ } ++ ++ if (!queue_data) { ++ /* Put received data into read buffer of tty */ ++ TS0710_DEBUG ++ ("Put received data into read buffer of /dev/mux%d", ++ tty_idx); ++ ++#ifdef TS0710DEBUG ++ t = jiffies; ++#endif ++ ++ (tty->ldisc.receive_buf) (tty, ++ uih_data_start, ++ NULL, ++ uih_len); ++ ++#ifdef TS0710DEBUG ++ TS0710_DEBUG ++ ("tty->ldisc.receive_buf take ticks: %lu", ++ (jiffies - t)); ++#endif ++ ++ } else { /* Queue data */ ++ ++ TS0710_DEBUG ++ ("Put received data into recv queue of /dev/mux%d", ++ tty_idx); ++ if (recv_info->total) { ++ /* recv_info is already linked into mux_recv_queue */ ++ ++ recv_packet = ++ get_mux_recv_packet ++ (uih_len); ++ if (!recv_packet) { ++ TS0710_PRINTK ++ ("MUX %s: no memory\n", ++ __FUNCTION__); ++ break; ++ } ++ ++ memcpy(recv_packet->data, ++ uih_data_start, uih_len); ++ recv_packet->length = uih_len; ++ recv_info->total += uih_len; ++ recv_packet->next = NULL; ++ ++ if (!(recv_info->mux_packet)) { ++ recv_info->mux_packet = ++ recv_packet; ++ } else { ++ recv_packet2 = ++ recv_info-> ++ mux_packet; ++ while (recv_packet2-> ++ next) { ++ recv_packet2 = ++ recv_packet2-> ++ next; ++ } ++ recv_packet2->next = ++ recv_packet; ++ } /* End if( !(recv_info->mux_packet) ) */ ++ } else { /* recv_info->total == 0 */ ++ if (uih_len > ++ TS0710MUX_RECV_BUF_SIZE) { ++ TS0710_PRINTK ++ ("MUX Error: tty_idx:%d, uih_len == %d is too big\n", ++ tty_idx, uih_len); ++ uih_len = ++ TS0710MUX_RECV_BUF_SIZE; ++ } ++ memcpy(recv_info->data, ++ uih_data_start, uih_len); ++ recv_info->length = uih_len; ++ recv_info->total = uih_len; ++ ++ add_post_recv_queue ++ (&mux_recv_queue, ++ recv_info); ++ } /* End recv_info->total == 0 */ ++ } /* End Queue data */ ++ ++ if (flow_control) { ++ /* Do something for flow control */ ++ ts0710_flow_off(tty, dlci, ts0710); ++ } ++ ++ if (tty_idx == ++ dlci2tty[TS0710MUX_GPRS1_DLCI].datatty) { ++ if (add_count ++ (TS0710MUX_GPRS1_RECV_COUNT_IDX, ++ uih_len) < 0) { ++ post_recv_count_flag = 1; ++ post_recv = 1; ++ mux_data_count2 ++ [TS0710MUX_GPRS1_RECV_COUNT_IDX] ++ += uih_len; ++ } ++ } else if (tty_idx == ++ dlci2tty[TS0710MUX_GPRS2_DLCI]. ++ datatty) { ++ if (add_count ++ (TS0710MUX_GPRS2_RECV_COUNT_IDX, ++ uih_len) < 0) { ++ post_recv_count_flag = 1; ++ post_recv = 1; ++ mux_data_count2 ++ [TS0710MUX_GPRS2_RECV_COUNT_IDX] ++ += uih_len; ++ } ++ } ++ ++ if (post_recv) ++ schedule_work(&post_recv_tqueue); ++ } /* End processing received data */ ++ } else { ++ TS0710_DEBUG("invalid dlci %d\n", dlci); ++ } ++ ++ break; ++ ++ default: ++ TS0710_DEBUG("illegal packet\n"); ++ break; ++ } ++ return 0; ++} ++ ++/* ++int ts0710_send_data(ts0710_con *ts0710, __u8 dlci, __u8 *data, __u32 count) ++{ ++ __u32 c, total = 0; ++ __u8 tag, first; ++ ++ if( ts0710->dlci[0].state == FLOW_STOPPED ){ ++ TS0710_DEBUG("Flow stopped on all channels, returning zero\n"); ++*/ ++/* ++ return -EFLOWSTOPPED; ++ } else if( ts0710->dlci[dlci].state == FLOW_STOPPED ){ ++ TS0710_DEBUG("Flow stopped, returning zero\n"); ++*/ ++/* ++ return -EFLOWSTOPPED; ++ } else if( ts0710->dlci[dlci].state == CONNECTED ){ ++ ++ TS0710_DEBUG("trying to send %d bytes\n", count); ++ tag = *data; ++ first = 1; ++*/ ++ /* The first byte is always a Cmd/Data tag */ ++/* ++ while( count > 1 ){ ++ ++ c = min(count, ts0710->dlci[dlci].mtu); ++ if( queue_uih(data, c, ts0710, dlci) <= 0 ) { ++ break; ++ } ++ ++ total += (c - 1); ++ data += (c - 1); ++ *data = tag; ++ count -= (c - 1); ++ ++ if( first ) { ++ first = 0; ++ total++; ++ } ++ } ++ TS0710_DEBUG("sent %d bytes\n", total); ++ return total; ++ } else { ++ TS0710_DEBUG("DLCI %d not connected\n", dlci); ++ return -EDISCONNECTED; ++ } ++} ++*/ ++ ++/* Close ts0710 channel */ ++static void ts0710_close_channel(__u8 dlci) ++{ ++ ts0710_con *ts0710 = &ts0710_connection; ++ int try; ++ unsigned long t; ++ ++ TS0710_DEBUG("ts0710_disc_command on channel %d\n", dlci); ++ ++ if ((ts0710->dlci[dlci].state == DISCONNECTED) ++ || (ts0710->dlci[dlci].state == REJECTED)) { ++ return; ++ } else if (ts0710->dlci[dlci].state == DISCONNECTING) { ++ /* Reentry */ ++ return; ++ } else { ++ ts0710->dlci[dlci].state = DISCONNECTING; ++ try = 3; ++ while (try--) { ++ t = jiffies; ++ send_disc(ts0710, dlci); ++ interruptible_sleep_on_timeout(&ts0710->dlci[dlci]. ++ close_wait, ++ TS0710MUX_TIME_OUT); ++ if (ts0710->dlci[dlci].state == DISCONNECTED) { ++ break; ++ } else if (signal_pending(current)) { ++ TS0710_PRINTK ++ ("MUX DLCI %d Send DISC got signal!\n", ++ dlci); ++ break; ++ } else if ((jiffies - t) >= TS0710MUX_TIME_OUT) { ++ TS0710_PRINTK ++ ("MUX DLCI %d Send DISC timeout!\n", dlci); ++ continue; ++ } ++ } ++ ++ if (ts0710->dlci[dlci].state != DISCONNECTED) { ++ if (dlci == 0) { /* Control Channel */ ++ ts0710_upon_disconnect(); ++ } else { /* Other Channel */ ++ ts0710->dlci[dlci].state = DISCONNECTED; ++ wake_up_interruptible(&ts0710->dlci[dlci]. ++ close_wait); ++ ts0710_reset_dlci(dlci); ++ } ++ } ++ } ++} ++ ++int ts0710_open_channel(__u8 dlci) ++{ ++ ts0710_con *ts0710 = &ts0710_connection; ++ int try; ++ int retval; ++ unsigned long t; ++ ++ retval = -ENODEV; ++ if (dlci == 0) { // control channel ++ if ((ts0710->dlci[0].state == CONNECTED) ++ || (ts0710->dlci[0].state == FLOW_STOPPED)) { ++ return 0; ++ } else if (ts0710->dlci[0].state == CONNECTING) { ++ /* Reentry */ ++ TS0710_PRINTK ++ ("MUX DLCI: 0, reentry to open DLCI 0, pid: %d, %s !\n", ++ current->pid, current->comm); ++ try = 11; ++ while (try--) { ++ t = jiffies; ++ interruptible_sleep_on_timeout(&ts0710->dlci[0]. ++ open_wait, ++ TS0710MUX_TIME_OUT); ++ if ((ts0710->dlci[0].state == CONNECTED) ++ || (ts0710->dlci[0].state == ++ FLOW_STOPPED)) { ++ retval = 0; ++ break; ++ } else if (ts0710->dlci[0].state == REJECTED) { ++ retval = -EREJECTED; ++ break; ++ } else if (ts0710->dlci[0].state == ++ DISCONNECTED) { ++ break; ++ } else if (signal_pending(current)) { ++ TS0710_PRINTK ++ ("MUX DLCI:%d Wait for connecting got signal!\n", ++ dlci); ++ retval = -EAGAIN; ++ break; ++ } else if ((jiffies - t) >= TS0710MUX_TIME_OUT) { ++ TS0710_PRINTK ++ ("MUX DLCI:%d Wait for connecting timeout!\n", ++ dlci); ++ continue; ++ } else if (ts0710->dlci[0].state == CONNECTING) { ++ continue; ++ } ++ } ++ ++ if (ts0710->dlci[0].state == CONNECTING) { ++ ts0710->dlci[0].state = DISCONNECTED; ++ } ++ } else if ((ts0710->dlci[0].state != DISCONNECTED) ++ && (ts0710->dlci[0].state != REJECTED)) { ++ TS0710_PRINTK("MUX DLCI:%d state is invalid!\n", dlci); ++ return retval; ++ } else { ++ ts0710->initiator = 1; ++ ts0710->dlci[0].state = CONNECTING; ++ ts0710->dlci[0].initiator = 1; ++ try = 10; ++ while (try--) { ++ t = jiffies; ++ send_sabm(ts0710, 0); ++ interruptible_sleep_on_timeout(&ts0710->dlci[0]. ++ open_wait, ++ TS0710MUX_TIME_OUT); ++ if ((ts0710->dlci[0].state == CONNECTED) ++ || (ts0710->dlci[0].state == ++ FLOW_STOPPED)) { ++ retval = 0; ++ break; ++ } else if (ts0710->dlci[0].state == REJECTED) { ++ TS0710_PRINTK ++ ("MUX DLCI:%d Send SABM got rejected!\n", ++ dlci); ++ retval = -EREJECTED; ++ break; ++ } else if (signal_pending(current)) { ++ TS0710_PRINTK ++ ("MUX DLCI:%d Send SABM got signal!\n", ++ dlci); ++ retval = -EAGAIN; ++ break; ++ } else if ((jiffies - t) >= TS0710MUX_TIME_OUT) { ++ TS0710_PRINTK ++ ("MUX DLCI:%d Send SABM timeout!\n", ++ dlci); ++ continue; ++ } ++ } ++ ++ if (ts0710->dlci[0].state == CONNECTING) { ++ ts0710->dlci[0].state = DISCONNECTED; ++ } ++ wake_up_interruptible(&ts0710->dlci[0].open_wait); ++ } ++ } else { // other channel ++ if ((ts0710->dlci[0].state != CONNECTED) ++ && (ts0710->dlci[0].state != FLOW_STOPPED)) { ++ return retval; ++ } else if ((ts0710->dlci[dlci].state == CONNECTED) ++ || (ts0710->dlci[dlci].state == FLOW_STOPPED)) { ++ return 0; ++ } else if ((ts0710->dlci[dlci].state == NEGOTIATING) ++ || (ts0710->dlci[dlci].state == CONNECTING)) { ++ /* Reentry */ ++ try = 8; ++ while (try--) { ++ t = jiffies; ++ interruptible_sleep_on_timeout(&ts0710-> ++ dlci[dlci]. ++ open_wait, ++ TS0710MUX_TIME_OUT); ++ if ((ts0710->dlci[dlci].state == CONNECTED) ++ || (ts0710->dlci[dlci].state == ++ FLOW_STOPPED)) { ++ retval = 0; ++ break; ++ } else if (ts0710->dlci[dlci].state == REJECTED) { ++ retval = -EREJECTED; ++ break; ++ } else if (ts0710->dlci[dlci].state == ++ DISCONNECTED) { ++ break; ++ } else if (signal_pending(current)) { ++ TS0710_PRINTK ++ ("MUX DLCI:%d Wait for connecting got signal!\n", ++ dlci); ++ retval = -EAGAIN; ++ break; ++ } else if ((jiffies - t) >= TS0710MUX_TIME_OUT) { ++ TS0710_PRINTK ++ ("MUX DLCI:%d Wait for connecting timeout!\n", ++ dlci); ++ continue; ++ } else ++ if ((ts0710->dlci[dlci].state == ++ NEGOTIATING) ++ || (ts0710->dlci[dlci].state == ++ CONNECTING)) { ++ continue; ++ } ++ } ++ ++ if ((ts0710->dlci[dlci].state == NEGOTIATING) ++ || (ts0710->dlci[dlci].state == CONNECTING)) { ++ ts0710->dlci[dlci].state = DISCONNECTED; ++ } ++ } else if ((ts0710->dlci[dlci].state != DISCONNECTED) ++ && (ts0710->dlci[dlci].state != REJECTED)) { ++ TS0710_PRINTK("MUX DLCI:%d state is invalid!\n", dlci); ++ return retval; ++ } else { ++ ts0710->dlci[dlci].state = NEGOTIATING; ++ ts0710->dlci[dlci].initiator = 1; ++ try = 3; ++ while (try--) { ++ t = jiffies; ++ send_pn_msg(ts0710, 7, ts0710->dlci[dlci].mtu, ++ 0, 0, dlci, 1); ++ interruptible_sleep_on_timeout(&ts0710-> ++ dlci[dlci]. ++ open_wait, ++ TS0710MUX_TIME_OUT); ++ if (ts0710->dlci[dlci].state == CONNECTING) { ++ break; ++ } else if (signal_pending(current)) { ++ TS0710_PRINTK ++ ("MUX DLCI:%d Send pn_msg got signal!\n", ++ dlci); ++ retval = -EAGAIN; ++ break; ++ } else if ((jiffies - t) >= TS0710MUX_TIME_OUT) { ++ TS0710_PRINTK ++ ("MUX DLCI:%d Send pn_msg timeout!\n", ++ dlci); ++ continue; ++ } ++ } ++ ++ if (ts0710->dlci[dlci].state == CONNECTING) { ++ try = 3; ++ while (try--) { ++ t = jiffies; ++ send_sabm(ts0710, dlci); ++ interruptible_sleep_on_timeout(&ts0710-> ++ dlci ++ [dlci]. ++ open_wait, ++ TS0710MUX_TIME_OUT); ++ if ((ts0710->dlci[dlci].state == ++ CONNECTED) ++ || (ts0710->dlci[dlci].state == ++ FLOW_STOPPED)) { ++ retval = 0; ++ break; ++ } else if (ts0710->dlci[dlci].state == ++ REJECTED) { ++ TS0710_PRINTK ++ ("MUX DLCI:%d Send SABM got rejected!\n", ++ dlci); ++ retval = -EREJECTED; ++ break; ++ } else if (signal_pending(current)) { ++ TS0710_PRINTK ++ ("MUX DLCI:%d Send SABM got signal!\n", ++ dlci); ++ retval = -EAGAIN; ++ break; ++ } else if ((jiffies - t) >= ++ TS0710MUX_TIME_OUT) { ++ TS0710_PRINTK ++ ("MUX DLCI:%d Send SABM timeout!\n", ++ dlci); ++ continue; ++ } ++ } ++ } ++ ++ if ((ts0710->dlci[dlci].state == NEGOTIATING) ++ || (ts0710->dlci[dlci].state == CONNECTING)) { ++ ts0710->dlci[dlci].state = DISCONNECTED; ++ } ++ wake_up_interruptible(&ts0710->dlci[dlci].open_wait); ++ } ++ } ++ return retval; ++} ++ ++static int ts0710_exec_test_cmd(void) ++{ ++ ts0710_con *ts0710 = &ts0710_connection; ++ __u8 *f_buf; /* Frame buffer */ ++ __u8 *d_buf; /* Data buffer */ ++ int retval = -EFAULT; ++ int j; ++ unsigned long t; ++ ++ if (ts0710->be_testing) { ++ /* Reentry */ ++ t = jiffies; ++ interruptible_sleep_on_timeout(&ts0710->test_wait, ++ 3 * TS0710MUX_TIME_OUT); ++ if (ts0710->be_testing == 0) { ++ if (ts0710->test_errs == 0) { ++ retval = 0; ++ } else { ++ retval = -EFAULT; ++ } ++ } else if (signal_pending(current)) { ++ TS0710_DEBUG ++ ("Wait for Test_cmd response got signal!\n"); ++ retval = -EAGAIN; ++ } else if ((jiffies - t) >= 3 * TS0710MUX_TIME_OUT) { ++ TS0710_DEBUG("Wait for Test_cmd response timeout!\n"); ++ retval = -EFAULT; ++ } ++ } else { ++ ts0710->be_testing = 1; /* Set the flag */ ++ ++ f_buf = (__u8 *) kmalloc(TEST_PATTERN_SIZE + 32, GFP_KERNEL); ++ d_buf = (__u8 *) kmalloc(TEST_PATTERN_SIZE + 32, GFP_KERNEL); ++ if ((!f_buf) || (!d_buf)) { ++ if (f_buf) { ++ kfree(f_buf); ++ } ++ if (d_buf) { ++ kfree(d_buf); ++ } ++ ++ ts0710->be_testing = 0; /* Clear the flag */ ++ ts0710->test_errs = TEST_PATTERN_SIZE; ++ wake_up_interruptible(&ts0710->test_wait); ++ return -ENOMEM; ++ } ++ ++ for (j = 0; j < TEST_PATTERN_SIZE; j++) { ++ d_buf[j] = j & 0xFF; ++ } ++ ++ t = jiffies; ++ ts0710_test_msg(ts0710, d_buf, TEST_PATTERN_SIZE, MCC_CMD, ++ f_buf); ++ interruptible_sleep_on_timeout(&ts0710->test_wait, ++ 2 * TS0710MUX_TIME_OUT); ++ if (ts0710->be_testing == 0) { ++ if (ts0710->test_errs == 0) { ++ retval = 0; ++ } else { ++ retval = -EFAULT; ++ } ++ } else if (signal_pending(current)) { ++ TS0710_DEBUG("Send Test_cmd got signal!\n"); ++ retval = -EAGAIN; ++ } else if ((jiffies - t) >= 2 * TS0710MUX_TIME_OUT) { ++ TS0710_DEBUG("Send Test_cmd timeout!\n"); ++ ts0710->test_errs = TEST_PATTERN_SIZE; ++ retval = -EFAULT; ++ } ++ ++ ts0710->be_testing = 0; /* Clear the flag */ ++ wake_up_interruptible(&ts0710->test_wait); ++ ++ /* Release buffer */ ++ if (f_buf) { ++ kfree(f_buf); ++ } ++ if (d_buf) { ++ kfree(d_buf); ++ } ++ } ++ ++ return retval; ++} ++ ++static void mux_sched_send(void) ++{ ++ ++#ifdef USB_FOR_MUX ++ schedule_work(&send_tqueue); ++#else ++ if (!tq_serial_for_mux) { ++ TS0710_PRINTK("MUX Error: %s: tq_serial_for_mux == 0\n", ++ __FUNCTION__); ++ return; ++ } ++ schedule_work(&send_tqueue); ++ mark_bh(SERIAL_BH); ++#endif ++ ++} ++ ++/**************************** ++ * TTY driver routines ++*****************************/ ++ ++static void mux_close(struct tty_struct *tty, struct file *filp) ++{ ++ ts0710_con *ts0710 = &ts0710_connection; ++ int line; ++ __u8 dlci; ++ __u8 cmdtty; ++ __u8 datatty; ++ ++ UNUSED_PARAM(filp); ++ ++ if (!tty) { ++ return; ++ } ++ line = tty->index; ++ if ((line < 0) || (line >= NR_MUXS)) { ++ return; ++ } ++ if (mux_tty[line] > 0) ++ mux_tty[line]--; ++ ++ dlci = tty2dlci[line]; ++ cmdtty = dlci2tty[dlci].cmdtty; ++ datatty = dlci2tty[dlci].datatty; ++ if ((mux_tty[cmdtty] == 0) && (mux_tty[datatty] == 0)) { ++ if (dlci == 1) { ++ ts0710_close_channel(0); ++ TS0710_PRINTK ++ ("MUX mux_close: tapisrv might be down!!! Close DLCI 1\n"); ++ TS0710_SIG2APLOGD(); ++ } ++ ts0710_close_channel(dlci); ++ } ++ ++ if (mux_tty[line] == 0) { ++ if ((mux_send_info_flags[line]) ++ && (mux_send_info[line]) ++ /*&& (mux_send_info[line]->filled == 0) */ ++ ) { ++ mux_send_info_flags[line] = 0; ++ kfree(mux_send_info[line]); ++ mux_send_info[line] = 0; ++ TS0710_DEBUG("Free mux_send_info for /dev/mux%d", line); ++ } ++ ++ if ((mux_recv_info_flags[line]) ++ && (mux_recv_info[line]) ++ && (mux_recv_info[line]->total == 0)) { ++ mux_recv_info_flags[line] = 0; ++ free_mux_recv_struct(mux_recv_info[line]); ++ mux_recv_info[line] = 0; ++ TS0710_DEBUG("Free mux_recv_info for /dev/mux%d", line); ++ } ++ ++ ts0710_flow_on(dlci, ts0710); ++ schedule_work(&post_recv_tqueue); ++ ++ wake_up_interruptible(&tty->read_wait); ++ wake_up_interruptible(&tty->write_wait); ++ tty->packet = 0; ++ } ++} ++ ++static void mux_throttle(struct tty_struct *tty) ++{ ++ ts0710_con *ts0710 = &ts0710_connection; ++ int line; ++ int i; ++ __u8 dlci; ++ ++ if (!tty) { ++ return; ++ } ++ ++ line = tty->index; ++ if ((line < 0) || (line >= NR_MUXS)) { ++ return; ++ } ++ ++ TS0710_DEBUG("Enter into %s, minor number is: %d\n", __FUNCTION__, ++ line); ++ ++ dlci = tty2dlci[line]; ++ if ((ts0710->dlci[0].state != CONNECTED) ++ && (ts0710->dlci[0].state != FLOW_STOPPED)) { ++ return; ++ } else if ((ts0710->dlci[dlci].state != CONNECTED) ++ && (ts0710->dlci[dlci].state != FLOW_STOPPED)) { ++ return; ++ } ++ ++ if (ts0710->dlci[dlci].flow_control) { ++ return; ++ } ++ ++ for (i = 0; i < 3; i++) { ++ if (ts0710_msc_msg ++ (ts0710, EA | FC | RTC | RTR | DV, MCC_CMD, dlci) < 0) { ++ continue; ++ } else { ++ TS0710_LOG("MUX Send Flow off on dlci %d\n", dlci); ++ ts0710->dlci[dlci].flow_control = 1; ++ break; ++ } ++ } ++} ++ ++static void mux_unthrottle(struct tty_struct *tty) ++{ ++ ts0710_con *ts0710 = &ts0710_connection; ++ int line; ++ __u8 dlci; ++ mux_recv_struct *recv_info; ++ ++ if (!tty) { ++ return; ++ } ++ line = tty->index; ++ if ((line < 0) || (line >= NR_MUXS)) { ++ return; ++ } ++ ++ if ((!mux_recv_info_flags[line]) || (!mux_recv_info[line])) { ++ return; ++ } ++ ++ TS0710_DEBUG("Enter into %s, minor number is: %d\n", __FUNCTION__, ++ line); ++ ++ recv_info = mux_recv_info[line]; ++ dlci = tty2dlci[line]; ++ ++ if (recv_info->total) { ++ recv_info->post_unthrottle = 1; ++ schedule_work(&post_recv_tqueue); ++ } else { ++ ts0710_flow_on(dlci, ts0710); ++ } ++} ++ ++static int mux_chars_in_buffer(struct tty_struct *tty) ++{ ++ ts0710_con *ts0710 = &ts0710_connection; ++ int retval; ++ int line; ++ __u8 dlci; ++ mux_send_struct *send_info; ++ ++ retval = TS0710MUX_MAX_CHARS_IN_BUF; ++ if (!tty) { ++ goto out; ++ } ++ line = tty->index; ++ if ((line < 0) || (line >= NR_MUXS)) { ++ goto out; ++ } ++ ++ dlci = tty2dlci[line]; ++ if (ts0710->dlci[0].state == FLOW_STOPPED) { ++ TS0710_DEBUG ++ ("Flow stopped on all channels, returning MAX chars in buffer\n"); ++ goto out; ++ } else if (ts0710->dlci[dlci].state == FLOW_STOPPED) { ++ TS0710_DEBUG("Flow stopped, returning MAX chars in buffer\n"); ++ goto out; ++ } else if (ts0710->dlci[dlci].state != CONNECTED) { ++ TS0710_DEBUG("DLCI %d not connected\n", dlci); ++ goto out; ++ } ++ ++ if (!(mux_send_info_flags[line])) { ++ goto out; ++ } ++ send_info = mux_send_info[line]; ++ if (!send_info) { ++ goto out; ++ } ++ if (send_info->filled) { ++ goto out; ++ } ++ ++ retval = 0; ++ ++ out: ++ return retval; ++} ++ ++static int mux_chars_in_serial_buffer(struct tty_struct *tty) ++{ ++ UNUSED_PARAM(tty); ++ ++ if ((COMM_FOR_MUX_DRIVER == 0) || (COMM_FOR_MUX_TTY == 0)) { ++ TS0710_PRINTK ++ ("MUX %s: (COMM_FOR_MUX_DRIVER == 0) || (COMM_FOR_MUX_TTY == 0)\n", ++ __FUNCTION__); ++ ++#ifndef USB_FOR_MUX ++ TS0710_PRINTK ++ ("MUX %s: tapisrv might be down!!! (serial_for_mux_driver == 0) || (serial_for_mux_tty == 0)\n", ++ __FUNCTION__); ++ TS0710_SIG2APLOGD(); ++#endif ++ ++ return 0; ++ } ++ return COMM_FOR_MUX_DRIVER->chars_in_buffer(COMM_FOR_MUX_TTY); ++} ++ ++static int mux_write(struct tty_struct *tty, ++ const unsigned char *buf, int count) ++{ ++ ts0710_con *ts0710 = &ts0710_connection; ++ int line; ++ __u8 dlci; ++ mux_send_struct *send_info; ++ __u8 *d_buf; ++ __u16 c; ++ __u8 post_recv; ++ ++ if (count <= 0) { ++ return 0; ++ } ++ ++ if (!tty) { ++ return 0; ++ } ++ ++ line = tty->index; ++ if ((line < 0) || (line >= NR_MUXS)) ++ return -ENODEV; ++ ++ dlci = tty2dlci[line]; ++ if (ts0710->dlci[0].state == FLOW_STOPPED) { ++ TS0710_DEBUG ++ ("Flow stopped on all channels, returning zero /dev/mux%d\n", ++ line); ++ return 0; ++ } else if (ts0710->dlci[dlci].state == FLOW_STOPPED) { ++ TS0710_DEBUG("Flow stopped, returning zero /dev/mux%d\n", line); ++ return 0; ++ } else if (ts0710->dlci[dlci].state == CONNECTED) { ++ ++ if (!(mux_send_info_flags[line])) { ++ TS0710_PRINTK ++ ("MUX Error: mux_write: mux_send_info_flags[%d] == 0\n", ++ line); ++ return -ENODEV; ++ } ++ send_info = mux_send_info[line]; ++ if (!send_info) { ++ TS0710_PRINTK ++ ("MUX Error: mux_write: mux_send_info[%d] == 0\n", ++ line); ++ return -ENODEV; ++ } ++ ++ c = min(count, (ts0710->dlci[dlci].mtu - 1)); ++ if (c <= 0) { ++ return 0; ++ } ++ ++ if (test_and_set_bit(BUF_BUSY, &send_info->flags)) ++ return 0; ++ ++ if (send_info->filled) { ++ clear_bit(BUF_BUSY, &send_info->flags); ++ return 0; ++ } ++ ++ d_buf = ((__u8 *) send_info->buf) + TS0710MUX_SEND_BUF_OFFSET; ++ memcpy(&d_buf[1], buf, c); ++ ++ TS0710_DEBUG("Prepare to send %d bytes from /dev/mux%d", c, ++ line); ++ if (iscmdtty[line]) { ++ TS0710_DEBUGSTR(&d_buf[1], c); ++ TS0710_DEBUG("CMDTAG"); ++ d_buf[0] = CMDTAG; ++ } else { ++ TS0710_DEBUG("DATATAG"); ++ d_buf[0] = DATATAG; ++ } ++ ++ TS0710_DEBUGHEX(d_buf, c + 1); ++ ++ send_info->frame = d_buf; ++ queue_uih(send_info, c + 1, ts0710, dlci); ++ send_info->filled = 1; ++ clear_bit(BUF_BUSY, &send_info->flags); ++ ++ post_recv = 0; ++ if (dlci == TS0710MUX_GPRS1_DLCI) { ++ if (add_count ++ (TS0710MUX_GPRS1_SEND_COUNT_IDX, c) < 0) { ++ post_recv_count_flag = 1; ++ post_recv = 1; ++ mux_data_count2[TS0710MUX_GPRS1_SEND_COUNT_IDX] ++ += c; ++ } ++ } else if (dlci == TS0710MUX_GPRS2_DLCI) { ++ if (add_count ++ (TS0710MUX_GPRS2_SEND_COUNT_IDX, c) < 0) { ++ post_recv_count_flag = 1; ++ post_recv = 1; ++ mux_data_count2[TS0710MUX_GPRS2_SEND_COUNT_IDX] ++ += c; ++ } ++ } ++ ++ if (post_recv) ++ schedule_work(&post_recv_tqueue); ++ ++ if (mux_chars_in_serial_buffer(COMM_FOR_MUX_TTY) == 0) { ++ /* Sending bottom half should be ++ run after return from this function */ ++ mux_sched_send(); ++ } ++ return c; ++ } else { ++ TS0710_PRINTK("MUX mux_write: DLCI %d not connected\n", dlci); ++ return -EDISCONNECTED; ++ } ++} ++ ++static int mux_write_room(struct tty_struct *tty) ++{ ++ ts0710_con *ts0710 = &ts0710_connection; ++ int retval; ++ int line; ++ __u8 dlci; ++ mux_send_struct *send_info; ++ ++ retval = 0; ++ if (!tty) { ++ goto out; ++ } ++ line = tty->index; ++ if ((line < 0) || (line >= NR_MUXS)) { ++ goto out; ++ } ++ ++ dlci = tty2dlci[line]; ++ if (ts0710->dlci[0].state == FLOW_STOPPED) { ++ TS0710_DEBUG("Flow stopped on all channels, returning ZERO\n"); ++ goto out; ++ } else if (ts0710->dlci[dlci].state == FLOW_STOPPED) { ++ TS0710_DEBUG("Flow stopped, returning ZERO\n"); ++ goto out; ++ } else if (ts0710->dlci[dlci].state != CONNECTED) { ++ TS0710_DEBUG("DLCI %d not connected\n", dlci); ++ goto out; ++ } ++ ++ if (!(mux_send_info_flags[line])) { ++ goto out; ++ } ++ send_info = mux_send_info[line]; ++ if (!send_info) { ++ goto out; ++ } ++ if (send_info->filled) { ++ goto out; ++ } ++ ++ retval = ts0710->dlci[dlci].mtu - 1; ++ ++ out: ++ return retval; ++} ++ ++static int mux_ioctl(struct tty_struct *tty, struct file *file, ++ unsigned int cmd, unsigned long arg) ++{ ++ ts0710_con *ts0710 = &ts0710_connection; ++ int line; ++ __u8 dlci; ++ ++ UNUSED_PARAM(file); ++ UNUSED_PARAM(arg); ++ ++ if (!tty) { ++ return -EIO; ++ } ++ line = tty->index; ++ if ((line < 0) || (line >= NR_MUXS)) { ++ return -ENODEV; ++ } ++ ++ dlci = tty2dlci[line]; ++ switch (cmd) { ++ case TS0710MUX_IO_MSC_HANGUP: ++ if (ts0710_msc_msg(ts0710, EA | RTR | DV, MCC_CMD, dlci) < 0) { ++ return -EAGAIN; ++ } else { ++ return 0; ++ } ++ ++ case TS0710MUX_IO_TEST_CMD: ++ return ts0710_exec_test_cmd(); ++/* ++ case TS0710MUX_IO_DLCI_FC_ON: ++ if( line == 0 ) { ++ break; ++ } ++ if( ts0710_msc_msg(ts0710, EA | RTC | RTR | DV, MCC_CMD, (__u8)line) < 0) { ++ return -EAGAIN; ++ } else { ++ return 0; ++ } ++ ++ case TS0710MUX_IO_DLCI_FC_OFF: ++ if( line == 0 ) { ++ break; ++ } ++ if( ts0710_msc_msg(ts0710, EA | FC | RTC | RTR | DV, MCC_CMD, (__u8)line) < 0) { ++ return -EAGAIN; ++ } else { ++ return 0; ++ } ++ ++ case TS0710MUX_IO_FC_ON: ++ if( line != 0 ) { ++ break; ++ } ++ if( ts0710_fcon_msg(ts0710, MCC_CMD) < 0) { ++ return -EAGAIN; ++ } else { ++ return 0; ++ } ++ ++ case TS0710MUX_IO_FC_OFF: ++ if( line != 0 ) { ++ break; ++ } ++ if( ts0710_fcoff_msg(ts0710, MCC_CMD) < 0) { ++ return -EAGAIN; ++ } else { ++ return 0; ++ } ++*/ ++ default: ++ break; ++ } ++ return -ENOIOCTLCMD; ++} ++ ++static void mux_flush_buffer(struct tty_struct *tty) ++{ ++ int line; ++ ++ if (!tty) { ++ return; ++ } ++ ++ line = tty->index; ++ if ((line < 0) || (line >= NR_MUXS)) { ++ return; ++ } ++ ++ TS0710_PRINTK("MUX %s: line is:%d\n", __FUNCTION__, line); ++ ++ if ((mux_send_info_flags[line]) ++ && (mux_send_info[line]) ++ && (mux_send_info[line]->filled)) { ++ ++ mux_send_info[line]->filled = 0; ++ } ++ ++ wake_up_interruptible(&tty->write_wait); ++#ifdef SERIAL_HAVE_POLL_WAIT ++ wake_up_interruptible(&tty->poll_wait); ++#endif ++ if ((tty->flags & (1 << TTY_DO_WRITE_WAKEUP)) && ++ tty->ldisc.write_wakeup) { ++ (tty->ldisc.write_wakeup) (tty); ++ } ++ ++/* ++ if( (COMM_FOR_MUX_DRIVER == 0) || (COMM_FOR_MUX_TTY == 0) ) { ++ TS0710_PRINTK("MUX %s: (COMM_FOR_MUX_DRIVER == 0) || (COMM_FOR_MUX_TTY == 0)\n", __FUNCTION__); ++ ++#ifndef USB_FOR_MUX ++ TS0710_PRINTK("MUX %s: tapisrv might be down!!! (serial_for_mux_driver == 0) || (serial_for_mux_tty == 0)\n", __FUNCTION__); ++ TS0710_SIG2APLOGD(); ++#endif ++ ++ return; ++ } ++ return COMM_FOR_MUX_DRIVER->flush_buffer(COMM_FOR_MUX_TTY); ++*/ ++} ++ ++static int mux_open(struct tty_struct *tty, struct file *filp) ++{ ++ int retval; ++ int line; ++ __u8 dlci; ++ __u8 cmdtty; ++ __u8 datatty; ++ mux_send_struct *send_info; ++ mux_recv_struct *recv_info; ++ ++ UNUSED_PARAM(filp); ++ ++ retval = -ENODEV; ++ if ((COMM_FOR_MUX_DRIVER == NULL) || (COMM_FOR_MUX_TTY == NULL)) { ++ ++#ifdef USB_FOR_MUX ++ TS0710_PRINTK("MUX: please install and open IPC-USB first\n"); ++#else ++ TS0710_PRINTK("MUX: please install and open ttyS0 first\n"); ++#endif ++ ++ goto out; ++ } ++ ++ if (!tty) { ++ goto out; ++ } ++ line = tty->index; ++ if ((line < 0) || (line >= NR_MUXS)) { ++ goto out; ++ } ++#ifdef TS0710SERVER ++ /* do nothing as a server */ ++ mux_tty[line]++; ++ retval = 0; ++#else ++ mux_tty[line]++; ++ dlci = tty2dlci[line]; ++ ++/* if( dlci == 1 ) { */ ++ /* Open server channel 0 first */ ++ if ((retval = ts0710_open_channel(0)) != 0) { ++ TS0710_PRINTK("MUX: Can't connect server channel 0!\n"); ++ ts0710_init(); ++ ++ mux_tty[line]--; ++ goto out; ++ } ++/* } */ ++ ++ /* Allocate memory first. As soon as connection has been established, MUX may receive */ ++ if (mux_send_info_flags[line] == 0) { ++ send_info = ++ (mux_send_struct *) kmalloc(sizeof(mux_send_struct), ++ GFP_KERNEL); ++ if (!send_info) { ++ retval = -ENOMEM; ++ ++ mux_tty[line]--; ++ goto out; ++ } ++ send_info->length = 0; ++ send_info->flags = 0; ++ send_info->filled = 0; ++ mux_send_info[line] = send_info; ++ mux_send_info_flags[line] = 1; ++ TS0710_DEBUG("Allocate mux_send_info for /dev/mux%d", line); ++ } ++ ++ if (mux_recv_info_flags[line] == 0) { ++ recv_info = ++ (mux_recv_struct *) kmalloc(sizeof(mux_recv_struct), ++ GFP_KERNEL); ++ if (!recv_info) { ++ mux_send_info_flags[line] = 0; ++ kfree(mux_send_info[line]); ++ mux_send_info[line] = 0; ++ TS0710_DEBUG("Free mux_send_info for /dev/mux%d", line); ++ retval = -ENOMEM; ++ ++ mux_tty[line]--; ++ goto out; ++ } ++ recv_info->length = 0; ++ recv_info->total = 0; ++ recv_info->mux_packet = 0; ++ recv_info->next = 0; ++ recv_info->no_tty = line; ++ recv_info->post_unthrottle = 0; ++ mux_recv_info[line] = recv_info; ++ mux_recv_info_flags[line] = 1; ++ TS0710_DEBUG("Allocate mux_recv_info for /dev/mux%d", line); ++ } ++ ++ /* Now establish DLCI connection */ ++ cmdtty = dlci2tty[dlci].cmdtty; ++ datatty = dlci2tty[dlci].datatty; ++ if ((mux_tty[cmdtty] > 0) || (mux_tty[datatty] > 0)) { ++ if ((retval = ts0710_open_channel(dlci)) != 0) { ++ TS0710_PRINTK("MUX: Can't connected channel %d!\n", ++ dlci); ++ ts0710_reset_dlci(dlci); ++ ++ mux_send_info_flags[line] = 0; ++ kfree(mux_send_info[line]); ++ mux_send_info[line] = 0; ++ TS0710_DEBUG("Free mux_send_info for /dev/mux%d", line); ++ ++ mux_recv_info_flags[line] = 0; ++ free_mux_recv_struct(mux_recv_info[line]); ++ mux_recv_info[line] = 0; ++ TS0710_DEBUG("Free mux_recv_info for /dev/mux%d", line); ++ ++ mux_tty[line]--; ++ goto out; ++ } ++ } ++ ++ retval = 0; ++#endif ++ out: ++ return retval; ++} ++ ++/* mux dispatcher, call from serial.c receiver_chars() */ ++void mux_dispatcher(struct tty_struct *tty) ++{ ++ UNUSED_PARAM(tty); ++ ++ schedule_work(&receive_tqueue); ++} ++ ++/*For BP UART problem Begin*/ ++#ifdef TS0710SEQ2 ++static int send_ack(ts0710_con * ts0710, __u8 seq_num, __u8 bp_seq1, ++ __u8 bp_seq2) ++#else ++static int send_ack(ts0710_con * ts0710, __u8 seq_num) ++#endif ++{ ++ __u8 buf[20]; ++ short_frame *ack; ++ ++#ifdef TS0710SEQ2 ++ static __u16 ack_seq = 0; ++#endif ++ ++ ack = (short_frame *) (buf + 1); ++ ack->h.addr.ea = 1; ++ ack->h.addr.cr = ((ts0710->initiator) & 0x1); ++ ack->h.addr.d = 0; ++ ack->h.addr.server_chn = 0; ++ ack->h.control = ACK; ++ ack->h.length.ea = 1; ++ ++#ifdef TS0710SEQ2 ++ ack->h.length.len = 5; ++ ack->data[0] = seq_num; ++ ack->data[1] = bp_seq1; ++ ack->data[2] = bp_seq2; ++ ack->data[3] = (ack_seq & 0xFF); ++ ack->data[4] = (ack_seq >> 8) & 0xFF; ++ ack_seq++; ++ ack->data[5] = crc_calc((__u8 *) ack, SHORT_CRC_CHECK); ++#else ++ ack->h.length.len = 1; ++ ack->data[0] = seq_num; ++ ack->data[1] = crc_calc((__u8 *) ack, SHORT_CRC_CHECK); ++#endif ++ ++ return basic_write(ts0710, buf, ++ (sizeof(short_frame) + FCS_SIZE + ++ ack->h.length.len)); ++} ++ ++/*For BP UART problem End*/ ++ ++static void receive_worker(void *private_) ++{ ++ struct tty_struct *tty = COMM_FOR_MUX_TTY; ++ int i, count; ++ static unsigned char tbuf[TS0710MUX_MAX_BUF_SIZE]; ++ static unsigned char *tbuf_ptr = &tbuf[0]; ++ static unsigned char *start_flag = 0; ++ unsigned char *search, *to, *from; ++ short_frame *short_pkt; ++ long_frame *long_pkt; ++ static int framelen = -1; ++ ++ /*For BP UART problem Begin */ ++ static __u8 expect_seq = 0; ++ __u32 crc_error; ++ __u8 *uih_data_start; ++ __u32 uih_len; ++ /*For BP UART problem End */ ++ ++ UNUSED_PARAM(private_); ++ ++ if (!tty) ++ return; ++ ++#ifdef USB_FOR_MUX ++ TS0710_DEBUG("Receive following bytes from IPC-USB"); ++#else ++ TS0710_DEBUG("Receive following bytes from UART"); ++#endif ++ ++ TS0710_DEBUGHEX(cp, count); ++ ++ if (count > (TS0710MUX_MAX_BUF_SIZE - (tbuf_ptr - tbuf))) { ++ TS0710_PRINTK ++ ("MUX receive_worker: !!!!! Exceed buffer boundary !!!!!\n"); ++ count = (TS0710MUX_MAX_BUF_SIZE - (tbuf_ptr - tbuf)); ++ } ++ ++ count = tty_buffer_request_room(tty, count); ++ ++ for (i = 0; i < count; i++) ++ tty_insert_flip_char(tty, tbuf_ptr[i], TTY_NORMAL); ++ ++ tbuf_ptr += count; ++ search = &tbuf[0]; ++ ++ if (test_and_set_bit(RECV_RUNNING, &mux_recv_flags)) { ++ schedule_work(&receive_tqueue); ++ return; ++ } ++ ++ if ((start_flag != 0) && (framelen != -1)) { ++ if ((tbuf_ptr - start_flag) < framelen) { ++ clear_bit(RECV_RUNNING, &mux_recv_flags); ++ return; ++ } ++ } ++ ++ while (1) { ++ if (start_flag == 0) { /* Frame Start Flag not found */ ++ framelen = -1; ++ while (search < tbuf_ptr) { ++ if (*search == TS0710_BASIC_FLAG) { ++ start_flag = search; ++ break; ++ } ++#ifdef TS0710LOG ++ else { ++ TS0710_LOG(">S %02x %c\n", *search, ++ *search); ++ } ++#endif ++ ++ search++; ++ } ++ ++ if (start_flag == 0) { ++ tbuf_ptr = &tbuf[0]; ++ break; ++ } ++ } else { /* Frame Start Flag found */ ++ /* 1 start flag + 1 address + 1 control + 1 or 2 length + lengths data + 1 FCS + 1 end flag */ ++ /* For BP UART problem 1 start flag + 1 seq_num + 1 address + ...... */ ++ /*if( (framelen == -1) && ((tbuf_ptr - start_flag) > TS0710_MAX_HDR_SIZE) ) */ ++ if ((framelen == -1) && ((tbuf_ptr - start_flag) > (TS0710_MAX_HDR_SIZE + SEQ_FIELD_SIZE))) { /*For BP UART problem */ ++ /*short_pkt = (short_frame *) (start_flag + 1); */ ++ short_pkt = (short_frame *) (start_flag + ADDRESS_FIELD_OFFSET); /*For BP UART problem */ ++ if (short_pkt->h.length.ea == 1) { /* short frame */ ++ /*framelen = TS0710_MAX_HDR_SIZE + short_pkt->h.length.len + 1; */ ++ framelen = TS0710_MAX_HDR_SIZE + short_pkt->h.length.len + 1 + SEQ_FIELD_SIZE; /*For BP UART problem */ ++ } else { /* long frame */ ++ /*long_pkt = (long_frame *) (start_flag + 1); */ ++ long_pkt = (long_frame *) (start_flag + ADDRESS_FIELD_OFFSET); /*For BP UART problem */ ++ /*framelen = TS0710_MAX_HDR_SIZE + GET_LONG_LENGTH( long_pkt->h.length ) + 2; */ ++ framelen = TS0710_MAX_HDR_SIZE + GET_LONG_LENGTH(long_pkt->h.length) + 2 + SEQ_FIELD_SIZE; /*For BP UART problem */ ++ } ++ ++ /*if( framelen > TS0710MUX_MAX_TOTAL_FRAME_SIZE ) { */ ++ if (framelen > (TS0710MUX_MAX_TOTAL_FRAME_SIZE + SEQ_FIELD_SIZE)) { /*For BP UART problem */ ++ TS0710_LOGSTR_FRAME(0, start_flag, ++ (tbuf_ptr - ++ start_flag)); ++ TS0710_PRINTK ++ ("MUX Error: %s: frame length:%d is bigger than Max total frame size:%d\n", ++ /*__FUNCTION__, framelen, TS0710MUX_MAX_TOTAL_FRAME_SIZE);*/ ++ __FUNCTION__, framelen, (TS0710MUX_MAX_TOTAL_FRAME_SIZE + SEQ_FIELD_SIZE)); /*For BP UART problem */ ++ search = start_flag + 1; ++ start_flag = 0; ++ framelen = -1; ++ continue; ++ } ++ } ++ ++ if ((framelen != -1) ++ && ((tbuf_ptr - start_flag) >= framelen)) { ++ if (*(start_flag + framelen - 1) == TS0710_BASIC_FLAG) { /* OK, We got one frame */ ++ ++ /*For BP UART problem Begin */ ++ TS0710_LOGSTR_FRAME(0, start_flag, ++ framelen); ++ TS0710_DEBUGHEX(start_flag, framelen); ++ ++ short_pkt = ++ (short_frame *) (start_flag + ++ ADDRESS_FIELD_OFFSET); ++ if ((short_pkt->h.length.ea) == 0) { ++ long_pkt = ++ (long_frame *) (start_flag + ++ ADDRESS_FIELD_OFFSET); ++ uih_len = ++ GET_LONG_LENGTH(long_pkt->h. ++ length); ++ uih_data_start = ++ long_pkt->h.data; ++ ++ crc_error = ++ crc_check((__u8 ++ *) (start_flag + ++ SLIDE_BP_SEQ_OFFSET), ++ LONG_CRC_CHECK + ++ 1, ++ *(uih_data_start + ++ uih_len)); ++ } else { ++ uih_len = ++ short_pkt->h.length.len; ++ uih_data_start = ++ short_pkt->data; ++ ++ crc_error = ++ crc_check((__u8 ++ *) (start_flag + ++ SLIDE_BP_SEQ_OFFSET), ++ SHORT_CRC_CHECK + ++ 1, ++ *(uih_data_start + ++ uih_len)); ++ } ++ ++ if (!crc_error) { ++ if (expect_seq == ++ *(start_flag + ++ SLIDE_BP_SEQ_OFFSET)) { ++ expect_seq++; ++ if (expect_seq >= 4) { ++ expect_seq = 0; ++ } ++#ifdef TS0710SEQ2 ++ send_ack ++ (&ts0710_connection, ++ expect_seq, ++ *(start_flag + ++ FIRST_BP_SEQ_OFFSET), ++ *(start_flag + ++ SECOND_BP_SEQ_OFFSET)); ++#else ++ send_ack ++ (&ts0710_connection, ++ expect_seq); ++#endif ++ ++ ts0710_recv_data ++ (&ts0710_connection, ++ start_flag + ++ ADDRESS_FIELD_OFFSET, ++ framelen - 2 - ++ SEQ_FIELD_SIZE); ++ } else { ++ ++#ifdef TS0710DEBUG ++ if (* ++ (start_flag + ++ SLIDE_BP_SEQ_OFFSET) ++ != 0x9F) { ++#endif ++ ++ TS0710_LOG ++ ("MUX sequence number %d is not expected %d, discard data!\n", ++ * ++ (start_flag ++ + ++ SLIDE_BP_SEQ_OFFSET), ++ expect_seq); ++ ++#ifdef TS0710SEQ2 ++ send_ack ++ (&ts0710_connection, ++ expect_seq, ++ * ++ (start_flag ++ + ++ FIRST_BP_SEQ_OFFSET), ++ * ++ (start_flag ++ + ++ SECOND_BP_SEQ_OFFSET)); ++#else ++ send_ack ++ (&ts0710_connection, ++ expect_seq); ++#endif ++ ++#ifdef TS0710DEBUG ++ } else { ++ *(uih_data_start ++ + uih_len) = ++ 0; ++ TS0710_PRINTK ++ ("MUX bp log: %s\n", ++ uih_data_start); ++ } ++#endif ++ ++ } ++ } else { /* crc_error */ ++ search = start_flag + 1; ++ start_flag = 0; ++ framelen = -1; ++ continue; ++ } /*End if(!crc_error) */ ++ ++ /*For BP UART problem End */ ++ ++/*For BP UART problem ++ TS0710_LOGSTR_FRAME(0, start_flag, framelen); ++ TS0710_DEBUGHEX(start_flag, framelen); ++ ts0710_recv_data(&ts0710_connection, start_flag + 1, framelen - 2); ++*/ ++ search = start_flag + framelen; ++ } else { ++ TS0710_LOGSTR_FRAME(0, start_flag, ++ framelen); ++ TS0710_DEBUGHEX(start_flag, framelen); ++ TS0710_PRINTK ++ ("MUX: Lost synchronization!\n"); ++ search = start_flag + 1; ++ } ++ ++ start_flag = 0; ++ framelen = -1; ++ continue; ++ } ++ ++ if (start_flag != &tbuf[0]) { ++ to = tbuf; ++ from = start_flag; ++ count = tbuf_ptr - start_flag; ++ while (count--) { ++ *to++ = *from++; ++ } ++ ++ tbuf_ptr -= (start_flag - tbuf); ++ start_flag = tbuf; ++ } ++ break; ++ } /* End Frame Start Flag found */ ++ } /* End while(1) */ ++ ++ clear_bit(RECV_RUNNING, &mux_recv_flags); ++} ++ ++static void post_recv_worker(void *private_) ++{ ++ ts0710_con *ts0710 = &ts0710_connection; ++ int tty_idx; ++ struct tty_struct *tty; ++ __u8 post_recv; ++ __u8 flow_control; ++ __u8 dlci; ++ mux_recv_struct *recv_info, *recv_info2, *post_recv_q; ++ int recv_room; ++ mux_recv_packet *recv_packet, *recv_packet2; ++ __u8 j; ++ ++ UNUSED_PARAM(private_); ++ ++ if (test_and_set_bit(RECV_RUNNING, &mux_recv_flags)) { ++ schedule_work(&post_recv_tqueue); ++ return; ++ } ++ ++ TS0710_DEBUG("Enter into post_recv_worker"); ++ ++ post_recv = 0; ++ if (!mux_recv_queue) { ++ goto out; ++ } ++ ++ post_recv_q = NULL; ++ recv_info2 = mux_recv_queue; ++ while ((recv_info = recv_info2)) { ++ recv_info2 = recv_info->next; ++ ++ if (!(recv_info->total)) { ++ TS0710_PRINTK ++ ("MUX Error: %s: Should not get here, recv_info->total == 0 \n", ++ __FUNCTION__); ++ continue; ++ } ++ ++ tty_idx = recv_info->no_tty; ++ dlci = tty2dlci[tty_idx]; ++ tty = mux_table[tty_idx]; ++ if ((!mux_tty[tty_idx]) || (!tty)) { ++ TS0710_PRINTK ++ ("MUX: No application waiting for, free recv_info! tty_idx:%d\n", ++ tty_idx); ++ mux_recv_info_flags[tty_idx] = 0; ++ free_mux_recv_struct(mux_recv_info[tty_idx]); ++ mux_recv_info[tty_idx] = 0; ++ ts0710_flow_on(dlci, ts0710); ++ continue; ++ } ++ ++ TS0710_DEBUG("/dev/mux%d recv_info->total is: %d", tty_idx, ++ recv_info->total); ++ ++ if (test_bit(TTY_THROTTLED, &tty->flags)) { ++ add_post_recv_queue(&post_recv_q, recv_info); ++ continue; ++ } else if (test_bit(TTY_DONT_FLIP, &tty->flags)) { ++ post_recv = 1; ++ add_post_recv_queue(&post_recv_q, recv_info); ++ continue; ++ } ++ ++ flow_control = 0; ++ recv_packet2 = recv_info->mux_packet; ++ while (recv_info->total) { ++ recv_room = 65535; ++ if (tty->receive_room) ++ recv_room = tty->receive_room; ++ ++ if (recv_info->length) { ++ if (recv_room < recv_info->length) { ++ flow_control = 1; ++ break; ++ } ++ ++ /* Put queued data into read buffer of tty */ ++ TS0710_DEBUG ++ ("Put queued recv data into read buffer of /dev/mux%d", ++ tty_idx); ++ TS0710_DEBUGHEX(recv_info->data, ++ recv_info->length); ++ (tty->ldisc.receive_buf) (tty, recv_info->data, ++ NULL, ++ recv_info->length); ++ recv_info->total -= recv_info->length; ++ recv_info->length = 0; ++ } else { /* recv_info->length == 0 */ ++ if ((recv_packet = recv_packet2)) { ++ recv_packet2 = recv_packet->next; ++ ++ if (recv_room < recv_packet->length) { ++ flow_control = 1; ++ recv_info->mux_packet = ++ recv_packet; ++ break; ++ } ++ ++ /* Put queued data into read buffer of tty */ ++ TS0710_DEBUG ++ ("Put queued recv data into read buffer of /dev/mux%d", ++ tty_idx); ++ TS0710_DEBUGHEX(recv_packet->data, ++ recv_packet->length); ++ (tty->ldisc.receive_buf) (tty, ++ recv_packet-> ++ data, NULL, ++ recv_packet-> ++ length); ++ recv_info->total -= recv_packet->length; ++ free_mux_recv_packet(recv_packet); ++ } else { ++ TS0710_PRINTK ++ ("MUX Error: %s: Should not get here, recv_info->total is:%u \n", ++ __FUNCTION__, recv_info->total); ++ } ++ } /* End recv_info->length == 0 */ ++ } /* End while( recv_info->total ) */ ++ ++ if (!(recv_info->total)) { ++ /* Important clear */ ++ recv_info->mux_packet = 0; ++ ++ if (recv_info->post_unthrottle) { ++ /* Do something for post_unthrottle */ ++ ts0710_flow_on(dlci, ts0710); ++ recv_info->post_unthrottle = 0; ++ } ++ } else { ++ add_post_recv_queue(&post_recv_q, recv_info); ++ ++ if (flow_control) { ++ /* Do something for flow control */ ++ if (recv_info->post_unthrottle) { ++ set_bit(TTY_THROTTLED, &tty->flags); ++ recv_info->post_unthrottle = 0; ++ } else { ++ ts0710_flow_off(tty, dlci, ts0710); ++ } ++ } /* End if( flow_control ) */ ++ } ++ } /* End while( (recv_info = recv_info2) ) */ ++ ++ mux_recv_queue = post_recv_q; ++ ++ out: ++ if (post_recv_count_flag) { ++ post_recv_count_flag = 0; ++ for (j = 0; j < TS0710MUX_COUNT_IDX_NUM; j++) { ++ if (mux_data_count2[j] > 0) { ++ if (add_count(j, mux_data_count2[j]) == 0) { ++ mux_data_count2[j] = 0; ++ } else { ++ post_recv_count_flag = 1; ++ post_recv = 1; ++ } ++ } ++ } /* End for (j = 0; j < TS0710MUX_COUNT_IDX_NUM; j++) */ ++ } ++ /* End if( post_recv_count_flag ) */ ++ if (post_recv) ++ schedule_work(&post_recv_tqueue); ++ clear_bit(RECV_RUNNING, &mux_recv_flags); ++} ++ ++/* mux sender, call from serial.c transmit_chars() */ ++void mux_sender(void) ++{ ++ mux_send_struct *send_info; ++ int chars; ++ __u8 idx; ++ ++ chars = mux_chars_in_serial_buffer(COMM_FOR_MUX_TTY); ++ if (!chars) { ++ /* chars == 0 */ ++ TS0710_LOG("<[]\n"); ++ mux_sched_send(); ++ return; ++ } ++ ++ idx = mux_send_info_idx; ++ if ((idx < NR_MUXS) && (mux_send_info_flags[idx])) { ++ send_info = mux_send_info[idx]; ++ if ((send_info) ++ && (send_info->filled) ++ && (send_info->length <= ++ (TS0710MUX_SERIAL_BUF_SIZE - chars))) { ++ ++ mux_sched_send(); ++ } ++ } ++} ++ ++static void send_worker(void *private_) ++{ ++ ts0710_con *ts0710 = &ts0710_connection; ++ __u8 j; ++ mux_send_struct *send_info; ++ int chars; ++ struct tty_struct *tty; ++ __u8 dlci; ++ ++ UNUSED_PARAM(private_); ++ ++ TS0710_DEBUG("Enter into send_worker"); ++ ++ mux_send_info_idx = NR_MUXS; ++ ++ if (ts0710->dlci[0].state == FLOW_STOPPED) { ++ TS0710_DEBUG("Flow stopped on all channels\n"); ++ return; ++ } ++ ++ for (j = 0; j < NR_MUXS; j++) { ++ ++ if (!(mux_send_info_flags[j])) { ++ continue; ++ } ++ ++ send_info = mux_send_info[j]; ++ if (!send_info) { ++ continue; ++ } ++ ++ if (!(send_info->filled)) { ++ continue; ++ } ++ ++ dlci = tty2dlci[j]; ++ if (ts0710->dlci[dlci].state == FLOW_STOPPED) { ++ TS0710_DEBUG("Flow stopped on channel DLCI: %d\n", ++ dlci); ++ continue; ++ } else if (ts0710->dlci[dlci].state != CONNECTED) { ++ TS0710_DEBUG("DLCI %d not connected\n", dlci); ++ send_info->filled = 0; ++ continue; ++ } ++ ++ chars = mux_chars_in_serial_buffer(COMM_FOR_MUX_TTY); ++ if (send_info->length <= (TS0710MUX_SERIAL_BUF_SIZE - chars)) { ++ TS0710_DEBUG("Send queued UIH for /dev/mux%d", j); ++ basic_write(ts0710, (__u8 *) send_info->frame, ++ send_info->length); ++ send_info->length = 0; ++ send_info->filled = 0; ++ } else { ++ mux_send_info_idx = j; ++ break; ++ } ++ } /* End for() loop */ ++ ++ /* Queue UIH data to be transmitted */ ++ for (j = 0; j < NR_MUXS; j++) { ++ ++ if (!(mux_send_info_flags[j])) { ++ continue; ++ } ++ ++ send_info = mux_send_info[j]; ++ if (!send_info) { ++ continue; ++ } ++ ++ if (send_info->filled) { ++ continue; ++ } ++ ++ /* Now queue UIH data to send_info->buf */ ++ ++ if (!mux_tty[j]) { ++ continue; ++ } ++ ++ tty = mux_table[j]; ++ if (!tty) { ++ continue; ++ } ++ ++ dlci = tty2dlci[j]; ++ if (ts0710->dlci[dlci].state == FLOW_STOPPED) { ++ TS0710_DEBUG("Flow stopped on channel DLCI: %d\n", ++ dlci); ++ continue; ++ } else if (ts0710->dlci[dlci].state != CONNECTED) { ++ TS0710_DEBUG("DLCI %d not connected\n", dlci); ++ continue; ++ } ++ ++ if ((tty->flags & (1 << TTY_DO_WRITE_WAKEUP)) ++ && tty->ldisc.write_wakeup) { ++ (tty->ldisc.write_wakeup) (tty); ++ } ++ wake_up_interruptible(&tty->write_wait); ++ ++#ifdef SERIAL_HAVE_POLL_WAIT ++ wake_up_interruptible(&tty->poll_wait); ++#endif ++ ++ if (send_info->filled) { ++ if (j < mux_send_info_idx) { ++ mux_send_info_idx = j; ++ } ++ } ++ } /* End for() loop */ ++} ++ ++static int get_count(__u8 idx) ++{ ++ int ret; ++ ++ if (idx > TS0710MUX_COUNT_MAX_IDX) { ++ TS0710_PRINTK("MUX get_count: invalid idx: %d!\n", idx); ++ return -1; ++ } ++ ++ down(&mux_data_count_mutex[idx]); ++ ret = mux_data_count[idx]; ++ up(&mux_data_count_mutex[idx]); ++ ++ return ret; ++} ++ ++static int set_count(__u8 idx, int count) ++{ ++ if (idx > TS0710MUX_COUNT_MAX_IDX) { ++ TS0710_PRINTK("MUX set_count: invalid idx: %d!\n", idx); ++ return -1; ++ } ++ if (count < 0) { ++ TS0710_PRINTK("MUX set_count: invalid count: %d!\n", count); ++ return -1; ++ } ++ ++ down(&mux_data_count_mutex[idx]); ++ mux_data_count[idx] = count; ++ up(&mux_data_count_mutex[idx]); ++ ++ return 0; ++} ++ ++static int add_count(__u8 idx, int count) ++{ ++ if (idx > TS0710MUX_COUNT_MAX_IDX) { ++ TS0710_PRINTK("MUX add_count: invalid idx: %d!\n", idx); ++ return -1; ++ } ++ if (count <= 0) { ++ TS0710_PRINTK("MUX add_count: invalid count: %d!\n", count); ++ return -1; ++ } ++ ++ if (down_trylock(&mux_data_count_mutex[idx])) ++ return -1; ++ mux_data_count[idx] += count; ++ up(&mux_data_count_mutex[idx]); ++ ++ return 0; ++} ++ ++ssize_t file_proc_read(struct file * file, char *buf, size_t size, ++ loff_t * ppos) ++{ ++ gprs_bytes gprsData[TS0710MUX_GPRS_SESSION_MAX]; ++ int bufLen = sizeof(gprs_bytes) * TS0710MUX_GPRS_SESSION_MAX; ++ ++ UNUSED_PARAM(file); ++ UNUSED_PARAM(size); ++ UNUSED_PARAM(ppos); ++ ++ gprsData[0].recvBytes = get_count(TS0710MUX_GPRS1_RECV_COUNT_IDX); ++ gprsData[0].sentBytes = get_count(TS0710MUX_GPRS1_SEND_COUNT_IDX); ++ gprsData[TS0710MUX_GPRS_SESSION_MAX - 1].recvBytes = ++ get_count(TS0710MUX_GPRS2_RECV_COUNT_IDX); ++ gprsData[TS0710MUX_GPRS_SESSION_MAX - 1].sentBytes = ++ get_count(TS0710MUX_GPRS2_SEND_COUNT_IDX); ++ ++ copy_to_user(buf, gprsData, bufLen); ++ ++ return bufLen; ++} ++ ++ssize_t file_proc_write(struct file * file, const char *buf, size_t count, ++ loff_t * ppos) ++{ ++ gprs_bytes gprsData[TS0710MUX_GPRS_SESSION_MAX]; ++ int bufLen = sizeof(gprs_bytes) * TS0710MUX_GPRS_SESSION_MAX; ++ ++ UNUSED_PARAM(file); ++ UNUSED_PARAM(count); ++ UNUSED_PARAM(ppos); ++ ++ memset(gprsData, 0, bufLen); ++ ++ copy_from_user(gprsData, buf, bufLen); ++ ++ set_count(TS0710MUX_GPRS1_RECV_COUNT_IDX, gprsData[0].recvBytes); ++ set_count(TS0710MUX_GPRS1_SEND_COUNT_IDX, gprsData[0].sentBytes); ++ set_count(TS0710MUX_GPRS2_RECV_COUNT_IDX, ++ gprsData[TS0710MUX_GPRS_SESSION_MAX - 1].recvBytes); ++ set_count(TS0710MUX_GPRS2_SEND_COUNT_IDX, ++ gprsData[TS0710MUX_GPRS_SESSION_MAX - 1].sentBytes); ++ ++ return bufLen; ++} ++ ++static void gprs_proc_init(void) ++{ ++ gprs_proc_file = ++ create_proc_entry("gprsbytes", S_IRUSR | S_IWUSR, NULL); ++ gprs_proc_file->proc_fops = &file_proc_operations; ++} ++ ++static void gprs_proc_exit(void) ++{ ++ remove_proc_entry("gprsbytes", gprs_proc_file); ++} ++ ++static int __init mux_init(void) ++{ ++ __u8 j; ++ ++ if (COMM_FOR_MUX_DRIVER == NULL) { ++ ++#ifdef USB_FOR_MUX ++ panic("please install IPC-USB first\n"); ++#else ++ panic("please install ttyS0 first\n"); ++#endif ++ ++ } ++ ++ ts0710_init(); ++ ++ for (j = 0; j < NR_MUXS; j++) { ++ mux_send_info_flags[j] = 0; ++ mux_send_info[j] = 0; ++ mux_recv_info_flags[j] = 0; ++ mux_recv_info[j] = 0; ++ } ++ mux_send_info_idx = NR_MUXS; ++ mux_recv_queue = NULL; ++ mux_recv_flags = 0; ++ ++ for (j = 0; j < TS0710MUX_COUNT_IDX_NUM; j++) { ++ mux_data_count[j] = 0; ++ mux_data_count2[j] = 0; ++ init_MUTEX(&mux_data_count_mutex[j]); ++ } ++ post_recv_count_flag = 0; ++ ++ INIT_WORK(&send_tqueue, send_worker, NULL); ++ INIT_WORK(&receive_tqueue, receive_worker, NULL); ++ INIT_WORK(&post_recv_tqueue, post_recv_worker, NULL); ++ ++ memset(&mux_driver, 0, sizeof(struct tty_driver)); ++ memset(&mux_tty, 0, sizeof(mux_tty)); ++ mux_driver.magic = TTY_DRIVER_MAGIC; ++ mux_driver.driver_name = "ts0710mux"; ++ mux_driver.name = "ts0710mux"; ++ mux_driver.major = TS0710MUX_MAJOR; ++ mux_driver.minor_start = TS0710MUX_MINOR_START; ++ mux_driver.num = NR_MUXS; ++ mux_driver.type = TTY_DRIVER_TYPE_SERIAL; ++ mux_driver.subtype = SERIAL_TYPE_NORMAL; ++ mux_driver.init_termios = tty_std_termios; ++ mux_driver.init_termios.c_iflag = 0; ++ mux_driver.init_termios.c_oflag = 0; ++ mux_driver.init_termios.c_cflag = B38400 | CS8 | CREAD; ++ mux_driver.init_termios.c_lflag = 0; ++ mux_driver.flags = TTY_DRIVER_RESET_TERMIOS | TTY_DRIVER_REAL_RAW; ++ ++ mux_driver.ttys = mux_table; ++ mux_driver.termios = mux_termios; ++ mux_driver.termios_locked = mux_termios_locked; ++// mux_driver.driver_state = mux_state; ++ mux_driver.other = NULL; ++ ++ mux_driver.open = mux_open; ++ mux_driver.close = mux_close; ++ mux_driver.write = mux_write; ++ mux_driver.write_room = mux_write_room; ++ mux_driver.flush_buffer = mux_flush_buffer; ++ mux_driver.chars_in_buffer = mux_chars_in_buffer; ++ mux_driver.throttle = mux_throttle; ++ mux_driver.unthrottle = mux_unthrottle; ++ mux_driver.ioctl = mux_ioctl; ++ mux_driver.owner = THIS_MODULE; ++ ++ if (tty_register_driver(&mux_driver)) ++ panic("Couldn't register mux driver"); ++ ++ COMM_MUX_DISPATCHER = mux_dispatcher; ++ COMM_MUX_SENDER = mux_sender; ++ ++ gprs_proc_init(); ++ ++ return 0; ++} ++ ++static void __exit mux_exit(void) ++{ ++ __u8 j; ++ ++ COMM_MUX_DISPATCHER = NULL; ++ COMM_MUX_SENDER = NULL; ++ ++ gprs_proc_exit(); ++ ++ mux_send_info_idx = NR_MUXS; ++ mux_recv_queue = NULL; ++ for (j = 0; j < NR_MUXS; j++) { ++ if ((mux_send_info_flags[j]) && (mux_send_info[j])) { ++ kfree(mux_send_info[j]); ++ } ++ mux_send_info_flags[j] = 0; ++ mux_send_info[j] = 0; ++ ++ if ((mux_recv_info_flags[j]) && (mux_recv_info[j])) { ++ free_mux_recv_struct(mux_recv_info[j]); ++ } ++ mux_recv_info_flags[j] = 0; ++ mux_recv_info[j] = 0; ++ } ++ ++ if (tty_unregister_driver(&mux_driver)) ++ panic("Couldn't unregister mux driver"); ++} ++ ++module_init(mux_init); ++module_exit(mux_exit); ++ ++MODULE_LICENSE("GPL"); ++MODULE_AUTHOR("Harald Welte <laforge@openezx.org>"); ++MODULE_DESCRIPTION("TS 07.10 Multiplexer"); +Index: linux-2.6.21/drivers/char/ts0710_mux.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-2.6.21/drivers/char/ts0710_mux.h 2007-04-26 20:09:29.000000000 +0200 +@@ -0,0 +1,103 @@ ++/* ++ * mux_macro.h ++ * ++ * Copyright (C) 2002 2005 Motorola ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. ++ * ++ * ++ * 11/18/2002 (Motorola) - Initial version ++ * ++ */ ++ ++/* ++* This header file should be included by both MUX and other applications ++* which access MUX device files. It gives the additional macro definitions ++* shared between MUX and applications. ++*/ ++ ++/* MUX DLCI(Data Link Connection Identifier) Configuration */ ++/* ++* DLCI Service ++* 0 Control Channel ++* 1 Voice Call & Network-related ++* 2 SMS MO ++* 3 SMS MT ++* 4 Phonebook & related ++* 5 MISC ++* 6 CSD/FAX ++* 7 GPRS1 ++* 8 GPRS2 ++* 9 Logger CMD ++* 10 Logger Data ++* 11 Test CMD ++* 12 AGPS ++* 13 Net Monitor ++*/ ++ ++/* Mapping between DLCI and MUX device files */ ++/* ++* File Name Minor DLCI AT Command/Data ++* /dev/mux0 0 1 AT Command ++* /dev/mux1 1 2 AT Command ++* /dev/mux2 2 3 AT Command ++* /dev/mux3 3 4 AT Command ++* /dev/mux4 4 5 AT Command ++* /dev/mux5 5 6 AT Command ++* /dev/mux6 6 7 AT Command ++* /dev/mux7 7 8 AT Command ++* /dev/mux8 8 6 Data ++* /dev/mux9 9 7 Data ++* /dev/mux10 10 8 Data ++* /dev/mux11 11 9 Data ++* /dev/mux12 12 10 Data ++* /dev/mux13 13 11 Data ++* /dev/mux14 14 12 Data ++* /dev/mux15 15 13 Data ++*/ ++ ++#define MUX_CMD_FILE_VOICE_CALL "/dev/mux0" ++#define MUX_CMD_FILE_SMS_MO "/dev/mux1" ++#define MUX_CMD_FILE_SMS_MT "/dev/mux2" ++#define MUX_CMD_FILE_PHONEBOOK "/dev/mux3" ++#define MUX_CMD_FILE_MISC "/dev/mux4" ++#define MUX_CMD_FILE_CSD "/dev/mux5" ++#define MUX_CMD_FILE_GPRS1 "/dev/mux6" ++#define MUX_CMD_FILE_GPRS2 "/dev/mux7" ++ ++#define MUX_DATA_FILE_CSD "/dev/mux8" ++#define MUX_DATA_FILE_GPRS1 "/dev/mux9" ++#define MUX_DATA_FILE_GPRS2 "/dev/mux10" ++#define MUX_DATA_FILE_LOGGER_CMD "/dev/mux11" ++#define MUX_DATA_FILE_LOGGER_DATA "/dev/mux12" ++#define MUX_DATA_FILE_TEST_CMD "/dev/mux13" ++#define MUX_DATA_FILE_AGPS "/dev/mux14" ++#define MUX_DATA_FILE_NET_MONITOR "/dev/mux15" ++ ++#define NUM_MUX_CMD_FILES 8 ++#define NUM_MUX_DATA_FILES 8 ++#define NUM_MUX_FILES ( NUM_MUX_CMD_FILES + NUM_MUX_DATA_FILES ) ++ ++/* Special ioctl() upon a MUX device file for hanging up a call */ ++#define TS0710MUX_IO_MSC_HANGUP 0x54F0 ++ ++/* Special ioctl() upon a MUX device file for MUX loopback test */ ++#define TS0710MUX_IO_TEST_CMD 0x54F1 ++ ++/* Special Error code might be return from write() to a MUX device file */ ++#define EDISCONNECTED 900 /* Logical data link is disconnected */ ++ ++/* Special Error code might be return from open() to a MUX device file */ ++#define EREJECTED 901 /* Logical data link connection request is rejected */ +Index: linux-2.6.21/drivers/char/ts0710_mux_usb.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-2.6.21/drivers/char/ts0710_mux_usb.c 2007-04-26 20:09:29.000000000 +0200 +@@ -0,0 +1,868 @@ ++/* ++ * linux/drivers/usb/ipcusb.c ++ * ++ * Implementation of a ipc driver based Intel's Bulverde USB Host ++ * Controller. ++ * ++ * Copyright (C) 2003-2005 Motorola ++ * Copyright (C) 2006 Harald Welte <laforge@openezx.org> ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA ++ * ++ * 2003-Nov-03 - (Motorola) created ++ * 2004-Feb-20 - (Motorola) Add Power Manager codes ++ * 2004-Apr-14 - (Motorola) Update Suspend/Resume codes ++ * 2004-May-10 - (Motorola) Add unlink_urbs codes and do some updates of send ++ * out urb sequence ++ * 2006-Jun-22 - (Harald Welte) port to Linux 2.6.x ++ * ++ */ ++ ++#include <linux/kernel.h> ++#include <linux/module.h> ++#include <linux/list.h> ++#include <linux/errno.h> ++#include <asm/uaccess.h> ++#include <asm/hardware.h> ++#include <asm/arch/hardware.h> ++#include <asm/arch-pxa/pxa-regs.h> ++#include <asm/arch-pxa/ezx.h> ++#include <linux/slab.h> ++#include <linux/miscdevice.h> ++#include <linux/init.h> ++#include <linux/timer.h> ++#include <linux/delay.h> ++#include <linux/sched.h> ++#include <linux/tty.h> ++#include <linux/tty_driver.h> ++#include <linux/tty_flip.h> ++#include <linux/circ_buf.h> ++#include <linux/usb.h> ++ ++#include "ts0710_mux_usb.h" ++ ++/*Macro defined for this driver*/ ++#define DRIVER_VERSION "1.0alpha1" ++#define DRIVER_AUTHOR "Motorola / Harald Welte <laforge@openezx.org>" ++#define DRIVER_DESC "USB IPC Driver (TS07.10 lowlevel)" ++#define MOTO_IPC_VID 0x22b8 ++#define MOTO_IPC_PID 0x3006 ++#define IBUF_SIZE 32 /*urb size*/ ++#define IPC_USB_XMIT_SIZE 1024 ++#define IPC_URB_SIZE 32 ++#define IPC_USB_WRITE_INIT 0 ++#define IPC_USB_WRITE_XMIT 1 ++#define IPC_USB_PROBE_READY 3 ++#define IPC_USB_PROBE_NOT_READY 4 ++#define DBG_MAX_BUF_SIZE 1024 ++#define ICL_EVENT_INTERVAL (HZ) ++#undef BVD_DEBUG ++ ++#define IS_EP_BULK(ep) ((ep).bmAttributes == USB_ENDPOINT_XFER_BULK ? 1 : 0) ++#define IS_EP_BULK_IN(ep) (IS_EP_BULK(ep) && ((ep).bEndpointAddress & USB_ENDPOINT_DIR_MASK) == USB_DIR_IN) ++#define IS_EP_BULK_OUT(ep) (IS_EP_BULK(ep) && ((ep).bEndpointAddress & USB_ENDPOINT_DIR_MASK) == USB_DIR_OUT) ++/*End defined macro*/ ++ ++/*global values defined*/ ++static struct usb_driver usb_ipc_driver; ++static struct timer_list ipcusb_timer; ++static struct timer_list suspend_timer; ++static struct timer_list wakeup_timer; ++static struct tty_struct ipcusb_tty; /* the coresponding tty struct, we just use flip buffer here. */ ++static struct tty_driver ipcusb_tty_driver; /* the coresponding tty driver, we just use write and chars in buff here*/ ++struct tty_driver *usb_for_mux_driver = NULL; ++struct tty_struct *usb_for_mux_tty = NULL; ++void (*usb_mux_dispatcher)(struct tty_struct *tty) = NULL; ++void (*usb_mux_sender)(void) = NULL; ++void (*ipcusb_ap_to_bp)(unsigned char*, int) = NULL; ++void (*ipcusb_bp_to_ap)(unsigned char*, int) = NULL; ++EXPORT_SYMBOL(usb_for_mux_driver); ++EXPORT_SYMBOL(usb_for_mux_tty); ++EXPORT_SYMBOL(usb_mux_dispatcher); ++EXPORT_SYMBOL(usb_mux_sender); ++EXPORT_SYMBOL(ipcusb_ap_to_bp); ++EXPORT_SYMBOL(ipcusb_bp_to_ap); ++static int sumbit_times = 0; ++static int callback_times = 0; ++//static unsigned long last_jiff = 0; ++extern int usbh_finished_resume; ++/*end global values defined*/ ++ ++MODULE_AUTHOR(DRIVER_AUTHOR); ++MODULE_DESCRIPTION(DRIVER_DESC); ++MODULE_LICENSE("GPL"); ++ ++#ifdef BVD_DEBUG ++#define bvd_dbg(format, arg...) printk(__FILE__ ": " format "\n" , ## arg) ++#else ++#define bvd_dbg(format, arg...) do {} while (0) ++#endif ++ ++/* USB device context */ ++typedef struct { ++ struct list_head list; ++ int size; ++ char *body; ++} buf_list_t; ++ ++struct ipc_usb_data { ++ u_int8_t write_finished_flag; ++ u_int8_t write_flag, ++ ipc_flag, ++ suspend_flag; ++ struct usb_device *ipc_dev; ++ struct urb readurb_mux, ++ writeurb_mux, ++ writeurb_dsplog; ++ char *obuf, *ibuf; ++ int writesize; /* max packet size for the ++ output bulk endpoint * ++ transfer buffers */ ++ ++ struct circ_buf xmit; /* write cric bufffer */ ++ struct list_head in_buf_list; ++ char bulk_in_ep_mux, ++ bulk_out_ep_mux, ++ bulk_in_ep_dsplog; ++ unsigned int ifnum; ++ ++ struct tasklet_struct bh, ++ bh_bp; ++ ++ spinlock_t lock; ++}; ++ ++struct ipc_usb_data *bvd_ipc; ++ ++#ifdef BVD_DEBUG ++static void bvd_dbg_hex(__u8 *buf, int len) ++{ ++ static unsigned char tbuf[DBG_MAX_BUF_SIZE]; ++ int i, c; ++ ++ if (len <= 0) ++ return; ++ ++ c = 0; ++ for (i=0; (i < len) && (c < (DBG_MAX_BUF_SIZE - 3)); i++) { ++ sprintf(&tbuf[c], "%02x ",buf[i]); ++ c += 3; ++ } ++ tbuf[c] = 0; ++ ++ printk("%s: %s\n", __FUNCTION__, tbuf); ++} ++#else ++#define bvd_dbg_hex(buf, len) ++#endif ++ ++static int unlink_urbs(struct urb *urb) ++{ ++ unsigned long flags; ++ int retval; ++ ++ spin_lock_irqsave(&bvd_ipc->lock, flags); ++ ++ retval = usb_unlink_urb(urb); ++ if (retval != -EINPROGRESS && retval != 0) ++ printk("unlink urb err, %d", retval); ++ ++ spin_unlock_irqrestore(&bvd_ipc->lock, flags); ++ return retval; ++} ++ ++static void append_to_inbuf_list(struct urb *urb) ++{ ++ buf_list_t *inbuf; ++ int count = urb->actual_length; ++ ++ inbuf = kmalloc(sizeof(buf_list_t), GFP_KERNEL); ++ if (!inbuf) { ++ printk("append_to_inbuf_list: (%d) out of memory!\n", ++ sizeof(buf_list_t)); ++ return; ++ } ++ ++ inbuf->size = count; ++ inbuf->body = kmalloc(sizeof(char)*count, GFP_KERNEL); ++ if (!inbuf->body) { ++ kfree(inbuf); ++ printk("append_to_inbuf_list: (%d) out of memory!\n", ++ sizeof(char)*count); ++ return; ++ } ++ memcpy(inbuf->body, (unsigned char*)urb->transfer_buffer, count); ++ list_add_tail(&inbuf->list, &bvd_ipc->in_buf_list); ++} ++ ++static void ipcusb_timeout(unsigned long data) ++{ ++ struct tty_struct *tty = &ipcusb_tty; ++ struct urb *urb = (struct urb *)data; ++ ++ bvd_dbg("ipcusb_timeout***"); ++ ++ while (!(list_empty(&bvd_ipc->in_buf_list))) { ++ int count; ++ buf_list_t *inbuf; ++ struct list_head *ptr = NULL; ++ ++ ptr = bvd_ipc->in_buf_list.next; ++ inbuf = list_entry (ptr, buf_list_t, list); ++ count = inbuf->size; ++ if (tty_insert_flip_string(tty, inbuf->body, count) >= count) { ++ list_del(ptr); ++ kfree(inbuf->body); ++ inbuf->body = NULL; ++ kfree(inbuf); ++ } else { ++ bvd_dbg("ipcusb_timeout: bvd_ipc->in_buf_list empty!"); ++ break; ++ } ++ } ++ ++ if (usb_mux_dispatcher) ++ usb_mux_dispatcher(tty); /**call Liu changhui's func.**/ ++ ++ if (list_empty(&bvd_ipc->in_buf_list)) { ++ urb->actual_length = 0; ++ urb->dev = bvd_ipc->ipc_dev; ++ if (usb_submit_urb(urb, GFP_ATOMIC)) ++ bvd_dbg("ipcusb_timeout: failed resubmitting read urb"); ++ bvd_dbg("ipcusb_timeout: resubmited read urb"); ++ } else { ++ ipcusb_timer.data = (unsigned long)urb; ++ mod_timer(&ipcusb_timer, jiffies+(10*HZ/1000)); ++ } ++} ++ ++static void usb_ipc_read_bulk(struct urb *urb, struct pt_regs *regs) ++{ ++ buf_list_t *inbuf; ++ int count = urb->actual_length; ++ struct tty_struct *tty = &ipcusb_tty; ++ ++ bvd_dbg("usb_ipc_read_bulk: begining!"); ++ if (urb->status) ++ printk("nonzero read bulk status received: %d\n", urb->status); ++ ++ bvd_dbg("usb_ipc_read_bulk: urb->actual_length=%d", urb->actual_length); ++ bvd_dbg("usb_ipc_read_bulk: urb->transfer_buffer:"); ++ ++ bvd_dbg_hex((unsigned char*)urb->transfer_buffer, urb->actual_length); ++ ++ if (count > 0 && ((*ipcusb_bp_to_ap) != NULL)) ++ (*ipcusb_bp_to_ap)(urb->transfer_buffer, urb->actual_length); ++ ++ if (!(list_empty(&bvd_ipc->in_buf_list))) { ++ int need_mux = 0; ++ ++ bvd_dbg("usb_ipc_read_bulk: some urbs in_buf_list"); ++ if (count > 0) { ++ bvd_ipc->suspend_flag = 1; ++ append_to_inbuf_list(urb); /* append the current received urb */ ++#if 0 ++ if(jiffies - last_jiff > ICL_EVENT_INTERVAL) ++ { ++ last_jiff = jiffies; ++ queue_apm_event(KRNL_ICL, NULL); ++ } ++#endif ++ } ++ ++ while (!(list_empty(&bvd_ipc->in_buf_list))) { ++ struct list_head* ptr = NULL; ++ ptr = bvd_ipc->in_buf_list.next; ++ inbuf = list_entry(ptr, buf_list_t, list); ++ count = inbuf->size; ++ need_mux = 1; ++ ++ tty_insert_flip_string(tty, inbuf->body, count); ++ ++ list_del(ptr); ++ kfree(inbuf->body); ++ inbuf->body = NULL; ++ kfree(inbuf); ++ } ++ ++ if (usb_mux_dispatcher && need_mux) ++ usb_mux_dispatcher(tty); /* call Liu changhui's func. */ ++ ++ if (list_empty(&bvd_ipc->in_buf_list)) { ++ urb->actual_length = 0; ++ urb->dev = bvd_ipc->ipc_dev; ++ if (usb_submit_urb(urb, GFP_ATOMIC)) ++ bvd_dbg("usb_ipc_read_bulk: " ++ "failed resubmitting read urb"); ++ bvd_dbg("usb_ipc_read_bulk: resubmited read urb"); ++ } else { ++ ipcusb_timer.data = (unsigned long)urb; ++ mod_timer(&ipcusb_timer, jiffies+(10*HZ/1000)); ++ } ++ } else if (count > 0) { ++ bvd_dbg("usb_ipc_read_bulk: no urbs in_buf_list"); ++ bvd_ipc->suspend_flag = 1; ++ ++ if (tty_insert_flip_string(tty, urb->transfer_buffer, ++ count) < count) { ++ bvd_ipc->suspend_flag = 1; ++ append_to_inbuf_list(urb); ++ ipcusb_timer.data = (unsigned long)urb; ++ mod_timer(&ipcusb_timer, jiffies+(10*HZ/1000)); ++#if 0 ++ if(jiffies - last_jiff > ICL_EVENT_INTERVAL) ++ { ++ last_jiff = jiffies; ++ queue_apm_event(KRNL_ICL, NULL); ++ } ++#endif ++ } ++ ++ if (usb_mux_dispatcher) ++ usb_mux_dispatcher(tty); /* call Liu changhui's func. */ ++ ++ urb->actual_length = 0; ++ urb->dev = bvd_ipc->ipc_dev; ++ if (usb_submit_urb(urb, GFP_ATOMIC)) ++ bvd_dbg("failed resubmitting read urb"); ++#if 0 ++ if(jiffies - last_jiff > ICL_EVENT_INTERVAL) ++ { ++ last_jiff = jiffies; ++ queue_apm_event(KRNL_ICL, NULL); ++ } ++#endif ++ bvd_dbg("usb_ipc_read_bulk: resubmited read urb"); ++ } ++ ++ bvd_dbg("usb_ipc_read_bulk: completed!!!"); ++} ++ ++static void usb_ipc_write_bulk(struct urb *urb, struct pt_regs *regs) ++{ ++ callback_times++; ++ bvd_ipc->write_finished_flag = 1; ++ ++ bvd_dbg("usb_ipc_write_bulk: begining!"); ++ //printk("%s: write_finished_flag=%d\n", __FUNCTION__, bvd_ipc->write_finished_flag); ++ ++ if (urb->status) ++ printk("nonzero write bulk status received: %d\n", urb->status); ++ ++ if (usb_mux_sender) ++ usb_mux_sender(); /**call Liu changhui's func**/ ++ ++ //printk("usb_ipc_write_bulk: mark ipcusb_softint!\n"); ++ tasklet_schedule(&bvd_ipc->bh); ++ ++ bvd_dbg("usb_ipc_write_bulk: finished!"); ++} ++ ++static void wakeup_timeout(unsigned long data) ++{ ++ GPSR(GPIO_MCU_INT_SW) = GPIO_bit(GPIO_MCU_INT_SW); ++ bvd_dbg("wakup_timeout: send GPIO_MCU_INT_SW signal!"); ++} ++ ++static void suspend_timeout(unsigned long data) ++{ ++ if (bvd_ipc->suspend_flag == 1) { ++ bvd_ipc->suspend_flag = 0; ++ mod_timer(&suspend_timer, jiffies+(5000*HZ/1000)); ++ bvd_dbg("suspend_timeout: add the suspend timer again"); ++ } else { ++ unlink_urbs(&bvd_ipc->readurb_mux); ++ UHCRHPS3 = 0x4; ++ mdelay(40); ++ bvd_dbg("suspend_timeout: send SUSPEND signal! UHCRHPS3=0x%x", ++ UHCRHPS3); ++ } ++} ++ ++static void ipcusb_xmit_data(void) ++{ ++ int c, count = IPC_URB_SIZE; ++ int result = 0; ++ int buf_flag = 0; ++ int buf_num = 0; ++ ++ //printk("%s: sumbit_times=%d, callback_times=%d\n", __FUNCTION__, sumbit_times, callback_times); ++ if (bvd_ipc->write_finished_flag == 0) ++ return; ++ ++ while (1) { ++ c = CIRC_CNT_TO_END(bvd_ipc->xmit.head, bvd_ipc->xmit.tail, ++ IPC_USB_XMIT_SIZE); ++ if (count < c) ++ c = count; ++ if (c <= 0) ++ break; ++ ++ memcpy(bvd_ipc->obuf+buf_num, ++ bvd_ipc->xmit.buf + bvd_ipc->xmit.tail, c); ++ buf_flag = 1; ++ bvd_ipc->xmit.tail = ((bvd_ipc->xmit.tail + c) ++ & (IPC_USB_XMIT_SIZE-1)); ++ count -= c; ++ buf_num += c; ++ } ++ ++ if (buf_num == 0) { ++ bvd_dbg("ipcusb_xmit_data: buf_num=%d, add suspend_timer", ++ buf_num); ++ bvd_ipc->suspend_flag = 0; ++ mod_timer(&suspend_timer, jiffies+(5000*HZ/1000)); ++ } ++ ++ bvd_dbg("ipcusb_xmit_data: buf_num=%d", buf_num); ++ bvd_dbg("ipcusb_xmit_data: bvd_ipc->obuf: "); ++ ++ bvd_dbg_hex((bvd_ipc->obuf)-buf_num, buf_num); ++ ++ if (buf_flag) { ++ bvd_ipc->writeurb_mux.transfer_buffer_length = buf_num; ++ bvd_dbg("ipcusb_xmit_data: copy data to write urb finished! "); ++ ++ if ((UHCRHPS3 & 0x4) == 0x4) { ++ static int ret; ++ int time = 0; ++ ++ /* if BP sleep, wake up BP first */ ++ pxa_gpio_mode(GPIO_IN | 41); ++ if (GPIO_is_high(41)) { ++ if (GPIO_is_high(GPIO_MCU_INT_SW)) ++ GPCR(GPIO_MCU_INT_SW) = GPIO_bit(GPIO_MCU_INT_SW); ++ else ++ GPSR(GPIO_MCU_INT_SW) = GPIO_bit(GPIO_MCU_INT_SW); ++ ++ time = jiffies; ++ while (GPIO_is_high(41) && (jiffies < (time+HZ))); ++ ++ if (GPIO_is_high(41)) { ++ printk("%s: Wakeup BP timeout! BP state is %d\n", ++ __FUNCTION__, GPIO_is_high(41)); ++ } ++ if (GPIO_is_high(GPIO_MCU_INT_SW)) ++ GPCR(GPIO_MCU_INT_SW) = GPIO_bit(GPIO_MCU_INT_SW); ++ else ++ GPSR(GPIO_MCU_INT_SW) = GPIO_bit(GPIO_MCU_INT_SW); ++ } ++ ++ /* Resume BP */ ++ UHCRHPS3 = 0x8; ++ mdelay(40); ++ bvd_dbg("ipcusb_xmit_data: Send RESUME signal! UHCRHPS3=0x%x", ++ UHCRHPS3); ++ /*send IN token*/ ++ bvd_ipc->readurb_mux.actual_length = 0; ++ bvd_ipc->readurb_mux.dev = bvd_ipc->ipc_dev; ++ if (ret = usb_submit_urb(&bvd_ipc->readurb_mux, GFP_ATOMIC)) ++ printk("ipcusb_xmit_data: usb_submit_urb(read mux bulk)" ++ "failed! status=%d\n", ret); ++ bvd_dbg("ipcusb_xmit_data: Send a IN token successfully!"); ++ } ++ ++ sumbit_times++; ++ bvd_ipc->write_finished_flag = 0; ++ //printk("%s: clear write_finished_flag:%d\n", __FUNCTION__, bvd_ipc->write_finished_flag); ++ bvd_ipc->writeurb_mux.dev = bvd_ipc->ipc_dev; ++ if (result = usb_submit_urb(&bvd_ipc->writeurb_mux, GFP_ATOMIC)) ++ warn("ipcusb_xmit_data: funky result! result=%d\n", result); ++ ++ bvd_dbg("ipcusb_xmit_data: usb_submit_urb finished! result:%d", result); ++ ++ } ++} ++ ++static void usbipc_bh_func(unsigned long param) ++{ ++ ipcusb_xmit_data(); ++} ++ ++extern void get_halted_bit(void); ++ ++static void usbipc_bh_bp_func(unsigned long param) ++{ ++ if ((UHCRHPS3 & 0x4) == 0x4) { ++ UHCRHPS3 = 0x8; ++ mdelay(40); ++ bvd_dbg("ipcusb_softint_send_readurb: Send RESUME signal! " ++ "UHCRHPS3=0x%x", UHCRHPS3); ++ } ++ if (bvd_ipc->ipc_flag == IPC_USB_PROBE_READY) { ++ get_halted_bit(); ++ ++ /*send a IN token*/ ++ bvd_ipc->readurb_mux.dev = bvd_ipc->ipc_dev; ++ if (usb_submit_urb(&bvd_ipc->readurb_mux, GFP_ATOMIC)) { ++ bvd_dbg("ipcusb_softint_send_readurb: " ++ "usb_submit_urb(read mux bulk) failed!"); ++ } ++ bvd_dbg("ipcusb_softint_send_readurb: Send a IN token successfully!"); ++ bvd_ipc->suspend_flag = 0; ++ bvd_dbg("ipcusb_softint_send_readurb: add suspend_timer"); ++ mod_timer(&suspend_timer, jiffies+(5000*HZ/1000)); ++ } ++} ++ ++static int usb_ipc_write(struct tty_struct *tty, ++ const unsigned char *buf, int count) ++{ ++ int c, ret = 0; ++ ++ bvd_dbg("usb_ipc_write: count=%d, buf: ", count); ++ bvd_dbg_hex(buf, count); ++ ++ if (count <= 0) ++ return 0; ++ ++ if (*ipcusb_ap_to_bp != NULL) ++ (*ipcusb_ap_to_bp)(buf, count); ++ ++ bvd_ipc->suspend_flag = 1; ++ ++ if ((bvd_ipc->ipc_flag == IPC_USB_PROBE_READY) && ++ (bvd_ipc->xmit.head == bvd_ipc->xmit.tail)) { ++ bvd_dbg("usb_ipc_write: set write_flag"); ++ bvd_ipc->write_flag = IPC_USB_WRITE_XMIT; ++ } ++ ++ while (1) { ++ c = CIRC_SPACE_TO_END(bvd_ipc->xmit.head, ++ bvd_ipc->xmit.tail, IPC_USB_XMIT_SIZE); ++ if (count < c) ++ c = count; ++ if (c <= 0) ++ break; ++ ++ memcpy(bvd_ipc->xmit.buf + bvd_ipc->xmit.head, buf, c); ++ bvd_ipc->xmit.head = ((bvd_ipc->xmit.head + c) ++ & (IPC_USB_XMIT_SIZE-1)); ++ buf += c; ++ count -= c; ++ ret += c; ++ } ++ bvd_dbg("usb_ipc_write: ret=%d, bvd_ipc->xmit.buf: ", ret); ++ ++ bvd_dbg_hex(bvd_ipc->xmit.buf, ret); ++ ++ if (bvd_ipc->write_flag == IPC_USB_WRITE_XMIT) { ++ bvd_ipc->write_flag = IPC_USB_WRITE_INIT; ++ bvd_dbg("usb_ipc_write: mark ipcusb_softint"); ++ tasklet_schedule(&bvd_ipc->bh); ++ } ++ ++ bvd_dbg("usb_ipc_write: ret=%d\n", ret); ++ return ret; ++} ++ ++static int usb_ipc_chars_in_buffer(struct tty_struct *tty) ++{ ++ return CIRC_CNT(bvd_ipc->xmit.head, bvd_ipc->xmit.tail, IPC_USB_XMIT_SIZE); ++} ++ ++void usb_send_readurb(void) ++{ ++ //printk("usb_send_readurb: begining!UHCRHPS3=0x%x, usbh_finished_resume=%d\n", UHCRHPS3, usbh_finished_resume); ++ ++ if (usbh_finished_resume == 0) ++ return; ++ ++ tasklet_schedule(&bvd_ipc->bh_bp); ++} ++ ++static int usb_ipc_probe(struct usb_interface *intf, ++ const struct usb_device_id *id) ++{ ++ struct usb_device *usbdev = interface_to_usbdev(intf); ++ struct usb_config_descriptor *ipccfg; ++ struct usb_interface_descriptor *interface; ++ struct usb_endpoint_descriptor *endpoint; ++ int ep_cnt, readsize, writesize; ++ char have_bulk_in_mux, have_bulk_out_mux; ++ ++ bvd_dbg("usb_ipc_probe: vendor id 0x%x, device id 0x%x", ++ usbdev->descriptor.idVendor, usbdev->descriptor.idProduct); ++ ++ if ((usbdev->descriptor.idVendor != MOTO_IPC_VID) || ++ (usbdev->descriptor.idProduct != MOTO_IPC_PID)) ++ return -ENODEV; ++ ++ /* a2590c : dsplog interface is not supported by this driver */ ++ if (intf->minor == 2) /* dsplog interface number is 2 */ ++ return -1; ++ ++ bvd_dbg("usb_ipc_probe: USB dev address:%p", usbdev); ++ bvd_dbg("usb_ipc_probe: ifnum:%u", intf->minor); ++ ++ ipccfg = &usbdev->actconfig->desc; ++ bvd_dbg("usb_ipc_prob: config%d", ipccfg->bConfigurationValue); ++ bvd_dbg("usb_ipc_prob: bNumInterfaces = %d", ipccfg->bNumInterfaces); ++ ++ /* After this point we can be a little noisy about what we are trying ++ * to configure, hehe. */ ++ if (usbdev->descriptor.bNumConfigurations != 1) { ++ info("usb_ipc_probe: Only one device configuration " ++ "is supported."); ++ return -1; ++ } ++ ++ if (usbdev->config[0].desc.bNumInterfaces != 3) { ++ info("usb_ipc_probe: Only three device interfaces are " ++ "supported."); ++ return -1; ++ } ++ ++ interface = &intf->cur_altsetting->desc; ++ endpoint = &intf->cur_altsetting->endpoint[0].desc; ++ /* Start checking for two bulk endpoints or ... FIXME: This is a future ++ * enhancement...*/ ++ bvd_dbg("usb_ipc_probe: Number of Endpoints:%d", ++ (int) interface->bNumEndpoints); ++ if (interface->bNumEndpoints != 2) { ++ info("usb_ipc_probe: Only two endpoints supported."); ++ return -1; ++ } ++ ++ ep_cnt = have_bulk_in_mux = have_bulk_out_mux = 0; ++ ++ bvd_dbg("usb_ipc_probe: endpoint[0] is:%x", ++ (&endpoint[0])->bEndpointAddress); ++ bvd_dbg("usb_ipc_probe: endpoint[1] is:%x ", ++ (&endpoint[1])->bEndpointAddress); ++ ++ while (ep_cnt < interface->bNumEndpoints) { ++ ++ if (!have_bulk_in_mux && IS_EP_BULK_IN(endpoint[ep_cnt])) { ++ bvd_dbg("usb_ipc_probe: bEndpointAddress(IN) is:%x ", ++ (&endpoint[ep_cnt])->bEndpointAddress); ++ have_bulk_in_mux = ++ (&endpoint[ep_cnt])->bEndpointAddress; ++ readsize = (&endpoint[ep_cnt])->wMaxPacketSize; ++ bvd_dbg("usb_ipc_probe: readsize=%d", readsize); ++ ep_cnt++; ++ continue; ++ } ++ ++ if (!have_bulk_out_mux && IS_EP_BULK_OUT(endpoint[ep_cnt])) { ++ bvd_dbg("usb_ipc_probe: bEndpointAddress(OUT) is:%x ", ++ (&endpoint[ep_cnt])->bEndpointAddress); ++ have_bulk_out_mux = ++ (&endpoint[ep_cnt])->bEndpointAddress; ++ writesize = (&endpoint[ep_cnt])->wMaxPacketSize; ++ bvd_dbg("usb_ipc_probe: writesize=%d", writesize); ++ ep_cnt++; ++ continue; ++ } ++ ++ info("usb_ipc_probe: Undetected endpoint ^_^ "); ++ /* Shouldn't ever get here unless we have something weird */ ++ return -1; ++ } ++ ++ /* Perform a quick check to make sure that everything worked as it ++ * should have. */ ++ ++ switch (interface->bNumEndpoints) { ++ case 2: ++ if (!have_bulk_in_mux || !have_bulk_out_mux) { ++ info("usb_ipc_probe: Two bulk endpoints required."); ++ return -1; ++ } ++ break; ++ default: ++ info("usb_ipc_probe: Endpoint determination failed ^_^ "); ++ return -1; ++ } ++ ++ /* Ok, now initialize all the relevant values */ ++ if (!(bvd_ipc->obuf = (char *)kmalloc(writesize, GFP_KERNEL))) { ++ err("usb_ipc_probe: Not enough memory for the output buffer."); ++ kfree(bvd_ipc); ++ return -1; ++ } ++ bvd_dbg("usb_ipc_probe: obuf address:%p", bvd_ipc->obuf); ++ ++ if (!(bvd_ipc->ibuf = (char *)kmalloc(readsize, GFP_KERNEL))) { ++ err("usb_ipc_probe: Not enough memory for the input buffer."); ++ kfree(bvd_ipc->obuf); ++ kfree(bvd_ipc); ++ return -1; ++ } ++ bvd_dbg("usb_ipc_probe: ibuf address:%p", bvd_ipc->ibuf); ++ ++ bvd_ipc->ipc_flag = IPC_USB_PROBE_READY; ++ bvd_ipc->write_finished_flag = 1; ++ bvd_ipc->suspend_flag = 1; ++ bvd_ipc->bulk_in_ep_mux= have_bulk_in_mux; ++ bvd_ipc->bulk_out_ep_mux= have_bulk_out_mux; ++ bvd_ipc->ipc_dev = usbdev; ++ bvd_ipc->writesize = writesize; ++ INIT_LIST_HEAD (&bvd_ipc->in_buf_list); ++ ++ bvd_ipc->bh.func = usbipc_bh_func; ++ bvd_ipc->bh.data = (unsigned long) bvd_ipc; ++ ++ bvd_ipc->bh_bp.func = usbipc_bh_bp_func; ++ bvd_ipc->bh_bp.data = (unsigned long) bvd_ipc; ++ ++ /*Build a write urb*/ ++ usb_fill_bulk_urb(&bvd_ipc->writeurb_mux, usbdev, ++ usb_sndbulkpipe(bvd_ipc->ipc_dev, ++ bvd_ipc->bulk_out_ep_mux), ++ bvd_ipc->obuf, writesize, usb_ipc_write_bulk, ++ bvd_ipc); ++ //bvd_ipc->writeurb_mux.transfer_flags |= USB_ASYNC_UNLINK; ++ ++ /*Build a read urb and send a IN token first time*/ ++ usb_fill_bulk_urb(&bvd_ipc->readurb_mux, usbdev, ++ usb_rcvbulkpipe(usbdev, bvd_ipc->bulk_in_ep_mux), ++ bvd_ipc->ibuf, readsize, usb_ipc_read_bulk, bvd_ipc); ++ //bvd_ipc->readurb_mux.transfer_flags |= USB_ASYNC_UNLINK; ++ ++ usb_driver_claim_interface(&usb_ipc_driver, intf, bvd_ipc); ++ //usb_driver_claim_interface(&usb_ipc_driver, &ipccfg->interface[1], bvd_ipc); ++ ++ // a2590c: dsplog is not supported by this driver ++ // usb_driver_claim_interface(&usb_ipc_driver, ++ // &ipccfg->interface[2], bvd_ipc); ++ /*send a IN token first time*/ ++ bvd_ipc->readurb_mux.dev = bvd_ipc->ipc_dev; ++ if (usb_submit_urb(&bvd_ipc->readurb_mux, GFP_ATOMIC)) ++ printk("usb_ipc_prob: usb_submit_urb(read mux bulk) failed!\n"); ++ ++ bvd_dbg("usb_ipc_prob: Send a IN token successfully!"); ++ ++ if (bvd_ipc->xmit.head != bvd_ipc->xmit.tail) { ++ printk("usb_ipc_probe: mark ipcusb_softint!\n"); ++ tasklet_schedule(&bvd_ipc->bh); ++ } ++ ++ printk("usb_ipc_probe: completed probe!"); ++ usb_set_intfdata(intf, &bvd_ipc); ++ return 0; ++} ++ ++static void usb_ipc_disconnect(struct usb_interface *intf) ++{ ++ //struct usb_device *usbdev = interface_to_usbdev(intf); ++ struct ipc_usb_data *bvd_ipc_disconnect = usb_get_intfdata(intf); ++ ++ printk("usb_ipc_disconnect:*** \n"); ++ ++ if ((UHCRHPS3 & 0x4) == 0) ++ usb_unlink_urb(&bvd_ipc_disconnect->readurb_mux); ++ ++ usb_unlink_urb(&bvd_ipc_disconnect->writeurb_mux); ++ ++ bvd_ipc_disconnect->ipc_flag = IPC_USB_PROBE_NOT_READY; ++ kfree(bvd_ipc_disconnect->ibuf); ++ kfree(bvd_ipc_disconnect->obuf); ++ ++ usb_driver_release_interface(&usb_ipc_driver, ++ bvd_ipc_disconnect->ipc_dev->actconfig->interface[0]); ++ usb_driver_release_interface(&usb_ipc_driver, ++ bvd_ipc_disconnect->ipc_dev->actconfig->interface[1]); ++ ++ //a2590c: dsplog interface is not supported by this driver ++ //usb_driver_release_interface(&usb_ipc_driver, &bvd_ipc_disconnect->ipc_dev->actconfig->interface[2]); ++ ++ bvd_ipc_disconnect->ipc_dev = NULL; ++ ++ usb_set_intfdata(intf, NULL); ++ ++ printk("usb_ipc_disconnect completed!\n"); ++} ++ ++static struct usb_device_id usb_ipc_id_table[] = { ++ { USB_DEVICE(MOTO_IPC_VID, MOTO_IPC_PID) }, ++ { } /* Terminating entry */ ++}; ++ ++static struct usb_driver usb_ipc_driver = { ++ .name = "usb ipc", ++ .probe = usb_ipc_probe, ++ .disconnect = usb_ipc_disconnect, ++ .id_table = usb_ipc_id_table, ++}; ++ ++static int __init usb_ipc_init(void) ++{ ++ int result; ++ ++ bvd_dbg("init usb_ipc"); ++ /* register driver at the USB subsystem */ ++ result = usb_register(&usb_ipc_driver); ++ if (result < 0) { ++ err ("usb ipc driver could not be registered"); ++ return result; ++ } ++ ++ /*init the related mux interface*/ ++ if (!(bvd_ipc = kzalloc(sizeof(struct ipc_usb_data), GFP_KERNEL))) { ++ err("usb_ipc_init: Out of memory."); ++ usb_deregister(&usb_ipc_driver); ++ return -ENOMEM; ++ } ++ bvd_dbg("usb_ipc_init: Address of bvd_ipc:%p", bvd_ipc); ++ ++ if (!(bvd_ipc->xmit.buf = kmalloc(IPC_USB_XMIT_SIZE, GFP_KERNEL))) { ++ err("usb_ipc_init: Not enough memory for the input buffer."); ++ kfree(bvd_ipc); ++ usb_deregister(&usb_ipc_driver); ++ return -ENOMEM; ++ } ++ bvd_dbg("usb_ipc_init: bvd_ipc->xmit.buf address:%p", ++ bvd_ipc->xmit.buf); ++ bvd_ipc->ipc_dev = NULL; ++ bvd_ipc->xmit.head = bvd_ipc->xmit.tail = 0; ++ bvd_ipc->write_flag = IPC_USB_WRITE_INIT; ++ ++ ipcusb_tty_driver.write = usb_ipc_write; ++ ipcusb_tty_driver.chars_in_buffer = usb_ipc_chars_in_buffer; ++ ++ usb_for_mux_driver = &ipcusb_tty_driver; ++ usb_for_mux_tty = &ipcusb_tty; ++ ++ /* init timers for ipcusb read process and usb suspend */ ++ init_timer(&ipcusb_timer); ++ ipcusb_timer.function = ipcusb_timeout; ++ ++ init_timer(&suspend_timer); ++ suspend_timer.function = suspend_timeout; ++ ++ init_timer(&wakeup_timer); ++ wakeup_timer.function = wakeup_timeout; ++ ++ info("USB Host(Bulverde) IPC driver registered."); ++ info(DRIVER_VERSION ":" DRIVER_DESC); ++ ++ return 0; ++} ++ ++static void __exit usb_ipc_exit(void) ++{ ++ bvd_dbg("cleanup bvd_ipc"); ++ ++ kfree(bvd_ipc->xmit.buf); ++ kfree(bvd_ipc); ++ usb_deregister(&usb_ipc_driver); ++ ++ info("USB Host(Bulverde) IPC driver deregistered."); ++} ++ ++module_init(usb_ipc_init); ++module_exit(usb_ipc_exit); ++EXPORT_SYMBOL(usb_send_readurb); +Index: linux-2.6.21/drivers/char/ts0710_mux_usb.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-2.6.21/drivers/char/ts0710_mux_usb.h 2007-04-26 20:09:29.000000000 +0200 +@@ -0,0 +1,29 @@ ++/* ++ * linux/drivers/usb/ipcusb.h ++ * ++ * Implementation of a ipc driver based Intel's Bulverde USB Host ++ * Controller. ++ * ++ * Copyright (C) 2003-2005 Motorola ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA ++ * ++ * 2003-Nov-18 - (Motorola) created ++ * ++ */ ++extern struct tty_driver *usb_for_mux_driver; ++extern struct tty_struct *usb_for_mux_tty; ++extern void (*usb_mux_dispatcher)(struct tty_struct *tty); ++extern void (*usb_mux_sender)(void); diff --git a/packages/linux/linux-ezx-2.6.21/mux_debug.patch b/packages/linux/linux-ezx-2.6.21/mux_debug.patch new file mode 100644 index 0000000000..58cb25a0b6 --- /dev/null +++ b/packages/linux/linux-ezx-2.6.21/mux_debug.patch @@ -0,0 +1,551 @@ +Index: linux-2.6.20.7/drivers/char/ts0710_mux.c +=================================================================== +--- linux-2.6.20.7.orig/drivers/char/ts0710_mux.c 2007-04-22 12:24:18.000000000 +0200 ++++ linux-2.6.20.7/drivers/char/ts0710_mux.c 2007-04-22 12:26:47.000000000 +0200 +@@ -85,6 +85,9 @@ + #include "ts0710.h" + #include "ts0710_mux.h" + ++#define TS0710DEBUG ++#define PRINT_OUTPUT_PRINTK ++ + #define TS0710MUX_GPRS_SESSION_MAX 2 + #define TS0710MUX_MAJOR 250 + #define TS0710MUX_MINOR_START 0 +@@ -316,7 +319,7 @@ + #ifdef TS0710DEBUG + + #ifdef PRINT_OUTPUT_PRINTK +-#define TS0710_DEBUG(fmt, arg...) printk(KERN_INFO "MUX " __FUNCTION__ ": " fmt "\n" , ## arg) ++#define TS0710_DEBUG(fmt, arg...) printk(KERN_INFO "MUX %s: " fmt "\n" , __func__, ## arg) + #else + #include "ezxlog.h" + static __u8 strDebug[256]; +@@ -530,10 +533,10 @@ + if (strncmp(p->comm, "aplogd", 6) == 0) { + sig = 1; + if (send_sig(SIGUSR2, p, 1) == 0) { +- TS0710_PRINTK ++ TS0710_DEBUG + ("MUX: success to send SIGUSR2 to aplogd!\n"); + } else { +- TS0710_PRINTK ++ TS0710_DEBUG + ("MUX: failure to send SIGUSR2 to aplogd!\n"); + } + break; +@@ -542,7 +545,7 @@ + read_unlock(&tasklist_lock); + + if (!sig) { +- TS0710_PRINTK("MUX: not found aplogd!\n"); ++ TS0710_DEBUG("MUX: not found aplogd!\n"); + } + } + #else +@@ -559,11 +562,11 @@ + buf[len + 1] = TS0710_BASIC_FLAG; + + if ((COMM_FOR_MUX_DRIVER == 0) || (COMM_FOR_MUX_TTY == 0)) { +- TS0710_PRINTK ++ TS0710_DEBUG + ("MUX basic_write: (COMM_FOR_MUX_DRIVER == 0) || (COMM_FOR_MUX_TTY == 0)\n"); + + #ifndef USB_FOR_MUX +- TS0710_PRINTK ++ TS0710_DEBUG + ("MUX basic_write: tapisrv might be down!!! (serial_for_mux_driver == 0) || (serial_for_mux_tty == 0)\n"); + TS0710_SIG2APLOGD(); + #endif +@@ -577,7 +580,7 @@ + res = COMM_FOR_MUX_DRIVER->write(COMM_FOR_MUX_TTY, buf, len + 2); + + if (res != len + 2) { +- TS0710_PRINTK("MUX basic_write: Write Error!\n"); ++ TS0710_DEBUG("MUX basic_write: Write Error!\n"); + return -1; + } + +@@ -601,7 +604,7 @@ + TS0710_DEBUG("crc_check: CRC check OK\n"); + return 0; + } else { +- TS0710_PRINTK("MUX crc_check: CRC check failed\n"); ++ TS0710_DEBUG("MUX crc_check: CRC check failed\n"); + return 1; + } + } +@@ -1266,7 +1269,7 @@ + break; + + case FCON: /*Flow control on command */ +- TS0710_PRINTK ++ TS0710_DEBUG + ("MUX Received Flow control(all channels) on command\n"); + if (mcc_short_pkt->h.type.cr == MCC_CMD) { + ts0710->dlci[0].state = CONNECTED; +@@ -1276,7 +1279,7 @@ + break; + + case FCOFF: /*Flow control off command */ +- TS0710_PRINTK ++ TS0710_DEBUG + ("MUX Received Flow control(all channels) off command\n"); + if (mcc_short_pkt->h.type.cr == MCC_CMD) { + for (j = 0; j < TS0710_MAX_CHN; j++) { +@@ -1823,7 +1826,7 @@ + TS0710_DEBUG("UIH on channel %d\n", dlci); + + if (uih_len > ts0710->dlci[dlci].mtu) { +- TS0710_PRINTK ++ TS0710_DEBUG + ("MUX Error: DLCI:%d, uih_len:%d is bigger than mtu:%d, discard data!\n", + dlci, uih_len, ts0710->dlci[dlci].mtu); + break; +@@ -1844,7 +1847,7 @@ + dlci, tty_idx); + TS0710_DEBUGSTR(uih_data_start, uih_len); + if (!(iscmdtty[tty_idx])) { +- TS0710_PRINTK ++ TS0710_DEBUG + ("MUX Error: %s: Wrong CMDTAG on DLCI:%d, /dev/mux%d\n", + __FUNCTION__, dlci, tty_idx); + } +@@ -1856,7 +1859,7 @@ + ("NON-CMDTAG on DLCI:%d, /dev/mux%d\n", + dlci, tty_idx); + if (iscmdtty[tty_idx]) { +- TS0710_PRINTK ++ TS0710_DEBUG + ("MUX Error: %s: Wrong NON-CMDTAG on DLCI:%d, /dev/mux%d\n", + __FUNCTION__, dlci, tty_idx); + } +@@ -1864,13 +1867,14 @@ + } + tty = mux_table[tty_idx]; + if ((!mux_tty[tty_idx]) || (!tty)) { +- TS0710_PRINTK ++ TS0710_DEBUG + ("MUX: No application waiting for, discard it! /dev/mux%d\n", + tty_idx); ++ TS0710_DEBUG("MUX: mux_tty[%d] = %d, tty is at %i", tty_idx, mux_tty[tty_idx], tty); + } else { /* Begin processing received data */ + if ((!mux_recv_info_flags[tty_idx]) + || (!mux_recv_info[tty_idx])) { +- TS0710_PRINTK ++ TS0710_DEBUG + ("MUX Error: No mux_recv_info, discard it! /dev/mux%d\n", + tty_idx); + break; +@@ -1878,7 +1882,7 @@ + + recv_info = mux_recv_info[tty_idx]; + if (recv_info->total > 8192) { +- TS0710_PRINTK ++ TS0710_DEBUG + ("MUX : discard data for tty_idx:%d, recv_info->total > 8192 \n", + tty_idx); + break; +@@ -1949,7 +1953,7 @@ + get_mux_recv_packet + (uih_len); + if (!recv_packet) { +- TS0710_PRINTK ++ TS0710_DEBUG + ("MUX %s: no memory\n", + __FUNCTION__); + break; +@@ -1980,7 +1984,7 @@ + } else { /* recv_info->total == 0 */ + if (uih_len > + TS0710MUX_RECV_BUF_SIZE) { +- TS0710_PRINTK ++ TS0710_DEBUG + ("MUX Error: tty_idx:%d, uih_len == %d is too big\n", + tty_idx, uih_len); + uih_len = +@@ -2120,12 +2124,12 @@ + if (ts0710->dlci[dlci].state == DISCONNECTED) { + break; + } else if (signal_pending(current)) { +- TS0710_PRINTK ++ TS0710_DEBUG + ("MUX DLCI %d Send DISC got signal!\n", + dlci); + break; + } else if ((jiffies - t) >= TS0710MUX_TIME_OUT) { +- TS0710_PRINTK ++ TS0710_DEBUG + ("MUX DLCI %d Send DISC timeout!\n", dlci); + continue; + } +@@ -2158,7 +2162,7 @@ + return 0; + } else if (ts0710->dlci[0].state == CONNECTING) { + /* Reentry */ +- TS0710_PRINTK ++ TS0710_DEBUG + ("MUX DLCI: 0, reentry to open DLCI 0, pid: %d, %s !\n", + current->pid, current->comm); + try = 11; +@@ -2179,13 +2183,13 @@ + DISCONNECTED) { + break; + } else if (signal_pending(current)) { +- TS0710_PRINTK ++ TS0710_DEBUG + ("MUX DLCI:%d Wait for connecting got signal!\n", + dlci); + retval = -EAGAIN; + break; + } else if ((jiffies - t) >= TS0710MUX_TIME_OUT) { +- TS0710_PRINTK ++ TS0710_DEBUG + ("MUX DLCI:%d Wait for connecting timeout!\n", + dlci); + continue; +@@ -2199,7 +2203,7 @@ + } + } else if ((ts0710->dlci[0].state != DISCONNECTED) + && (ts0710->dlci[0].state != REJECTED)) { +- TS0710_PRINTK("MUX DLCI:%d state is invalid!\n", dlci); ++ TS0710_DEBUG("MUX DLCI:%d state is invalid!\n", dlci); + return retval; + } else { + ts0710->initiator = 1; +@@ -2218,19 +2222,19 @@ + retval = 0; + break; + } else if (ts0710->dlci[0].state == REJECTED) { +- TS0710_PRINTK ++ TS0710_DEBUG + ("MUX DLCI:%d Send SABM got rejected!\n", + dlci); + retval = -EREJECTED; + break; + } else if (signal_pending(current)) { +- TS0710_PRINTK ++ TS0710_DEBUG + ("MUX DLCI:%d Send SABM got signal!\n", + dlci); + retval = -EAGAIN; + break; + } else if ((jiffies - t) >= TS0710MUX_TIME_OUT) { +- TS0710_PRINTK ++ TS0710_DEBUG + ("MUX DLCI:%d Send SABM timeout!\n", + dlci); + continue; +@@ -2271,13 +2275,13 @@ + DISCONNECTED) { + break; + } else if (signal_pending(current)) { +- TS0710_PRINTK ++ TS0710_DEBUG + ("MUX DLCI:%d Wait for connecting got signal!\n", + dlci); + retval = -EAGAIN; + break; + } else if ((jiffies - t) >= TS0710MUX_TIME_OUT) { +- TS0710_PRINTK ++ TS0710_DEBUG + ("MUX DLCI:%d Wait for connecting timeout!\n", + dlci); + continue; +@@ -2296,7 +2300,7 @@ + } + } else if ((ts0710->dlci[dlci].state != DISCONNECTED) + && (ts0710->dlci[dlci].state != REJECTED)) { +- TS0710_PRINTK("MUX DLCI:%d state is invalid!\n", dlci); ++ TS0710_DEBUG("MUX DLCI:%d state is invalid!\n", dlci); + return retval; + } else { + ts0710->dlci[dlci].state = NEGOTIATING; +@@ -2313,13 +2317,13 @@ + if (ts0710->dlci[dlci].state == CONNECTING) { + break; + } else if (signal_pending(current)) { +- TS0710_PRINTK ++ TS0710_DEBUG + ("MUX DLCI:%d Send pn_msg got signal!\n", + dlci); + retval = -EAGAIN; + break; + } else if ((jiffies - t) >= TS0710MUX_TIME_OUT) { +- TS0710_PRINTK ++ TS0710_DEBUG + ("MUX DLCI:%d Send pn_msg timeout!\n", + dlci); + continue; +@@ -2344,20 +2348,20 @@ + break; + } else if (ts0710->dlci[dlci].state == + REJECTED) { +- TS0710_PRINTK ++ TS0710_DEBUG + ("MUX DLCI:%d Send SABM got rejected!\n", + dlci); + retval = -EREJECTED; + break; + } else if (signal_pending(current)) { +- TS0710_PRINTK ++ TS0710_DEBUG + ("MUX DLCI:%d Send SABM got signal!\n", + dlci); + retval = -EAGAIN; + break; + } else if ((jiffies - t) >= + TS0710MUX_TIME_OUT) { +- TS0710_PRINTK ++ TS0710_DEBUG + ("MUX DLCI:%d Send SABM timeout!\n", + dlci); + continue; +@@ -2468,7 +2472,7 @@ + schedule_work(&send_tqueue); + #else + if (!tq_serial_for_mux) { +- TS0710_PRINTK("MUX Error: %s: tq_serial_for_mux == 0\n", ++ TS0710_DEBUG("MUX Error: %s: tq_serial_for_mux == 0\n", + __FUNCTION__); + return; + } +@@ -2508,7 +2512,7 @@ + if ((mux_tty[cmdtty] == 0) && (mux_tty[datatty] == 0)) { + if (dlci == 1) { + ts0710_close_channel(0); +- TS0710_PRINTK ++ TS0710_DEBUG + ("MUX mux_close: tapisrv might be down!!! Close DLCI 1\n"); + TS0710_SIG2APLOGD(); + } +@@ -2673,12 +2677,12 @@ + UNUSED_PARAM(tty); + + if ((COMM_FOR_MUX_DRIVER == 0) || (COMM_FOR_MUX_TTY == 0)) { +- TS0710_PRINTK ++ TS0710_DEBUG + ("MUX %s: (COMM_FOR_MUX_DRIVER == 0) || (COMM_FOR_MUX_TTY == 0)\n", + __FUNCTION__); + + #ifndef USB_FOR_MUX +- TS0710_PRINTK ++ TS0710_DEBUG + ("MUX %s: tapisrv might be down!!! (serial_for_mux_driver == 0) || (serial_for_mux_tty == 0)\n", + __FUNCTION__); + TS0710_SIG2APLOGD(); +@@ -2724,14 +2728,14 @@ + } else if (ts0710->dlci[dlci].state == CONNECTED) { + + if (!(mux_send_info_flags[line])) { +- TS0710_PRINTK ++ TS0710_DEBUG + ("MUX Error: mux_write: mux_send_info_flags[%d] == 0\n", + line); + return -ENODEV; + } + send_info = mux_send_info[line]; + if (!send_info) { +- TS0710_PRINTK ++ TS0710_DEBUG + ("MUX Error: mux_write: mux_send_info[%d] == 0\n", + line); + return -ENODEV; +@@ -2800,7 +2804,7 @@ + } + return c; + } else { +- TS0710_PRINTK("MUX mux_write: DLCI %d not connected\n", dlci); ++ TS0710_DEBUG("MUX mux_write: DLCI %d not connected\n", dlci); + return -EDISCONNECTED; + } + } +@@ -2940,7 +2944,7 @@ + return; + } + +- TS0710_PRINTK("MUX %s: line is:%d\n", __FUNCTION__, line); ++ TS0710_DEBUG("MUX %s: line is:%d\n", __FUNCTION__, line); + + if ((mux_send_info_flags[line]) + && (mux_send_info[line]) +@@ -2960,10 +2964,10 @@ + + /* + if( (COMM_FOR_MUX_DRIVER == 0) || (COMM_FOR_MUX_TTY == 0) ) { +- TS0710_PRINTK("MUX %s: (COMM_FOR_MUX_DRIVER == 0) || (COMM_FOR_MUX_TTY == 0)\n", __FUNCTION__); ++ TS0710_DEBUG("MUX %s: (COMM_FOR_MUX_DRIVER == 0) || (COMM_FOR_MUX_TTY == 0)\n", __FUNCTION__); + + #ifndef USB_FOR_MUX +- TS0710_PRINTK("MUX %s: tapisrv might be down!!! (serial_for_mux_driver == 0) || (serial_for_mux_tty == 0)\n", __FUNCTION__); ++ TS0710_DEBUG("MUX %s: tapisrv might be down!!! (serial_for_mux_driver == 0) || (serial_for_mux_tty == 0)\n", __FUNCTION__); + TS0710_SIG2APLOGD(); + #endif + +@@ -2989,9 +2993,9 @@ + if ((COMM_FOR_MUX_DRIVER == NULL) || (COMM_FOR_MUX_TTY == NULL)) { + + #ifdef USB_FOR_MUX +- TS0710_PRINTK("MUX: please install and open IPC-USB first\n"); ++ TS0710_DEBUG("MUX: please install and open IPC-USB first\n"); + #else +- TS0710_PRINTK("MUX: please install and open ttyS0 first\n"); ++ TS0710_DEBUG("MUX: please install and open ttyS0 first\n"); + #endif + + goto out; +@@ -3016,7 +3020,7 @@ + /* if( dlci == 1 ) { */ + /* Open server channel 0 first */ + if ((retval = ts0710_open_channel(0)) != 0) { +- TS0710_PRINTK("MUX: Can't connect server channel 0!\n"); ++ TS0710_DEBUG("MUX: Can't connect server channel 0!\n"); + ts0710_init(); + + mux_tty[line]--; +@@ -3073,7 +3077,7 @@ + datatty = dlci2tty[dlci].datatty; + if ((mux_tty[cmdtty] > 0) || (mux_tty[datatty] > 0)) { + if ((retval = ts0710_open_channel(dlci)) != 0) { +- TS0710_PRINTK("MUX: Can't connected channel %d!\n", ++ TS0710_DEBUG("MUX: Can't connected channel %d!\n", + dlci); + ts0710_reset_dlci(dlci); + +@@ -3096,6 +3100,7 @@ + retval = 0; + #endif + out: ++ TS0710_DEBUG("returning %d for open of /dev/mux%d (mux_tty[%d] = %d", retval, line, line, mux_tty[line]); + return retval; + } + +@@ -3178,12 +3183,12 @@ + + while (1) { + tbuf_free = TS0710MUX_MAX_BUF_SIZE - (tbuf_ptr - tbuf); +- TS0710_PRINTK("Reading max %i bytes from ts0710_mux_usb inbuf.\n", tbuf_free); ++ TS0710_DEBUG("Reading max %i bytes from ts0710_mux_usb inbuf.\n", tbuf_free); + tbuf_read = get_from_inbuf_list(tbuf_ptr, tbuf_free); + if (tbuf_read == 0) { + break; + } else { +- TS0710_PRINTK("Read %i bytes.\n", tbuf_read); ++ TS0710_DEBUG("Read %i bytes.\n", tbuf_read); + }; + tbuf_ptr += tbuf_read; + }; +@@ -3192,7 +3197,7 @@ + + // Should be impossible? + //if (count > (TS0710MUX_MAX_BUF_SIZE - (tbuf_ptr - tbuf))) { +- // TS0710_PRINTK ++ // TS0710_DEBUG + // ("MUX receive_worker: !!!!! Exceed buffer boundary !!!!!\n"); + // count = (TS0710MUX_MAX_BUF_SIZE - (tbuf_ptr - tbuf)); + //} +@@ -3264,7 +3269,7 @@ + TS0710_LOGSTR_FRAME(0, start_flag, + (tbuf_ptr - + start_flag)); +- TS0710_PRINTK ++ TS0710_DEBUG + ("MUX Error: %s: frame length:%d is bigger than Max total frame size:%d\n", + /*__FUNCTION__, framelen, TS0710MUX_MAX_TOTAL_FRAME_SIZE);*/ + __FUNCTION__, framelen, (TS0710MUX_MAX_TOTAL_FRAME_SIZE + SEQ_FIELD_SIZE)); /*For BP UART problem */ +@@ -3389,7 +3394,7 @@ + *(uih_data_start + + uih_len) = + 0; +- TS0710_PRINTK ++ TS0710_DEBUG + ("MUX bp log: %s\n", + uih_data_start); + } +@@ -3415,7 +3420,7 @@ + TS0710_LOGSTR_FRAME(0, start_flag, + framelen); + TS0710_DEBUGHEX(start_flag, framelen); +- TS0710_PRINTK ++ TS0710_DEBUG + ("MUX: Lost synchronization!\n"); + search = start_flag + 1; + } +@@ -3476,7 +3481,7 @@ + recv_info2 = recv_info->next; + + if (!(recv_info->total)) { +- TS0710_PRINTK ++ TS0710_DEBUG + ("MUX Error: %s: Should not get here, recv_info->total == 0 \n", + __FUNCTION__); + continue; +@@ -3486,7 +3491,7 @@ + dlci = tty2dlci[tty_idx]; + tty = mux_table[tty_idx]; + if ((!mux_tty[tty_idx]) || (!tty)) { +- TS0710_PRINTK ++ TS0710_DEBUG + ("MUX: No application waiting for, free recv_info! tty_idx:%d\n", + tty_idx); + mux_recv_info_flags[tty_idx] = 0; +@@ -3560,7 +3565,7 @@ + recv_info->total -= recv_packet->length; + free_mux_recv_packet(recv_packet); + } else { +- TS0710_PRINTK ++ TS0710_DEBUG + ("MUX Error: %s: Should not get here, recv_info->total is:%u \n", + __FUNCTION__, recv_info->total); + } +@@ -3760,7 +3765,7 @@ + int ret; + + if (idx > TS0710MUX_COUNT_MAX_IDX) { +- TS0710_PRINTK("MUX get_count: invalid idx: %d!\n", idx); ++ TS0710_DEBUG("MUX get_count: invalid idx: %d!\n", idx); + return -1; + } + +@@ -3774,11 +3779,11 @@ + static int set_count(__u8 idx, int count) + { + if (idx > TS0710MUX_COUNT_MAX_IDX) { +- TS0710_PRINTK("MUX set_count: invalid idx: %d!\n", idx); ++ TS0710_DEBUG("MUX set_count: invalid idx: %d!\n", idx); + return -1; + } + if (count < 0) { +- TS0710_PRINTK("MUX set_count: invalid count: %d!\n", count); ++ TS0710_DEBUG("MUX set_count: invalid count: %d!\n", count); + return -1; + } + +@@ -3792,11 +3797,11 @@ + static int add_count(__u8 idx, int count) + { + if (idx > TS0710MUX_COUNT_MAX_IDX) { +- TS0710_PRINTK("MUX add_count: invalid idx: %d!\n", idx); ++ TS0710_DEBUG("MUX add_count: invalid idx: %d!\n", idx); + return -1; + } + if (count <= 0) { +- TS0710_PRINTK("MUX add_count: invalid count: %d!\n", count); ++ TS0710_DEBUG("MUX add_count: invalid count: %d!\n", count); + return -1; + } + +Index: linux-2.6.20.7/drivers/char/ts0710_mux_usb.c +=================================================================== +--- linux-2.6.20.7.orig/drivers/char/ts0710_mux_usb.c 2007-04-22 12:26:47.000000000 +0200 ++++ linux-2.6.20.7/drivers/char/ts0710_mux_usb.c 2007-04-22 12:26:47.000000000 +0200 +@@ -72,7 +72,8 @@ + #define IPC_USB_PROBE_NOT_READY 4 + #define DBG_MAX_BUF_SIZE 1024 + #define ICL_EVENT_INTERVAL (HZ) +-#undef BVD_DEBUG ++ ++#define BVD_DEBUG + + #define IS_EP_BULK(ep) ((ep).bmAttributes == USB_ENDPOINT_XFER_BULK ? 1 : 0) + #define IS_EP_BULK_IN(ep) (IS_EP_BULK(ep) && ((ep).bEndpointAddress & USB_ENDPOINT_DIR_MASK) == USB_DIR_IN) diff --git a/packages/linux/linux-ezx-2.6.21/pxa27x-udc-support.2.patch b/packages/linux/linux-ezx-2.6.21/pxa27x-udc-support.2.patch new file mode 100644 index 0000000000..d35e40f046 --- /dev/null +++ b/packages/linux/linux-ezx-2.6.21/pxa27x-udc-support.2.patch @@ -0,0 +1,3037 @@ +diff --git a/drivers/usb/gadget/Kconfig b/drivers/usb/gadget/Kconfig +index 4097a86..5d3ea6e 100644 +--- a/drivers/usb/gadget/Kconfig ++++ b/drivers/usb/gadget/Kconfig +@@ -111,6 +111,24 @@ config USB_PXA2XX + default USB_GADGET + select USB_GADGET_SELECTED + ++config USB_GADGET_PXA27X ++ boolean "PXA 27x" ++ depends on ARCH_PXA && PXA27x ++ help ++ Intel's PXA 27x series XScale processors include an integrated ++ full speed USB 1.1 device controller. ++ ++ Say "y" to link the driver statically, or "m" to build a ++ dynamically linked module called "pxa2xx_udc" and force all ++ gadget drivers to also be dynamically linked. ++ ++ ++config USB_PXA27X ++ tristate ++ depends on USB_GADGET_PXA27X ++ default USB_GADGET ++ select USB_GADGET_SELECTED ++ + # if there's only one gadget driver, using only two bulk endpoints, + # don't waste memory for the other endpoints + config USB_PXA2XX_SMALL +diff --git a/drivers/usb/gadget/Makefile b/drivers/usb/gadget/Makefile +index e71e086..7e508a6 100644 +--- a/drivers/usb/gadget/Makefile ++++ b/drivers/usb/gadget/Makefile +@@ -4,6 +4,7 @@ + obj-$(CONFIG_USB_DUMMY_HCD) += dummy_hcd.o + obj-$(CONFIG_USB_NET2280) += net2280.o + obj-$(CONFIG_USB_PXA2XX) += pxa2xx_udc.o ++obj-$(CONFIG_USB_PXA27X) += pxa27x_udc.o + obj-$(CONFIG_USB_GOKU) += goku_udc.o + obj-$(CONFIG_USB_OMAP) += omap_udc.o + obj-$(CONFIG_USB_LH7A40X) += lh7a40x_udc.o +diff --git a/drivers/usb/gadget/epautoconf.c b/drivers/usb/gadget/epautoconf.c +index f28af06..e7d72ff 100644 +--- a/drivers/usb/gadget/epautoconf.c ++++ b/drivers/usb/gadget/epautoconf.c +@@ -230,7 +230,8 @@ find_ep (struct usb_gadget *gadget, const char *name) + */ + struct usb_ep * __devinit usb_ep_autoconfig ( + struct usb_gadget *gadget, +- struct usb_endpoint_descriptor *desc ++ struct usb_endpoint_descriptor *desc, ++ int config, int interface, int alt + ) + { + struct usb_ep *ep; +@@ -238,6 +239,11 @@ struct usb_ep * __devinit usb_ep_autoconfig ( + + type = desc->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK; + ++ /* If have ep_alloc() function use it! */ ++ if (gadget->ops->ep_alloc) ++ return gadget->ops->ep_alloc(gadget, desc, ++ config, interface, alt); ++ + /* First, apply chip-specific "best usage" knowledge. + * This might make a good usb_gadget_ops hook ... + */ +diff --git a/drivers/usb/gadget/ether.c b/drivers/usb/gadget/ether.c +index 04e6b85..bc6de31 100644 +--- a/drivers/usb/gadget/ether.c ++++ b/drivers/usb/gadget/ether.c +@@ -258,10 +258,6 @@ MODULE_PARM_DESC(host_addr, "Host Ethernet Address"); + #define DEV_CONFIG_CDC + #endif + +-#ifdef CONFIG_USB_GADGET_PXA27X +-#define DEV_CONFIG_CDC +-#endif +- + #ifdef CONFIG_USB_GADGET_S3C2410 + #define DEV_CONFIG_CDC + #endif +@@ -294,6 +290,10 @@ MODULE_PARM_DESC(host_addr, "Host Ethernet Address"); + #define DEV_CONFIG_SUBSET + #endif + ++#ifdef CONFIG_USB_GADGET_PXA27X ++#define DEV_CONFIG_SUBSET ++#endif ++ + #ifdef CONFIG_USB_GADGET_SA1100 + /* use non-CDC for backwards compatibility */ + #define DEV_CONFIG_SUBSET +@@ -2309,6 +2309,9 @@ eth_bind (struct usb_gadget *gadget) + * non-CDC to be compatible with ARM Linux-2.4 "usb-eth". + */ + cdc = 0; ++ } else if (gadget_is_pxa27x(gadget)) { ++ /* hardware can't write zlps */ ++ zlp = 0; + } + + gcnum = usb_gadget_controller_number (gadget); +@@ -2375,7 +2378,22 @@ eth_bind (struct usb_gadget *gadget) + + /* all we really need is bulk IN/OUT */ + usb_ep_autoconfig_reset (gadget); +- in_ep = usb_ep_autoconfig (gadget, &fs_source_desc); ++#ifdef CONFIG_USB_ETH_RNDIS ++ in_ep = usb_ep_autoconfig (gadget, &fs_source_desc, ++ DEV_RNDIS_CONFIG_VALUE, ++ (int)rndis_data_intf.bInterfaceNumber, ++ (int)rndis_data_intf.bAlternateSetting); ++#elif defined(DEV_CONFIG_CDC) ++ in_ep = usb_ep_autoconfig (gadget, &fs_source_desc, ++ DEV_CONFIG_VALUE, ++ (int)data_intf.bInterfaceNumber, ++ (int)data_intf.bAlternateSetting); ++#elif defined(DEV_CONFIG_SUBSET) ++ in_ep = usb_ep_autoconfig (gadget, &fs_source_desc, ++ DEV_CONFIG_VALUE, ++ (int)subset_data_intf.bInterfaceNumber, ++ (int)subset_data_intf.bAlternateSetting); ++#endif /* CONFIG_USB_ETH_RNDIS */ + if (!in_ep) { + autoconf_fail: + dev_err (&gadget->dev, +@@ -2385,7 +2403,22 @@ autoconf_fail: + } + in_ep->driver_data = in_ep; /* claim */ + +- out_ep = usb_ep_autoconfig (gadget, &fs_sink_desc); ++#ifdef CONFIG_USB_ETH_RNDIS ++ out_ep = usb_ep_autoconfig (gadget, &fs_sink_desc, ++ DEV_RNDIS_CONFIG_VALUE, ++ (int)rndis_data_intf.bInterfaceNumber, ++ (int)rndis_data_intf.bAlternateSetting); ++#elif defined(DEV_CONFIG_CDC) ++ out_ep = usb_ep_autoconfig (gadget, &fs_sink_desc, ++ DEV_CONFIG_VALUE, ++ (int)data_intf.bInterfaceNumber, ++ (int)data_intf.bAlternateSetting); ++#elif defined(DEV_CONFIG_SUBSET) ++ out_ep = usb_ep_autoconfig (gadget, &fs_sink_desc, ++ DEV_CONFIG_VALUE, ++ (int)subset_data_intf.bInterfaceNumber, ++ (int)subset_data_intf.bAlternateSetting); ++#endif /* CONFIG_USB_ETH_RNDIS */ + if (!out_ep) + goto autoconf_fail; + out_ep->driver_data = out_ep; /* claim */ +@@ -2395,7 +2428,17 @@ autoconf_fail: + * Since some hosts expect one, try to allocate one anyway. + */ + if (cdc || rndis) { +- status_ep = usb_ep_autoconfig (gadget, &fs_status_desc); ++#ifdef CONFIG_USB_ETH_RNDIS ++ status_ep = usb_ep_autoconfig (gadget, &fs_status_desc, ++ DEV_RNDIS_CONFIG_VALUE, ++ (int)rndis_control_intf.bInterfaceNumber, ++ (int)rndis_control_intf.bAlternateSetting); ++#elif defined(DEV_CONFIG_CDC) ++ status_ep = usb_ep_autoconfig (gadget, &fs_status_desc, ++ DEV_CONFIG_VALUE, ++ (int)control_intf.bInterfaceNumber, ++ (int)control_intf.bAlternateSetting); ++#endif /* CONFIG_USB_ETH_RNDIS */ + if (status_ep) { + status_ep->driver_data = status_ep; /* claim */ + } else if (rndis) { +@@ -2403,13 +2446,14 @@ autoconf_fail: + "can't run RNDIS on %s\n", + gadget->name); + return -ENODEV; ++ } + #ifdef DEV_CONFIG_CDC + /* pxa25x only does CDC subset; often used with RNDIS */ +- } else if (cdc) { ++ else if (cdc) { + control_intf.bNumEndpoints = 0; + /* FIXME remove endpoint from descriptor list */ +-#endif + } ++#endif + } + #endif + +diff --git a/drivers/usb/gadget/file_storage.c b/drivers/usb/gadget/file_storage.c +index c6b6479..6af5fdd 100644 +--- a/drivers/usb/gadget/file_storage.c ++++ b/drivers/usb/gadget/file_storage.c +@@ -3920,20 +3920,20 @@ static int __init fsg_bind(struct usb_gadget *gadget) + + /* Find all the endpoints we will use */ + usb_ep_autoconfig_reset(gadget); +- ep = usb_ep_autoconfig(gadget, &fs_bulk_in_desc); ++ ep = usb_ep_autoconfig(gadget, &fs_bulk_in_desc, 0, 0, 0); + if (!ep) + goto autoconf_fail; + ep->driver_data = fsg; // claim the endpoint + fsg->bulk_in = ep; + +- ep = usb_ep_autoconfig(gadget, &fs_bulk_out_desc); ++ ep = usb_ep_autoconfig(gadget, &fs_bulk_out_desc, 0, 0, 0); + if (!ep) + goto autoconf_fail; + ep->driver_data = fsg; // claim the endpoint + fsg->bulk_out = ep; + + if (transport_is_cbi()) { +- ep = usb_ep_autoconfig(gadget, &fs_intr_in_desc); ++ ep = usb_ep_autoconfig(gadget, &fs_intr_in_desc, 0, 0, 0); + if (!ep) + goto autoconf_fail; + ep->driver_data = fsg; // claim the endpoint +diff --git a/drivers/usb/gadget/gadget_chips.h b/drivers/usb/gadget/gadget_chips.h +index 2e3d662..f3b3291 100644 +--- a/drivers/usb/gadget/gadget_chips.h ++++ b/drivers/usb/gadget/gadget_chips.h +@@ -177,5 +177,7 @@ static inline int usb_gadget_controller_number(struct usb_gadget *gadget) + return 0x17; + else if (gadget_is_husb2dev(gadget)) + return 0x18; ++ else if (gadget_is_pxa27x(gadget)) ++ return 0x19; + return -ENOENT; + } +diff --git a/drivers/usb/gadget/gmidi.c b/drivers/usb/gadget/gmidi.c +index d08a8d0..d51feb2 100644 +--- a/drivers/usb/gadget/gmidi.c ++++ b/drivers/usb/gadget/gmidi.c +@@ -1204,7 +1204,7 @@ static int __devinit gmidi_bind(struct usb_gadget *gadget) + * but there may also be important quirks to address. + */ + usb_ep_autoconfig_reset(gadget); +- in_ep = usb_ep_autoconfig(gadget, &bulk_in_desc); ++ in_ep = usb_ep_autoconfig(gadget, &bulk_in_desc, 0, 0, 0); + if (!in_ep) { + autoconf_fail: + printk(KERN_ERR "%s: can't autoconfigure on %s\n", +@@ -1214,7 +1214,7 @@ autoconf_fail: + EP_IN_NAME = in_ep->name; + in_ep->driver_data = in_ep; /* claim */ + +- out_ep = usb_ep_autoconfig(gadget, &bulk_out_desc); ++ out_ep = usb_ep_autoconfig(gadget, &bulk_out_desc, 0, 0, 0); + if (!out_ep) { + goto autoconf_fail; + } +diff --git a/drivers/usb/gadget/pxa27x_udc.c b/drivers/usb/gadget/pxa27x_udc.c +new file mode 100644 +index 0000000..d89ecc5 +--- /dev/null ++++ b/drivers/usb/gadget/pxa27x_udc.c +@@ -0,0 +1,2354 @@ ++/* ++ * linux/drivers/usb/gadget/pxa27x_udc.c ++ * Intel PXA2xx and IXP4xx on-chip full speed USB device controllers ++ * ++ * Copyright (C) 2002 Intrinsyc, Inc. (Frank Becker) ++ * Copyright (C) 2003 Robert Schwebel, Pengutronix ++ * Copyright (C) 2003 Benedikt Spranger, Pengutronix ++ * Copyright (C) 2003 David Brownell ++ * Copyright (C) 2003 Joshua Wise ++ * Copyright (C) 2004 Intel Corporation ++ * Copyright (C) 2007 Rodolfo Giometti <giometti@linux.it> ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA ++ * ++ */ ++ ++#undef DEBUG ++/* #define VERBOSE DBG_VERBOSE */ ++ ++#include <linux/module.h> ++#include <linux/kernel.h> ++#include <linux/ioport.h> ++#include <linux/types.h> ++#include <linux/version.h> ++#include <linux/errno.h> ++#include <linux/delay.h> ++#include <linux/sched.h> ++#include <linux/slab.h> ++#include <linux/init.h> ++#include <linux/timer.h> ++#include <linux/list.h> ++#include <linux/interrupt.h> ++#include <linux/proc_fs.h> ++#include <linux/mm.h> ++#include <linux/device.h> ++#include <linux/dma-mapping.h> ++#include <linux/platform_device.h> ++ ++#include <asm/byteorder.h> ++#include <asm/dma.h> ++#include <asm/io.h> ++#include <asm/irq.h> ++#include <asm/system.h> ++#include <asm/mach-types.h> ++#include <asm/unaligned.h> ++#include <asm/hardware.h> ++#include <asm/arch/pxa-regs.h> ++ ++#include <linux/usb/ch9.h> ++#include <linux/usb_gadget.h> ++ ++#include <asm/arch/udc.h> ++ ++ ++/* ++ * This driver handles the USB Device Controller (UDC) in Intel's PXA 27x ++ * series processors. ++ * Such controller drivers work with a gadget driver. The gadget driver ++ * returns descriptors, implements configuration and data protocols used ++ * by the host to interact with this device, and allocates endpoints to ++ * the different protocol interfaces. The controller driver virtualizes ++ * usb hardware so that the gadget drivers will be more portable. ++ * ++ * This UDC hardware wants to implement a bit too much USB protocol, so ++ * it constrains the sorts of USB configuration change events that work. ++ * The errata for these chips are misleading; some "fixed" bugs from ++ * pxa250 a0/a1 b0/b1/b2 sure act like they're still there. ++ */ ++ ++#define DRIVER_VERSION "08-Feb-2007" ++#define DRIVER_DESC "PXA 27x USB Device Controller driver" ++ ++ ++static const char driver_name [] = "pxa27x_udc"; ++ ++static const char ep0name [] = "ep0"; ++ ++ ++#undef USE_DMA ++#undef DISABLE_TEST_MODE ++ ++#ifdef CONFIG_PROC_FS ++#define UDC_PROC_FILE ++#endif ++ ++#include "pxa27x_udc.h" ++ ++#ifdef CONFIG_EMBEDDED ++/* few strings, and little code to use them */ ++#undef DEBUG ++#undef UDC_PROC_FILE ++#endif ++ ++#ifdef USE_DMA ++static int use_dma = 1; ++module_param(use_dma, bool, 0); ++MODULE_PARM_DESC (use_dma, "true to use dma"); ++ ++static void dma_nodesc_handler (int dmach, void *_ep); ++static void kick_dma(struct pxa27x_ep *ep, struct pxa27x_request *req); ++ ++#define DMASTR " (dma support)" ++ ++#else /* !USE_DMA */ ++#define DMASTR " (pio only)" ++#endif ++ ++#ifdef CONFIG_USB_PXA27X_SMALL ++#define SIZE_STR " (small)" ++#else ++#define SIZE_STR "" ++#endif ++ ++#ifdef DISABLE_TEST_MODE ++/* (mode == 0) == no undocumented chip tweaks ++ * (mode & 1) == double buffer bulk IN ++ * (mode & 2) == double buffer bulk OUT ++ * ... so mode = 3 (or 7, 15, etc) does it for both ++ */ ++static ushort fifo_mode = 0; ++module_param(fifo_mode, ushort, 0); ++MODULE_PARM_DESC (fifo_mode, "pxa27x udc fifo mode"); ++#endif ++ ++#define UDCISR0_IR0 0x3 ++#define UDCISR_INT_MASK (UDC_INT_FIFOERROR | UDC_INT_PACKETCMP) ++#define UDCICR_INT_MASK UDCISR_INT_MASK ++ ++#define UDCCSR_MASK (UDCCSR_FST | UDCCSR_DME) ++/* --------------------------------------------------------------------------- ++ * endpoint related parts of the api to the usb controller hardware, ++ * used by gadget driver; and the inner talker-to-hardware core. ++ * --------------------------------------------------------------------------- ++ */ ++ ++static void pxa27x_ep_fifo_flush (struct usb_ep *ep); ++static void nuke (struct pxa27x_ep *, int status); ++ ++static void pio_irq_enable(int ep_num) ++{ ++ if (ep_num < 16) ++ UDCICR0 |= 3 << (ep_num * 2); ++ else { ++ ep_num -= 16; ++ UDCICR1 |= 3 << (ep_num * 2); ++ } ++} ++ ++static void pio_irq_disable(int ep_num) ++{ ++ ep_num &= 0xf; ++ if (ep_num < 16) ++ UDCICR0 &= ~(3 << (ep_num * 2)); ++ else { ++ ep_num -= 16; ++ UDCICR1 &= ~(3 << (ep_num * 2)); ++ } ++} ++ ++/* The UDCCR reg contains mask and interrupt status bits, ++ * so using '|=' isn't safe as it may ack an interrupt. ++ */ ++#define UDCCR_MASK_BITS (UDCCR_OEN | UDCCR_UDE) ++ ++static inline void udc_set_mask_UDCCR(int mask) ++{ ++ UDCCR = (UDCCR & UDCCR_MASK_BITS) | (mask & UDCCR_MASK_BITS); ++} ++ ++static inline void udc_clear_mask_UDCCR(int mask) ++{ ++ UDCCR = (UDCCR & UDCCR_MASK_BITS) & ~(mask & UDCCR_MASK_BITS); ++} ++ ++static inline void udc_ack_int_UDCCR(int mask) ++{ ++ /* udccr contains the bits we dont want to change */ ++ __u32 udccr = UDCCR & UDCCR_MASK_BITS; ++ ++ UDCCR = udccr | (mask & ~UDCCR_MASK_BITS); ++} ++ ++/* ++ * endpoint enable/disable ++ * ++ * we need to verify the descriptors used to enable endpoints. since pxa27x ++ * endpoint configurations are fixed, and are pretty much always enabled, ++ * there's not a lot to manage here. ++ * ++ * because pxa27x can't selectively initialize bulk (or interrupt) endpoints, ++ * (resetting endpoint halt and toggle), SET_INTERFACE is unusable except ++ * for a single interface (with only the default altsetting) and for gadget ++ * drivers that don't halt endpoints (not reset by set_interface). that also ++ * means that if you use ISO, you must violate the USB spec rule that all ++ * iso endpoints must be in non-default altsettings. ++ */ ++static int pxa27x_ep_enable (struct usb_ep *_ep, ++ const struct usb_endpoint_descriptor *desc) ++{ ++ struct pxa27x_ep *ep; ++ struct pxa27x_udc *dev; ++ ++ ep = container_of (_ep, struct pxa27x_ep, ep); ++ if (!_ep || !desc || _ep->name == ep0name ++ || desc->bDescriptorType != USB_DT_ENDPOINT ++ || ep->fifo_size < le16_to_cpu(desc->wMaxPacketSize)) { ++ DMSG("%s, bad ep or descriptor\n", __FUNCTION__); ++ return -EINVAL; ++ } ++ ++ /* xfer types must match, except that interrupt ~= bulk */ ++ if( ep->ep_type != USB_ENDPOINT_XFER_BULK ++ && desc->bmAttributes != USB_ENDPOINT_XFER_INT) { ++ DMSG("%s, %s type mismatch\n", __FUNCTION__, _ep->name); ++ return -EINVAL; ++ } ++ ++ /* hardware _could_ do smaller, but driver doesn't */ ++ if ((desc->bmAttributes == USB_ENDPOINT_XFER_BULK ++ && le16_to_cpu (desc->wMaxPacketSize) ++ != BULK_FIFO_SIZE) ++ || !desc->wMaxPacketSize) { ++ DMSG("%s, bad %s maxpacket\n", __FUNCTION__, _ep->name); ++ return -ERANGE; ++ } ++ ++ dev = ep->dev; ++ if (!dev->driver || dev->gadget.speed == USB_SPEED_UNKNOWN) { ++ DMSG("%s, bogus device state\n", __FUNCTION__); ++ return -ESHUTDOWN; ++ } ++ ++ ep->desc = desc; ++ ep->dma = -1; ++ ep->stopped = 0; ++ ep->pio_irqs = ep->dma_irqs = 0; ++ ep->ep.maxpacket = le16_to_cpu (desc->wMaxPacketSize); ++ ++ /* flush fifo (mostly for OUT buffers) */ ++ pxa27x_ep_fifo_flush (_ep); ++ ++ /* ... reset halt state too, if we could ... */ ++ ++#ifdef USE_DMA ++ /* for (some) bulk and ISO endpoints, try to get a DMA channel and ++ * bind it to the endpoint. otherwise use PIO. ++ */ ++ DMSG("%s: called attributes=%d\n", __FUNCTION__, ep->ep_type); ++ switch (ep->ep_type) { ++ case USB_ENDPOINT_XFER_ISOC: ++ if (le16_to_cpu(desc->wMaxPacketSize) % 32) ++ break; ++ // fall through ++ case USB_ENDPOINT_XFER_BULK: ++ if (!use_dma || !ep->reg_drcmr) ++ break; ++ ep->dma = pxa_request_dma ((char *)_ep->name, ++ (le16_to_cpu (desc->wMaxPacketSize) > 64) ++ ? DMA_PRIO_MEDIUM /* some iso */ ++ : DMA_PRIO_LOW, ++ dma_nodesc_handler, ep); ++ if (ep->dma >= 0) { ++ *ep->reg_drcmr = DRCMR_MAPVLD | ep->dma; ++ DMSG("%s using dma%d\n", _ep->name, ep->dma); ++ } ++ default: ++ break; ++ } ++#endif ++ DBG(DBG_VERBOSE, "enabled %s\n", _ep->name); ++ return 0; ++} ++ ++static int pxa27x_ep_disable (struct usb_ep *_ep) ++{ ++ struct pxa27x_ep *ep; ++ ++ ep = container_of (_ep, struct pxa27x_ep, ep); ++ if (!_ep || !ep->desc) { ++ DMSG("%s, %s not enabled\n", __FUNCTION__, ++ _ep ? ep->ep.name : NULL); ++ return -EINVAL; ++ } ++ nuke (ep, -ESHUTDOWN); ++ ++#ifdef USE_DMA ++ if (ep->dma >= 0) { ++ *ep->reg_drcmr = 0; ++ pxa_free_dma (ep->dma); ++ ep->dma = -1; ++ } ++#endif ++ ++ /* flush fifo (mostly for IN buffers) */ ++ pxa27x_ep_fifo_flush (_ep); ++ ++ ep->desc = 0; ++ ep->stopped = 1; ++ ++ DBG(DBG_VERBOSE, "%s disabled\n", _ep->name); ++ return 0; ++} ++ ++/*-------------------------------------------------------------------------*/ ++ ++/* for the pxa27x, these can just wrap kmalloc/kfree. gadget drivers ++ * must still pass correctly initialized endpoints, since other controller ++ * drivers may care about how it's currently set up (dma issues etc). ++ */ ++ ++/* ++ * pxa27x_ep_alloc_request - allocate a request data structure ++ */ ++static struct usb_request * ++pxa27x_ep_alloc_request (struct usb_ep *_ep, unsigned int gfp_flags) ++{ ++ struct pxa27x_request *req; ++ ++ req = kmalloc (sizeof *req, gfp_flags); ++ if (!req) ++ return 0; ++ ++ memset (req, 0, sizeof *req); ++ INIT_LIST_HEAD (&req->queue); ++ return &req->req; ++} ++ ++ ++/* ++ * pxa27x_ep_free_request - deallocate a request data structure ++ */ ++static void ++pxa27x_ep_free_request (struct usb_ep *_ep, struct usb_request *_req) ++{ ++ struct pxa27x_request *req; ++ ++ req = container_of(_req, struct pxa27x_request, req); ++ WARN_ON (!list_empty (&req->queue)); ++ kfree(req); ++} ++ ++ ++/* PXA cache needs flushing with DMA I/O (it's dma-incoherent), but there's ++ * no device-affinity and the heap works perfectly well for i/o buffers. ++ * It wastes much less memory than dma_alloc_coherent() would, and even ++ * prevents cacheline (32 bytes wide) sharing problems. ++ */ ++static void * ++pxa27x_ep_alloc_buffer(struct usb_ep *_ep, unsigned bytes, ++ dma_addr_t *dma, unsigned int gfp_flags) ++{ ++ char *retval; ++ ++ retval = kmalloc (bytes, gfp_flags & ~(__GFP_DMA|__GFP_HIGHMEM)); ++ if (retval) ++ *dma = virt_to_bus (retval); ++ return retval; ++} ++ ++static void ++pxa27x_ep_free_buffer(struct usb_ep *_ep, void *buf, dma_addr_t dma, ++ unsigned bytes) ++{ ++ kfree (buf); ++} ++ ++/*-------------------------------------------------------------------------*/ ++ ++/* ++ * done - retire a request; caller blocked irqs ++ */ ++static void done(struct pxa27x_ep *ep, struct pxa27x_request *req, int status) ++{ ++ list_del_init(&req->queue); ++ if (likely (req->req.status == -EINPROGRESS)) ++ req->req.status = status; ++ else ++ status = req->req.status; ++ ++ if (status && status != -ESHUTDOWN) ++ DBG(DBG_VERBOSE, "complete %s req %p stat %d len %u/%u\n", ++ ep->ep.name, &req->req, status, ++ req->req.actual, req->req.length); ++ ++ /* don't modify queue heads during completion callback */ ++ req->req.complete(&ep->ep, &req->req); ++} ++ ++ ++static inline void ep0_idle (struct pxa27x_udc *dev) ++{ ++ dev->ep0state = EP0_IDLE; ++ LED_EP0_OFF; ++} ++ ++static int ++write_packet(volatile u32 *uddr, struct pxa27x_request *req, unsigned max) ++{ ++ u32 *buf; ++ int length, count, remain; ++ ++ buf = (u32*)(req->req.buf + req->req.actual); ++ prefetch(buf); ++ ++ /* how big will this packet be? */ ++ length = min(req->req.length - req->req.actual, max); ++ req->req.actual += length; ++ ++ remain = length & 0x3; ++ count = length & ~(0x3); ++ ++ while (likely(count)) { ++ *uddr = *buf++; ++ count -= 4; ++ } ++ ++ if (remain) { ++ volatile u8* reg=(u8*)uddr; ++ char *rd =(u8*)buf; ++ ++ while (remain--) { ++ *reg=*rd++; ++ } ++ } ++ ++ return length; ++} ++ ++/* ++ * write to an IN endpoint fifo, as many packets as possible. ++ * irqs will use this to write the rest later. ++ * caller guarantees at least one packet buffer is ready (or a zlp). ++ */ ++static int ++write_fifo (struct pxa27x_ep *ep, struct pxa27x_request *req) ++{ ++ unsigned max; ++ ++ max = le16_to_cpu(ep->desc->wMaxPacketSize); ++ do { ++ int count; ++ int is_last, is_short; ++ ++ count = write_packet(ep->reg_udcdr, req, max); ++ ++ /* last packet is usually short (or a zlp) */ ++ if (unlikely (count != max)) ++ is_last = is_short = 1; ++ else { ++ if (likely(req->req.length != req->req.actual) ++ || req->req.zero) ++ is_last = 0; ++ else ++ is_last = 1; ++ /* interrupt/iso maxpacket may not fill the fifo */ ++ is_short = unlikely (max < ep->fifo_size); ++ } ++ ++ DMSG("wrote %s count:%d bytes%s%s %d left %p\n", ++ ep->ep.name, count, ++ is_last ? "/L" : "", is_short ? "/S" : "", ++ req->req.length - req->req.actual, &req->req); ++ ++ /* let loose that packet. maybe try writing another one, ++ * double buffering might work. TSP, TPC, and TFS ++ * bit values are the same for all normal IN endpoints. ++ */ ++ *ep->reg_udccsr = UDCCSR_PC; ++ if (is_short) ++ *ep->reg_udccsr = UDCCSR_SP; ++ ++ /* requests complete when all IN data is in the FIFO */ ++ if (is_last) { ++ done (ep, req, 0); ++ if (list_empty(&ep->queue) || unlikely(ep->dma >= 0)) { ++ pio_irq_disable (ep->ep_num); ++#ifdef USE_DMA ++ /* unaligned data and zlps couldn't use dma */ ++ if (unlikely(!list_empty(&ep->queue))) { ++ req = list_entry(ep->queue.next, ++ struct pxa27x_request, queue); ++ kick_dma(ep,req); ++ return 0; ++ } ++#endif ++ } ++ return 1; ++ } ++ ++ // TODO experiment: how robust can fifo mode tweaking be? ++ // double buffering is off in the default fifo mode, which ++ // prevents TFS from being set here. ++ ++ } while (*ep->reg_udccsr & UDCCSR_FS); ++ return 0; ++} ++ ++/* caller asserts req->pending (ep0 irq status nyet cleared); starts ++ * ep0 data stage. these chips want very simple state transitions. ++ */ ++static inline ++void ep0start(struct pxa27x_udc *dev, u32 flags, const char *tag) ++{ ++ UDCCSR0 = flags|UDCCSR0_SA|UDCCSR0_OPC; ++ UDCISR0 = UDCICR_INT(0, UDC_INT_FIFOERROR | UDC_INT_PACKETCMP); ++ dev->req_pending = 0; ++ DBG(DBG_VERY_NOISY, "%s %s, %02x/%02x\n", ++ __FUNCTION__, tag, UDCCSR0, flags); ++} ++ ++static int ++write_ep0_fifo (struct pxa27x_ep *ep, struct pxa27x_request *req) ++{ ++ unsigned count; ++ int is_short; ++ ++ count = write_packet(&UDCDR0, req, EP0_FIFO_SIZE); ++ ep->dev->stats.write.bytes += count; ++ ++ /* last packet "must be" short (or a zlp) */ ++ is_short = (count != EP0_FIFO_SIZE); ++ ++ DBG(DBG_VERY_NOISY, "ep0in %d bytes %d left %p\n", count, ++ req->req.length - req->req.actual, &req->req); ++ ++ if (unlikely (is_short)) { ++ if (ep->dev->req_pending) ++ ep0start(ep->dev, UDCCSR0_IPR, "short IN"); ++ else ++ UDCCSR0 = UDCCSR0_IPR; ++ ++ count = req->req.length; ++ done (ep, req, 0); ++ ep0_idle(ep->dev); ++#if 0 ++ /* This seems to get rid of lost status irqs in some cases: ++ * host responds quickly, or next request involves config ++ * change automagic, or should have been hidden, or ... ++ * ++ * FIXME get rid of all udelays possible... ++ */ ++ if (count >= EP0_FIFO_SIZE) { ++ count = 100; ++ do { ++ if ((UDCCSR0 & UDCCSR0_OPC) != 0) { ++ /* clear OPC, generate ack */ ++ UDCCSR0 = UDCCSR0_OPC; ++ break; ++ } ++ count--; ++ udelay(1); ++ } while (count); ++ } ++#endif ++ } else if (ep->dev->req_pending) ++ ep0start(ep->dev, 0, "IN"); ++ return is_short; ++} ++ ++ ++/* ++ * read_fifo - unload packet(s) from the fifo we use for usb OUT ++ * transfers and put them into the request. caller should have made ++ * sure there's at least one packet ready. ++ * ++ * returns true if the request completed because of short packet or the ++ * request buffer having filled (and maybe overran till end-of-packet). ++ */ ++static int ++read_fifo (struct pxa27x_ep *ep, struct pxa27x_request *req) ++{ ++ for (;;) { ++ u32 *buf; ++ int bufferspace, count, is_short; ++ ++ /* make sure there's a packet in the FIFO.*/ ++ if (unlikely ((*ep->reg_udccsr & UDCCSR_PC) == 0)) ++ break; ++ buf =(u32*) (req->req.buf + req->req.actual); ++ prefetchw(buf); ++ bufferspace = req->req.length - req->req.actual; ++ ++ /* read all bytes from this packet */ ++ if (likely (*ep->reg_udccsr & UDCCSR_BNE)) { ++ count = 0x3ff & *ep->reg_udcbcr; ++ req->req.actual += min (count, bufferspace); ++ } else /* zlp */ ++ count = 0; ++ ++ is_short = (count < ep->ep.maxpacket); ++ DMSG("read %s udccsr:%02x, count:%d bytes%s req %p %d/%d\n", ++ ep->ep.name, *ep->reg_udccsr, count, ++ is_short ? "/S" : "", ++ &req->req, req->req.actual, req->req.length); ++ ++// dump_regs(ep->ep_num ); ++ count = min(count, bufferspace); ++ while (likely (count > 0)) { ++ *buf++ = *ep->reg_udcdr; ++ count -= 4; ++ } ++ DMSG("Buf:0x%p\n", req->req.buf); ++ ++ *ep->reg_udccsr = UDCCSR_PC; ++ /* RPC/RSP/RNE could now reflect the other packet buffer */ ++ ++ /* completion */ ++ if (is_short || req->req.actual == req->req.length) { ++ done (ep, req, 0); ++ if (list_empty(&ep->queue)) ++ pio_irq_disable (ep->ep_num); ++ return 1; ++ } ++ ++ /* finished that packet. the next one may be waiting... */ ++ } ++ return 0; ++} ++ ++/* ++ * special ep0 version of the above. no UBCR0 or double buffering; status ++ * handshaking is magic. most device protocols don't need control-OUT. ++ * CDC vendor commands (and RNDIS), mass storage CB/CBI, and some other ++ * protocols do use them. ++ */ ++static int ++read_ep0_fifo (struct pxa27x_ep *ep, struct pxa27x_request *req) ++{ ++ u32 *buf, word; ++ unsigned bufferspace; ++ ++ buf = (u32*) (req->req.buf + req->req.actual); ++ bufferspace = req->req.length - req->req.actual; ++ ++ while (UDCCSR0 & UDCCSR0_RNE) { ++ word = UDCDR0; ++ ++ if (unlikely (bufferspace == 0)) { ++ /* this happens when the driver's buffer ++ * is smaller than what the host sent. ++ * discard the extra data. ++ */ ++ if (req->req.status != -EOVERFLOW) ++ DMSG("%s overflow\n", ep->ep.name); ++ req->req.status = -EOVERFLOW; ++ } else { ++ *buf++ = word; ++ req->req.actual += 4; ++ bufferspace -= 4; ++ } ++ } ++ ++ UDCCSR0 = UDCCSR0_OPC ; ++ ++ /* completion */ ++ if (req->req.actual >= req->req.length) ++ return 1; ++ ++ /* finished that packet. the next one may be waiting... */ ++ return 0; ++} ++ ++#ifdef USE_DMA ++ ++#define MAX_IN_DMA ((DCMD_LENGTH + 1) - BULK_FIFO_SIZE) ++static void kick_dma(struct pxa27x_ep *ep, struct pxa27x_request *req) ++{ ++ u32 dcmd = 0; ++ u32 len = req->req.length; ++ u32 buf = req->req.dma; ++ u32 fifo = io_v2p ((u32)ep->reg_udcdr); ++ ++ buf += req->req.actual; ++ len -= req->req.actual; ++ ep->dma_con = 0; ++ ++ DMSG("%s: req:0x%p length:%d, actual:%d dma:%d\n", ++ __FUNCTION__, &req->req, req->req.length, ++ req->req.actual,ep->dma); ++ ++ /* no-descriptor mode can be simple for bulk-in, iso-in, iso-out */ ++ DCSR(ep->dma) = DCSR_NODESC; ++ if (buf & 0x3) ++ DALGN |= 1 << ep->dma; ++ else ++ DALGN &= ~(1 << ep->dma); ++ ++ if (ep->dir_in) { ++ DSADR(ep->dma) = buf; ++ DTADR(ep->dma) = fifo; ++ if (len > MAX_IN_DMA) { ++ len= MAX_IN_DMA; ++ ep->dma_con =1 ; ++ } else if (len >= ep->ep.maxpacket) { ++ if ((ep->dma_con = (len % ep->ep.maxpacket) != 0)) ++ len = ep->ep.maxpacket; ++ } ++ dcmd = len | DCMD_BURST32 | DCMD_WIDTH4 | DCMD_ENDIRQEN ++ | DCMD_FLOWTRG | DCMD_INCSRCADDR; ++ } else { ++ DSADR(ep->dma) = fifo; ++ DTADR(ep->dma) = buf; ++ dcmd = len | DCMD_BURST32 | DCMD_WIDTH4 | DCMD_ENDIRQEN ++ | DCMD_FLOWSRC | DCMD_INCTRGADDR; ++ } ++ *ep->reg_udccsr = UDCCSR_DME; ++ DCMD(ep->dma) = dcmd; ++ DCSR(ep->dma) = DCSR_NODESC | DCSR_EORIRQEN \ ++ | ((ep->dir_in) ? DCSR_STOPIRQEN : 0); ++ *ep->reg_drcmr = ep->dma | DRCMR_MAPVLD; ++ DCSR(ep->dma) |= DCSR_RUN; ++} ++ ++static void cancel_dma(struct pxa27x_ep *ep) ++{ ++ struct pxa27x_request *req; ++ u32 tmp; ++ ++ if (DCSR(ep->dma) == 0 || list_empty(&ep->queue)) ++ return; ++ ++ DMSG("hehe dma:%d,dcsr:0x%x\n", ep->dma, DCSR(ep->dma)); ++ DCSR(ep->dma) = 0; ++ while ((DCSR(ep->dma) & DCSR_STOPSTATE) == 0) ++ cpu_relax(); ++ ++ req = list_entry(ep->queue.next, struct pxa27x_request, queue); ++ tmp = DCMD(ep->dma) & DCMD_LENGTH; ++ req->req.actual = req->req.length - tmp; ++ ++ /* the last tx packet may be incomplete, so flush the fifo. ++ * FIXME correct req.actual if we can ++ */ ++ *ep->reg_udccsr = UDCCSR_FEF; ++} ++ ++static void dma_nodesc_handler(int dmach, void *_ep, struct pt_regs *r) ++{ ++ struct pxa27x_ep *ep = _ep; ++ struct pxa27x_request *req, *req_next; ++ u32 dcsr, tmp, completed; ++ ++ local_irq_disable(); ++ ++ req = list_entry(ep->queue.next, struct pxa27x_request, queue); ++ ++ DMSG("%s, buf:0x%p\n",__FUNCTION__, req->req.buf); ++ ++ ep->dma_irqs++; ++ ep->dev->stats.irqs++; ++ HEX_DISPLAY(ep->dev->stats.irqs); ++ ++ completed = 0; ++ ++ dcsr = DCSR(dmach); ++ DCSR(ep->dma) &= ~DCSR_RUN; ++ ++ if (dcsr & DCSR_BUSERR) { ++ DCSR(dmach) = DCSR_BUSERR; ++ printk(KERN_ERR " Buss Error\n"); ++ req->req.status = -EIO; ++ completed = 1; ++ } else if (dcsr & DCSR_ENDINTR) { ++ DCSR(dmach) = DCSR_ENDINTR; ++ if (ep->dir_in) { ++ tmp = req->req.length - req->req.actual; ++ /* Last packet is a short one*/ ++ if ( tmp < ep->ep.maxpacket) { ++ int count = 0; ++ ++ *ep->reg_udccsr = UDCCSR_SP | \ ++ (*ep->reg_udccsr & UDCCSR_MASK); ++ /*Wait for packet out */ ++ while( (count++ < 10000) && \ ++ !(*ep->reg_udccsr & UDCCSR_FS)); ++ if (count >= 10000) ++ DMSG("Failed to send packet\n"); ++ else ++ DMSG("%s: short packet sent len:%d," ++ "length:%d,actual:%d\n", __FUNCTION__, ++ tmp, req->req.length, req->req.actual); ++ req->req.actual = req->req.length; ++ completed = 1; ++ /* There are still packets to transfer */ ++ } else if ( ep->dma_con) { ++ DMSG("%s: more packets,length:%d,actual:%d\n", ++ __FUNCTION__,req->req.length, ++ req->req.actual); ++ req->req.actual += ep->ep.maxpacket; ++ completed = 0; ++ } else { ++ DMSG("%s: no more packets,length:%d," ++ "actual:%d\n", __FUNCTION__, ++ req->req.length, req->req.actual); ++ req->req.actual = req->req.length; ++ completed = 1; ++ } ++ } else { ++ req->req.actual = req->req.length; ++ completed = 1; ++ } ++ } else if (dcsr & DCSR_EORINTR) { //Only happened in OUT DMA ++ int remain,udccsr ; ++ ++ DCSR(dmach) = DCSR_EORINTR; ++ remain = DCMD(dmach) & DCMD_LENGTH; ++ req->req.actual = req->req.length - remain; ++ ++ udccsr = *ep->reg_udccsr; ++ if (udccsr & UDCCSR_SP) { ++ *ep->reg_udccsr = UDCCSR_PC | (udccsr & UDCCSR_MASK); ++ completed = 1; ++ } ++ DMSG("%s: length:%d actual:%d\n", ++ __FUNCTION__, req->req.length, req->req.actual); ++ } else ++ DMSG("%s: Others dma:%d DCSR:0x%x DCMD:0x%x\n", ++ __FUNCTION__, dmach, DCSR(dmach), DCMD(dmach)); ++ ++ if (likely(completed)) { ++ if (req->queue.next != &ep->queue) { ++ req_next = list_entry(req->queue.next, ++ struct pxa27x_request, queue); ++ kick_dma(ep, req_next); ++ } ++ done(ep, req, 0); ++ } else { ++ kick_dma(ep, req); ++ } ++ ++ local_irq_enable(); ++} ++ ++#endif ++/*-------------------------------------------------------------------------*/ ++ ++static int ++pxa27x_ep_queue(struct usb_ep *_ep, struct usb_request *_req, unsigned int gfp_flags) ++{ ++ struct pxa27x_ep *ep; ++ struct pxa27x_request *req; ++ struct pxa27x_udc *dev; ++ unsigned long flags; ++ ++ req = container_of(_req, struct pxa27x_request, req); ++ if (unlikely (!_req || !_req->complete || !_req->buf|| ++ !list_empty(&req->queue))) { ++ DMSG("%s, bad params\n", __FUNCTION__); ++ return -EINVAL; ++ } ++ ++ ep = container_of(_ep, struct pxa27x_ep, ep); ++ if (unlikely (!_ep || (!ep->desc && ep->ep.name != ep0name))) { ++ DMSG("%s, bad ep\n", __FUNCTION__); ++ return -EINVAL; ++ } ++ ++ DMSG("%s, ep point %d is queue\n", __FUNCTION__, ep->ep_num); ++ ++ dev = ep->dev; ++ if (unlikely (!dev->driver ++ || dev->gadget.speed == USB_SPEED_UNKNOWN)) { ++ DMSG("%s, bogus device state\n", __FUNCTION__); ++ return -ESHUTDOWN; ++ } ++ ++ /* iso is always one packet per request, that's the only way ++ * we can report per-packet status. that also helps with dma. ++ */ ++ if (unlikely (ep->ep_type == USB_ENDPOINT_XFER_ISOC ++ && req->req.length > le16_to_cpu ++ (ep->desc->wMaxPacketSize))) ++ return -EMSGSIZE; ++ ++#ifdef USE_DMA ++ /* FIXME: caller may already have done the dma mapping */ ++ if (ep->dma >= 0) { ++ _req->dma = dma_map_single(dev->dev, _req->buf, _req->length, ++ (ep->dir_in) ? DMA_TO_DEVICE : DMA_FROM_DEVICE); ++ } ++#endif ++ ++ DBG(DBG_NOISY, "%s queue req %p, len %d buf %p\n", ++ _ep->name, _req, _req->length, _req->buf); ++ ++ local_irq_save(flags); ++ ++ _req->status = -EINPROGRESS; ++ _req->actual = 0; ++ ++ /* kickstart this i/o queue? */ ++ if (list_empty(&ep->queue) && !ep->stopped) { ++ if (ep->desc == 0 /* ep0 */) { ++ unsigned length = _req->length; ++ ++ switch (dev->ep0state) { ++ case EP0_IN_DATA_PHASE: ++ dev->stats.write.ops++; ++ if (write_ep0_fifo(ep, req)) ++ req = 0; ++ break; ++ ++ case EP0_OUT_DATA_PHASE: ++ dev->stats.read.ops++; ++ if (dev->req_pending) ++ ep0start(dev, UDCCSR0_IPR, "OUT"); ++ if (length == 0 || ((UDCCSR0 & UDCCSR0_RNE) != 0 ++ && read_ep0_fifo(ep, req))) { ++ ep0_idle(dev); ++ done(ep, req, 0); ++ req = 0; ++ } ++ break; ++ case EP0_NO_ACTION: ++ ep0_idle(dev); ++ req=0; ++ break; ++ default: ++ DMSG("ep0 i/o, odd state %d\n", dev->ep0state); ++ local_irq_restore (flags); ++ return -EL2HLT; ++ } ++#ifdef USE_DMA ++ /* either start dma or prime pio pump */ ++ } else if (ep->dma >= 0) { ++ kick_dma(ep, req); ++#endif ++ /* can the FIFO can satisfy the request immediately? */ ++ } else if (ep->dir_in ++ && (*ep->reg_udccsr & UDCCSR_FS) != 0 ++ && write_fifo(ep, req)) { ++ req = 0; ++ } else if ((*ep->reg_udccsr & UDCCSR_FS) != 0 ++ && read_fifo(ep, req)) { ++ req = 0; ++ } ++ DMSG("req:%p,ep->desc:%p,ep->dma:%d\n", req, ep->desc, ep->dma); ++ if (likely (req && ep->desc) && ep->dma < 0) ++ pio_irq_enable(ep->ep_num); ++ } ++ ++ /* pio or dma irq handler advances the queue. */ ++ if (likely (req != 0)) ++ list_add_tail(&req->queue, &ep->queue); ++ local_irq_restore(flags); ++ ++ return 0; ++} ++ ++ ++/* ++ * nuke - dequeue ALL requests ++ */ ++static void nuke(struct pxa27x_ep *ep, int status) ++{ ++ struct pxa27x_request *req; ++ ++ /* called with irqs blocked */ ++#ifdef USE_DMA ++ if (ep->dma >= 0 && !ep->stopped) ++ cancel_dma(ep); ++#endif ++ while (!list_empty(&ep->queue)) { ++ req = list_entry(ep->queue.next, struct pxa27x_request, queue); ++ done(ep, req, status); ++ } ++ if (ep->desc) ++ pio_irq_disable (ep->ep_num); ++} ++ ++ ++/* dequeue JUST ONE request */ ++static int pxa27x_ep_dequeue(struct usb_ep *_ep, struct usb_request *_req) ++{ ++ struct pxa27x_ep *ep; ++ struct pxa27x_request *req; ++ unsigned long flags; ++ ++ ep = container_of(_ep, struct pxa27x_ep, ep); ++ if (!_ep || ep->ep.name == ep0name) ++ return -EINVAL; ++ ++ local_irq_save(flags); ++ ++ /* make sure it's actually queued on this endpoint */ ++ list_for_each_entry (req, &ep->queue, queue) { ++ if (&req->req == _req) ++ break; ++ } ++ if (&req->req != _req) { ++ local_irq_restore(flags); ++ return -EINVAL; ++ } ++ ++#ifdef USE_DMA ++ if (ep->dma >= 0 && ep->queue.next == &req->queue && !ep->stopped) { ++ cancel_dma(ep); ++ done(ep, req, -ECONNRESET); ++ /* restart i/o */ ++ if (!list_empty(&ep->queue)) { ++ req = list_entry(ep->queue.next, ++ struct pxa27x_request, queue); ++ kick_dma(ep, req); ++ } ++ } else ++#endif ++ done(ep, req, -ECONNRESET); ++ ++ local_irq_restore(flags); ++ return 0; ++} ++ ++/*-------------------------------------------------------------------------*/ ++ ++static int pxa27x_ep_set_halt(struct usb_ep *_ep, int value) ++{ ++ struct pxa27x_ep *ep; ++ unsigned long flags; ++ ++ DMSG("%s is called\n", __FUNCTION__); ++ ep = container_of(_ep, struct pxa27x_ep, ep); ++ if (unlikely (!_ep ++ || (!ep->desc && ep->ep.name != ep0name)) ++ || ep->ep_type == USB_ENDPOINT_XFER_ISOC) { ++ DMSG("%s, bad ep\n", __FUNCTION__); ++ return -EINVAL; ++ } ++ if (value == 0) { ++ /* this path (reset toggle+halt) is needed to implement ++ * SET_INTERFACE on normal hardware. but it can't be ++ * done from software on the PXA UDC, and the hardware ++ * forgets to do it as part of SET_INTERFACE automagic. ++ */ ++ DMSG("only host can clear %s halt\n", _ep->name); ++ return -EROFS; ++ } ++ ++ local_irq_save(flags); ++ ++ if (ep->dir_in && ((*ep->reg_udccsr & UDCCSR_FS) == 0 ++ || !list_empty(&ep->queue))) { ++ local_irq_restore(flags); ++ return -EAGAIN; ++ } ++ ++ /* FST bit is the same for control, bulk in, bulk out, interrupt in */ ++ *ep->reg_udccsr = UDCCSR_FST|UDCCSR_FEF; ++ ++ /* ep0 needs special care */ ++ if (!ep->desc) { ++ start_watchdog(ep->dev); ++ ep->dev->req_pending = 0; ++ ep->dev->ep0state = EP0_STALL; ++ LED_EP0_OFF; ++ ++ /* and bulk/intr endpoints like dropping stalls too */ ++ } else { ++ unsigned i; ++ for (i = 0; i < 1000; i += 20) { ++ if (*ep->reg_udccsr & UDCCSR_SST) ++ break; ++ udelay(20); ++ } ++ } ++ local_irq_restore(flags); ++ ++ DBG(DBG_VERBOSE, "%s halt\n", _ep->name); ++ return 0; ++} ++ ++static int pxa27x_ep_fifo_status(struct usb_ep *_ep) ++{ ++ struct pxa27x_ep *ep; ++ ++ ep = container_of(_ep, struct pxa27x_ep, ep); ++ if (!_ep) { ++ DMSG("%s, bad ep\n", __FUNCTION__); ++ return -ENODEV; ++ } ++ /* pxa can't report unclaimed bytes from IN fifos */ ++ if (ep->dir_in) ++ return -EOPNOTSUPP; ++ if (ep->dev->gadget.speed == USB_SPEED_UNKNOWN ++ || (*ep->reg_udccsr & UDCCSR_FS) == 0) ++ return 0; ++ else ++ return (*ep->reg_udcbcr & 0xfff) + 1; ++} ++ ++static void pxa27x_ep_fifo_flush(struct usb_ep *_ep) ++{ ++ struct pxa27x_ep *ep; ++ ++ ep = container_of(_ep, struct pxa27x_ep, ep); ++ if (!_ep || ep->ep.name == ep0name || !list_empty(&ep->queue)) { ++ DMSG("%s, bad ep\n", __FUNCTION__); ++ return; ++ } ++ ++ /* toggle and halt bits stay unchanged */ ++ ++ /* for OUT, just read and discard the FIFO contents. */ ++ if (!ep->dir_in) { ++ while (((*ep->reg_udccsr) & UDCCSR_BNE) != 0) ++ (void) *ep->reg_udcdr; ++ return; ++ } ++ ++ /* most IN status is the same, but ISO can't stall */ ++ *ep->reg_udccsr = UDCCSR_PC|UDCCSR_FST|UDCCSR_TRN ++ | (ep->ep_type == USB_ENDPOINT_XFER_ISOC) ++ ? 0 : UDCCSR_SST; ++} ++ ++ ++static struct usb_ep_ops pxa27x_ep_ops = { ++ .enable = pxa27x_ep_enable, ++ .disable = pxa27x_ep_disable, ++ ++ .alloc_request = pxa27x_ep_alloc_request, ++ .free_request = pxa27x_ep_free_request, ++ ++ .alloc_buffer = pxa27x_ep_alloc_buffer, ++ .free_buffer = pxa27x_ep_free_buffer, ++ ++ .queue = pxa27x_ep_queue, ++ .dequeue = pxa27x_ep_dequeue, ++ ++ .set_halt = pxa27x_ep_set_halt, ++ .fifo_status = pxa27x_ep_fifo_status, ++ .fifo_flush = pxa27x_ep_fifo_flush, ++}; ++ ++ ++/* --------------------------------------------------------------------------- ++ * device-scoped parts of the api to the usb controller hardware ++ * --------------------------------------------------------------------------- ++ */ ++ ++static inline void validate_fifo_size(struct pxa27x_ep *pxa_ep, u8 bmAttributes) ++{ ++ switch (bmAttributes & USB_ENDPOINT_XFERTYPE_MASK) { ++ case USB_ENDPOINT_XFER_CONTROL: ++ pxa_ep->fifo_size = EP0_FIFO_SIZE; ++ break; ++ case USB_ENDPOINT_XFER_ISOC: ++ pxa_ep->fifo_size = ISO_FIFO_SIZE; ++ break; ++ case USB_ENDPOINT_XFER_BULK: ++ pxa_ep->fifo_size = BULK_FIFO_SIZE; ++ break; ++ case USB_ENDPOINT_XFER_INT: ++ pxa_ep->fifo_size = INT_FIFO_SIZE; ++ break; ++ default: ++ break; ++ } ++} ++ ++#define NAME_SIZE 18 ++struct usb_ep* pxa27x_ep_alloc(struct usb_gadget *gadget, struct usb_endpoint_descriptor *desc, int config, int interface, int alt) ++{ ++ u32 tmp ; ++ unsigned i; ++ char* name; ++ struct usb_ep * ep = NULL; ++ struct pxa27x_ep *pxa_ep = NULL; ++ struct pxa27x_udc *dev = the_controller; ++ ++ DMSG("pxa27x_config_ep is called\n"); ++ DMSG(" usb endpoint descriptor is:\n" ++ " bLength:%d\n" ++ " bDescriptorType:%x\n" ++ " bEndpointAddress:%x\n" ++ " bmAttributes:%x\n" ++ " wMaxPacketSize:%d\n", ++ desc->bLength, ++ desc->bDescriptorType,desc->bEndpointAddress, ++ desc->bmAttributes,desc->wMaxPacketSize); ++ ++ for (i = 1; i < UDC_EP_NUM; i++) { ++ if(!dev->ep[i].assigned) { ++ pxa_ep = &dev->ep[i]; ++ pxa_ep->assigned = 1; ++ pxa_ep->ep_num = i; ++ break; ++ } ++ } ++ if (unlikely(i == UDC_EP_NUM)) { ++ printk(KERN_ERR __FILE__ ": Failed to find a spare endpoint\n"); ++ return ep; ++ } ++ ++ ++ ep = &pxa_ep->ep; ++ ++ pxa_ep->dev = dev; ++ pxa_ep->desc = desc; ++ pxa_ep->pio_irqs = pxa_ep->dma_irqs = 0; ++ pxa_ep->dma = -1; ++ ++ if (!(desc->bEndpointAddress & 0xF)) ++ desc->bEndpointAddress |= i; ++ ++ if (!(desc->wMaxPacketSize)) { ++ validate_fifo_size(pxa_ep, desc->bmAttributes); ++ desc->wMaxPacketSize = pxa_ep->fifo_size; ++ } else ++ pxa_ep->fifo_size = desc->wMaxPacketSize; ++ ++ pxa_ep->dir_in = (desc->bEndpointAddress & USB_DIR_IN) ? 1 : 0; ++ pxa_ep->ep_type = desc->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK; ++ pxa_ep->stopped = 1; ++ pxa_ep->dma_con = 0; ++ pxa_ep->config = config; ++ pxa_ep->interface = interface; ++ pxa_ep->aisn = alt; ++ ++ pxa_ep->reg_udccsr = &UDCCSR0 + i; ++ pxa_ep->reg_udcbcr = &UDCBCR0 + i; ++ pxa_ep->reg_udcdr = &UDCDR0 + i ; ++ pxa_ep->reg_udccr = &UDCCRA - 1 + i; ++#ifdef USE_DMA ++ pxa_ep->reg_drcmr = &DRCMR24 + i; ++#endif ++ ++ DMSG("udccsr=0x%8x, udcbcr=0x%8x, udcdr=0x%8x," ++ "udccr0=0x%8x\n", ++ (unsigned)pxa_ep->reg_udccsr, ++ (unsigned)pxa_ep->reg_udcbcr, ++ (unsigned)pxa_ep->reg_udcdr, ++ (unsigned)pxa_ep->reg_udccr); ++ ++ /* Configure UDCCR */ ++ tmp = 0; ++ tmp |= (pxa_ep->config << UDCCONR_CN_S) & UDCCONR_CN; ++#if 0 ++ tmp |= (pxa_ep->interface << UDCCONR_IN_S) & UDCCONR_IN; ++ tmp |= (pxa_ep->aisn << UDCCONR_AISN_S) & UDCCONR_AISN; ++#else ++ tmp |= (0 << UDCCONR_IN_S) & UDCCONR_IN; ++ tmp |= (0 << UDCCONR_AISN_S) & UDCCONR_AISN; ++#endif ++ tmp |= (desc->bEndpointAddress << UDCCONR_EN_S) & UDCCONR_EN; ++ tmp |= (pxa_ep->ep_type << UDCCONR_ET_S) & UDCCONR_ET; ++ tmp |= (pxa_ep->dir_in) ? UDCCONR_ED : 0; ++ tmp |= (min(pxa_ep->fifo_size, (unsigned)desc->wMaxPacketSize) \ ++ << UDCCONR_MPS_S ) & UDCCONR_MPS; ++ tmp |= UDCCONR_DE | UDCCONR_EE; ++// tmp |= UDCCONR_EE; ++ ++ *pxa_ep->reg_udccr = tmp; ++ ++#ifdef USE_DMA ++ /* Only BULK use DMA */ ++ if ((pxa_ep->ep_type & USB_ENDPOINT_XFERTYPE_MASK)\ ++ == USB_ENDPOINT_XFER_BULK) ++ *pxa_ep->reg_udccsr = UDCCSR_DME; ++#endif ++ ++ DMSG("UDCCR: 0x%p is 0x%x\n", pxa_ep->reg_udccr,*pxa_ep->reg_udccr); ++ ++ /* Fill ep name*/ ++ name = kmalloc(NAME_SIZE, GFP_KERNEL); ++ if (!name) { ++ printk(KERN_ERR "%s: Error\n", __FUNCTION__); ++ return NULL; ++ } ++ ++ switch (pxa_ep->ep_type) { ++ case USB_ENDPOINT_XFER_BULK: ++ sprintf(name, "Bulk-%s-%d", (pxa_ep->dir_in ? "in":"out"), i); ++ break; ++ case USB_ENDPOINT_XFER_INT: ++ sprintf(name, "Interrupt-%s-%d", (pxa_ep->dir_in ? \ ++ "in":"out"), i); ++ break; ++ default: ++ sprintf(name, "endpoint-%s-%d", (pxa_ep->dir_in ? \ ++ "in":"out"), i); ++ break; ++ } ++ ep->name = name; ++ ++ ep->ops = &pxa27x_ep_ops; ++ ep->maxpacket = min((ushort)pxa_ep->fifo_size, desc->wMaxPacketSize); ++ ++ list_add_tail (&ep->ep_list, &gadget->ep_list); ++ return ep; ++} ++ ++static int pxa27x_udc_get_frame(struct usb_gadget *_gadget) ++{ ++ return (UDCFNR & 0x3FF); ++} ++ ++static int pxa27x_udc_wakeup(struct usb_gadget *_gadget) ++{ ++ /* host may not have enabled remote wakeup */ ++ if ((UDCCR & UDCCR_DWRE) == 0) ++ return -EHOSTUNREACH; ++ udc_set_mask_UDCCR(UDCCR_UDR); ++ return 0; ++} ++ ++static const struct usb_gadget_ops pxa27x_udc_ops = { ++ .ep_alloc = pxa27x_ep_alloc, ++ .get_frame = pxa27x_udc_get_frame, ++ .wakeup = pxa27x_udc_wakeup, ++ // current versions must always be self-powered ++}; ++ ++ ++/*-------------------------------------------------------------------------*/ ++ ++#ifdef UDC_PROC_FILE ++ ++static const char proc_node_name [] = "driver/udc"; ++ ++static int ++udc_proc_read(char *page, char **start, off_t off, int count, ++ int *eof, void *_dev) ++{ ++ char *buf = page; ++ struct pxa27x_udc *dev = _dev; ++ char *next = buf; ++ unsigned size = count; ++ unsigned long flags; ++ int i, t; ++ u32 tmp; ++ ++ if (off != 0) ++ return 0; ++ ++ local_irq_save(flags); ++ ++ /* basic device status */ ++ t = scnprintf(next, size, DRIVER_DESC "\n" ++ "%s version: %s\nGadget driver: %s\n", ++ driver_name, DRIVER_VERSION SIZE_STR DMASTR, ++ dev->driver ? dev->driver->driver.name : "(none)"); ++ size -= t; ++ next += t; ++ ++ /* registers for device and ep0 */ ++ t = scnprintf(next, size, ++ "uicr %02X.%02X, usir %02X.%02x, ufnr %02X\n", ++ UDCICR1, UDCICR0, UDCISR1, UDCISR0, UDCFNR); ++ size -= t; ++ next += t; ++ ++ tmp = UDCCR; ++ t = scnprintf(next, size,"udccr %02X =%s%s%s%s%s%s%s%s%s%s, con=%d,inter=%d,altinter=%d\n", tmp, ++ (tmp & UDCCR_OEN) ? " oen":"", ++ (tmp & UDCCR_AALTHNP) ? " aalthnp":"", ++ (tmp & UDCCR_AHNP) ? " rem" : "", ++ (tmp & UDCCR_BHNP) ? " rstir" : "", ++ (tmp & UDCCR_DWRE) ? " dwre" : "", ++ (tmp & UDCCR_SMAC) ? " smac" : "", ++ (tmp & UDCCR_EMCE) ? " emce" : "", ++ (tmp & UDCCR_UDR) ? " udr" : "", ++ (tmp & UDCCR_UDA) ? " uda" : "", ++ (tmp & UDCCR_UDE) ? " ude" : "", ++ (tmp & UDCCR_ACN) >> UDCCR_ACN_S, ++ (tmp & UDCCR_AIN) >> UDCCR_AIN_S, ++ (tmp & UDCCR_AAISN)>> UDCCR_AAISN_S ); ++ ++ size -= t; ++ next += t; ++ ++ tmp = UDCCSR0; ++ t = scnprintf(next, size, ++ "udccsr0 %02X =%s%s%s%s%s%s%s\n", tmp, ++ (tmp & UDCCSR0_SA) ? " sa" : "", ++ (tmp & UDCCSR0_RNE) ? " rne" : "", ++ (tmp & UDCCSR0_FST) ? " fst" : "", ++ (tmp & UDCCSR0_SST) ? " sst" : "", ++ (tmp & UDCCSR0_DME) ? " dme" : "", ++ (tmp & UDCCSR0_IPR) ? " ipr" : "", ++ (tmp & UDCCSR0_OPC) ? " opc" : ""); ++ size -= t; ++ next += t; ++ ++ if (!dev->driver) ++ goto done; ++ ++ t = scnprintf(next, size, "ep0 IN %lu/%lu, OUT %lu/%lu\nirqs %lu\n\n", ++ dev->stats.write.bytes, dev->stats.write.ops, ++ dev->stats.read.bytes, dev->stats.read.ops, ++ dev->stats.irqs); ++ size -= t; ++ next += t; ++ ++ /* dump endpoint queues */ ++ for (i = 0; i < UDC_EP_NUM; i++) { ++ struct pxa27x_ep *ep = &dev->ep [i]; ++ struct pxa27x_request *req; ++ int t; ++ ++ if (i != 0) { ++ const struct usb_endpoint_descriptor *d; ++ ++ d = ep->desc; ++ if (!d) ++ continue; ++ tmp = *dev->ep [i].reg_udccsr; ++ t = scnprintf(next, size, ++ "%s max %d %s udccs %02x udccr:0x%x\n", ++ ep->ep.name, le16_to_cpu (d->wMaxPacketSize), ++ (ep->dma >= 0) ? "dma" : "pio", tmp, ++ *dev->ep[i].reg_udccr); ++ /* TODO translate all five groups of udccs bits! */ ++ ++ } else /* ep0 should only have one transfer queued */ ++ t = scnprintf(next, size, "ep0 max 16 pio irqs %lu\n", ++ ep->pio_irqs); ++ if (t <= 0 || t > size) ++ goto done; ++ size -= t; ++ next += t; ++ ++ if (list_empty(&ep->queue)) { ++ t = scnprintf(next, size, "\t(nothing queued)\n"); ++ if (t <= 0 || t > size) ++ goto done; ++ size -= t; ++ next += t; ++ continue; ++ } ++ list_for_each_entry(req, &ep->queue, queue) { ++#ifdef USE_DMA ++ if (ep->dma >= 0 && req->queue.prev == &ep->queue) ++ t = scnprintf(next, size, ++ "\treq %p len %d/%d " ++ "buf %p (dma%d dcmd %08x)\n", ++ &req->req, req->req.actual, ++ req->req.length, req->req.buf, ++ ep->dma, DCMD(ep->dma) ++ // low 13 bits == bytes-to-go ++ ); ++ else ++#endif ++ t = scnprintf(next, size, ++ "\treq %p len %d/%d buf %p\n", ++ &req->req, req->req.actual, ++ req->req.length, req->req.buf); ++ if (t <= 0 || t > size) ++ goto done; ++ size -= t; ++ next += t; ++ } ++ } ++ ++done: ++ local_irq_restore(flags); ++ *eof = 1; ++ return count - size; ++} ++ ++#define create_proc_files() \ ++ create_proc_read_entry(proc_node_name, 0, NULL, udc_proc_read, dev) ++#define remove_proc_files() \ ++ remove_proc_entry(proc_node_name, NULL) ++ ++#else /* !UDC_PROC_FILE */ ++#define create_proc_files() do {} while (0) ++#define remove_proc_files() do {} while (0) ++ ++#endif /* UDC_PROC_FILE */ ++ ++/* "function" sysfs attribute */ ++static ssize_t ++show_function (struct device *_dev, struct device_attribute *attr, char *buf) ++{ ++ struct pxa27x_udc *dev = dev_get_drvdata (_dev); ++ ++ if (!dev->driver ++ || !dev->driver->function ++ || strlen (dev->driver->function) > PAGE_SIZE) ++ return 0; ++ return scnprintf (buf, PAGE_SIZE, "%s\n", dev->driver->function); ++} ++static DEVICE_ATTR (function, S_IRUGO, show_function, NULL); ++ ++/*-------------------------------------------------------------------------*/ ++ ++/* ++ * udc_disable - disable USB device controller ++ */ ++static void udc_disable(struct pxa27x_udc *dev) ++{ ++ UDCICR0 = UDCICR1 = 0x00000000; ++ ++ udc_clear_mask_UDCCR(UDCCR_UDE); ++ ++ /* Disable clock for USB device */ ++ pxa_set_cken(CKEN11_USB, 0); ++ ++ ep0_idle (dev); ++ dev->gadget.speed = USB_SPEED_UNKNOWN; ++ ++ if (dev->mach->gpio_pullup) ++ GPCR(dev->mach->gpio_pullup) = GPIO_bit(dev->mach->gpio_pullup); ++ if (dev->mach->udc_command) ++ dev->mach->udc_command(PXA2XX_UDC_CMD_DISCONNECT); ++ ++ make_usb_disappear(); ++} ++ ++ ++/* ++ * udc_reinit - initialize software state ++ */ ++static void udc_reinit(struct pxa27x_udc *dev) ++{ ++ u32 i; ++ ++ dev->ep0state = EP0_IDLE; ++ ++ /* basic endpoint records init */ ++ for (i = 0; i < UDC_EP_NUM; i++) { ++ struct pxa27x_ep *ep = &dev->ep[i]; ++ ++ ep->stopped = 0; ++ ep->pio_irqs = ep->dma_irqs = 0; ++ } ++ dev->configuration = 0; ++ dev->interface = 0; ++ dev->alternate = 0; ++ /* the rest was statically initialized, and is read-only */ ++} ++ ++/* until it's enabled, this UDC should be completely invisible ++ * to any USB host. ++ */ ++static void udc_enable (struct pxa27x_udc *dev) ++{ ++ udc_clear_mask_UDCCR(UDCCR_UDE); ++ ++ /* Enable clock for USB device */ ++ pxa_set_cken(CKEN11_USB, 1); ++ ++ UDCICR0 = UDCICR1 = 0; ++ ++ ep0_idle(dev); ++ dev->gadget.speed = USB_SPEED_FULL; ++ dev->stats.irqs = 0; ++ ++ udc_set_mask_UDCCR(UDCCR_UDE); ++ udelay (2); ++ if (UDCCR & UDCCR_EMCE) ++ { ++ printk(KERN_ERR ": There are error in configuration, udc disabled\n"); ++ } ++ ++ /* caller must be able to sleep in order to cope ++ * with startup transients. ++ */ ++ msleep(100); ++ ++ /* enable suspend/resume and reset irqs */ ++ UDCICR1 = UDCICR1_IECC | UDCICR1_IERU | UDCICR1_IESU | UDCICR1_IERS; ++ ++ /* enable ep0 irqs */ ++ UDCICR0 = UDCICR_INT(0,UDCICR_INT_MASK); ++#if 0 ++ for(i=1; i < UDC_EP_NUM; i++) { ++ if (dev->ep[i].assigned) ++ pio_irq_enable(i); ++ } ++#endif ++ ++ if (dev->mach->gpio_pullup) ++ GPSR(dev->mach->gpio_pullup) = GPIO_bit(dev->mach->gpio_pullup); ++ if (dev->mach->udc_command) ++ dev->mach->udc_command(PXA2XX_UDC_CMD_CONNECT); ++ ++ /* FIXME */ ++ let_usb_appear(); ++} ++ ++ ++/* when a driver is successfully registered, it will receive ++ * control requests including set_configuration(), which enables ++ * non-control requests. then usb traffic follows until a ++ * disconnect is reported. then a host may connect again, or ++ * the driver might get unbound. ++ */ ++int usb_gadget_register_driver(struct usb_gadget_driver *driver) ++{ ++ struct pxa27x_udc *dev = the_controller; ++ int retval; ++ ++ DMSG("dev=0x%x, driver=0x%x, speed=%d, " ++ "bind=0x%x, unbind=0x%x, disconnect=0x%x, setup=0x%x\n", ++ (unsigned)dev, (unsigned)driver, driver->speed, ++ (unsigned)driver->bind, (unsigned)driver->unbind, ++ (unsigned)driver->disconnect, (unsigned)driver->setup); ++ ++ if (!driver || driver->speed != USB_SPEED_FULL ++ || !driver->bind ++ || !driver->unbind ++ || !driver->disconnect ++ || !driver->setup) ++ return -EINVAL; ++ if (!dev) ++ return -ENODEV; ++ if (dev->driver) ++ return -EBUSY; ++ ++ /* first hook up the driver ... */ ++ dev->driver = driver; ++ dev->gadget.dev.driver = &driver->driver; ++ ++ device_add(&dev->gadget.dev); ++ retval = driver->bind(&dev->gadget); ++ if (retval) { ++ DMSG("bind to driver %s --> error %d\n", ++ driver->driver.name, retval); ++ device_del (&dev->gadget.dev); ++ ++ dev->driver = 0; ++ dev->gadget.dev.driver = 0; ++ return retval; ++ } ++ device_create_file(dev->dev, &dev_attr_function); ++ ++ /* ... then enable host detection and ep0; and we're ready ++ * for set_configuration as well as eventual disconnect. ++ * NOTE: this shouldn't power up until later. ++ */ ++ DMSG("registered gadget driver '%s'\n", driver->driver.name); ++ udc_enable(dev); ++ dump_state(dev); ++ return 0; ++} ++EXPORT_SYMBOL(usb_gadget_register_driver); ++ ++static void ++stop_activity(struct pxa27x_udc *dev, struct usb_gadget_driver *driver) ++{ ++ int i; ++ ++ DMSG("Trace path 1\n"); ++ /* don't disconnect drivers more than once */ ++ if (dev->gadget.speed == USB_SPEED_UNKNOWN) ++ driver = 0; ++ dev->gadget.speed = USB_SPEED_UNKNOWN; ++ ++ /* prevent new request submissions, kill any outstanding requests */ ++ for (i = 0; i < UDC_EP_NUM; i++) { ++ struct pxa27x_ep *ep = &dev->ep[i]; ++ ++ ep->stopped = 1; ++ nuke(ep, -ESHUTDOWN); ++ } ++ del_timer_sync(&dev->timer); ++ ++ /* report disconnect; the driver is already quiesced */ ++ if (driver) ++ driver->disconnect(&dev->gadget); ++ ++ /* re-init driver-visible data structures */ ++ udc_reinit(dev); ++} ++ ++int usb_gadget_unregister_driver(struct usb_gadget_driver *driver) ++{ ++ struct pxa27x_udc *dev = the_controller; ++ ++ if (!dev) ++ return -ENODEV; ++ if (!driver || driver != dev->driver) ++ return -EINVAL; ++ ++ local_irq_disable(); ++ udc_disable(dev); ++ stop_activity(dev, driver); ++ local_irq_enable(); ++ ++ driver->unbind(&dev->gadget); ++ dev->driver = 0; ++ ++ device_del (&dev->gadget.dev); ++ device_remove_file(dev->dev, &dev_attr_function); ++ ++ DMSG("unregistered gadget driver '%s'\n", driver->driver.name); ++ dump_state(dev); ++ return 0; ++} ++EXPORT_SYMBOL(usb_gadget_unregister_driver); ++ ++#ifndef enable_disconnect_irq ++#define enable_disconnect_irq() do {} while (0) ++#define disable_disconnect_irq() do {} while (0) ++#endif ++ ++ ++/*-------------------------------------------------------------------------*/ ++ ++static inline void clear_ep_state (struct pxa27x_udc *dev) ++{ ++ unsigned i; ++ ++ /* hardware SET_{CONFIGURATION,INTERFACE} automagic resets endpoint ++ * fifos, and pending transactions mustn't be continued in any case. ++ */ ++ for (i = 1; i < UDC_EP_NUM; i++) ++ nuke(&dev->ep[i], -ECONNABORTED); ++} ++ ++static void udc_watchdog(unsigned long _dev) ++{ ++ struct pxa27x_udc *dev = (void *)_dev; ++ ++ local_irq_disable(); ++ if (dev->ep0state == EP0_STALL ++ && (UDCCSR0 & UDCCSR0_FST) == 0 ++ && (UDCCSR0 & UDCCSR0_SST) == 0) { ++ UDCCSR0 = UDCCSR0_FST|UDCCSR0_FTF; ++ DBG(DBG_VERBOSE, "ep0 re-stall\n"); ++ start_watchdog(dev); ++ } ++ local_irq_enable(); ++} ++ ++static void handle_ep0 (struct pxa27x_udc *dev) ++{ ++ u32 udccsr0 = UDCCSR0; ++ struct pxa27x_ep *ep = &dev->ep [0]; ++ struct pxa27x_request *req; ++ union { ++ struct usb_ctrlrequest r; ++ u8 raw [8]; ++ u32 word [2]; ++ } u; ++ ++ if (list_empty(&ep->queue)) ++ req = 0; ++ else ++ req = list_entry(ep->queue.next, struct pxa27x_request, queue); ++ ++ /* clear stall status */ ++ if (udccsr0 & UDCCSR0_SST) { ++ nuke(ep, -EPIPE); ++ UDCCSR0 = UDCCSR0_SST; ++ del_timer(&dev->timer); ++ ep0_idle(dev); ++ } ++ ++ /* previous request unfinished? non-error iff back-to-back ... */ ++ if ((udccsr0 & UDCCSR0_SA) != 0 && dev->ep0state != EP0_IDLE) { ++ nuke(ep, 0); ++ del_timer(&dev->timer); ++ ep0_idle(dev); ++ } ++ ++ switch (dev->ep0state) { ++ case EP0_NO_ACTION: ++ printk(KERN_INFO"%s: Busy\n", __FUNCTION__); ++ /*Fall through */ ++ case EP0_IDLE: ++ /* late-breaking status? */ ++ udccsr0 = UDCCSR0; ++ ++ /* start control request? */ ++ if (likely((udccsr0 & (UDCCSR0_OPC|UDCCSR0_SA|UDCCSR0_RNE)) ++ == (UDCCSR0_OPC|UDCCSR0_SA|UDCCSR0_RNE))) { ++ int i; ++ ++ nuke (ep, -EPROTO); ++ /* read SETUP packet */ ++ for (i = 0; i < 2; i++) { ++ if (unlikely(!(UDCCSR0 & UDCCSR0_RNE))) { ++bad_setup: ++ DMSG("SETUP %d!\n", i); ++ goto stall; ++ } ++ u.word [i] = UDCDR0; ++ } ++ if (unlikely((UDCCSR0 & UDCCSR0_RNE) != 0)) ++ goto bad_setup; ++ ++ le16_to_cpus (&u.r.wValue); ++ le16_to_cpus (&u.r.wIndex); ++ le16_to_cpus (&u.r.wLength); ++ ++ LED_EP0_ON; ++ ++ DBG(DBG_VERBOSE, "SETUP %02x.%02x v%04x i%04x l%04x\n", ++ u.r.bRequestType, u.r.bRequest, ++ u.r.wValue, u.r.wIndex, u.r.wLength); ++ /* cope with automagic for some standard requests. */ ++ dev->req_std = (u.r.bRequestType & USB_TYPE_MASK) ++ == USB_TYPE_STANDARD; ++ dev->req_config = 0; ++ dev->req_pending = 1; ++#if 0 ++ switch (u.r.bRequest) { ++ /* hardware was supposed to hide this */ ++ case USB_REQ_SET_CONFIGURATION: ++ case USB_REQ_SET_INTERFACE: ++ case USB_REQ_SET_ADDRESS: ++ printk(KERN_ERR "Should not come here\n"); ++ break; ++ } ++ ++#endif ++ if (u.r.bRequestType & USB_DIR_IN) ++ dev->ep0state = EP0_IN_DATA_PHASE; ++ else ++ dev->ep0state = EP0_OUT_DATA_PHASE; ++ i = dev->driver->setup(&dev->gadget, &u.r); ++ ++ if (i < 0) { ++ /* hardware automagic preventing STALL... */ ++ if (dev->req_config) { ++ /* hardware sometimes neglects to tell ++ * tell us about config change events, ++ * so later ones may fail... ++ */ ++ WARN("config change %02x fail %d?\n", ++ u.r.bRequest, i); ++ return; ++ /* TODO experiment: if has_cfr, ++ * hardware didn't ACK; maybe we ++ * could actually STALL! ++ */ ++ } ++ DBG(DBG_VERBOSE, "protocol STALL, " ++ "%02x err %d\n", UDCCSR0, i); ++stall: ++ /* the watchdog timer helps deal with cases ++ * where udc seems to clear FST wrongly, and ++ * then NAKs instead of STALLing. ++ */ ++ ep0start(dev, UDCCSR0_FST|UDCCSR0_FTF, "stall"); ++ start_watchdog(dev); ++ dev->ep0state = EP0_STALL; ++ LED_EP0_OFF; ++ ++ /* deferred i/o == no response yet */ ++ } else if (dev->req_pending) { ++ if (likely(dev->ep0state == EP0_IN_DATA_PHASE ++ || dev->req_std || u.r.wLength)) ++ ep0start(dev, 0, "defer"); ++ else ++ ep0start(dev, UDCCSR0_IPR, "defer/IPR"); ++ } ++ ++ /* expect at least one data or status stage irq */ ++ return; ++ ++ } else { ++ /* some random early IRQ: ++ * - we acked FST ++ * - IPR cleared ++ * - OPC got set, without SA (likely status stage) ++ */ ++ UDCCSR0 = udccsr0 & (UDCCSR0_SA|UDCCSR0_OPC); ++ } ++ break; ++ case EP0_IN_DATA_PHASE: /* GET_DESCRIPTOR etc */ ++ if (udccsr0 & UDCCSR0_OPC) { ++ UDCCSR0 = UDCCSR0_OPC|UDCCSR0_FTF; ++ DBG(DBG_VERBOSE, "ep0in premature status\n"); ++ if (req) ++ done(ep, req, 0); ++ ep0_idle(dev); ++ } else /* irq was IPR clearing */ { ++ if (req) { ++ /* this IN packet might finish the request */ ++ (void) write_ep0_fifo(ep, req); ++ } /* else IN token before response was written */ ++ } ++ break; ++ case EP0_OUT_DATA_PHASE: /* SET_DESCRIPTOR etc */ ++ if (udccsr0 & UDCCSR0_OPC) { ++ if (req) { ++ /* this OUT packet might finish the request */ ++ if (read_ep0_fifo(ep, req)) ++ done(ep, req, 0); ++ /* else more OUT packets expected */ ++ } /* else OUT token before read was issued */ ++ } else /* irq was IPR clearing */ { ++ DBG(DBG_VERBOSE, "ep0out premature status\n"); ++ if (req) ++ done(ep, req, 0); ++ ep0_idle(dev); ++ } ++ break; ++ case EP0_STALL: ++ UDCCSR0 = UDCCSR0_FST; ++ break; ++ } ++ UDCISR0 = UDCISR_INT(0, UDCISR_INT_MASK); ++} ++ ++ ++static void handle_ep(struct pxa27x_ep *ep) ++{ ++ struct pxa27x_request *req; ++ int completed; ++ u32 udccsr=0; ++ ++ DMSG("%s is called\n", __FUNCTION__); ++ do { ++ completed = 0; ++ if (likely (!list_empty(&ep->queue))) { ++ req = list_entry(ep->queue.next, ++ struct pxa27x_request, queue); ++ } else ++ req = 0; ++ ++// udccsr = *ep->reg_udccsr; ++ DMSG("%s: req:%p, udcisr0:0x%x udccsr %p:0x%x\n", __FUNCTION__, ++ req, UDCISR0, ep->reg_udccsr, *ep->reg_udccsr); ++ if (unlikely(ep->dir_in)) { ++ udccsr = (UDCCSR_SST | UDCCSR_TRN) & *ep->reg_udccsr; ++ if (unlikely (udccsr)) ++ *ep->reg_udccsr = udccsr; ++ ++ if (req && likely ((*ep->reg_udccsr & UDCCSR_FS) != 0)) ++ completed = write_fifo(ep, req); ++ ++ } else { ++ udccsr = (UDCCSR_SST | UDCCSR_TRN) & *ep->reg_udccsr; ++ if (unlikely(udccsr)) ++ *ep->reg_udccsr = udccsr; ++ ++ /* fifos can hold packets, ready for reading... */ ++ if (likely(req)) { ++ completed = read_fifo(ep, req); ++ } else { ++ pio_irq_disable (ep->ep_num); ++ *ep->reg_udccsr = UDCCSR_FEF; ++ DMSG("%s: no req for out data\n", ++ __FUNCTION__); ++ } ++ } ++ ep->pio_irqs++; ++ } while (completed); ++} ++ ++static void pxa27x_change_configuration (struct pxa27x_udc *dev) ++{ ++ struct usb_ctrlrequest req ; ++ ++ req.bRequestType = 0; ++ req.bRequest = USB_REQ_SET_CONFIGURATION; ++ req.wValue = dev->configuration; ++ req.wIndex = 0; ++ req.wLength = 0; ++ ++ dev->ep0state = EP0_NO_ACTION; ++ dev->driver->setup(&dev->gadget, &req); ++ ++} ++ ++static void pxa27x_change_interface (struct pxa27x_udc *dev) ++{ ++ struct usb_ctrlrequest req; ++ ++ req.bRequestType = USB_RECIP_INTERFACE; ++ req.bRequest = USB_REQ_SET_INTERFACE; ++ req.wValue = dev->alternate; ++ req.wIndex = dev->interface; ++ req.wLength = 0; ++ ++ dev->ep0state = EP0_NO_ACTION; ++ dev->driver->setup(&dev->gadget, &req); ++} ++ ++/* ++ * pxa27x_udc_irq - interrupt handler ++ * ++ * avoid delays in ep0 processing. the control handshaking isn't always ++ * under software control (pxa250c0 and the pxa255 are better), and delays ++ * could cause usb protocol errors. ++ */ ++static irqreturn_t pxa27x_udc_irq(int irq, void *_dev) ++{ ++ struct pxa27x_udc *dev = _dev; ++ int handled; ++ ++ dev->stats.irqs++; ++ HEX_DISPLAY(dev->stats.irqs); ++ ++ DBG(DBG_VERBOSE, "Interrupt, UDCISR0:0x%08x, UDCISR1:0x%08x, " ++ "UDCCR:0x%08x\n", UDCISR0, UDCISR1, UDCCR); ++ ++ do { ++ u32 udcir = UDCISR1 & 0xF8000000; ++ ++ handled = 0; ++ ++ /* SUSpend Interrupt Request */ ++ if (unlikely(udcir & UDCISR1_IRSU)) { ++ UDCISR1 = UDCISR1_IRSU; ++ handled = 1; ++ DBG(DBG_VERBOSE, "USB suspend\n"); ++ if (dev->gadget.speed != USB_SPEED_UNKNOWN ++ && dev->driver ++ && dev->driver->suspend) ++ dev->driver->suspend(&dev->gadget); ++ ep0_idle (dev); ++ } ++ ++ /* RESume Interrupt Request */ ++ if (unlikely(udcir & UDCISR1_IRRU)) { ++ UDCISR1 = UDCISR1_IRRU; ++ handled = 1; ++ DBG(DBG_VERBOSE, "USB resume\n"); ++ ++ if (dev->gadget.speed != USB_SPEED_UNKNOWN ++ && dev->driver ++ && dev->driver->resume) ++ dev->driver->resume(&dev->gadget); ++ } ++ ++ if (unlikely(udcir & UDCISR1_IRCC)) { ++ unsigned config, interface, alternate; ++ ++ handled = 1; ++ DBG(DBG_VERBOSE, "USB SET_CONFIGURATION or " ++ "SET_INTERFACE command received\n"); ++ ++ UDCCR |= UDCCR_SMAC; ++ ++ config = (UDCCR & UDCCR_ACN) >> UDCCR_ACN_S; ++ ++ if (dev->configuration != config) { ++ dev->configuration = config; ++ pxa27x_change_configuration(dev) ; ++ } ++ ++ interface = (UDCCR & UDCCR_AIN) >> UDCCR_AIN_S; ++ alternate = (UDCCR & UDCCR_AAISN) >> UDCCR_AAISN_S; ++ ++ if ( (dev->configuration != interface) || \ ++ (dev->alternate != alternate)){ ++ dev->interface = config; ++ dev->alternate = alternate; ++ pxa27x_change_interface(dev); ++ } ++ ++ UDCISR1 = UDCISR1_IRCC; ++ DMSG("%s: con:%d,inter:%d,alt:%d\n", ++ __FUNCTION__, config,interface, alternate); ++ } ++ ++ /* ReSeT Interrupt Request - USB reset */ ++ if (unlikely(udcir & UDCISR1_IRRS)) { ++ UDCISR1 = UDCISR1_IRRS; ++ handled = 1; ++ ++ if ((UDCCR & UDCCR_UDA) == 0) { ++ DBG(DBG_VERBOSE, "SB reset start\n"); ++ ++ /* reset driver and endpoints, ++ * in case that's not yet done ++ */ ++ stop_activity (dev, dev->driver); ++ ++ } ++ INFO("USB reset\n"); ++ dev->gadget.speed = USB_SPEED_FULL; ++ memset(&dev->stats, 0, sizeof dev->stats); ++ ++ } else { ++ u32 udcisr0 = UDCISR0 ; ++ u32 udcisr1 = UDCISR1 & 0xFFFF; ++ int i; ++ ++ if (unlikely (!udcisr0 && !udcisr1)) ++ continue; ++ ++ DBG(DBG_VERY_NOISY, "irq %02x.%02x\n", udcisr1,udcisr0); ++ ++ /* control traffic */ ++ if (udcisr0 & UDCISR0_IR0) { ++ dev->ep[0].pio_irqs++; ++ handle_ep0(dev); ++ handled = 1; ++ } ++ ++ udcisr0 >>= 2; ++ /* endpoint data transfers */ ++ for (i = 1; udcisr0!=0 && i < 16; udcisr0>>=2,i++) { ++ UDCISR0 = UDCISR_INT(i, UDCISR_INT_MASK); ++ ++ if (udcisr0 & UDC_INT_FIFOERROR) ++ printk(KERN_ERR" Endpoint %d Fifo error\n", i); ++ if (udcisr0 & UDC_INT_PACKETCMP) { ++ handle_ep(&dev->ep[i]); ++ handled = 1; ++ } ++ ++ } ++ ++ for (i = 0; udcisr1!=0 && i < 8; udcisr1 >>= 2, i++) { ++ UDCISR1 = UDCISR_INT(i, UDCISR_INT_MASK); ++ ++ if (udcisr1 & UDC_INT_FIFOERROR) { ++ printk(KERN_ERR" Endpoint %d fifo error\n", (i+16)); ++ } ++ ++ if (udcisr1 & UDC_INT_PACKETCMP) { ++ handle_ep(&dev->ep[i+16]); ++ handled = 1; ++ } ++ } ++ } ++ ++ /* we could also ask for 1 msec SOF (SIR) interrupts */ ++ ++ } while (handled); ++ return IRQ_HANDLED; ++} ++ ++static void udc_init_ep(struct pxa27x_udc *dev) ++{ ++ int i; ++ ++ INIT_LIST_HEAD (&dev->gadget.ep_list); ++ INIT_LIST_HEAD (&dev->gadget.ep0->ep_list); ++ ++ for (i = 0; i < UDC_EP_NUM; i++) { ++ struct pxa27x_ep *ep = &dev->ep[i]; ++ ++ ep->dma = -1; ++ if (i != 0) { ++ memset(ep, 0, sizeof(*ep)); ++ } ++ INIT_LIST_HEAD (&ep->queue); ++ } ++} ++ ++/*-------------------------------------------------------------------------*/ ++ ++static void nop_release (struct device *dev) ++{ ++ DMSG("%s %s\n", __FUNCTION__, dev->bus_id); ++} ++ ++/* this uses load-time allocation and initialization (instead of ++ * doing it at run-time) to save code, eliminate fault paths, and ++ * be more obviously correct. ++ */ ++static struct pxa27x_udc memory = { ++ .gadget = { ++ .ops = &pxa27x_udc_ops, ++ .ep0 = &memory.ep[0].ep, ++ .name = driver_name, ++ .dev = { ++ .bus_id = "gadget", ++ .release = nop_release, ++ }, ++ }, ++ ++ /* control endpoint */ ++ .ep[0] = { ++ .ep = { ++ .name = ep0name, ++ .ops = &pxa27x_ep_ops, ++ .maxpacket = EP0_FIFO_SIZE, ++ }, ++ .dev = &memory, ++ .reg_udccsr = &UDCCSR0, ++ .reg_udcdr = &UDCDR0, ++ } ++}; ++ ++#define CP15R0_VENDOR_MASK 0xffffe000 ++ ++#define CP15R0_XSCALE_VALUE 0x69054000 /* intel/arm/xscale */ ++ ++/* ++ * probe - binds to the platform device ++ */ ++static int pxa27x_udc_probe(struct platform_device *pdev) ++{ ++ struct device *dev = &pdev->dev; ++ struct pxa27x_udc *udc = &memory; ++ int retval; ++ u32 chiprev; ++ ++ /* insist on Intel/ARM/XScale */ ++ asm("mrc%? p15, 0, %0, c0, c0" : "=r" (chiprev)); ++ if ((chiprev & CP15R0_VENDOR_MASK) != CP15R0_XSCALE_VALUE) { ++ printk(KERN_ERR "%s: not XScale!\n", driver_name); ++ return -ENODEV; ++ } ++ /* other non-static parts of init */ ++ udc->dev = dev; ++ udc->mach = dev->platform_data; ++ ++ /* FIXME */ ++ if (udc->mach->gpio_pullup) ++ pxa_gpio_mode((udc->mach->gpio_pullup & GPIO_MD_MASK_NR) | \ ++ GPIO_OUT | GPIO_DFLT_HIGH); ++ ++ init_timer(&udc->timer); ++ udc->timer.function = udc_watchdog; ++ udc->timer.data = (unsigned long) udc; ++ ++ device_initialize(&udc->gadget.dev); ++ udc->gadget.dev.parent = dev; ++ udc->gadget.dev.dma_mask = dev->dma_mask; ++ ++ the_controller = udc; ++ dev_set_drvdata(dev, udc); ++ ++ udc_disable(udc); ++ udc_init_ep(udc); ++ udc_reinit(udc); ++ ++ /* irq setup after old hardware state is cleaned up */ ++ retval = request_irq(IRQ_USB, pxa27x_udc_irq, ++ SA_INTERRUPT, driver_name, udc); ++ if (retval != 0) { ++ printk(KERN_ERR "%s: can't get irq %i, err %d\n", ++ driver_name, IRQ_USB, retval); ++ return -EBUSY; ++ } ++ udc->got_irq = 1; ++ ++ create_proc_files(); ++ ++ return 0; ++} ++ ++static int pxa27x_udc_remove(struct platform_device *pdev) ++{ ++ struct device *dev = &pdev->dev; ++ struct pxa27x_udc *udc = dev->driver_data; ++ ++ udc_disable(udc); ++ remove_proc_files(); ++ usb_gadget_unregister_driver(udc->driver); ++ ++ if (udc->got_irq) { ++ free_irq(IRQ_USB, udc); ++ udc->got_irq = 0; ++ } ++ if (machine_is_lubbock() && udc->got_disc) { ++ free_irq(LUBBOCK_USB_DISC_IRQ, udc); ++ udc->got_disc = 0; ++ } ++ dev_set_drvdata(dev, 0); ++ the_controller = 0; ++ return 0; ++} ++ ++#ifdef CONFIG_PM ++static int pxa27x_udc_suspend(struct platform_device *pdev, pm_message_t state) ++{ ++ struct device *dev = &pdev->dev; ++ struct pxa27x_udc *udc = dev->driver_data; ++ int i; ++ ++ DMSG("%s will go into SUSPEND_POWER_DOWN\n", __FUNCTION__); ++ udc->udccsr0 = UDCCSR0; ++ for(i=1; (i<UDC_EP_NUM); i++) { ++ if (udc->ep[i].assigned) { ++ struct pxa27x_ep *ep = &udc->ep[i]; ++ ++ ep->udccsr_value = *ep->reg_udccsr; ++ ep->udccr_value = *ep->reg_udccr; ++ DMSG("EP%d, udccsr:0x%x, udccr:0x%x\n", ++ i, *ep->reg_udccsr, *ep->reg_udccr); ++ } ++ } ++ ++ udc_clear_mask_UDCCR(UDCCR_UDE); ++ pxa_set_cken(CKEN11_USB, 0); ++ ++ return 0; ++} ++ ++static int pxa27x_udc_resume(struct platform_device *pdev) ++{ ++ struct device *dev = &pdev->dev; ++ struct pxa27x_udc *udc = dev->driver_data; ++ int i; ++ ++ DMSG("%s: udc resume\n", __FUNCTION__); ++ ++ UDCCSR0 = udc->udccsr0 & (UDCCSR0_FST | UDCCSR0_DME); ++ for (i=1; i < UDC_EP_NUM; i++) { ++ if (udc->ep[i].assigned) { ++ struct pxa27x_ep *ep = &udc->ep[i]; ++ ++ *ep->reg_udccsr = ep->udccsr_value; ++ *ep->reg_udccr = ep->udccr_value; ++ DMSG("EP%d, udccsr:0x%x, udccr:0x%x\n", ++ i, *ep->reg_udccsr, *ep->reg_udccr); ++ } ++ } ++ udc_enable(udc); ++ /* OTGPH bit is set when sleep mode is entered. ++ * it indicates that OTG pad is retaining its state. ++ * Upon exit from sleep mode and before clearing OTGPH, ++ * Software must configure the USB OTG pad, UDC, and UHC ++ * to the state they were in before entering sleep mode.*/ ++ PSSR |= PSSR_OTGPH; ++ ++ return 0; ++} ++#else ++#define pxa27x_udc_suspend NULL ++#define pxa27x_udc_resume NULL ++#endif ++ ++/*-------------------------------------------------------------------------*/ ++ ++static struct platform_driver pxa27x_udc_driver = { ++ .probe = pxa27x_udc_probe, ++ .remove = pxa27x_udc_remove, ++ .suspend = pxa27x_udc_suspend, ++ .resume = pxa27x_udc_resume, ++ .driver = { ++ .name = "pxa2xx-udc", ++ }, ++}; ++ ++static int __init udc_init(void) ++{ ++ printk(KERN_INFO "%s: version %s\n", driver_name, DRIVER_VERSION); ++ return platform_driver_register(&pxa27x_udc_driver); ++} ++module_init(udc_init); ++ ++static void __exit udc_exit(void) ++{ ++ platform_driver_unregister(&pxa27x_udc_driver); ++} ++module_exit(udc_exit); ++ ++MODULE_DESCRIPTION(DRIVER_DESC); ++MODULE_AUTHOR("Frank Becker, Robert Schwebel, David Brownell"); ++MODULE_LICENSE("GPL"); +diff --git a/drivers/usb/gadget/pxa27x_udc.h b/drivers/usb/gadget/pxa27x_udc.h +new file mode 100644 +index 0000000..c4b72a2 +--- /dev/null ++++ b/drivers/usb/gadget/pxa27x_udc.h +@@ -0,0 +1,329 @@ ++/* ++ * linux/drivers/usb/gadget/pxa27x_udc.h ++ * Intel PXA27x on-chip full speed USB device controller ++ * ++ * Copyright (C) 2003 Robert Schwebel <r.schwebel@pengutronix.de>, Pengutronix ++ * Copyright (C) 2003 David Brownell ++ * Copyright (C) 2004 Intel Corporation ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA ++ */ ++ ++#ifndef __LINUX_USB_GADGET_PXA27X_H ++#define __LINUX_USB_GADGET_PXA27X_H ++ ++#include <linux/types.h> ++ ++struct pxa27x_udc; ++ ++struct pxa27x_ep { ++ struct usb_ep ep; ++ struct pxa27x_udc *dev; ++ ++ const struct usb_endpoint_descriptor *desc; ++ struct list_head queue; ++ unsigned long pio_irqs; ++ unsigned long dma_irqs; ++ ++ int dma; ++ unsigned fifo_size; ++ unsigned ep_num; ++ unsigned ep_type; ++ ++ unsigned stopped : 1; ++ unsigned dma_con : 1; ++ unsigned dir_in : 1; ++ unsigned assigned : 1; ++ ++ unsigned config; ++ unsigned interface; ++ unsigned aisn; ++ /* UDCCSR = UDC Control/Status Register for this EP ++ * UBCR = UDC Byte Count Remaining (contents of OUT fifo) ++ * UDCDR = UDC Endpoint Data Register (the fifo) ++ * UDCCR = UDC Endpoint Configuration Registers ++ * DRCM = DMA Request Channel Map ++ */ ++ volatile u32 *reg_udccsr; ++ volatile u32 *reg_udcbcr; ++ volatile u32 *reg_udcdr; ++ volatile u32 *reg_udccr; ++#ifdef USE_DMA ++ volatile u32 *reg_drcmr; ++#define drcmr(n) .reg_drcmr = & DRCMR ## n , ++#else ++#define drcmr(n) ++#endif ++ ++#ifdef CONFIG_PM ++ unsigned udccsr_value; ++ unsigned udccr_value; ++#endif ++}; ++ ++struct pxa27x_request { ++ struct usb_request req; ++ struct list_head queue; ++}; ++ ++enum ep0_state { ++ EP0_IDLE, ++ EP0_IN_DATA_PHASE, ++ EP0_OUT_DATA_PHASE, ++// EP0_END_XFER, ++ EP0_STALL, ++ EP0_NO_ACTION ++}; ++ ++#define EP0_FIFO_SIZE ((unsigned)16) ++#define BULK_FIFO_SIZE ((unsigned)64) ++#define ISO_FIFO_SIZE ((unsigned)256) ++#define INT_FIFO_SIZE ((unsigned)8) ++ ++struct udc_stats { ++ struct ep0stats { ++ unsigned long ops; ++ unsigned long bytes; ++ } read, write; ++ unsigned long irqs; ++}; ++ ++#ifdef CONFIG_USB_PXA27X_SMALL ++/* when memory's tight, SMALL config saves code+data. */ ++//#undef USE_DMA ++//#define UDC_EP_NUM 3 ++#endif ++ ++#ifndef UDC_EP_NUM ++#define UDC_EP_NUM 24 ++#endif ++ ++struct pxa27x_udc { ++ struct usb_gadget gadget; ++ struct usb_gadget_driver *driver; ++ ++ enum ep0_state ep0state; ++ struct udc_stats stats; ++ unsigned got_irq : 1, ++ got_disc : 1, ++ has_cfr : 1, ++ req_pending : 1, ++ req_std : 1, ++ req_config : 1; ++ ++#define start_watchdog(dev) mod_timer(&dev->timer, jiffies + (HZ/200)) ++ struct timer_list timer; ++ ++ struct device *dev; ++ struct pxa2xx_udc_mach_info *mach; ++ u64 dma_mask; ++ struct pxa27x_ep ep [UDC_EP_NUM]; ++ ++ unsigned configuration, ++ interface, ++ alternate; ++#ifdef CONFIG_PM ++ unsigned udccsr0; ++#endif ++}; ++ ++/*-------------------------------------------------------------------------*/ ++#if 0 ++#ifdef DEBUG ++#define HEX_DISPLAY(n) do { \ ++ if (machine_is_mainstone())\ ++ { MST_LEDDAT1 = (n); } \ ++ } while(0) ++ ++#define HEX_DISPLAY1(n) HEX_DISPLAY(n) ++ ++#define HEX_DISPLAY2(n) do { \ ++ if (machine_is_mainstone()) \ ++ { MST_LEDDAT2 = (n); } \ ++ } while(0) ++ ++#endif /* DEBUG */ ++#endif ++/*-------------------------------------------------------------------------*/ ++ ++/* LEDs are only for debug */ ++#ifndef HEX_DISPLAY ++#define HEX_DISPLAY(n) do {} while(0) ++#endif ++ ++#ifndef LED_CONNECTED_ON ++#define LED_CONNECTED_ON do {} while(0) ++#define LED_CONNECTED_OFF do {} while(0) ++#endif ++#ifndef LED_EP0_ON ++#define LED_EP0_ON do {} while (0) ++#define LED_EP0_OFF do {} while (0) ++#endif ++ ++static struct pxa27x_udc *the_controller; ++ ++/*-------------------------------------------------------------------------*/ ++ ++/* one GPIO should be used to detect host disconnect */ ++static inline int is_usb_connected(void) ++{ ++ if (!the_controller->mach->udc_is_connected) ++ return 1; ++ return the_controller->mach->udc_is_connected(); ++} ++ ++/* one GPIO should force the host to see this device (or not) */ ++static inline void make_usb_disappear(void) ++{ ++ if (!the_controller->mach->udc_command) ++ return; ++ the_controller->mach->udc_command(PXA2XX_UDC_CMD_DISCONNECT); ++} ++ ++static inline void let_usb_appear(void) ++{ ++ if (!the_controller->mach->udc_command) ++ return; ++ the_controller->mach->udc_command(PXA2XX_UDC_CMD_CONNECT); ++} ++ ++/*-------------------------------------------------------------------------*/ ++ ++/* ++ * Debugging support vanishes in non-debug builds. DBG_NORMAL should be ++ * mostly silent during normal use/testing, with no timing side-effects. ++ */ ++#define DBG_NORMAL 1 /* error paths, device state transitions */ ++#define DBG_VERBOSE 2 /* add some success path trace info */ ++#define DBG_NOISY 3 /* ... even more: request level */ ++#define DBG_VERY_NOISY 4 /* ... even more: packet level */ ++ ++#ifdef DEBUG ++ ++static const char *state_name[] = { ++ "EP0_IDLE", ++ "EP0_IN_DATA_PHASE", "EP0_OUT_DATA_PHASE", ++ "EP0_END_XFER", "EP0_STALL" ++}; ++ ++#define DMSG(stuff...) printk(KERN_ERR "udc: " stuff) ++ ++#ifdef VERBOSE ++# define UDC_DEBUG DBG_VERBOSE ++#else ++# define UDC_DEBUG DBG_NORMAL ++#endif ++ ++static void __attribute__ ((__unused__)) ++dump_udccr(const char *label) ++{ ++ u32 udccr = UDCCR; ++ DMSG("%s 0x%08x =%s%s%s%s%s%s%s%s%s%s, con=%d,inter=%d,altinter=%d\n", ++ label, udccr, ++ (udccr & UDCCR_OEN) ? " oen":"", ++ (udccr & UDCCR_AALTHNP) ? " aalthnp":"", ++ (udccr & UDCCR_AHNP) ? " rem" : "", ++ (udccr & UDCCR_BHNP) ? " rstir" : "", ++ (udccr & UDCCR_DWRE) ? " dwre" : "", ++ (udccr & UDCCR_SMAC) ? " smac" : "", ++ (udccr & UDCCR_EMCE) ? " emce" : "", ++ (udccr & UDCCR_UDR) ? " udr" : "", ++ (udccr & UDCCR_UDA) ? " uda" : "", ++ (udccr & UDCCR_UDE) ? " ude" : "", ++ (udccr & UDCCR_ACN) >> UDCCR_ACN_S, ++ (udccr & UDCCR_AIN) >> UDCCR_AIN_S, ++ (udccr & UDCCR_AAISN)>> UDCCR_AAISN_S ); ++} ++ ++static void __attribute__ ((__unused__)) ++dump_udccsr0(const char *label) ++{ ++ u32 udccsr0 = UDCCSR0; ++ ++ DMSG("%s %s 0x%08x =%s%s%s%s%s%s%s\n", ++ label, state_name[the_controller->ep0state], udccsr0, ++ (udccsr0 & UDCCSR0_SA) ? " sa" : "", ++ (udccsr0 & UDCCSR0_RNE) ? " rne" : "", ++ (udccsr0 & UDCCSR0_FST) ? " fst" : "", ++ (udccsr0 & UDCCSR0_SST) ? " sst" : "", ++ (udccsr0 & UDCCSR0_DME) ? " dme" : "", ++ (udccsr0 & UDCCSR0_IPR) ? " ipr" : "", ++ (udccsr0 & UDCCSR0_OPC) ? " opr" : ""); ++} ++ ++static void __attribute__ ((__unused__)) ++dump_state(struct pxa27x_udc *dev) ++{ ++ unsigned i; ++ ++ DMSG("%s, udcicr %02X.%02X, udcsir %02X.%02x, udcfnr %02X\n", ++ state_name[dev->ep0state], ++ UDCICR1, UDCICR0, UDCISR1, UDCISR0, UDCFNR); ++ dump_udccr("udccr"); ++ ++ if (!dev->driver) { ++ DMSG("no gadget driver bound\n"); ++ return; ++ } else ++ DMSG("ep0 driver '%s'\n", dev->driver->driver.name); ++ ++ ++ dump_udccsr0 ("udccsr0"); ++ DMSG("ep0 IN %lu/%lu, OUT %lu/%lu\n", ++ dev->stats.write.bytes, dev->stats.write.ops, ++ dev->stats.read.bytes, dev->stats.read.ops); ++ ++ for (i = 1; i < UDC_EP_NUM; i++) { ++ if (dev->ep [i].desc == 0) ++ continue; ++ DMSG ("udccs%d = %02x\n", i, *dev->ep->reg_udccsr); ++ } ++} ++ ++#if 0 ++static void dump_regs(u8 ep) ++{ ++ DMSG("EP:%d UDCCSR:0x%08x UDCBCR:0x%08x\n UDCCR:0x%08x\n", ++ ep,UDCCSN(ep), UDCBCN(ep), UDCCN(ep)); ++} ++static void dump_req (struct pxa27x_request *req) ++{ ++ struct usb_request *r = &req->req; ++ ++ DMSG("%s: buf:0x%08x length:%d dma:0x%08x actual:%d\n", ++ __FUNCTION__, (unsigned)r->buf, r->length, ++ r->dma, r->actual); ++} ++#endif ++ ++#else ++ ++#define DMSG(stuff...) do{}while(0) ++ ++#define dump_udccr(x) do{}while(0) ++#define dump_udccsr0(x) do{}while(0) ++#define dump_state(x) do{}while(0) ++ ++#define UDC_DEBUG ((unsigned)0) ++ ++#endif ++ ++#define DBG(lvl, stuff...) do{if ((lvl) <= UDC_DEBUG) DMSG(stuff);}while(0) ++ ++#define WARN(stuff...) printk(KERN_WARNING "udc: " stuff) ++#define INFO(stuff...) printk(KERN_INFO "udc: " stuff) ++ ++ ++#endif /* __LINUX_USB_GADGET_PXA27X_H */ +diff --git a/drivers/usb/gadget/serial.c b/drivers/usb/gadget/serial.c +index e552668..971e491 100644 +--- a/drivers/usb/gadget/serial.c ++++ b/drivers/usb/gadget/serial.c +@@ -1378,20 +1378,20 @@ static int __init gs_bind(struct usb_gadget *gadget) + + usb_ep_autoconfig_reset(gadget); + +- ep = usb_ep_autoconfig(gadget, &gs_fullspeed_in_desc); ++ ep = usb_ep_autoconfig(gadget, &gs_fullspeed_in_desc, 0, 0, 0); + if (!ep) + goto autoconf_fail; + EP_IN_NAME = ep->name; + ep->driver_data = ep; /* claim the endpoint */ + +- ep = usb_ep_autoconfig(gadget, &gs_fullspeed_out_desc); ++ ep = usb_ep_autoconfig(gadget, &gs_fullspeed_out_desc, 0, 0, 0); + if (!ep) + goto autoconf_fail; + EP_OUT_NAME = ep->name; + ep->driver_data = ep; /* claim the endpoint */ + + if (use_acm) { +- ep = usb_ep_autoconfig(gadget, &gs_fullspeed_notify_desc); ++ ep = usb_ep_autoconfig(gadget, &gs_fullspeed_notify_desc, 0, 0, 0); + if (!ep) { + printk(KERN_ERR "gs_bind: cannot run ACM on %s\n", gadget->name); + goto autoconf_fail; +diff --git a/drivers/usb/gadget/zero.c b/drivers/usb/gadget/zero.c +index 8c85e33..46ffe6c 100644 +--- a/drivers/usb/gadget/zero.c ++++ b/drivers/usb/gadget/zero.c +@@ -1155,7 +1155,7 @@ zero_bind (struct usb_gadget *gadget) + * but there may also be important quirks to address. + */ + usb_ep_autoconfig_reset (gadget); +- ep = usb_ep_autoconfig (gadget, &fs_source_desc); ++ ep = usb_ep_autoconfig (gadget, &fs_source_desc, 0, 0, 0); + if (!ep) { + autoconf_fail: + printk (KERN_ERR "%s: can't autoconfigure on %s\n", +@@ -1165,7 +1165,7 @@ autoconf_fail: + EP_IN_NAME = ep->name; + ep->driver_data = ep; /* claim */ + +- ep = usb_ep_autoconfig (gadget, &fs_sink_desc); ++ ep = usb_ep_autoconfig (gadget, &fs_sink_desc, 0, 0, 0); + if (!ep) + goto autoconf_fail; + EP_OUT_NAME = ep->name; +diff --git a/include/linux/usb_gadget.h b/include/linux/usb_gadget.h +index e17186d..64c81fd 100644 +--- a/include/linux/usb_gadget.h ++++ b/include/linux/usb_gadget.h +@@ -445,10 +445,28 @@ usb_ep_fifo_flush (struct usb_ep *ep) + + struct usb_gadget; + ++/** ++ * struct usb_endpoint_config - possible configurations of a given endpoint ++ * @config: the configuration number ++ * @interface: the interface number ++ * @altinterface: the altinterface number ++ * ++ * Used as an array to pass information about the possible configurations ++ * of a given endpoint to the bus controller. ++ */ ++struct usb_endpoint_config { ++ int config; ++ int interface; ++ int altinterface; ++}; ++ + /* the rest of the api to the controller hardware: device operations, + * which don't involve endpoints (or i/o). + */ + struct usb_gadget_ops { ++ struct usb_ep* (*ep_alloc)(struct usb_gadget *gadget, ++ struct usb_endpoint_descriptor *desc, ++ int config, int interface, int alt); + int (*get_frame)(struct usb_gadget *); + int (*wakeup)(struct usb_gadget *); + int (*set_selfpowered) (struct usb_gadget *, int is_selfpowered); +@@ -872,7 +890,8 @@ int usb_gadget_config_buf(const struct usb_config_descriptor *config, + /* utility wrapping a simple endpoint selection policy */ + + extern struct usb_ep *usb_ep_autoconfig (struct usb_gadget *, +- struct usb_endpoint_descriptor *) __devinit; ++ struct usb_endpoint_descriptor *, ++ int, int, int) __devinit; + + extern void usb_ep_autoconfig_reset (struct usb_gadget *) __devinit; + diff --git a/packages/linux/linux-ezx_2.6.20.7.bb b/packages/linux/linux-ezx_2.6.20.7.bb new file mode 100644 index 0000000000..7336fee762 --- /dev/null +++ b/packages/linux/linux-ezx_2.6.20.7.bb @@ -0,0 +1,125 @@ +DESCRIPTION = "2.6 Linux Development Kernel for the Motorola GSM phones A780 and E680" +SECTION = "kernel" +AUTHOR = "Harald Welte and the OpenEZX Team <openezx-devel@lists.openezx.org>" +HOMEPAGE = "http://www.openezx.org" +LICENSE = "GPL" +DEPENDS += "quilt-native" +EZX = "ezx0" +PR = "${EZX}-r0" + +DEFAULT_PREFERENCE = "-1" + + +inherit kernel + +FILESDIR = "${@os.path.dirname(bb.data.getVar('FILE',d,1))}/linux-ezx" +RPSRC = "http://www.rpsys.net/openzaurus/patches/archive" + +############################################################## +# source and patches +# +SRC_URI = "${KERNELORG_MIRROR}/pub/linux/kernel/v2.6/linux-2.6.20.7.tar.bz2 \ + \ + file://ezx-core.patch;patch=1 \ + file://ezx-pcap.patch;patch=1 \ + file://ezx-mci.patch;patch=1 \ + file://usb_pxa27x_udc-r3.patch;patch=1 \ + file://usb_add_epalloc-r3.patch;patch=1 \ + file://ezx-emu.patch;patch=1 \ + file://ezx-fix-usb_pxa27x_udc-r3.patch;patch=1 \ + file://ezx-mtd-map.patch;patch=1 \ + file://ezx-serial-bug-workaround.patch;patch=1 \ + file://mux_cli.patch;patch=1 \ + file://mux-fix.patch;patch=1 \ + file://mux-fix-init-errorpath.patch;patch=1 \ + file://mux-remove-flipbuffers.patch;patch=1 \ + file://mux-remove-get_halted_bit.patch;patch=1 \ + file://mux-remove-usbh_finished_resume.patch;patch=1 \ + file://mux-fix-makefile.patch;patch=1 \ + file://mux-fix-tty-driver.patch;patch=1 \ + \ + file://logo_linux_clut224.ppm \ + file://defconfig-a780 \ + file://defconfig-e680 \ + " + +S = "${WORKDIR}/linux-2.6.20.7" + +############################################################## +# kernel image resides on a seperate flash partition (for now) +# +FILES_kernel-image = "" +ALLOW_EMPTY = "1" + +COMPATIBLE_HOST = "arm.*-linux" +COMPATIBLE_MACHINE = '(a780|e680)' + +CMDLINE_CON = "console=ttyS2,115200n8 console=tty1 noinitrd" +CMDLINE_ROOT = "root=/dev/mmcblk0p1 rootfstype=ext3 rootdelay=5" +# uncomment if you want to boot over NFS +#CMDLINE_ROOT = "root=/dev/nfs nfsroot=192.168.1.10:/export/opie-image rootdelay=5 3" +# uncomment to enable dyntick +#CMDLINE_OTHER = "dyntick=enable" +CMDLINE_DEBUG = '${@base_conditional("DISTRO_TYPE", "release", "quiet", "debug",d)}' +CMDLINE_IP = "ip=192.168.1.2:192.168.1.10:192.168.1.10:255.255.255.0:ezx:usb0:off" +CMDLINE = "${CMDLINE_CON} ${CMDLINE_ROOT} ${CMDLINE_IP} ${CMDLINE_ROTATE} ${CMDLINE_OTHER} ${CMDLINE_DEBUG} mem=32M@0xA0000000 mem=16M@0xAC000000" + +############################################################### +# module configs specific to this kernel +# +module_autoload_pxaficp_ir = "pxaficp_ir" +module_autoload_snd-pcm-oss = "snd-pcm-oss" + +do_configure() { + install -m 0644 ${WORKDIR}/logo_linux_clut224.ppm drivers/video/logo/logo_linux_clut224.ppm + + if [ ! -e ${WORKDIR}/defconfig-${MACHINE} ]; then + die "No default configuration for ${MACHINE} available." + fi + + echo "CONFIG_CMDLINE=\"${CMDLINE}\"" >> ${S}/.config + + if [ "${TARGET_OS}" == "linux-gnueabi" -o "${TARGET_OS}" == "linux-uclibcgnueabi" ]; then + echo "CONFIG_AEABI=y" >> ${S}/.config + echo "CONFIG_OABI_COMPAT=y" >> ${S}/.config + else + echo "# CONFIG_AEABI is not set" >> ${S}/.config + echo "# CONFIG_OABI_COMPAT is not set" >> ${S}/.config + fi + + sed -e '/CONFIG_AEABI/d' \ + -e '/CONFIG_OABI_COMPAT=/d' \ + -e '/CONFIG_CMDLINE=/d' \ + -e '/CONFIG_MTD_MTDRAM_SA1100=/d' \ + -e '/CONFIG_MTDRAM_TOTAL_SIZE=/d' \ + -e '/CONFIG_MTDRAM_ERASE_SIZE=/d' \ + -e '/CONFIG_MTDRAM_ABS_POS=/d' \ + '${WORKDIR}/defconfig-${MACHINE}' >>'${S}/.config' + + yes '' | oe_runmake oldconfig +} + +############################################################### +# check the kernel is below the 1024*1024 byte limit for the boot-over usb +# +do_compile_append() { + size=`ls -l arch/${ARCH}/boot/${KERNEL_IMAGETYPE} | awk '{ print $5}'` + if [ $size -ge 1294336 ]; then + rm arch/${ARCH}/boot/${KERNEL_IMAGETYPE} + echo "Size is $size" + echo "This kernel is too big for your EZX Phone. Please reduce the size of the kernel by making more of it modular." + fi +} + +############################################################### +# put into deploy directory +# +do_deploy() { + install -d ${DEPLOY_DIR_IMAGE} + install -m 0644 arch/${ARCH}/boot/${KERNEL_IMAGETYPE} ${DEPLOY_DIR_IMAGE}/${KERNEL_IMAGETYPE}-${PV}-${MACHINE}-${DATETIME}.bin + tar -cvzf ${DEPLOY_DIR_IMAGE}/modules-${KERNEL_VERSION}-${MACHINE}.tgz -C ${D} lib +} + +do_deploy[dirs] = "${S}" + +addtask deploy before do_package after do_install diff --git a/packages/linux/linux-ezx_2.6.21.bb b/packages/linux/linux-ezx_2.6.21.bb new file mode 100644 index 0000000000..2b233e0c2e --- /dev/null +++ b/packages/linux/linux-ezx_2.6.21.bb @@ -0,0 +1,129 @@ +DESCRIPTION = "2.6 Linux Development Kernel for the Motorola GSM phones A780 and E680" +SECTION = "kernel" +AUTHOR = "Harald Welte and the OpenEZX Team <openezx-devel@lists.openezx.org>" +HOMEPAGE = "http://www.openezx.org" +LICENSE = "GPL" +DEPENDS += "quilt-native" +EZX = "ezx0" +PR = "${EZX}-r1" + +DEFAULT_PREFERENCE = "-1" + + +inherit kernel + +FILESDIR = "${@os.path.dirname(bb.data.getVar('FILE',d,1))}/linux-ezx" +RPSRC = "http://www.rpsys.net/openzaurus/patches/archive" + +############################################################## +# source and patches +# +SRC_URI = "${KERNELORG_MIRROR}/pub/linux/kernel/v2.6/linux-${PV}.tar.bz2 \ + \ + file://ezx-core.patch;patch=1 \ + file://ezx-pcap.patch;patch=1 \ + file://ezx-mci.patch;patch=1 \ + file://pxa27x-udc-support.2.patch;patch=1 \ + file://ezx-emu.patch;patch=1 \ + file://ezx-mtd-map.patch;patch=1 \ + file://ezx-serial-bug-workaround.patch;patch=1 \ + file://mux_cli.patch;patch=1 \ + file://mux-fix.patch;patch=1 \ + file://mux-fix-init-errorpath.patch;patch=1 \ + file://mux-remove-flipbuffers.patch;patch=1 \ + file://mux-remove-get_halted_bit.patch;patch=1 \ + file://mux-remove-usbh_finished_resume.patch;patch=1 \ + file://mux-fix-makefile.patch;patch=1 \ + file://mux-fix-tty-driver.patch;patch=1 \ + file://mux-linux-2.6.21-fix.patch;patch=1 \ + file://mux-ifdef-ezx-features.patch;patch=1 \ + file://mux_debug.patch;patch=1 \ + + \ + + file://logo_linux_clut224.ppm \ + file://defconfig-a780 \ + file://defconfig-e680 \ + " + +S = "${WORKDIR}/linux-${PV}" + + +############################################################## +# kernel image resides on a seperate flash partition (for now) +# +FILES_kernel-image = "" +ALLOW_EMPTY = "1" + +COMPATIBLE_HOST = "arm.*-linux" +COMPATIBLE_MACHINE = '(a780|e680)' + +CMDLINE_CON = "console=ttyS2,115200n8 console=tty1 noinitrd" +CMDLINE_ROOT = "root=/dev/mmcblk0p1 rootfstype=ext3 rootdelay=5" +# uncomment if you want to boot over NFS +#CMDLINE_ROOT = "root=/dev/nfs nfsroot=192.168.1.10:/export/opie-image rootdelay=5 3" +# uncomment to enable dyntick +#CMDLINE_OTHER = "dyntick=enable" +CMDLINE_DEBUG = '${@base_conditional("DISTRO_TYPE", "release", "quiet", "debug",d)}' +CMDLINE_IP = "ip=192.168.1.2:192.168.1.10:192.168.1.10:255.255.255.0:ezx:usb0:off" +CMDLINE = "${CMDLINE_CON} ${CMDLINE_ROOT} ${CMDLINE_IP} ${CMDLINE_ROTATE} ${CMDLINE_OTHER} ${CMDLINE_DEBUG} mem=32M@0xA0000000 mem=16M@0xAC000000" + +############################################################### +# module configs specific to this kernel +# +module_autoload_pxaficp_ir = "pxaficp_ir" +module_autoload_snd-pcm-oss = "snd-pcm-oss" + +do_configure() { + install -m 0644 ${WORKDIR}/logo_linux_clut224.ppm drivers/video/logo/logo_linux_clut224.ppm + + if [ ! -e ${WORKDIR}/defconfig-${MACHINE} ]; then + die "No default configuration for ${MACHINE} available." + fi + + echo "CONFIG_CMDLINE=\"${CMDLINE}\"" >> ${S}/.config + + if [ "${TARGET_OS}" == "linux-gnueabi" -o "${TARGET_OS}" == "linux-uclibcgnueabi" ]; then + echo "CONFIG_AEABI=y" >> ${S}/.config + echo "CONFIG_OABI_COMPAT=y" >> ${S}/.config + else + echo "# CONFIG_AEABI is not set" >> ${S}/.config + echo "# CONFIG_OABI_COMPAT is not set" >> ${S}/.config + fi + + sed -e '/CONFIG_AEABI/d' \ + -e '/CONFIG_OABI_COMPAT=/d' \ + -e '/CONFIG_CMDLINE=/d' \ + -e '/CONFIG_MTD_MTDRAM_SA1100=/d' \ + -e '/CONFIG_MTDRAM_TOTAL_SIZE=/d' \ + -e '/CONFIG_MTDRAM_ERASE_SIZE=/d' \ + -e '/CONFIG_MTDRAM_ABS_POS=/d' \ + '${WORKDIR}/defconfig-${MACHINE}' >>'${S}/.config' + + yes '' | oe_runmake oldconfig +} + +############################################################### +# check the kernel is below the 1024*1024 byte limit for the boot-over usb +# +do_compile_append() { + size=`ls -l arch/${ARCH}/boot/${KERNEL_IMAGETYPE} | awk '{ print $5}'` + if [ $size -ge 1294336 ]; then + rm arch/${ARCH}/boot/${KERNEL_IMAGETYPE} + echo "Size is $size" + echo "This kernel is too big for your EZX Phone. Please reduce the size of the kernel by making more of it modular." + fi +} + +############################################################### +# put into deploy directory +# +do_deploy() { + install -d ${DEPLOY_DIR_IMAGE} + install -m 0644 arch/${ARCH}/boot/${KERNEL_IMAGETYPE} ${DEPLOY_DIR_IMAGE}/${KERNEL_IMAGETYPE}-${PV}-${MACHINE}-${DATETIME}.bin + tar -cvzf ${DEPLOY_DIR_IMAGE}/modules-${KERNEL_VERSION}-${MACHINE}.tgz -C ${D} lib +} + +do_deploy[dirs] = "${S}" + +addtask deploy before do_package after do_install diff --git a/packages/linux/linux-gta01.inc b/packages/linux/linux-gta01.inc new file mode 100644 index 0000000000..ee3c09e908 --- /dev/null +++ b/packages/linux/linux-gta01.inc @@ -0,0 +1,95 @@ +DESCRIPTION = "2.6 Linux Development Kernel for FIC Neo1973 (GTA01)" +SECTION = "kernel" +AUTHOR = "Harald Welte <laforge@openmoko.org>" +HOMEPAGE = "N/A" +LICENSE = "GPL" +DEPENDS += "u-boot-mkimage-gta01-native" + +inherit kernel + +FILESDIR = "${@os.path.dirname(bb.data.getVar('FILE',d,1))}/linux-gta01" + +############################################################## +# source and patches +# +SRC_URI = "${KERNELORG_MIRROR}/pub/linux/kernel/v2.6/linux-${VANILLA_VERSION}.tar.bz2 \ + file://defconfig-${VANILLA_VERSION}-${MACHINE}" +S = "${WORKDIR}/linux-${VANILLA_VERSION}" + +############################################################## +# kernel image resides on a seperate flash partition (for now) +# +FILES_kernel-image = "" +ALLOW_EMPTY = "1" + +COMPATIBLE_MACHINE = 'fic-gta01' + +CMDLINE_CON = "" +#CMDLINE_ROOT = "root=/dev/mmcblk0p1 rootfstype=ext3 rootdelay=5" +# uncomment if you want to boot over NFS +#CMDLINE_ROOT = "root=/dev/nfs nfsroot=192.168.1.10:/export/opie-image rootdelay=5 3" +# uncomment to enable dyntick +#CMDLINE_OTHER = "dyntick=enable" +CMDLINE_DEBUG = '${@base_conditional("DISTRO_TYPE", "release", "quiet", "debug",d)}' +CMDLINE_IP = "ip=192.168.1.2:192.168.1.10:192.168.1.10:255.255.255.0:ezx:usb0:off" +CMDLINE = "${CMDLINE_CON} ${CMDLINE_ROOT} ${CMDLINE_IP} ${CMDLINE_ROTATE} ${CMDLINE_OTHER} ${CMDLINE_DEBUG}" + +############################################################### +# module configs specific to this kernel +# +module_autoload_ohci-hcd = "ohci-hcd" +module_autoload_g_ether = "g_ether" +#module_autoload_snd-pcm-oss = "snd-pcm-oss" +#module_autoload_snd-soc-corgi_c7x0 = "snd-soc-s3c24xx" + +do_prepatch() { + mv ${WORKDIR}/patches ${S}/patches && cd ${S} && quilt push -av + rm -Rf patches .pc +} + +do_configure() { + if [ ! -e ${WORKDIR}/defconfig-${VANILLA_VERSION}-${MACHINE} ]; then + die "No default configuration for ${MACHINE} available." + fi + + echo "CONFIG_CMDLINE=\"${CMDLINE}\"" >> ${S}/.config + + if [ "${TARGET_OS}" == "linux-gnueabi" ]; then + echo "CONFIG_AEABI=y" >> ${S}/.config + echo "CONFIG_OABI_COMPAT=y" >> ${S}/.config + else + echo "# CONFIG_AEABI is not set" >> ${S}/.config + echo "# CONFIG_OABI_COMPAT is not set" >> ${S}/.config + fi + + sed -e '/CONFIG_AEABI/d' \ + -e '/CONFIG_OABI_COMPAT=/d' \ + -e '/CONFIG_CMDLINE=/d' \ + -e '/CONFIG_MTD_MTDRAM_SA1100=/d' \ + -e '/CONFIG_MTDRAM_TOTAL_SIZE=/d' \ + -e '/CONFIG_MTDRAM_ERASE_SIZE=/d' \ + -e '/CONFIG_MTDRAM_ABS_POS=/d' \ + '${WORKDIR}/defconfig-${VANILLA_VERSION}-${MACHINE}' >>'${S}/.config' + + yes '' | oe_runmake oldconfig +} + +############################################################### +# put into deploy directory and append u-boot header +# +do_deploy() { + install -d ${DEPLOY_DIR_IMAGE} + install -m 0644 arch/${ARCH}/boot/${KERNEL_IMAGETYPE} ${DEPLOY_DIR_IMAGE}/${KERNEL_IMAGETYPE}-${PV}-${PR}-${MACHINE}-${DATETIME}.bin + tar -cvzf ${DEPLOY_DIR_IMAGE}/modules-${KERNEL_RELEASE}-${PR}-${MACHINE}.tgz -C ${D} lib + ${OBJCOPY} -O binary -R .note -R .comment -S vmlinux linux.bin + rm -f linux.bin.gz + gzip -9 linux.bin + uboot-mkimage -A arm -O linux -T kernel -C gzip -a 30008000 -e 30008000 -n "OpenMoko Kernel Image Neo1973(GTA01)" -d linux.bin.gz ${DEPLOY_DIR_IMAGE}/uImage-${PV}-${PR}-${MACHINE}-${DATETIME}.bin + rm -f linux.bin.gz +} + +do_deploy[dirs] = "${S}" + +addtask prepatch before do_patch after do_unpack +addtask deploy before do_package after do_install + diff --git a/packages/linux/linux-gta01/defconfig-2.6.21.1-fic-gta01 b/packages/linux/linux-gta01/defconfig-2.6.21.1-fic-gta01 new file mode 100644 index 0000000000..1a38fe6287 --- /dev/null +++ b/packages/linux/linux-gta01/defconfig-2.6.21.1-fic-gta01 @@ -0,0 +1,1823 @@ +# +# Automatically generated make config: don't edit +# Linux kernel version: 2.6.21.1 +# Mon Apr 30 14:02:17 2007 +# +CONFIG_ARM=y +CONFIG_SYS_SUPPORTS_APM_EMULATION=y +CONFIG_GENERIC_GPIO=y +# CONFIG_GENERIC_TIME is not set +CONFIG_MMU=y +CONFIG_NO_IOPORT=y +CONFIG_GENERIC_HARDIRQS=y +CONFIG_TRACE_IRQFLAGS_SUPPORT=y +CONFIG_HARDIRQS_SW_RESEND=y +CONFIG_GENERIC_IRQ_PROBE=y +CONFIG_RWSEM_GENERIC_SPINLOCK=y +# CONFIG_ARCH_HAS_ILOG2_U32 is not set +# CONFIG_ARCH_HAS_ILOG2_U64 is not set +CONFIG_GENERIC_HWEIGHT=y +CONFIG_GENERIC_CALIBRATE_DELAY=y +CONFIG_ZONE_DMA=y +CONFIG_VECTORS_BASE=0xffff0000 +CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" + +# +# Code maturity level options +# +CONFIG_EXPERIMENTAL=y +CONFIG_BROKEN_ON_SMP=y +CONFIG_LOCK_KERNEL=y +CONFIG_INIT_ENV_ARG_LIMIT=32 + +# +# General setup +# +CONFIG_LOCALVERSION="-moko9" +# CONFIG_LOCALVERSION_AUTO is not set +CONFIG_SWAP=y +CONFIG_SYSVIPC=y +# CONFIG_IPC_NS is not set +CONFIG_SYSVIPC_SYSCTL=y +# CONFIG_POSIX_MQUEUE is not set +# CONFIG_BSD_PROCESS_ACCT is not set +# CONFIG_TASKSTATS is not set +# CONFIG_UTS_NS is not set +# CONFIG_AUDIT is not set +CONFIG_IKCONFIG=y +CONFIG_IKCONFIG_PROC=y +# CONFIG_SYSFS_DEPRECATED is not set +# CONFIG_RELAY is not set +CONFIG_BLK_DEV_INITRD=y +CONFIG_INITRAMFS_SOURCE="" +CONFIG_CC_OPTIMIZE_FOR_SIZE=y +CONFIG_SYSCTL=y +# CONFIG_EMBEDDED is not set +CONFIG_UID16=y +CONFIG_SYSCTL_SYSCALL=y +CONFIG_KALLSYMS=y +# CONFIG_KALLSYMS_ALL is not set +# CONFIG_KALLSYMS_EXTRA_PASS is not set +CONFIG_HOTPLUG=y +CONFIG_PRINTK=y +CONFIG_BUG=y +CONFIG_ELF_CORE=y +CONFIG_BASE_FULL=y +CONFIG_FUTEX=y +CONFIG_EPOLL=y +CONFIG_SHMEM=y +CONFIG_SLAB=y +CONFIG_VM_EVENT_COUNTERS=y +CONFIG_RT_MUTEXES=y +# CONFIG_TINY_SHMEM is not set +CONFIG_BASE_SMALL=0 +# CONFIG_SLOB is not set + +# +# Loadable module support +# +CONFIG_MODULES=y +CONFIG_MODULE_UNLOAD=y +CONFIG_MODULE_FORCE_UNLOAD=y +# CONFIG_MODVERSIONS is not set +# CONFIG_MODULE_SRCVERSION_ALL is not set +CONFIG_KMOD=y + +# +# Block layer +# +CONFIG_BLOCK=y +# CONFIG_LBD is not set +# CONFIG_BLK_DEV_IO_TRACE is not set +# CONFIG_LSF is not set + +# +# IO Schedulers +# +CONFIG_IOSCHED_NOOP=y +CONFIG_IOSCHED_AS=m +CONFIG_IOSCHED_DEADLINE=y +CONFIG_IOSCHED_CFQ=m +# CONFIG_DEFAULT_AS is not set +CONFIG_DEFAULT_DEADLINE=y +# CONFIG_DEFAULT_CFQ is not set +# CONFIG_DEFAULT_NOOP is not set +CONFIG_DEFAULT_IOSCHED="deadline" + +# +# System Type +# +# CONFIG_ARCH_AAEC2000 is not set +# CONFIG_ARCH_INTEGRATOR is not set +# CONFIG_ARCH_REALVIEW is not set +# CONFIG_ARCH_VERSATILE is not set +# CONFIG_ARCH_AT91 is not set +# CONFIG_ARCH_CLPS7500 is not set +# CONFIG_ARCH_CLPS711X is not set +# CONFIG_ARCH_CO285 is not set +# CONFIG_ARCH_EBSA110 is not set +# CONFIG_ARCH_EP93XX is not set +# CONFIG_ARCH_FOOTBRIDGE is not set +# CONFIG_ARCH_NETX is not set +# CONFIG_ARCH_H720X is not set +# CONFIG_ARCH_IMX is not set +# CONFIG_ARCH_IOP32X is not set +# CONFIG_ARCH_IOP33X is not set +# CONFIG_ARCH_IOP13XX is not set +# CONFIG_ARCH_IXP4XX is not set +# CONFIG_ARCH_IXP2000 is not set +# CONFIG_ARCH_IXP23XX is not set +# CONFIG_ARCH_L7200 is not set +# CONFIG_ARCH_NS9XXX is not set +# CONFIG_ARCH_PNX4008 is not set +# CONFIG_ARCH_PXA is not set +# CONFIG_ARCH_RPC is not set +# CONFIG_ARCH_SA1100 is not set +CONFIG_ARCH_S3C2410=y +# CONFIG_ARCH_SHARK is not set +# CONFIG_ARCH_LH7A40X is not set +# CONFIG_ARCH_OMAP is not set +CONFIG_PLAT_S3C24XX=y +CONFIG_CPU_S3C244X=y +# CONFIG_S3C2410_BOOT_WATCHDOG is not set +CONFIG_S3C2410_BOOT_ERROR_RESET=y +CONFIG_S3C2410_PM_DEBUG=y +# CONFIG_S3C2410_PM_CHECK is not set +CONFIG_S3C2410_LOWLEVEL_UART_PORT=0 +CONFIG_S3C2410_DMA=y +# CONFIG_S3C2410_DMA_DEBUG is not set +CONFIG_MACH_SMDK=y + +# +# S3C2400 Machines +# +CONFIG_CPU_S3C2410=y +CONFIG_CPU_S3C2410_DMA=y +CONFIG_S3C2410_PM=y +CONFIG_S3C2410_GPIO=y +CONFIG_S3C2410_CLOCK=y + +# +# S3C2410 Machines +# +# CONFIG_ARCH_SMDK2410 is not set +# CONFIG_ARCH_H1940 is not set +# CONFIG_MACH_N30 is not set +# CONFIG_ARCH_BAST is not set +# CONFIG_MACH_OTOM is not set +# CONFIG_MACH_AML_M5900 is not set +# CONFIG_MACH_VR1000 is not set +# CONFIG_MACH_QT2410 is not set +CONFIG_MACH_GTA01=y + +# +# S3C2412 Machines +# +# CONFIG_MACH_SMDK2413 is not set +# CONFIG_MACH_VSTMS is not set +CONFIG_CPU_S3C2440=y +CONFIG_S3C2440_DMA=y + +# +# S3C2440 Machines +# +# CONFIG_MACH_ANUBIS is not set +# CONFIG_MACH_OSIRIS is not set +# CONFIG_MACH_RX3715 is not set +CONFIG_ARCH_S3C2440=y +# CONFIG_MACH_NEXCODER_2440 is not set +CONFIG_SMDK2440_CPU2440=y +CONFIG_MACH_HXD8=y + +# +# S3C2442 Machines +# +# CONFIG_SMDK2440_CPU2442 is not set + +# +# S3C2443 Machines +# +# CONFIG_MACH_SMDK2443 is not set + +# +# Processor Type +# +CONFIG_CPU_32=y +CONFIG_CPU_ARM920T=y +CONFIG_CPU_32v4T=y +CONFIG_CPU_ABRT_EV4T=y +CONFIG_CPU_CACHE_V4WT=y +CONFIG_CPU_CACHE_VIVT=y +CONFIG_CPU_COPY_V4WB=y +CONFIG_CPU_TLB_V4WBI=y +CONFIG_CPU_CP15=y +CONFIG_CPU_CP15_MMU=y + +# +# Processor Features +# +CONFIG_ARM_THUMB=y +# CONFIG_CPU_ICACHE_DISABLE is not set +# CONFIG_CPU_DCACHE_DISABLE is not set +# CONFIG_CPU_DCACHE_WRITETHROUGH is not set +# CONFIG_OUTER_CACHE is not set + +# +# Bus support +# + +# +# PCCARD (PCMCIA/CardBus) support +# +# CONFIG_PCCARD is not set + +# +# Kernel Features +# +CONFIG_PREEMPT=y +CONFIG_NO_IDLE_HZ=y +CONFIG_HZ=200 +CONFIG_AEABI=y +CONFIG_OABI_COMPAT=y +# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set +CONFIG_SELECT_MEMORY_MODEL=y +CONFIG_FLATMEM_MANUAL=y +# CONFIG_DISCONTIGMEM_MANUAL is not set +# CONFIG_SPARSEMEM_MANUAL is not set +CONFIG_FLATMEM=y +CONFIG_FLAT_NODE_MEM_MAP=y +# CONFIG_SPARSEMEM_STATIC is not set +CONFIG_SPLIT_PTLOCK_CPUS=4096 +# CONFIG_RESOURCES_64BIT is not set +CONFIG_ZONE_DMA_FLAG=1 +CONFIG_ALIGNMENT_TRAP=y + +# +# Boot options +# +CONFIG_ZBOOT_ROM_TEXT=0x0 +CONFIG_ZBOOT_ROM_BSS=0x0 +CONFIG_CMDLINE=" ip=192.168.1.2:192.168.1.10:192.168.1.10:255.255.255.0:ezx:usb0:off debug" +# CONFIG_XIP_KERNEL is not set +CONFIG_KEXEC=y + +# +# Floating point emulation +# + +# +# At least one emulation must be selected +# +# CONFIG_FPE_NWFPE is not set +CONFIG_FPE_FASTFPE=y + +# +# Userspace binary formats +# +CONFIG_BINFMT_ELF=y +# CONFIG_BINFMT_AOUT is not set +# CONFIG_BINFMT_MISC is not set + +# +# Power management options +# +CONFIG_PM=y +CONFIG_PM_LEGACY=y +CONFIG_PM_DEBUG=y +CONFIG_DISABLE_CONSOLE_SUSPEND=y +# CONFIG_PM_SYSFS_DEPRECATED is not set +CONFIG_APM_EMULATION=y + +# +# Networking +# +CONFIG_NET=y + +# +# Networking options +# +# CONFIG_NETDEBUG is not set +CONFIG_PACKET=y +CONFIG_PACKET_MMAP=y +CONFIG_UNIX=y +CONFIG_XFRM=y +# CONFIG_XFRM_USER is not set +# CONFIG_XFRM_SUB_POLICY is not set +CONFIG_XFRM_MIGRATE=y +CONFIG_NET_KEY=m +CONFIG_NET_KEY_MIGRATE=y +CONFIG_INET=y +CONFIG_IP_MULTICAST=y +CONFIG_IP_ADVANCED_ROUTER=y +CONFIG_ASK_IP_FIB_HASH=y +# CONFIG_IP_FIB_TRIE is not set +CONFIG_IP_FIB_HASH=y +CONFIG_IP_MULTIPLE_TABLES=y +# CONFIG_IP_ROUTE_MULTIPATH is not set +# CONFIG_IP_ROUTE_VERBOSE is not set +# CONFIG_IP_PNP is not set +CONFIG_NET_IPIP=m +CONFIG_NET_IPGRE=m +# CONFIG_NET_IPGRE_BROADCAST is not set +# CONFIG_IP_MROUTE is not set +# CONFIG_ARPD is not set +CONFIG_SYN_COOKIES=y +CONFIG_INET_AH=m +CONFIG_INET_ESP=m +CONFIG_INET_IPCOMP=m +CONFIG_INET_XFRM_TUNNEL=m +CONFIG_INET_TUNNEL=m +CONFIG_INET_XFRM_MODE_TRANSPORT=m +CONFIG_INET_XFRM_MODE_TUNNEL=m +CONFIG_INET_XFRM_MODE_BEET=m +CONFIG_INET_DIAG=y +CONFIG_INET_TCP_DIAG=y +# CONFIG_TCP_CONG_ADVANCED is not set +CONFIG_TCP_CONG_CUBIC=y +CONFIG_DEFAULT_TCP_CONG="cubic" +CONFIG_TCP_MD5SIG=y + +# +# IP: Virtual Server Configuration +# +# CONFIG_IP_VS is not set +CONFIG_IPV6=m +# CONFIG_IPV6_PRIVACY is not set +# CONFIG_IPV6_ROUTER_PREF is not set +CONFIG_INET6_AH=m +CONFIG_INET6_ESP=m +CONFIG_INET6_IPCOMP=m +# CONFIG_IPV6_MIP6 is not set +CONFIG_INET6_XFRM_TUNNEL=m +CONFIG_INET6_TUNNEL=m +CONFIG_INET6_XFRM_MODE_TRANSPORT=m +CONFIG_INET6_XFRM_MODE_TUNNEL=m +CONFIG_INET6_XFRM_MODE_BEET=m +# CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set +CONFIG_IPV6_SIT=m +CONFIG_IPV6_TUNNEL=m +# CONFIG_IPV6_MULTIPLE_TABLES is not set +# CONFIG_NETWORK_SECMARK is not set +CONFIG_NETFILTER=y +# CONFIG_NETFILTER_DEBUG is not set +CONFIG_BRIDGE_NETFILTER=y + +# +# Core Netfilter Configuration +# +CONFIG_NETFILTER_NETLINK=m +CONFIG_NETFILTER_NETLINK_QUEUE=m +CONFIG_NETFILTER_NETLINK_LOG=m +CONFIG_NF_CONNTRACK_ENABLED=m +CONFIG_NF_CONNTRACK_SUPPORT=y +# CONFIG_IP_NF_CONNTRACK_SUPPORT is not set +CONFIG_NF_CONNTRACK=m +CONFIG_NF_CT_ACCT=y +CONFIG_NF_CONNTRACK_MARK=y +CONFIG_NF_CONNTRACK_EVENTS=y +CONFIG_NF_CT_PROTO_GRE=m +CONFIG_NF_CT_PROTO_SCTP=m +# CONFIG_NF_CONNTRACK_AMANDA is not set +CONFIG_NF_CONNTRACK_FTP=m +CONFIG_NF_CONNTRACK_H323=m +CONFIG_NF_CONNTRACK_IRC=m +CONFIG_NF_CONNTRACK_NETBIOS_NS=m +CONFIG_NF_CONNTRACK_PPTP=m +CONFIG_NF_CONNTRACK_SANE=m +CONFIG_NF_CONNTRACK_SIP=m +CONFIG_NF_CONNTRACK_TFTP=m +CONFIG_NF_CT_NETLINK=m +CONFIG_NETFILTER_XTABLES=m +CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m +CONFIG_NETFILTER_XT_TARGET_CONNMARK=m +CONFIG_NETFILTER_XT_TARGET_DSCP=m +CONFIG_NETFILTER_XT_TARGET_MARK=m +CONFIG_NETFILTER_XT_TARGET_NFQUEUE=m +CONFIG_NETFILTER_XT_TARGET_NFLOG=m +CONFIG_NETFILTER_XT_TARGET_TCPMSS=m +# CONFIG_NETFILTER_XT_MATCH_COMMENT is not set +CONFIG_NETFILTER_XT_MATCH_CONNBYTES=m +CONFIG_NETFILTER_XT_MATCH_CONNMARK=m +CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m +CONFIG_NETFILTER_XT_MATCH_DCCP=m +CONFIG_NETFILTER_XT_MATCH_DSCP=m +CONFIG_NETFILTER_XT_MATCH_ESP=m +CONFIG_NETFILTER_XT_MATCH_HELPER=m +CONFIG_NETFILTER_XT_MATCH_LENGTH=m +CONFIG_NETFILTER_XT_MATCH_LIMIT=m +CONFIG_NETFILTER_XT_MATCH_MAC=m +CONFIG_NETFILTER_XT_MATCH_MARK=m +CONFIG_NETFILTER_XT_MATCH_POLICY=m +CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m +CONFIG_NETFILTER_XT_MATCH_PHYSDEV=m +CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m +CONFIG_NETFILTER_XT_MATCH_QUOTA=m +CONFIG_NETFILTER_XT_MATCH_REALM=m +CONFIG_NETFILTER_XT_MATCH_SCTP=m +CONFIG_NETFILTER_XT_MATCH_STATE=m +CONFIG_NETFILTER_XT_MATCH_STATISTIC=m +CONFIG_NETFILTER_XT_MATCH_STRING=m +CONFIG_NETFILTER_XT_MATCH_TCPMSS=m +CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=m + +# +# IP: Netfilter Configuration +# +CONFIG_NF_CONNTRACK_IPV4=m +CONFIG_NF_CONNTRACK_PROC_COMPAT=y +# CONFIG_IP_NF_QUEUE is not set +CONFIG_IP_NF_IPTABLES=m +CONFIG_IP_NF_MATCH_IPRANGE=m +CONFIG_IP_NF_MATCH_TOS=m +# CONFIG_IP_NF_MATCH_RECENT is not set +CONFIG_IP_NF_MATCH_ECN=m +CONFIG_IP_NF_MATCH_AH=m +CONFIG_IP_NF_MATCH_TTL=m +CONFIG_IP_NF_MATCH_OWNER=m +CONFIG_IP_NF_MATCH_ADDRTYPE=m +CONFIG_IP_NF_FILTER=m +CONFIG_IP_NF_TARGET_REJECT=m +CONFIG_IP_NF_TARGET_LOG=m +CONFIG_IP_NF_TARGET_ULOG=m +CONFIG_NF_NAT=m +CONFIG_NF_NAT_NEEDED=y +CONFIG_IP_NF_TARGET_MASQUERADE=m +CONFIG_IP_NF_TARGET_REDIRECT=m +CONFIG_IP_NF_TARGET_NETMAP=m +CONFIG_IP_NF_TARGET_SAME=m +CONFIG_NF_NAT_SNMP_BASIC=m +CONFIG_NF_NAT_PROTO_GRE=m +CONFIG_NF_NAT_FTP=m +CONFIG_NF_NAT_IRC=m +CONFIG_NF_NAT_TFTP=m +# CONFIG_NF_NAT_AMANDA is not set +CONFIG_NF_NAT_PPTP=m +CONFIG_NF_NAT_H323=m +CONFIG_NF_NAT_SIP=m +CONFIG_IP_NF_MANGLE=m +CONFIG_IP_NF_TARGET_TOS=m +CONFIG_IP_NF_TARGET_ECN=m +CONFIG_IP_NF_TARGET_TTL=m +CONFIG_IP_NF_TARGET_CLUSTERIP=m +# CONFIG_IP_NF_RAW is not set +# CONFIG_IP_NF_ARPTABLES is not set + +# +# IPv6: Netfilter Configuration (EXPERIMENTAL) +# +CONFIG_NF_CONNTRACK_IPV6=m +# CONFIG_IP6_NF_QUEUE is not set +CONFIG_IP6_NF_IPTABLES=m +CONFIG_IP6_NF_MATCH_RT=m +CONFIG_IP6_NF_MATCH_OPTS=m +CONFIG_IP6_NF_MATCH_FRAG=m +CONFIG_IP6_NF_MATCH_HL=m +CONFIG_IP6_NF_MATCH_OWNER=m +CONFIG_IP6_NF_MATCH_IPV6HEADER=m +CONFIG_IP6_NF_MATCH_AH=m +CONFIG_IP6_NF_MATCH_MH=m +CONFIG_IP6_NF_MATCH_EUI64=m +CONFIG_IP6_NF_FILTER=m +CONFIG_IP6_NF_TARGET_LOG=m +CONFIG_IP6_NF_TARGET_REJECT=m +CONFIG_IP6_NF_MANGLE=m +CONFIG_IP6_NF_TARGET_HL=m +# CONFIG_IP6_NF_RAW is not set + +# +# Bridge: Netfilter Configuration +# +CONFIG_BRIDGE_NF_EBTABLES=m +CONFIG_BRIDGE_EBT_BROUTE=m +CONFIG_BRIDGE_EBT_T_FILTER=m +CONFIG_BRIDGE_EBT_T_NAT=m +CONFIG_BRIDGE_EBT_802_3=m +CONFIG_BRIDGE_EBT_AMONG=m +CONFIG_BRIDGE_EBT_ARP=m +CONFIG_BRIDGE_EBT_IP=m +CONFIG_BRIDGE_EBT_LIMIT=m +CONFIG_BRIDGE_EBT_MARK=m +CONFIG_BRIDGE_EBT_PKTTYPE=m +CONFIG_BRIDGE_EBT_STP=m +CONFIG_BRIDGE_EBT_VLAN=m +CONFIG_BRIDGE_EBT_ARPREPLY=m +CONFIG_BRIDGE_EBT_DNAT=m +CONFIG_BRIDGE_EBT_MARK_T=m +CONFIG_BRIDGE_EBT_REDIRECT=m +CONFIG_BRIDGE_EBT_SNAT=m +CONFIG_BRIDGE_EBT_LOG=m +CONFIG_BRIDGE_EBT_ULOG=m + +# +# DCCP Configuration (EXPERIMENTAL) +# +# CONFIG_IP_DCCP is not set + +# +# SCTP Configuration (EXPERIMENTAL) +# +# CONFIG_IP_SCTP is not set + +# +# TIPC Configuration (EXPERIMENTAL) +# +# CONFIG_TIPC is not set +# CONFIG_ATM is not set +CONFIG_BRIDGE=y +# CONFIG_VLAN_8021Q is not set +# CONFIG_DECNET is not set +CONFIG_LLC=y +# CONFIG_LLC2 is not set +# CONFIG_IPX is not set +# CONFIG_ATALK is not set +# CONFIG_X25 is not set +# CONFIG_LAPB is not set +# CONFIG_ECONET is not set +# CONFIG_WAN_ROUTER is not set + +# +# QoS and/or fair queueing +# +CONFIG_NET_SCHED=y +CONFIG_NET_SCH_FIFO=y +# CONFIG_NET_SCH_CLK_JIFFIES is not set +CONFIG_NET_SCH_CLK_GETTIMEOFDAY=y +# CONFIG_NET_SCH_CLK_CPU is not set + +# +# Queueing/Scheduling +# +CONFIG_NET_SCH_CBQ=m +CONFIG_NET_SCH_HTB=m +CONFIG_NET_SCH_HFSC=m +CONFIG_NET_SCH_PRIO=m +CONFIG_NET_SCH_RED=m +CONFIG_NET_SCH_SFQ=m +CONFIG_NET_SCH_TEQL=m +CONFIG_NET_SCH_TBF=m +CONFIG_NET_SCH_GRED=m +CONFIG_NET_SCH_DSMARK=m +CONFIG_NET_SCH_NETEM=m +CONFIG_NET_SCH_INGRESS=m + +# +# Classification +# +CONFIG_NET_CLS=y +CONFIG_NET_CLS_BASIC=m +CONFIG_NET_CLS_TCINDEX=m +CONFIG_NET_CLS_ROUTE4=m +CONFIG_NET_CLS_ROUTE=y +CONFIG_NET_CLS_FW=m +CONFIG_NET_CLS_U32=m +CONFIG_CLS_U32_PERF=y +CONFIG_CLS_U32_MARK=y +CONFIG_NET_CLS_RSVP=m +CONFIG_NET_CLS_RSVP6=m +# CONFIG_NET_EMATCH is not set +# CONFIG_NET_CLS_ACT is not set +# CONFIG_NET_CLS_POLICE is not set +# CONFIG_NET_CLS_IND is not set +CONFIG_NET_ESTIMATOR=y + +# +# Network testing +# +# CONFIG_NET_PKTGEN is not set +# CONFIG_HAMRADIO is not set +# CONFIG_IRDA is not set +CONFIG_BT=m +CONFIG_BT_L2CAP=m +CONFIG_BT_SCO=m +CONFIG_BT_RFCOMM=m +CONFIG_BT_RFCOMM_TTY=y +CONFIG_BT_BNEP=m +CONFIG_BT_BNEP_MC_FILTER=y +CONFIG_BT_BNEP_PROTO_FILTER=y +CONFIG_BT_HIDP=m + +# +# Bluetooth device drivers +# +CONFIG_BT_HCIUSB=m +CONFIG_BT_HCIUSB_SCO=y +# CONFIG_BT_HCIUART is not set +# CONFIG_BT_HCIBCM203X is not set +# CONFIG_BT_HCIBPA10X is not set +# CONFIG_BT_HCIBFUSB is not set +# CONFIG_BT_HCIVHCI is not set +# CONFIG_IEEE80211 is not set +CONFIG_FIB_RULES=y + +# +# Device Drivers +# + +# +# Generic Driver Options +# +CONFIG_STANDALONE=y +CONFIG_PREVENT_FIRMWARE_BUILD=y +CONFIG_FW_LOADER=m +# CONFIG_DEBUG_DRIVER is not set +# CONFIG_DEBUG_DEVRES is not set +# CONFIG_SYS_HYPERVISOR is not set + +# +# Connector - unified userspace <-> kernelspace linker +# +CONFIG_CONNECTOR=m + +# +# Memory Technology Devices (MTD) +# +CONFIG_MTD=y +# CONFIG_MTD_DEBUG is not set +# CONFIG_MTD_CONCAT is not set +CONFIG_MTD_PARTITIONS=y +# CONFIG_MTD_REDBOOT_PARTS is not set +CONFIG_MTD_CMDLINE_PARTS=y +# CONFIG_MTD_AFS_PARTS is not set + +# +# User Modules And Translation Layers +# +CONFIG_MTD_CHAR=y +CONFIG_MTD_BLKDEVS=y +CONFIG_MTD_BLOCK=y +# CONFIG_FTL is not set +# CONFIG_NFTL is not set +# CONFIG_INFTL is not set +# CONFIG_RFD_FTL is not set +# CONFIG_SSFDC is not set + +# +# RAM/ROM/Flash chip drivers +# +# CONFIG_MTD_CFI is not set +# CONFIG_MTD_JEDECPROBE is not set +CONFIG_MTD_MAP_BANK_WIDTH_1=y +CONFIG_MTD_MAP_BANK_WIDTH_2=y +CONFIG_MTD_MAP_BANK_WIDTH_4=y +# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set +CONFIG_MTD_CFI_I1=y +CONFIG_MTD_CFI_I2=y +# CONFIG_MTD_CFI_I4 is not set +# CONFIG_MTD_CFI_I8 is not set +# CONFIG_MTD_RAM is not set +# CONFIG_MTD_ROM is not set +# CONFIG_MTD_ABSENT is not set +# CONFIG_MTD_OBSOLETE_CHIPS is not set + +# +# Mapping drivers for chip access +# +# CONFIG_MTD_COMPLEX_MAPPINGS is not set +# CONFIG_MTD_PLATRAM is not set + +# +# Self-contained MTD device drivers +# +# CONFIG_MTD_DATAFLASH is not set +# CONFIG_MTD_M25P80 is not set +# CONFIG_MTD_SLRAM is not set +# CONFIG_MTD_PHRAM is not set +# CONFIG_MTD_MTDRAM is not set +# CONFIG_MTD_BLOCK2MTD is not set + +# +# Disk-On-Chip Device Drivers +# +# CONFIG_MTD_DOC2000 is not set +# CONFIG_MTD_DOC2001 is not set +# CONFIG_MTD_DOC2001PLUS is not set + +# +# NAND Flash Device Drivers +# +CONFIG_MTD_NAND=y +CONFIG_MTD_NAND_VERIFY_WRITE=y +# CONFIG_MTD_NAND_ECC_SMC is not set +CONFIG_MTD_NAND_IDS=y +CONFIG_MTD_NAND_S3C2410=y +CONFIG_MTD_NAND_S3C2410_BBT=y +# CONFIG_MTD_NAND_S3C2410_DEBUG is not set +CONFIG_MTD_NAND_S3C2410_HWECC=y +CONFIG_MTD_NAND_S3C2410_CLKSTOP=y +# CONFIG_MTD_NAND_DISKONCHIP is not set +# CONFIG_MTD_NAND_NANDSIM is not set + +# +# OneNAND Flash Device Drivers +# +# CONFIG_MTD_ONENAND is not set + +# +# Parallel port support +# +# CONFIG_PARPORT is not set + +# +# Plug and Play support +# +# CONFIG_PNPACPI is not set + +# +# Block devices +# +# CONFIG_BLK_DEV_COW_COMMON is not set +CONFIG_BLK_DEV_LOOP=m +# CONFIG_BLK_DEV_CRYPTOLOOP is not set +# CONFIG_BLK_DEV_NBD is not set +CONFIG_BLK_DEV_UB=m +CONFIG_BLK_DEV_RAM=y +CONFIG_BLK_DEV_RAM_COUNT=16 +CONFIG_BLK_DEV_RAM_SIZE=4096 +CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024 +# CONFIG_CDROM_PKTCDVD is not set +# CONFIG_ATA_OVER_ETH is not set + +# +# ATA/ATAPI/MFM/RLL support +# +# CONFIG_IDE is not set + +# +# SCSI device support +# +# CONFIG_RAID_ATTRS is not set +CONFIG_SCSI=m +# CONFIG_SCSI_TGT is not set +# CONFIG_SCSI_NETLINK is not set +CONFIG_SCSI_PROC_FS=y + +# +# SCSI support type (disk, tape, CD-ROM) +# +CONFIG_BLK_DEV_SD=m +# CONFIG_CHR_DEV_ST is not set +# CONFIG_CHR_DEV_OSST is not set +CONFIG_BLK_DEV_SR=m +# CONFIG_BLK_DEV_SR_VENDOR is not set +CONFIG_CHR_DEV_SG=m +# CONFIG_CHR_DEV_SCH is not set + +# +# Some SCSI devices (e.g. CD jukebox) support multiple LUNs +# +# CONFIG_SCSI_MULTI_LUN is not set +# CONFIG_SCSI_CONSTANTS is not set +# CONFIG_SCSI_LOGGING is not set +CONFIG_SCSI_SCAN_ASYNC=y + +# +# SCSI Transports +# +# CONFIG_SCSI_SPI_ATTRS is not set +# CONFIG_SCSI_FC_ATTRS is not set +# CONFIG_SCSI_ISCSI_ATTRS is not set +# CONFIG_SCSI_SAS_ATTRS is not set +# CONFIG_SCSI_SAS_LIBSAS is not set + +# +# SCSI low-level drivers +# +# CONFIG_ISCSI_TCP is not set +# CONFIG_SCSI_DEBUG is not set + +# +# Serial ATA (prod) and Parallel ATA (experimental) drivers +# +# CONFIG_ATA is not set + +# +# Multi-device support (RAID and LVM) +# +CONFIG_MD=y +# CONFIG_BLK_DEV_MD is not set +CONFIG_BLK_DEV_DM=m +# CONFIG_DM_DEBUG is not set +CONFIG_DM_CRYPT=m +CONFIG_DM_SNAPSHOT=m +# CONFIG_DM_MIRROR is not set +# CONFIG_DM_ZERO is not set +# CONFIG_DM_MULTIPATH is not set + +# +# Fusion MPT device support +# +# CONFIG_FUSION is not set + +# +# IEEE 1394 (FireWire) support +# + +# +# I2O device support +# + +# +# Network device support +# +CONFIG_NETDEVICES=y +# CONFIG_DUMMY is not set +# CONFIG_BONDING is not set +# CONFIG_EQUALIZER is not set +CONFIG_TUN=m + +# +# PHY device support +# +# CONFIG_PHYLIB is not set + +# +# Ethernet (10 or 100Mbit) +# +CONFIG_NET_ETHERNET=y +CONFIG_MII=m +# CONFIG_SMC91X is not set +# CONFIG_DM9000 is not set + +# +# Ethernet (1000 Mbit) +# + +# +# Ethernet (10000 Mbit) +# + +# +# Token Ring devices +# + +# +# Wireless LAN (non-hamradio) +# +# CONFIG_NET_RADIO is not set + +# +# Wan interfaces +# +# CONFIG_WAN is not set +CONFIG_PPP=m +CONFIG_PPP_MULTILINK=y +CONFIG_PPP_FILTER=y +CONFIG_PPP_ASYNC=m +CONFIG_PPP_SYNC_TTY=m +CONFIG_PPP_DEFLATE=m +CONFIG_PPP_BSDCOMP=m +CONFIG_PPP_MPPE=m +# CONFIG_PPPOE is not set +# CONFIG_SLIP is not set +CONFIG_SLHC=m +# CONFIG_SHAPER is not set +# CONFIG_NETCONSOLE is not set +# CONFIG_NETPOLL is not set +# CONFIG_NET_POLL_CONTROLLER is not set + +# +# ISDN subsystem +# +# CONFIG_ISDN is not set + +# +# Input device support +# +CONFIG_INPUT=y +# CONFIG_INPUT_FF_MEMLESS is not set + +# +# Userland interfaces +# +CONFIG_INPUT_MOUSEDEV=y +# CONFIG_INPUT_MOUSEDEV_PSAUX is not set +CONFIG_INPUT_MOUSEDEV_SCREEN_X=480 +CONFIG_INPUT_MOUSEDEV_SCREEN_Y=640 +# CONFIG_INPUT_JOYDEV is not set +# CONFIG_INPUT_TSDEV is not set +CONFIG_INPUT_EVDEV=y +CONFIG_INPUT_EVBUG=m + +# +# Input Device Drivers +# +CONFIG_INPUT_KEYBOARD=y +# CONFIG_KEYBOARD_ATKBD is not set +# CONFIG_KEYBOARD_SUNKBD is not set +# CONFIG_KEYBOARD_LKKBD is not set +# CONFIG_KEYBOARD_XTKBD is not set +# CONFIG_KEYBOARD_NEWTON is not set +CONFIG_KEYBOARD_STOWAWAY=m +CONFIG_KEYBOARD_GPIO=m +CONFIG_KEYBOARD_GTA01=y +CONFIG_INPUT_MOUSE=y +# CONFIG_MOUSE_PS2 is not set +# CONFIG_MOUSE_SERIAL is not set +# CONFIG_MOUSE_VSXXXAA is not set +# CONFIG_INPUT_JOYSTICK is not set +CONFIG_INPUT_TOUCHSCREEN=y +# CONFIG_TOUCHSCREEN_ADS7846 is not set +CONFIG_TOUCHSCREEN_S3C2410=y +# CONFIG_TOUCHSCREEN_S3C2410_DEBUG is not set +# CONFIG_TOUCHSCREEN_GUNZE is not set +# CONFIG_TOUCHSCREEN_ELO is not set +# CONFIG_TOUCHSCREEN_MTOUCH is not set +# CONFIG_TOUCHSCREEN_MK712 is not set +# CONFIG_TOUCHSCREEN_PENMOUNT is not set +# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set +# CONFIG_TOUCHSCREEN_TOUCHWIN is not set +# CONFIG_TOUCHSCREEN_UCB1400 is not set +# CONFIG_INPUT_MISC is not set + +# +# Hardware I/O ports +# +CONFIG_SERIO=y +# CONFIG_SERIO_SERPORT is not set +# CONFIG_SERIO_RAW is not set +# CONFIG_GAMEPORT is not set + +# +# Character devices +# +CONFIG_VT=y +CONFIG_VT_CONSOLE=y +CONFIG_NR_TTY_DEVICES=4 +CONFIG_HW_CONSOLE=y +CONFIG_VT_HW_CONSOLE_BINDING=y +# CONFIG_SERIAL_NONSTANDARD is not set + +# +# Serial drivers +# +# CONFIG_SERIAL_8250 is not set + +# +# Non-8250 serial port support +# +CONFIG_SERIAL_S3C2410=y +CONFIG_SERIAL_S3C2410_CONSOLE=y +CONFIG_SERIAL_CORE=y +CONFIG_SERIAL_CORE_CONSOLE=y +CONFIG_UNIX98_PTYS=y +# CONFIG_LEGACY_PTYS is not set + +# +# IPMI +# +# CONFIG_IPMI_HANDLER is not set + +# +# Watchdog Cards +# +CONFIG_WATCHDOG=y +# CONFIG_WATCHDOG_NOWAYOUT is not set + +# +# Watchdog Device Drivers +# +# CONFIG_SOFT_WATCHDOG is not set +CONFIG_S3C2410_WATCHDOG=m + +# +# USB-based Watchdog Cards +# +# CONFIG_USBPCWATCHDOG is not set +# CONFIG_HW_RANDOM is not set +# CONFIG_NVRAM is not set +# CONFIG_DTLK is not set +# CONFIG_R3964 is not set +# CONFIG_RAW_DRIVER is not set + +# +# TPM devices +# +# CONFIG_TCG_TPM is not set +# CONFIG_TS0710_MUX is not set + +# +# I2C support +# +CONFIG_I2C=y +CONFIG_I2C_CHARDEV=y + +# +# I2C Algorithms +# +# CONFIG_I2C_ALGOBIT is not set +# CONFIG_I2C_ALGOPCF is not set +# CONFIG_I2C_ALGOPCA is not set + +# +# I2C Hardware Bus support +# +# CONFIG_I2C_OCORES is not set +# CONFIG_I2C_PARPORT_LIGHT is not set +CONFIG_I2C_S3C2410=y +# CONFIG_I2C_STUB is not set +# CONFIG_I2C_PCA_ISA is not set + +# +# Miscellaneous I2C Chip support +# +# CONFIG_SENSORS_DS1337 is not set +# CONFIG_SENSORS_DS1374 is not set +# CONFIG_SENSORS_EEPROM is not set +CONFIG_SENSORS_PCF50606=y +# CONFIG_SENSORS_PCF8574 is not set +# CONFIG_SENSORS_PCA9539 is not set +# CONFIG_SENSORS_PCF8591 is not set +# CONFIG_SENSORS_MAX6875 is not set +# CONFIG_I2C_DEBUG_CORE is not set +# CONFIG_I2C_DEBUG_ALGO is not set +# CONFIG_I2C_DEBUG_BUS is not set +# CONFIG_I2C_DEBUG_CHIP is not set + +# +# SPI support +# +CONFIG_SPI=y +# CONFIG_SPI_DEBUG is not set +CONFIG_SPI_MASTER=y + +# +# SPI Master Controller Drivers +# +CONFIG_SPI_BITBANG=y +CONFIG_SPI_S3C24XX=y +CONFIG_SPI_S3C24XX_GPIO=y + +# +# SPI Protocol Masters +# +# CONFIG_SPI_AT25 is not set +CONFIG_SPI_SLAVE_JBT6K74=y + +# +# Dallas's 1-wire bus +# +# CONFIG_W1 is not set + +# +# Hardware Monitoring support +# +CONFIG_HWMON=y +# CONFIG_HWMON_VID is not set +# CONFIG_SENSORS_ABITUGURU is not set +# CONFIG_SENSORS_ADM1021 is not set +# CONFIG_SENSORS_ADM1025 is not set +# CONFIG_SENSORS_ADM1026 is not set +# CONFIG_SENSORS_ADM1029 is not set +# CONFIG_SENSORS_ADM1031 is not set +# CONFIG_SENSORS_ADM9240 is not set +# CONFIG_SENSORS_ASB100 is not set +# CONFIG_SENSORS_ATXP1 is not set +# CONFIG_SENSORS_DS1621 is not set +# CONFIG_SENSORS_F71805F is not set +# CONFIG_SENSORS_FSCHER is not set +# CONFIG_SENSORS_FSCPOS is not set +# CONFIG_SENSORS_GL518SM is not set +# CONFIG_SENSORS_GL520SM is not set +# CONFIG_SENSORS_IT87 is not set +# CONFIG_SENSORS_LM63 is not set +# CONFIG_SENSORS_LM70 is not set +# CONFIG_SENSORS_LM75 is not set +# CONFIG_SENSORS_LM77 is not set +# CONFIG_SENSORS_LM78 is not set +# CONFIG_SENSORS_LM80 is not set +# CONFIG_SENSORS_LM83 is not set +# CONFIG_SENSORS_LM85 is not set +# CONFIG_SENSORS_LM87 is not set +# CONFIG_SENSORS_LM90 is not set +# CONFIG_SENSORS_LM92 is not set +# CONFIG_SENSORS_MAX1619 is not set +# CONFIG_SENSORS_PC87360 is not set +# CONFIG_SENSORS_PC87427 is not set +# CONFIG_SENSORS_SMSC47M1 is not set +# CONFIG_SENSORS_SMSC47M192 is not set +# CONFIG_SENSORS_SMSC47B397 is not set +# CONFIG_SENSORS_VT1211 is not set +# CONFIG_SENSORS_W83781D is not set +# CONFIG_SENSORS_W83791D is not set +# CONFIG_SENSORS_W83792D is not set +# CONFIG_SENSORS_W83793 is not set +# CONFIG_SENSORS_W83L785TS is not set +# CONFIG_SENSORS_W83627HF is not set +# CONFIG_SENSORS_W83627EHF is not set +# CONFIG_HWMON_DEBUG_CHIP is not set + +# +# Misc devices +# + +# +# Multifunction device drivers +# +# CONFIG_MFD_SM501 is not set + +# +# LED devices +# +CONFIG_NEW_LEDS=y +CONFIG_LEDS_CLASS=y + +# +# LED drivers +# +CONFIG_LEDS_S3C24XX=m +CONFIG_LEDS_GTA01=y + +# +# LED Triggers +# +CONFIG_LEDS_TRIGGERS=y +CONFIG_LEDS_TRIGGER_TIMER=y +# CONFIG_LEDS_TRIGGER_HEARTBEAT is not set + +# +# Multimedia devices +# +# CONFIG_VIDEO_DEV is not set + +# +# Digital Video Broadcasting Devices +# +# CONFIG_DVB is not set +# CONFIG_USB_DABUSB is not set + +# +# Graphics support +# +CONFIG_BACKLIGHT_LCD_SUPPORT=y +CONFIG_BACKLIGHT_CLASS_DEVICE=y +CONFIG_LCD_CLASS_DEVICE=y +CONFIG_FB=y +# CONFIG_FIRMWARE_EDID is not set +# CONFIG_FB_DDC is not set +CONFIG_FB_CFB_FILLRECT=y +CONFIG_FB_CFB_COPYAREA=y +CONFIG_FB_CFB_IMAGEBLIT=y +# CONFIG_FB_SVGALIB is not set +# CONFIG_FB_MACMODES is not set +# CONFIG_FB_BACKLIGHT is not set +# CONFIG_FB_MODE_HELPERS is not set +# CONFIG_FB_TILEBLITTING is not set + +# +# Frame buffer hardware drivers +# +# CONFIG_FB_S1D13XXX is not set +CONFIG_FB_S3C2410=y +CONFIG_FB_S3C2410_DEBUG=y +# CONFIG_FB_VIRTUAL is not set + +# +# Console display driver support +# +# CONFIG_VGA_CONSOLE is not set +CONFIG_DUMMY_CONSOLE=y +CONFIG_FRAMEBUFFER_CONSOLE=y +# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set +CONFIG_FONTS=y +# CONFIG_FONT_8x8 is not set +# CONFIG_FONT_8x16 is not set +CONFIG_FONT_6x11=y +# CONFIG_FONT_7x14 is not set +# CONFIG_FONT_PEARL_8x8 is not set +# CONFIG_FONT_ACORN_8x8 is not set +# CONFIG_FONT_MINI_4x6 is not set +# CONFIG_FONT_SUN8x16 is not set +# CONFIG_FONT_SUN12x22 is not set +# CONFIG_FONT_10x18 is not set + +# +# Logo configuration +# +CONFIG_LOGO=y +# CONFIG_LOGO_LINUX_MONO is not set +# CONFIG_LOGO_LINUX_VGA16 is not set +CONFIG_LOGO_LINUX_CLUT224=y + +# +# Sound +# +CONFIG_SOUND=y + +# +# Advanced Linux Sound Architecture +# +CONFIG_SND=y +CONFIG_SND_TIMER=y +CONFIG_SND_PCM=y +CONFIG_SND_HWDEP=m +CONFIG_SND_RAWMIDI=m +# CONFIG_SND_SEQUENCER is not set +CONFIG_SND_OSSEMUL=y +CONFIG_SND_MIXER_OSS=y +CONFIG_SND_PCM_OSS=y +CONFIG_SND_PCM_OSS_PLUGINS=y +# CONFIG_SND_DYNAMIC_MINORS is not set +CONFIG_SND_SUPPORT_OLD_API=y +CONFIG_SND_VERBOSE_PROCFS=y +# CONFIG_SND_VERBOSE_PRINTK is not set +# CONFIG_SND_DEBUG is not set + +# +# Generic devices +# +# CONFIG_SND_DUMMY is not set +# CONFIG_SND_MTPAV is not set +# CONFIG_SND_SERIAL_U16550 is not set +# CONFIG_SND_MPU401 is not set + +# +# ALSA ARM devices +# + +# +# USB devices +# +CONFIG_SND_USB_AUDIO=m + +# +# SoC audio support +# +CONFIG_SND_SOC=y + +# +# SoC Platforms +# + +# +# SoC Audio for the Atmel AT91 +# + +# +# SoC Audio for the Intel PXA2xx +# + +# +# Open Sound System +# +# CONFIG_SOUND_PRIME is not set + +# +# HID Devices +# +CONFIG_HID=y +# CONFIG_HID_DEBUG is not set + +# +# USB support +# +CONFIG_USB_ARCH_HAS_HCD=y +CONFIG_USB_ARCH_HAS_OHCI=y +# CONFIG_USB_ARCH_HAS_EHCI is not set +CONFIG_USB=y +# CONFIG_USB_DEBUG is not set + +# +# Miscellaneous USB options +# +CONFIG_USB_DEVICEFS=y +# CONFIG_USB_DYNAMIC_MINORS is not set +# CONFIG_USB_SUSPEND is not set +# CONFIG_USB_OTG is not set + +# +# USB Host Controller Drivers +# +# CONFIG_USB_ISP116X_HCD is not set +CONFIG_USB_OHCI_HCD=m +# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set +# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set +CONFIG_USB_OHCI_LITTLE_ENDIAN=y +# CONFIG_USB_SL811_HCD is not set + +# +# USB Device Class drivers +# +CONFIG_USB_ACM=m +CONFIG_USB_PRINTER=m + +# +# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' +# + +# +# may also be needed; see USB_STORAGE Help for more information +# +CONFIG_USB_STORAGE=m +# CONFIG_USB_STORAGE_DEBUG is not set +CONFIG_USB_STORAGE_DATAFAB=y +CONFIG_USB_STORAGE_FREECOM=y +CONFIG_USB_STORAGE_DPCM=y +CONFIG_USB_STORAGE_USBAT=y +CONFIG_USB_STORAGE_SDDR09=y +CONFIG_USB_STORAGE_SDDR55=y +CONFIG_USB_STORAGE_JUMPSHOT=y +CONFIG_USB_STORAGE_ALAUDA=y +CONFIG_USB_STORAGE_KARMA=y +CONFIG_USB_LIBUSUAL=y + +# +# USB Input Devices +# +CONFIG_USB_HID=m +# CONFIG_USB_HIDINPUT_POWERBOOK is not set +# CONFIG_HID_FF is not set +# CONFIG_USB_HIDDEV is not set + +# +# USB HID Boot Protocol drivers +# +# CONFIG_USB_KBD is not set +# CONFIG_USB_MOUSE is not set +# CONFIG_USB_AIPTEK is not set +# CONFIG_USB_WACOM is not set +# CONFIG_USB_ACECAD is not set +# CONFIG_USB_KBTAB is not set +# CONFIG_USB_POWERMATE is not set +# CONFIG_USB_TOUCHSCREEN is not set +# CONFIG_USB_YEALINK is not set +# CONFIG_USB_XPAD is not set +# CONFIG_USB_ATI_REMOTE is not set +# CONFIG_USB_ATI_REMOTE2 is not set +# CONFIG_USB_KEYSPAN_REMOTE is not set +# CONFIG_USB_APPLETOUCH is not set +CONFIG_USB_GTCO=m + +# +# USB Imaging devices +# +# CONFIG_USB_MDC800 is not set +# CONFIG_USB_MICROTEK is not set + +# +# USB Network Adapters +# +CONFIG_USB_CATC=m +CONFIG_USB_KAWETH=m +CONFIG_USB_PEGASUS=m +CONFIG_USB_RTL8150=m +CONFIG_USB_USBNET_MII=m +CONFIG_USB_USBNET=m +CONFIG_USB_NET_AX8817X=m +CONFIG_USB_NET_CDCETHER=m +CONFIG_USB_NET_DM9601=m +CONFIG_USB_NET_GL620A=m +CONFIG_USB_NET_NET1080=m +CONFIG_USB_NET_PLUSB=m +CONFIG_USB_NET_MCS7830=m +CONFIG_USB_NET_RNDIS_HOST=m +CONFIG_USB_NET_CDC_SUBSET=m +CONFIG_USB_ALI_M5632=y +CONFIG_USB_AN2720=y +CONFIG_USB_BELKIN=y +CONFIG_USB_ARMLINUX=y +CONFIG_USB_EPSON2888=y +CONFIG_USB_KC2190=y +CONFIG_USB_NET_ZAURUS=m +CONFIG_USB_MON=y + +# +# USB port drivers +# + +# +# USB Serial Converter support +# +CONFIG_USB_SERIAL=m +CONFIG_USB_SERIAL_GENERIC=y +CONFIG_USB_SERIAL_AIRCABLE=m +CONFIG_USB_SERIAL_AIRPRIME=m +CONFIG_USB_SERIAL_ARK3116=m +CONFIG_USB_SERIAL_BELKIN=m +CONFIG_USB_SERIAL_WHITEHEAT=m +CONFIG_USB_SERIAL_DIGI_ACCELEPORT=m +CONFIG_USB_SERIAL_CP2101=m +CONFIG_USB_SERIAL_CYPRESS_M8=m +CONFIG_USB_SERIAL_EMPEG=m +CONFIG_USB_SERIAL_FTDI_SIO=m +CONFIG_USB_SERIAL_FUNSOFT=m +CONFIG_USB_SERIAL_VISOR=m +CONFIG_USB_SERIAL_IPAQ=m +CONFIG_USB_SERIAL_IR=m +CONFIG_USB_SERIAL_EDGEPORT=m +CONFIG_USB_SERIAL_EDGEPORT_TI=m +CONFIG_USB_SERIAL_GARMIN=m +CONFIG_USB_SERIAL_IPW=m +CONFIG_USB_SERIAL_KEYSPAN_PDA=m +CONFIG_USB_SERIAL_KEYSPAN=m +CONFIG_USB_SERIAL_KEYSPAN_MPR=y +CONFIG_USB_SERIAL_KEYSPAN_USA28=y +CONFIG_USB_SERIAL_KEYSPAN_USA28X=y +CONFIG_USB_SERIAL_KEYSPAN_USA28XA=y +CONFIG_USB_SERIAL_KEYSPAN_USA28XB=y +CONFIG_USB_SERIAL_KEYSPAN_USA19=y +CONFIG_USB_SERIAL_KEYSPAN_USA18X=y +CONFIG_USB_SERIAL_KEYSPAN_USA19W=y +CONFIG_USB_SERIAL_KEYSPAN_USA19QW=y +CONFIG_USB_SERIAL_KEYSPAN_USA19QI=y +CONFIG_USB_SERIAL_KEYSPAN_USA49W=y +CONFIG_USB_SERIAL_KEYSPAN_USA49WLC=y +CONFIG_USB_SERIAL_KLSI=m +CONFIG_USB_SERIAL_KOBIL_SCT=m +CONFIG_USB_SERIAL_MCT_U232=m +CONFIG_USB_SERIAL_MOS7720=m +CONFIG_USB_SERIAL_MOS7840=m +CONFIG_USB_SERIAL_NAVMAN=m +CONFIG_USB_SERIAL_PL2303=m +CONFIG_USB_SERIAL_HP4X=m +CONFIG_USB_SERIAL_SAFE=m +CONFIG_USB_SERIAL_SAFE_PADDED=y +CONFIG_USB_SERIAL_SIERRAWIRELESS=m +CONFIG_USB_SERIAL_TI=m +CONFIG_USB_SERIAL_CYBERJACK=m +CONFIG_USB_SERIAL_XIRCOM=m +CONFIG_USB_SERIAL_OPTION=m +CONFIG_USB_SERIAL_OMNINET=m +# CONFIG_USB_SERIAL_DEBUG is not set +CONFIG_USB_EZUSB=y + +# +# USB Miscellaneous drivers +# +# CONFIG_USB_EMI62 is not set +# CONFIG_USB_EMI26 is not set +# CONFIG_USB_ADUTUX is not set +# CONFIG_USB_AUERSWALD is not set +# CONFIG_USB_RIO500 is not set +# CONFIG_USB_LEGOTOWER is not set +# CONFIG_USB_LCD is not set +CONFIG_USB_BERRY_CHARGE=m +# CONFIG_USB_LED is not set +# CONFIG_USB_CYPRESS_CY7C63 is not set +# CONFIG_USB_CYTHERM is not set +# CONFIG_USB_PHIDGET is not set +# CONFIG_USB_IDMOUSE is not set +# CONFIG_USB_FTDI_ELAN is not set +# CONFIG_USB_APPLEDISPLAY is not set +# CONFIG_USB_LD is not set +CONFIG_USB_TRANCEVIBRATOR=m +CONFIG_USB_IOWARRIOR=m +# CONFIG_USB_TEST is not set + +# +# USB DSL modem support +# + +# +# USB Gadget Support +# +CONFIG_USB_GADGET=y +# CONFIG_USB_GADGET_DEBUG_FILES is not set +CONFIG_USB_GADGET_SELECTED=y +# CONFIG_USB_GADGET_NET2280 is not set +# CONFIG_USB_GADGET_PXA2XX is not set +# CONFIG_USB_GADGET_GOKU is not set +# CONFIG_USB_GADGET_LH7A40X is not set +# CONFIG_USB_GADGET_OMAP is not set +CONFIG_USB_GADGET_S3C2410=y +CONFIG_USB_S3C2410=y +# CONFIG_USB_S3C2410_DEBUG is not set +# CONFIG_USB_GADGET_AT91 is not set +# CONFIG_USB_GADGET_DUMMY_HCD is not set +# CONFIG_USB_GADGET_DUALSPEED is not set +# CONFIG_USB_ZERO is not set +CONFIG_USB_ETH=y +CONFIG_USB_ETH_RNDIS=y +# CONFIG_USB_GADGETFS is not set +# CONFIG_USB_FILE_STORAGE is not set +# CONFIG_USB_G_SERIAL is not set +# CONFIG_USB_MIDI_GADGET is not set + +# +# MMC/SD Card support +# +CONFIG_MMC=y +# CONFIG_MMC_DEBUG is not set +CONFIG_MMC_BLOCK=y +CONFIG_MMC_S3C=m + +# +# Real Time Clock +# +CONFIG_RTC_LIB=y +CONFIG_RTC_CLASS=y +# CONFIG_RTC_HCTOSYS is not set +CONFIG_RTC_DEBUG=y + +# +# RTC interfaces +# +CONFIG_RTC_INTF_SYSFS=y +CONFIG_RTC_INTF_PROC=y +CONFIG_RTC_INTF_DEV=y +# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set + +# +# RTC drivers +# +# CONFIG_RTC_DRV_CMOS is not set +# CONFIG_RTC_DRV_X1205 is not set +# CONFIG_RTC_DRV_DS1307 is not set +# CONFIG_RTC_DRV_DS1553 is not set +# CONFIG_RTC_DRV_ISL1208 is not set +# CONFIG_RTC_DRV_DS1672 is not set +# CONFIG_RTC_DRV_DS1742 is not set +# CONFIG_RTC_DRV_PCF8563 is not set +# CONFIG_RTC_DRV_RS5C348 is not set +# CONFIG_RTC_DRV_RS5C372 is not set +CONFIG_RTC_DRV_S3C=m +# CONFIG_RTC_DRV_M48T86 is not set +# CONFIG_RTC_DRV_TEST is not set +# CONFIG_RTC_DRV_MAX6902 is not set +# CONFIG_RTC_DRV_V3020 is not set + +# +# File systems +# +CONFIG_EXT2_FS=m +# CONFIG_EXT2_FS_XATTR is not set +# CONFIG_EXT2_FS_XIP is not set +CONFIG_EXT3_FS=y +# CONFIG_EXT3_FS_XATTR is not set +# CONFIG_EXT4DEV_FS is not set +CONFIG_JBD=y +# CONFIG_JBD_DEBUG is not set +# CONFIG_REISERFS_FS is not set +# CONFIG_JFS_FS is not set +CONFIG_FS_POSIX_ACL=y +# CONFIG_XFS_FS is not set +# CONFIG_GFS2_FS is not set +# CONFIG_OCFS2_FS is not set +# CONFIG_MINIX_FS is not set +CONFIG_ROMFS_FS=y +CONFIG_INOTIFY=y +CONFIG_INOTIFY_USER=y +# CONFIG_QUOTA is not set +CONFIG_DNOTIFY=y +# CONFIG_AUTOFS_FS is not set +CONFIG_AUTOFS4_FS=m +CONFIG_FUSE_FS=m + +# +# CD-ROM/DVD Filesystems +# +CONFIG_ISO9660_FS=m +CONFIG_JOLIET=y +# CONFIG_ZISOFS is not set +# CONFIG_UDF_FS is not set + +# +# DOS/FAT/NT Filesystems +# +CONFIG_FAT_FS=m +CONFIG_MSDOS_FS=m +CONFIG_VFAT_FS=m +CONFIG_FAT_DEFAULT_CODEPAGE=437 +CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" +# CONFIG_NTFS_FS is not set + +# +# Pseudo filesystems +# +CONFIG_PROC_FS=y +CONFIG_PROC_SYSCTL=y +CONFIG_SYSFS=y +CONFIG_TMPFS=y +# CONFIG_TMPFS_POSIX_ACL is not set +# CONFIG_HUGETLB_PAGE is not set +CONFIG_RAMFS=y +CONFIG_CONFIGFS_FS=m + +# +# Miscellaneous filesystems +# +# CONFIG_ADFS_FS is not set +# CONFIG_AFFS_FS is not set +# CONFIG_HFS_FS is not set +# CONFIG_HFSPLUS_FS is not set +# CONFIG_BEFS_FS is not set +# CONFIG_BFS_FS is not set +# CONFIG_EFS_FS is not set +# CONFIG_YAFFS_FS is not set +CONFIG_JFFS2_FS=y +CONFIG_JFFS2_FS_DEBUG=0 +CONFIG_JFFS2_FS_WRITEBUFFER=y +CONFIG_JFFS2_SUMMARY=y +# CONFIG_JFFS2_FS_XATTR is not set +# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set +CONFIG_JFFS2_ZLIB=y +CONFIG_JFFS2_RTIME=y +# CONFIG_JFFS2_RUBIN is not set +CONFIG_CRAMFS=y +# CONFIG_VXFS_FS is not set +# CONFIG_HPFS_FS is not set +# CONFIG_QNX4FS_FS is not set +# CONFIG_SYSV_FS is not set +# CONFIG_UFS_FS is not set + +# +# Network File Systems +# +CONFIG_NFS_FS=y +CONFIG_NFS_V3=y +# CONFIG_NFS_V3_ACL is not set +CONFIG_NFS_V4=y +# CONFIG_NFS_DIRECTIO is not set +CONFIG_NFSD=m +CONFIG_NFSD_V3=y +# CONFIG_NFSD_V3_ACL is not set +CONFIG_NFSD_V4=y +CONFIG_NFSD_TCP=y +CONFIG_LOCKD=y +CONFIG_LOCKD_V4=y +CONFIG_EXPORTFS=m +CONFIG_NFS_COMMON=y +CONFIG_SUNRPC=y +CONFIG_SUNRPC_GSS=y +CONFIG_RPCSEC_GSS_KRB5=y +# CONFIG_RPCSEC_GSS_SPKM3 is not set +# CONFIG_SMB_FS is not set +CONFIG_CIFS=m +# CONFIG_CIFS_STATS is not set +CONFIG_CIFS_WEAK_PW_HASH=y +# CONFIG_CIFS_XATTR is not set +# CONFIG_CIFS_DEBUG2 is not set +# CONFIG_CIFS_EXPERIMENTAL is not set +# CONFIG_NCP_FS is not set +# CONFIG_CODA_FS is not set +# CONFIG_AFS_FS is not set +# CONFIG_9P_FS is not set + +# +# Partition Types +# +# CONFIG_PARTITION_ADVANCED is not set +CONFIG_MSDOS_PARTITION=y + +# +# Native Language Support +# +CONFIG_NLS=m +CONFIG_NLS_DEFAULT="iso8859-1" +CONFIG_NLS_CODEPAGE_437=m +# CONFIG_NLS_CODEPAGE_737 is not set +# CONFIG_NLS_CODEPAGE_775 is not set +CONFIG_NLS_CODEPAGE_850=m +# CONFIG_NLS_CODEPAGE_852 is not set +# CONFIG_NLS_CODEPAGE_855 is not set +# CONFIG_NLS_CODEPAGE_857 is not set +# CONFIG_NLS_CODEPAGE_860 is not set +# CONFIG_NLS_CODEPAGE_861 is not set +# CONFIG_NLS_CODEPAGE_862 is not set +# CONFIG_NLS_CODEPAGE_863 is not set +# CONFIG_NLS_CODEPAGE_864 is not set +# CONFIG_NLS_CODEPAGE_865 is not set +# CONFIG_NLS_CODEPAGE_866 is not set +# CONFIG_NLS_CODEPAGE_869 is not set +CONFIG_NLS_CODEPAGE_936=m +CONFIG_NLS_CODEPAGE_950=m +# CONFIG_NLS_CODEPAGE_932 is not set +# CONFIG_NLS_CODEPAGE_949 is not set +# CONFIG_NLS_CODEPAGE_874 is not set +# CONFIG_NLS_ISO8859_8 is not set +# CONFIG_NLS_CODEPAGE_1250 is not set +# CONFIG_NLS_CODEPAGE_1251 is not set +# CONFIG_NLS_ASCII is not set +CONFIG_NLS_ISO8859_1=m +# CONFIG_NLS_ISO8859_2 is not set +# CONFIG_NLS_ISO8859_3 is not set +# CONFIG_NLS_ISO8859_4 is not set +# CONFIG_NLS_ISO8859_5 is not set +# CONFIG_NLS_ISO8859_6 is not set +# CONFIG_NLS_ISO8859_7 is not set +# CONFIG_NLS_ISO8859_9 is not set +# CONFIG_NLS_ISO8859_13 is not set +# CONFIG_NLS_ISO8859_14 is not set +# CONFIG_NLS_ISO8859_15 is not set +# CONFIG_NLS_KOI8_R is not set +# CONFIG_NLS_KOI8_U is not set +CONFIG_NLS_UTF8=m + +# +# Distributed Lock Manager +# +# CONFIG_DLM is not set + +# +# Profiling support +# +# CONFIG_PROFILING is not set + +# +# Kernel hacking +# +# CONFIG_PRINTK_TIME is not set +CONFIG_ENABLE_MUST_CHECK=y +CONFIG_MAGIC_SYSRQ=y +# CONFIG_UNUSED_SYMBOLS is not set +# CONFIG_DEBUG_FS is not set +# CONFIG_HEADERS_CHECK is not set +CONFIG_DEBUG_KERNEL=y +# CONFIG_DEBUG_SHIRQ is not set +CONFIG_LOG_BUF_SHIFT=14 +CONFIG_DETECT_SOFTLOCKUP=y +# CONFIG_SCHEDSTATS is not set +# CONFIG_TIMER_STATS is not set +# CONFIG_DEBUG_SLAB is not set +CONFIG_DEBUG_PREEMPT=y +# CONFIG_DEBUG_RT_MUTEXES is not set +# CONFIG_RT_MUTEX_TESTER is not set +# CONFIG_DEBUG_SPINLOCK is not set +# CONFIG_DEBUG_MUTEXES is not set +# CONFIG_DEBUG_SPINLOCK_SLEEP is not set +# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set +# CONFIG_DEBUG_KOBJECT is not set +CONFIG_DEBUG_BUGVERBOSE=y +CONFIG_DEBUG_INFO=y +# CONFIG_DEBUG_VM is not set +# CONFIG_DEBUG_LIST is not set +CONFIG_FRAME_POINTER=y +CONFIG_FORCED_INLINING=y +# CONFIG_RCU_TORTURE_TEST is not set +# CONFIG_FAULT_INJECTION is not set +# CONFIG_DEBUG_USER is not set +CONFIG_DEBUG_ERRORS=y +CONFIG_DEBUG_LL=y +# CONFIG_DEBUG_ICEDCC is not set +CONFIG_DEBUG_S3C2410_PORT=y +CONFIG_DEBUG_S3C2410_UART=0 + +# +# Security options +# +# CONFIG_KEYS is not set +# CONFIG_SECURITY is not set + +# +# Cryptographic options +# +CONFIG_CRYPTO=y +CONFIG_CRYPTO_ALGAPI=y +CONFIG_CRYPTO_BLKCIPHER=y +CONFIG_CRYPTO_HASH=y +CONFIG_CRYPTO_MANAGER=y +CONFIG_CRYPTO_HMAC=y +CONFIG_CRYPTO_XCBC=m +CONFIG_CRYPTO_NULL=m +CONFIG_CRYPTO_MD4=m +CONFIG_CRYPTO_MD5=y +CONFIG_CRYPTO_SHA1=m +CONFIG_CRYPTO_SHA256=m +CONFIG_CRYPTO_SHA512=m +CONFIG_CRYPTO_WP512=m +CONFIG_CRYPTO_TGR192=m +CONFIG_CRYPTO_GF128MUL=m +CONFIG_CRYPTO_ECB=m +CONFIG_CRYPTO_CBC=y +CONFIG_CRYPTO_PCBC=m +CONFIG_CRYPTO_LRW=m +CONFIG_CRYPTO_DES=y +CONFIG_CRYPTO_FCRYPT=m +CONFIG_CRYPTO_BLOWFISH=m +CONFIG_CRYPTO_TWOFISH=m +CONFIG_CRYPTO_TWOFISH_COMMON=m +CONFIG_CRYPTO_SERPENT=m +CONFIG_CRYPTO_AES=m +CONFIG_CRYPTO_CAST5=m +CONFIG_CRYPTO_CAST6=m +CONFIG_CRYPTO_TEA=m +CONFIG_CRYPTO_ARC4=m +CONFIG_CRYPTO_KHAZAD=m +CONFIG_CRYPTO_ANUBIS=m +CONFIG_CRYPTO_DEFLATE=m +CONFIG_CRYPTO_MICHAEL_MIC=m +CONFIG_CRYPTO_CRC32C=m +CONFIG_CRYPTO_CAMELLIA=m +CONFIG_CRYPTO_TEST=m + +# +# Hardware crypto devices +# + +# +# Library routines +# +CONFIG_BITREVERSE=y +CONFIG_CRC_CCITT=m +CONFIG_CRC16=m +CONFIG_CRC32=y +CONFIG_LIBCRC32C=m +CONFIG_ZLIB_INFLATE=y +CONFIG_ZLIB_DEFLATE=y +CONFIG_TEXTSEARCH=y +CONFIG_TEXTSEARCH_KMP=m +CONFIG_TEXTSEARCH_BM=m +CONFIG_TEXTSEARCH_FSM=m +CONFIG_PLIST=y +CONFIG_HAS_IOMEM=y diff --git a/packages/linux/linux-gta01_2.6.20.bb b/packages/linux/linux-gta01_2.6.20.bb index 67e6c76960..2c8fe80b33 100644 --- a/packages/linux/linux-gta01_2.6.20.bb +++ b/packages/linux/linux-gta01_2.6.20.bb @@ -17,7 +17,7 @@ FILESDIR = "${@os.path.dirname(bb.data.getVar('FILE',d,1))}/linux-gta01" # source and patches # SRC_URI = "http://ftp.de.kernel.org/pub/linux/kernel/v2.6/linux-${VANILLA_VERSION}.tar.bz2 \ - svn://svn.openmoko.org/trunk/src/target/kernel;module=patches;proto=http \ + svn://svn.openmoko.org/branches/src/target/kernel/2.6.20.x;module=patches;proto=http \ file://defconfig-${VANILLA_VERSION}-${MACHINE}" S = "${WORKDIR}/linux-${VANILLA_VERSION}" diff --git a/packages/linux/linux-gta01_2.6.21.1.bb b/packages/linux/linux-gta01_2.6.21.1.bb new file mode 100644 index 0000000000..59859db5e0 --- /dev/null +++ b/packages/linux/linux-gta01_2.6.21.1.bb @@ -0,0 +1,10 @@ +require linux-gta01.inc + +DEFAULT_PREFERENCE = "-6" + +MOKOR = "moko9" +PR = "${MOKOR}-r0" +VANILLA_VERSION = "2.6.21.1" + +SRC_URI += "svn://svn.openmoko.org/trunk/src/target/kernel;module=patches;proto=http" + diff --git a/packages/linux/linux-magicbox-2.6.18.6/.mtn2git_empty b/packages/linux/linux-magicbox-2.6.18.6/.mtn2git_empty new file mode 100644 index 0000000000..e69de29bb2 --- /dev/null +++ b/packages/linux/linux-magicbox-2.6.18.6/.mtn2git_empty diff --git a/packages/linux/linux-magicbox-2.6.18.6/000-fix-makefile.patch b/packages/linux/linux-magicbox-2.6.18.6/000-fix-makefile.patch new file mode 100644 index 0000000000..ce52a02b2f --- /dev/null +++ b/packages/linux/linux-magicbox-2.6.18.6/000-fix-makefile.patch @@ -0,0 +1,12 @@ +diff -ru linux-2.6.18/Makefile linux-2.6.18-magicbox/Makefile +--- linux-2.6.18/Makefile 2006-09-20 05:42:06.000000000 +0200 ++++ linux-2.6.18-magicbox/Makefile 2006-09-22 20:16:55.000000000 +0200 +@@ -1,7 +1,7 @@ + VERSION = 2 + PATCHLEVEL = 6 + SUBLEVEL = 18 +-EXTRAVERSION = .6 ++EXTRAVERSION = -magicbox2 + NAME=Avast! A bilge rat! + + # *DOCUMENTATION* diff --git a/packages/linux/linux-magicbox-2.6.18.6/001-magicbox-board-2.6.18.patch b/packages/linux/linux-magicbox-2.6.18.6/001-magicbox-board-2.6.18.patch new file mode 100644 index 0000000000..bd3214dacd --- /dev/null +++ b/packages/linux/linux-magicbox-2.6.18.6/001-magicbox-board-2.6.18.patch @@ -0,0 +1,381 @@ +diff -Nru linux-2.6.18/arch/ppc/platforms/4xx/Kconfig linux-2.6.18-magicbox/arch/ppc/platforms/4xx/Kconfig +--- linux-2.6.18/arch/ppc/platforms/4xx/Kconfig 2006-09-20 05:42:06.000000000 +0200 ++++ linux-2.6.18-magicbox/arch/ppc/platforms/4xx/Kconfig 2006-09-22 03:38:30.000000000 +0200 +@@ -14,7 +14,7 @@ + choice + prompt "Machine Type" + depends on 40x +- default WALNUT ++ default MAGICBOX + + config BUBINGA + bool "Bubinga" +@@ -52,6 +52,12 @@ + help + This option enables support for the IBM PPC405GP evaluation board. + ++config MAGICBOX ++ bool "MagicBox" ++ select WANT_EARLY_SERIAL ++ help ++ This option enables support for the IBM PPC405EP evaluation board. ++ + config XILINX_ML300 + bool "Xilinx-ML300" + help +@@ -173,7 +179,7 @@ + + config IBM_OCP + bool +- depends on ASH || BAMBOO || BUBINGA || CPCI405 || EBONY || EP405 || LUAN || YUCCA || OCOTEA || REDWOOD_5 || REDWOOD_6 || SYCAMORE || WALNUT ++ depends on ASH || BAMBOO || BUBINGA || CPCI405 || EBONY || EP405 || LUAN || YUCCA || OCOTEA || REDWOOD_5 || REDWOOD_6 || SYCAMORE || WALNUT || MAGICBOX + default y + + config IBM_EMAC4 +@@ -183,7 +189,7 @@ + + config BIOS_FIXUP + bool +- depends on BUBINGA || EP405 || SYCAMORE || WALNUT || CPCI405 ++ depends on BUBINGA || EP405 || SYCAMORE || WALNUT || CPCI405 || MAGICBOX + default y + + # OAK doesn't exist but wanted to keep this around for any future 403GCX boards +@@ -194,7 +200,7 @@ + + config 405EP + bool +- depends on BUBINGA ++ depends on BUBINGA || MAGICBOX + default y + + config 405GP +diff -Nru linux-2.6.18/arch/ppc/platforms/4xx/Makefile linux-2.6.18-magicbox/arch/ppc/platforms/4xx/Makefile +--- linux-2.6.18/arch/ppc/platforms/4xx/Makefile 2006-09-20 05:42:06.000000000 +0200 ++++ linux-2.6.18-magicbox/arch/ppc/platforms/4xx/Makefile 2006-09-22 03:37:18.000000000 +0200 +@@ -13,6 +13,7 @@ + obj-$(CONFIG_REDWOOD_6) += redwood6.o + obj-$(CONFIG_SYCAMORE) += sycamore.o + obj-$(CONFIG_WALNUT) += walnut.o ++obj-$(CONFIG_MAGICBOX) += magicbox.o + obj-$(CONFIG_XILINX_ML300) += xilinx_ml300.o + obj-$(CONFIG_XILINX_ML403) += xilinx_ml403.o + +diff -Nru linux-2.6.18/arch/ppc/platforms/4xx/magicbox.c linux-2.6.18-magicbox/arch/ppc/platforms/4xx/magicbox.c +--- linux-2.6.18/arch/ppc/platforms/4xx/magicbox.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-2.6.18-magicbox/arch/ppc/platforms/4xx/magicbox.c 2006-09-22 03:37:18.000000000 +0200 +@@ -0,0 +1,249 @@ ++/* ++ * Support for IBM PPC 405EP-based MagicBox board ++ * Copyright (C) 2006 Karol Lewandowski ++ * ++ * Heavily based on bubinga.c ++ * ++ * Author: SAW (IBM), derived from walnut.c. ++ * Maintained by MontaVista Software <source@mvista.com> ++ * ++ * 2003 (c) MontaVista Softare Inc. This file is licensed under the ++ * terms of the GNU General Public License version 2. This program is ++ * licensed "as is" without any warranty of any kind, whether express ++ * or implied. ++ */ ++ ++#include <linux/config.h> ++#include <linux/init.h> ++#include <linux/smp.h> ++#include <linux/threads.h> ++#include <linux/param.h> ++#include <linux/string.h> ++#include <linux/blkdev.h> ++#include <linux/pci.h> ++#include <linux/tty.h> ++#include <linux/serial.h> ++#include <linux/serial_core.h> ++ ++#include <asm/system.h> ++#include <asm/pci-bridge.h> ++#include <asm/processor.h> ++#include <asm/machdep.h> ++#include <asm/page.h> ++#include <asm/time.h> ++#include <asm/io.h> ++#include <asm/kgdb.h> ++#include <asm/ocp.h> ++#include <asm/ibm_ocp_pci.h> ++ ++#include <platforms/4xx/ibm405ep.h> ++ ++#undef DEBUG ++ ++#ifdef DEBUG ++#define DBG(x...) printk(x) ++#else ++#define DBG(x...) ++#endif ++ ++extern bd_t __res; ++ ++/* Some IRQs unique to board ++ * Used by the generic 405 PCI setup functions in ppc4xx_pci.c ++ */ ++int __init ++ppc405_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin) ++{ ++ static char pci_irq_table[][4] = ++ /* ++ * PCI IDSEL/INTPIN->INTLINE ++ * A B C D ++ */ ++ { ++ {28, 28, 28, 28}, /* IDSEL 1 - PCI slot 1 */ ++ {29, 29, 29, 29}, /* IDSEL 2 - PCI slot 2 */ ++ {30, 30, 30, 30}, /* IDSEL 3 - PCI slot 3 */ ++ {31, 31, 31, 31}, /* IDSEL 4 - PCI slot 4 */ ++ }; ++ ++ const long min_idsel = 1, max_idsel = 4, irqs_per_slot = 4; ++ return PCI_IRQ_TABLE_LOOKUP; ++}; ++ ++ ++/* The serial clock for the chip is an internal clock determined by ++ * different clock speeds/dividers. ++ * Calculate the proper input baud rate and setup the serial driver. ++ */ ++static void __init ++magicbox_early_serial_map(void) ++{ ++ u32 uart_div; ++ int uart_clock; ++ struct uart_port port; ++ ++ /* Calculate the serial clock input frequency ++ * ++ * The base baud is the PLL OUTA (provided in the board info ++ * structure) divided by the external UART Divisor, divided ++ * by 16. ++ */ ++ uart_div = (mfdcr(DCRN_CPC0_UCR_BASE) & DCRN_CPC0_UCR_U0DIV); ++ uart_clock = __res.bi_procfreq / uart_div; ++ ++ /* Setup serial port access */ ++ memset(&port, 0, sizeof(port)); ++ port.membase = (void*)ACTING_UART0_IO_BASE; ++ port.irq = ACTING_UART0_INT; ++ port.uartclk = uart_clock; ++ port.regshift = 0; ++ port.iotype = UPIO_MEM; ++ port.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST; ++ port.line = 0; ++ ++ if (early_serial_setup(&port) != 0) { ++ printk("Early serial init of port 0 failed\n"); ++ } ++ ++ port.membase = (void*)ACTING_UART1_IO_BASE; ++ port.irq = ACTING_UART1_INT; ++ port.line = 1; ++ ++ if (early_serial_setup(&port) != 0) { ++ printk("Early serial init of port 1 failed\n"); ++ } ++} ++ ++void __init ++bios_fixup(struct pci_controller *hose, struct pcil0_regs *pcip) ++{ ++ unsigned int bar_response, bar; ++ /* ++ * Expected PCI mapping: ++ * ++ * PLB addr PCI memory addr ++ * --------------------- --------------------- ++ * 0000'0000 - 7fff'ffff <--- 0000'0000 - 7fff'ffff ++ * 8000'0000 - Bfff'ffff ---> 8000'0000 - Bfff'ffff ++ * ++ * PLB addr PCI io addr ++ * --------------------- --------------------- ++ * e800'0000 - e800'ffff ---> 0000'0000 - 0001'0000 ++ * ++ * The following code is simplified by assuming that the bootrom ++ * has been well behaved in following this mapping. ++ */ ++ ++#ifdef DEBUG ++ int i; ++ ++ printk("ioremap PCLIO_BASE = 0x%x\n", pcip); ++ printk("PCI bridge regs before fixup \n"); ++ for (i = 0; i <= 3; i++) { ++ printk(" pmm%dma\t0x%x\n", i, in_le32(&(pcip->pmm[i].ma))); ++ printk(" pmm%dma\t0x%x\n", i, in_le32(&(pcip->pmm[i].la))); ++ printk(" pmm%dma\t0x%x\n", i, in_le32(&(pcip->pmm[i].pcila))); ++ printk(" pmm%dma\t0x%x\n", i, in_le32(&(pcip->pmm[i].pciha))); ++ } ++ printk(" ptm1ms\t0x%x\n", in_le32(&(pcip->ptm1ms))); ++ printk(" ptm1la\t0x%x\n", in_le32(&(pcip->ptm1la))); ++ printk(" ptm2ms\t0x%x\n", in_le32(&(pcip->ptm2ms))); ++ printk(" ptm2la\t0x%x\n", in_le32(&(pcip->ptm2la))); ++ ++#endif ++ ++ /* added for IBM boot rom version 1.15 bios bar changes -AK */ ++ ++ /* Disable region first */ ++ out_le32((void *) &(pcip->pmm[0].ma), 0x00000000); ++ /* PLB starting addr, PCI: 0x80000000 */ ++ out_le32((void *) &(pcip->pmm[0].la), 0x80000000); ++ /* PCI start addr, 0x80000000 */ ++ out_le32((void *) &(pcip->pmm[0].pcila), PPC405_PCI_MEM_BASE); ++ /* 512MB range of PLB to PCI */ ++ out_le32((void *) &(pcip->pmm[0].pciha), 0x00000000); ++ /* Enable no pre-fetch, enable region */ ++ out_le32((void *) &(pcip->pmm[0].ma), ((0xffffffff - ++ (PPC405_PCI_UPPER_MEM - ++ PPC405_PCI_MEM_BASE)) | 0x01)); ++ ++ /* Disable region one */ ++ out_le32((void *) &(pcip->pmm[1].ma), 0x00000000); ++ out_le32((void *) &(pcip->pmm[1].la), 0x00000000); ++ out_le32((void *) &(pcip->pmm[1].pcila), 0x00000000); ++ out_le32((void *) &(pcip->pmm[1].pciha), 0x00000000); ++ out_le32((void *) &(pcip->pmm[1].ma), 0x00000000); ++ out_le32((void *) &(pcip->ptm1ms), 0x00000001); ++ ++ /* Disable region two */ ++ out_le32((void *) &(pcip->pmm[2].ma), 0x00000000); ++ out_le32((void *) &(pcip->pmm[2].la), 0x00000000); ++ out_le32((void *) &(pcip->pmm[2].pcila), 0x00000000); ++ out_le32((void *) &(pcip->pmm[2].pciha), 0x00000000); ++ out_le32((void *) &(pcip->pmm[2].ma), 0x00000000); ++ out_le32((void *) &(pcip->ptm2ms), 0x00000000); ++ out_le32((void *) &(pcip->ptm2la), 0x00000000); ++ ++ /* Zero config bars */ ++ for (bar = PCI_BASE_ADDRESS_1; bar <= PCI_BASE_ADDRESS_2; bar += 4) { ++ early_write_config_dword(hose, hose->first_busno, ++ PCI_FUNC(hose->first_busno), bar, ++ 0x00000000); ++ early_read_config_dword(hose, hose->first_busno, ++ PCI_FUNC(hose->first_busno), bar, ++ &bar_response); ++ DBG("BUS %d, device %d, Function %d bar 0x%8.8x is 0x%8.8x\n", ++ hose->first_busno, PCI_SLOT(hose->first_busno), ++ PCI_FUNC(hose->first_busno), bar, bar_response); ++ } ++ /* end work arround */ ++ ++#ifdef DEBUG ++ printk("PCI bridge regs after fixup \n"); ++ for (i = 0; i <= 3; i++) { ++ printk(" pmm%dma\t0x%x\n", i, in_le32(&(pcip->pmm[i].ma))); ++ printk(" pmm%dma\t0x%x\n", i, in_le32(&(pcip->pmm[i].la))); ++ printk(" pmm%dma\t0x%x\n", i, in_le32(&(pcip->pmm[i].pcila))); ++ printk(" pmm%dma\t0x%x\n", i, in_le32(&(pcip->pmm[i].pciha))); ++ } ++ printk(" ptm1ms\t0x%x\n", in_le32(&(pcip->ptm1ms))); ++ printk(" ptm1la\t0x%x\n", in_le32(&(pcip->ptm1la))); ++ printk(" ptm2ms\t0x%x\n", in_le32(&(pcip->ptm2ms))); ++ printk(" ptm2la\t0x%x\n", in_le32(&(pcip->ptm2la))); ++ ++#endif /* DEBUG */ ++} ++ ++void __init ++magicbox_setup_arch(void) ++{ ++ ppc4xx_setup_arch(); ++ ++ ibm_ocp_set_emac(0, 1); ++ ++ magicbox_early_serial_map(); ++ ++ /* Identify the system */ ++ printk("MagicBox port (C) 2005 Karol Lewandowski <kl@jasmine.eu.org>\n"); ++} ++ ++void __init ++magicbox_map_io(void) ++{ ++ ppc4xx_map_io(); ++} ++ ++void __init ++platform_init(unsigned long r3, unsigned long r4, unsigned long r5, ++ unsigned long r6, unsigned long r7) ++{ ++ ppc4xx_init(r3, r4, r5, r6, r7); ++ ++ ppc_md.setup_arch = magicbox_setup_arch; ++ ppc_md.setup_io_mappings = magicbox_map_io; ++ ++#ifdef CONFIG_KGDB ++ ppc_md.early_serial_map = magicbox_early_serial_map; ++#endif ++ ++} +diff -Nru linux-2.6.18/arch/ppc/platforms/4xx/magicbox.h linux-2.6.18-magicbox/arch/ppc/platforms/4xx/magicbox.h +--- linux-2.6.18/arch/ppc/platforms/4xx/magicbox.h 1970-01-01 01:00:00.000000000 +0100 ++++ linux-2.6.18-magicbox/arch/ppc/platforms/4xx/magicbox.h 2006-09-22 03:37:18.000000000 +0200 +@@ -0,0 +1,47 @@ ++/* ++ * Support for IBM PPC 405EP-based MagicBox board ++ * ++ * Heavily based on bubinga.h ++ * ++ * ++ * Author: SAW (IBM), derived from walnut.h. ++ * Maintained by MontaVista Software <source@mvista.com> ++ * ++ * 2003 (c) MontaVista Softare Inc. This file is licensed under the ++ * terms of the GNU General Public License version 2. This program is ++ * licensed "as is" without any warranty of any kind, whether express ++ * or implied. ++ */ ++ ++#ifdef __KERNEL__ ++#ifndef __MAGICBOX_H__ ++#define __MAGICBOX_H__ ++ ++#include <linux/config.h> ++#include <platforms/4xx/ibm405ep.h> ++#include <asm/ppcboot.h> ++ ++/* Memory map for the "MagicBox" 405EP evaluation board -- generic 4xx. */ ++ ++/* The UART clock is based off an internal clock - ++ * define BASE_BAUD based on the internal clock and divider(s). ++ * Since BASE_BAUD must be a constant, we will initialize it ++ * using clock/divider values which OpenBIOS initializes ++ * for typical configurations at various CPU speeds. ++ * The base baud is calculated as (FWDA / EXT UART DIV / 16) ++ */ ++#define BASE_BAUD 0 ++ ++/* Flash */ ++#define PPC40x_FPGA_BASE 0xF0300000 ++#define PPC40x_FPGA_REG_OFFS 1 /* offset to flash map reg */ ++#define PPC40x_FLASH_ONBD_N(x) (x & 0x02) ++#define PPC40x_FLASH_SRAM_SEL(x) (x & 0x01) ++#define PPC40x_FLASH_LOW 0xFFF00000 ++#define PPC40x_FLASH_HIGH 0xFFF80000 ++#define PPC40x_FLASH_SIZE 0x80000 ++ ++#define PPC4xx_MACHINE_NAME "MagicBox" ++ ++#endif /* __MAGICBOX_H__ */ ++#endif /* __KERNEL__ */ +diff -Nru linux-2.6.18/include/asm-ppc/ibm4xx.h linux-2.6.18-magicbox/include/asm-ppc/ibm4xx.h +--- linux-2.6.18/include/asm-ppc/ibm4xx.h 2006-09-20 05:42:06.000000000 +0200 ++++ linux-2.6.18-magicbox/include/asm-ppc/ibm4xx.h 2006-09-22 03:37:18.000000000 +0200 +@@ -18,6 +18,10 @@ + + #ifdef CONFIG_40x + ++#if defined(CONFIG_MAGICBOX) ++#include <platforms/4xx/magicbox.h> ++#endif ++ + #if defined(CONFIG_BUBINGA) + #include <platforms/4xx/bubinga.h> + #endif diff --git a/packages/linux/linux-magicbox-2.6.18.6/002-magicbox-mtd-map-2.6.18.patch b/packages/linux/linux-magicbox-2.6.18.6/002-magicbox-mtd-map-2.6.18.patch new file mode 100644 index 0000000000..f549f34420 --- /dev/null +++ b/packages/linux/linux-magicbox-2.6.18.6/002-magicbox-mtd-map-2.6.18.patch @@ -0,0 +1,136 @@ +diff -Nru linux-2.6.18/drivers/mtd/maps/Kconfig linux-2.6.18-magicmap/drivers/mtd/maps/Kconfig +--- linux-2.6.18/drivers/mtd/maps/Kconfig 2006-09-20 05:42:06.000000000 +0200 ++++ linux-2.6.18-magicmap/drivers/mtd/maps/Kconfig 2006-09-22 03:36:25.000000000 +0200 +@@ -323,6 +323,15 @@ + Walnut board. If you have one of these boards and would like to + use the flash chips on it, say 'Y'. + ++config MTD_MAGICMAP ++ tristate "Flash device mapped on IBM 405EP MagicBox" ++ depends on MTD_CFI && MTD_PARTITIONS && 40x && MAGICBOX ++ help ++ This enables access routines for the flash chips on the IBM 405EP ++ MagicBox board. If you have one of these boards and would like to ++ use the flash chips on it, say 'Y'. ++ ++ + config MTD_EBONY + tristate "Flash devices mapped on IBM 440GP Ebony" + depends on MTD_JEDECPROBE && EBONY +diff -Nru linux-2.6.18/drivers/mtd/maps/Makefile linux-2.6.18-magicmap/drivers/mtd/maps/Makefile +--- linux-2.6.18/drivers/mtd/maps/Makefile 2006-09-20 05:42:06.000000000 +0200 ++++ linux-2.6.18-magicmap/drivers/mtd/maps/Makefile 2006-09-22 03:36:25.000000000 +0200 +@@ -58,6 +58,7 @@ + obj-$(CONFIG_MTD_BEECH) += beech-mtd.o + obj-$(CONFIG_MTD_ARCTIC) += arctic-mtd.o + obj-$(CONFIG_MTD_WALNUT) += walnut.o ++obj-$(CONFIG_MTD_MAGICMAP) += magicmap.o + obj-$(CONFIG_MTD_H720X) += h720x-flash.o + obj-$(CONFIG_MTD_SBC8240) += sbc8240.o + obj-$(CONFIG_MTD_NOR_TOTO) += omap-toto-flash.o +diff -Nru linux-2.6.18/drivers/mtd/maps/magicmap.c linux-2.6.18-magicmap/drivers/mtd/maps/magicmap.c +--- linux-2.6.18/drivers/mtd/maps/magicmap.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-2.6.18-magicmap/drivers/mtd/maps/magicmap.c 2006-09-22 03:36:25.000000000 +0200 +@@ -0,0 +1,102 @@ ++/* ++ * magicmap.c: Copyleft 2005 Karol Lewandowski ++ * ++ * Mapping for MagicBox flash. ++ * Based on walnut.c. ++ * ++ * Heikki Lindholm <holindho@infradead.org> ++ * ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License as published by the ++ * Free Software Foundation; either version 2 of the License, or (at your ++ * option) any later version. ++ */ ++ ++#include <linux/module.h> ++#include <linux/types.h> ++#include <linux/kernel.h> ++#include <linux/init.h> ++#include <linux/mtd/mtd.h> ++#include <linux/mtd/map.h> ++#include <linux/mtd/partitions.h> ++#include <linux/config.h> ++#include <asm/io.h> ++ ++static struct mtd_info *flash; ++ ++static struct map_info magic_map = { ++ .name = "Magically mapped flash", ++ .phys = 0xffc00000, ++ .size = 0x400000, ++ .bankwidth = 2, ++}; ++ ++static struct mtd_partition magic_partitions[] = { ++ { ++ .name = "kernel", ++ .offset = 0x0, ++ .size = 0x0e0000, ++ }, ++ { ++ .name = "ramdisk", ++ .offset = 0x0e0000, ++ .size = 0x2c0000, ++ }, ++ { ++ .name = "persistent", ++ .offset = 0x3a0000, ++ .size = 0x020000, ++ }, ++ { ++ .name = "bootloader", ++ .offset = 0x3c0000, ++ .size = 0x040000, ++ .mask_flags = MTD_WRITEABLE, ++ }, ++}; ++ ++int __init init_magic(void) ++{ ++ magic_map.virt = ++ (void __iomem *)ioremap(magic_map.phys, magic_map.size); ++ ++ if (!magic_map.virt) { ++ printk("Failed to ioremap flash.\n"); ++ return -EIO; ++ } ++ ++ simple_map_init(&magic_map); ++ ++ flash = do_map_probe("cfi_probe", &magic_map); ++ if (flash) { ++ flash->owner = THIS_MODULE; ++ add_mtd_partitions(flash, magic_partitions, ++ ARRAY_SIZE(magic_partitions)); ++ } else { ++ printk("map probe failed for flash\n"); ++ return -ENXIO; ++ } ++ ++ return 0; ++} ++ ++static void __exit cleanup_magic(void) ++{ ++ if (flash) { ++ del_mtd_partitions(flash); ++ map_destroy(flash); ++ } ++ ++ if (magic_map.virt) { ++ iounmap((void *)magic_map.virt); ++ magic_map.virt = NULL; ++ } ++} ++ ++module_init(init_magic); ++module_exit(cleanup_magic); ++ ++MODULE_LICENSE("GPL"); ++MODULE_AUTHOR("Karol Lewandowski"); ++MODULE_DESCRIPTION("MTD map and partitions for IBM 405EP MagicBox boards"); diff --git a/packages/linux/linux-magicbox-2.6.18.6/010-load-ramdisk-even-if-rootdev-equals-ramdisk.patch b/packages/linux/linux-magicbox-2.6.18.6/010-load-ramdisk-even-if-rootdev-equals-ramdisk.patch new file mode 100644 index 0000000000..d980be9d6c --- /dev/null +++ b/packages/linux/linux-magicbox-2.6.18.6/010-load-ramdisk-even-if-rootdev-equals-ramdisk.patch @@ -0,0 +1,16 @@ +--- linux-2.6.15-magicbox3/init/do_mounts_initrd.c~ 2005-08-31 00:26:43.000000000 +0200 ++++ linux-2.6.15-magicbox3/init/do_mounts_initrd.c 2006-05-14 14:00:35.000000000 +0200 +@@ -112,8 +112,12 @@ + * unless /dev/ram0 is supposed to be our actual root device, + * in that case the ram disk is just set up here, and gets + * mounted in the normal path. ++ * ++ * Not true for magicbox: someone put root=/dev/ram into ++ * bootloader defaults and prepared hundreds of boards... ++ * Fix issue there. + */ +- if (rd_load_image("/initrd.image") && ROOT_DEV != Root_RAM0) { ++ if (rd_load_image("/initrd.image")) { + sys_unlink("/initrd.image"); + handle_initrd(); + return 1; diff --git a/packages/linux/linux-magicbox-2.6.18.6/config-2.6.18-magicbox2 b/packages/linux/linux-magicbox-2.6.18.6/config-2.6.18-magicbox2 new file mode 100644 index 0000000000..c181d182cf --- /dev/null +++ b/packages/linux/linux-magicbox-2.6.18.6/config-2.6.18-magicbox2 @@ -0,0 +1,1204 @@ +# +# Automatically generated make config: don't edit +# Linux kernel version: 2.6.18-magicbox2 +# Thu Dec 28 19:45:11 2006 +# +CONFIG_MMU=y +CONFIG_GENERIC_HARDIRQS=y +CONFIG_RWSEM_XCHGADD_ALGORITHM=y +CONFIG_GENERIC_HWEIGHT=y +CONFIG_GENERIC_CALIBRATE_DELAY=y +CONFIG_PPC=y +CONFIG_PPC32=y +CONFIG_GENERIC_NVRAM=y +CONFIG_GENERIC_FIND_NEXT_BIT=y +CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y +CONFIG_ARCH_MAY_HAVE_PC_FDC=y +CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" + +# +# Code maturity level options +# +CONFIG_EXPERIMENTAL=y +CONFIG_BROKEN_ON_SMP=y +CONFIG_INIT_ENV_ARG_LIMIT=32 + +# +# General setup +# +CONFIG_LOCALVERSION="" +# CONFIG_LOCALVERSION_AUTO is not set +CONFIG_SWAP=y +CONFIG_SYSVIPC=y +# CONFIG_POSIX_MQUEUE is not set +# CONFIG_BSD_PROCESS_ACCT is not set +# CONFIG_TASKSTATS is not set +# CONFIG_AUDIT is not set +# CONFIG_IKCONFIG is not set +# CONFIG_RELAY is not set +CONFIG_INITRAMFS_SOURCE="" +CONFIG_CC_OPTIMIZE_FOR_SIZE=y +CONFIG_EMBEDDED=y +CONFIG_SYSCTL=y +# CONFIG_KALLSYMS is not set +CONFIG_HOTPLUG=y +CONFIG_PRINTK=y +CONFIG_BUG=y +CONFIG_ELF_CORE=y +CONFIG_BASE_FULL=y +# CONFIG_FUTEX is not set +# CONFIG_EPOLL is not set +CONFIG_SHMEM=y +CONFIG_SLAB=y +CONFIG_VM_EVENT_COUNTERS=y +# CONFIG_TINY_SHMEM is not set +CONFIG_BASE_SMALL=0 +# CONFIG_SLOB is not set + +# +# Loadable module support +# +CONFIG_MODULES=y +CONFIG_MODULE_UNLOAD=y +# CONFIG_MODULE_FORCE_UNLOAD is not set +# CONFIG_MODVERSIONS is not set +# CONFIG_MODULE_SRCVERSION_ALL is not set +CONFIG_KMOD=y + +# +# Block layer +# +# CONFIG_LBD is not set +# CONFIG_BLK_DEV_IO_TRACE is not set +# CONFIG_LSF is not set + +# +# IO Schedulers +# +CONFIG_IOSCHED_NOOP=y +# CONFIG_IOSCHED_AS is not set +# CONFIG_IOSCHED_DEADLINE is not set +# CONFIG_IOSCHED_CFQ is not set +# CONFIG_DEFAULT_AS is not set +# CONFIG_DEFAULT_DEADLINE is not set +# CONFIG_DEFAULT_CFQ is not set +CONFIG_DEFAULT_NOOP=y +CONFIG_DEFAULT_IOSCHED="noop" + +# +# Processor +# +# CONFIG_6xx is not set +CONFIG_40x=y +# CONFIG_44x is not set +# CONFIG_8xx is not set +# CONFIG_E200 is not set +# CONFIG_E500 is not set +# CONFIG_MATH_EMULATION is not set +# CONFIG_KEXEC is not set +# CONFIG_CPU_FREQ is not set +CONFIG_4xx=y +CONFIG_WANT_EARLY_SERIAL=y + +# +# IBM 4xx options +# +# CONFIG_BUBINGA is not set +# CONFIG_CPCI405 is not set +# CONFIG_EP405 is not set +# CONFIG_REDWOOD_5 is not set +# CONFIG_REDWOOD_6 is not set +# CONFIG_SYCAMORE is not set +# CONFIG_WALNUT is not set +CONFIG_MAGICBOX=y +# CONFIG_XILINX_ML300 is not set +# CONFIG_XILINX_ML403 is not set +CONFIG_IBM_OCP=y +CONFIG_BIOS_FIXUP=y +CONFIG_405EP=y +CONFIG_PPC4xx_DMA=y +CONFIG_PPC4xx_EDMA=y +CONFIG_PPC_GEN550=y +CONFIG_UART0_TTYS0=y +# CONFIG_UART0_TTYS1 is not set +CONFIG_NOT_COHERENT_CACHE=y + +# +# Platform options +# +# CONFIG_PC_KEYBOARD is not set +# CONFIG_HIGHMEM is not set +CONFIG_HZ_100=y +# CONFIG_HZ_250 is not set +# CONFIG_HZ_1000 is not set +CONFIG_HZ=100 +CONFIG_PREEMPT_NONE=y +# CONFIG_PREEMPT_VOLUNTARY is not set +# CONFIG_PREEMPT is not set +CONFIG_SELECT_MEMORY_MODEL=y +CONFIG_FLATMEM_MANUAL=y +# CONFIG_DISCONTIGMEM_MANUAL is not set +# CONFIG_SPARSEMEM_MANUAL is not set +CONFIG_FLATMEM=y +CONFIG_FLAT_NODE_MEM_MAP=y +# CONFIG_SPARSEMEM_STATIC is not set +CONFIG_SPLIT_PTLOCK_CPUS=4 +# CONFIG_RESOURCES_64BIT is not set +CONFIG_BINFMT_ELF=y +# CONFIG_BINFMT_MISC is not set +# CONFIG_CMDLINE_BOOL is not set +# CONFIG_PM is not set +# CONFIG_SECCOMP is not set +CONFIG_ISA_DMA_API=y + +# +# Bus options +# +# CONFIG_PPC_I8259 is not set +CONFIG_PPC_INDIRECT_PCI=y +CONFIG_PCI=y +CONFIG_PCI_DOMAINS=y + +# +# PCCARD (PCMCIA/CardBus) support +# +# CONFIG_PCCARD is not set + +# +# Advanced setup +# +# CONFIG_ADVANCED_OPTIONS is not set + +# +# Default settings for advanced configuration options are used +# +CONFIG_HIGHMEM_START=0xfe000000 +CONFIG_LOWMEM_SIZE=0x30000000 +CONFIG_KERNEL_START=0xc0000000 +CONFIG_TASK_SIZE=0x80000000 +CONFIG_CONSISTENT_START=0xff100000 +CONFIG_CONSISTENT_SIZE=0x00200000 +CONFIG_BOOT_LOAD=0x00400000 + +# +# Networking +# +CONFIG_NET=y + +# +# Networking options +# +# CONFIG_NETDEBUG is not set +CONFIG_PACKET=y +CONFIG_PACKET_MMAP=y +CONFIG_UNIX=y +# CONFIG_NET_KEY is not set +CONFIG_INET=y +CONFIG_IP_MULTICAST=y +CONFIG_IP_ADVANCED_ROUTER=y +CONFIG_ASK_IP_FIB_HASH=y +# CONFIG_IP_FIB_TRIE is not set +CONFIG_IP_FIB_HASH=y +CONFIG_IP_MULTIPLE_TABLES=y +CONFIG_IP_ROUTE_FWMARK=y +CONFIG_IP_ROUTE_MULTIPATH=y +# CONFIG_IP_ROUTE_MULTIPATH_CACHED is not set +CONFIG_IP_ROUTE_VERBOSE=y +# CONFIG_IP_PNP is not set +# CONFIG_NET_IPIP is not set +CONFIG_NET_IPGRE=y +CONFIG_NET_IPGRE_BROADCAST=y +# CONFIG_IP_MROUTE is not set +# CONFIG_ARPD is not set +CONFIG_SYN_COOKIES=y +# CONFIG_INET_AH is not set +# CONFIG_INET_ESP is not set +# CONFIG_INET_IPCOMP is not set +# CONFIG_INET_XFRM_TUNNEL is not set +# CONFIG_INET_TUNNEL is not set +# CONFIG_INET_XFRM_MODE_TRANSPORT is not set +# CONFIG_INET_XFRM_MODE_TUNNEL is not set +# CONFIG_INET_DIAG is not set +# CONFIG_TCP_CONG_ADVANCED is not set +CONFIG_TCP_CONG_BIC=y + +# +# IP: Virtual Server Configuration +# +# CONFIG_IP_VS is not set +# CONFIG_IPV6 is not set +# CONFIG_INET6_XFRM_TUNNEL is not set +# CONFIG_INET6_TUNNEL is not set +# CONFIG_NETWORK_SECMARK is not set +CONFIG_NETFILTER=y +# CONFIG_NETFILTER_DEBUG is not set +CONFIG_BRIDGE_NETFILTER=y + +# +# Core Netfilter Configuration +# +# CONFIG_NETFILTER_NETLINK is not set +CONFIG_NETFILTER_XTABLES=y +CONFIG_NETFILTER_XT_TARGET_CLASSIFY=y +CONFIG_NETFILTER_XT_TARGET_CONNMARK=m +CONFIG_NETFILTER_XT_TARGET_MARK=y +CONFIG_NETFILTER_XT_TARGET_NFQUEUE=y +CONFIG_NETFILTER_XT_TARGET_NOTRACK=m +CONFIG_NETFILTER_XT_MATCH_COMMENT=y +# CONFIG_NETFILTER_XT_MATCH_CONNBYTES is not set +CONFIG_NETFILTER_XT_MATCH_CONNMARK=m +CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m +# CONFIG_NETFILTER_XT_MATCH_DCCP is not set +CONFIG_NETFILTER_XT_MATCH_ESP=y +CONFIG_NETFILTER_XT_MATCH_HELPER=m +CONFIG_NETFILTER_XT_MATCH_LENGTH=y +CONFIG_NETFILTER_XT_MATCH_LIMIT=y +CONFIG_NETFILTER_XT_MATCH_MAC=y +CONFIG_NETFILTER_XT_MATCH_MARK=y +CONFIG_NETFILTER_XT_MATCH_MULTIPORT=y +CONFIG_NETFILTER_XT_MATCH_PHYSDEV=y +CONFIG_NETFILTER_XT_MATCH_PKTTYPE=y +CONFIG_NETFILTER_XT_MATCH_QUOTA=y +CONFIG_NETFILTER_XT_MATCH_REALM=y +# CONFIG_NETFILTER_XT_MATCH_SCTP is not set +CONFIG_NETFILTER_XT_MATCH_STATE=m +# CONFIG_NETFILTER_XT_MATCH_STATISTIC is not set +CONFIG_NETFILTER_XT_MATCH_STRING=y +CONFIG_NETFILTER_XT_MATCH_TCPMSS=y + +# +# IP: Netfilter Configuration +# +CONFIG_IP_NF_CONNTRACK=m +CONFIG_IP_NF_CT_ACCT=y +CONFIG_IP_NF_CONNTRACK_MARK=y +# CONFIG_IP_NF_CONNTRACK_EVENTS is not set +# CONFIG_IP_NF_CT_PROTO_SCTP is not set +CONFIG_IP_NF_FTP=m +CONFIG_IP_NF_IRC=m +# CONFIG_IP_NF_NETBIOS_NS is not set +CONFIG_IP_NF_TFTP=m +# CONFIG_IP_NF_AMANDA is not set +CONFIG_IP_NF_PPTP=m +# CONFIG_IP_NF_H323 is not set +# CONFIG_IP_NF_SIP is not set +# CONFIG_IP_NF_QUEUE is not set +CONFIG_IP_NF_IPTABLES=y +CONFIG_IP_NF_MATCH_IPRANGE=y +CONFIG_IP_NF_MATCH_LAYER7=m +# CONFIG_IP_NF_MATCH_LAYER7_DEBUG is not set +CONFIG_IP_NF_MATCH_TOS=y +# CONFIG_IP_NF_MATCH_RECENT is not set +CONFIG_IP_NF_MATCH_ECN=y +CONFIG_IP_NF_MATCH_DSCP=y +CONFIG_IP_NF_MATCH_AH=y +CONFIG_IP_NF_MATCH_TTL=y +# CONFIG_IP_NF_MATCH_OWNER is not set +CONFIG_IP_NF_MATCH_ADDRTYPE=y +CONFIG_IP_NF_MATCH_HASHLIMIT=y +CONFIG_IP_NF_FILTER=y +CONFIG_IP_NF_TARGET_REJECT=y +CONFIG_IP_NF_TARGET_LOG=y +CONFIG_IP_NF_TARGET_ULOG=y +CONFIG_IP_NF_TARGET_TCPMSS=y +CONFIG_IP_NF_NAT=m +CONFIG_IP_NF_NAT_NEEDED=y +CONFIG_IP_NF_TARGET_MASQUERADE=m +CONFIG_IP_NF_TARGET_REDIRECT=m +CONFIG_IP_NF_TARGET_NETMAP=m +CONFIG_IP_NF_TARGET_SAME=m +# CONFIG_IP_NF_NAT_SNMP_BASIC is not set +CONFIG_IP_NF_NAT_IRC=m +CONFIG_IP_NF_NAT_FTP=m +CONFIG_IP_NF_NAT_TFTP=m +CONFIG_IP_NF_NAT_PPTP=m +CONFIG_IP_NF_MANGLE=y +CONFIG_IP_NF_TARGET_TOS=y +CONFIG_IP_NF_TARGET_ECN=y +# CONFIG_IP_NF_TARGET_DSCP is not set +CONFIG_IP_NF_TARGET_TTL=y +CONFIG_IP_NF_TARGET_CLUSTERIP=m +CONFIG_IP_NF_RAW=y +CONFIG_IP_NF_ARPTABLES=y +CONFIG_IP_NF_ARPFILTER=y +CONFIG_IP_NF_ARP_MANGLE=y + +# +# Bridge: Netfilter Configuration +# +CONFIG_BRIDGE_NF_EBTABLES=y +CONFIG_BRIDGE_EBT_BROUTE=y +CONFIG_BRIDGE_EBT_T_FILTER=y +CONFIG_BRIDGE_EBT_T_NAT=y +CONFIG_BRIDGE_EBT_802_3=y +CONFIG_BRIDGE_EBT_AMONG=y +CONFIG_BRIDGE_EBT_ARP=y +CONFIG_BRIDGE_EBT_IP=y +CONFIG_BRIDGE_EBT_LIMIT=y +CONFIG_BRIDGE_EBT_MARK=y +CONFIG_BRIDGE_EBT_PKTTYPE=y +CONFIG_BRIDGE_EBT_STP=y +CONFIG_BRIDGE_EBT_VLAN=y +CONFIG_BRIDGE_EBT_ARPREPLY=y +CONFIG_BRIDGE_EBT_DNAT=y +CONFIG_BRIDGE_EBT_MARK_T=y +CONFIG_BRIDGE_EBT_REDIRECT=y +CONFIG_BRIDGE_EBT_SNAT=y +CONFIG_BRIDGE_EBT_LOG=y +CONFIG_BRIDGE_EBT_ULOG=y + +# +# DCCP Configuration (EXPERIMENTAL) +# +# CONFIG_IP_DCCP is not set + +# +# SCTP Configuration (EXPERIMENTAL) +# +# CONFIG_IP_SCTP is not set + +# +# TIPC Configuration (EXPERIMENTAL) +# +# CONFIG_TIPC is not set +# CONFIG_ATM is not set +CONFIG_BRIDGE=y +CONFIG_VLAN_8021Q=y +# CONFIG_DECNET is not set +CONFIG_LLC=y +# CONFIG_LLC2 is not set +# CONFIG_IPX is not set +# CONFIG_ATALK is not set +# CONFIG_X25 is not set +# CONFIG_LAPB is not set +# CONFIG_ECONET is not set +# CONFIG_WAN_ROUTER is not set + +# +# QoS and/or fair queueing +# +CONFIG_NET_SCHED=y +CONFIG_NET_SCH_CLK_JIFFIES=y +# CONFIG_NET_SCH_CLK_GETTIMEOFDAY is not set +# CONFIG_NET_SCH_CLK_CPU is not set + +# +# Queueing/Scheduling +# +# CONFIG_NET_SCH_CBQ is not set +CONFIG_NET_SCH_HTB=y +CONFIG_NET_SCH_HFSC=m +CONFIG_NET_SCH_PRIO=y +CONFIG_NET_SCH_RED=m +CONFIG_NET_SCH_SFQ=y +CONFIG_NET_SCH_TEQL=m +CONFIG_NET_SCH_TBF=y +CONFIG_NET_SCH_GRED=m +CONFIG_NET_SCH_DSMARK=m +# CONFIG_NET_SCH_NETEM is not set +CONFIG_NET_SCH_INGRESS=y + +# +# Classification +# +CONFIG_NET_CLS=y +CONFIG_NET_CLS_BASIC=y +CONFIG_NET_CLS_TCINDEX=y +CONFIG_NET_CLS_ROUTE4=y +CONFIG_NET_CLS_ROUTE=y +CONFIG_NET_CLS_FW=y +CONFIG_NET_CLS_U32=y +# CONFIG_CLS_U32_PERF is not set +CONFIG_CLS_U32_MARK=y +CONFIG_NET_CLS_RSVP=m +# CONFIG_NET_CLS_RSVP6 is not set +# CONFIG_NET_EMATCH is not set +# CONFIG_NET_CLS_ACT is not set +# CONFIG_NET_CLS_POLICE is not set +# CONFIG_NET_CLS_IND is not set +CONFIG_NET_ESTIMATOR=y + +# +# Network testing +# +# CONFIG_NET_PKTGEN is not set +# CONFIG_HAMRADIO is not set +# CONFIG_IRDA is not set +# CONFIG_BT is not set +CONFIG_IEEE80211=m +# CONFIG_IEEE80211_DEBUG is not set +CONFIG_IEEE80211_CRYPT_WEP=m +CONFIG_IEEE80211_CRYPT_CCMP=m +CONFIG_IEEE80211_CRYPT_TKIP=m +# CONFIG_IEEE80211_SOFTMAC is not set +CONFIG_WIRELESS_EXT=y + +# +# Device Drivers +# + +# +# Generic Driver Options +# +CONFIG_STANDALONE=y +CONFIG_PREVENT_FIRMWARE_BUILD=y +CONFIG_FW_LOADER=y +# CONFIG_SYS_HYPERVISOR is not set + +# +# Connector - unified userspace <-> kernelspace linker +# +# CONFIG_CONNECTOR is not set + +# +# Memory Technology Devices (MTD) +# +CONFIG_MTD=y +# CONFIG_MTD_DEBUG is not set +# CONFIG_MTD_CONCAT is not set +CONFIG_MTD_PARTITIONS=y +# CONFIG_MTD_REDBOOT_PARTS is not set +# CONFIG_MTD_CMDLINE_PARTS is not set + +# +# User Modules And Translation Layers +# +CONFIG_MTD_CHAR=y +# CONFIG_MTD_BLOCK is not set +# CONFIG_MTD_BLOCK_RO is not set +# CONFIG_FTL is not set +# CONFIG_NFTL is not set +# CONFIG_INFTL is not set +# CONFIG_RFD_FTL is not set + +# +# RAM/ROM/Flash chip drivers +# +CONFIG_MTD_CFI=y +# CONFIG_MTD_JEDECPROBE is not set +CONFIG_MTD_GEN_PROBE=y +# CONFIG_MTD_CFI_ADV_OPTIONS is not set +CONFIG_MTD_MAP_BANK_WIDTH_1=y +CONFIG_MTD_MAP_BANK_WIDTH_2=y +CONFIG_MTD_MAP_BANK_WIDTH_4=y +# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set +CONFIG_MTD_CFI_I1=y +CONFIG_MTD_CFI_I2=y +# CONFIG_MTD_CFI_I4 is not set +# CONFIG_MTD_CFI_I8 is not set +# CONFIG_MTD_CFI_INTELEXT is not set +CONFIG_MTD_CFI_AMDSTD=y +# CONFIG_MTD_CFI_STAA is not set +CONFIG_MTD_CFI_UTIL=y +# CONFIG_MTD_RAM is not set +# CONFIG_MTD_ROM is not set +# CONFIG_MTD_ABSENT is not set +# CONFIG_MTD_OBSOLETE_CHIPS is not set + +# +# Mapping drivers for chip access +# +# CONFIG_MTD_COMPLEX_MAPPINGS is not set +# CONFIG_MTD_PHYSMAP is not set +CONFIG_MTD_MAGICMAP=y +# CONFIG_MTD_PLATRAM is not set + +# +# Self-contained MTD device drivers +# +# CONFIG_MTD_PMC551 is not set +# CONFIG_MTD_SLRAM is not set +# CONFIG_MTD_PHRAM is not set +# CONFIG_MTD_MTDRAM is not set +# CONFIG_MTD_BLOCK2MTD is not set + +# +# Disk-On-Chip Device Drivers +# +# CONFIG_MTD_DOC2000 is not set +# CONFIG_MTD_DOC2001 is not set +# CONFIG_MTD_DOC2001PLUS is not set + +# +# NAND Flash Device Drivers +# +# CONFIG_MTD_NAND is not set + +# +# OneNAND Flash Device Drivers +# +# CONFIG_MTD_ONENAND is not set + +# +# Parallel port support +# +# CONFIG_PARPORT is not set + +# +# Plug and Play support +# + +# +# Block devices +# +# CONFIG_BLK_DEV_FD is not set +# CONFIG_BLK_CPQ_DA is not set +# CONFIG_BLK_CPQ_CISS_DA is not set +# CONFIG_BLK_DEV_DAC960 is not set +# CONFIG_BLK_DEV_UMEM is not set +# CONFIG_BLK_DEV_COW_COMMON is not set +CONFIG_BLK_DEV_LOOP=m +# CONFIG_BLK_DEV_CRYPTOLOOP is not set +# CONFIG_BLK_DEV_NBD is not set +# CONFIG_BLK_DEV_SX8 is not set +CONFIG_BLK_DEV_RAM=y +CONFIG_BLK_DEV_RAM_COUNT=4 +CONFIG_BLK_DEV_RAM_SIZE=8192 +CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024 +CONFIG_BLK_DEV_INITRD=y +# CONFIG_CDROM_PKTCDVD is not set +# CONFIG_ATA_OVER_ETH is not set + +# +# ATA/ATAPI/MFM/RLL support +# +CONFIG_IDE=y +CONFIG_BLK_DEV_IDE=y + +# +# Please see Documentation/ide.txt for help/info on IDE drives +# +# CONFIG_BLK_DEV_IDE_SATA is not set +CONFIG_BLK_DEV_IDEDISK=y +# CONFIG_IDEDISK_MULTI_MODE is not set +# CONFIG_BLK_DEV_IDECD is not set +# CONFIG_BLK_DEV_IDETAPE is not set +# CONFIG_BLK_DEV_IDEFLOPPY is not set +# CONFIG_IDE_TASK_IOCTL is not set + +# +# IDE chipset support/bugfixes +# +CONFIG_IDE_GENERIC=y +# CONFIG_BLK_DEV_IDEPCI is not set +# CONFIG_IDE_ARM is not set +CONFIG_BLK_DEV_MAGICBOX_IDE=y +CONFIG_BLK_DEV_MAGICBOX_PROTOTYPE=y +# CONFIG_BLK_DEV_IDEDMA is not set +# CONFIG_IDEDMA_AUTO is not set +# CONFIG_BLK_DEV_HD is not set + +# +# SCSI device support +# +# CONFIG_RAID_ATTRS is not set +# CONFIG_SCSI is not set + +# +# Multi-device support (RAID and LVM) +# +# CONFIG_MD is not set + +# +# Fusion MPT device support +# +# CONFIG_FUSION is not set + +# +# IEEE 1394 (FireWire) support +# +# CONFIG_IEEE1394 is not set + +# +# I2O device support +# +# CONFIG_I2O is not set + +# +# Macintosh device drivers +# +# CONFIG_WINDFARM is not set + +# +# Network device support +# +CONFIG_NETDEVICES=y +CONFIG_DUMMY=y +# CONFIG_BONDING is not set +# CONFIG_EQUALIZER is not set +CONFIG_TUN=y + +# +# ARCnet devices +# +# CONFIG_ARCNET is not set + +# +# PHY device support +# + +# +# Ethernet (10 or 100Mbit) +# +# CONFIG_NET_ETHERNET is not set +CONFIG_IBM_EMAC=y +CONFIG_IBM_EMAC_RXB=64 +CONFIG_IBM_EMAC_TXB=8 +CONFIG_IBM_EMAC_POLL_WEIGHT=32 +CONFIG_IBM_EMAC_RX_COPY_THRESHOLD=256 +CONFIG_IBM_EMAC_RX_SKB_HEADROOM=0 +# CONFIG_IBM_EMAC_PHY_RX_CLK_FIX is not set +# CONFIG_IBM_EMAC_DEBUG is not set + +# +# Ethernet (1000 Mbit) +# +# CONFIG_ACENIC is not set +# CONFIG_DL2K is not set +# CONFIG_E1000 is not set +# CONFIG_NS83820 is not set +# CONFIG_HAMACHI is not set +# CONFIG_YELLOWFIN is not set +# CONFIG_R8169 is not set +# CONFIG_SIS190 is not set +# CONFIG_SKGE is not set +# CONFIG_SKY2 is not set +# CONFIG_SK98LIN is not set +# CONFIG_TIGON3 is not set +# CONFIG_BNX2 is not set + +# +# Ethernet (10000 Mbit) +# +# CONFIG_CHELSIO_T1 is not set +# CONFIG_IXGB is not set +# CONFIG_S2IO is not set +# CONFIG_MYRI10GE is not set + +# +# Token Ring devices +# +# CONFIG_TR is not set + +# +# Wireless LAN (non-hamradio) +# +CONFIG_NET_RADIO=y +# CONFIG_NET_WIRELESS_RTNETLINK is not set + +# +# Obsolete Wireless cards support (pre-802.11) +# +# CONFIG_STRIP is not set + +# +# Wireless 802.11b ISA/PCI cards support +# +# CONFIG_IPW2100 is not set +# CONFIG_IPW2200 is not set +# CONFIG_AIRO is not set +CONFIG_HERMES=m +# CONFIG_PLX_HERMES is not set +# CONFIG_TMD_HERMES is not set +# CONFIG_NORTEL_HERMES is not set +CONFIG_PCI_HERMES=m +# CONFIG_ATMEL is not set + +# +# Prism GT/Duette 802.11(a/b/g) PCI/Cardbus support +# +# CONFIG_PRISM54 is not set +CONFIG_HOSTAP=m +CONFIG_HOSTAP_FIRMWARE=y +# CONFIG_HOSTAP_FIRMWARE_NVRAM is not set +# CONFIG_HOSTAP_PLX is not set +CONFIG_HOSTAP_PCI=m +CONFIG_NET_WIRELESS=y + +# +# Wan interfaces +# +# CONFIG_WAN is not set +# CONFIG_FDDI is not set +# CONFIG_HIPPI is not set +# CONFIG_PPP is not set +# CONFIG_SLIP is not set +# CONFIG_SHAPER is not set +# CONFIG_NETCONSOLE is not set +# CONFIG_NETPOLL is not set +# CONFIG_NET_POLL_CONTROLLER is not set + +# +# ISDN subsystem +# +# CONFIG_ISDN is not set + +# +# Telephony Support +# +# CONFIG_PHONE is not set + +# +# Input device support +# +# CONFIG_INPUT is not set + +# +# Hardware I/O ports +# +# CONFIG_SERIO is not set +# CONFIG_GAMEPORT is not set + +# +# Character devices +# +# CONFIG_VT is not set +# CONFIG_SERIAL_NONSTANDARD is not set + +# +# Serial drivers +# +CONFIG_SERIAL_8250=y +CONFIG_SERIAL_8250_CONSOLE=y +# CONFIG_SERIAL_8250_PCI is not set +CONFIG_SERIAL_8250_NR_UARTS=4 +CONFIG_SERIAL_8250_RUNTIME_UARTS=4 +# CONFIG_SERIAL_8250_EXTENDED is not set + +# +# Non-8250 serial port support +# +CONFIG_SERIAL_CORE=y +CONFIG_SERIAL_CORE_CONSOLE=y +# CONFIG_SERIAL_JSM is not set +CONFIG_UNIX98_PTYS=y +# CONFIG_LEGACY_PTYS is not set + +# +# IPMI +# +# CONFIG_IPMI_HANDLER is not set + +# +# Watchdog Cards +# +CONFIG_WATCHDOG=y +# CONFIG_WATCHDOG_NOWAYOUT is not set + +# +# Watchdog Device Drivers +# +CONFIG_SOFT_WATCHDOG=y +# CONFIG_BOOKE_WDT is not set + +# +# PCI-based Watchdog Cards +# +# CONFIG_PCIPCWATCHDOG is not set +# CONFIG_WDTPCI is not set +# CONFIG_HW_RANDOM is not set +# CONFIG_NVRAM is not set +# CONFIG_GEN_RTC is not set +# CONFIG_DTLK is not set +# CONFIG_R3964 is not set +# CONFIG_APPLICOM is not set + +# +# Ftape, the floppy tape device driver +# +# CONFIG_AGP is not set +# CONFIG_DRM is not set +# CONFIG_RAW_DRIVER is not set + +# +# TPM devices +# +# CONFIG_TCG_TPM is not set +# CONFIG_TELCLOCK is not set + +# +# I2C support +# +CONFIG_I2C=y +CONFIG_I2C_CHARDEV=y + +# +# I2C Algorithms +# +# CONFIG_I2C_ALGOBIT is not set +# CONFIG_I2C_ALGOPCF is not set +# CONFIG_I2C_ALGOPCA is not set + +# +# I2C Hardware Bus support +# +# CONFIG_I2C_ALI1535 is not set +# CONFIG_I2C_ALI1563 is not set +# CONFIG_I2C_ALI15X3 is not set +# CONFIG_I2C_AMD756 is not set +# CONFIG_I2C_AMD8111 is not set +# CONFIG_I2C_I801 is not set +# CONFIG_I2C_I810 is not set +# CONFIG_I2C_PIIX4 is not set +CONFIG_I2C_IBM_IIC=y +# CONFIG_I2C_MPC is not set +# CONFIG_I2C_NFORCE2 is not set +# CONFIG_I2C_OCORES is not set +# CONFIG_I2C_PARPORT_LIGHT is not set +# CONFIG_I2C_PROSAVAGE is not set +# CONFIG_I2C_SAVAGE4 is not set +# CONFIG_I2C_SIS5595 is not set +# CONFIG_I2C_SIS630 is not set +# CONFIG_I2C_SIS96X is not set +# CONFIG_I2C_STUB is not set +# CONFIG_I2C_VIA is not set +# CONFIG_I2C_VIAPRO is not set +# CONFIG_I2C_VOODOO3 is not set +# CONFIG_I2C_PCA_ISA is not set + +# +# Miscellaneous I2C Chip support +# +# CONFIG_SENSORS_DS1337 is not set +# CONFIG_SENSORS_DS1374 is not set +# CONFIG_SENSORS_EEPROM is not set +# CONFIG_SENSORS_PCF8574 is not set +# CONFIG_SENSORS_PCA9539 is not set +# CONFIG_SENSORS_PCF8591 is not set +# CONFIG_SENSORS_M41T00 is not set +# CONFIG_SENSORS_MAX6875 is not set +# CONFIG_I2C_DEBUG_CORE is not set +# CONFIG_I2C_DEBUG_ALGO is not set +# CONFIG_I2C_DEBUG_BUS is not set +# CONFIG_I2C_DEBUG_CHIP is not set + +# +# SPI support +# +# CONFIG_SPI is not set +# CONFIG_SPI_MASTER is not set + +# +# Dallas's 1-wire bus +# + +# +# Hardware Monitoring support +# +CONFIG_HWMON=y +# CONFIG_HWMON_VID is not set +# CONFIG_SENSORS_ABITUGURU is not set +# CONFIG_SENSORS_ADM1021 is not set +# CONFIG_SENSORS_ADM1025 is not set +# CONFIG_SENSORS_ADM1026 is not set +# CONFIG_SENSORS_ADM1031 is not set +# CONFIG_SENSORS_ADM9240 is not set +# CONFIG_SENSORS_ASB100 is not set +# CONFIG_SENSORS_ATXP1 is not set +# CONFIG_SENSORS_DS1621 is not set +# CONFIG_SENSORS_F71805F is not set +# CONFIG_SENSORS_FSCHER is not set +# CONFIG_SENSORS_FSCPOS is not set +# CONFIG_SENSORS_GL518SM is not set +# CONFIG_SENSORS_GL520SM is not set +# CONFIG_SENSORS_IT87 is not set +# CONFIG_SENSORS_LM63 is not set +CONFIG_SENSORS_LM75=y +# CONFIG_SENSORS_LM77 is not set +# CONFIG_SENSORS_LM78 is not set +# CONFIG_SENSORS_LM80 is not set +# CONFIG_SENSORS_LM83 is not set +# CONFIG_SENSORS_LM85 is not set +# CONFIG_SENSORS_LM87 is not set +# CONFIG_SENSORS_LM90 is not set +# CONFIG_SENSORS_LM92 is not set +# CONFIG_SENSORS_MAX1619 is not set +# CONFIG_SENSORS_PC87360 is not set +# CONFIG_SENSORS_SIS5595 is not set +# CONFIG_SENSORS_SMSC47M1 is not set +# CONFIG_SENSORS_SMSC47M192 is not set +# CONFIG_SENSORS_SMSC47B397 is not set +# CONFIG_SENSORS_VIA686A is not set +# CONFIG_SENSORS_VT8231 is not set +# CONFIG_SENSORS_W83781D is not set +# CONFIG_SENSORS_W83791D is not set +# CONFIG_SENSORS_W83792D is not set +# CONFIG_SENSORS_W83L785TS is not set +# CONFIG_SENSORS_W83627HF is not set +# CONFIG_SENSORS_W83627EHF is not set +# CONFIG_HWMON_DEBUG_CHIP is not set + +# +# Misc devices +# + +# +# Multimedia devices +# +# CONFIG_VIDEO_DEV is not set + +# +# Digital Video Broadcasting Devices +# +# CONFIG_DVB is not set + +# +# Graphics support +# +# CONFIG_FIRMWARE_EDID is not set +# CONFIG_FB is not set +# CONFIG_BACKLIGHT_LCD_SUPPORT is not set + +# +# Sound +# +# CONFIG_SOUND is not set + +# +# USB support +# +CONFIG_USB_ARCH_HAS_HCD=y +CONFIG_USB_ARCH_HAS_OHCI=y +CONFIG_USB_ARCH_HAS_EHCI=y +# CONFIG_USB is not set + +# +# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' +# + +# +# USB Gadget Support +# +# CONFIG_USB_GADGET is not set + +# +# MMC/SD Card support +# +# CONFIG_MMC is not set + +# +# LED devices +# +# CONFIG_NEW_LEDS is not set + +# +# LED drivers +# + +# +# LED Triggers +# + +# +# InfiniBand support +# +# CONFIG_INFINIBAND is not set + +# +# EDAC - error detection and reporting (RAS) (EXPERIMENTAL) +# + +# +# Real Time Clock +# +# CONFIG_RTC_CLASS is not set + +# +# DMA Engine support +# +# CONFIG_DMA_ENGINE is not set + +# +# DMA Clients +# + +# +# DMA Devices +# + +# +# File systems +# +CONFIG_EXT2_FS=m +# CONFIG_EXT2_FS_XATTR is not set +# CONFIG_EXT2_FS_XIP is not set +# CONFIG_EXT3_FS is not set +# CONFIG_REISERFS_FS is not set +# CONFIG_JFS_FS is not set +# CONFIG_FS_POSIX_ACL is not set +# CONFIG_XFS_FS is not set +# CONFIG_OCFS2_FS is not set +# CONFIG_MINIX_FS is not set +CONFIG_ROMFS_FS=y +# CONFIG_INOTIFY is not set +# CONFIG_QUOTA is not set +CONFIG_DNOTIFY=y +# CONFIG_AUTOFS_FS is not set +# CONFIG_AUTOFS4_FS is not set +# CONFIG_FUSE_FS is not set + +# +# CD-ROM/DVD Filesystems +# +# CONFIG_ISO9660_FS is not set +# CONFIG_UDF_FS is not set + +# +# DOS/FAT/NT Filesystems +# +# CONFIG_MSDOS_FS is not set +# CONFIG_VFAT_FS is not set +# CONFIG_NTFS_FS is not set + +# +# Pseudo filesystems +# +CONFIG_PROC_FS=y +# CONFIG_PROC_KCORE is not set +CONFIG_SYSFS=y +CONFIG_TMPFS=y +# CONFIG_HUGETLB_PAGE is not set +CONFIG_RAMFS=y +# CONFIG_CONFIGFS_FS is not set + +# +# Miscellaneous filesystems +# +# CONFIG_ADFS_FS is not set +# CONFIG_AFFS_FS is not set +# CONFIG_HFS_FS is not set +# CONFIG_HFSPLUS_FS is not set +# CONFIG_BEFS_FS is not set +# CONFIG_BFS_FS is not set +# CONFIG_EFS_FS is not set +# CONFIG_JFFS_FS is not set +# CONFIG_JFFS2_FS is not set +# CONFIG_CRAMFS is not set +CONFIG_SQUASHFS=y +# CONFIG_SQUASHFS_EMBEDDED is not set +CONFIG_SQUASHFS_FRAGMENT_CACHE_SIZE=3 +# CONFIG_SQUASHFS_VMALLOC is not set +# CONFIG_VXFS_FS is not set +# CONFIG_HPFS_FS is not set +# CONFIG_QNX4FS_FS is not set +# CONFIG_SYSV_FS is not set +# CONFIG_UFS_FS is not set + +# +# Network File Systems +# +CONFIG_NFS_FS=m +CONFIG_NFS_V3=y +# CONFIG_NFS_V3_ACL is not set +# CONFIG_NFS_V4 is not set +# CONFIG_NFS_DIRECTIO is not set +# CONFIG_NFSD is not set +CONFIG_LOCKD=m +CONFIG_LOCKD_V4=y +CONFIG_NFS_COMMON=y +CONFIG_SUNRPC=m +# CONFIG_RPCSEC_GSS_KRB5 is not set +# CONFIG_RPCSEC_GSS_SPKM3 is not set +# CONFIG_SMB_FS is not set +# CONFIG_CIFS is not set +# CONFIG_NCP_FS is not set +# CONFIG_CODA_FS is not set +# CONFIG_AFS_FS is not set +# CONFIG_9P_FS is not set + +# +# Partition Types +# +CONFIG_PARTITION_ADVANCED=y +# CONFIG_ACORN_PARTITION is not set +# CONFIG_OSF_PARTITION is not set +# CONFIG_AMIGA_PARTITION is not set +# CONFIG_ATARI_PARTITION is not set +# CONFIG_MAC_PARTITION is not set +CONFIG_MSDOS_PARTITION=y +# CONFIG_BSD_DISKLABEL is not set +# CONFIG_MINIX_SUBPARTITION is not set +# CONFIG_SOLARIS_X86_PARTITION is not set +# CONFIG_UNIXWARE_DISKLABEL is not set +# CONFIG_LDM_PARTITION is not set +# CONFIG_SGI_PARTITION is not set +# CONFIG_ULTRIX_PARTITION is not set +# CONFIG_SUN_PARTITION is not set +# CONFIG_KARMA_PARTITION is not set +# CONFIG_EFI_PARTITION is not set + +# +# Native Language Support +# +# CONFIG_NLS is not set + +# +# IBM 40x options +# + +# +# Library routines +# +CONFIG_CRC_CCITT=m +# CONFIG_CRC16 is not set +CONFIG_CRC32=y +# CONFIG_LIBCRC32C is not set +CONFIG_ZLIB_INFLATE=y +CONFIG_TEXTSEARCH=y +CONFIG_TEXTSEARCH_KMP=y +CONFIG_TEXTSEARCH_BM=y +CONFIG_TEXTSEARCH_FSM=y +# CONFIG_PROFILING is not set + +# +# Kernel hacking +# +# CONFIG_PRINTK_TIME is not set +# CONFIG_MAGIC_SYSRQ is not set +# CONFIG_UNUSED_SYMBOLS is not set +# CONFIG_DEBUG_KERNEL is not set +CONFIG_LOG_BUF_SHIFT=14 +# CONFIG_DEBUG_FS is not set +# CONFIG_SERIAL_TEXT_DEBUG is not set +CONFIG_PPC_OCP=y + +# +# Security options +# +# CONFIG_KEYS is not set +# CONFIG_SECURITY is not set + +# +# Cryptographic options +# +CONFIG_CRYPTO=y +# CONFIG_CRYPTO_HMAC is not set +# CONFIG_CRYPTO_NULL is not set +# CONFIG_CRYPTO_MD4 is not set +# CONFIG_CRYPTO_MD5 is not set +# CONFIG_CRYPTO_SHA1 is not set +# CONFIG_CRYPTO_SHA256 is not set +# CONFIG_CRYPTO_SHA512 is not set +# CONFIG_CRYPTO_WP512 is not set +# CONFIG_CRYPTO_TGR192 is not set +# CONFIG_CRYPTO_DES is not set +# CONFIG_CRYPTO_BLOWFISH is not set +# CONFIG_CRYPTO_TWOFISH is not set +# CONFIG_CRYPTO_SERPENT is not set +CONFIG_CRYPTO_AES=y +# CONFIG_CRYPTO_CAST5 is not set +# CONFIG_CRYPTO_CAST6 is not set +# CONFIG_CRYPTO_TEA is not set +CONFIG_CRYPTO_ARC4=y +# CONFIG_CRYPTO_KHAZAD is not set +# CONFIG_CRYPTO_ANUBIS is not set +# CONFIG_CRYPTO_DEFLATE is not set +CONFIG_CRYPTO_MICHAEL_MIC=y +# CONFIG_CRYPTO_CRC32C is not set +# CONFIG_CRYPTO_TEST is not set + +# +# Hardware crypto devices +# diff --git a/packages/linux/linux-magicbox-2.6.18.6/kernel-2.6.18-layer7-2.6.patch b/packages/linux/linux-magicbox-2.6.18.6/kernel-2.6.18-layer7-2.6.patch new file mode 100644 index 0000000000..63e36d7a5c --- /dev/null +++ b/packages/linux/linux-magicbox-2.6.18.6/kernel-2.6.18-layer7-2.6.patch @@ -0,0 +1,2051 @@ +--- linux-2.6.18/include/linux/netfilter_ipv4/ip_conntrack.h 2006-09-19 22:42:06.000000000 -0500 ++++ linux-2.6.18-layer7/include/linux/netfilter_ipv4/ip_conntrack.h 2006-09-24 10:17:45.000000000 -0500 +@@ -127,6 +127,15 @@ struct ip_conntrack + /* Traversed often, so hopefully in different cacheline to top */ + /* These are my tuples; original and reply */ + struct ip_conntrack_tuple_hash tuplehash[IP_CT_DIR_MAX]; ++ ++#if defined(CONFIG_IP_NF_MATCH_LAYER7) || defined(CONFIG_IP_NF_MATCH_LAYER7_MODULE) ++ struct { ++ char * app_proto; /* e.g. "http". NULL before decision. "unknown" after decision if no match */ ++ char * app_data; /* application layer data so far. NULL after match decision */ ++ unsigned int app_data_len; ++ } layer7; ++#endif ++ + }; + + struct ip_conntrack_expect +--- linux-2.6.18/include/linux/netfilter_ipv4/ipt_layer7.h 1969-12-31 18:00:00.000000000 -0600 ++++ linux-2.6.18-layer7/include/linux/netfilter_ipv4/ipt_layer7.h 2006-09-24 10:17:45.000000000 -0500 +@@ -0,0 +1,26 @@ ++/* ++ By Matthew Strait <quadong@users.sf.net>, Dec 2003. ++ http://l7-filter.sf.net ++ ++ This program is free software; you can redistribute it and/or ++ modify it under the terms of the GNU General Public License ++ as published by the Free Software Foundation; either version ++ 2 of the License, or (at your option) any later version. ++ http://www.gnu.org/licenses/gpl.txt ++*/ ++ ++#ifndef _IPT_LAYER7_H ++#define _IPT_LAYER7_H ++ ++#define MAX_PATTERN_LEN 8192 ++#define MAX_PROTOCOL_LEN 256 ++ ++typedef char *(*proc_ipt_search) (char *, char, char *); ++ ++struct ipt_layer7_info { ++ char protocol[MAX_PROTOCOL_LEN]; ++ char invert:1; ++ char pattern[MAX_PATTERN_LEN]; ++}; ++ ++#endif /* _IPT_LAYER7_H */ +--- linux-2.6.18/net/ipv4/netfilter/Kconfig 2006-09-19 22:42:06.000000000 -0500 ++++ linux-2.6.18-layer7/net/ipv4/netfilter/Kconfig 2006-09-24 10:17:45.000000000 -0500 +@@ -248,6 +248,24 @@ config IP_NF_MATCH_IPRANGE + + To compile it as a module, choose M here. If unsure, say N. + ++config IP_NF_MATCH_LAYER7 ++ tristate "Layer 7 match support (EXPERIMENTAL)" ++ depends on IP_NF_IPTABLES && IP_NF_CT_ACCT && IP_NF_CONNTRACK && EXPERIMENTAL ++ help ++ Say Y if you want to be able to classify connections (and their ++ packets) based on regular expression matching of their application ++ layer data. This is one way to classify applications such as ++ peer-to-peer filesharing systems that do not always use the same ++ port. ++ ++ To compile it as a module, choose M here. If unsure, say N. ++ ++config IP_NF_MATCH_LAYER7_DEBUG ++ bool "Layer 7 debugging output" ++ depends on IP_NF_MATCH_LAYER7 ++ help ++ Say Y to get lots of debugging output. ++ + config IP_NF_MATCH_TOS + tristate "TOS match support" + depends on IP_NF_IPTABLES +--- linux-2.6.18/net/ipv4/netfilter/Makefile 2006-09-19 22:42:06.000000000 -0500 ++++ linux-2.6.18-layer7/net/ipv4/netfilter/Makefile 2006-09-24 10:17:45.000000000 -0500 +@@ -64,6 +64,8 @@ obj-$(CONFIG_IP_NF_MATCH_AH) += ipt_ah.o + obj-$(CONFIG_IP_NF_MATCH_TTL) += ipt_ttl.o + obj-$(CONFIG_IP_NF_MATCH_ADDRTYPE) += ipt_addrtype.o + ++obj-$(CONFIG_IP_NF_MATCH_LAYER7) += ipt_layer7.o ++ + # targets + obj-$(CONFIG_IP_NF_TARGET_REJECT) += ipt_REJECT.o + obj-$(CONFIG_IP_NF_TARGET_TOS) += ipt_TOS.o +--- linux-2.6.18/net/ipv4/netfilter/ip_conntrack_core.c 2006-09-19 22:42:06.000000000 -0500 ++++ linux-2.6.18-layer7/net/ipv4/netfilter/ip_conntrack_core.c 2006-09-24 10:17:45.000000000 -0500 +@@ -338,6 +338,13 @@ destroy_conntrack(struct nf_conntrack *n + * too. */ + ip_ct_remove_expectations(ct); + ++ #if defined(CONFIG_IP_NF_MATCH_LAYER7) || defined(CONFIG_IP_NF_MATCH_LAYER7_MODULE) ++ if(ct->layer7.app_proto) ++ kfree(ct->layer7.app_proto); ++ if(ct->layer7.app_data) ++ kfree(ct->layer7.app_data); ++ #endif ++ + /* We overload first tuple to link into unconfirmed list. */ + if (!is_confirmed(ct)) { + BUG_ON(list_empty(&ct->tuplehash[IP_CT_DIR_ORIGINAL].list)); +--- linux-2.6.18/net/ipv4/netfilter/ip_conntrack_standalone.c 2006-09-19 22:42:06.000000000 -0500 ++++ linux-2.6.18-layer7/net/ipv4/netfilter/ip_conntrack_standalone.c 2006-09-24 10:17:45.000000000 -0500 +@@ -193,6 +193,12 @@ static int ct_seq_show(struct seq_file * + return -ENOSPC; + #endif + ++#if defined(CONFIG_IP_NF_MATCH_LAYER7) || defined(CONFIG_IP_NF_MATCH_LAYER7_MODULE) ++ if(conntrack->layer7.app_proto) ++ if (seq_printf(s, "l7proto=%s ",conntrack->layer7.app_proto)) ++ return 1; ++#endif ++ + if (seq_printf(s, "use=%u\n", atomic_read(&conntrack->ct_general.use))) + return -ENOSPC; + +--- linux-2.6.18/net/ipv4/netfilter/ipt_layer7.c 1969-12-31 18:00:00.000000000 -0600 ++++ linux-2.6.18-layer7/net/ipv4/netfilter/ipt_layer7.c 2006-09-24 10:59:55.000000000 -0500 +@@ -0,0 +1,582 @@ ++/* ++ Kernel module to match application layer (OSI layer 7) ++ data in connections. ++ ++ http://l7-filter.sf.net ++ ++ By Matthew Strait and Ethan Sommer, 2003-2005. ++ ++ This program is free software; you can redistribute it and/or ++ modify it under the terms of the GNU General Public License ++ as published by the Free Software Foundation; either version ++ 2 of the License, or (at your option) any later version. ++ http://www.gnu.org/licenses/gpl.txt ++ ++ Based on ipt_string.c (C) 2000 Emmanuel Roger <winfield@freegates.be> ++ and cls_layer7.c (C) 2003 Matthew Strait, Ethan Sommer, Justin Levandoski ++*/ ++ ++#include <linux/module.h> ++#include <linux/skbuff.h> ++#include <linux/netfilter_ipv4/ip_conntrack.h> ++#include <linux/proc_fs.h> ++#include <linux/ctype.h> ++#include <net/ip.h> ++#include <net/tcp.h> ++#include <linux/spinlock.h> ++ ++#include "regexp/regexp.c" ++ ++#include <linux/netfilter_ipv4/ipt_layer7.h> ++#include <linux/netfilter_ipv4/ip_tables.h> ++ ++MODULE_AUTHOR("Matthew Strait <quadong@users.sf.net>, Ethan Sommer <sommere@users.sf.net>"); ++MODULE_LICENSE("GPL"); ++MODULE_DESCRIPTION("iptables application layer match module"); ++MODULE_VERSION("2.0"); ++ ++static int maxdatalen = 2048; // this is the default ++module_param(maxdatalen, int, 0444); ++MODULE_PARM_DESC(maxdatalen, "maximum bytes of data looked at by l7-filter"); ++ ++#ifdef CONFIG_IP_NF_MATCH_LAYER7_DEBUG ++ #define DPRINTK(format,args...) printk(format,##args) ++#else ++ #define DPRINTK(format,args...) ++#endif ++ ++#define TOTAL_PACKETS master_conntrack->counters[IP_CT_DIR_ORIGINAL].packets + \ ++ master_conntrack->counters[IP_CT_DIR_REPLY].packets ++ ++/* Number of packets whose data we look at. ++This can be modified through /proc/net/layer7_numpackets */ ++static int num_packets = 10; ++ ++static struct pattern_cache { ++ char * regex_string; ++ regexp * pattern; ++ struct pattern_cache * next; ++} * first_pattern_cache = NULL; ++ ++/* I'm new to locking. Here are my assumptions: ++ ++- No one will write to /proc/net/layer7_numpackets over and over very fast; ++ if they did, nothing awful would happen. ++ ++- This code will never be processing the same packet twice at the same time, ++ because iptables rules are traversed in order. ++ ++- It doesn't matter if two packets from different connections are in here at ++ the same time, because they don't share any data. ++ ++- It _does_ matter if two packets from the same connection (or one from a ++ master and one from its child) are here at the same time. In this case, ++ we have to protect the conntracks and the list of compiled patterns. ++*/ ++DEFINE_RWLOCK(ct_lock); ++DEFINE_SPINLOCK(list_lock); ++ ++#ifdef CONFIG_IP_NF_MATCH_LAYER7_DEBUG ++/* Converts an unfriendly string into a friendly one by ++replacing unprintables with periods and all whitespace with " ". */ ++static char * friendly_print(unsigned char * s) ++{ ++ char * f = kmalloc(strlen(s) + 1, GFP_ATOMIC); ++ int i; ++ ++ if(!f) { ++ if (net_ratelimit()) ++ printk(KERN_ERR "layer7: out of memory in friendly_print, bailing.\n"); ++ return NULL; ++ } ++ ++ for(i = 0; i < strlen(s); i++){ ++ if(isprint(s[i]) && s[i] < 128) f[i] = s[i]; ++ else if(isspace(s[i])) f[i] = ' '; ++ else f[i] = '.'; ++ } ++ f[i] = '\0'; ++ return f; ++} ++ ++static char dec2hex(int i) ++{ ++ switch (i) { ++ case 0 ... 9: ++ return (char)(i + '0'); ++ break; ++ case 10 ... 15: ++ return (char)(i - 10 + 'a'); ++ break; ++ default: ++ if (net_ratelimit()) ++ printk("Problem in dec2hex\n"); ++ return '\0'; ++ } ++} ++ ++static char * hex_print(unsigned char * s) ++{ ++ char * g = kmalloc(strlen(s)*3 + 1, GFP_ATOMIC); ++ int i; ++ ++ if(!g) { ++ if (net_ratelimit()) ++ printk(KERN_ERR "layer7: out of memory in hex_print, bailing.\n"); ++ return NULL; ++ } ++ ++ for(i = 0; i < strlen(s); i++) { ++ g[i*3 ] = dec2hex(s[i]/16); ++ g[i*3 + 1] = dec2hex(s[i]%16); ++ g[i*3 + 2] = ' '; ++ } ++ g[i*3] = '\0'; ++ ++ return g; ++} ++#endif // DEBUG ++ ++/* Use instead of regcomp. As we expect to be seeing the same regexps over and ++over again, it make sense to cache the results. */ ++static regexp * compile_and_cache(char * regex_string, char * protocol) ++{ ++ struct pattern_cache * node = first_pattern_cache; ++ struct pattern_cache * last_pattern_cache = first_pattern_cache; ++ struct pattern_cache * tmp; ++ unsigned int len; ++ ++ while (node != NULL) { ++ if (!strcmp(node->regex_string, regex_string)) ++ return node->pattern; ++ ++ last_pattern_cache = node;/* points at the last non-NULL node */ ++ node = node->next; ++ } ++ ++ /* If we reach the end of the list, then we have not yet cached ++ the pattern for this regex. Let's do that now. ++ Be paranoid about running out of memory to avoid list corruption. */ ++ tmp = kmalloc(sizeof(struct pattern_cache), GFP_ATOMIC); ++ ++ if(!tmp) { ++ if (net_ratelimit()) ++ printk(KERN_ERR "layer7: out of memory in compile_and_cache, bailing.\n"); ++ return NULL; ++ } ++ ++ tmp->regex_string = kmalloc(strlen(regex_string) + 1, GFP_ATOMIC); ++ tmp->pattern = kmalloc(sizeof(struct regexp), GFP_ATOMIC); ++ tmp->next = NULL; ++ ++ if(!tmp->regex_string || !tmp->pattern) { ++ if (net_ratelimit()) ++ printk(KERN_ERR "layer7: out of memory in compile_and_cache, bailing.\n"); ++ kfree(tmp->regex_string); ++ kfree(tmp->pattern); ++ kfree(tmp); ++ return NULL; ++ } ++ ++ /* Ok. The new node is all ready now. */ ++ node = tmp; ++ ++ if(first_pattern_cache == NULL) /* list is empty */ ++ first_pattern_cache = node; /* make node the beginning */ ++ else ++ last_pattern_cache->next = node; /* attach node to the end */ ++ ++ /* copy the string and compile the regex */ ++ len = strlen(regex_string); ++ DPRINTK("About to compile this: \"%s\"\n", regex_string); ++ node->pattern = regcomp(regex_string, &len); ++ if ( !node->pattern ) { ++ if (net_ratelimit()) ++ printk(KERN_ERR "layer7: Error compiling regexp \"%s\" (%s)\n", regex_string, protocol); ++ /* pattern is now cached as NULL, so we won't try again. */ ++ } ++ ++ strcpy(node->regex_string, regex_string); ++ return node->pattern; ++} ++ ++static int can_handle(const struct sk_buff *skb) ++{ ++ if(!skb->nh.iph) /* not IP */ ++ return 0; ++ if(skb->nh.iph->protocol != IPPROTO_TCP && ++ skb->nh.iph->protocol != IPPROTO_UDP && ++ skb->nh.iph->protocol != IPPROTO_ICMP) ++ return 0; ++ return 1; ++} ++ ++/* Returns offset the into the skb->data that the application data starts */ ++static int app_data_offset(const struct sk_buff *skb) ++{ ++ /* In case we are ported somewhere (ebtables?) where skb->nh.iph ++ isn't set, this can be gotten from 4*(skb->data[0] & 0x0f) as well. */ ++ int ip_hl = 4*skb->nh.iph->ihl; ++ ++ if( skb->nh.iph->protocol == IPPROTO_TCP ) { ++ /* 12 == offset into TCP header for the header length field. ++ Can't get this with skb->h.th->doff because the tcphdr ++ struct doesn't get set when routing (this is confirmed to be ++ true in Netfilter as well as QoS.) */ ++ int tcp_hl = 4*(skb->data[ip_hl + 12] >> 4); ++ ++ return ip_hl + tcp_hl; ++ } else if( skb->nh.iph->protocol == IPPROTO_UDP ) { ++ return ip_hl + 8; /* UDP header is always 8 bytes */ ++ } else if( skb->nh.iph->protocol == IPPROTO_ICMP ) { ++ return ip_hl + 8; /* ICMP header is 8 bytes */ ++ } else { ++ if (net_ratelimit()) ++ printk(KERN_ERR "layer7: tried to handle unknown protocol!\n"); ++ return ip_hl + 8; /* something reasonable */ ++ } ++} ++ ++/* handles whether there's a match when we aren't appending data anymore */ ++static int match_no_append(struct ip_conntrack * conntrack, struct ip_conntrack * master_conntrack, ++ enum ip_conntrack_info ctinfo, enum ip_conntrack_info master_ctinfo, ++ struct ipt_layer7_info * info) ++{ ++ /* If we're in here, throw the app data away */ ++ write_lock(&ct_lock); ++ if(master_conntrack->layer7.app_data != NULL) { ++ ++ #ifdef CONFIG_IP_NF_MATCH_LAYER7_DEBUG ++ if(!master_conntrack->layer7.app_proto) { ++ char * f = friendly_print(master_conntrack->layer7.app_data); ++ char * g = hex_print(master_conntrack->layer7.app_data); ++ DPRINTK("\nl7-filter gave up after %d bytes (%d packets):\n%s\n", ++ strlen(f), TOTAL_PACKETS, f); ++ kfree(f); ++ DPRINTK("In hex: %s\n", g); ++ kfree(g); ++ } ++ #endif ++ ++ kfree(master_conntrack->layer7.app_data); ++ master_conntrack->layer7.app_data = NULL; /* don't free again */ ++ } ++ write_unlock(&ct_lock); ++ ++ if(master_conntrack->layer7.app_proto){ ++ /* Here child connections set their .app_proto (for /proc/net/ip_conntrack) */ ++ write_lock(&ct_lock); ++ if(!conntrack->layer7.app_proto) { ++ conntrack->layer7.app_proto = kmalloc(strlen(master_conntrack->layer7.app_proto)+1, GFP_ATOMIC); ++ if(!conntrack->layer7.app_proto){ ++ if (net_ratelimit()) ++ printk(KERN_ERR "layer7: out of memory in match_no_append, bailing.\n"); ++ write_unlock(&ct_lock); ++ return 1; ++ } ++ strcpy(conntrack->layer7.app_proto, master_conntrack->layer7.app_proto); ++ } ++ write_unlock(&ct_lock); ++ ++ return (!strcmp(master_conntrack->layer7.app_proto, info->protocol)); ++ } ++ else { ++ /* If not classified, set to "unknown" to distinguish from ++ connections that are still being tested. */ ++ write_lock(&ct_lock); ++ master_conntrack->layer7.app_proto = kmalloc(strlen("unknown")+1, GFP_ATOMIC); ++ if(!master_conntrack->layer7.app_proto){ ++ if (net_ratelimit()) ++ printk(KERN_ERR "layer7: out of memory in match_no_append, bailing.\n"); ++ write_unlock(&ct_lock); ++ return 1; ++ } ++ strcpy(master_conntrack->layer7.app_proto, "unknown"); ++ write_unlock(&ct_lock); ++ return 0; ++ } ++} ++ ++/* add the new app data to the conntrack. Return number of bytes added. */ ++static int add_data(struct ip_conntrack * master_conntrack, ++ char * app_data, int appdatalen) ++{ ++ int length = 0, i; ++ int oldlength = master_conntrack->layer7.app_data_len; ++ ++ // This is a fix for a race condition by Deti Fliegl. However, I'm not ++ // clear on whether the race condition exists or whether this really ++ // fixes it. I might just be being dense... Anyway, if it's not really ++ // a fix, all it does is waste a very small amount of time. ++ if(!master_conntrack->layer7.app_data) return 0; ++ ++ /* Strip nulls. Make everything lower case (our regex lib doesn't ++ do case insensitivity). Add it to the end of the current data. */ ++ for(i = 0; i < maxdatalen-oldlength-1 && ++ i < appdatalen; i++) { ++ if(app_data[i] != '\0') { ++ master_conntrack->layer7.app_data[length+oldlength] = ++ /* the kernel version of tolower mungs 'upper ascii' */ ++ isascii(app_data[i])? tolower(app_data[i]) : app_data[i]; ++ length++; ++ } ++ } ++ ++ master_conntrack->layer7.app_data[length+oldlength] = '\0'; ++ master_conntrack->layer7.app_data_len = length + oldlength; ++ ++ return length; ++} ++ ++/* Returns true on match and false otherwise. */ ++static int match(/* const */ struct sk_buff *skb, ++ const struct net_device *in, const struct net_device *out, ++ const struct xt_match *match, const void *matchinfo, ++ int offset, unsigned int protoff, int *hotdrop) ++{ ++ struct ipt_layer7_info * info = (struct ipt_layer7_info *)matchinfo; ++ enum ip_conntrack_info master_ctinfo, ctinfo; ++ struct ip_conntrack *master_conntrack, *conntrack; ++ unsigned char * app_data; ++ unsigned int pattern_result, appdatalen; ++ regexp * comppattern; ++ ++ if(!can_handle(skb)){ ++ DPRINTK("layer7: This is some protocol I can't handle.\n"); ++ return info->invert; ++ } ++ ++ /* Treat parent & all its children together as one connection, except ++ for the purpose of setting conntrack->layer7.app_proto in the actual ++ connection. This makes /proc/net/ip_conntrack more satisfying. */ ++ if(!(conntrack = ip_conntrack_get((struct sk_buff *)skb, &ctinfo)) || ++ !(master_conntrack = ip_conntrack_get((struct sk_buff *)skb, &master_ctinfo))) { ++ //DPRINTK("layer7: packet is not from a known connection, giving up.\n"); ++ return info->invert; ++ } ++ ++ /* Try to get a master conntrack (and its master etc) for FTP, etc. */ ++ while (master_ct(master_conntrack) != NULL) ++ master_conntrack = master_ct(master_conntrack); ++ ++ /* if we've classified it or seen too many packets */ ++ if(TOTAL_PACKETS > num_packets || ++ master_conntrack->layer7.app_proto) { ++ ++ pattern_result = match_no_append(conntrack, master_conntrack, ctinfo, master_ctinfo, info); ++ ++ /* skb->cb[0] == seen. Avoid doing things twice if there are two l7 ++ rules. I'm not sure that using cb for this purpose is correct, although ++ it says "put your private variables there". But it doesn't look like it ++ is being used for anything else in the skbs that make it here. How can ++ I write to cb without making the compiler angry? */ ++ skb->cb[0] = 1; /* marking it seen here is probably irrelevant, but consistant */ ++ ++ return (pattern_result ^ info->invert); ++ } ++ ++ if(skb_is_nonlinear(skb)){ ++ if(skb_linearize(skb) != 0){ ++ if (net_ratelimit()) ++ printk(KERN_ERR "layer7: failed to linearize packet, bailing.\n"); ++ return info->invert; ++ } ++ } ++ ++ /* now that the skb is linearized, it's safe to set these. */ ++ app_data = skb->data + app_data_offset(skb); ++ appdatalen = skb->tail - app_data; ++ ++ spin_lock_bh(&list_lock); ++ /* the return value gets checked later, when we're ready to use it */ ++ comppattern = compile_and_cache(info->pattern, info->protocol); ++ spin_unlock_bh(&list_lock); ++ ++ /* On the first packet of a connection, allocate space for app data */ ++ write_lock(&ct_lock); ++ if(TOTAL_PACKETS == 1 && !skb->cb[0] && !master_conntrack->layer7.app_data) { ++ master_conntrack->layer7.app_data = kmalloc(maxdatalen, GFP_ATOMIC); ++ if(!master_conntrack->layer7.app_data){ ++ if (net_ratelimit()) ++ printk(KERN_ERR "layer7: out of memory in match, bailing.\n"); ++ write_unlock(&ct_lock); ++ return info->invert; ++ } ++ ++ master_conntrack->layer7.app_data[0] = '\0'; ++ } ++ write_unlock(&ct_lock); ++ ++ /* Can be here, but unallocated, if numpackets is increased near ++ the beginning of a connection */ ++ if(master_conntrack->layer7.app_data == NULL) ++ return (info->invert); /* unmatched */ ++ ++ if(!skb->cb[0]){ ++ int newbytes; ++ write_lock(&ct_lock); ++ newbytes = add_data(master_conntrack, app_data, appdatalen); ++ write_unlock(&ct_lock); ++ ++ if(newbytes == 0) { /* didn't add any data */ ++ skb->cb[0] = 1; ++ /* Didn't match before, not going to match now */ ++ return info->invert; ++ } ++ } ++ ++ /* If looking for "unknown", then never match. "Unknown" means that ++ we've given up; we're still trying with these packets. */ ++ read_lock(&ct_lock); ++ if(!strcmp(info->protocol, "unknown")) { ++ pattern_result = 0; ++ /* If the regexp failed to compile, don't bother running it */ ++ } else if(comppattern && regexec(comppattern, master_conntrack->layer7.app_data)) { ++ DPRINTK("layer7: matched %s\n", info->protocol); ++ pattern_result = 1; ++ } else pattern_result = 0; ++ read_unlock(&ct_lock); ++ ++ if(pattern_result) { ++ write_lock(&ct_lock); ++ master_conntrack->layer7.app_proto = kmalloc(strlen(info->protocol)+1, GFP_ATOMIC); ++ if(!master_conntrack->layer7.app_proto){ ++ if (net_ratelimit()) ++ printk(KERN_ERR "layer7: out of memory in match, bailing.\n"); ++ write_unlock(&ct_lock); ++ return (pattern_result ^ info->invert); ++ } ++ strcpy(master_conntrack->layer7.app_proto, info->protocol); ++ write_unlock(&ct_lock); ++ } ++ ++ /* mark the packet seen */ ++ skb->cb[0] = 1; ++ ++ return (pattern_result ^ info->invert); ++} ++ ++static int checkentry(const char *tablename, const void *ip, ++ const struct xt_match *match, void *matchinfo, unsigned int matchsize, ++ unsigned int hook_mask) ++{ ++// struct ipt_layer7_info * info = (struct ipt_layer7_info *)matchinfo; ++ ++ if (matchsize != IPT_ALIGN(sizeof(struct ipt_layer7_info))) ++ return 0; ++ ++ return 1; ++} ++ ++static struct ipt_match layer7_match = { ++ .name = "layer7", ++ .match = &match, ++ .checkentry = &checkentry, ++ .matchsize = sizeof(struct ipt_layer7_info), ++ .me = THIS_MODULE ++}; ++ ++/* taken from drivers/video/modedb.c */ ++static int my_atoi(const char *s) ++{ ++ int val = 0; ++ ++ for (;; s++) { ++ switch (*s) { ++ case '0'...'9': ++ val = 10*val+(*s-'0'); ++ break; ++ default: ++ return val; ++ } ++ } ++} ++ ++/* write out num_packets to userland. */ ++static int layer7_read_proc(char* page, char ** start, off_t off, int count, ++ int* eof, void * data) ++{ ++ if(num_packets > 99 && net_ratelimit()) ++ printk(KERN_ERR "layer7: NOT REACHED. num_packets too big\n"); ++ ++ page[0] = num_packets/10 + '0'; ++ page[1] = num_packets%10 + '0'; ++ page[2] = '\n'; ++ page[3] = '\0'; ++ ++ *eof=1; ++ ++ return 3; ++} ++ ++/* Read in num_packets from userland */ ++static int layer7_write_proc(struct file* file, const char* buffer, ++ unsigned long count, void *data) ++{ ++ char * foo = kmalloc(count, GFP_ATOMIC); ++ ++ if(!foo){ ++ if (net_ratelimit()) ++ printk(KERN_ERR "layer7: out of memory, bailing. num_packets unchanged.\n"); ++ return count; ++ } ++ ++ if(copy_from_user(foo, buffer, count)) { ++ return -EFAULT; ++ } ++ ++ ++ num_packets = my_atoi(foo); ++ kfree (foo); ++ ++ /* This has an arbitrary limit to make the math easier. I'm lazy. ++ But anyway, 99 is a LOT! If you want more, you're doing it wrong! */ ++ if(num_packets > 99) { ++ printk(KERN_WARNING "layer7: num_packets can't be > 99.\n"); ++ num_packets = 99; ++ } else if(num_packets < 1) { ++ printk(KERN_WARNING "layer7: num_packets can't be < 1.\n"); ++ num_packets = 1; ++ } ++ ++ return count; ++} ++ ++/* register the proc file */ ++static void layer7_init_proc(void) ++{ ++ struct proc_dir_entry* entry; ++ entry = create_proc_entry("layer7_numpackets", 0644, proc_net); ++ entry->read_proc = layer7_read_proc; ++ entry->write_proc = layer7_write_proc; ++} ++ ++static void layer7_cleanup_proc(void) ++{ ++ remove_proc_entry("layer7_numpackets", proc_net); ++} ++ ++static int __init ipt_layer7_init(void) ++{ ++ layer7_init_proc(); ++ if(maxdatalen < 1) { ++ printk(KERN_WARNING "layer7: maxdatalen can't be < 1, using 1\n"); ++ maxdatalen = 1; ++ } ++ /* This is not a hard limit. It's just here to prevent people from ++ bringing their slow machines to a grinding halt. */ ++ else if(maxdatalen > 65536) { ++ printk(KERN_WARNING "layer7: maxdatalen can't be > 65536, using 65536\n"); ++ maxdatalen = 65536; ++ } ++ return ipt_register_match(&layer7_match); ++} ++ ++static void __exit ipt_layer7_fini(void) ++{ ++ layer7_cleanup_proc(); ++ ipt_unregister_match(&layer7_match); ++} ++ ++module_init(ipt_layer7_init); ++module_exit(ipt_layer7_fini); +--- linux-2.6.18/net/ipv4/netfilter/regexp/regexp.c 1969-12-31 18:00:00.000000000 -0600 ++++ linux-2.6.18-layer7/net/ipv4/netfilter/regexp/regexp.c 2006-09-24 10:17:45.000000000 -0500 +@@ -0,0 +1,1197 @@ ++/* ++ * regcomp and regexec -- regsub and regerror are elsewhere ++ * @(#)regexp.c 1.3 of 18 April 87 ++ * ++ * Copyright (c) 1986 by University of Toronto. ++ * Written by Henry Spencer. Not derived from licensed software. ++ * ++ * Permission is granted to anyone to use this software for any ++ * purpose on any computer system, and to redistribute it freely, ++ * subject to the following restrictions: ++ * ++ * 1. The author is not responsible for the consequences of use of ++ * this software, no matter how awful, even if they arise ++ * from defects in it. ++ * ++ * 2. The origin of this software must not be misrepresented, either ++ * by explicit claim or by omission. ++ * ++ * 3. Altered versions must be plainly marked as such, and must not ++ * be misrepresented as being the original software. ++ * ++ * Beware that some of this code is subtly aware of the way operator ++ * precedence is structured in regular expressions. Serious changes in ++ * regular-expression syntax might require a total rethink. ++ * ++ * This code was modified by Ethan Sommer to work within the kernel ++ * (it now uses kmalloc etc..) ++ * ++ * Modified slightly by Matthew Strait to use more modern C. ++ */ ++ ++#include "regexp.h" ++#include "regmagic.h" ++ ++/* added by ethan and matt. Lets it work in both kernel and user space. ++(So iptables can use it, for instance.) Yea, it goes both ways... */ ++#if __KERNEL__ ++ #define malloc(foo) kmalloc(foo,GFP_ATOMIC) ++#else ++ #define printk(format,args...) printf(format,##args) ++#endif ++ ++void regerror(char * s) ++{ ++ printk("<3>Regexp: %s\n", s); ++ /* NOTREACHED */ ++} ++ ++/* ++ * The "internal use only" fields in regexp.h are present to pass info from ++ * compile to execute that permits the execute phase to run lots faster on ++ * simple cases. They are: ++ * ++ * regstart char that must begin a match; '\0' if none obvious ++ * reganch is the match anchored (at beginning-of-line only)? ++ * regmust string (pointer into program) that match must include, or NULL ++ * regmlen length of regmust string ++ * ++ * Regstart and reganch permit very fast decisions on suitable starting points ++ * for a match, cutting down the work a lot. Regmust permits fast rejection ++ * of lines that cannot possibly match. The regmust tests are costly enough ++ * that regcomp() supplies a regmust only if the r.e. contains something ++ * potentially expensive (at present, the only such thing detected is * or + ++ * at the start of the r.e., which can involve a lot of backup). Regmlen is ++ * supplied because the test in regexec() needs it and regcomp() is computing ++ * it anyway. ++ */ ++ ++/* ++ * Structure for regexp "program". This is essentially a linear encoding ++ * of a nondeterministic finite-state machine (aka syntax charts or ++ * "railroad normal form" in parsing technology). Each node is an opcode ++ * plus a "next" pointer, possibly plus an operand. "Next" pointers of ++ * all nodes except BRANCH implement concatenation; a "next" pointer with ++ * a BRANCH on both ends of it is connecting two alternatives. (Here we ++ * have one of the subtle syntax dependencies: an individual BRANCH (as ++ * opposed to a collection of them) is never concatenated with anything ++ * because of operator precedence.) The operand of some types of node is ++ * a literal string; for others, it is a node leading into a sub-FSM. In ++ * particular, the operand of a BRANCH node is the first node of the branch. ++ * (NB this is *not* a tree structure: the tail of the branch connects ++ * to the thing following the set of BRANCHes.) The opcodes are: ++ */ ++ ++/* definition number opnd? meaning */ ++#define END 0 /* no End of program. */ ++#define BOL 1 /* no Match "" at beginning of line. */ ++#define EOL 2 /* no Match "" at end of line. */ ++#define ANY 3 /* no Match any one character. */ ++#define ANYOF 4 /* str Match any character in this string. */ ++#define ANYBUT 5 /* str Match any character not in this string. */ ++#define BRANCH 6 /* node Match this alternative, or the next... */ ++#define BACK 7 /* no Match "", "next" ptr points backward. */ ++#define EXACTLY 8 /* str Match this string. */ ++#define NOTHING 9 /* no Match empty string. */ ++#define STAR 10 /* node Match this (simple) thing 0 or more times. */ ++#define PLUS 11 /* node Match this (simple) thing 1 or more times. */ ++#define OPEN 20 /* no Mark this point in input as start of #n. */ ++ /* OPEN+1 is number 1, etc. */ ++#define CLOSE 30 /* no Analogous to OPEN. */ ++ ++/* ++ * Opcode notes: ++ * ++ * BRANCH The set of branches constituting a single choice are hooked ++ * together with their "next" pointers, since precedence prevents ++ * anything being concatenated to any individual branch. The ++ * "next" pointer of the last BRANCH in a choice points to the ++ * thing following the whole choice. This is also where the ++ * final "next" pointer of each individual branch points; each ++ * branch starts with the operand node of a BRANCH node. ++ * ++ * BACK Normal "next" pointers all implicitly point forward; BACK ++ * exists to make loop structures possible. ++ * ++ * STAR,PLUS '?', and complex '*' and '+', are implemented as circular ++ * BRANCH structures using BACK. Simple cases (one character ++ * per match) are implemented with STAR and PLUS for speed ++ * and to minimize recursive plunges. ++ * ++ * OPEN,CLOSE ...are numbered at compile time. ++ */ ++ ++/* ++ * A node is one char of opcode followed by two chars of "next" pointer. ++ * "Next" pointers are stored as two 8-bit pieces, high order first. The ++ * value is a positive offset from the opcode of the node containing it. ++ * An operand, if any, simply follows the node. (Note that much of the ++ * code generation knows about this implicit relationship.) ++ * ++ * Using two bytes for the "next" pointer is vast overkill for most things, ++ * but allows patterns to get big without disasters. ++ */ ++#define OP(p) (*(p)) ++#define NEXT(p) (((*((p)+1)&0377)<<8) + (*((p)+2)&0377)) ++#define OPERAND(p) ((p) + 3) ++ ++/* ++ * See regmagic.h for one further detail of program structure. ++ */ ++ ++ ++/* ++ * Utility definitions. ++ */ ++#ifndef CHARBITS ++#define UCHARAT(p) ((int)*(unsigned char *)(p)) ++#else ++#define UCHARAT(p) ((int)*(p)&CHARBITS) ++#endif ++ ++#define FAIL(m) { regerror(m); return(NULL); } ++#define ISMULT(c) ((c) == '*' || (c) == '+' || (c) == '?') ++#define META "^$.[()|?+*\\" ++ ++/* ++ * Flags to be passed up and down. ++ */ ++#define HASWIDTH 01 /* Known never to match null string. */ ++#define SIMPLE 02 /* Simple enough to be STAR/PLUS operand. */ ++#define SPSTART 04 /* Starts with * or +. */ ++#define WORST 0 /* Worst case. */ ++ ++/* ++ * Global work variables for regcomp(). ++ */ ++struct match_globals { ++char *reginput; /* String-input pointer. */ ++char *regbol; /* Beginning of input, for ^ check. */ ++char **regstartp; /* Pointer to startp array. */ ++char **regendp; /* Ditto for endp. */ ++char *regparse; /* Input-scan pointer. */ ++int regnpar; /* () count. */ ++char regdummy; ++char *regcode; /* Code-emit pointer; ®dummy = don't. */ ++long regsize; /* Code size. */ ++}; ++ ++/* ++ * Forward declarations for regcomp()'s friends. ++ */ ++#ifndef STATIC ++#define STATIC static ++#endif ++STATIC char *reg(struct match_globals *g, int paren,int *flagp); ++STATIC char *regbranch(struct match_globals *g, int *flagp); ++STATIC char *regpiece(struct match_globals *g, int *flagp); ++STATIC char *regatom(struct match_globals *g, int *flagp); ++STATIC char *regnode(struct match_globals *g, char op); ++STATIC char *regnext(struct match_globals *g, char *p); ++STATIC void regc(struct match_globals *g, char b); ++STATIC void reginsert(struct match_globals *g, char op, char *opnd); ++STATIC void regtail(struct match_globals *g, char *p, char *val); ++STATIC void regoptail(struct match_globals *g, char *p, char *val); ++ ++ ++__kernel_size_t my_strcspn(const char *s1,const char *s2) ++{ ++ char *scan1; ++ char *scan2; ++ int count; ++ ++ count = 0; ++ for (scan1 = (char *)s1; *scan1 != '\0'; scan1++) { ++ for (scan2 = (char *)s2; *scan2 != '\0';) /* ++ moved down. */ ++ if (*scan1 == *scan2++) ++ return(count); ++ count++; ++ } ++ return(count); ++} ++ ++/* ++ - regcomp - compile a regular expression into internal code ++ * ++ * We can't allocate space until we know how big the compiled form will be, ++ * but we can't compile it (and thus know how big it is) until we've got a ++ * place to put the code. So we cheat: we compile it twice, once with code ++ * generation turned off and size counting turned on, and once "for real". ++ * This also means that we don't allocate space until we are sure that the ++ * thing really will compile successfully, and we never have to move the ++ * code and thus invalidate pointers into it. (Note that it has to be in ++ * one piece because free() must be able to free it all.) ++ * ++ * Beware that the optimization-preparation code in here knows about some ++ * of the structure of the compiled regexp. ++ */ ++regexp * ++regcomp(char *exp,int *patternsize) ++{ ++ register regexp *r; ++ register char *scan; ++ register char *longest; ++ register int len; ++ int flags; ++ struct match_globals g; ++ ++ /* commented out by ethan ++ extern char *malloc(); ++ */ ++ ++ if (exp == NULL) ++ FAIL("NULL argument"); ++ ++ /* First pass: determine size, legality. */ ++ g.regparse = exp; ++ g.regnpar = 1; ++ g.regsize = 0L; ++ g.regcode = &g.regdummy; ++ regc(&g, MAGIC); ++ if (reg(&g, 0, &flags) == NULL) ++ return(NULL); ++ ++ /* Small enough for pointer-storage convention? */ ++ if (g.regsize >= 32767L) /* Probably could be 65535L. */ ++ FAIL("regexp too big"); ++ ++ /* Allocate space. */ ++ *patternsize=sizeof(regexp) + (unsigned)g.regsize; ++ r = (regexp *)malloc(sizeof(regexp) + (unsigned)g.regsize); ++ if (r == NULL) ++ FAIL("out of space"); ++ ++ /* Second pass: emit code. */ ++ g.regparse = exp; ++ g.regnpar = 1; ++ g.regcode = r->program; ++ regc(&g, MAGIC); ++ if (reg(&g, 0, &flags) == NULL) ++ return(NULL); ++ ++ /* Dig out information for optimizations. */ ++ r->regstart = '\0'; /* Worst-case defaults. */ ++ r->reganch = 0; ++ r->regmust = NULL; ++ r->regmlen = 0; ++ scan = r->program+1; /* First BRANCH. */ ++ if (OP(regnext(&g, scan)) == END) { /* Only one top-level choice. */ ++ scan = OPERAND(scan); ++ ++ /* Starting-point info. */ ++ if (OP(scan) == EXACTLY) ++ r->regstart = *OPERAND(scan); ++ else if (OP(scan) == BOL) ++ r->reganch++; ++ ++ /* ++ * If there's something expensive in the r.e., find the ++ * longest literal string that must appear and make it the ++ * regmust. Resolve ties in favor of later strings, since ++ * the regstart check works with the beginning of the r.e. ++ * and avoiding duplication strengthens checking. Not a ++ * strong reason, but sufficient in the absence of others. ++ */ ++ if (flags&SPSTART) { ++ longest = NULL; ++ len = 0; ++ for (; scan != NULL; scan = regnext(&g, scan)) ++ if (OP(scan) == EXACTLY && strlen(OPERAND(scan)) >= len) { ++ longest = OPERAND(scan); ++ len = strlen(OPERAND(scan)); ++ } ++ r->regmust = longest; ++ r->regmlen = len; ++ } ++ } ++ ++ return(r); ++} ++ ++/* ++ - reg - regular expression, i.e. main body or parenthesized thing ++ * ++ * Caller must absorb opening parenthesis. ++ * ++ * Combining parenthesis handling with the base level of regular expression ++ * is a trifle forced, but the need to tie the tails of the branches to what ++ * follows makes it hard to avoid. ++ */ ++static char * ++reg(struct match_globals *g, int paren, int *flagp /* Parenthesized? */ ) ++{ ++ register char *ret; ++ register char *br; ++ register char *ender; ++ register int parno = 0; /* 0 makes gcc happy */ ++ int flags; ++ ++ *flagp = HASWIDTH; /* Tentatively. */ ++ ++ /* Make an OPEN node, if parenthesized. */ ++ if (paren) { ++ if (g->regnpar >= NSUBEXP) ++ FAIL("too many ()"); ++ parno = g->regnpar; ++ g->regnpar++; ++ ret = regnode(g, OPEN+parno); ++ } else ++ ret = NULL; ++ ++ /* Pick up the branches, linking them together. */ ++ br = regbranch(g, &flags); ++ if (br == NULL) ++ return(NULL); ++ if (ret != NULL) ++ regtail(g, ret, br); /* OPEN -> first. */ ++ else ++ ret = br; ++ if (!(flags&HASWIDTH)) ++ *flagp &= ~HASWIDTH; ++ *flagp |= flags&SPSTART; ++ while (*g->regparse == '|') { ++ g->regparse++; ++ br = regbranch(g, &flags); ++ if (br == NULL) ++ return(NULL); ++ regtail(g, ret, br); /* BRANCH -> BRANCH. */ ++ if (!(flags&HASWIDTH)) ++ *flagp &= ~HASWIDTH; ++ *flagp |= flags&SPSTART; ++ } ++ ++ /* Make a closing node, and hook it on the end. */ ++ ender = regnode(g, (paren) ? CLOSE+parno : END); ++ regtail(g, ret, ender); ++ ++ /* Hook the tails of the branches to the closing node. */ ++ for (br = ret; br != NULL; br = regnext(g, br)) ++ regoptail(g, br, ender); ++ ++ /* Check for proper termination. */ ++ if (paren && *g->regparse++ != ')') { ++ FAIL("unmatched ()"); ++ } else if (!paren && *g->regparse != '\0') { ++ if (*g->regparse == ')') { ++ FAIL("unmatched ()"); ++ } else ++ FAIL("junk on end"); /* "Can't happen". */ ++ /* NOTREACHED */ ++ } ++ ++ return(ret); ++} ++ ++/* ++ - regbranch - one alternative of an | operator ++ * ++ * Implements the concatenation operator. ++ */ ++static char * ++regbranch(struct match_globals *g, int *flagp) ++{ ++ register char *ret; ++ register char *chain; ++ register char *latest; ++ int flags; ++ ++ *flagp = WORST; /* Tentatively. */ ++ ++ ret = regnode(g, BRANCH); ++ chain = NULL; ++ while (*g->regparse != '\0' && *g->regparse != '|' && *g->regparse != ')') { ++ latest = regpiece(g, &flags); ++ if (latest == NULL) ++ return(NULL); ++ *flagp |= flags&HASWIDTH; ++ if (chain == NULL) /* First piece. */ ++ *flagp |= flags&SPSTART; ++ else ++ regtail(g, chain, latest); ++ chain = latest; ++ } ++ if (chain == NULL) /* Loop ran zero times. */ ++ (void) regnode(g, NOTHING); ++ ++ return(ret); ++} ++ ++/* ++ - regpiece - something followed by possible [*+?] ++ * ++ * Note that the branching code sequences used for ? and the general cases ++ * of * and + are somewhat optimized: they use the same NOTHING node as ++ * both the endmarker for their branch list and the body of the last branch. ++ * It might seem that this node could be dispensed with entirely, but the ++ * endmarker role is not redundant. ++ */ ++static char * ++regpiece(struct match_globals *g, int *flagp) ++{ ++ register char *ret; ++ register char op; ++ register char *next; ++ int flags; ++ ++ ret = regatom(g, &flags); ++ if (ret == NULL) ++ return(NULL); ++ ++ op = *g->regparse; ++ if (!ISMULT(op)) { ++ *flagp = flags; ++ return(ret); ++ } ++ ++ if (!(flags&HASWIDTH) && op != '?') ++ FAIL("*+ operand could be empty"); ++ *flagp = (op != '+') ? (WORST|SPSTART) : (WORST|HASWIDTH); ++ ++ if (op == '*' && (flags&SIMPLE)) ++ reginsert(g, STAR, ret); ++ else if (op == '*') { ++ /* Emit x* as (x&|), where & means "self". */ ++ reginsert(g, BRANCH, ret); /* Either x */ ++ regoptail(g, ret, regnode(g, BACK)); /* and loop */ ++ regoptail(g, ret, ret); /* back */ ++ regtail(g, ret, regnode(g, BRANCH)); /* or */ ++ regtail(g, ret, regnode(g, NOTHING)); /* null. */ ++ } else if (op == '+' && (flags&SIMPLE)) ++ reginsert(g, PLUS, ret); ++ else if (op == '+') { ++ /* Emit x+ as x(&|), where & means "self". */ ++ next = regnode(g, BRANCH); /* Either */ ++ regtail(g, ret, next); ++ regtail(g, regnode(g, BACK), ret); /* loop back */ ++ regtail(g, next, regnode(g, BRANCH)); /* or */ ++ regtail(g, ret, regnode(g, NOTHING)); /* null. */ ++ } else if (op == '?') { ++ /* Emit x? as (x|) */ ++ reginsert(g, BRANCH, ret); /* Either x */ ++ regtail(g, ret, regnode(g, BRANCH)); /* or */ ++ next = regnode(g, NOTHING); /* null. */ ++ regtail(g, ret, next); ++ regoptail(g, ret, next); ++ } ++ g->regparse++; ++ if (ISMULT(*g->regparse)) ++ FAIL("nested *?+"); ++ ++ return(ret); ++} ++ ++/* ++ - regatom - the lowest level ++ * ++ * Optimization: gobbles an entire sequence of ordinary characters so that ++ * it can turn them into a single node, which is smaller to store and ++ * faster to run. Backslashed characters are exceptions, each becoming a ++ * separate node; the code is simpler that way and it's not worth fixing. ++ */ ++static char * ++regatom(struct match_globals *g, int *flagp) ++{ ++ register char *ret; ++ int flags; ++ ++ *flagp = WORST; /* Tentatively. */ ++ ++ switch (*g->regparse++) { ++ case '^': ++ ret = regnode(g, BOL); ++ break; ++ case '$': ++ ret = regnode(g, EOL); ++ break; ++ case '.': ++ ret = regnode(g, ANY); ++ *flagp |= HASWIDTH|SIMPLE; ++ break; ++ case '[': { ++ register int class; ++ register int classend; ++ ++ if (*g->regparse == '^') { /* Complement of range. */ ++ ret = regnode(g, ANYBUT); ++ g->regparse++; ++ } else ++ ret = regnode(g, ANYOF); ++ if (*g->regparse == ']' || *g->regparse == '-') ++ regc(g, *g->regparse++); ++ while (*g->regparse != '\0' && *g->regparse != ']') { ++ if (*g->regparse == '-') { ++ g->regparse++; ++ if (*g->regparse == ']' || *g->regparse == '\0') ++ regc(g, '-'); ++ else { ++ class = UCHARAT(g->regparse-2)+1; ++ classend = UCHARAT(g->regparse); ++ if (class > classend+1) ++ FAIL("invalid [] range"); ++ for (; class <= classend; class++) ++ regc(g, class); ++ g->regparse++; ++ } ++ } else ++ regc(g, *g->regparse++); ++ } ++ regc(g, '\0'); ++ if (*g->regparse != ']') ++ FAIL("unmatched []"); ++ g->regparse++; ++ *flagp |= HASWIDTH|SIMPLE; ++ } ++ break; ++ case '(': ++ ret = reg(g, 1, &flags); ++ if (ret == NULL) ++ return(NULL); ++ *flagp |= flags&(HASWIDTH|SPSTART); ++ break; ++ case '\0': ++ case '|': ++ case ')': ++ FAIL("internal urp"); /* Supposed to be caught earlier. */ ++ break; ++ case '?': ++ case '+': ++ case '*': ++ FAIL("?+* follows nothing"); ++ break; ++ case '\\': ++ if (*g->regparse == '\0') ++ FAIL("trailing \\"); ++ ret = regnode(g, EXACTLY); ++ regc(g, *g->regparse++); ++ regc(g, '\0'); ++ *flagp |= HASWIDTH|SIMPLE; ++ break; ++ default: { ++ register int len; ++ register char ender; ++ ++ g->regparse--; ++ len = my_strcspn((const char *)g->regparse, (const char *)META); ++ if (len <= 0) ++ FAIL("internal disaster"); ++ ender = *(g->regparse+len); ++ if (len > 1 && ISMULT(ender)) ++ len--; /* Back off clear of ?+* operand. */ ++ *flagp |= HASWIDTH; ++ if (len == 1) ++ *flagp |= SIMPLE; ++ ret = regnode(g, EXACTLY); ++ while (len > 0) { ++ regc(g, *g->regparse++); ++ len--; ++ } ++ regc(g, '\0'); ++ } ++ break; ++ } ++ ++ return(ret); ++} ++ ++/* ++ - regnode - emit a node ++ */ ++static char * /* Location. */ ++regnode(struct match_globals *g, char op) ++{ ++ register char *ret; ++ register char *ptr; ++ ++ ret = g->regcode; ++ if (ret == &g->regdummy) { ++ g->regsize += 3; ++ return(ret); ++ } ++ ++ ptr = ret; ++ *ptr++ = op; ++ *ptr++ = '\0'; /* Null "next" pointer. */ ++ *ptr++ = '\0'; ++ g->regcode = ptr; ++ ++ return(ret); ++} ++ ++/* ++ - regc - emit (if appropriate) a byte of code ++ */ ++static void ++regc(struct match_globals *g, char b) ++{ ++ if (g->regcode != &g->regdummy) ++ *g->regcode++ = b; ++ else ++ g->regsize++; ++} ++ ++/* ++ - reginsert - insert an operator in front of already-emitted operand ++ * ++ * Means relocating the operand. ++ */ ++static void ++reginsert(struct match_globals *g, char op, char* opnd) ++{ ++ register char *src; ++ register char *dst; ++ register char *place; ++ ++ if (g->regcode == &g->regdummy) { ++ g->regsize += 3; ++ return; ++ } ++ ++ src = g->regcode; ++ g->regcode += 3; ++ dst = g->regcode; ++ while (src > opnd) ++ *--dst = *--src; ++ ++ place = opnd; /* Op node, where operand used to be. */ ++ *place++ = op; ++ *place++ = '\0'; ++ *place++ = '\0'; ++} ++ ++/* ++ - regtail - set the next-pointer at the end of a node chain ++ */ ++static void ++regtail(struct match_globals *g, char *p, char *val) ++{ ++ register char *scan; ++ register char *temp; ++ register int offset; ++ ++ if (p == &g->regdummy) ++ return; ++ ++ /* Find last node. */ ++ scan = p; ++ for (;;) { ++ temp = regnext(g, scan); ++ if (temp == NULL) ++ break; ++ scan = temp; ++ } ++ ++ if (OP(scan) == BACK) ++ offset = scan - val; ++ else ++ offset = val - scan; ++ *(scan+1) = (offset>>8)&0377; ++ *(scan+2) = offset&0377; ++} ++ ++/* ++ - regoptail - regtail on operand of first argument; nop if operandless ++ */ ++static void ++regoptail(struct match_globals *g, char *p, char *val) ++{ ++ /* "Operandless" and "op != BRANCH" are synonymous in practice. */ ++ if (p == NULL || p == &g->regdummy || OP(p) != BRANCH) ++ return; ++ regtail(g, OPERAND(p), val); ++} ++ ++/* ++ * regexec and friends ++ */ ++ ++ ++/* ++ * Forwards. ++ */ ++STATIC int regtry(struct match_globals *g, regexp *prog, char *string); ++STATIC int regmatch(struct match_globals *g, char *prog); ++STATIC int regrepeat(struct match_globals *g, char *p); ++ ++#ifdef DEBUG ++int regnarrate = 0; ++void regdump(); ++STATIC char *regprop(char *op); ++#endif ++ ++/* ++ - regexec - match a regexp against a string ++ */ ++int ++regexec(regexp *prog, char *string) ++{ ++ register char *s; ++ struct match_globals g; ++ ++ /* Be paranoid... */ ++ if (prog == NULL || string == NULL) { ++ printk("<3>Regexp: NULL parameter\n"); ++ return(0); ++ } ++ ++ /* Check validity of program. */ ++ if (UCHARAT(prog->program) != MAGIC) { ++ printk("<3>Regexp: corrupted program\n"); ++ return(0); ++ } ++ ++ /* If there is a "must appear" string, look for it. */ ++ if (prog->regmust != NULL) { ++ s = string; ++ while ((s = strchr(s, prog->regmust[0])) != NULL) { ++ if (strncmp(s, prog->regmust, prog->regmlen) == 0) ++ break; /* Found it. */ ++ s++; ++ } ++ if (s == NULL) /* Not present. */ ++ return(0); ++ } ++ ++ /* Mark beginning of line for ^ . */ ++ g.regbol = string; ++ ++ /* Simplest case: anchored match need be tried only once. */ ++ if (prog->reganch) ++ return(regtry(&g, prog, string)); ++ ++ /* Messy cases: unanchored match. */ ++ s = string; ++ if (prog->regstart != '\0') ++ /* We know what char it must start with. */ ++ while ((s = strchr(s, prog->regstart)) != NULL) { ++ if (regtry(&g, prog, s)) ++ return(1); ++ s++; ++ } ++ else ++ /* We don't -- general case. */ ++ do { ++ if (regtry(&g, prog, s)) ++ return(1); ++ } while (*s++ != '\0'); ++ ++ /* Failure. */ ++ return(0); ++} ++ ++/* ++ - regtry - try match at specific point ++ */ ++static int /* 0 failure, 1 success */ ++regtry(struct match_globals *g, regexp *prog, char *string) ++{ ++ register int i; ++ register char **sp; ++ register char **ep; ++ ++ g->reginput = string; ++ g->regstartp = prog->startp; ++ g->regendp = prog->endp; ++ ++ sp = prog->startp; ++ ep = prog->endp; ++ for (i = NSUBEXP; i > 0; i--) { ++ *sp++ = NULL; ++ *ep++ = NULL; ++ } ++ if (regmatch(g, prog->program + 1)) { ++ prog->startp[0] = string; ++ prog->endp[0] = g->reginput; ++ return(1); ++ } else ++ return(0); ++} ++ ++/* ++ - regmatch - main matching routine ++ * ++ * Conceptually the strategy is simple: check to see whether the current ++ * node matches, call self recursively to see whether the rest matches, ++ * and then act accordingly. In practice we make some effort to avoid ++ * recursion, in particular by going through "ordinary" nodes (that don't ++ * need to know whether the rest of the match failed) by a loop instead of ++ * by recursion. ++ */ ++static int /* 0 failure, 1 success */ ++regmatch(struct match_globals *g, char *prog) ++{ ++ register char *scan = prog; /* Current node. */ ++ char *next; /* Next node. */ ++ ++#ifdef DEBUG ++ if (scan != NULL && regnarrate) ++ fprintf(stderr, "%s(\n", regprop(scan)); ++#endif ++ while (scan != NULL) { ++#ifdef DEBUG ++ if (regnarrate) ++ fprintf(stderr, "%s...\n", regprop(scan)); ++#endif ++ next = regnext(g, scan); ++ ++ switch (OP(scan)) { ++ case BOL: ++ if (g->reginput != g->regbol) ++ return(0); ++ break; ++ case EOL: ++ if (*g->reginput != '\0') ++ return(0); ++ break; ++ case ANY: ++ if (*g->reginput == '\0') ++ return(0); ++ g->reginput++; ++ break; ++ case EXACTLY: { ++ register int len; ++ register char *opnd; ++ ++ opnd = OPERAND(scan); ++ /* Inline the first character, for speed. */ ++ if (*opnd != *g->reginput) ++ return(0); ++ len = strlen(opnd); ++ if (len > 1 && strncmp(opnd, g->reginput, len) != 0) ++ return(0); ++ g->reginput += len; ++ } ++ break; ++ case ANYOF: ++ if (*g->reginput == '\0' || strchr(OPERAND(scan), *g->reginput) == NULL) ++ return(0); ++ g->reginput++; ++ break; ++ case ANYBUT: ++ if (*g->reginput == '\0' || strchr(OPERAND(scan), *g->reginput) != NULL) ++ return(0); ++ g->reginput++; ++ break; ++ case NOTHING: ++ case BACK: ++ break; ++ case OPEN+1: ++ case OPEN+2: ++ case OPEN+3: ++ case OPEN+4: ++ case OPEN+5: ++ case OPEN+6: ++ case OPEN+7: ++ case OPEN+8: ++ case OPEN+9: { ++ register int no; ++ register char *save; ++ ++ no = OP(scan) - OPEN; ++ save = g->reginput; ++ ++ if (regmatch(g, next)) { ++ /* ++ * Don't set startp if some later ++ * invocation of the same parentheses ++ * already has. ++ */ ++ if (g->regstartp[no] == NULL) ++ g->regstartp[no] = save; ++ return(1); ++ } else ++ return(0); ++ } ++ break; ++ case CLOSE+1: ++ case CLOSE+2: ++ case CLOSE+3: ++ case CLOSE+4: ++ case CLOSE+5: ++ case CLOSE+6: ++ case CLOSE+7: ++ case CLOSE+8: ++ case CLOSE+9: ++ { ++ register int no; ++ register char *save; ++ ++ no = OP(scan) - CLOSE; ++ save = g->reginput; ++ ++ if (regmatch(g, next)) { ++ /* ++ * Don't set endp if some later ++ * invocation of the same parentheses ++ * already has. ++ */ ++ if (g->regendp[no] == NULL) ++ g->regendp[no] = save; ++ return(1); ++ } else ++ return(0); ++ } ++ break; ++ case BRANCH: { ++ register char *save; ++ ++ if (OP(next) != BRANCH) /* No choice. */ ++ next = OPERAND(scan); /* Avoid recursion. */ ++ else { ++ do { ++ save = g->reginput; ++ if (regmatch(g, OPERAND(scan))) ++ return(1); ++ g->reginput = save; ++ scan = regnext(g, scan); ++ } while (scan != NULL && OP(scan) == BRANCH); ++ return(0); ++ /* NOTREACHED */ ++ } ++ } ++ break; ++ case STAR: ++ case PLUS: { ++ register char nextch; ++ register int no; ++ register char *save; ++ register int min; ++ ++ /* ++ * Lookahead to avoid useless match attempts ++ * when we know what character comes next. ++ */ ++ nextch = '\0'; ++ if (OP(next) == EXACTLY) ++ nextch = *OPERAND(next); ++ min = (OP(scan) == STAR) ? 0 : 1; ++ save = g->reginput; ++ no = regrepeat(g, OPERAND(scan)); ++ while (no >= min) { ++ /* If it could work, try it. */ ++ if (nextch == '\0' || *g->reginput == nextch) ++ if (regmatch(g, next)) ++ return(1); ++ /* Couldn't or didn't -- back up. */ ++ no--; ++ g->reginput = save + no; ++ } ++ return(0); ++ } ++ break; ++ case END: ++ return(1); /* Success! */ ++ break; ++ default: ++ printk("<3>Regexp: memory corruption\n"); ++ return(0); ++ break; ++ } ++ ++ scan = next; ++ } ++ ++ /* ++ * We get here only if there's trouble -- normally "case END" is ++ * the terminating point. ++ */ ++ printk("<3>Regexp: corrupted pointers\n"); ++ return(0); ++} ++ ++/* ++ - regrepeat - repeatedly match something simple, report how many ++ */ ++static int ++regrepeat(struct match_globals *g, char *p) ++{ ++ register int count = 0; ++ register char *scan; ++ register char *opnd; ++ ++ scan = g->reginput; ++ opnd = OPERAND(p); ++ switch (OP(p)) { ++ case ANY: ++ count = strlen(scan); ++ scan += count; ++ break; ++ case EXACTLY: ++ while (*opnd == *scan) { ++ count++; ++ scan++; ++ } ++ break; ++ case ANYOF: ++ while (*scan != '\0' && strchr(opnd, *scan) != NULL) { ++ count++; ++ scan++; ++ } ++ break; ++ case ANYBUT: ++ while (*scan != '\0' && strchr(opnd, *scan) == NULL) { ++ count++; ++ scan++; ++ } ++ break; ++ default: /* Oh dear. Called inappropriately. */ ++ printk("<3>Regexp: internal foulup\n"); ++ count = 0; /* Best compromise. */ ++ break; ++ } ++ g->reginput = scan; ++ ++ return(count); ++} ++ ++/* ++ - regnext - dig the "next" pointer out of a node ++ */ ++static char* ++regnext(struct match_globals *g, char *p) ++{ ++ register int offset; ++ ++ if (p == &g->regdummy) ++ return(NULL); ++ ++ offset = NEXT(p); ++ if (offset == 0) ++ return(NULL); ++ ++ if (OP(p) == BACK) ++ return(p-offset); ++ else ++ return(p+offset); ++} ++ ++#ifdef DEBUG ++ ++STATIC char *regprop(); ++ ++/* ++ - regdump - dump a regexp onto stdout in vaguely comprehensible form ++ */ ++void ++regdump(regexp *r) ++{ ++ register char *s; ++ register char op = EXACTLY; /* Arbitrary non-END op. */ ++ register char *next; ++ /* extern char *strchr(); */ ++ ++ ++ s = r->program + 1; ++ while (op != END) { /* While that wasn't END last time... */ ++ op = OP(s); ++ printf("%2d%s", s-r->program, regprop(s)); /* Where, what. */ ++ next = regnext(s); ++ if (next == NULL) /* Next ptr. */ ++ printf("(0)"); ++ else ++ printf("(%d)", (s-r->program)+(next-s)); ++ s += 3; ++ if (op == ANYOF || op == ANYBUT || op == EXACTLY) { ++ /* Literal string, where present. */ ++ while (*s != '\0') { ++ putchar(*s); ++ s++; ++ } ++ s++; ++ } ++ putchar('\n'); ++ } ++ ++ /* Header fields of interest. */ ++ if (r->regstart != '\0') ++ printf("start `%c' ", r->regstart); ++ if (r->reganch) ++ printf("anchored "); ++ if (r->regmust != NULL) ++ printf("must have \"%s\"", r->regmust); ++ printf("\n"); ++} ++ ++/* ++ - regprop - printable representation of opcode ++ */ ++static char * ++regprop(char *op) ++{ ++#define BUFLEN 50 ++ register char *p; ++ static char buf[BUFLEN]; ++ ++ strcpy(buf, ":"); ++ ++ switch (OP(op)) { ++ case BOL: ++ p = "BOL"; ++ break; ++ case EOL: ++ p = "EOL"; ++ break; ++ case ANY: ++ p = "ANY"; ++ break; ++ case ANYOF: ++ p = "ANYOF"; ++ break; ++ case ANYBUT: ++ p = "ANYBUT"; ++ break; ++ case BRANCH: ++ p = "BRANCH"; ++ break; ++ case EXACTLY: ++ p = "EXACTLY"; ++ break; ++ case NOTHING: ++ p = "NOTHING"; ++ break; ++ case BACK: ++ p = "BACK"; ++ break; ++ case END: ++ p = "END"; ++ break; ++ case OPEN+1: ++ case OPEN+2: ++ case OPEN+3: ++ case OPEN+4: ++ case OPEN+5: ++ case OPEN+6: ++ case OPEN+7: ++ case OPEN+8: ++ case OPEN+9: ++ snprintf(buf+strlen(buf),BUFLEN-strlen(buf), "OPEN%d", OP(op)-OPEN); ++ p = NULL; ++ break; ++ case CLOSE+1: ++ case CLOSE+2: ++ case CLOSE+3: ++ case CLOSE+4: ++ case CLOSE+5: ++ case CLOSE+6: ++ case CLOSE+7: ++ case CLOSE+8: ++ case CLOSE+9: ++ snprintf(buf+strlen(buf),BUFLEN-strlen(buf), "CLOSE%d", OP(op)-CLOSE); ++ p = NULL; ++ break; ++ case STAR: ++ p = "STAR"; ++ break; ++ case PLUS: ++ p = "PLUS"; ++ break; ++ default: ++ printk("<3>Regexp: corrupted opcode\n"); ++ break; ++ } ++ if (p != NULL) ++ strncat(buf, p, BUFLEN-strlen(buf)); ++ return(buf); ++} ++#endif ++ ++ +--- linux-2.6.18/net/ipv4/netfilter/regexp/regexp.h 1969-12-31 18:00:00.000000000 -0600 ++++ linux-2.6.18-layer7/net/ipv4/netfilter/regexp/regexp.h 2006-09-24 10:17:45.000000000 -0500 +@@ -0,0 +1,41 @@ ++/* ++ * Definitions etc. for regexp(3) routines. ++ * ++ * Caveat: this is V8 regexp(3) [actually, a reimplementation thereof], ++ * not the System V one. ++ */ ++ ++#ifndef REGEXP_H ++#define REGEXP_H ++ ++ ++/* ++http://www.opensource.apple.com/darwinsource/10.3/expect-1/expect/expect.h , ++which contains a version of this library, says: ++ ++ * ++ * NSUBEXP must be at least 10, and no greater than 117 or the parser ++ * will not work properly. ++ * ++ ++However, it looks rather like this library is limited to 10. If you think ++otherwise, let us know. ++*/ ++ ++#define NSUBEXP 10 ++typedef struct regexp { ++ char *startp[NSUBEXP]; ++ char *endp[NSUBEXP]; ++ char regstart; /* Internal use only. */ ++ char reganch; /* Internal use only. */ ++ char *regmust; /* Internal use only. */ ++ int regmlen; /* Internal use only. */ ++ char program[1]; /* Unwarranted chumminess with compiler. */ ++} regexp; ++ ++regexp * regcomp(char *exp, int *patternsize); ++int regexec(regexp *prog, char *string); ++void regsub(regexp *prog, char *source, char *dest); ++void regerror(char *s); ++ ++#endif +--- linux-2.6.18/net/ipv4/netfilter/regexp/regmagic.h 1969-12-31 18:00:00.000000000 -0600 ++++ linux-2.6.18-layer7/net/ipv4/netfilter/regexp/regmagic.h 2006-09-24 10:17:45.000000000 -0500 +@@ -0,0 +1,5 @@ ++/* ++ * The first byte of the regexp internal "program" is actually this magic ++ * number; the start node begins in the second byte. ++ */ ++#define MAGIC 0234 +--- linux-2.6.18/net/ipv4/netfilter/regexp/regsub.c 1969-12-31 18:00:00.000000000 -0600 ++++ linux-2.6.18-layer7/net/ipv4/netfilter/regexp/regsub.c 2006-09-24 10:17:45.000000000 -0500 +@@ -0,0 +1,95 @@ ++/* ++ * regsub ++ * @(#)regsub.c 1.3 of 2 April 86 ++ * ++ * Copyright (c) 1986 by University of Toronto. ++ * Written by Henry Spencer. Not derived from licensed software. ++ * ++ * Permission is granted to anyone to use this software for any ++ * purpose on any computer system, and to redistribute it freely, ++ * subject to the following restrictions: ++ * ++ * 1. The author is not responsible for the consequences of use of ++ * this software, no matter how awful, even if they arise ++ * from defects in it. ++ * ++ * 2. The origin of this software must not be misrepresented, either ++ * by explicit claim or by omission. ++ * ++ * 3. Altered versions must be plainly marked as such, and must not ++ * be misrepresented as being the original software. ++ * ++ * ++ * This code was modified by Ethan Sommer to work within the kernel ++ * (it now uses kmalloc etc..) ++ * ++ */ ++#include "regexp.h" ++#include "regmagic.h" ++#include <linux/string.h> ++ ++ ++#ifndef CHARBITS ++#define UCHARAT(p) ((int)*(unsigned char *)(p)) ++#else ++#define UCHARAT(p) ((int)*(p)&CHARBITS) ++#endif ++ ++#if 0 ++//void regerror(char * s) ++//{ ++// printk("regexp(3): %s", s); ++// /* NOTREACHED */ ++//} ++#endif ++ ++/* ++ - regsub - perform substitutions after a regexp match ++ */ ++void ++regsub(regexp * prog, char * source, char * dest) ++{ ++ register char *src; ++ register char *dst; ++ register char c; ++ register int no; ++ register int len; ++ ++ /* Not necessary and gcc doesn't like it -MLS */ ++ /*extern char *strncpy();*/ ++ ++ if (prog == NULL || source == NULL || dest == NULL) { ++ regerror("NULL parm to regsub"); ++ return; ++ } ++ if (UCHARAT(prog->program) != MAGIC) { ++ regerror("damaged regexp fed to regsub"); ++ return; ++ } ++ ++ src = source; ++ dst = dest; ++ while ((c = *src++) != '\0') { ++ if (c == '&') ++ no = 0; ++ else if (c == '\\' && '0' <= *src && *src <= '9') ++ no = *src++ - '0'; ++ else ++ no = -1; ++ ++ if (no < 0) { /* Ordinary character. */ ++ if (c == '\\' && (*src == '\\' || *src == '&')) ++ c = *src++; ++ *dst++ = c; ++ } else if (prog->startp[no] != NULL && prog->endp[no] != NULL) { ++ len = prog->endp[no] - prog->startp[no]; ++ (void) strncpy(dst, prog->startp[no], len); ++ dst += len; ++ if (len != 0 && *(dst-1) == '\0') { /* strncpy hit NUL. */ ++ regerror("damaged match string"); ++ return; ++ } ++ } ++ } ++ *dst++ = '\0'; ++} diff --git a/packages/linux/linux-magicbox-2.6.18.6/magicbox2-ide-cf_2.6.18.patch b/packages/linux/linux-magicbox-2.6.18.6/magicbox2-ide-cf_2.6.18.patch new file mode 100644 index 0000000000..113d5c4f85 --- /dev/null +++ b/packages/linux/linux-magicbox-2.6.18.6/magicbox2-ide-cf_2.6.18.patch @@ -0,0 +1,221 @@ +diff -Nru linux-2.6.18/drivers/ide/Kconfig linux-2.6.18-magicbox2-cf-ide/drivers/ide/Kconfig +--- linux-2.6.18/drivers/ide/Kconfig 2006-09-20 05:42:06.000000000 +0200 ++++ linux-2.6.18-magicbox2-cf-ide/drivers/ide/Kconfig 2006-12-28 19:33:33.000000000 +0100 +@@ -926,6 +926,24 @@ + + If unsure, say N. + ++config BLK_DEV_MAGICBOX_IDE ++ bool "MagicBox 2.0 CF IDE support" ++ depends on 4xx && IDE=y && BLK_DEV_IDE=y ++ help ++ This option provides support for IDE on MagicBox 2.0 boards. ++ ++ If unsure, say N. ++ ++config BLK_DEV_MAGICBOX_PROTOTYPE ++ bool "Compile driver for prototype boards" ++ depends on BLK_DEV_MAGICBOX_IDE ++ help ++ Compile driver for first revision of MagicBox 2.0 boards ++ (wiring changes). ++ ++ If unsure, say N. ++ ++ + choice + prompt "Type of MPC8xx IDE interface" + depends on BLK_DEV_MPC8xx_IDE +diff -Nru linux-2.6.18/drivers/ide/Makefile linux-2.6.18-magicbox2-cf-ide/drivers/ide/Makefile +--- linux-2.6.18/drivers/ide/Makefile 2006-09-20 05:42:06.000000000 +0200 ++++ linux-2.6.18-magicbox2-cf-ide/drivers/ide/Makefile 2006-12-28 19:27:00.000000000 +0100 +@@ -36,6 +36,7 @@ + # built-in only drivers from ppc/ + ide-core-$(CONFIG_BLK_DEV_MPC8xx_IDE) += ppc/mpc8xx.o + ide-core-$(CONFIG_BLK_DEV_IDE_PMAC) += ppc/pmac.o ++ide-core-$(CONFIG_BLK_DEV_MAGICBOX_IDE) += ppc/magicbox_ide.o + + # built-in only drivers from h8300/ + ide-core-$(CONFIG_H8300) += h8300/ide-h8300.o +diff -Nru linux-2.6.18/drivers/ide/ide.c linux-2.6.18-magicbox2-cf-ide/drivers/ide/ide.c +--- linux-2.6.18/drivers/ide/ide.c 2006-09-20 05:42:06.000000000 +0200 ++++ linux-2.6.18-magicbox2-cf-ide/drivers/ide/ide.c 2006-12-28 19:27:00.000000000 +0100 +@@ -1836,6 +1836,13 @@ + #ifdef CONFIG_H8300 + h8300_ide_init(); + #endif ++#ifdef CONFIG_BLK_DEV_MAGICBOX_IDE ++ { ++ extern void ide_magicbox_init(); ++ ide_magicbox_init(); ++ } ++#endif ++ + } + + void ide_register_subdriver(ide_drive_t *drive, ide_driver_t *driver) +diff -Nru linux-2.6.18/drivers/ide/ppc/magicbox_ide.c linux-2.6.18-magicbox2-cf-ide/drivers/ide/ppc/magicbox_ide.c +--- linux-2.6.18/drivers/ide/ppc/magicbox_ide.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-2.6.18-magicbox2-cf-ide/drivers/ide/ppc/magicbox_ide.c 2006-12-30 21:00:18.000000000 +0100 +@@ -0,0 +1,161 @@ ++/* Driver for MagicBox 2.0 onboard CompactFlash adapter. ++ * Written by Wojtek Kaniewski <wojtekka@toxygen.net> ++ * ++ * GNU General Public License. ++ */ ++ ++#include <linux/types.h> ++#include <linux/mm.h> ++#include <linux/interrupt.h> ++#include <linux/blkdev.h> ++#include <linux/hdreg.h> ++#include <linux/ide.h> ++#include <linux/delay.h> ++ ++ ++#define UIC0_PR 0xc4 ++#define UIC0_TR 0xc5 ++#define IRQ 25 ++ ++static int ide_offsets[IDE_NR_PORTS] = {0, 2, 4, 6, 8, 10, 12, 14, -1, -1}; ++ ++static u8 magicbox_ide_inb (unsigned long port) ++{ ++ return (u8) (readw((void __iomem *) port) >> 8) & 255; ++} ++ ++static u16 magicbox_ide_inw (unsigned long port) ++{ ++ return (u16) readw((void __iomem *) port); ++} ++ ++static void magicbox_ide_insw (unsigned long port, void *addr, u32 count) ++{ ++ u16 *ptr; ++ ++ for (ptr = addr; count--; ptr++) ++ *ptr = readw((void __iomem *) port); ++} ++ ++static u32 magicbox_ide_inl (unsigned long port) ++{ ++ return (u32) readl((void __iomem *) port); ++} ++ ++static void magicbox_ide_insl (unsigned long port, void *addr, u32 count) ++{ ++ u32 *ptr; ++ ++ for (ptr = addr; count--; ptr++) ++ *ptr = readl((void __iomem *) port); ++} ++ ++static void magicbox_ide_outb (u8 value, unsigned long port) ++{ ++ writew(value << 8, (void __iomem *) port); ++} ++ ++static void magicbox_ide_outbsync (ide_drive_t *drive, u8 value, unsigned long port) ++{ ++ writew(value << 8, (void __iomem *) port); ++} ++ ++static void magicbox_ide_outw (u16 value, unsigned long port) ++{ ++ writew(value, (void __iomem *) port); ++} ++ ++static void magicbox_ide_outsw (unsigned long port, void *addr, u32 count) ++{ ++ u16 *ptr; ++ ++ for (ptr = addr; count--; ptr++) ++ writew(*ptr, (void __iomem *) port); ++} ++ ++static void magicbox_ide_outl (u32 value, unsigned long port) ++{ ++ writel(value, (void __iomem *) port); ++} ++ ++static void magicbox_ide_outsl (unsigned long port, void *addr, u32 count) ++{ ++ u32 *ptr; ++ ++ for (ptr = addr; count--; ptr++) ++ writel(*ptr, (void __iomem *) port); ++} ++ ++ ++static void __init ide_magicbox_register(unsigned long addr, ++ unsigned long caddr, int irq) ++{ ++ hw_regs_t hw; ++ ide_hwif_t *hwif; ++ ++ memset(&hw, 0, sizeof(hw)); ++ ide_setup_ports(&hw, addr, ide_offsets, caddr + 12, 0, NULL,irq); ++ ++ if (ide_register_hw(&hw, &hwif) != -1) ++ { ++ printk(KERN_NOTICE "magicbox-ide: Registered IDE-CF driver\n"); ++ hwif->mmio = 2; ++ hwif->drives[0].unmask = 1; ++ hwif->OUTB = magicbox_ide_outb; ++ hwif->OUTBSYNC = magicbox_ide_outbsync; ++ hwif->OUTW = magicbox_ide_outw; ++ hwif->OUTL = magicbox_ide_outl; ++ hwif->OUTSW = magicbox_ide_outsw; ++ hwif->OUTSL = magicbox_ide_outsl; ++ hwif->INB = magicbox_ide_inb; ++ hwif->INW = magicbox_ide_inw; ++ hwif->INL = magicbox_ide_inl; ++ hwif->INSW = magicbox_ide_insw; ++ hwif->INSL = magicbox_ide_insl; ++ } ++} ++ ++void __init ide_magicbox_init(void) ++{ ++ volatile u16 *addr; ++ volatile u16 *caddr; ++ ++ /* Turn on PerWE instead of PCIsomething */ ++ mtdcr(DCRN_CPC0_PCI_BASE, mfdcr(DCRN_CPC0_PCI_BASE) | (0x80000000L >> 27)); ++ ++#ifdef CONFIG_BLK_DEV_MAGICBOX_PROTOTYPE ++ /* PerCS2 (CF's CS0): base 0xff100000, 16-bit, rw */ ++ mtdcr(DCRN_EBC_BASE, 2); ++ mtdcr(DCRN_EBC_BASE + 1, 0xff11a000); ++ mtdcr(DCRN_EBC_BASE, 0x12); ++ mtdcr(DCRN_EBC_BASE + 1, 0x080bd800); ++ ++ /* PerCS1 (CF's CS1): base 0xff200000, 16-bit, rw */ ++ mtdcr(DCRN_EBC_BASE, 1); ++ mtdcr(DCRN_EBC_BASE + 1, 0xff21a000); ++ mtdcr(DCRN_EBC_BASE, 0x11); ++ mtdcr(DCRN_EBC_BASE + 1, 0x080bd800); ++#else ++ /* PerCS1 (CF's CS0): base 0xff100000, 16-bit, rw */ ++ mtdcr(DCRN_EBC_BASE, 1); ++ mtdcr(DCRN_EBC_BASE + 1, 0xff11a000); ++ mtdcr(DCRN_EBC_BASE, 0x11); ++ mtdcr(DCRN_EBC_BASE + 1, 0x080bd800); ++ ++ /* PerCS2 (CF's CS1): base 0xff200000, 16-bit, rw */ ++ mtdcr(DCRN_EBC_BASE, 2); ++ mtdcr(DCRN_EBC_BASE + 1, 0xff21a000); ++ mtdcr(DCRN_EBC_BASE, 0x12); ++ mtdcr(DCRN_EBC_BASE + 1, 0x080bd800); ++#endif ++ ++ /* Remap physical address space */ ++ addr = ioremap_nocache(0xff100000, 4096); ++ caddr = ioremap_nocache(0xff200000, 4096); ++ ++ /* Set interrupt to low-to-high-edge-triggered */ ++ mtdcr(UIC0_TR, mfdcr(UIC0_TR) & ~(0x80000000L >> IRQ)); ++ mtdcr(UIC0_PR, mfdcr(UIC0_PR) | (0x80000000L >> IRQ)); ++ ++ ide_magicbox_register((unsigned long)addr, (unsigned long)caddr, IRQ); ++} diff --git a/packages/linux/linux-magicbox-2.6.18.6/squashfs3.1-patch b/packages/linux/linux-magicbox-2.6.18.6/squashfs3.1-patch new file mode 100644 index 0000000000..9f24221335 --- /dev/null +++ b/packages/linux/linux-magicbox-2.6.18.6/squashfs3.1-patch @@ -0,0 +1,4227 @@ +diff --new-file -urp linux-2.6.18/fs/Kconfig linux-2.6.18-squashfs3.1/fs/Kconfig +--- linux-2.6.18/fs/Kconfig 2006-08-11 00:03:11.000000000 +0100 ++++ linux-2.6.18-squashfs3.1/fs/Kconfig 2006-08-21 00:13:12.000000000 +0100 +@@ -1249,6 +1249,71 @@ config CRAMFS + + If unsure, say N. + ++config SQUASHFS ++ tristate "SquashFS 3.1 - Squashed file system support" ++ select ZLIB_INFLATE ++ help ++ Saying Y here includes support for SquashFS 3.1 (a Compressed Read-Only File ++ System). Squashfs is a highly compressed read-only filesystem for Linux. ++ It uses zlib compression to compress both files, inodes and directories. ++ Inodes in the system are very small and all blocks are packed to minimise ++ data overhead. Block sizes greater than 4K are supported up to a maximum of 64K. ++ SquashFS 3.1 supports 64 bit filesystems and files (larger than 4GB), full ++ uid/gid information, hard links and timestamps. ++ ++ Squashfs is intended for general read-only filesystem use, for archival ++ use (i.e. in cases where a .tar.gz file may be used), and in embedded ++ systems where low overhead is needed. Further information and filesystem tools ++ are available from http://squashfs.sourceforge.net. ++ ++ If you want to compile this as a module ( = code which can be ++ inserted in and removed from the running kernel whenever you want), ++ say M here and read <file:Documentation/modules.txt>. The module ++ will be called squashfs. Note that the root file system (the one ++ containing the directory /) cannot be compiled as a module. ++ ++ If unsure, say N. ++ ++config SQUASHFS_EMBEDDED ++ ++ bool "Additional options for memory-constrained systems" ++ depends on SQUASHFS ++ default n ++ help ++ Saying Y here allows you to specify cache sizes and how Squashfs ++ allocates memory. This is only intended for memory constrained ++ systems. ++ ++ If unsure, say N. ++ ++config SQUASHFS_FRAGMENT_CACHE_SIZE ++ int "Number of fragments cached" if SQUASHFS_EMBEDDED ++ depends on SQUASHFS ++ default "3" ++ help ++ By default SquashFS caches the last 3 fragments read from ++ the filesystem. Increasing this amount may mean SquashFS ++ has to re-read fragments less often from disk, at the expense ++ of extra system memory. Decreasing this amount will mean ++ SquashFS uses less memory at the expense of extra reads from disk. ++ ++ Note there must be at least one cached fragment. Anything ++ much more than three will probably not make much difference. ++ ++config SQUASHFS_VMALLOC ++ bool "Use Vmalloc rather than Kmalloc" if SQUASHFS_EMBEDDED ++ depends on SQUASHFS ++ default n ++ help ++ By default SquashFS uses kmalloc to obtain fragment cache memory. ++ Kmalloc memory is the standard kernel allocator, but it can fail ++ on memory constrained systems. Because of the way Vmalloc works, ++ Vmalloc can succeed when kmalloc fails. Specifying this option ++ will make SquashFS always use Vmalloc to allocate the ++ fragment cache memory. ++ ++ If unsure, say N. ++ + config VXFS_FS + tristate "FreeVxFS file system support (VERITAS VxFS(TM) compatible)" + help +diff --new-file -urp linux-2.6.18/fs/Makefile linux-2.6.18-squashfs3.1/fs/Makefile +--- linux-2.6.18/fs/Makefile 2006-08-11 00:03:12.000000000 +0100 ++++ linux-2.6.18-squashfs3.1/fs/Makefile 2006-08-21 00:13:12.000000000 +0100 +@@ -57,6 +57,7 @@ obj-$(CONFIG_EXT3_FS) += ext3/ # Before + obj-$(CONFIG_JBD) += jbd/ + obj-$(CONFIG_EXT2_FS) += ext2/ + obj-$(CONFIG_CRAMFS) += cramfs/ ++obj-$(CONFIG_SQUASHFS) += squashfs/ + obj-$(CONFIG_RAMFS) += ramfs/ + obj-$(CONFIG_HUGETLBFS) += hugetlbfs/ + obj-$(CONFIG_CODA_FS) += coda/ +diff --new-file -urp linux-2.6.18/fs/squashfs/inode.c linux-2.6.18-squashfs3.1/fs/squashfs/inode.c +--- linux-2.6.18/fs/squashfs/inode.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-2.6.18-squashfs3.1/fs/squashfs/inode.c 2006-08-21 00:15:29.000000000 +0100 +@@ -0,0 +1,2156 @@ ++/* ++ * Squashfs - a compressed read only filesystem for Linux ++ * ++ * Copyright (c) 2002, 2003, 2004, 2005, 2006 ++ * Phillip Lougher <phillip@lougher.org.uk> ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License ++ * as published by the Free Software Foundation; either version 2, ++ * or (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. ++ * ++ * inode.c ++ */ ++ ++#include <linux/types.h> ++#include <linux/squashfs_fs.h> ++#include <linux/module.h> ++#include <linux/errno.h> ++#include <linux/slab.h> ++#include <linux/zlib.h> ++#include <linux/fs.h> ++#include <linux/smp_lock.h> ++#include <linux/slab.h> ++#include <linux/squashfs_fs_sb.h> ++#include <linux/squashfs_fs_i.h> ++#include <linux/buffer_head.h> ++#include <linux/vfs.h> ++#include <linux/init.h> ++#include <linux/dcache.h> ++#include <linux/wait.h> ++#include <linux/blkdev.h> ++#include <linux/vmalloc.h> ++#include <asm/uaccess.h> ++#include <asm/semaphore.h> ++ ++#include "squashfs.h" ++ ++static void squashfs_put_super(struct super_block *); ++static int squashfs_statfs(struct dentry *, struct kstatfs *); ++static int squashfs_symlink_readpage(struct file *file, struct page *page); ++static int squashfs_readpage(struct file *file, struct page *page); ++static int squashfs_readpage4K(struct file *file, struct page *page); ++static int squashfs_readdir(struct file *, void *, filldir_t); ++static struct inode *squashfs_alloc_inode(struct super_block *sb); ++static void squashfs_destroy_inode(struct inode *inode); ++static int init_inodecache(void); ++static void destroy_inodecache(void); ++static struct dentry *squashfs_lookup(struct inode *, struct dentry *, ++ struct nameidata *); ++static struct inode *squashfs_iget(struct super_block *s, squashfs_inode_t inode); ++static long long read_blocklist(struct inode *inode, int index, ++ int readahead_blks, char *block_list, ++ unsigned short **block_p, unsigned int *bsize); ++static int squashfs_get_sb(struct file_system_type *, int, const char *, void *, ++ struct vfsmount *); ++ ++static struct file_system_type squashfs_fs_type = { ++ .owner = THIS_MODULE, ++ .name = "squashfs", ++ .get_sb = squashfs_get_sb, ++ .kill_sb = kill_block_super, ++ .fs_flags = FS_REQUIRES_DEV ++}; ++ ++static unsigned char squashfs_filetype_table[] = { ++ DT_UNKNOWN, DT_DIR, DT_REG, DT_LNK, DT_BLK, DT_CHR, DT_FIFO, DT_SOCK ++}; ++ ++static struct super_operations squashfs_ops = { ++ .alloc_inode = squashfs_alloc_inode, ++ .destroy_inode = squashfs_destroy_inode, ++ .statfs = squashfs_statfs, ++ .put_super = squashfs_put_super, ++}; ++ ++SQSH_EXTERN struct address_space_operations squashfs_symlink_aops = { ++ .readpage = squashfs_symlink_readpage ++}; ++ ++SQSH_EXTERN struct address_space_operations squashfs_aops = { ++ .readpage = squashfs_readpage ++}; ++ ++SQSH_EXTERN struct address_space_operations squashfs_aops_4K = { ++ .readpage = squashfs_readpage4K ++}; ++ ++static struct file_operations squashfs_dir_ops = { ++ .read = generic_read_dir, ++ .readdir = squashfs_readdir ++}; ++ ++SQSH_EXTERN struct inode_operations squashfs_dir_inode_ops = { ++ .lookup = squashfs_lookup ++}; ++ ++ ++static struct buffer_head *get_block_length(struct super_block *s, ++ int *cur_index, int *offset, int *c_byte) ++{ ++ struct squashfs_sb_info *msblk = s->s_fs_info; ++ unsigned short temp; ++ struct buffer_head *bh; ++ ++ if (!(bh = sb_bread(s, *cur_index))) ++ goto out; ++ ++ if (msblk->devblksize - *offset == 1) { ++ if (msblk->swap) ++ ((unsigned char *) &temp)[1] = *((unsigned char *) ++ (bh->b_data + *offset)); ++ else ++ ((unsigned char *) &temp)[0] = *((unsigned char *) ++ (bh->b_data + *offset)); ++ brelse(bh); ++ if (!(bh = sb_bread(s, ++(*cur_index)))) ++ goto out; ++ if (msblk->swap) ++ ((unsigned char *) &temp)[0] = *((unsigned char *) ++ bh->b_data); ++ else ++ ((unsigned char *) &temp)[1] = *((unsigned char *) ++ bh->b_data); ++ *c_byte = temp; ++ *offset = 1; ++ } else { ++ if (msblk->swap) { ++ ((unsigned char *) &temp)[1] = *((unsigned char *) ++ (bh->b_data + *offset)); ++ ((unsigned char *) &temp)[0] = *((unsigned char *) ++ (bh->b_data + *offset + 1)); ++ } else { ++ ((unsigned char *) &temp)[0] = *((unsigned char *) ++ (bh->b_data + *offset)); ++ ((unsigned char *) &temp)[1] = *((unsigned char *) ++ (bh->b_data + *offset + 1)); ++ } ++ *c_byte = temp; ++ *offset += 2; ++ } ++ ++ if (SQUASHFS_CHECK_DATA(msblk->sblk.flags)) { ++ if (*offset == msblk->devblksize) { ++ brelse(bh); ++ if (!(bh = sb_bread(s, ++(*cur_index)))) ++ goto out; ++ *offset = 0; ++ } ++ if (*((unsigned char *) (bh->b_data + *offset)) != ++ SQUASHFS_MARKER_BYTE) { ++ ERROR("Metadata block marker corrupt @ %x\n", ++ *cur_index); ++ brelse(bh); ++ goto out; ++ } ++ (*offset)++; ++ } ++ return bh; ++ ++out: ++ return NULL; ++} ++ ++ ++SQSH_EXTERN unsigned int squashfs_read_data(struct super_block *s, char *buffer, ++ long long index, unsigned int length, ++ long long *next_index) ++{ ++ struct squashfs_sb_info *msblk = s->s_fs_info; ++ struct buffer_head *bh[((SQUASHFS_FILE_MAX_SIZE - 1) >> ++ msblk->devblksize_log2) + 2]; ++ unsigned int offset = index & ((1 << msblk->devblksize_log2) - 1); ++ unsigned int cur_index = index >> msblk->devblksize_log2; ++ int bytes, avail_bytes, b = 0, k; ++ char *c_buffer; ++ unsigned int compressed; ++ unsigned int c_byte = length; ++ ++ if (c_byte) { ++ bytes = msblk->devblksize - offset; ++ compressed = SQUASHFS_COMPRESSED_BLOCK(c_byte); ++ c_buffer = compressed ? msblk->read_data : buffer; ++ c_byte = SQUASHFS_COMPRESSED_SIZE_BLOCK(c_byte); ++ ++ TRACE("Block @ 0x%llx, %scompressed size %d\n", index, compressed ++ ? "" : "un", (unsigned int) c_byte); ++ ++ if (!(bh[0] = sb_getblk(s, cur_index))) ++ goto block_release; ++ ++ for (b = 1; bytes < c_byte; b++) { ++ if (!(bh[b] = sb_getblk(s, ++cur_index))) ++ goto block_release; ++ bytes += msblk->devblksize; ++ } ++ ll_rw_block(READ, b, bh); ++ } else { ++ if (!(bh[0] = get_block_length(s, &cur_index, &offset, ++ &c_byte))) ++ goto read_failure; ++ ++ bytes = msblk->devblksize - offset; ++ compressed = SQUASHFS_COMPRESSED(c_byte); ++ c_buffer = compressed ? msblk->read_data : buffer; ++ c_byte = SQUASHFS_COMPRESSED_SIZE(c_byte); ++ ++ TRACE("Block @ 0x%llx, %scompressed size %d\n", index, compressed ++ ? "" : "un", (unsigned int) c_byte); ++ ++ for (b = 1; bytes < c_byte; b++) { ++ if (!(bh[b] = sb_getblk(s, ++cur_index))) ++ goto block_release; ++ bytes += msblk->devblksize; ++ } ++ ll_rw_block(READ, b - 1, bh + 1); ++ } ++ ++ if (compressed) ++ down(&msblk->read_data_mutex); ++ ++ for (bytes = 0, k = 0; k < b; k++) { ++ avail_bytes = (c_byte - bytes) > (msblk->devblksize - offset) ? ++ msblk->devblksize - offset : ++ c_byte - bytes; ++ wait_on_buffer(bh[k]); ++ if (!buffer_uptodate(bh[k])) ++ goto block_release; ++ memcpy(c_buffer + bytes, bh[k]->b_data + offset, avail_bytes); ++ bytes += avail_bytes; ++ offset = 0; ++ brelse(bh[k]); ++ } ++ ++ /* ++ * uncompress block ++ */ ++ if (compressed) { ++ int zlib_err; ++ ++ msblk->stream.next_in = c_buffer; ++ msblk->stream.avail_in = c_byte; ++ msblk->stream.next_out = buffer; ++ msblk->stream.avail_out = msblk->read_size; ++ ++ if (((zlib_err = zlib_inflateInit(&msblk->stream)) != Z_OK) || ++ ((zlib_err = zlib_inflate(&msblk->stream, Z_FINISH)) ++ != Z_STREAM_END) || ((zlib_err = ++ zlib_inflateEnd(&msblk->stream)) != Z_OK)) { ++ ERROR("zlib_fs returned unexpected result 0x%x\n", ++ zlib_err); ++ bytes = 0; ++ } else ++ bytes = msblk->stream.total_out; ++ ++ up(&msblk->read_data_mutex); ++ } ++ ++ if (next_index) ++ *next_index = index + c_byte + (length ? 0 : ++ (SQUASHFS_CHECK_DATA(msblk->sblk.flags) ++ ? 3 : 2)); ++ return bytes; ++ ++block_release: ++ while (--b >= 0) ++ brelse(bh[b]); ++ ++read_failure: ++ ERROR("sb_bread failed reading block 0x%x\n", cur_index); ++ return 0; ++} ++ ++ ++SQSH_EXTERN int squashfs_get_cached_block(struct super_block *s, char *buffer, ++ long long block, unsigned int offset, ++ int length, long long *next_block, ++ unsigned int *next_offset) ++{ ++ struct squashfs_sb_info *msblk = s->s_fs_info; ++ int n, i, bytes, return_length = length; ++ long long next_index; ++ ++ TRACE("Entered squashfs_get_cached_block [%llx:%x]\n", block, offset); ++ ++ while ( 1 ) { ++ for (i = 0; i < SQUASHFS_CACHED_BLKS; i++) ++ if (msblk->block_cache[i].block == block) ++ break; ++ ++ down(&msblk->block_cache_mutex); ++ ++ if (i == SQUASHFS_CACHED_BLKS) { ++ /* read inode header block */ ++ for (i = msblk->next_cache, n = SQUASHFS_CACHED_BLKS; ++ n ; n --, i = (i + 1) % ++ SQUASHFS_CACHED_BLKS) ++ if (msblk->block_cache[i].block != ++ SQUASHFS_USED_BLK) ++ break; ++ ++ if (n == 0) { ++ wait_queue_t wait; ++ ++ init_waitqueue_entry(&wait, current); ++ add_wait_queue(&msblk->waitq, &wait); ++ set_current_state(TASK_UNINTERRUPTIBLE); ++ up(&msblk->block_cache_mutex); ++ schedule(); ++ set_current_state(TASK_RUNNING); ++ remove_wait_queue(&msblk->waitq, &wait); ++ continue; ++ } ++ msblk->next_cache = (i + 1) % SQUASHFS_CACHED_BLKS; ++ ++ if (msblk->block_cache[i].block == ++ SQUASHFS_INVALID_BLK) { ++ if (!(msblk->block_cache[i].data = ++ kmalloc(SQUASHFS_METADATA_SIZE, ++ GFP_KERNEL))) { ++ ERROR("Failed to allocate cache" ++ "block\n"); ++ up(&msblk->block_cache_mutex); ++ goto out; ++ } ++ } ++ ++ msblk->block_cache[i].block = SQUASHFS_USED_BLK; ++ up(&msblk->block_cache_mutex); ++ ++ if (!(msblk->block_cache[i].length = ++ squashfs_read_data(s, ++ msblk->block_cache[i].data, ++ block, 0, &next_index))) { ++ ERROR("Unable to read cache block [%llx:%x]\n", ++ block, offset); ++ goto out; ++ } ++ ++ down(&msblk->block_cache_mutex); ++ wake_up(&msblk->waitq); ++ msblk->block_cache[i].block = block; ++ msblk->block_cache[i].next_index = next_index; ++ TRACE("Read cache block [%llx:%x]\n", block, offset); ++ } ++ ++ if (msblk->block_cache[i].block != block) { ++ up(&msblk->block_cache_mutex); ++ continue; ++ } ++ ++ if ((bytes = msblk->block_cache[i].length - offset) >= length) { ++ if (buffer) ++ memcpy(buffer, msblk->block_cache[i].data + ++ offset, length); ++ if (msblk->block_cache[i].length - offset == length) { ++ *next_block = msblk->block_cache[i].next_index; ++ *next_offset = 0; ++ } else { ++ *next_block = block; ++ *next_offset = offset + length; ++ } ++ up(&msblk->block_cache_mutex); ++ goto finish; ++ } else { ++ if (buffer) { ++ memcpy(buffer, msblk->block_cache[i].data + ++ offset, bytes); ++ buffer += bytes; ++ } ++ block = msblk->block_cache[i].next_index; ++ up(&msblk->block_cache_mutex); ++ length -= bytes; ++ offset = 0; ++ } ++ } ++ ++finish: ++ return return_length; ++out: ++ return 0; ++} ++ ++ ++static int get_fragment_location(struct super_block *s, unsigned int fragment, ++ long long *fragment_start_block, ++ unsigned int *fragment_size) ++{ ++ struct squashfs_sb_info *msblk = s->s_fs_info; ++ long long start_block = ++ msblk->fragment_index[SQUASHFS_FRAGMENT_INDEX(fragment)]; ++ int offset = SQUASHFS_FRAGMENT_INDEX_OFFSET(fragment); ++ struct squashfs_fragment_entry fragment_entry; ++ ++ if (msblk->swap) { ++ struct squashfs_fragment_entry sfragment_entry; ++ ++ if (!squashfs_get_cached_block(s, (char *) &sfragment_entry, ++ start_block, offset, ++ sizeof(sfragment_entry), &start_block, ++ &offset)) ++ goto out; ++ SQUASHFS_SWAP_FRAGMENT_ENTRY(&fragment_entry, &sfragment_entry); ++ } else ++ if (!squashfs_get_cached_block(s, (char *) &fragment_entry, ++ start_block, offset, ++ sizeof(fragment_entry), &start_block, ++ &offset)) ++ goto out; ++ ++ *fragment_start_block = fragment_entry.start_block; ++ *fragment_size = fragment_entry.size; ++ ++ return 1; ++ ++out: ++ return 0; ++} ++ ++ ++SQSH_EXTERN void release_cached_fragment(struct squashfs_sb_info *msblk, struct ++ squashfs_fragment_cache *fragment) ++{ ++ down(&msblk->fragment_mutex); ++ fragment->locked --; ++ wake_up(&msblk->fragment_wait_queue); ++ up(&msblk->fragment_mutex); ++} ++ ++ ++SQSH_EXTERN struct squashfs_fragment_cache *get_cached_fragment(struct super_block ++ *s, long long start_block, ++ int length) ++{ ++ int i, n; ++ struct squashfs_sb_info *msblk = s->s_fs_info; ++ ++ while ( 1 ) { ++ down(&msblk->fragment_mutex); ++ ++ for (i = 0; i < SQUASHFS_CACHED_FRAGMENTS && ++ msblk->fragment[i].block != start_block; i++); ++ ++ if (i == SQUASHFS_CACHED_FRAGMENTS) { ++ for (i = msblk->next_fragment, n = ++ SQUASHFS_CACHED_FRAGMENTS; n && ++ msblk->fragment[i].locked; n--, i = (i + 1) % ++ SQUASHFS_CACHED_FRAGMENTS); ++ ++ if (n == 0) { ++ wait_queue_t wait; ++ ++ init_waitqueue_entry(&wait, current); ++ add_wait_queue(&msblk->fragment_wait_queue, ++ &wait); ++ set_current_state(TASK_UNINTERRUPTIBLE); ++ up(&msblk->fragment_mutex); ++ schedule(); ++ set_current_state(TASK_RUNNING); ++ remove_wait_queue(&msblk->fragment_wait_queue, ++ &wait); ++ continue; ++ } ++ msblk->next_fragment = (msblk->next_fragment + 1) % ++ SQUASHFS_CACHED_FRAGMENTS; ++ ++ if (msblk->fragment[i].data == NULL) ++ if (!(msblk->fragment[i].data = SQUASHFS_ALLOC ++ (SQUASHFS_FILE_MAX_SIZE))) { ++ ERROR("Failed to allocate fragment " ++ "cache block\n"); ++ up(&msblk->fragment_mutex); ++ goto out; ++ } ++ ++ msblk->fragment[i].block = SQUASHFS_INVALID_BLK; ++ msblk->fragment[i].locked = 1; ++ up(&msblk->fragment_mutex); ++ ++ if (!(msblk->fragment[i].length = squashfs_read_data(s, ++ msblk->fragment[i].data, ++ start_block, length, NULL))) { ++ ERROR("Unable to read fragment cache block " ++ "[%llx]\n", start_block); ++ msblk->fragment[i].locked = 0; ++ goto out; ++ } ++ ++ msblk->fragment[i].block = start_block; ++ TRACE("New fragment %d, start block %lld, locked %d\n", ++ i, msblk->fragment[i].block, ++ msblk->fragment[i].locked); ++ break; ++ } ++ ++ msblk->fragment[i].locked++; ++ up(&msblk->fragment_mutex); ++ TRACE("Got fragment %d, start block %lld, locked %d\n", i, ++ msblk->fragment[i].block, ++ msblk->fragment[i].locked); ++ break; ++ } ++ ++ return &msblk->fragment[i]; ++ ++out: ++ return NULL; ++} ++ ++ ++static struct inode *squashfs_new_inode(struct super_block *s, ++ struct squashfs_base_inode_header *inodeb) ++{ ++ struct squashfs_sb_info *msblk = s->s_fs_info; ++ struct inode *i = new_inode(s); ++ ++ if (i) { ++ i->i_ino = inodeb->inode_number; ++ i->i_mtime.tv_sec = inodeb->mtime; ++ i->i_atime.tv_sec = inodeb->mtime; ++ i->i_ctime.tv_sec = inodeb->mtime; ++ i->i_uid = msblk->uid[inodeb->uid]; ++ i->i_mode = inodeb->mode; ++ i->i_size = 0; ++ if (inodeb->guid == SQUASHFS_GUIDS) ++ i->i_gid = i->i_uid; ++ else ++ i->i_gid = msblk->guid[inodeb->guid]; ++ } ++ ++ return i; ++} ++ ++ ++static struct inode *squashfs_iget(struct super_block *s, squashfs_inode_t inode) ++{ ++ struct inode *i; ++ struct squashfs_sb_info *msblk = s->s_fs_info; ++ struct squashfs_super_block *sblk = &msblk->sblk; ++ long long block = SQUASHFS_INODE_BLK(inode) + ++ sblk->inode_table_start; ++ unsigned int offset = SQUASHFS_INODE_OFFSET(inode); ++ long long next_block; ++ unsigned int next_offset; ++ union squashfs_inode_header id, sid; ++ struct squashfs_base_inode_header *inodeb = &id.base, ++ *sinodeb = &sid.base; ++ ++ TRACE("Entered squashfs_iget\n"); ++ ++ if (msblk->swap) { ++ if (!squashfs_get_cached_block(s, (char *) sinodeb, block, ++ offset, sizeof(*sinodeb), &next_block, ++ &next_offset)) ++ goto failed_read; ++ SQUASHFS_SWAP_BASE_INODE_HEADER(inodeb, sinodeb, ++ sizeof(*sinodeb)); ++ } else ++ if (!squashfs_get_cached_block(s, (char *) inodeb, block, ++ offset, sizeof(*inodeb), &next_block, ++ &next_offset)) ++ goto failed_read; ++ ++ switch(inodeb->inode_type) { ++ case SQUASHFS_FILE_TYPE: { ++ unsigned int frag_size; ++ long long frag_blk; ++ struct squashfs_reg_inode_header *inodep = &id.reg; ++ struct squashfs_reg_inode_header *sinodep = &sid.reg; ++ ++ if (msblk->swap) { ++ if (!squashfs_get_cached_block(s, (char *) ++ sinodep, block, offset, ++ sizeof(*sinodep), &next_block, ++ &next_offset)) ++ goto failed_read; ++ SQUASHFS_SWAP_REG_INODE_HEADER(inodep, sinodep); ++ } else ++ if (!squashfs_get_cached_block(s, (char *) ++ inodep, block, offset, ++ sizeof(*inodep), &next_block, ++ &next_offset)) ++ goto failed_read; ++ ++ frag_blk = SQUASHFS_INVALID_BLK; ++ if (inodep->fragment != SQUASHFS_INVALID_FRAG && ++ !get_fragment_location(s, ++ inodep->fragment, &frag_blk, &frag_size)) ++ goto failed_read; ++ ++ if((i = squashfs_new_inode(s, inodeb)) == NULL) ++ goto failed_read1; ++ ++ i->i_nlink = 1; ++ i->i_size = inodep->file_size; ++ i->i_fop = &generic_ro_fops; ++ i->i_mode |= S_IFREG; ++ i->i_blocks = ((i->i_size - 1) >> 9) + 1; ++ i->i_blksize = PAGE_CACHE_SIZE; ++ SQUASHFS_I(i)->u.s1.fragment_start_block = frag_blk; ++ SQUASHFS_I(i)->u.s1.fragment_size = frag_size; ++ SQUASHFS_I(i)->u.s1.fragment_offset = inodep->offset; ++ SQUASHFS_I(i)->start_block = inodep->start_block; ++ SQUASHFS_I(i)->u.s1.block_list_start = next_block; ++ SQUASHFS_I(i)->offset = next_offset; ++ if (sblk->block_size > 4096) ++ i->i_data.a_ops = &squashfs_aops; ++ else ++ i->i_data.a_ops = &squashfs_aops_4K; ++ ++ TRACE("File inode %x:%x, start_block %llx, " ++ "block_list_start %llx, offset %x\n", ++ SQUASHFS_INODE_BLK(inode), offset, ++ inodep->start_block, next_block, ++ next_offset); ++ break; ++ } ++ case SQUASHFS_LREG_TYPE: { ++ unsigned int frag_size; ++ long long frag_blk; ++ struct squashfs_lreg_inode_header *inodep = &id.lreg; ++ struct squashfs_lreg_inode_header *sinodep = &sid.lreg; ++ ++ if (msblk->swap) { ++ if (!squashfs_get_cached_block(s, (char *) ++ sinodep, block, offset, ++ sizeof(*sinodep), &next_block, ++ &next_offset)) ++ goto failed_read; ++ SQUASHFS_SWAP_LREG_INODE_HEADER(inodep, sinodep); ++ } else ++ if (!squashfs_get_cached_block(s, (char *) ++ inodep, block, offset, ++ sizeof(*inodep), &next_block, ++ &next_offset)) ++ goto failed_read; ++ ++ frag_blk = SQUASHFS_INVALID_BLK; ++ if (inodep->fragment != SQUASHFS_INVALID_FRAG && ++ !get_fragment_location(s, ++ inodep->fragment, &frag_blk, &frag_size)) ++ goto failed_read; ++ ++ if((i = squashfs_new_inode(s, inodeb)) == NULL) ++ goto failed_read1; ++ ++ i->i_nlink = inodep->nlink; ++ i->i_size = inodep->file_size; ++ i->i_fop = &generic_ro_fops; ++ i->i_mode |= S_IFREG; ++ i->i_blocks = ((i->i_size - 1) >> 9) + 1; ++ i->i_blksize = PAGE_CACHE_SIZE; ++ SQUASHFS_I(i)->u.s1.fragment_start_block = frag_blk; ++ SQUASHFS_I(i)->u.s1.fragment_size = frag_size; ++ SQUASHFS_I(i)->u.s1.fragment_offset = inodep->offset; ++ SQUASHFS_I(i)->start_block = inodep->start_block; ++ SQUASHFS_I(i)->u.s1.block_list_start = next_block; ++ SQUASHFS_I(i)->offset = next_offset; ++ if (sblk->block_size > 4096) ++ i->i_data.a_ops = &squashfs_aops; ++ else ++ i->i_data.a_ops = &squashfs_aops_4K; ++ ++ TRACE("File inode %x:%x, start_block %llx, " ++ "block_list_start %llx, offset %x\n", ++ SQUASHFS_INODE_BLK(inode), offset, ++ inodep->start_block, next_block, ++ next_offset); ++ break; ++ } ++ case SQUASHFS_DIR_TYPE: { ++ struct squashfs_dir_inode_header *inodep = &id.dir; ++ struct squashfs_dir_inode_header *sinodep = &sid.dir; ++ ++ if (msblk->swap) { ++ if (!squashfs_get_cached_block(s, (char *) ++ sinodep, block, offset, ++ sizeof(*sinodep), &next_block, ++ &next_offset)) ++ goto failed_read; ++ SQUASHFS_SWAP_DIR_INODE_HEADER(inodep, sinodep); ++ } else ++ if (!squashfs_get_cached_block(s, (char *) ++ inodep, block, offset, ++ sizeof(*inodep), &next_block, ++ &next_offset)) ++ goto failed_read; ++ ++ if((i = squashfs_new_inode(s, inodeb)) == NULL) ++ goto failed_read1; ++ ++ i->i_nlink = inodep->nlink; ++ i->i_size = inodep->file_size; ++ i->i_op = &squashfs_dir_inode_ops; ++ i->i_fop = &squashfs_dir_ops; ++ i->i_mode |= S_IFDIR; ++ SQUASHFS_I(i)->start_block = inodep->start_block; ++ SQUASHFS_I(i)->offset = inodep->offset; ++ SQUASHFS_I(i)->u.s2.directory_index_count = 0; ++ SQUASHFS_I(i)->u.s2.parent_inode = inodep->parent_inode; ++ ++ TRACE("Directory inode %x:%x, start_block %x, offset " ++ "%x\n", SQUASHFS_INODE_BLK(inode), ++ offset, inodep->start_block, ++ inodep->offset); ++ break; ++ } ++ case SQUASHFS_LDIR_TYPE: { ++ struct squashfs_ldir_inode_header *inodep = &id.ldir; ++ struct squashfs_ldir_inode_header *sinodep = &sid.ldir; ++ ++ if (msblk->swap) { ++ if (!squashfs_get_cached_block(s, (char *) ++ sinodep, block, offset, ++ sizeof(*sinodep), &next_block, ++ &next_offset)) ++ goto failed_read; ++ SQUASHFS_SWAP_LDIR_INODE_HEADER(inodep, ++ sinodep); ++ } else ++ if (!squashfs_get_cached_block(s, (char *) ++ inodep, block, offset, ++ sizeof(*inodep), &next_block, ++ &next_offset)) ++ goto failed_read; ++ ++ if((i = squashfs_new_inode(s, inodeb)) == NULL) ++ goto failed_read1; ++ ++ i->i_nlink = inodep->nlink; ++ i->i_size = inodep->file_size; ++ i->i_op = &squashfs_dir_inode_ops; ++ i->i_fop = &squashfs_dir_ops; ++ i->i_mode |= S_IFDIR; ++ SQUASHFS_I(i)->start_block = inodep->start_block; ++ SQUASHFS_I(i)->offset = inodep->offset; ++ SQUASHFS_I(i)->u.s2.directory_index_start = next_block; ++ SQUASHFS_I(i)->u.s2.directory_index_offset = ++ next_offset; ++ SQUASHFS_I(i)->u.s2.directory_index_count = ++ inodep->i_count; ++ SQUASHFS_I(i)->u.s2.parent_inode = inodep->parent_inode; ++ ++ TRACE("Long directory inode %x:%x, start_block %x, " ++ "offset %x\n", ++ SQUASHFS_INODE_BLK(inode), offset, ++ inodep->start_block, inodep->offset); ++ break; ++ } ++ case SQUASHFS_SYMLINK_TYPE: { ++ struct squashfs_symlink_inode_header *inodep = ++ &id.symlink; ++ struct squashfs_symlink_inode_header *sinodep = ++ &sid.symlink; ++ ++ if (msblk->swap) { ++ if (!squashfs_get_cached_block(s, (char *) ++ sinodep, block, offset, ++ sizeof(*sinodep), &next_block, ++ &next_offset)) ++ goto failed_read; ++ SQUASHFS_SWAP_SYMLINK_INODE_HEADER(inodep, ++ sinodep); ++ } else ++ if (!squashfs_get_cached_block(s, (char *) ++ inodep, block, offset, ++ sizeof(*inodep), &next_block, ++ &next_offset)) ++ goto failed_read; ++ ++ if((i = squashfs_new_inode(s, inodeb)) == NULL) ++ goto failed_read1; ++ ++ i->i_nlink = inodep->nlink; ++ i->i_size = inodep->symlink_size; ++ i->i_op = &page_symlink_inode_operations; ++ i->i_data.a_ops = &squashfs_symlink_aops; ++ i->i_mode |= S_IFLNK; ++ SQUASHFS_I(i)->start_block = next_block; ++ SQUASHFS_I(i)->offset = next_offset; ++ ++ TRACE("Symbolic link inode %x:%x, start_block %llx, " ++ "offset %x\n", ++ SQUASHFS_INODE_BLK(inode), offset, ++ next_block, next_offset); ++ break; ++ } ++ case SQUASHFS_BLKDEV_TYPE: ++ case SQUASHFS_CHRDEV_TYPE: { ++ struct squashfs_dev_inode_header *inodep = &id.dev; ++ struct squashfs_dev_inode_header *sinodep = &sid.dev; ++ ++ if (msblk->swap) { ++ if (!squashfs_get_cached_block(s, (char *) ++ sinodep, block, offset, ++ sizeof(*sinodep), &next_block, ++ &next_offset)) ++ goto failed_read; ++ SQUASHFS_SWAP_DEV_INODE_HEADER(inodep, sinodep); ++ } else ++ if (!squashfs_get_cached_block(s, (char *) ++ inodep, block, offset, ++ sizeof(*inodep), &next_block, ++ &next_offset)) ++ goto failed_read; ++ ++ if ((i = squashfs_new_inode(s, inodeb)) == NULL) ++ goto failed_read1; ++ ++ i->i_nlink = inodep->nlink; ++ i->i_mode |= (inodeb->inode_type == ++ SQUASHFS_CHRDEV_TYPE) ? S_IFCHR : ++ S_IFBLK; ++ init_special_inode(i, i->i_mode, ++ old_decode_dev(inodep->rdev)); ++ ++ TRACE("Device inode %x:%x, rdev %x\n", ++ SQUASHFS_INODE_BLK(inode), offset, ++ inodep->rdev); ++ break; ++ } ++ case SQUASHFS_FIFO_TYPE: ++ case SQUASHFS_SOCKET_TYPE: { ++ struct squashfs_ipc_inode_header *inodep = &id.ipc; ++ struct squashfs_ipc_inode_header *sinodep = &sid.ipc; ++ ++ if (msblk->swap) { ++ if (!squashfs_get_cached_block(s, (char *) ++ sinodep, block, offset, ++ sizeof(*sinodep), &next_block, ++ &next_offset)) ++ goto failed_read; ++ SQUASHFS_SWAP_IPC_INODE_HEADER(inodep, sinodep); ++ } else ++ if (!squashfs_get_cached_block(s, (char *) ++ inodep, block, offset, ++ sizeof(*inodep), &next_block, ++ &next_offset)) ++ goto failed_read; ++ ++ if ((i = squashfs_new_inode(s, inodeb)) == NULL) ++ goto failed_read1; ++ ++ i->i_nlink = inodep->nlink; ++ i->i_mode |= (inodeb->inode_type == SQUASHFS_FIFO_TYPE) ++ ? S_IFIFO : S_IFSOCK; ++ init_special_inode(i, i->i_mode, 0); ++ break; ++ } ++ default: ++ ERROR("Unknown inode type %d in squashfs_iget!\n", ++ inodeb->inode_type); ++ goto failed_read1; ++ } ++ ++ insert_inode_hash(i); ++ return i; ++ ++failed_read: ++ ERROR("Unable to read inode [%llx:%x]\n", block, offset); ++ ++failed_read1: ++ return NULL; ++} ++ ++ ++static int read_fragment_index_table(struct super_block *s) ++{ ++ struct squashfs_sb_info *msblk = s->s_fs_info; ++ struct squashfs_super_block *sblk = &msblk->sblk; ++ ++ /* Allocate fragment index table */ ++ if (!(msblk->fragment_index = kmalloc(SQUASHFS_FRAGMENT_INDEX_BYTES ++ (sblk->fragments), GFP_KERNEL))) { ++ ERROR("Failed to allocate uid/gid table\n"); ++ return 0; ++ } ++ ++ if (SQUASHFS_FRAGMENT_INDEX_BYTES(sblk->fragments) && ++ !squashfs_read_data(s, (char *) ++ msblk->fragment_index, ++ sblk->fragment_table_start, ++ SQUASHFS_FRAGMENT_INDEX_BYTES ++ (sblk->fragments) | ++ SQUASHFS_COMPRESSED_BIT_BLOCK, NULL)) { ++ ERROR("unable to read fragment index table\n"); ++ return 0; ++ } ++ ++ if (msblk->swap) { ++ int i; ++ long long fragment; ++ ++ for (i = 0; i < SQUASHFS_FRAGMENT_INDEXES(sblk->fragments); ++ i++) { ++ SQUASHFS_SWAP_FRAGMENT_INDEXES((&fragment), ++ &msblk->fragment_index[i], 1); ++ msblk->fragment_index[i] = fragment; ++ } ++ } ++ ++ return 1; ++} ++ ++ ++static int supported_squashfs_filesystem(struct squashfs_sb_info *msblk, int silent) ++{ ++ struct squashfs_super_block *sblk = &msblk->sblk; ++ ++ msblk->iget = squashfs_iget; ++ msblk->read_blocklist = read_blocklist; ++ msblk->read_fragment_index_table = read_fragment_index_table; ++ ++ if (sblk->s_major == 1) { ++ if (!squashfs_1_0_supported(msblk)) { ++ SERROR("Major/Minor mismatch, Squashfs 1.0 filesystems " ++ "are unsupported\n"); ++ SERROR("Please recompile with " ++ "Squashfs 1.0 support enabled\n"); ++ return 0; ++ } ++ } else if (sblk->s_major == 2) { ++ if (!squashfs_2_0_supported(msblk)) { ++ SERROR("Major/Minor mismatch, Squashfs 2.0 filesystems " ++ "are unsupported\n"); ++ SERROR("Please recompile with " ++ "Squashfs 2.0 support enabled\n"); ++ return 0; ++ } ++ } else if(sblk->s_major != SQUASHFS_MAJOR || sblk->s_minor > ++ SQUASHFS_MINOR) { ++ SERROR("Major/Minor mismatch, trying to mount newer %d.%d " ++ "filesystem\n", sblk->s_major, sblk->s_minor); ++ SERROR("Please update your kernel\n"); ++ return 0; ++ } ++ ++ return 1; ++} ++ ++ ++static int squashfs_fill_super(struct super_block *s, void *data, int silent) ++{ ++ struct squashfs_sb_info *msblk; ++ struct squashfs_super_block *sblk; ++ int i; ++ char b[BDEVNAME_SIZE]; ++ struct inode *root; ++ ++ TRACE("Entered squashfs_read_superblock\n"); ++ ++ if (!(s->s_fs_info = kmalloc(sizeof(struct squashfs_sb_info), ++ GFP_KERNEL))) { ++ ERROR("Failed to allocate superblock\n"); ++ goto failure; ++ } ++ memset(s->s_fs_info, 0, sizeof(struct squashfs_sb_info)); ++ msblk = s->s_fs_info; ++ if (!(msblk->stream.workspace = vmalloc(zlib_inflate_workspacesize()))) { ++ ERROR("Failed to allocate zlib workspace\n"); ++ goto failure; ++ } ++ sblk = &msblk->sblk; ++ ++ msblk->devblksize = sb_min_blocksize(s, BLOCK_SIZE); ++ msblk->devblksize_log2 = ffz(~msblk->devblksize); ++ ++ init_MUTEX(&msblk->read_data_mutex); ++ init_MUTEX(&msblk->read_page_mutex); ++ init_MUTEX(&msblk->block_cache_mutex); ++ init_MUTEX(&msblk->fragment_mutex); ++ init_MUTEX(&msblk->meta_index_mutex); ++ ++ init_waitqueue_head(&msblk->waitq); ++ init_waitqueue_head(&msblk->fragment_wait_queue); ++ ++ if (!squashfs_read_data(s, (char *) sblk, SQUASHFS_START, ++ sizeof(struct squashfs_super_block) | ++ SQUASHFS_COMPRESSED_BIT_BLOCK, NULL)) { ++ SERROR("unable to read superblock\n"); ++ goto failed_mount; ++ } ++ ++ /* Check it is a SQUASHFS superblock */ ++ msblk->swap = 0; ++ if ((s->s_magic = sblk->s_magic) != SQUASHFS_MAGIC) { ++ if (sblk->s_magic == SQUASHFS_MAGIC_SWAP) { ++ struct squashfs_super_block ssblk; ++ ++ WARNING("Mounting a different endian SQUASHFS " ++ "filesystem on %s\n", bdevname(s->s_bdev, b)); ++ ++ SQUASHFS_SWAP_SUPER_BLOCK(&ssblk, sblk); ++ memcpy(sblk, &ssblk, sizeof(struct squashfs_super_block)); ++ msblk->swap = 1; ++ } else { ++ SERROR("Can't find a SQUASHFS superblock on %s\n", ++ bdevname(s->s_bdev, b)); ++ goto failed_mount; ++ } ++ } ++ ++ /* Check the MAJOR & MINOR versions */ ++ if(!supported_squashfs_filesystem(msblk, silent)) ++ goto failed_mount; ++ ++ TRACE("Found valid superblock on %s\n", bdevname(s->s_bdev, b)); ++ TRACE("Inodes are %scompressed\n", ++ SQUASHFS_UNCOMPRESSED_INODES ++ (sblk->flags) ? "un" : ""); ++ TRACE("Data is %scompressed\n", ++ SQUASHFS_UNCOMPRESSED_DATA(sblk->flags) ++ ? "un" : ""); ++ TRACE("Check data is %s present in the filesystem\n", ++ SQUASHFS_CHECK_DATA(sblk->flags) ? ++ "" : "not"); ++ TRACE("Filesystem size %lld bytes\n", sblk->bytes_used); ++ TRACE("Block size %d\n", sblk->block_size); ++ TRACE("Number of inodes %d\n", sblk->inodes); ++ if (sblk->s_major > 1) ++ TRACE("Number of fragments %d\n", sblk->fragments); ++ TRACE("Number of uids %d\n", sblk->no_uids); ++ TRACE("Number of gids %d\n", sblk->no_guids); ++ TRACE("sblk->inode_table_start %llx\n", sblk->inode_table_start); ++ TRACE("sblk->directory_table_start %llx\n", sblk->directory_table_start); ++ if (sblk->s_major > 1) ++ TRACE("sblk->fragment_table_start %llx\n", ++ sblk->fragment_table_start); ++ TRACE("sblk->uid_start %llx\n", sblk->uid_start); ++ ++ s->s_flags |= MS_RDONLY; ++ s->s_op = &squashfs_ops; ++ ++ /* Init inode_table block pointer array */ ++ if (!(msblk->block_cache = kmalloc(sizeof(struct squashfs_cache) * ++ SQUASHFS_CACHED_BLKS, GFP_KERNEL))) { ++ ERROR("Failed to allocate block cache\n"); ++ goto failed_mount; ++ } ++ ++ for (i = 0; i < SQUASHFS_CACHED_BLKS; i++) ++ msblk->block_cache[i].block = SQUASHFS_INVALID_BLK; ++ ++ msblk->next_cache = 0; ++ ++ /* Allocate read_data block */ ++ msblk->read_size = (sblk->block_size < SQUASHFS_METADATA_SIZE) ? ++ SQUASHFS_METADATA_SIZE : ++ sblk->block_size; ++ ++ if (!(msblk->read_data = kmalloc(msblk->read_size, GFP_KERNEL))) { ++ ERROR("Failed to allocate read_data block\n"); ++ goto failed_mount; ++ } ++ ++ /* Allocate read_page block */ ++ if (!(msblk->read_page = kmalloc(sblk->block_size, GFP_KERNEL))) { ++ ERROR("Failed to allocate read_page block\n"); ++ goto failed_mount; ++ } ++ ++ /* Allocate uid and gid tables */ ++ if (!(msblk->uid = kmalloc((sblk->no_uids + sblk->no_guids) * ++ sizeof(unsigned int), GFP_KERNEL))) { ++ ERROR("Failed to allocate uid/gid table\n"); ++ goto failed_mount; ++ } ++ msblk->guid = msblk->uid + sblk->no_uids; ++ ++ if (msblk->swap) { ++ unsigned int suid[sblk->no_uids + sblk->no_guids]; ++ ++ if (!squashfs_read_data(s, (char *) &suid, sblk->uid_start, ++ ((sblk->no_uids + sblk->no_guids) * ++ sizeof(unsigned int)) | ++ SQUASHFS_COMPRESSED_BIT_BLOCK, NULL)) { ++ ERROR("unable to read uid/gid table\n"); ++ goto failed_mount; ++ } ++ ++ SQUASHFS_SWAP_DATA(msblk->uid, suid, (sblk->no_uids + ++ sblk->no_guids), (sizeof(unsigned int) * 8)); ++ } else ++ if (!squashfs_read_data(s, (char *) msblk->uid, sblk->uid_start, ++ ((sblk->no_uids + sblk->no_guids) * ++ sizeof(unsigned int)) | ++ SQUASHFS_COMPRESSED_BIT_BLOCK, NULL)) { ++ ERROR("unable to read uid/gid table\n"); ++ goto failed_mount; ++ } ++ ++ ++ if (sblk->s_major == 1 && squashfs_1_0_supported(msblk)) ++ goto allocate_root; ++ ++ if (!(msblk->fragment = kmalloc(sizeof(struct squashfs_fragment_cache) * ++ SQUASHFS_CACHED_FRAGMENTS, GFP_KERNEL))) { ++ ERROR("Failed to allocate fragment block cache\n"); ++ goto failed_mount; ++ } ++ ++ for (i = 0; i < SQUASHFS_CACHED_FRAGMENTS; i++) { ++ msblk->fragment[i].locked = 0; ++ msblk->fragment[i].block = SQUASHFS_INVALID_BLK; ++ msblk->fragment[i].data = NULL; ++ } ++ ++ msblk->next_fragment = 0; ++ ++ /* Allocate fragment index table */ ++ if (msblk->read_fragment_index_table(s) == 0) ++ goto failed_mount; ++ ++allocate_root: ++ if ((root = (msblk->iget)(s, sblk->root_inode)) == NULL) ++ goto failed_mount; ++ ++ if ((s->s_root = d_alloc_root(root)) == NULL) { ++ ERROR("Root inode create failed\n"); ++ iput(root); ++ goto failed_mount; ++ } ++ ++ TRACE("Leaving squashfs_read_super\n"); ++ return 0; ++ ++failed_mount: ++ kfree(msblk->fragment_index); ++ kfree(msblk->fragment); ++ kfree(msblk->uid); ++ kfree(msblk->read_page); ++ kfree(msblk->read_data); ++ kfree(msblk->block_cache); ++ kfree(msblk->fragment_index_2); ++ vfree(msblk->stream.workspace); ++ kfree(s->s_fs_info); ++ s->s_fs_info = NULL; ++ return -EINVAL; ++ ++failure: ++ return -ENOMEM; ++} ++ ++ ++static int squashfs_statfs(struct dentry *dentry, struct kstatfs *buf) ++{ ++ struct squashfs_sb_info *msblk = dentry->d_sb->s_fs_info; ++ struct squashfs_super_block *sblk = &msblk->sblk; ++ ++ TRACE("Entered squashfs_statfs\n"); ++ ++ buf->f_type = SQUASHFS_MAGIC; ++ buf->f_bsize = sblk->block_size; ++ buf->f_blocks = ((sblk->bytes_used - 1) >> sblk->block_log) + 1; ++ buf->f_bfree = buf->f_bavail = 0; ++ buf->f_files = sblk->inodes; ++ buf->f_ffree = 0; ++ buf->f_namelen = SQUASHFS_NAME_LEN; ++ ++ return 0; ++} ++ ++ ++static int squashfs_symlink_readpage(struct file *file, struct page *page) ++{ ++ struct inode *inode = page->mapping->host; ++ int index = page->index << PAGE_CACHE_SHIFT, length, bytes; ++ long long block = SQUASHFS_I(inode)->start_block; ++ int offset = SQUASHFS_I(inode)->offset; ++ void *pageaddr = kmap(page); ++ ++ TRACE("Entered squashfs_symlink_readpage, page index %ld, start block " ++ "%llx, offset %x\n", page->index, ++ SQUASHFS_I(inode)->start_block, ++ SQUASHFS_I(inode)->offset); ++ ++ for (length = 0; length < index; length += bytes) { ++ if (!(bytes = squashfs_get_cached_block(inode->i_sb, NULL, ++ block, offset, PAGE_CACHE_SIZE, &block, ++ &offset))) { ++ ERROR("Unable to read symbolic link [%llx:%x]\n", block, ++ offset); ++ goto skip_read; ++ } ++ } ++ ++ if (length != index) { ++ ERROR("(squashfs_symlink_readpage) length != index\n"); ++ bytes = 0; ++ goto skip_read; ++ } ++ ++ bytes = (i_size_read(inode) - length) > PAGE_CACHE_SIZE ? PAGE_CACHE_SIZE : ++ i_size_read(inode) - length; ++ ++ if (!(bytes = squashfs_get_cached_block(inode->i_sb, pageaddr, block, ++ offset, bytes, &block, &offset))) ++ ERROR("Unable to read symbolic link [%llx:%x]\n", block, offset); ++ ++skip_read: ++ memset(pageaddr + bytes, 0, PAGE_CACHE_SIZE - bytes); ++ kunmap(page); ++ SetPageUptodate(page); ++ unlock_page(page); ++ ++ return 0; ++} ++ ++ ++struct meta_index *locate_meta_index(struct inode *inode, int index, int offset) ++{ ++ struct meta_index *meta = NULL; ++ struct squashfs_sb_info *msblk = inode->i_sb->s_fs_info; ++ int i; ++ ++ down(&msblk->meta_index_mutex); ++ ++ TRACE("locate_meta_index: index %d, offset %d\n", index, offset); ++ ++ if(msblk->meta_index == NULL) ++ goto not_allocated; ++ ++ for (i = 0; i < SQUASHFS_META_NUMBER; i ++) ++ if (msblk->meta_index[i].inode_number == inode->i_ino && ++ msblk->meta_index[i].offset >= offset && ++ msblk->meta_index[i].offset <= index && ++ msblk->meta_index[i].locked == 0) { ++ TRACE("locate_meta_index: entry %d, offset %d\n", i, ++ msblk->meta_index[i].offset); ++ meta = &msblk->meta_index[i]; ++ offset = meta->offset; ++ } ++ ++ if (meta) ++ meta->locked = 1; ++ ++not_allocated: ++ up(&msblk->meta_index_mutex); ++ ++ return meta; ++} ++ ++ ++struct meta_index *empty_meta_index(struct inode *inode, int offset, int skip) ++{ ++ struct squashfs_sb_info *msblk = inode->i_sb->s_fs_info; ++ struct meta_index *meta = NULL; ++ int i; ++ ++ down(&msblk->meta_index_mutex); ++ ++ TRACE("empty_meta_index: offset %d, skip %d\n", offset, skip); ++ ++ if(msblk->meta_index == NULL) { ++ if (!(msblk->meta_index = kmalloc(sizeof(struct meta_index) * ++ SQUASHFS_META_NUMBER, GFP_KERNEL))) { ++ ERROR("Failed to allocate meta_index\n"); ++ goto failed; ++ } ++ for(i = 0; i < SQUASHFS_META_NUMBER; i++) { ++ msblk->meta_index[i].inode_number = 0; ++ msblk->meta_index[i].locked = 0; ++ } ++ msblk->next_meta_index = 0; ++ } ++ ++ for(i = SQUASHFS_META_NUMBER; i && ++ msblk->meta_index[msblk->next_meta_index].locked; i --) ++ msblk->next_meta_index = (msblk->next_meta_index + 1) % ++ SQUASHFS_META_NUMBER; ++ ++ if(i == 0) { ++ TRACE("empty_meta_index: failed!\n"); ++ goto failed; ++ } ++ ++ TRACE("empty_meta_index: returned meta entry %d, %p\n", ++ msblk->next_meta_index, ++ &msblk->meta_index[msblk->next_meta_index]); ++ ++ meta = &msblk->meta_index[msblk->next_meta_index]; ++ msblk->next_meta_index = (msblk->next_meta_index + 1) % ++ SQUASHFS_META_NUMBER; ++ ++ meta->inode_number = inode->i_ino; ++ meta->offset = offset; ++ meta->skip = skip; ++ meta->entries = 0; ++ meta->locked = 1; ++ ++failed: ++ up(&msblk->meta_index_mutex); ++ return meta; ++} ++ ++ ++void release_meta_index(struct inode *inode, struct meta_index *meta) ++{ ++ meta->locked = 0; ++} ++ ++ ++static int read_block_index(struct super_block *s, int blocks, char *block_list, ++ long long *start_block, int *offset) ++{ ++ struct squashfs_sb_info *msblk = s->s_fs_info; ++ unsigned int *block_listp; ++ int block = 0; ++ ++ if (msblk->swap) { ++ char sblock_list[blocks << 2]; ++ ++ if (!squashfs_get_cached_block(s, sblock_list, *start_block, ++ *offset, blocks << 2, start_block, offset)) { ++ ERROR("Unable to read block list [%llx:%x]\n", ++ *start_block, *offset); ++ goto failure; ++ } ++ SQUASHFS_SWAP_INTS(((unsigned int *)block_list), ++ ((unsigned int *)sblock_list), blocks); ++ } else ++ if (!squashfs_get_cached_block(s, block_list, *start_block, ++ *offset, blocks << 2, start_block, offset)) { ++ ERROR("Unable to read block list [%llx:%x]\n", ++ *start_block, *offset); ++ goto failure; ++ } ++ ++ for (block_listp = (unsigned int *) block_list; blocks; ++ block_listp++, blocks --) ++ block += SQUASHFS_COMPRESSED_SIZE_BLOCK(*block_listp); ++ ++ return block; ++ ++failure: ++ return -1; ++} ++ ++ ++#define SIZE 256 ++ ++static inline int calculate_skip(int blocks) { ++ int skip = (blocks - 1) / ((SQUASHFS_SLOTS * SQUASHFS_META_ENTRIES + 1) * SQUASHFS_META_INDEXES); ++ return skip >= 7 ? 7 : skip + 1; ++} ++ ++ ++static int get_meta_index(struct inode *inode, int index, ++ long long *index_block, int *index_offset, ++ long long *data_block, char *block_list) ++{ ++ struct squashfs_sb_info *msblk = inode->i_sb->s_fs_info; ++ struct squashfs_super_block *sblk = &msblk->sblk; ++ int skip = calculate_skip(i_size_read(inode) >> sblk->block_log); ++ int offset = 0; ++ struct meta_index *meta; ++ struct meta_entry *meta_entry; ++ long long cur_index_block = SQUASHFS_I(inode)->u.s1.block_list_start; ++ int cur_offset = SQUASHFS_I(inode)->offset; ++ long long cur_data_block = SQUASHFS_I(inode)->start_block; ++ int i; ++ ++ index /= SQUASHFS_META_INDEXES * skip; ++ ++ while ( offset < index ) { ++ meta = locate_meta_index(inode, index, offset + 1); ++ ++ if (meta == NULL) { ++ if ((meta = empty_meta_index(inode, offset + 1, ++ skip)) == NULL) ++ goto all_done; ++ } else { ++ offset = index < meta->offset + meta->entries ? index : ++ meta->offset + meta->entries - 1; ++ meta_entry = &meta->meta_entry[offset - meta->offset]; ++ cur_index_block = meta_entry->index_block + sblk->inode_table_start; ++ cur_offset = meta_entry->offset; ++ cur_data_block = meta_entry->data_block; ++ TRACE("get_meta_index: offset %d, meta->offset %d, " ++ "meta->entries %d\n", offset, meta->offset, ++ meta->entries); ++ TRACE("get_meta_index: index_block 0x%llx, offset 0x%x" ++ " data_block 0x%llx\n", cur_index_block, ++ cur_offset, cur_data_block); ++ } ++ ++ for (i = meta->offset + meta->entries; i <= index && ++ i < meta->offset + SQUASHFS_META_ENTRIES; i++) { ++ int blocks = skip * SQUASHFS_META_INDEXES; ++ ++ while (blocks) { ++ int block = blocks > (SIZE >> 2) ? (SIZE >> 2) : ++ blocks; ++ int res = read_block_index(inode->i_sb, block, ++ block_list, &cur_index_block, ++ &cur_offset); ++ ++ if (res == -1) ++ goto failed; ++ ++ cur_data_block += res; ++ blocks -= block; ++ } ++ ++ meta_entry = &meta->meta_entry[i - meta->offset]; ++ meta_entry->index_block = cur_index_block - sblk->inode_table_start; ++ meta_entry->offset = cur_offset; ++ meta_entry->data_block = cur_data_block; ++ meta->entries ++; ++ offset ++; ++ } ++ ++ TRACE("get_meta_index: meta->offset %d, meta->entries %d\n", ++ meta->offset, meta->entries); ++ ++ release_meta_index(inode, meta); ++ } ++ ++all_done: ++ *index_block = cur_index_block; ++ *index_offset = cur_offset; ++ *data_block = cur_data_block; ++ ++ return offset * SQUASHFS_META_INDEXES * skip; ++ ++failed: ++ release_meta_index(inode, meta); ++ return -1; ++} ++ ++ ++static long long read_blocklist(struct inode *inode, int index, ++ int readahead_blks, char *block_list, ++ unsigned short **block_p, unsigned int *bsize) ++{ ++ long long block_ptr; ++ int offset; ++ long long block; ++ int res = get_meta_index(inode, index, &block_ptr, &offset, &block, ++ block_list); ++ ++ TRACE("read_blocklist: res %d, index %d, block_ptr 0x%llx, offset" ++ " 0x%x, block 0x%llx\n", res, index, block_ptr, offset, ++ block); ++ ++ if(res == -1) ++ goto failure; ++ ++ index -= res; ++ ++ while ( index ) { ++ int blocks = index > (SIZE >> 2) ? (SIZE >> 2) : index; ++ int res = read_block_index(inode->i_sb, blocks, block_list, ++ &block_ptr, &offset); ++ if (res == -1) ++ goto failure; ++ block += res; ++ index -= blocks; ++ } ++ ++ if (read_block_index(inode->i_sb, 1, block_list, ++ &block_ptr, &offset) == -1) ++ goto failure; ++ *bsize = *((unsigned int *) block_list); ++ ++ return block; ++ ++failure: ++ return 0; ++} ++ ++ ++static int squashfs_readpage(struct file *file, struct page *page) ++{ ++ struct inode *inode = page->mapping->host; ++ struct squashfs_sb_info *msblk = inode->i_sb->s_fs_info; ++ struct squashfs_super_block *sblk = &msblk->sblk; ++ unsigned char *block_list; ++ long long block; ++ unsigned int bsize, i = 0, bytes = 0, byte_offset = 0; ++ int index = page->index >> (sblk->block_log - PAGE_CACHE_SHIFT); ++ void *pageaddr; ++ struct squashfs_fragment_cache *fragment = NULL; ++ char *data_ptr = msblk->read_page; ++ ++ int mask = (1 << (sblk->block_log - PAGE_CACHE_SHIFT)) - 1; ++ int start_index = page->index & ~mask; ++ int end_index = start_index | mask; ++ ++ TRACE("Entered squashfs_readpage, page index %lx, start block %llx\n", ++ page->index, ++ SQUASHFS_I(inode)->start_block); ++ ++ if (!(block_list = kmalloc(SIZE, GFP_KERNEL))) { ++ ERROR("Failed to allocate block_list\n"); ++ goto skip_read; ++ } ++ ++ if (page->index >= ((i_size_read(inode) + PAGE_CACHE_SIZE - 1) >> ++ PAGE_CACHE_SHIFT)) ++ goto skip_read; ++ ++ if (SQUASHFS_I(inode)->u.s1.fragment_start_block == SQUASHFS_INVALID_BLK ++ || index < (i_size_read(inode) >> ++ sblk->block_log)) { ++ if ((block = (msblk->read_blocklist)(inode, index, 1, ++ block_list, NULL, &bsize)) == 0) ++ goto skip_read; ++ ++ down(&msblk->read_page_mutex); ++ ++ if (!(bytes = squashfs_read_data(inode->i_sb, msblk->read_page, ++ block, bsize, NULL))) { ++ ERROR("Unable to read page, block %llx, size %x\n", block, ++ bsize); ++ up(&msblk->read_page_mutex); ++ goto skip_read; ++ } ++ } else { ++ if ((fragment = get_cached_fragment(inode->i_sb, ++ SQUASHFS_I(inode)-> ++ u.s1.fragment_start_block, ++ SQUASHFS_I(inode)->u.s1.fragment_size)) ++ == NULL) { ++ ERROR("Unable to read page, block %llx, size %x\n", ++ SQUASHFS_I(inode)-> ++ u.s1.fragment_start_block, ++ (int) SQUASHFS_I(inode)-> ++ u.s1.fragment_size); ++ goto skip_read; ++ } ++ bytes = SQUASHFS_I(inode)->u.s1.fragment_offset + ++ (i_size_read(inode) & (sblk->block_size ++ - 1)); ++ byte_offset = SQUASHFS_I(inode)->u.s1.fragment_offset; ++ data_ptr = fragment->data; ++ } ++ ++ for (i = start_index; i <= end_index && byte_offset < bytes; ++ i++, byte_offset += PAGE_CACHE_SIZE) { ++ struct page *push_page; ++ int available_bytes = (bytes - byte_offset) > PAGE_CACHE_SIZE ? ++ PAGE_CACHE_SIZE : bytes - byte_offset; ++ ++ TRACE("bytes %d, i %d, byte_offset %d, available_bytes %d\n", ++ bytes, i, byte_offset, available_bytes); ++ ++ if (i == page->index) { ++ pageaddr = kmap_atomic(page, KM_USER0); ++ memcpy(pageaddr, data_ptr + byte_offset, ++ available_bytes); ++ memset(pageaddr + available_bytes, 0, ++ PAGE_CACHE_SIZE - available_bytes); ++ kunmap_atomic(pageaddr, KM_USER0); ++ flush_dcache_page(page); ++ SetPageUptodate(page); ++ unlock_page(page); ++ } else if ((push_page = ++ grab_cache_page_nowait(page->mapping, i))) { ++ pageaddr = kmap_atomic(push_page, KM_USER0); ++ ++ memcpy(pageaddr, data_ptr + byte_offset, ++ available_bytes); ++ memset(pageaddr + available_bytes, 0, ++ PAGE_CACHE_SIZE - available_bytes); ++ kunmap_atomic(pageaddr, KM_USER0); ++ flush_dcache_page(push_page); ++ SetPageUptodate(push_page); ++ unlock_page(push_page); ++ page_cache_release(push_page); ++ } ++ } ++ ++ if (SQUASHFS_I(inode)->u.s1.fragment_start_block == SQUASHFS_INVALID_BLK ++ || index < (i_size_read(inode) >> ++ sblk->block_log)) ++ up(&msblk->read_page_mutex); ++ else ++ release_cached_fragment(msblk, fragment); ++ ++ kfree(block_list); ++ return 0; ++ ++skip_read: ++ pageaddr = kmap_atomic(page, KM_USER0); ++ memset(pageaddr + bytes, 0, PAGE_CACHE_SIZE - bytes); ++ kunmap_atomic(pageaddr, KM_USER0); ++ flush_dcache_page(page); ++ SetPageUptodate(page); ++ unlock_page(page); ++ ++ kfree(block_list); ++ return 0; ++} ++ ++ ++static int squashfs_readpage4K(struct file *file, struct page *page) ++{ ++ struct inode *inode = page->mapping->host; ++ struct squashfs_sb_info *msblk = inode->i_sb->s_fs_info; ++ struct squashfs_super_block *sblk = &msblk->sblk; ++ unsigned char *block_list; ++ long long block; ++ unsigned int bsize, bytes = 0; ++ void *pageaddr; ++ ++ TRACE("Entered squashfs_readpage4K, page index %lx, start block %llx\n", ++ page->index, ++ SQUASHFS_I(inode)->start_block); ++ ++ if (page->index >= ((i_size_read(inode) + PAGE_CACHE_SIZE - 1) >> ++ PAGE_CACHE_SHIFT)) { ++ pageaddr = kmap_atomic(page, KM_USER0); ++ block_list = NULL; ++ goto skip_read; ++ } ++ ++ if (!(block_list = kmalloc(SIZE, GFP_KERNEL))) { ++ ERROR("Failed to allocate block_list\n"); ++ pageaddr = kmap_atomic(page, KM_USER0); ++ block_list = NULL; ++ goto skip_read; ++ } ++ ++ if (SQUASHFS_I(inode)->u.s1.fragment_start_block == SQUASHFS_INVALID_BLK ++ || page->index < (i_size_read(inode) >> ++ sblk->block_log)) { ++ block = (msblk->read_blocklist)(inode, page->index, 1, ++ block_list, NULL, &bsize); ++ ++ down(&msblk->read_page_mutex); ++ bytes = squashfs_read_data(inode->i_sb, msblk->read_page, block, ++ bsize, NULL); ++ pageaddr = kmap_atomic(page, KM_USER0); ++ if (bytes) ++ memcpy(pageaddr, msblk->read_page, bytes); ++ else ++ ERROR("Unable to read page, block %llx, size %x\n", ++ block, bsize); ++ up(&msblk->read_page_mutex); ++ } else { ++ struct squashfs_fragment_cache *fragment = ++ get_cached_fragment(inode->i_sb, ++ SQUASHFS_I(inode)-> ++ u.s1.fragment_start_block, ++ SQUASHFS_I(inode)-> u.s1.fragment_size); ++ pageaddr = kmap_atomic(page, KM_USER0); ++ if (fragment) { ++ bytes = i_size_read(inode) & (sblk->block_size - 1); ++ memcpy(pageaddr, fragment->data + SQUASHFS_I(inode)-> ++ u.s1.fragment_offset, bytes); ++ release_cached_fragment(msblk, fragment); ++ } else ++ ERROR("Unable to read page, block %llx, size %x\n", ++ SQUASHFS_I(inode)-> ++ u.s1.fragment_start_block, (int) ++ SQUASHFS_I(inode)-> u.s1.fragment_size); ++ } ++ ++skip_read: ++ memset(pageaddr + bytes, 0, PAGE_CACHE_SIZE - bytes); ++ kunmap_atomic(pageaddr, KM_USER0); ++ flush_dcache_page(page); ++ SetPageUptodate(page); ++ unlock_page(page); ++ ++ kfree(block_list); ++ return 0; ++} ++ ++ ++static int get_dir_index_using_offset(struct super_block *s, long long ++ *next_block, unsigned int *next_offset, ++ long long index_start, ++ unsigned int index_offset, int i_count, ++ long long f_pos) ++{ ++ struct squashfs_sb_info *msblk = s->s_fs_info; ++ struct squashfs_super_block *sblk = &msblk->sblk; ++ int i, length = 0; ++ struct squashfs_dir_index index; ++ ++ TRACE("Entered get_dir_index_using_offset, i_count %d, f_pos %d\n", ++ i_count, (unsigned int) f_pos); ++ ++ f_pos =- 3; ++ if (f_pos == 0) ++ goto finish; ++ ++ for (i = 0; i < i_count; i++) { ++ if (msblk->swap) { ++ struct squashfs_dir_index sindex; ++ squashfs_get_cached_block(s, (char *) &sindex, ++ index_start, index_offset, ++ sizeof(sindex), &index_start, ++ &index_offset); ++ SQUASHFS_SWAP_DIR_INDEX(&index, &sindex); ++ } else ++ squashfs_get_cached_block(s, (char *) &index, ++ index_start, index_offset, ++ sizeof(index), &index_start, ++ &index_offset); ++ ++ if (index.index > f_pos) ++ break; ++ ++ squashfs_get_cached_block(s, NULL, index_start, index_offset, ++ index.size + 1, &index_start, ++ &index_offset); ++ ++ length = index.index; ++ *next_block = index.start_block + sblk->directory_table_start; ++ } ++ ++ *next_offset = (length + *next_offset) % SQUASHFS_METADATA_SIZE; ++ ++finish: ++ return length + 3; ++} ++ ++ ++static int get_dir_index_using_name(struct super_block *s, long long ++ *next_block, unsigned int *next_offset, ++ long long index_start, ++ unsigned int index_offset, int i_count, ++ const char *name, int size) ++{ ++ struct squashfs_sb_info *msblk = s->s_fs_info; ++ struct squashfs_super_block *sblk = &msblk->sblk; ++ int i, length = 0; ++ struct squashfs_dir_index *index; ++ char *str; ++ ++ TRACE("Entered get_dir_index_using_name, i_count %d\n", i_count); ++ ++ if (!(str = kmalloc(sizeof(struct squashfs_dir_index) + ++ (SQUASHFS_NAME_LEN + 1) * 2, GFP_KERNEL))) { ++ ERROR("Failed to allocate squashfs_dir_index\n"); ++ goto failure; ++ } ++ ++ index = (struct squashfs_dir_index *) (str + SQUASHFS_NAME_LEN + 1); ++ strncpy(str, name, size); ++ str[size] = '\0'; ++ ++ for (i = 0; i < i_count; i++) { ++ if (msblk->swap) { ++ struct squashfs_dir_index sindex; ++ squashfs_get_cached_block(s, (char *) &sindex, ++ index_start, index_offset, ++ sizeof(sindex), &index_start, ++ &index_offset); ++ SQUASHFS_SWAP_DIR_INDEX(index, &sindex); ++ } else ++ squashfs_get_cached_block(s, (char *) index, ++ index_start, index_offset, ++ sizeof(struct squashfs_dir_index), ++ &index_start, &index_offset); ++ ++ squashfs_get_cached_block(s, index->name, index_start, ++ index_offset, index->size + 1, ++ &index_start, &index_offset); ++ ++ index->name[index->size + 1] = '\0'; ++ ++ if (strcmp(index->name, str) > 0) ++ break; ++ ++ length = index->index; ++ *next_block = index->start_block + sblk->directory_table_start; ++ } ++ ++ *next_offset = (length + *next_offset) % SQUASHFS_METADATA_SIZE; ++ kfree(str); ++failure: ++ return length + 3; ++} ++ ++ ++static int squashfs_readdir(struct file *file, void *dirent, filldir_t filldir) ++{ ++ struct inode *i = file->f_dentry->d_inode; ++ struct squashfs_sb_info *msblk = i->i_sb->s_fs_info; ++ struct squashfs_super_block *sblk = &msblk->sblk; ++ long long next_block = SQUASHFS_I(i)->start_block + ++ sblk->directory_table_start; ++ int next_offset = SQUASHFS_I(i)->offset, length = 0, ++ dir_count; ++ struct squashfs_dir_header dirh; ++ struct squashfs_dir_entry *dire; ++ ++ TRACE("Entered squashfs_readdir [%llx:%x]\n", next_block, next_offset); ++ ++ if (!(dire = kmalloc(sizeof(struct squashfs_dir_entry) + ++ SQUASHFS_NAME_LEN + 1, GFP_KERNEL))) { ++ ERROR("Failed to allocate squashfs_dir_entry\n"); ++ goto finish; ++ } ++ ++ while(file->f_pos < 3) { ++ char *name; ++ int size, i_ino; ++ ++ if(file->f_pos == 0) { ++ name = "."; ++ size = 1; ++ i_ino = i->i_ino; ++ } else { ++ name = ".."; ++ size = 2; ++ i_ino = SQUASHFS_I(i)->u.s2.parent_inode; ++ } ++ TRACE("Calling filldir(%x, %s, %d, %d, %d, %d)\n", ++ (unsigned int) dirent, name, size, (int) ++ file->f_pos, i_ino, ++ squashfs_filetype_table[1]); ++ ++ if (filldir(dirent, name, size, ++ file->f_pos, i_ino, ++ squashfs_filetype_table[1]) < 0) { ++ TRACE("Filldir returned less than 0\n"); ++ goto finish; ++ } ++ file->f_pos += size; ++ } ++ ++ length = get_dir_index_using_offset(i->i_sb, &next_block, &next_offset, ++ SQUASHFS_I(i)->u.s2.directory_index_start, ++ SQUASHFS_I(i)->u.s2.directory_index_offset, ++ SQUASHFS_I(i)->u.s2.directory_index_count, ++ file->f_pos); ++ ++ while (length < i_size_read(i)) { ++ /* read directory header */ ++ if (msblk->swap) { ++ struct squashfs_dir_header sdirh; ++ ++ if (!squashfs_get_cached_block(i->i_sb, (char *) &sdirh, ++ next_block, next_offset, sizeof(sdirh), ++ &next_block, &next_offset)) ++ goto failed_read; ++ ++ length += sizeof(sdirh); ++ SQUASHFS_SWAP_DIR_HEADER(&dirh, &sdirh); ++ } else { ++ if (!squashfs_get_cached_block(i->i_sb, (char *) &dirh, ++ next_block, next_offset, sizeof(dirh), ++ &next_block, &next_offset)) ++ goto failed_read; ++ ++ length += sizeof(dirh); ++ } ++ ++ dir_count = dirh.count + 1; ++ while (dir_count--) { ++ if (msblk->swap) { ++ struct squashfs_dir_entry sdire; ++ if (!squashfs_get_cached_block(i->i_sb, (char *) ++ &sdire, next_block, next_offset, ++ sizeof(sdire), &next_block, ++ &next_offset)) ++ goto failed_read; ++ ++ length += sizeof(sdire); ++ SQUASHFS_SWAP_DIR_ENTRY(dire, &sdire); ++ } else { ++ if (!squashfs_get_cached_block(i->i_sb, (char *) ++ dire, next_block, next_offset, ++ sizeof(*dire), &next_block, ++ &next_offset)) ++ goto failed_read; ++ ++ length += sizeof(*dire); ++ } ++ ++ if (!squashfs_get_cached_block(i->i_sb, dire->name, ++ next_block, next_offset, ++ dire->size + 1, &next_block, ++ &next_offset)) ++ goto failed_read; ++ ++ length += dire->size + 1; ++ ++ if (file->f_pos >= length) ++ continue; ++ ++ dire->name[dire->size + 1] = '\0'; ++ ++ TRACE("Calling filldir(%x, %s, %d, %d, %x:%x, %d, %d)\n", ++ (unsigned int) dirent, dire->name, ++ dire->size + 1, (int) file->f_pos, ++ dirh.start_block, dire->offset, ++ dirh.inode_number + dire->inode_number, ++ squashfs_filetype_table[dire->type]); ++ ++ if (filldir(dirent, dire->name, dire->size + 1, ++ file->f_pos, ++ dirh.inode_number + dire->inode_number, ++ squashfs_filetype_table[dire->type]) ++ < 0) { ++ TRACE("Filldir returned less than 0\n"); ++ goto finish; ++ } ++ file->f_pos = length; ++ } ++ } ++ ++finish: ++ kfree(dire); ++ return 0; ++ ++failed_read: ++ ERROR("Unable to read directory block [%llx:%x]\n", next_block, ++ next_offset); ++ return 0; ++} ++ ++ ++static struct dentry *squashfs_lookup(struct inode *i, struct dentry *dentry, ++ struct nameidata *nd) ++{ ++ const unsigned char *name = dentry->d_name.name; ++ int len = dentry->d_name.len; ++ struct inode *inode = NULL; ++ struct squashfs_sb_info *msblk = i->i_sb->s_fs_info; ++ struct squashfs_super_block *sblk = &msblk->sblk; ++ long long next_block = SQUASHFS_I(i)->start_block + ++ sblk->directory_table_start; ++ int next_offset = SQUASHFS_I(i)->offset, length = 0, ++ dir_count; ++ struct squashfs_dir_header dirh; ++ struct squashfs_dir_entry *dire; ++ ++ TRACE("Entered squashfs_lookup [%llx:%x]\n", next_block, next_offset); ++ ++ if (!(dire = kmalloc(sizeof(struct squashfs_dir_entry) + ++ SQUASHFS_NAME_LEN + 1, GFP_KERNEL))) { ++ ERROR("Failed to allocate squashfs_dir_entry\n"); ++ goto exit_loop; ++ } ++ ++ if (len > SQUASHFS_NAME_LEN) ++ goto exit_loop; ++ ++ length = get_dir_index_using_name(i->i_sb, &next_block, &next_offset, ++ SQUASHFS_I(i)->u.s2.directory_index_start, ++ SQUASHFS_I(i)->u.s2.directory_index_offset, ++ SQUASHFS_I(i)->u.s2.directory_index_count, name, ++ len); ++ ++ while (length < i_size_read(i)) { ++ /* read directory header */ ++ if (msblk->swap) { ++ struct squashfs_dir_header sdirh; ++ if (!squashfs_get_cached_block(i->i_sb, (char *) &sdirh, ++ next_block, next_offset, sizeof(sdirh), ++ &next_block, &next_offset)) ++ goto failed_read; ++ ++ length += sizeof(sdirh); ++ SQUASHFS_SWAP_DIR_HEADER(&dirh, &sdirh); ++ } else { ++ if (!squashfs_get_cached_block(i->i_sb, (char *) &dirh, ++ next_block, next_offset, sizeof(dirh), ++ &next_block, &next_offset)) ++ goto failed_read; ++ ++ length += sizeof(dirh); ++ } ++ ++ dir_count = dirh.count + 1; ++ while (dir_count--) { ++ if (msblk->swap) { ++ struct squashfs_dir_entry sdire; ++ if (!squashfs_get_cached_block(i->i_sb, (char *) ++ &sdire, next_block,next_offset, ++ sizeof(sdire), &next_block, ++ &next_offset)) ++ goto failed_read; ++ ++ length += sizeof(sdire); ++ SQUASHFS_SWAP_DIR_ENTRY(dire, &sdire); ++ } else { ++ if (!squashfs_get_cached_block(i->i_sb, (char *) ++ dire, next_block,next_offset, ++ sizeof(*dire), &next_block, ++ &next_offset)) ++ goto failed_read; ++ ++ length += sizeof(*dire); ++ } ++ ++ if (!squashfs_get_cached_block(i->i_sb, dire->name, ++ next_block, next_offset, dire->size + 1, ++ &next_block, &next_offset)) ++ goto failed_read; ++ ++ length += dire->size + 1; ++ ++ if (name[0] < dire->name[0]) ++ goto exit_loop; ++ ++ if ((len == dire->size + 1) && !strncmp(name, ++ dire->name, len)) { ++ squashfs_inode_t ino = ++ SQUASHFS_MKINODE(dirh.start_block, ++ dire->offset); ++ ++ TRACE("calling squashfs_iget for directory " ++ "entry %s, inode %x:%x, %d\n", name, ++ dirh.start_block, dire->offset, ++ dirh.inode_number + dire->inode_number); ++ ++ inode = (msblk->iget)(i->i_sb, ino); ++ ++ goto exit_loop; ++ } ++ } ++ } ++ ++exit_loop: ++ kfree(dire); ++ d_add(dentry, inode); ++ return ERR_PTR(0); ++ ++failed_read: ++ ERROR("Unable to read directory block [%llx:%x]\n", next_block, ++ next_offset); ++ goto exit_loop; ++} ++ ++ ++static void squashfs_put_super(struct super_block *s) ++{ ++ int i; ++ ++ if (s->s_fs_info) { ++ struct squashfs_sb_info *sbi = s->s_fs_info; ++ if (sbi->block_cache) ++ for (i = 0; i < SQUASHFS_CACHED_BLKS; i++) ++ if (sbi->block_cache[i].block != ++ SQUASHFS_INVALID_BLK) ++ kfree(sbi->block_cache[i].data); ++ if (sbi->fragment) ++ for (i = 0; i < SQUASHFS_CACHED_FRAGMENTS; i++) ++ SQUASHFS_FREE(sbi->fragment[i].data); ++ kfree(sbi->fragment); ++ kfree(sbi->block_cache); ++ kfree(sbi->read_data); ++ kfree(sbi->read_page); ++ kfree(sbi->uid); ++ kfree(sbi->fragment_index); ++ kfree(sbi->fragment_index_2); ++ kfree(sbi->meta_index); ++ vfree(sbi->stream.workspace); ++ kfree(s->s_fs_info); ++ s->s_fs_info = NULL; ++ } ++} ++ ++ ++static int squashfs_get_sb(struct file_system_type *fs_type, int flags, ++ const char *dev_name, void *data, ++ struct vfsmount *mnt) ++{ ++ return get_sb_bdev(fs_type, flags, dev_name, data, squashfs_fill_super, ++ mnt); ++} ++ ++ ++static int __init init_squashfs_fs(void) ++{ ++ int err = init_inodecache(); ++ if (err) ++ goto out; ++ ++ printk(KERN_INFO "squashfs: version 3.1 (2006/08/19) " ++ "Phillip Lougher\n"); ++ ++ if ((err = register_filesystem(&squashfs_fs_type))) ++ destroy_inodecache(); ++ ++out: ++ return err; ++} ++ ++ ++static void __exit exit_squashfs_fs(void) ++{ ++ unregister_filesystem(&squashfs_fs_type); ++ destroy_inodecache(); ++} ++ ++ ++static kmem_cache_t * squashfs_inode_cachep; ++ ++ ++static struct inode *squashfs_alloc_inode(struct super_block *sb) ++{ ++ struct squashfs_inode_info *ei; ++ ei = kmem_cache_alloc(squashfs_inode_cachep, SLAB_KERNEL); ++ if (!ei) ++ return NULL; ++ return &ei->vfs_inode; ++} ++ ++ ++static void squashfs_destroy_inode(struct inode *inode) ++{ ++ kmem_cache_free(squashfs_inode_cachep, SQUASHFS_I(inode)); ++} ++ ++ ++static void init_once(void * foo, kmem_cache_t * cachep, unsigned long flags) ++{ ++ struct squashfs_inode_info *ei = foo; ++ ++ if ((flags & (SLAB_CTOR_VERIFY|SLAB_CTOR_CONSTRUCTOR)) == ++ SLAB_CTOR_CONSTRUCTOR) ++ inode_init_once(&ei->vfs_inode); ++} ++ ++ ++static int __init init_inodecache(void) ++{ ++ squashfs_inode_cachep = kmem_cache_create("squashfs_inode_cache", ++ sizeof(struct squashfs_inode_info), ++ 0, SLAB_HWCACHE_ALIGN|SLAB_RECLAIM_ACCOUNT, ++ init_once, NULL); ++ if (squashfs_inode_cachep == NULL) ++ return -ENOMEM; ++ return 0; ++} ++ ++ ++static void destroy_inodecache(void) ++{ ++ if (kmem_cache_destroy(squashfs_inode_cachep)) ++ printk(KERN_INFO "squashfs_inode_cache: not all structures " ++ "were freed\n"); ++} ++ ++ ++module_init(init_squashfs_fs); ++module_exit(exit_squashfs_fs); ++MODULE_DESCRIPTION("squashfs 3.1, a compressed read-only filesystem"); ++MODULE_AUTHOR("Phillip Lougher <phillip@lougher.org.uk>"); ++MODULE_LICENSE("GPL"); +diff --new-file -urp linux-2.6.18/fs/squashfs/Makefile linux-2.6.18-squashfs3.1/fs/squashfs/Makefile +--- linux-2.6.18/fs/squashfs/Makefile 1970-01-01 01:00:00.000000000 +0100 ++++ linux-2.6.18-squashfs3.1/fs/squashfs/Makefile 2006-08-21 00:13:12.000000000 +0100 +@@ -0,0 +1,7 @@ ++# ++# Makefile for the linux squashfs routines. ++# ++ ++obj-$(CONFIG_SQUASHFS) += squashfs.o ++squashfs-y += inode.o ++squashfs-y += squashfs2_0.o +diff --new-file -urp linux-2.6.18/fs/squashfs/squashfs2_0.c linux-2.6.18-squashfs3.1/fs/squashfs/squashfs2_0.c +--- linux-2.6.18/fs/squashfs/squashfs2_0.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-2.6.18-squashfs3.1/fs/squashfs/squashfs2_0.c 2006-08-21 00:14:55.000000000 +0100 +@@ -0,0 +1,779 @@ ++/* ++ * Squashfs - a compressed read only filesystem for Linux ++ * ++ * Copyright (c) 2002, 2003, 2004, 2005, 2006 ++ * Phillip Lougher <phillip@lougher.org.uk> ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License ++ * as published by the Free Software Foundation; either version 2, ++ * or (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. ++ * ++ * squashfs2_0.c ++ */ ++ ++#include <linux/types.h> ++#include <linux/squashfs_fs.h> ++#include <linux/module.h> ++#include <linux/errno.h> ++#include <linux/slab.h> ++#include <linux/zlib.h> ++#include <linux/fs.h> ++#include <linux/smp_lock.h> ++#include <linux/slab.h> ++#include <linux/squashfs_fs_sb.h> ++#include <linux/squashfs_fs_i.h> ++#include <linux/buffer_head.h> ++#include <linux/vfs.h> ++#include <linux/init.h> ++#include <linux/dcache.h> ++#include <linux/wait.h> ++#include <linux/zlib.h> ++#include <linux/blkdev.h> ++#include <linux/vmalloc.h> ++#include <asm/uaccess.h> ++#include <asm/semaphore.h> ++ ++#include "squashfs.h" ++static int squashfs_readdir_2(struct file *file, void *dirent, filldir_t filldir); ++static struct dentry *squashfs_lookup_2(struct inode *, struct dentry *, ++ struct nameidata *); ++ ++static struct file_operations squashfs_dir_ops_2 = { ++ .read = generic_read_dir, ++ .readdir = squashfs_readdir_2 ++}; ++ ++static struct inode_operations squashfs_dir_inode_ops_2 = { ++ .lookup = squashfs_lookup_2 ++}; ++ ++static unsigned char squashfs_filetype_table[] = { ++ DT_UNKNOWN, DT_DIR, DT_REG, DT_LNK, DT_BLK, DT_CHR, DT_FIFO, DT_SOCK ++}; ++ ++static int read_fragment_index_table_2(struct super_block *s) ++{ ++ struct squashfs_sb_info *msblk = s->s_fs_info; ++ struct squashfs_super_block *sblk = &msblk->sblk; ++ ++ if (!(msblk->fragment_index_2 = kmalloc(SQUASHFS_FRAGMENT_INDEX_BYTES_2 ++ (sblk->fragments), GFP_KERNEL))) { ++ ERROR("Failed to allocate uid/gid table\n"); ++ return 0; ++ } ++ ++ if (SQUASHFS_FRAGMENT_INDEX_BYTES_2(sblk->fragments) && ++ !squashfs_read_data(s, (char *) ++ msblk->fragment_index_2, ++ sblk->fragment_table_start, ++ SQUASHFS_FRAGMENT_INDEX_BYTES_2 ++ (sblk->fragments) | ++ SQUASHFS_COMPRESSED_BIT_BLOCK, NULL)) { ++ ERROR("unable to read fragment index table\n"); ++ return 0; ++ } ++ ++ if (msblk->swap) { ++ int i; ++ unsigned int fragment; ++ ++ for (i = 0; i < SQUASHFS_FRAGMENT_INDEXES_2(sblk->fragments); ++ i++) { ++ SQUASHFS_SWAP_FRAGMENT_INDEXES_2((&fragment), ++ &msblk->fragment_index_2[i], 1); ++ msblk->fragment_index_2[i] = fragment; ++ } ++ } ++ ++ return 1; ++} ++ ++ ++static int get_fragment_location_2(struct super_block *s, unsigned int fragment, ++ long long *fragment_start_block, ++ unsigned int *fragment_size) ++{ ++ struct squashfs_sb_info *msblk = s->s_fs_info; ++ long long start_block = ++ msblk->fragment_index_2[SQUASHFS_FRAGMENT_INDEX_2(fragment)]; ++ int offset = SQUASHFS_FRAGMENT_INDEX_OFFSET_2(fragment); ++ struct squashfs_fragment_entry_2 fragment_entry; ++ ++ if (msblk->swap) { ++ struct squashfs_fragment_entry_2 sfragment_entry; ++ ++ if (!squashfs_get_cached_block(s, (char *) &sfragment_entry, ++ start_block, offset, ++ sizeof(sfragment_entry), &start_block, ++ &offset)) ++ goto out; ++ SQUASHFS_SWAP_FRAGMENT_ENTRY_2(&fragment_entry, &sfragment_entry); ++ } else ++ if (!squashfs_get_cached_block(s, (char *) &fragment_entry, ++ start_block, offset, ++ sizeof(fragment_entry), &start_block, ++ &offset)) ++ goto out; ++ ++ *fragment_start_block = fragment_entry.start_block; ++ *fragment_size = fragment_entry.size; ++ ++ return 1; ++ ++out: ++ return 0; ++} ++ ++ ++static struct inode *squashfs_new_inode(struct super_block *s, ++ struct squashfs_base_inode_header_2 *inodeb, unsigned int ino) ++{ ++ struct squashfs_sb_info *msblk = s->s_fs_info; ++ struct squashfs_super_block *sblk = &msblk->sblk; ++ struct inode *i = new_inode(s); ++ ++ if (i) { ++ i->i_ino = ino; ++ i->i_mtime.tv_sec = sblk->mkfs_time; ++ i->i_atime.tv_sec = sblk->mkfs_time; ++ i->i_ctime.tv_sec = sblk->mkfs_time; ++ i->i_uid = msblk->uid[inodeb->uid]; ++ i->i_mode = inodeb->mode; ++ i->i_nlink = 1; ++ i->i_size = 0; ++ if (inodeb->guid == SQUASHFS_GUIDS) ++ i->i_gid = i->i_uid; ++ else ++ i->i_gid = msblk->guid[inodeb->guid]; ++ } ++ ++ return i; ++} ++ ++ ++static struct inode *squashfs_iget_2(struct super_block *s, squashfs_inode_t inode) ++{ ++ struct inode *i; ++ struct squashfs_sb_info *msblk = s->s_fs_info; ++ struct squashfs_super_block *sblk = &msblk->sblk; ++ unsigned int block = SQUASHFS_INODE_BLK(inode) + ++ sblk->inode_table_start; ++ unsigned int offset = SQUASHFS_INODE_OFFSET(inode); ++ unsigned int ino = SQUASHFS_MK_VFS_INODE(block ++ - sblk->inode_table_start, offset); ++ long long next_block; ++ unsigned int next_offset; ++ union squashfs_inode_header_2 id, sid; ++ struct squashfs_base_inode_header_2 *inodeb = &id.base, ++ *sinodeb = &sid.base; ++ ++ TRACE("Entered squashfs_iget\n"); ++ ++ if (msblk->swap) { ++ if (!squashfs_get_cached_block(s, (char *) sinodeb, block, ++ offset, sizeof(*sinodeb), &next_block, ++ &next_offset)) ++ goto failed_read; ++ SQUASHFS_SWAP_BASE_INODE_HEADER_2(inodeb, sinodeb, ++ sizeof(*sinodeb)); ++ } else ++ if (!squashfs_get_cached_block(s, (char *) inodeb, block, ++ offset, sizeof(*inodeb), &next_block, ++ &next_offset)) ++ goto failed_read; ++ ++ switch(inodeb->inode_type) { ++ case SQUASHFS_FILE_TYPE: { ++ struct squashfs_reg_inode_header_2 *inodep = &id.reg; ++ struct squashfs_reg_inode_header_2 *sinodep = &sid.reg; ++ long long frag_blk; ++ unsigned int frag_size; ++ ++ if (msblk->swap) { ++ if (!squashfs_get_cached_block(s, (char *) ++ sinodep, block, offset, ++ sizeof(*sinodep), &next_block, ++ &next_offset)) ++ goto failed_read; ++ SQUASHFS_SWAP_REG_INODE_HEADER_2(inodep, sinodep); ++ } else ++ if (!squashfs_get_cached_block(s, (char *) ++ inodep, block, offset, ++ sizeof(*inodep), &next_block, ++ &next_offset)) ++ goto failed_read; ++ ++ frag_blk = SQUASHFS_INVALID_BLK; ++ if (inodep->fragment != SQUASHFS_INVALID_FRAG && ++ !get_fragment_location_2(s, ++ inodep->fragment, &frag_blk, &frag_size)) ++ goto failed_read; ++ ++ if((i = squashfs_new_inode(s, inodeb, ino)) == NULL) ++ goto failed_read1; ++ ++ i->i_size = inodep->file_size; ++ i->i_fop = &generic_ro_fops; ++ i->i_mode |= S_IFREG; ++ i->i_mtime.tv_sec = inodep->mtime; ++ i->i_atime.tv_sec = inodep->mtime; ++ i->i_ctime.tv_sec = inodep->mtime; ++ i->i_blocks = ((i->i_size - 1) >> 9) + 1; ++ i->i_blksize = PAGE_CACHE_SIZE; ++ SQUASHFS_I(i)->u.s1.fragment_start_block = frag_blk; ++ SQUASHFS_I(i)->u.s1.fragment_size = frag_size; ++ SQUASHFS_I(i)->u.s1.fragment_offset = inodep->offset; ++ SQUASHFS_I(i)->start_block = inodep->start_block; ++ SQUASHFS_I(i)->u.s1.block_list_start = next_block; ++ SQUASHFS_I(i)->offset = next_offset; ++ if (sblk->block_size > 4096) ++ i->i_data.a_ops = &squashfs_aops; ++ else ++ i->i_data.a_ops = &squashfs_aops_4K; ++ ++ TRACE("File inode %x:%x, start_block %x, " ++ "block_list_start %llx, offset %x\n", ++ SQUASHFS_INODE_BLK(inode), offset, ++ inodep->start_block, next_block, ++ next_offset); ++ break; ++ } ++ case SQUASHFS_DIR_TYPE: { ++ struct squashfs_dir_inode_header_2 *inodep = &id.dir; ++ struct squashfs_dir_inode_header_2 *sinodep = &sid.dir; ++ ++ if (msblk->swap) { ++ if (!squashfs_get_cached_block(s, (char *) ++ sinodep, block, offset, ++ sizeof(*sinodep), &next_block, ++ &next_offset)) ++ goto failed_read; ++ SQUASHFS_SWAP_DIR_INODE_HEADER_2(inodep, sinodep); ++ } else ++ if (!squashfs_get_cached_block(s, (char *) ++ inodep, block, offset, ++ sizeof(*inodep), &next_block, ++ &next_offset)) ++ goto failed_read; ++ ++ if((i = squashfs_new_inode(s, inodeb, ino)) == NULL) ++ goto failed_read1; ++ ++ i->i_size = inodep->file_size; ++ i->i_op = &squashfs_dir_inode_ops_2; ++ i->i_fop = &squashfs_dir_ops_2; ++ i->i_mode |= S_IFDIR; ++ i->i_mtime.tv_sec = inodep->mtime; ++ i->i_atime.tv_sec = inodep->mtime; ++ i->i_ctime.tv_sec = inodep->mtime; ++ SQUASHFS_I(i)->start_block = inodep->start_block; ++ SQUASHFS_I(i)->offset = inodep->offset; ++ SQUASHFS_I(i)->u.s2.directory_index_count = 0; ++ SQUASHFS_I(i)->u.s2.parent_inode = 0; ++ ++ TRACE("Directory inode %x:%x, start_block %x, offset " ++ "%x\n", SQUASHFS_INODE_BLK(inode), ++ offset, inodep->start_block, ++ inodep->offset); ++ break; ++ } ++ case SQUASHFS_LDIR_TYPE: { ++ struct squashfs_ldir_inode_header_2 *inodep = &id.ldir; ++ struct squashfs_ldir_inode_header_2 *sinodep = &sid.ldir; ++ ++ if (msblk->swap) { ++ if (!squashfs_get_cached_block(s, (char *) ++ sinodep, block, offset, ++ sizeof(*sinodep), &next_block, ++ &next_offset)) ++ goto failed_read; ++ SQUASHFS_SWAP_LDIR_INODE_HEADER_2(inodep, ++ sinodep); ++ } else ++ if (!squashfs_get_cached_block(s, (char *) ++ inodep, block, offset, ++ sizeof(*inodep), &next_block, ++ &next_offset)) ++ goto failed_read; ++ ++ if((i = squashfs_new_inode(s, inodeb, ino)) == NULL) ++ goto failed_read1; ++ ++ i->i_size = inodep->file_size; ++ i->i_op = &squashfs_dir_inode_ops_2; ++ i->i_fop = &squashfs_dir_ops_2; ++ i->i_mode |= S_IFDIR; ++ i->i_mtime.tv_sec = inodep->mtime; ++ i->i_atime.tv_sec = inodep->mtime; ++ i->i_ctime.tv_sec = inodep->mtime; ++ SQUASHFS_I(i)->start_block = inodep->start_block; ++ SQUASHFS_I(i)->offset = inodep->offset; ++ SQUASHFS_I(i)->u.s2.directory_index_start = next_block; ++ SQUASHFS_I(i)->u.s2.directory_index_offset = ++ next_offset; ++ SQUASHFS_I(i)->u.s2.directory_index_count = ++ inodep->i_count; ++ SQUASHFS_I(i)->u.s2.parent_inode = 0; ++ ++ TRACE("Long directory inode %x:%x, start_block %x, " ++ "offset %x\n", ++ SQUASHFS_INODE_BLK(inode), offset, ++ inodep->start_block, inodep->offset); ++ break; ++ } ++ case SQUASHFS_SYMLINK_TYPE: { ++ struct squashfs_symlink_inode_header_2 *inodep = ++ &id.symlink; ++ struct squashfs_symlink_inode_header_2 *sinodep = ++ &sid.symlink; ++ ++ if (msblk->swap) { ++ if (!squashfs_get_cached_block(s, (char *) ++ sinodep, block, offset, ++ sizeof(*sinodep), &next_block, ++ &next_offset)) ++ goto failed_read; ++ SQUASHFS_SWAP_SYMLINK_INODE_HEADER_2(inodep, ++ sinodep); ++ } else ++ if (!squashfs_get_cached_block(s, (char *) ++ inodep, block, offset, ++ sizeof(*inodep), &next_block, ++ &next_offset)) ++ goto failed_read; ++ ++ if((i = squashfs_new_inode(s, inodeb, ino)) == NULL) ++ goto failed_read1; ++ ++ i->i_size = inodep->symlink_size; ++ i->i_op = &page_symlink_inode_operations; ++ i->i_data.a_ops = &squashfs_symlink_aops; ++ i->i_mode |= S_IFLNK; ++ SQUASHFS_I(i)->start_block = next_block; ++ SQUASHFS_I(i)->offset = next_offset; ++ ++ TRACE("Symbolic link inode %x:%x, start_block %llx, " ++ "offset %x\n", ++ SQUASHFS_INODE_BLK(inode), offset, ++ next_block, next_offset); ++ break; ++ } ++ case SQUASHFS_BLKDEV_TYPE: ++ case SQUASHFS_CHRDEV_TYPE: { ++ struct squashfs_dev_inode_header_2 *inodep = &id.dev; ++ struct squashfs_dev_inode_header_2 *sinodep = &sid.dev; ++ ++ if (msblk->swap) { ++ if (!squashfs_get_cached_block(s, (char *) ++ sinodep, block, offset, ++ sizeof(*sinodep), &next_block, ++ &next_offset)) ++ goto failed_read; ++ SQUASHFS_SWAP_DEV_INODE_HEADER_2(inodep, sinodep); ++ } else ++ if (!squashfs_get_cached_block(s, (char *) ++ inodep, block, offset, ++ sizeof(*inodep), &next_block, ++ &next_offset)) ++ goto failed_read; ++ ++ if ((i = squashfs_new_inode(s, inodeb, ino)) == NULL) ++ goto failed_read1; ++ ++ i->i_mode |= (inodeb->inode_type == ++ SQUASHFS_CHRDEV_TYPE) ? S_IFCHR : ++ S_IFBLK; ++ init_special_inode(i, i->i_mode, ++ old_decode_dev(inodep->rdev)); ++ ++ TRACE("Device inode %x:%x, rdev %x\n", ++ SQUASHFS_INODE_BLK(inode), offset, ++ inodep->rdev); ++ break; ++ } ++ case SQUASHFS_FIFO_TYPE: ++ case SQUASHFS_SOCKET_TYPE: { ++ if ((i = squashfs_new_inode(s, inodeb, ino)) == NULL) ++ goto failed_read1; ++ ++ i->i_mode |= (inodeb->inode_type == SQUASHFS_FIFO_TYPE) ++ ? S_IFIFO : S_IFSOCK; ++ init_special_inode(i, i->i_mode, 0); ++ break; ++ } ++ default: ++ ERROR("Unknown inode type %d in squashfs_iget!\n", ++ inodeb->inode_type); ++ goto failed_read1; ++ } ++ ++ insert_inode_hash(i); ++ return i; ++ ++failed_read: ++ ERROR("Unable to read inode [%x:%x]\n", block, offset); ++ ++failed_read1: ++ return NULL; ++} ++ ++ ++static int get_dir_index_using_offset(struct super_block *s, long long ++ *next_block, unsigned int *next_offset, ++ long long index_start, ++ unsigned int index_offset, int i_count, ++ long long f_pos) ++{ ++ struct squashfs_sb_info *msblk = s->s_fs_info; ++ struct squashfs_super_block *sblk = &msblk->sblk; ++ int i, length = 0; ++ struct squashfs_dir_index_2 index; ++ ++ TRACE("Entered get_dir_index_using_offset, i_count %d, f_pos %d\n", ++ i_count, (unsigned int) f_pos); ++ ++ if (f_pos == 0) ++ goto finish; ++ ++ for (i = 0; i < i_count; i++) { ++ if (msblk->swap) { ++ struct squashfs_dir_index_2 sindex; ++ squashfs_get_cached_block(s, (char *) &sindex, ++ index_start, index_offset, ++ sizeof(sindex), &index_start, ++ &index_offset); ++ SQUASHFS_SWAP_DIR_INDEX_2(&index, &sindex); ++ } else ++ squashfs_get_cached_block(s, (char *) &index, ++ index_start, index_offset, ++ sizeof(index), &index_start, ++ &index_offset); ++ ++ if (index.index > f_pos) ++ break; ++ ++ squashfs_get_cached_block(s, NULL, index_start, index_offset, ++ index.size + 1, &index_start, ++ &index_offset); ++ ++ length = index.index; ++ *next_block = index.start_block + sblk->directory_table_start; ++ } ++ ++ *next_offset = (length + *next_offset) % SQUASHFS_METADATA_SIZE; ++ ++finish: ++ return length; ++} ++ ++ ++static int get_dir_index_using_name(struct super_block *s, long long ++ *next_block, unsigned int *next_offset, ++ long long index_start, ++ unsigned int index_offset, int i_count, ++ const char *name, int size) ++{ ++ struct squashfs_sb_info *msblk = s->s_fs_info; ++ struct squashfs_super_block *sblk = &msblk->sblk; ++ int i, length = 0; ++ struct squashfs_dir_index_2 *index; ++ char *str; ++ ++ TRACE("Entered get_dir_index_using_name, i_count %d\n", i_count); ++ ++ if (!(str = kmalloc(sizeof(struct squashfs_dir_index) + ++ (SQUASHFS_NAME_LEN + 1) * 2, GFP_KERNEL))) { ++ ERROR("Failed to allocate squashfs_dir_index\n"); ++ goto failure; ++ } ++ ++ index = (struct squashfs_dir_index_2 *) (str + SQUASHFS_NAME_LEN + 1); ++ strncpy(str, name, size); ++ str[size] = '\0'; ++ ++ for (i = 0; i < i_count; i++) { ++ if (msblk->swap) { ++ struct squashfs_dir_index_2 sindex; ++ squashfs_get_cached_block(s, (char *) &sindex, ++ index_start, index_offset, ++ sizeof(sindex), &index_start, ++ &index_offset); ++ SQUASHFS_SWAP_DIR_INDEX_2(index, &sindex); ++ } else ++ squashfs_get_cached_block(s, (char *) index, ++ index_start, index_offset, ++ sizeof(struct squashfs_dir_index_2), ++ &index_start, &index_offset); ++ ++ squashfs_get_cached_block(s, index->name, index_start, ++ index_offset, index->size + 1, ++ &index_start, &index_offset); ++ ++ index->name[index->size + 1] = '\0'; ++ ++ if (strcmp(index->name, str) > 0) ++ break; ++ ++ length = index->index; ++ *next_block = index->start_block + sblk->directory_table_start; ++ } ++ ++ *next_offset = (length + *next_offset) % SQUASHFS_METADATA_SIZE; ++ kfree(str); ++failure: ++ return length; ++} ++ ++ ++static int squashfs_readdir_2(struct file *file, void *dirent, filldir_t filldir) ++{ ++ struct inode *i = file->f_dentry->d_inode; ++ struct squashfs_sb_info *msblk = i->i_sb->s_fs_info; ++ struct squashfs_super_block *sblk = &msblk->sblk; ++ long long next_block = SQUASHFS_I(i)->start_block + ++ sblk->directory_table_start; ++ int next_offset = SQUASHFS_I(i)->offset, length = 0, ++ dir_count; ++ struct squashfs_dir_header_2 dirh; ++ struct squashfs_dir_entry_2 *dire; ++ ++ TRACE("Entered squashfs_readdir_2 [%llx:%x]\n", next_block, next_offset); ++ ++ if (!(dire = kmalloc(sizeof(struct squashfs_dir_entry) + ++ SQUASHFS_NAME_LEN + 1, GFP_KERNEL))) { ++ ERROR("Failed to allocate squashfs_dir_entry\n"); ++ goto finish; ++ } ++ ++ length = get_dir_index_using_offset(i->i_sb, &next_block, &next_offset, ++ SQUASHFS_I(i)->u.s2.directory_index_start, ++ SQUASHFS_I(i)->u.s2.directory_index_offset, ++ SQUASHFS_I(i)->u.s2.directory_index_count, ++ file->f_pos); ++ ++ while (length < i_size_read(i)) { ++ /* read directory header */ ++ if (msblk->swap) { ++ struct squashfs_dir_header_2 sdirh; ++ ++ if (!squashfs_get_cached_block(i->i_sb, (char *) &sdirh, ++ next_block, next_offset, sizeof(sdirh), ++ &next_block, &next_offset)) ++ goto failed_read; ++ ++ length += sizeof(sdirh); ++ SQUASHFS_SWAP_DIR_HEADER_2(&dirh, &sdirh); ++ } else { ++ if (!squashfs_get_cached_block(i->i_sb, (char *) &dirh, ++ next_block, next_offset, sizeof(dirh), ++ &next_block, &next_offset)) ++ goto failed_read; ++ ++ length += sizeof(dirh); ++ } ++ ++ dir_count = dirh.count + 1; ++ while (dir_count--) { ++ if (msblk->swap) { ++ struct squashfs_dir_entry_2 sdire; ++ if (!squashfs_get_cached_block(i->i_sb, (char *) ++ &sdire, next_block, next_offset, ++ sizeof(sdire), &next_block, ++ &next_offset)) ++ goto failed_read; ++ ++ length += sizeof(sdire); ++ SQUASHFS_SWAP_DIR_ENTRY_2(dire, &sdire); ++ } else { ++ if (!squashfs_get_cached_block(i->i_sb, (char *) ++ dire, next_block, next_offset, ++ sizeof(*dire), &next_block, ++ &next_offset)) ++ goto failed_read; ++ ++ length += sizeof(*dire); ++ } ++ ++ if (!squashfs_get_cached_block(i->i_sb, dire->name, ++ next_block, next_offset, ++ dire->size + 1, &next_block, ++ &next_offset)) ++ goto failed_read; ++ ++ length += dire->size + 1; ++ ++ if (file->f_pos >= length) ++ continue; ++ ++ dire->name[dire->size + 1] = '\0'; ++ ++ TRACE("Calling filldir(%x, %s, %d, %d, %x:%x, %d)\n", ++ (unsigned int) dirent, dire->name, ++ dire->size + 1, (int) file->f_pos, ++ dirh.start_block, dire->offset, ++ squashfs_filetype_table[dire->type]); ++ ++ if (filldir(dirent, dire->name, dire->size + 1, ++ file->f_pos, SQUASHFS_MK_VFS_INODE( ++ dirh.start_block, dire->offset), ++ squashfs_filetype_table[dire->type]) ++ < 0) { ++ TRACE("Filldir returned less than 0\n"); ++ goto finish; ++ } ++ file->f_pos = length; ++ } ++ } ++ ++finish: ++ kfree(dire); ++ return 0; ++ ++failed_read: ++ ERROR("Unable to read directory block [%llx:%x]\n", next_block, ++ next_offset); ++ kfree(dire); ++ return 0; ++} ++ ++ ++static struct dentry *squashfs_lookup_2(struct inode *i, struct dentry *dentry, ++ struct nameidata *nd) ++{ ++ const unsigned char *name = dentry->d_name.name; ++ int len = dentry->d_name.len; ++ struct inode *inode = NULL; ++ struct squashfs_sb_info *msblk = i->i_sb->s_fs_info; ++ struct squashfs_super_block *sblk = &msblk->sblk; ++ long long next_block = SQUASHFS_I(i)->start_block + ++ sblk->directory_table_start; ++ int next_offset = SQUASHFS_I(i)->offset, length = 0, ++ dir_count; ++ struct squashfs_dir_header_2 dirh; ++ struct squashfs_dir_entry_2 *dire; ++ int sorted = sblk->s_major == 2 && sblk->s_minor >= 1; ++ ++ TRACE("Entered squashfs_lookup_2 [%llx:%x]\n", next_block, next_offset); ++ ++ if (!(dire = kmalloc(sizeof(struct squashfs_dir_entry) + ++ SQUASHFS_NAME_LEN + 1, GFP_KERNEL))) { ++ ERROR("Failed to allocate squashfs_dir_entry\n"); ++ goto exit_loop; ++ } ++ ++ if (len > SQUASHFS_NAME_LEN) ++ goto exit_loop; ++ ++ length = get_dir_index_using_name(i->i_sb, &next_block, &next_offset, ++ SQUASHFS_I(i)->u.s2.directory_index_start, ++ SQUASHFS_I(i)->u.s2.directory_index_offset, ++ SQUASHFS_I(i)->u.s2.directory_index_count, name, ++ len); ++ ++ while (length < i_size_read(i)) { ++ /* read directory header */ ++ if (msblk->swap) { ++ struct squashfs_dir_header_2 sdirh; ++ if (!squashfs_get_cached_block(i->i_sb, (char *) &sdirh, ++ next_block, next_offset, sizeof(sdirh), ++ &next_block, &next_offset)) ++ goto failed_read; ++ ++ length += sizeof(sdirh); ++ SQUASHFS_SWAP_DIR_HEADER_2(&dirh, &sdirh); ++ } else { ++ if (!squashfs_get_cached_block(i->i_sb, (char *) &dirh, ++ next_block, next_offset, sizeof(dirh), ++ &next_block, &next_offset)) ++ goto failed_read; ++ ++ length += sizeof(dirh); ++ } ++ ++ dir_count = dirh.count + 1; ++ while (dir_count--) { ++ if (msblk->swap) { ++ struct squashfs_dir_entry_2 sdire; ++ if (!squashfs_get_cached_block(i->i_sb, (char *) ++ &sdire, next_block,next_offset, ++ sizeof(sdire), &next_block, ++ &next_offset)) ++ goto failed_read; ++ ++ length += sizeof(sdire); ++ SQUASHFS_SWAP_DIR_ENTRY_2(dire, &sdire); ++ } else { ++ if (!squashfs_get_cached_block(i->i_sb, (char *) ++ dire, next_block,next_offset, ++ sizeof(*dire), &next_block, ++ &next_offset)) ++ goto failed_read; ++ ++ length += sizeof(*dire); ++ } ++ ++ if (!squashfs_get_cached_block(i->i_sb, dire->name, ++ next_block, next_offset, dire->size + 1, ++ &next_block, &next_offset)) ++ goto failed_read; ++ ++ length += dire->size + 1; ++ ++ if (sorted && name[0] < dire->name[0]) ++ goto exit_loop; ++ ++ if ((len == dire->size + 1) && !strncmp(name, ++ dire->name, len)) { ++ squashfs_inode_t ino = ++ SQUASHFS_MKINODE(dirh.start_block, ++ dire->offset); ++ ++ TRACE("calling squashfs_iget for directory " ++ "entry %s, inode %x:%x, %lld\n", name, ++ dirh.start_block, dire->offset, ino); ++ ++ inode = (msblk->iget)(i->i_sb, ino); ++ ++ goto exit_loop; ++ } ++ } ++ } ++ ++exit_loop: ++ kfree(dire); ++ d_add(dentry, inode); ++ return ERR_PTR(0); ++ ++failed_read: ++ ERROR("Unable to read directory block [%llx:%x]\n", next_block, ++ next_offset); ++ goto exit_loop; ++} ++ ++ ++int squashfs_2_0_supported(struct squashfs_sb_info *msblk) ++{ ++ struct squashfs_super_block *sblk = &msblk->sblk; ++ ++ msblk->iget = squashfs_iget_2; ++ msblk->read_fragment_index_table = read_fragment_index_table_2; ++ ++ sblk->bytes_used = sblk->bytes_used_2; ++ sblk->uid_start = sblk->uid_start_2; ++ sblk->guid_start = sblk->guid_start_2; ++ sblk->inode_table_start = sblk->inode_table_start_2; ++ sblk->directory_table_start = sblk->directory_table_start_2; ++ sblk->fragment_table_start = sblk->fragment_table_start_2; ++ ++ return 1; ++} +diff --new-file -urp linux-2.6.18/fs/squashfs/squashfs.h linux-2.6.18-squashfs3.1/fs/squashfs/squashfs.h +--- linux-2.6.18/fs/squashfs/squashfs.h 1970-01-01 01:00:00.000000000 +0100 ++++ linux-2.6.18-squashfs3.1/fs/squashfs/squashfs.h 2006-08-21 00:13:12.000000000 +0100 +@@ -0,0 +1,86 @@ ++/* ++ * Squashfs - a compressed read only filesystem for Linux ++ * ++ * Copyright (c) 2002, 2003, 2004, 2005, 2006 ++ * Phillip Lougher <phillip@lougher.org.uk> ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License ++ * as published by the Free Software Foundation; either version 2, ++ * or (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. ++ * ++ * squashfs.h ++ */ ++ ++#ifdef CONFIG_SQUASHFS_1_0_COMPATIBILITY ++#undef CONFIG_SQUASHFS_1_0_COMPATIBILITY ++#endif ++ ++#ifdef SQUASHFS_TRACE ++#define TRACE(s, args...) printk(KERN_NOTICE "SQUASHFS: "s, ## args) ++#else ++#define TRACE(s, args...) {} ++#endif ++ ++#define ERROR(s, args...) printk(KERN_ERR "SQUASHFS error: "s, ## args) ++ ++#define SERROR(s, args...) do { \ ++ if (!silent) \ ++ printk(KERN_ERR "SQUASHFS error: "s, ## args);\ ++ } while(0) ++ ++#define WARNING(s, args...) printk(KERN_WARNING "SQUASHFS: "s, ## args) ++ ++static inline struct squashfs_inode_info *SQUASHFS_I(struct inode *inode) ++{ ++ return list_entry(inode, struct squashfs_inode_info, vfs_inode); ++} ++ ++#if defined(CONFIG_SQUASHFS_1_0_COMPATIBILITY ) || defined(CONFIG_SQUASHFS_2_0_COMPATIBILITY) ++#define SQSH_EXTERN ++extern unsigned int squashfs_read_data(struct super_block *s, char *buffer, ++ long long index, unsigned int length, ++ long long *next_index); ++extern int squashfs_get_cached_block(struct super_block *s, char *buffer, ++ long long block, unsigned int offset, ++ int length, long long *next_block, ++ unsigned int *next_offset); ++extern void release_cached_fragment(struct squashfs_sb_info *msblk, struct ++ squashfs_fragment_cache *fragment); ++extern struct squashfs_fragment_cache *get_cached_fragment(struct super_block ++ *s, long long start_block, ++ int length); ++extern struct address_space_operations squashfs_symlink_aops; ++extern struct address_space_operations squashfs_aops; ++extern struct address_space_operations squashfs_aops_4K; ++extern struct inode_operations squashfs_dir_inode_ops; ++#else ++#define SQSH_EXTERN static ++#endif ++ ++#ifdef CONFIG_SQUASHFS_1_0_COMPATIBILITY ++extern int squashfs_1_0_supported(struct squashfs_sb_info *msblk); ++#else ++static inline int squashfs_1_0_supported(struct squashfs_sb_info *msblk) ++{ ++ return 0; ++} ++#endif ++ ++#ifdef CONFIG_SQUASHFS_2_0_COMPATIBILITY ++extern int squashfs_2_0_supported(struct squashfs_sb_info *msblk); ++#else ++static inline int squashfs_2_0_supported(struct squashfs_sb_info *msblk) ++{ ++ return 0; ++} ++#endif +diff --new-file -urp linux-2.6.18/include/linux/squashfs_fs.h linux-2.6.18-squashfs3.1/include/linux/squashfs_fs.h +--- linux-2.6.18/include/linux/squashfs_fs.h 1970-01-01 01:00:00.000000000 +0100 ++++ linux-2.6.18-squashfs3.1/include/linux/squashfs_fs.h 2006-08-21 00:13:19.000000000 +0100 +@@ -0,0 +1,911 @@ ++#ifndef SQUASHFS_FS ++#define SQUASHFS_FS ++ ++/* ++ * Squashfs ++ * ++ * Copyright (c) 2002, 2003, 2004, 2005, 2006 ++ * Phillip Lougher <phillip@lougher.org.uk> ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License ++ * as published by the Free Software Foundation; either version 2, ++ * or (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. ++ * ++ * squashfs_fs.h ++ */ ++ ++#ifndef CONFIG_SQUASHFS_2_0_COMPATIBILITY ++#define CONFIG_SQUASHFS_2_0_COMPATIBILITY ++#endif ++ ++#ifdef CONFIG_SQUASHFS_VMALLOC ++#define SQUASHFS_ALLOC(a) vmalloc(a) ++#define SQUASHFS_FREE(a) vfree(a) ++#else ++#define SQUASHFS_ALLOC(a) kmalloc(a, GFP_KERNEL) ++#define SQUASHFS_FREE(a) kfree(a) ++#endif ++#define SQUASHFS_CACHED_FRAGMENTS CONFIG_SQUASHFS_FRAGMENT_CACHE_SIZE ++#define SQUASHFS_MAJOR 3 ++#define SQUASHFS_MINOR 0 ++#define SQUASHFS_MAGIC 0x73717368 ++#define SQUASHFS_MAGIC_SWAP 0x68737173 ++#define SQUASHFS_START 0 ++ ++/* size of metadata (inode and directory) blocks */ ++#define SQUASHFS_METADATA_SIZE 8192 ++#define SQUASHFS_METADATA_LOG 13 ++ ++/* default size of data blocks */ ++#define SQUASHFS_FILE_SIZE 65536 ++#define SQUASHFS_FILE_LOG 16 ++ ++#define SQUASHFS_FILE_MAX_SIZE 65536 ++ ++/* Max number of uids and gids */ ++#define SQUASHFS_UIDS 256 ++#define SQUASHFS_GUIDS 255 ++ ++/* Max length of filename (not 255) */ ++#define SQUASHFS_NAME_LEN 256 ++ ++#define SQUASHFS_INVALID ((long long) 0xffffffffffff) ++#define SQUASHFS_INVALID_FRAG ((unsigned int) 0xffffffff) ++#define SQUASHFS_INVALID_BLK ((long long) -1) ++#define SQUASHFS_USED_BLK ((long long) -2) ++ ++/* Filesystem flags */ ++#define SQUASHFS_NOI 0 ++#define SQUASHFS_NOD 1 ++#define SQUASHFS_CHECK 2 ++#define SQUASHFS_NOF 3 ++#define SQUASHFS_NO_FRAG 4 ++#define SQUASHFS_ALWAYS_FRAG 5 ++#define SQUASHFS_DUPLICATE 6 ++ ++#define SQUASHFS_BIT(flag, bit) ((flag >> bit) & 1) ++ ++#define SQUASHFS_UNCOMPRESSED_INODES(flags) SQUASHFS_BIT(flags, \ ++ SQUASHFS_NOI) ++ ++#define SQUASHFS_UNCOMPRESSED_DATA(flags) SQUASHFS_BIT(flags, \ ++ SQUASHFS_NOD) ++ ++#define SQUASHFS_UNCOMPRESSED_FRAGMENTS(flags) SQUASHFS_BIT(flags, \ ++ SQUASHFS_NOF) ++ ++#define SQUASHFS_NO_FRAGMENTS(flags) SQUASHFS_BIT(flags, \ ++ SQUASHFS_NO_FRAG) ++ ++#define SQUASHFS_ALWAYS_FRAGMENTS(flags) SQUASHFS_BIT(flags, \ ++ SQUASHFS_ALWAYS_FRAG) ++ ++#define SQUASHFS_DUPLICATES(flags) SQUASHFS_BIT(flags, \ ++ SQUASHFS_DUPLICATE) ++ ++#define SQUASHFS_CHECK_DATA(flags) SQUASHFS_BIT(flags, \ ++ SQUASHFS_CHECK) ++ ++#define SQUASHFS_MKFLAGS(noi, nod, check_data, nof, no_frag, always_frag, \ ++ duplicate_checking) (noi | (nod << 1) | (check_data << 2) \ ++ | (nof << 3) | (no_frag << 4) | (always_frag << 5) | \ ++ (duplicate_checking << 6)) ++ ++/* Max number of types and file types */ ++#define SQUASHFS_DIR_TYPE 1 ++#define SQUASHFS_FILE_TYPE 2 ++#define SQUASHFS_SYMLINK_TYPE 3 ++#define SQUASHFS_BLKDEV_TYPE 4 ++#define SQUASHFS_CHRDEV_TYPE 5 ++#define SQUASHFS_FIFO_TYPE 6 ++#define SQUASHFS_SOCKET_TYPE 7 ++#define SQUASHFS_LDIR_TYPE 8 ++#define SQUASHFS_LREG_TYPE 9 ++ ++/* 1.0 filesystem type definitions */ ++#define SQUASHFS_TYPES 5 ++#define SQUASHFS_IPC_TYPE 0 ++ ++/* Flag whether block is compressed or uncompressed, bit is set if block is ++ * uncompressed */ ++#define SQUASHFS_COMPRESSED_BIT (1 << 15) ++ ++#define SQUASHFS_COMPRESSED_SIZE(B) (((B) & ~SQUASHFS_COMPRESSED_BIT) ? \ ++ (B) & ~SQUASHFS_COMPRESSED_BIT : SQUASHFS_COMPRESSED_BIT) ++ ++#define SQUASHFS_COMPRESSED(B) (!((B) & SQUASHFS_COMPRESSED_BIT)) ++ ++#define SQUASHFS_COMPRESSED_BIT_BLOCK (1 << 24) ++ ++#define SQUASHFS_COMPRESSED_SIZE_BLOCK(B) (((B) & \ ++ ~SQUASHFS_COMPRESSED_BIT_BLOCK) ? (B) & \ ++ ~SQUASHFS_COMPRESSED_BIT_BLOCK : SQUASHFS_COMPRESSED_BIT_BLOCK) ++ ++#define SQUASHFS_COMPRESSED_BLOCK(B) (!((B) & SQUASHFS_COMPRESSED_BIT_BLOCK)) ++ ++/* ++ * Inode number ops. Inodes consist of a compressed block number, and an ++ * uncompressed offset within that block ++ */ ++#define SQUASHFS_INODE_BLK(a) ((unsigned int) ((a) >> 16)) ++ ++#define SQUASHFS_INODE_OFFSET(a) ((unsigned int) ((a) & 0xffff)) ++ ++#define SQUASHFS_MKINODE(A, B) ((squashfs_inode_t)(((squashfs_inode_t) (A)\ ++ << 16) + (B))) ++ ++/* Compute 32 bit VFS inode number from squashfs inode number */ ++#define SQUASHFS_MK_VFS_INODE(a, b) ((unsigned int) (((a) << 8) + \ ++ ((b) >> 2) + 1)) ++/* XXX */ ++ ++/* Translate between VFS mode and squashfs mode */ ++#define SQUASHFS_MODE(a) ((a) & 0xfff) ++ ++/* fragment and fragment table defines */ ++#define SQUASHFS_FRAGMENT_BYTES(A) (A * sizeof(struct squashfs_fragment_entry)) ++ ++#define SQUASHFS_FRAGMENT_INDEX(A) (SQUASHFS_FRAGMENT_BYTES(A) / \ ++ SQUASHFS_METADATA_SIZE) ++ ++#define SQUASHFS_FRAGMENT_INDEX_OFFSET(A) (SQUASHFS_FRAGMENT_BYTES(A) % \ ++ SQUASHFS_METADATA_SIZE) ++ ++#define SQUASHFS_FRAGMENT_INDEXES(A) ((SQUASHFS_FRAGMENT_BYTES(A) + \ ++ SQUASHFS_METADATA_SIZE - 1) / \ ++ SQUASHFS_METADATA_SIZE) ++ ++#define SQUASHFS_FRAGMENT_INDEX_BYTES(A) (SQUASHFS_FRAGMENT_INDEXES(A) *\ ++ sizeof(long long)) ++ ++/* cached data constants for filesystem */ ++#define SQUASHFS_CACHED_BLKS 8 ++ ++#define SQUASHFS_MAX_FILE_SIZE_LOG 64 ++ ++#define SQUASHFS_MAX_FILE_SIZE ((long long) 1 << \ ++ (SQUASHFS_MAX_FILE_SIZE_LOG - 2)) ++ ++#define SQUASHFS_MARKER_BYTE 0xff ++ ++/* meta index cache */ ++#define SQUASHFS_META_INDEXES (SQUASHFS_METADATA_SIZE / sizeof(unsigned int)) ++#define SQUASHFS_META_ENTRIES 31 ++#define SQUASHFS_META_NUMBER 8 ++#define SQUASHFS_SLOTS 4 ++ ++struct meta_entry { ++ long long data_block; ++ unsigned int index_block; ++ unsigned short offset; ++ unsigned short pad; ++}; ++ ++struct meta_index { ++ unsigned int inode_number; ++ unsigned int offset; ++ unsigned short entries; ++ unsigned short skip; ++ unsigned short locked; ++ unsigned short pad; ++ struct meta_entry meta_entry[SQUASHFS_META_ENTRIES]; ++}; ++ ++ ++/* ++ * definitions for structures on disk ++ */ ++ ++typedef long long squashfs_block_t; ++typedef long long squashfs_inode_t; ++ ++struct squashfs_super_block { ++ unsigned int s_magic; ++ unsigned int inodes; ++ unsigned int bytes_used_2; ++ unsigned int uid_start_2; ++ unsigned int guid_start_2; ++ unsigned int inode_table_start_2; ++ unsigned int directory_table_start_2; ++ unsigned int s_major:16; ++ unsigned int s_minor:16; ++ unsigned int block_size_1:16; ++ unsigned int block_log:16; ++ unsigned int flags:8; ++ unsigned int no_uids:8; ++ unsigned int no_guids:8; ++ unsigned int mkfs_time /* time of filesystem creation */; ++ squashfs_inode_t root_inode; ++ unsigned int block_size; ++ unsigned int fragments; ++ unsigned int fragment_table_start_2; ++ long long bytes_used; ++ long long uid_start; ++ long long guid_start; ++ long long inode_table_start; ++ long long directory_table_start; ++ long long fragment_table_start; ++ long long unused; ++} __attribute__ ((packed)); ++ ++struct squashfs_dir_index { ++ unsigned int index; ++ unsigned int start_block; ++ unsigned char size; ++ unsigned char name[0]; ++} __attribute__ ((packed)); ++ ++#define SQUASHFS_BASE_INODE_HEADER \ ++ unsigned int inode_type:4; \ ++ unsigned int mode:12; \ ++ unsigned int uid:8; \ ++ unsigned int guid:8; \ ++ unsigned int mtime; \ ++ unsigned int inode_number; ++ ++struct squashfs_base_inode_header { ++ SQUASHFS_BASE_INODE_HEADER; ++} __attribute__ ((packed)); ++ ++struct squashfs_ipc_inode_header { ++ SQUASHFS_BASE_INODE_HEADER; ++ unsigned int nlink; ++} __attribute__ ((packed)); ++ ++struct squashfs_dev_inode_header { ++ SQUASHFS_BASE_INODE_HEADER; ++ unsigned int nlink; ++ unsigned short rdev; ++} __attribute__ ((packed)); ++ ++struct squashfs_symlink_inode_header { ++ SQUASHFS_BASE_INODE_HEADER; ++ unsigned int nlink; ++ unsigned short symlink_size; ++ char symlink[0]; ++} __attribute__ ((packed)); ++ ++struct squashfs_reg_inode_header { ++ SQUASHFS_BASE_INODE_HEADER; ++ squashfs_block_t start_block; ++ unsigned int fragment; ++ unsigned int offset; ++ unsigned int file_size; ++ unsigned short block_list[0]; ++} __attribute__ ((packed)); ++ ++struct squashfs_lreg_inode_header { ++ SQUASHFS_BASE_INODE_HEADER; ++ unsigned int nlink; ++ squashfs_block_t start_block; ++ unsigned int fragment; ++ unsigned int offset; ++ long long file_size; ++ unsigned short block_list[0]; ++} __attribute__ ((packed)); ++ ++struct squashfs_dir_inode_header { ++ SQUASHFS_BASE_INODE_HEADER; ++ unsigned int nlink; ++ unsigned int file_size:19; ++ unsigned int offset:13; ++ unsigned int start_block; ++ unsigned int parent_inode; ++} __attribute__ ((packed)); ++ ++struct squashfs_ldir_inode_header { ++ SQUASHFS_BASE_INODE_HEADER; ++ unsigned int nlink; ++ unsigned int file_size:27; ++ unsigned int offset:13; ++ unsigned int start_block; ++ unsigned int i_count:16; ++ unsigned int parent_inode; ++ struct squashfs_dir_index index[0]; ++} __attribute__ ((packed)); ++ ++union squashfs_inode_header { ++ struct squashfs_base_inode_header base; ++ struct squashfs_dev_inode_header dev; ++ struct squashfs_symlink_inode_header symlink; ++ struct squashfs_reg_inode_header reg; ++ struct squashfs_lreg_inode_header lreg; ++ struct squashfs_dir_inode_header dir; ++ struct squashfs_ldir_inode_header ldir; ++ struct squashfs_ipc_inode_header ipc; ++}; ++ ++struct squashfs_dir_entry { ++ unsigned int offset:13; ++ unsigned int type:3; ++ unsigned int size:8; ++ int inode_number:16; ++ char name[0]; ++} __attribute__ ((packed)); ++ ++struct squashfs_dir_header { ++ unsigned int count:8; ++ unsigned int start_block; ++ unsigned int inode_number; ++} __attribute__ ((packed)); ++ ++struct squashfs_fragment_entry { ++ long long start_block; ++ unsigned int size; ++ unsigned int unused; ++} __attribute__ ((packed)); ++ ++extern int squashfs_uncompress_block(void *d, int dstlen, void *s, int srclen); ++extern int squashfs_uncompress_init(void); ++extern int squashfs_uncompress_exit(void); ++ ++/* ++ * macros to convert each packed bitfield structure from little endian to big ++ * endian and vice versa. These are needed when creating or using a filesystem ++ * on a machine with different byte ordering to the target architecture. ++ * ++ */ ++ ++#define SQUASHFS_SWAP_START \ ++ int bits;\ ++ int b_pos;\ ++ unsigned long long val;\ ++ unsigned char *s;\ ++ unsigned char *d; ++ ++#define SQUASHFS_SWAP_SUPER_BLOCK(s, d) {\ ++ SQUASHFS_SWAP_START\ ++ SQUASHFS_MEMSET(s, d, sizeof(struct squashfs_super_block));\ ++ SQUASHFS_SWAP((s)->s_magic, d, 0, 32);\ ++ SQUASHFS_SWAP((s)->inodes, d, 32, 32);\ ++ SQUASHFS_SWAP((s)->bytes_used_2, d, 64, 32);\ ++ SQUASHFS_SWAP((s)->uid_start_2, d, 96, 32);\ ++ SQUASHFS_SWAP((s)->guid_start_2, d, 128, 32);\ ++ SQUASHFS_SWAP((s)->inode_table_start_2, d, 160, 32);\ ++ SQUASHFS_SWAP((s)->directory_table_start_2, d, 192, 32);\ ++ SQUASHFS_SWAP((s)->s_major, d, 224, 16);\ ++ SQUASHFS_SWAP((s)->s_minor, d, 240, 16);\ ++ SQUASHFS_SWAP((s)->block_size_1, d, 256, 16);\ ++ SQUASHFS_SWAP((s)->block_log, d, 272, 16);\ ++ SQUASHFS_SWAP((s)->flags, d, 288, 8);\ ++ SQUASHFS_SWAP((s)->no_uids, d, 296, 8);\ ++ SQUASHFS_SWAP((s)->no_guids, d, 304, 8);\ ++ SQUASHFS_SWAP((s)->mkfs_time, d, 312, 32);\ ++ SQUASHFS_SWAP((s)->root_inode, d, 344, 64);\ ++ SQUASHFS_SWAP((s)->block_size, d, 408, 32);\ ++ SQUASHFS_SWAP((s)->fragments, d, 440, 32);\ ++ SQUASHFS_SWAP((s)->fragment_table_start_2, d, 472, 32);\ ++ SQUASHFS_SWAP((s)->bytes_used, d, 504, 64);\ ++ SQUASHFS_SWAP((s)->uid_start, d, 568, 64);\ ++ SQUASHFS_SWAP((s)->guid_start, d, 632, 64);\ ++ SQUASHFS_SWAP((s)->inode_table_start, d, 696, 64);\ ++ SQUASHFS_SWAP((s)->directory_table_start, d, 760, 64);\ ++ SQUASHFS_SWAP((s)->fragment_table_start, d, 824, 64);\ ++ SQUASHFS_SWAP((s)->unused, d, 888, 64);\ ++} ++ ++#define SQUASHFS_SWAP_BASE_INODE_CORE(s, d, n)\ ++ SQUASHFS_MEMSET(s, d, n);\ ++ SQUASHFS_SWAP((s)->inode_type, d, 0, 4);\ ++ SQUASHFS_SWAP((s)->mode, d, 4, 12);\ ++ SQUASHFS_SWAP((s)->uid, d, 16, 8);\ ++ SQUASHFS_SWAP((s)->guid, d, 24, 8);\ ++ SQUASHFS_SWAP((s)->mtime, d, 32, 32);\ ++ SQUASHFS_SWAP((s)->inode_number, d, 64, 32); ++ ++#define SQUASHFS_SWAP_BASE_INODE_HEADER(s, d, n) {\ ++ SQUASHFS_SWAP_START\ ++ SQUASHFS_SWAP_BASE_INODE_CORE(s, d, n)\ ++} ++ ++#define SQUASHFS_SWAP_IPC_INODE_HEADER(s, d) {\ ++ SQUASHFS_SWAP_START\ ++ SQUASHFS_SWAP_BASE_INODE_CORE(s, d, \ ++ sizeof(struct squashfs_ipc_inode_header))\ ++ SQUASHFS_SWAP((s)->nlink, d, 96, 32);\ ++} ++ ++#define SQUASHFS_SWAP_DEV_INODE_HEADER(s, d) {\ ++ SQUASHFS_SWAP_START\ ++ SQUASHFS_SWAP_BASE_INODE_CORE(s, d, \ ++ sizeof(struct squashfs_dev_inode_header)); \ ++ SQUASHFS_SWAP((s)->nlink, d, 96, 32);\ ++ SQUASHFS_SWAP((s)->rdev, d, 128, 16);\ ++} ++ ++#define SQUASHFS_SWAP_SYMLINK_INODE_HEADER(s, d) {\ ++ SQUASHFS_SWAP_START\ ++ SQUASHFS_SWAP_BASE_INODE_CORE(s, d, \ ++ sizeof(struct squashfs_symlink_inode_header));\ ++ SQUASHFS_SWAP((s)->nlink, d, 96, 32);\ ++ SQUASHFS_SWAP((s)->symlink_size, d, 128, 16);\ ++} ++ ++#define SQUASHFS_SWAP_REG_INODE_HEADER(s, d) {\ ++ SQUASHFS_SWAP_START\ ++ SQUASHFS_SWAP_BASE_INODE_CORE(s, d, \ ++ sizeof(struct squashfs_reg_inode_header));\ ++ SQUASHFS_SWAP((s)->start_block, d, 96, 64);\ ++ SQUASHFS_SWAP((s)->fragment, d, 160, 32);\ ++ SQUASHFS_SWAP((s)->offset, d, 192, 32);\ ++ SQUASHFS_SWAP((s)->file_size, d, 224, 32);\ ++} ++ ++#define SQUASHFS_SWAP_LREG_INODE_HEADER(s, d) {\ ++ SQUASHFS_SWAP_START\ ++ SQUASHFS_SWAP_BASE_INODE_CORE(s, d, \ ++ sizeof(struct squashfs_lreg_inode_header));\ ++ SQUASHFS_SWAP((s)->nlink, d, 96, 32);\ ++ SQUASHFS_SWAP((s)->start_block, d, 128, 64);\ ++ SQUASHFS_SWAP((s)->fragment, d, 192, 32);\ ++ SQUASHFS_SWAP((s)->offset, d, 224, 32);\ ++ SQUASHFS_SWAP((s)->file_size, d, 256, 64);\ ++} ++ ++#define SQUASHFS_SWAP_DIR_INODE_HEADER(s, d) {\ ++ SQUASHFS_SWAP_START\ ++ SQUASHFS_SWAP_BASE_INODE_CORE(s, d, \ ++ sizeof(struct squashfs_dir_inode_header));\ ++ SQUASHFS_SWAP((s)->nlink, d, 96, 32);\ ++ SQUASHFS_SWAP((s)->file_size, d, 128, 19);\ ++ SQUASHFS_SWAP((s)->offset, d, 147, 13);\ ++ SQUASHFS_SWAP((s)->start_block, d, 160, 32);\ ++ SQUASHFS_SWAP((s)->parent_inode, d, 192, 32);\ ++} ++ ++#define SQUASHFS_SWAP_LDIR_INODE_HEADER(s, d) {\ ++ SQUASHFS_SWAP_START\ ++ SQUASHFS_SWAP_BASE_INODE_CORE(s, d, \ ++ sizeof(struct squashfs_ldir_inode_header));\ ++ SQUASHFS_SWAP((s)->nlink, d, 96, 32);\ ++ SQUASHFS_SWAP((s)->file_size, d, 128, 27);\ ++ SQUASHFS_SWAP((s)->offset, d, 155, 13);\ ++ SQUASHFS_SWAP((s)->start_block, d, 168, 32);\ ++ SQUASHFS_SWAP((s)->i_count, d, 200, 16);\ ++ SQUASHFS_SWAP((s)->parent_inode, d, 216, 32);\ ++} ++ ++#define SQUASHFS_SWAP_DIR_INDEX(s, d) {\ ++ SQUASHFS_SWAP_START\ ++ SQUASHFS_MEMSET(s, d, sizeof(struct squashfs_dir_index));\ ++ SQUASHFS_SWAP((s)->index, d, 0, 32);\ ++ SQUASHFS_SWAP((s)->start_block, d, 32, 32);\ ++ SQUASHFS_SWAP((s)->size, d, 64, 8);\ ++} ++ ++#define SQUASHFS_SWAP_DIR_HEADER(s, d) {\ ++ SQUASHFS_SWAP_START\ ++ SQUASHFS_MEMSET(s, d, sizeof(struct squashfs_dir_header));\ ++ SQUASHFS_SWAP((s)->count, d, 0, 8);\ ++ SQUASHFS_SWAP((s)->start_block, d, 8, 32);\ ++ SQUASHFS_SWAP((s)->inode_number, d, 40, 32);\ ++} ++ ++#define SQUASHFS_SWAP_DIR_ENTRY(s, d) {\ ++ SQUASHFS_SWAP_START\ ++ SQUASHFS_MEMSET(s, d, sizeof(struct squashfs_dir_entry));\ ++ SQUASHFS_SWAP((s)->offset, d, 0, 13);\ ++ SQUASHFS_SWAP((s)->type, d, 13, 3);\ ++ SQUASHFS_SWAP((s)->size, d, 16, 8);\ ++ SQUASHFS_SWAP((s)->inode_number, d, 24, 16);\ ++} ++ ++#define SQUASHFS_SWAP_FRAGMENT_ENTRY(s, d) {\ ++ SQUASHFS_SWAP_START\ ++ SQUASHFS_MEMSET(s, d, sizeof(struct squashfs_fragment_entry));\ ++ SQUASHFS_SWAP((s)->start_block, d, 0, 64);\ ++ SQUASHFS_SWAP((s)->size, d, 64, 32);\ ++} ++ ++#define SQUASHFS_SWAP_SHORTS(s, d, n) {\ ++ int entry;\ ++ int bit_position;\ ++ SQUASHFS_SWAP_START\ ++ SQUASHFS_MEMSET(s, d, n * 2);\ ++ for(entry = 0, bit_position = 0; entry < n; entry++, bit_position += \ ++ 16)\ ++ SQUASHFS_SWAP(s[entry], d, bit_position, 16);\ ++} ++ ++#define SQUASHFS_SWAP_INTS(s, d, n) {\ ++ int entry;\ ++ int bit_position;\ ++ SQUASHFS_SWAP_START\ ++ SQUASHFS_MEMSET(s, d, n * 4);\ ++ for(entry = 0, bit_position = 0; entry < n; entry++, bit_position += \ ++ 32)\ ++ SQUASHFS_SWAP(s[entry], d, bit_position, 32);\ ++} ++ ++#define SQUASHFS_SWAP_LONG_LONGS(s, d, n) {\ ++ int entry;\ ++ int bit_position;\ ++ SQUASHFS_SWAP_START\ ++ SQUASHFS_MEMSET(s, d, n * 8);\ ++ for(entry = 0, bit_position = 0; entry < n; entry++, bit_position += \ ++ 64)\ ++ SQUASHFS_SWAP(s[entry], d, bit_position, 64);\ ++} ++ ++#define SQUASHFS_SWAP_DATA(s, d, n, bits) {\ ++ int entry;\ ++ int bit_position;\ ++ SQUASHFS_SWAP_START\ ++ SQUASHFS_MEMSET(s, d, n * bits / 8);\ ++ for(entry = 0, bit_position = 0; entry < n; entry++, bit_position += \ ++ bits)\ ++ SQUASHFS_SWAP(s[entry], d, bit_position, bits);\ ++} ++ ++#define SQUASHFS_SWAP_FRAGMENT_INDEXES(s, d, n) SQUASHFS_SWAP_LONG_LONGS(s, d, n) ++ ++#ifdef CONFIG_SQUASHFS_1_0_COMPATIBILITY ++ ++struct squashfs_base_inode_header_1 { ++ unsigned int inode_type:4; ++ unsigned int mode:12; /* protection */ ++ unsigned int uid:4; /* index into uid table */ ++ unsigned int guid:4; /* index into guid table */ ++} __attribute__ ((packed)); ++ ++struct squashfs_ipc_inode_header_1 { ++ unsigned int inode_type:4; ++ unsigned int mode:12; /* protection */ ++ unsigned int uid:4; /* index into uid table */ ++ unsigned int guid:4; /* index into guid table */ ++ unsigned int type:4; ++ unsigned int offset:4; ++} __attribute__ ((packed)); ++ ++struct squashfs_dev_inode_header_1 { ++ unsigned int inode_type:4; ++ unsigned int mode:12; /* protection */ ++ unsigned int uid:4; /* index into uid table */ ++ unsigned int guid:4; /* index into guid table */ ++ unsigned short rdev; ++} __attribute__ ((packed)); ++ ++struct squashfs_symlink_inode_header_1 { ++ unsigned int inode_type:4; ++ unsigned int mode:12; /* protection */ ++ unsigned int uid:4; /* index into uid table */ ++ unsigned int guid:4; /* index into guid table */ ++ unsigned short symlink_size; ++ char symlink[0]; ++} __attribute__ ((packed)); ++ ++struct squashfs_reg_inode_header_1 { ++ unsigned int inode_type:4; ++ unsigned int mode:12; /* protection */ ++ unsigned int uid:4; /* index into uid table */ ++ unsigned int guid:4; /* index into guid table */ ++ unsigned int mtime; ++ unsigned int start_block; ++ unsigned int file_size:32; ++ unsigned short block_list[0]; ++} __attribute__ ((packed)); ++ ++struct squashfs_dir_inode_header_1 { ++ unsigned int inode_type:4; ++ unsigned int mode:12; /* protection */ ++ unsigned int uid:4; /* index into uid table */ ++ unsigned int guid:4; /* index into guid table */ ++ unsigned int file_size:19; ++ unsigned int offset:13; ++ unsigned int mtime; ++ unsigned int start_block:24; ++} __attribute__ ((packed)); ++ ++#define SQUASHFS_SWAP_BASE_INODE_CORE_1(s, d, n) \ ++ SQUASHFS_MEMSET(s, d, n);\ ++ SQUASHFS_SWAP((s)->inode_type, d, 0, 4);\ ++ SQUASHFS_SWAP((s)->mode, d, 4, 12);\ ++ SQUASHFS_SWAP((s)->uid, d, 16, 4);\ ++ SQUASHFS_SWAP((s)->guid, d, 20, 4); ++ ++#define SQUASHFS_SWAP_BASE_INODE_HEADER_1(s, d, n) {\ ++ SQUASHFS_SWAP_START\ ++ SQUASHFS_SWAP_BASE_INODE_CORE_1(s, d, n)\ ++} ++ ++#define SQUASHFS_SWAP_IPC_INODE_HEADER_1(s, d) {\ ++ SQUASHFS_SWAP_START\ ++ SQUASHFS_SWAP_BASE_INODE_CORE_1(s, d, \ ++ sizeof(struct squashfs_ipc_inode_header_1));\ ++ SQUASHFS_SWAP((s)->type, d, 24, 4);\ ++ SQUASHFS_SWAP((s)->offset, d, 28, 4);\ ++} ++ ++#define SQUASHFS_SWAP_DEV_INODE_HEADER_1(s, d) {\ ++ SQUASHFS_SWAP_START\ ++ SQUASHFS_SWAP_BASE_INODE_CORE_1(s, d, \ ++ sizeof(struct squashfs_dev_inode_header_1));\ ++ SQUASHFS_SWAP((s)->rdev, d, 24, 16);\ ++} ++ ++#define SQUASHFS_SWAP_SYMLINK_INODE_HEADER_1(s, d) {\ ++ SQUASHFS_SWAP_START\ ++ SQUASHFS_SWAP_BASE_INODE_CORE_1(s, d, \ ++ sizeof(struct squashfs_symlink_inode_header_1));\ ++ SQUASHFS_SWAP((s)->symlink_size, d, 24, 16);\ ++} ++ ++#define SQUASHFS_SWAP_REG_INODE_HEADER_1(s, d) {\ ++ SQUASHFS_SWAP_START\ ++ SQUASHFS_SWAP_BASE_INODE_CORE_1(s, d, \ ++ sizeof(struct squashfs_reg_inode_header_1));\ ++ SQUASHFS_SWAP((s)->mtime, d, 24, 32);\ ++ SQUASHFS_SWAP((s)->start_block, d, 56, 32);\ ++ SQUASHFS_SWAP((s)->file_size, d, 88, 32);\ ++} ++ ++#define SQUASHFS_SWAP_DIR_INODE_HEADER_1(s, d) {\ ++ SQUASHFS_SWAP_START\ ++ SQUASHFS_SWAP_BASE_INODE_CORE_1(s, d, \ ++ sizeof(struct squashfs_dir_inode_header_1));\ ++ SQUASHFS_SWAP((s)->file_size, d, 24, 19);\ ++ SQUASHFS_SWAP((s)->offset, d, 43, 13);\ ++ SQUASHFS_SWAP((s)->mtime, d, 56, 32);\ ++ SQUASHFS_SWAP((s)->start_block, d, 88, 24);\ ++} ++ ++#endif ++ ++#ifdef CONFIG_SQUASHFS_2_0_COMPATIBILITY ++ ++struct squashfs_dir_index_2 { ++ unsigned int index:27; ++ unsigned int start_block:29; ++ unsigned char size; ++ unsigned char name[0]; ++} __attribute__ ((packed)); ++ ++struct squashfs_base_inode_header_2 { ++ unsigned int inode_type:4; ++ unsigned int mode:12; /* protection */ ++ unsigned int uid:8; /* index into uid table */ ++ unsigned int guid:8; /* index into guid table */ ++} __attribute__ ((packed)); ++ ++struct squashfs_ipc_inode_header_2 { ++ unsigned int inode_type:4; ++ unsigned int mode:12; /* protection */ ++ unsigned int uid:8; /* index into uid table */ ++ unsigned int guid:8; /* index into guid table */ ++} __attribute__ ((packed)); ++ ++struct squashfs_dev_inode_header_2 { ++ unsigned int inode_type:4; ++ unsigned int mode:12; /* protection */ ++ unsigned int uid:8; /* index into uid table */ ++ unsigned int guid:8; /* index into guid table */ ++ unsigned short rdev; ++} __attribute__ ((packed)); ++ ++struct squashfs_symlink_inode_header_2 { ++ unsigned int inode_type:4; ++ unsigned int mode:12; /* protection */ ++ unsigned int uid:8; /* index into uid table */ ++ unsigned int guid:8; /* index into guid table */ ++ unsigned short symlink_size; ++ char symlink[0]; ++} __attribute__ ((packed)); ++ ++struct squashfs_reg_inode_header_2 { ++ unsigned int inode_type:4; ++ unsigned int mode:12; /* protection */ ++ unsigned int uid:8; /* index into uid table */ ++ unsigned int guid:8; /* index into guid table */ ++ unsigned int mtime; ++ unsigned int start_block; ++ unsigned int fragment; ++ unsigned int offset; ++ unsigned int file_size:32; ++ unsigned short block_list[0]; ++} __attribute__ ((packed)); ++ ++struct squashfs_dir_inode_header_2 { ++ unsigned int inode_type:4; ++ unsigned int mode:12; /* protection */ ++ unsigned int uid:8; /* index into uid table */ ++ unsigned int guid:8; /* index into guid table */ ++ unsigned int file_size:19; ++ unsigned int offset:13; ++ unsigned int mtime; ++ unsigned int start_block:24; ++} __attribute__ ((packed)); ++ ++struct squashfs_ldir_inode_header_2 { ++ unsigned int inode_type:4; ++ unsigned int mode:12; /* protection */ ++ unsigned int uid:8; /* index into uid table */ ++ unsigned int guid:8; /* index into guid table */ ++ unsigned int file_size:27; ++ unsigned int offset:13; ++ unsigned int mtime; ++ unsigned int start_block:24; ++ unsigned int i_count:16; ++ struct squashfs_dir_index_2 index[0]; ++} __attribute__ ((packed)); ++ ++union squashfs_inode_header_2 { ++ struct squashfs_base_inode_header_2 base; ++ struct squashfs_dev_inode_header_2 dev; ++ struct squashfs_symlink_inode_header_2 symlink; ++ struct squashfs_reg_inode_header_2 reg; ++ struct squashfs_dir_inode_header_2 dir; ++ struct squashfs_ldir_inode_header_2 ldir; ++ struct squashfs_ipc_inode_header_2 ipc; ++}; ++ ++struct squashfs_dir_header_2 { ++ unsigned int count:8; ++ unsigned int start_block:24; ++} __attribute__ ((packed)); ++ ++struct squashfs_dir_entry_2 { ++ unsigned int offset:13; ++ unsigned int type:3; ++ unsigned int size:8; ++ char name[0]; ++} __attribute__ ((packed)); ++ ++struct squashfs_fragment_entry_2 { ++ unsigned int start_block; ++ unsigned int size; ++} __attribute__ ((packed)); ++ ++#define SQUASHFS_SWAP_BASE_INODE_CORE_2(s, d, n)\ ++ SQUASHFS_MEMSET(s, d, n);\ ++ SQUASHFS_SWAP((s)->inode_type, d, 0, 4);\ ++ SQUASHFS_SWAP((s)->mode, d, 4, 12);\ ++ SQUASHFS_SWAP((s)->uid, d, 16, 8);\ ++ SQUASHFS_SWAP((s)->guid, d, 24, 8);\ ++ ++#define SQUASHFS_SWAP_BASE_INODE_HEADER_2(s, d, n) {\ ++ SQUASHFS_SWAP_START\ ++ SQUASHFS_SWAP_BASE_INODE_CORE_2(s, d, n)\ ++} ++ ++#define SQUASHFS_SWAP_IPC_INODE_HEADER_2(s, d) \ ++ SQUASHFS_SWAP_BASE_INODE_HEADER_2(s, d, sizeof(struct squashfs_ipc_inode_header_2)) ++ ++#define SQUASHFS_SWAP_DEV_INODE_HEADER_2(s, d) {\ ++ SQUASHFS_SWAP_START\ ++ SQUASHFS_SWAP_BASE_INODE_CORE_2(s, d, \ ++ sizeof(struct squashfs_dev_inode_header_2)); \ ++ SQUASHFS_SWAP((s)->rdev, d, 32, 16);\ ++} ++ ++#define SQUASHFS_SWAP_SYMLINK_INODE_HEADER_2(s, d) {\ ++ SQUASHFS_SWAP_START\ ++ SQUASHFS_SWAP_BASE_INODE_CORE_2(s, d, \ ++ sizeof(struct squashfs_symlink_inode_header_2));\ ++ SQUASHFS_SWAP((s)->symlink_size, d, 32, 16);\ ++} ++ ++#define SQUASHFS_SWAP_REG_INODE_HEADER_2(s, d) {\ ++ SQUASHFS_SWAP_START\ ++ SQUASHFS_SWAP_BASE_INODE_CORE_2(s, d, \ ++ sizeof(struct squashfs_reg_inode_header_2));\ ++ SQUASHFS_SWAP((s)->mtime, d, 32, 32);\ ++ SQUASHFS_SWAP((s)->start_block, d, 64, 32);\ ++ SQUASHFS_SWAP((s)->fragment, d, 96, 32);\ ++ SQUASHFS_SWAP((s)->offset, d, 128, 32);\ ++ SQUASHFS_SWAP((s)->file_size, d, 160, 32);\ ++} ++ ++#define SQUASHFS_SWAP_DIR_INODE_HEADER_2(s, d) {\ ++ SQUASHFS_SWAP_START\ ++ SQUASHFS_SWAP_BASE_INODE_CORE_2(s, d, \ ++ sizeof(struct squashfs_dir_inode_header_2));\ ++ SQUASHFS_SWAP((s)->file_size, d, 32, 19);\ ++ SQUASHFS_SWAP((s)->offset, d, 51, 13);\ ++ SQUASHFS_SWAP((s)->mtime, d, 64, 32);\ ++ SQUASHFS_SWAP((s)->start_block, d, 96, 24);\ ++} ++ ++#define SQUASHFS_SWAP_LDIR_INODE_HEADER_2(s, d) {\ ++ SQUASHFS_SWAP_START\ ++ SQUASHFS_SWAP_BASE_INODE_CORE_2(s, d, \ ++ sizeof(struct squashfs_ldir_inode_header_2));\ ++ SQUASHFS_SWAP((s)->file_size, d, 32, 27);\ ++ SQUASHFS_SWAP((s)->offset, d, 59, 13);\ ++ SQUASHFS_SWAP((s)->mtime, d, 72, 32);\ ++ SQUASHFS_SWAP((s)->start_block, d, 104, 24);\ ++ SQUASHFS_SWAP((s)->i_count, d, 128, 16);\ ++} ++ ++#define SQUASHFS_SWAP_DIR_INDEX_2(s, d) {\ ++ SQUASHFS_SWAP_START\ ++ SQUASHFS_MEMSET(s, d, sizeof(struct squashfs_dir_index_2));\ ++ SQUASHFS_SWAP((s)->index, d, 0, 27);\ ++ SQUASHFS_SWAP((s)->start_block, d, 27, 29);\ ++ SQUASHFS_SWAP((s)->size, d, 56, 8);\ ++} ++#define SQUASHFS_SWAP_DIR_HEADER_2(s, d) {\ ++ SQUASHFS_SWAP_START\ ++ SQUASHFS_MEMSET(s, d, sizeof(struct squashfs_dir_header_2));\ ++ SQUASHFS_SWAP((s)->count, d, 0, 8);\ ++ SQUASHFS_SWAP((s)->start_block, d, 8, 24);\ ++} ++ ++#define SQUASHFS_SWAP_DIR_ENTRY_2(s, d) {\ ++ SQUASHFS_SWAP_START\ ++ SQUASHFS_MEMSET(s, d, sizeof(struct squashfs_dir_entry_2));\ ++ SQUASHFS_SWAP((s)->offset, d, 0, 13);\ ++ SQUASHFS_SWAP((s)->type, d, 13, 3);\ ++ SQUASHFS_SWAP((s)->size, d, 16, 8);\ ++} ++ ++#define SQUASHFS_SWAP_FRAGMENT_ENTRY_2(s, d) {\ ++ SQUASHFS_SWAP_START\ ++ SQUASHFS_MEMSET(s, d, sizeof(struct squashfs_fragment_entry_2));\ ++ SQUASHFS_SWAP((s)->start_block, d, 0, 32);\ ++ SQUASHFS_SWAP((s)->size, d, 32, 32);\ ++} ++ ++#define SQUASHFS_SWAP_FRAGMENT_INDEXES_2(s, d, n) SQUASHFS_SWAP_INTS(s, d, n) ++ ++/* fragment and fragment table defines */ ++#define SQUASHFS_FRAGMENT_BYTES_2(A) (A * sizeof(struct squashfs_fragment_entry_2)) ++ ++#define SQUASHFS_FRAGMENT_INDEX_2(A) (SQUASHFS_FRAGMENT_BYTES_2(A) / \ ++ SQUASHFS_METADATA_SIZE) ++ ++#define SQUASHFS_FRAGMENT_INDEX_OFFSET_2(A) (SQUASHFS_FRAGMENT_BYTES_2(A) % \ ++ SQUASHFS_METADATA_SIZE) ++ ++#define SQUASHFS_FRAGMENT_INDEXES_2(A) ((SQUASHFS_FRAGMENT_BYTES_2(A) + \ ++ SQUASHFS_METADATA_SIZE - 1) / \ ++ SQUASHFS_METADATA_SIZE) ++ ++#define SQUASHFS_FRAGMENT_INDEX_BYTES_2(A) (SQUASHFS_FRAGMENT_INDEXES_2(A) *\ ++ sizeof(int)) ++ ++#endif ++ ++#ifdef __KERNEL__ ++ ++/* ++ * macros used to swap each structure entry, taking into account ++ * bitfields and different bitfield placing conventions on differing ++ * architectures ++ */ ++ ++#include <asm/byteorder.h> ++ ++#ifdef __BIG_ENDIAN ++ /* convert from little endian to big endian */ ++#define SQUASHFS_SWAP(value, p, pos, tbits) _SQUASHFS_SWAP(value, p, pos, \ ++ tbits, b_pos) ++#else ++ /* convert from big endian to little endian */ ++#define SQUASHFS_SWAP(value, p, pos, tbits) _SQUASHFS_SWAP(value, p, pos, \ ++ tbits, 64 - tbits - b_pos) ++#endif ++ ++#define _SQUASHFS_SWAP(value, p, pos, tbits, SHIFT) {\ ++ b_pos = pos % 8;\ ++ val = 0;\ ++ s = (unsigned char *)p + (pos / 8);\ ++ d = ((unsigned char *) &val) + 7;\ ++ for(bits = 0; bits < (tbits + b_pos); bits += 8) \ ++ *d-- = *s++;\ ++ value = (val >> (SHIFT))/* & ((1 << tbits) - 1)*/;\ ++} ++ ++#define SQUASHFS_MEMSET(s, d, n) memset(s, 0, n); ++ ++#endif ++#endif +diff --new-file -urp linux-2.6.18/include/linux/squashfs_fs_i.h linux-2.6.18-squashfs3.1/include/linux/squashfs_fs_i.h +--- linux-2.6.18/include/linux/squashfs_fs_i.h 1970-01-01 01:00:00.000000000 +0100 ++++ linux-2.6.18-squashfs3.1/include/linux/squashfs_fs_i.h 2006-08-21 00:13:19.000000000 +0100 +@@ -0,0 +1,45 @@ ++#ifndef SQUASHFS_FS_I ++#define SQUASHFS_FS_I ++/* ++ * Squashfs ++ * ++ * Copyright (c) 2002, 2003, 2004, 2005, 2006 ++ * Phillip Lougher <phillip@lougher.org.uk> ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License ++ * as published by the Free Software Foundation; either version 2, ++ * or (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. ++ * ++ * squashfs_fs_i.h ++ */ ++ ++struct squashfs_inode_info { ++ long long start_block; ++ unsigned int offset; ++ union { ++ struct { ++ long long fragment_start_block; ++ unsigned int fragment_size; ++ unsigned int fragment_offset; ++ long long block_list_start; ++ } s1; ++ struct { ++ long long directory_index_start; ++ unsigned int directory_index_offset; ++ unsigned int directory_index_count; ++ unsigned int parent_inode; ++ } s2; ++ } u; ++ struct inode vfs_inode; ++}; ++#endif +diff --new-file -urp linux-2.6.18/include/linux/squashfs_fs_sb.h linux-2.6.18-squashfs3.1/include/linux/squashfs_fs_sb.h +--- linux-2.6.18/include/linux/squashfs_fs_sb.h 1970-01-01 01:00:00.000000000 +0100 ++++ linux-2.6.18-squashfs3.1/include/linux/squashfs_fs_sb.h 2006-08-21 00:16:48.000000000 +0100 +@@ -0,0 +1,75 @@ ++#ifndef SQUASHFS_FS_SB ++#define SQUASHFS_FS_SB ++/* ++ * Squashfs ++ * ++ * Copyright (c) 2002, 2003, 2004, 2005, 2006 ++ * Phillip Lougher <phillip@lougher.org.uk> ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License ++ * as published by the Free Software Foundation; either version 2, ++ * or (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. ++ * ++ * squashfs_fs_sb.h ++ */ ++ ++#include <linux/squashfs_fs.h> ++ ++struct squashfs_cache { ++ long long block; ++ int length; ++ long long next_index; ++ char *data; ++}; ++ ++struct squashfs_fragment_cache { ++ long long block; ++ int length; ++ unsigned int locked; ++ char *data; ++}; ++ ++struct squashfs_sb_info { ++ struct squashfs_super_block sblk; ++ int devblksize; ++ int devblksize_log2; ++ int swap; ++ struct squashfs_cache *block_cache; ++ struct squashfs_fragment_cache *fragment; ++ int next_cache; ++ int next_fragment; ++ int next_meta_index; ++ unsigned int *uid; ++ unsigned int *guid; ++ long long *fragment_index; ++ unsigned int *fragment_index_2; ++ unsigned int read_size; ++ char *read_data; ++ char *read_page; ++ struct semaphore read_data_mutex; ++ struct semaphore read_page_mutex; ++ struct semaphore block_cache_mutex; ++ struct semaphore fragment_mutex; ++ struct semaphore meta_index_mutex; ++ wait_queue_head_t waitq; ++ wait_queue_head_t fragment_wait_queue; ++ struct meta_index *meta_index; ++ z_stream stream; ++ struct inode *(*iget)(struct super_block *s, squashfs_inode_t ++ inode); ++ long long (*read_blocklist)(struct inode *inode, int ++ index, int readahead_blks, char *block_list, ++ unsigned short **block_p, unsigned int *bsize); ++ int (*read_fragment_index_table)(struct super_block *s); ++}; ++#endif +diff --new-file -urp linux-2.6.18/init/do_mounts_rd.c linux-2.6.18-squashfs3.1/init/do_mounts_rd.c +--- linux-2.6.18/init/do_mounts_rd.c 2006-08-11 00:03:15.000000000 +0100 ++++ linux-2.6.18-squashfs3.1/init/do_mounts_rd.c 2006-08-21 00:13:19.000000000 +0100 +@@ -5,6 +5,7 @@ + #include <linux/ext2_fs.h> + #include <linux/romfs_fs.h> + #include <linux/cramfs_fs.h> ++#include <linux/squashfs_fs.h> + #include <linux/initrd.h> + #include <linux/string.h> + +@@ -39,6 +40,7 @@ static int __init crd_load(int in_fd, in + * numbers could not be found. + * + * We currently check for the following magic numbers: ++ * squashfs + * minix + * ext2 + * romfs +@@ -53,6 +55,7 @@ identify_ramdisk_image(int fd, int start + struct ext2_super_block *ext2sb; + struct romfs_super_block *romfsb; + struct cramfs_super *cramfsb; ++ struct squashfs_super_block *squashfsb; + int nblocks = -1; + unsigned char *buf; + +@@ -64,6 +67,7 @@ identify_ramdisk_image(int fd, int start + ext2sb = (struct ext2_super_block *) buf; + romfsb = (struct romfs_super_block *) buf; + cramfsb = (struct cramfs_super *) buf; ++ squashfsb = (struct squashfs_super_block *) buf; + memset(buf, 0xe5, size); + + /* +@@ -101,6 +105,18 @@ identify_ramdisk_image(int fd, int start + goto done; + } + ++ /* squashfs is at block zero too */ ++ if (squashfsb->s_magic == SQUASHFS_MAGIC) { ++ printk(KERN_NOTICE ++ "RAMDISK: squashfs filesystem found at block %d\n", ++ start_block); ++ if (squashfsb->s_major < 3) ++ nblocks = (squashfsb->bytes_used_2+BLOCK_SIZE-1)>>BLOCK_SIZE_BITS; ++ else ++ nblocks = (squashfsb->bytes_used+BLOCK_SIZE-1)>>BLOCK_SIZE_BITS; ++ goto done; ++ } ++ + /* + * Read block 1 to test for minix and ext2 superblock + */ diff --git a/packages/linux/linux-magicbox_2.6.18.6.bb b/packages/linux/linux-magicbox_2.6.18.6.bb new file mode 100644 index 0000000000..5e4dca3077 --- /dev/null +++ b/packages/linux/linux-magicbox_2.6.18.6.bb @@ -0,0 +1,76 @@ +SECTION = "kernel" +DESCRIPTION = "Linux kernel for Magicbox ver 1.1 and 2.0 router boards" +LICENSE = "GPL" +PR = "r1" +#DEPENDS = "u-boot" + +KERNEL_CCSUFFIX = "-3.4.4" + +SRC_URI = "${KERNELORG_MIRROR}/pub/linux/kernel/v2.6/linux-${PV}.tar.bz2 \ + file://000-fix-makefile.patch;patch=1 \ + file://001-magicbox-board-2.6.18.patch;patch=1 \ + file://002-magicbox-mtd-map-2.6.18.patch;patch=1 \ + file://010-load-ramdisk-even-if-rootdev-equals-ramdisk.patch;patch=1 \ + file://magicbox2-ide-cf_2.6.18.patch;patch=1 \ + file://squashfs3.1-patch;patch=1 \ + file://kernel-2.6.18-layer7-2.6.patch;patch=1 \ + file://config-2.6.18-magicbox2\ +" + + +S = "${WORKDIR}/linux-${PV}" + +inherit kernel + + +FILES_kernel-image = "/boot/zImage.elf" + +export OS = "Linux" +ARCH = "ppc" +KERNEL_IMAGETYPE = "zImage" +KERNEL_OUTPUT = "arch/ppc/boot/images/zImage.elf" + + + + +do_configure_prepend() { + install -m 0644 ${WORKDIR}/config-2.6.18-magicbox2 ${S}/.config +} + + +do_stage_append () { +#need ppc platforms includes + friends in order for external kernel modules to compile as headers as still split + + install -d ${STAGING_KERNEL_DIR}/arch/ + cp -a arch/ppc ${STAGING_KERNEL_DIR}/arch/ + cp -a arch/powerpc ${STAGING_KERNEL_DIR}/arch/ + + cp -a include/asm-powerpc ${STAGING_KERNEL_DIR}/include/ + cp -a include/asm-ppc ${STAGING_KERNEL_DIR}/include/ +} + + + +do_install_append () { + install -d ${DEPLOY_DIR}/images + install -m 0755 arch/ppc/boot/images/zImage.elf ${DEPLOY_DIR}/images/${KERNEL_IMAGETYPE}-${PV}-${MACHINE}-${DATETIME}.elf + install -m 0755 vmlinux ${DEPLOY_DIR}/images/ + powerpc-${TARGET_OS}-objcopy -O binary -R .note -R .comment -S ${DEPLOY_DIR}/images/vmlinux ${DEPLOY_DIR}/images/linux.bin + gzip -f -9 ${DEPLOY_DIR}/images/linux.bin + mkimage -A ppc -O linux -T kernel -C gzip -a 0 -e 0 -n "ppc405"+${PV} -d ${DEPLOY_DIR}/images/linux.bin.gz ${DEPLOY_DIR}/images/uImage-${PV}-${MACHINE}-${DATETIME}.bin + rm ${DEPLOY_DIR}/images/vmlinux + rm ${DEPLOY_DIR}/images/linux.bin.gz + + +} + + +pkg_postinst_kernel () { + true +} + +pkg_postrm_kernel () { + true +} + + diff --git a/packages/linux/linux-rp-2.6.20/defconfig-collie b/packages/linux/linux-rp-2.6.20/defconfig-collie index b0603a8408..945f2fb39c 100644 --- a/packages/linux/linux-rp-2.6.20/defconfig-collie +++ b/packages/linux/linux-rp-2.6.20/defconfig-collie @@ -1410,7 +1410,7 @@ CONFIG_USB_GADGET=y # MMC/SD Card support # CONFIG_MMC=m -# CONFIG_MMC_DEBUG is not set +CONFIG_MMC_DEBUG=y CONFIG_MMC_BLOCK=m # CONFIG_MMC_TIFM_SD is not set CONFIG_MMC_SPI=m diff --git a/packages/linux/linux-rp-2.6.20/pxa-serial-hack.patch b/packages/linux/linux-rp-2.6.20/pxa-serial-hack.patch index 9ece71331a..bf20f46a05 100644 --- a/packages/linux/linux-rp-2.6.20/pxa-serial-hack.patch +++ b/packages/linux/linux-rp-2.6.20/pxa-serial-hack.patch @@ -5,28 +5,38 @@ include/linux/serial_core.h | 1 + 4 files changed, 16 insertions(+), 3 deletions(-) -Index: git/drivers/serial/8250.c +Index: linux-2.6.20/drivers/serial/8250.c =================================================================== ---- git.orig/drivers/serial/8250.c 2006-10-31 16:29:50.000000000 +0000 -+++ git/drivers/serial/8250.c 2006-10-31 16:29:53.000000000 +0000 -@@ -2429,7 +2429,12 @@ static struct uart_driver serial8250_reg +--- linux-2.6.20.orig/drivers/serial/8250.c 2007-04-27 13:37:26.000000000 +0100 ++++ linux-2.6.20/drivers/serial/8250.c 2007-04-27 13:38:16.000000000 +0100 +@@ -2429,7 +2429,12 @@ .driver_name = "serial", .dev_name = "ttyS", .major = TTY_MAJOR, +#ifdef CONFIG_SERIAL_PXA -+ .minor = 64 + 3, -+ .name_base = 3, ++ .minor = 64 + 4, ++ .name_base = 4, +#else .minor = 64, +#endif .nr = UART_NR, .cons = SERIAL8250_CONSOLE, }; -Index: git/drivers/serial/serial_core.c +Index: linux-2.6.20/drivers/serial/serial_core.c =================================================================== ---- git.orig/drivers/serial/serial_core.c 2006-10-31 16:09:17.000000000 +0000 -+++ git/drivers/serial/serial_core.c 2006-10-31 16:29:53.000000000 +0000 -@@ -2183,6 +2183,7 @@ int uart_register_driver(struct uart_dri +--- linux-2.6.20.orig/drivers/serial/serial_core.c 2007-02-04 18:44:54.000000000 +0000 ++++ linux-2.6.20/drivers/serial/serial_core.c 2007-04-27 13:39:39.000000000 +0100 +@@ -2068,7 +2068,8 @@ + printk(KERN_INFO "%s%s%s%d at %s (irq = %d) is a %s\n", + port->dev ? port->dev->bus_id : "", + port->dev ? ": " : "", +- drv->dev_name, port->line, address, port->irq, uart_type(port)); ++ drv->dev_name, port->line + drv->name_base, address, port->irq, ++ uart_type(port)); + } + + static void +@@ -2183,6 +2184,7 @@ normal->owner = drv->owner; normal->driver_name = drv->driver_name; normal->name = drv->dev_name; @@ -34,11 +44,11 @@ Index: git/drivers/serial/serial_core.c normal->major = drv->major; normal->minor_start = drv->minor; normal->type = TTY_DRIVER_TYPE_SERIAL; -Index: git/include/linux/serial_core.h +Index: linux-2.6.20/include/linux/serial_core.h =================================================================== ---- git.orig/include/linux/serial_core.h 2006-10-31 16:09:45.000000000 +0000 -+++ git/include/linux/serial_core.h 2006-10-31 16:30:36.000000000 +0000 -@@ -339,6 +339,7 @@ struct uart_driver { +--- linux-2.6.20.orig/include/linux/serial_core.h 2007-02-04 18:44:54.000000000 +0000 ++++ linux-2.6.20/include/linux/serial_core.h 2007-04-27 13:37:27.000000000 +0100 +@@ -341,6 +341,7 @@ struct module *owner; const char *driver_name; const char *dev_name; @@ -46,11 +56,11 @@ Index: git/include/linux/serial_core.h int major; int minor; int nr; -Index: git/drivers/serial/serial_cs.c +Index: linux-2.6.20/drivers/serial/serial_cs.c =================================================================== ---- git.orig/drivers/serial/serial_cs.c 2006-10-31 16:09:17.000000000 +0000 -+++ git/drivers/serial/serial_cs.c 2006-10-31 16:29:53.000000000 +0000 -@@ -390,7 +390,7 @@ static int setup_serial(struct pcmcia_de +--- linux-2.6.20.orig/drivers/serial/serial_cs.c 2007-02-04 18:44:54.000000000 +0000 ++++ linux-2.6.20/drivers/serial/serial_cs.c 2007-04-27 13:40:34.000000000 +0100 +@@ -390,7 +390,7 @@ kio_addr_t iobase, int irq) { struct uart_port port; @@ -59,12 +69,12 @@ Index: git/drivers/serial/serial_cs.c memset(&port, 0, sizeof (struct uart_port)); port.iobase = iobase; -@@ -411,10 +411,16 @@ static int setup_serial(struct pcmcia_de +@@ -411,10 +411,16 @@ return -EINVAL; } +#if CONFIG_SERIAL_PXA -+ linestart = 3; ++ linestart = 4; +#else + linestart = 0; +#endif diff --git a/packages/linux/linux-rp_2.6.20.bb b/packages/linux/linux-rp_2.6.20.bb index 23cf54e794..3180352381 100644 --- a/packages/linux/linux-rp_2.6.20.bb +++ b/packages/linux/linux-rp_2.6.20.bb @@ -1,6 +1,6 @@ require linux-rp.inc -PR = "r13" +PR = "r15" # Handy URLs # git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6.git;protocol=git;tag=ef7d1b244fa6c94fb76d5f787b8629df64ea4046 @@ -84,10 +84,10 @@ SRC_URI_append_collie = "\ ${TKSRC}/ucb1x00-touch-audio-r1.patch;patch=1 \ ${TKSRC}/mcp-sa11x0-r0.patch;patch=1 \ ${TKSRC}/sa1100-udc-r2.patch;patch=1 \ - ${TKSRC}/mmc_spi-r3.patch;patch=1 \ + ${TKSRC}/mmc_spi-r4.patch;patch=1 \ ${TKSRC}/locomo-r0.patch;patch=1 \ ${TKSRC}/collie-kexec.patch;patch=1 \ - ${TKSRC}/locomo_spi-r2.patch;patch=1 \ + ${TKSRC}/locomo_spi-r3.patch;patch=1 \ " SRC_URI_append_tosa = "\ diff --git a/packages/linux/linux-titan-sh4-2.6.21/.mtn2git_empty b/packages/linux/linux-titan-sh4-2.6.21/.mtn2git_empty new file mode 100644 index 0000000000..e69de29bb2 --- /dev/null +++ b/packages/linux/linux-titan-sh4-2.6.21/.mtn2git_empty diff --git a/packages/linux/linux-titan-sh4-2.6.21/no-mm-mutex.patch b/packages/linux/linux-titan-sh4-2.6.21/no-mm-mutex.patch new file mode 100644 index 0000000000..a1b10eed9f --- /dev/null +++ b/packages/linux/linux-titan-sh4-2.6.21/no-mm-mutex.patch @@ -0,0 +1,47 @@ +Patch out the use of mutex's to protect the copy/clear user page +operations. These functions sleep, and therefore the mutex's cause +scheduling while atomic errors. Now this actually opens up the +possiblity of some corruption (not actually seen in practice, but +theoretically possible) and therefore is not the correct fix, but all +proposed replacements have so far been even more problematic. + +diff --git a/arch/sh/mm/pg-sh4.c b/arch/sh/mm/pg-sh4.c +index df69da9..7bc36a4 100644 +--- a/arch/sh/mm/pg-sh4.c ++++ b/arch/sh/mm/pg-sh4.c +@@ -37,7 +37,7 @@ void clear_user_page(void *to, unsigned + unsigned long flags; + + entry = pfn_pte(phys_addr >> PAGE_SHIFT, PAGE_KERNEL); +- mutex_lock(&p3map_mutex[(address & CACHE_ALIAS)>>12]); ++// mutex_lock(&p3map_mutex[(address & CACHE_ALIAS)>>12]); + set_pte(pte, entry); + local_irq_save(flags); + flush_tlb_one(get_asid(), p3_addr); +@@ -45,7 +45,7 @@ void clear_user_page(void *to, unsigned + update_mmu_cache(NULL, p3_addr, entry); + __clear_user_page((void *)p3_addr, to); + pte_clear(&init_mm, p3_addr, pte); +- mutex_unlock(&p3map_mutex[(address & CACHE_ALIAS)>>12]); ++// mutex_unlock(&p3map_mutex[(address & CACHE_ALIAS)>>12]); + } + } + +@@ -73,7 +73,7 @@ void copy_user_page(void *to, void *from + unsigned long flags; + + entry = pfn_pte(phys_addr >> PAGE_SHIFT, PAGE_KERNEL); +- mutex_lock(&p3map_mutex[(address & CACHE_ALIAS)>>12]); ++// mutex_lock(&p3map_mutex[(address & CACHE_ALIAS)>>12]); + set_pte(pte, entry); + local_irq_save(flags); + flush_tlb_one(get_asid(), p3_addr); +@@ -81,7 +81,7 @@ void copy_user_page(void *to, void *from + update_mmu_cache(NULL, p3_addr, entry); + __copy_user_page((void *)p3_addr, from, to); + pte_clear(&init_mm, p3_addr, pte); +- mutex_unlock(&p3map_mutex[(address & CACHE_ALIAS)>>12]); ++// mutex_unlock(&p3map_mutex[(address & CACHE_ALIAS)>>12]); + } + } + diff --git a/packages/linux/linux-titan-sh4-2.6.17/titan-config b/packages/linux/linux-titan-sh4-2.6.21/titan-config index c7a0fc9b8e..d103deb0a5 100644 --- a/packages/linux/linux-titan-sh4-2.6.17/titan-config +++ b/packages/linux/linux-titan-sh4-2.6.21/titan-config @@ -1,7 +1,7 @@ # # Automatically generated make config: don't edit -# Linux kernel version: 2.6.17 -# Thu Jul 6 12:42:07 2006 +# Linux kernel version: 2.6.21-rc1 +# Wed Feb 28 00:47:30 2007 # CONFIG_SUPERH=y CONFIG_RWSEM_GENERIC_SPINLOCK=y @@ -10,6 +10,12 @@ CONFIG_GENERIC_HWEIGHT=y CONFIG_GENERIC_HARDIRQS=y CONFIG_GENERIC_IRQ_PROBE=y CONFIG_GENERIC_CALIBRATE_DELAY=y +# CONFIG_GENERIC_TIME is not set +CONFIG_STACKTRACE_SUPPORT=y +CONFIG_LOCKDEP_SUPPORT=y +# CONFIG_ARCH_HAS_ILOG2_U32 is not set +# CONFIG_ARCH_HAS_ILOG2_U64 is not set +CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" # # Code maturity level options @@ -25,17 +31,22 @@ CONFIG_LOCALVERSION="" CONFIG_LOCALVERSION_AUTO=y CONFIG_SWAP=y CONFIG_SYSVIPC=y +# CONFIG_IPC_NS is not set +CONFIG_SYSVIPC_SYSCTL=y CONFIG_POSIX_MQUEUE=y # CONFIG_BSD_PROCESS_ACCT is not set -CONFIG_SYSCTL=y +# CONFIG_TASKSTATS is not set +# CONFIG_UTS_NS is not set # CONFIG_AUDIT is not set -CONFIG_IKCONFIG=y -CONFIG_IKCONFIG_PROC=y +# CONFIG_IKCONFIG is not set +# CONFIG_SYSFS_DEPRECATED is not set # CONFIG_RELAY is not set CONFIG_INITRAMFS_SOURCE="" -CONFIG_UID16=y # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set -# CONFIG_EMBEDDED is not set +CONFIG_SYSCTL=y +CONFIG_EMBEDDED=y +CONFIG_UID16=y +CONFIG_SYSCTL_SYSCALL=y CONFIG_KALLSYMS=y # CONFIG_KALLSYMS_ALL is not set # CONFIG_KALLSYMS_EXTRA_PASS is not set @@ -48,10 +59,11 @@ CONFIG_FUTEX=y CONFIG_EPOLL=y CONFIG_SHMEM=y CONFIG_SLAB=y +CONFIG_VM_EVENT_COUNTERS=y +CONFIG_RT_MUTEXES=y # CONFIG_TINY_SHMEM is not set CONFIG_BASE_SMALL=0 # CONFIG_SLOB is not set -CONFIG_OBSOLETE_INTERMODULE=m # # Loadable module support @@ -66,6 +78,7 @@ CONFIG_KMOD=y # # Block layer # +CONFIG_BLOCK=y # CONFIG_LBD is not set # CONFIG_BLK_DEV_IO_TRACE is not set # CONFIG_LSF is not set @@ -89,30 +102,26 @@ CONFIG_DEFAULT_IOSCHED="anticipatory" # CONFIG_SH_SOLUTION_ENGINE is not set # CONFIG_SH_7751_SOLUTION_ENGINE is not set # CONFIG_SH_7300_SOLUTION_ENGINE is not set +# CONFIG_SH_7343_SOLUTION_ENGINE is not set # CONFIG_SH_73180_SOLUTION_ENGINE is not set # CONFIG_SH_7751_SYSTEMH is not set -# CONFIG_SH_STB1_HARP is not set -# CONFIG_SH_STB1_OVERDRIVE is not set # CONFIG_SH_HP6XX is not set -# CONFIG_SH_CQREEK is not set -# CONFIG_SH_DMIDA is not set -# CONFIG_SH_EC3104 is not set # CONFIG_SH_SATURN is not set # CONFIG_SH_DREAMCAST is not set -# CONFIG_SH_CAT68701 is not set -# CONFIG_SH_BIGSUR is not set -# CONFIG_SH_SH2000 is not set -# CONFIG_SH_ADX is not set # CONFIG_SH_MPC1211 is not set # CONFIG_SH_SH03 is not set # CONFIG_SH_SECUREEDGE5410 is not set # CONFIG_SH_HS7751RVOIP is not set +# CONFIG_SH_7710VOIPGW is not set # CONFIG_SH_RTS7751R2D is not set # CONFIG_SH_R7780RP is not set # CONFIG_SH_EDOSK7705 is not set # CONFIG_SH_SH4202_MICRODEV is not set # CONFIG_SH_LANDISK is not set CONFIG_SH_TITAN=y +# CONFIG_SH_SHMIN is not set +# CONFIG_SH_7206_SOLUTION_ENGINE is not set +# CONFIG_SH_7619_SOLUTION_ENGINE is not set # CONFIG_SH_UNKNOWN is not set # @@ -124,15 +133,23 @@ CONFIG_CPU_SH4=y # SH-2 Processor Support # # CONFIG_CPU_SUBTYPE_SH7604 is not set +# CONFIG_CPU_SUBTYPE_SH7619 is not set + +# +# SH-2A Processor Support +# +# CONFIG_CPU_SUBTYPE_SH7206 is not set # # SH-3 Processor Support # # CONFIG_CPU_SUBTYPE_SH7300 is not set # CONFIG_CPU_SUBTYPE_SH7705 is not set +# CONFIG_CPU_SUBTYPE_SH7706 is not set # CONFIG_CPU_SUBTYPE_SH7707 is not set # CONFIG_CPU_SUBTYPE_SH7708 is not set # CONFIG_CPU_SUBTYPE_SH7709 is not set +# CONFIG_CPU_SUBTYPE_SH7710 is not set # # SH-4 Processor Support @@ -155,14 +172,28 @@ CONFIG_CPU_SUBTYPE_SH7751R=y # # SH-4A Processor Support # -# CONFIG_CPU_SUBTYPE_SH73180 is not set # CONFIG_CPU_SUBTYPE_SH7770 is not set # CONFIG_CPU_SUBTYPE_SH7780 is not set +# CONFIG_CPU_SUBTYPE_SH7785 is not set + +# +# SH4AL-DSP Processor Support +# +# CONFIG_CPU_SUBTYPE_SH73180 is not set +# CONFIG_CPU_SUBTYPE_SH7343 is not set +# CONFIG_CPU_SUBTYPE_SH7722 is not set # # Memory management options # CONFIG_MMU=y +CONFIG_PAGE_OFFSET=0x80000000 +CONFIG_MEMORY_START=0x08030000 +CONFIG_MEMORY_SIZE=0x7fd0000 +CONFIG_VSYSCALL=y +CONFIG_PAGE_SIZE_4KB=y +# CONFIG_PAGE_SIZE_8KB is not set +# CONFIG_PAGE_SIZE_64KB is not set CONFIG_SELECT_MEMORY_MODEL=y CONFIG_FLATMEM_MANUAL=y # CONFIG_DISCONTIGMEM_MANUAL is not set @@ -171,6 +202,8 @@ CONFIG_FLATMEM=y CONFIG_FLAT_NODE_MEM_MAP=y # CONFIG_SPARSEMEM_STATIC is not set CONFIG_SPLIT_PTLOCK_CPUS=4 +# CONFIG_RESOURCES_64BIT is not set +CONFIG_ZONE_DMA_FLAG=0 # # Cache configuration @@ -178,23 +211,26 @@ CONFIG_SPLIT_PTLOCK_CPUS=4 # CONFIG_SH_DIRECT_MAPPED is not set # CONFIG_SH_WRITETHROUGH is not set # CONFIG_SH_OCRAM is not set -CONFIG_MEMORY_START=0x08030000 -CONFIG_MEMORY_SIZE=0x7fd0000 # # Processor features # CONFIG_CPU_LITTLE_ENDIAN=y -CONFIG_SH_RTC=y +# CONFIG_CPU_BIG_ENDIAN is not set CONFIG_SH_FPU=y +# CONFIG_SH_DSP is not set # CONFIG_SH_STORE_QUEUES is not set CONFIG_CPU_HAS_INTEVT=y +CONFIG_CPU_HAS_IPR_IRQ=y CONFIG_CPU_HAS_SR_RB=y +CONFIG_CPU_HAS_PTEA=y # # Timer support # CONFIG_SH_TMU=y +CONFIG_SH_TIMER_IRQ=16 +# CONFIG_NO_IDLE_HZ is not set CONFIG_SH_PCLK_FREQ=30000000 # @@ -205,9 +241,7 @@ CONFIG_SH_PCLK_FREQ=30000000 # # DMA support # -CONFIG_SH_DMA=y -CONFIG_NR_ONCHIP_DMA_CHANNELS=8 -# CONFIG_NR_DMA_CHANNELS_BOOL is not set +# CONFIG_SH_DMA is not set # # Companion Chips @@ -215,11 +249,23 @@ CONFIG_NR_ONCHIP_DMA_CHANNELS=8 # CONFIG_HD6446X_SERIES is not set # +# Additional SuperH Device Drivers +# +# CONFIG_PUSH_SWITCH is not set + +# # Kernel features # +# CONFIG_HZ_100 is not set +CONFIG_HZ_250=y +# CONFIG_HZ_300 is not set +# CONFIG_HZ_1000 is not set +CONFIG_HZ=250 # CONFIG_KEXEC is not set -# CONFIG_PREEMPT is not set # CONFIG_SMP is not set +# CONFIG_PREEMPT_NONE is not set +CONFIG_PREEMPT_VOLUNTARY=y +# CONFIG_PREEMPT is not set # # Boot options @@ -228,7 +274,7 @@ CONFIG_ZERO_PAGE_OFFSET=0x00001000 CONFIG_BOOT_LINK_OFFSET=0x009e0000 # CONFIG_UBC_WAKEUP is not set CONFIG_CMDLINE_BOOL=y -CONFIG_CMDLINE="console=ttySC1,38400N81 root=/dev/sm0p2" +CONFIG_CMDLINE="console=ttySC1,38400N81 earlyprintk=serial,,38400 root=/dev/nfs ip=:::::eth1:autoconf profile=2 rw" # # Bus options @@ -278,7 +324,10 @@ CONFIG_PACKET_MMAP=y CONFIG_UNIX=y CONFIG_XFRM=y # CONFIG_XFRM_USER is not set +# CONFIG_XFRM_SUB_POLICY is not set +CONFIG_XFRM_MIGRATE=y CONFIG_NET_KEY=y +CONFIG_NET_KEY_MIGRATE=y CONFIG_INET=y CONFIG_IP_MULTICAST=y CONFIG_IP_ADVANCED_ROUTER=y @@ -286,7 +335,6 @@ CONFIG_ASK_IP_FIB_HASH=y # CONFIG_IP_FIB_TRIE is not set CONFIG_IP_FIB_HASH=y CONFIG_IP_MULTIPLE_TABLES=y -# CONFIG_IP_ROUTE_FWMARK is not set CONFIG_IP_ROUTE_MULTIPATH=y CONFIG_IP_ROUTE_MULTIPATH_CACHED=y CONFIG_IP_ROUTE_MULTIPATH_RR=m @@ -298,8 +346,8 @@ CONFIG_IP_PNP=y CONFIG_IP_PNP_DHCP=y CONFIG_IP_PNP_BOOTP=y CONFIG_IP_PNP_RARP=y -CONFIG_NET_IPIP=y -CONFIG_NET_IPGRE=y +CONFIG_NET_IPIP=m +CONFIG_NET_IPGRE=m CONFIG_NET_IPGRE_BROADCAST=y CONFIG_IP_MROUTE=y CONFIG_IP_PIMSM_V1=y @@ -311,10 +359,15 @@ CONFIG_INET_ESP=y CONFIG_INET_IPCOMP=y CONFIG_INET_XFRM_TUNNEL=y CONFIG_INET_TUNNEL=y +CONFIG_INET_XFRM_MODE_TRANSPORT=y +CONFIG_INET_XFRM_MODE_TUNNEL=y +CONFIG_INET_XFRM_MODE_BEET=y CONFIG_INET_DIAG=m CONFIG_INET_TCP_DIAG=m # CONFIG_TCP_CONG_ADVANCED is not set -CONFIG_TCP_CONG_BIC=y +CONFIG_TCP_CONG_CUBIC=y +CONFIG_DEFAULT_TCP_CONG="cubic" +CONFIG_TCP_MD5SIG=y # # IP: Virtual Server Configuration @@ -326,9 +379,18 @@ CONFIG_IPV6_PRIVACY=y CONFIG_INET6_AH=y CONFIG_INET6_ESP=y CONFIG_INET6_IPCOMP=y +# CONFIG_IPV6_MIP6 is not set CONFIG_INET6_XFRM_TUNNEL=y CONFIG_INET6_TUNNEL=y -CONFIG_IPV6_TUNNEL=y +CONFIG_INET6_XFRM_MODE_TRANSPORT=y +CONFIG_INET6_XFRM_MODE_TUNNEL=y +CONFIG_INET6_XFRM_MODE_BEET=y +# CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set +CONFIG_IPV6_SIT=m +CONFIG_IPV6_TUNNEL=m +CONFIG_IPV6_MULTIPLE_TABLES=y +CONFIG_IPV6_SUBTREES=y +# CONFIG_NETWORK_SECMARK is not set CONFIG_NETFILTER=y # CONFIG_NETFILTER_DEBUG is not set CONFIG_BRIDGE_NETFILTER=y @@ -339,17 +401,40 @@ CONFIG_BRIDGE_NETFILTER=y CONFIG_NETFILTER_NETLINK=m CONFIG_NETFILTER_NETLINK_QUEUE=m CONFIG_NETFILTER_NETLINK_LOG=m +CONFIG_NF_CONNTRACK_ENABLED=m +CONFIG_NF_CONNTRACK_SUPPORT=y +# CONFIG_IP_NF_CONNTRACK_SUPPORT is not set +CONFIG_NF_CONNTRACK=m +CONFIG_NF_CT_ACCT=y +CONFIG_NF_CONNTRACK_MARK=y +CONFIG_NF_CONNTRACK_EVENTS=y +CONFIG_NF_CT_PROTO_GRE=m +# CONFIG_NF_CT_PROTO_SCTP is not set +# CONFIG_NF_CONNTRACK_AMANDA is not set +CONFIG_NF_CONNTRACK_FTP=m +CONFIG_NF_CONNTRACK_H323=m +CONFIG_NF_CONNTRACK_IRC=m +CONFIG_NF_CONNTRACK_NETBIOS_NS=m +CONFIG_NF_CONNTRACK_PPTP=m +CONFIG_NF_CONNTRACK_SANE=m +CONFIG_NF_CONNTRACK_SIP=m +CONFIG_NF_CONNTRACK_TFTP=m +CONFIG_NF_CT_NETLINK=m CONFIG_NETFILTER_XTABLES=m CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m CONFIG_NETFILTER_XT_TARGET_CONNMARK=m +# CONFIG_NETFILTER_XT_TARGET_DSCP is not set CONFIG_NETFILTER_XT_TARGET_MARK=m CONFIG_NETFILTER_XT_TARGET_NFQUEUE=m +CONFIG_NETFILTER_XT_TARGET_NFLOG=m CONFIG_NETFILTER_XT_TARGET_NOTRACK=m +CONFIG_NETFILTER_XT_TARGET_TCPMSS=m CONFIG_NETFILTER_XT_MATCH_COMMENT=m CONFIG_NETFILTER_XT_MATCH_CONNBYTES=m CONFIG_NETFILTER_XT_MATCH_CONNMARK=m CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m CONFIG_NETFILTER_XT_MATCH_DCCP=m +# CONFIG_NETFILTER_XT_MATCH_DSCP is not set CONFIG_NETFILTER_XT_MATCH_ESP=m CONFIG_NETFILTER_XT_MATCH_HELPER=m CONFIG_NETFILTER_XT_MATCH_LENGTH=m @@ -360,61 +445,52 @@ CONFIG_NETFILTER_XT_MATCH_POLICY=m CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m CONFIG_NETFILTER_XT_MATCH_PHYSDEV=m CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m +# CONFIG_NETFILTER_XT_MATCH_QUOTA is not set CONFIG_NETFILTER_XT_MATCH_REALM=m CONFIG_NETFILTER_XT_MATCH_SCTP=m CONFIG_NETFILTER_XT_MATCH_STATE=m +# CONFIG_NETFILTER_XT_MATCH_STATISTIC is not set CONFIG_NETFILTER_XT_MATCH_STRING=m CONFIG_NETFILTER_XT_MATCH_TCPMSS=m +CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=m # # IP: Netfilter Configuration # -CONFIG_IP_NF_CONNTRACK=m -CONFIG_IP_NF_CT_ACCT=y -CONFIG_IP_NF_CONNTRACK_MARK=y -CONFIG_IP_NF_CONNTRACK_EVENTS=y -CONFIG_IP_NF_CONNTRACK_NETLINK=m -# CONFIG_IP_NF_CT_PROTO_SCTP is not set -CONFIG_IP_NF_FTP=m -CONFIG_IP_NF_IRC=m -CONFIG_IP_NF_NETBIOS_NS=m -CONFIG_IP_NF_TFTP=m -# CONFIG_IP_NF_AMANDA is not set -CONFIG_IP_NF_PPTP=m -CONFIG_IP_NF_H323=m +CONFIG_NF_CONNTRACK_IPV4=m +CONFIG_NF_CONNTRACK_PROC_COMPAT=y CONFIG_IP_NF_QUEUE=m CONFIG_IP_NF_IPTABLES=m CONFIG_IP_NF_MATCH_IPRANGE=m CONFIG_IP_NF_MATCH_TOS=m CONFIG_IP_NF_MATCH_RECENT=m CONFIG_IP_NF_MATCH_ECN=m -CONFIG_IP_NF_MATCH_DSCP=m CONFIG_IP_NF_MATCH_AH=m CONFIG_IP_NF_MATCH_TTL=m CONFIG_IP_NF_MATCH_OWNER=m CONFIG_IP_NF_MATCH_ADDRTYPE=m -CONFIG_IP_NF_MATCH_HASHLIMIT=m CONFIG_IP_NF_FILTER=m CONFIG_IP_NF_TARGET_REJECT=m CONFIG_IP_NF_TARGET_LOG=m CONFIG_IP_NF_TARGET_ULOG=m -CONFIG_IP_NF_TARGET_TCPMSS=m -CONFIG_IP_NF_NAT=m -CONFIG_IP_NF_NAT_NEEDED=y +CONFIG_NF_NAT=m +CONFIG_NF_NAT_NEEDED=y CONFIG_IP_NF_TARGET_MASQUERADE=m CONFIG_IP_NF_TARGET_REDIRECT=m CONFIG_IP_NF_TARGET_NETMAP=m CONFIG_IP_NF_TARGET_SAME=m -CONFIG_IP_NF_NAT_SNMP_BASIC=m -CONFIG_IP_NF_NAT_IRC=m -CONFIG_IP_NF_NAT_FTP=m -CONFIG_IP_NF_NAT_TFTP=m -CONFIG_IP_NF_NAT_PPTP=m -CONFIG_IP_NF_NAT_H323=m +CONFIG_NF_NAT_SNMP_BASIC=m +CONFIG_NF_NAT_PROTO_GRE=m +CONFIG_NF_NAT_FTP=m +CONFIG_NF_NAT_IRC=m +CONFIG_NF_NAT_TFTP=m +# CONFIG_NF_NAT_AMANDA is not set +CONFIG_NF_NAT_PPTP=m +CONFIG_NF_NAT_H323=m +CONFIG_NF_NAT_SIP=m CONFIG_IP_NF_MANGLE=m CONFIG_IP_NF_TARGET_TOS=m CONFIG_IP_NF_TARGET_ECN=m -CONFIG_IP_NF_TARGET_DSCP=m CONFIG_IP_NF_TARGET_TTL=m CONFIG_IP_NF_TARGET_CLUSTERIP=m CONFIG_IP_NF_RAW=m @@ -425,6 +501,7 @@ CONFIG_IP_NF_ARP_MANGLE=m # # IPv6: Netfilter Configuration (EXPERIMENTAL) # +CONFIG_NF_CONNTRACK_IPV6=m CONFIG_IP6_NF_QUEUE=m CONFIG_IP6_NF_IPTABLES=m CONFIG_IP6_NF_MATCH_RT=m @@ -434,6 +511,7 @@ CONFIG_IP6_NF_MATCH_HL=m CONFIG_IP6_NF_MATCH_OWNER=m CONFIG_IP6_NF_MATCH_IPV6HEADER=m CONFIG_IP6_NF_MATCH_AH=m +CONFIG_IP6_NF_MATCH_MH=m CONFIG_IP6_NF_MATCH_EUI64=m CONFIG_IP6_NF_FILTER=m CONFIG_IP6_NF_TARGET_LOG=m @@ -445,7 +523,26 @@ CONFIG_IP6_NF_RAW=m # # Bridge: Netfilter Configuration # -# CONFIG_BRIDGE_NF_EBTABLES is not set +CONFIG_BRIDGE_NF_EBTABLES=m +CONFIG_BRIDGE_EBT_BROUTE=m +CONFIG_BRIDGE_EBT_T_FILTER=m +CONFIG_BRIDGE_EBT_T_NAT=m +CONFIG_BRIDGE_EBT_802_3=m +CONFIG_BRIDGE_EBT_AMONG=m +CONFIG_BRIDGE_EBT_ARP=m +CONFIG_BRIDGE_EBT_IP=m +CONFIG_BRIDGE_EBT_LIMIT=m +CONFIG_BRIDGE_EBT_MARK=m +CONFIG_BRIDGE_EBT_PKTTYPE=m +CONFIG_BRIDGE_EBT_STP=m +CONFIG_BRIDGE_EBT_VLAN=m +CONFIG_BRIDGE_EBT_ARPREPLY=m +CONFIG_BRIDGE_EBT_DNAT=m +CONFIG_BRIDGE_EBT_MARK_T=m +CONFIG_BRIDGE_EBT_REDIRECT=m +CONFIG_BRIDGE_EBT_SNAT=m +CONFIG_BRIDGE_EBT_LOG=m +CONFIG_BRIDGE_EBT_ULOG=m # # DCCP Configuration (EXPERIMENTAL) @@ -471,7 +568,6 @@ CONFIG_LLC=y # CONFIG_ATALK is not set # CONFIG_X25 is not set # CONFIG_LAPB is not set -# CONFIG_NET_DIVERT is not set # CONFIG_ECONET is not set # CONFIG_WAN_ROUTER is not set @@ -479,6 +575,7 @@ CONFIG_LLC=y # QoS and/or fair queueing # CONFIG_NET_SCHED=y +CONFIG_NET_SCH_FIFO=y CONFIG_NET_SCH_CLK_JIFFIES=y # CONFIG_NET_SCH_CLK_GETTIMEOFDAY is not set # CONFIG_NET_SCH_CLK_CPU is not set @@ -538,14 +635,15 @@ CONFIG_NET_ESTIMATOR=y # CONFIG_HAMRADIO is not set # CONFIG_IRDA is not set # CONFIG_BT is not set -CONFIG_IEEE80211=y +CONFIG_IEEE80211=m # CONFIG_IEEE80211_DEBUG is not set -CONFIG_IEEE80211_CRYPT_WEP=y -CONFIG_IEEE80211_CRYPT_CCMP=y -CONFIG_IEEE80211_CRYPT_TKIP=y +CONFIG_IEEE80211_CRYPT_WEP=m +CONFIG_IEEE80211_CRYPT_CCMP=m +CONFIG_IEEE80211_CRYPT_TKIP=m CONFIG_IEEE80211_SOFTMAC=m # CONFIG_IEEE80211_SOFTMAC_DEBUG is not set CONFIG_WIRELESS_EXT=y +CONFIG_FIB_RULES=y # # Device Drivers @@ -558,6 +656,8 @@ CONFIG_STANDALONE=y CONFIG_PREVENT_FIRMWARE_BUILD=y CONFIG_FW_LOADER=m # CONFIG_DEBUG_DRIVER is not set +# CONFIG_DEBUG_DEVRES is not set +# CONFIG_SYS_HYPERVISOR is not set # # Connector - unified userspace <-> kernelspace linker @@ -577,6 +677,7 @@ CONFIG_MTD_DEBUG_VERBOSE=0 # User Modules And Translation Layers # CONFIG_MTD_CHAR=m +CONFIG_MTD_BLKDEVS=m CONFIG_MTD_BLOCK=m # CONFIG_MTD_BLOCK_RO is not set CONFIG_FTL=m @@ -584,6 +685,7 @@ CONFIG_NFTL=m # CONFIG_NFTL_RW is not set CONFIG_INFTL=m CONFIG_RFD_FTL=m +# CONFIG_SSFDC is not set # # RAM/ROM/Flash chip drivers @@ -615,7 +717,6 @@ CONFIG_MTD_CFI_I2=y # # CONFIG_MTD_COMPLEX_MAPPINGS is not set # CONFIG_MTD_PHYSMAP is not set -# CONFIG_MTD_SOLUTIONENGINE is not set # CONFIG_MTD_PLATRAM is not set # @@ -639,8 +740,10 @@ CONFIG_MTD_CFI_I2=y # CONFIG_MTD_NAND=m # CONFIG_MTD_NAND_VERIFY_WRITE is not set +# CONFIG_MTD_NAND_ECC_SMC is not set CONFIG_MTD_NAND_IDS=m # CONFIG_MTD_NAND_DISKONCHIP is not set +# CONFIG_MTD_NAND_CAFE is not set # # OneNAND Flash Device Drivers @@ -655,6 +758,7 @@ CONFIG_MTD_NAND_IDS=m # # Plug and Play support # +# CONFIG_PNPACPI is not set # # Block devices @@ -662,7 +766,6 @@ CONFIG_MTD_NAND_IDS=m # CONFIG_BLK_CPQ_DA is not set # CONFIG_BLK_CPQ_CISS_DA is not set # CONFIG_BLK_DEV_DAC960 is not set -CONFIG_BLK_SSFDC=y # CONFIG_BLK_DEV_UMEM is not set # CONFIG_BLK_DEV_COW_COMMON is not set CONFIG_BLK_DEV_LOOP=m @@ -673,11 +776,18 @@ CONFIG_BLK_DEV_CRYPTOLOOP=m CONFIG_BLK_DEV_RAM=y CONFIG_BLK_DEV_RAM_COUNT=16 CONFIG_BLK_DEV_RAM_SIZE=4096 +CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024 CONFIG_BLK_DEV_INITRD=y # CONFIG_CDROM_PKTCDVD is not set CONFIG_ATA_OVER_ETH=m # +# Misc devices +# +# CONFIG_SGI_IOC4 is not set +# CONFIG_TIFM_CORE is not set + +# # ATA/ATAPI/MFM/RLL support # # CONFIG_IDE is not set @@ -687,6 +797,8 @@ CONFIG_ATA_OVER_ETH=m # # CONFIG_RAID_ATTRS is not set CONFIG_SCSI=y +# CONFIG_SCSI_TGT is not set +# CONFIG_SCSI_NETLINK is not set CONFIG_SCSI_PROC_FS=y # @@ -706,14 +818,16 @@ CONFIG_CHR_DEV_SG=m # CONFIG_SCSI_MULTI_LUN is not set # CONFIG_SCSI_CONSTANTS is not set # CONFIG_SCSI_LOGGING is not set +# CONFIG_SCSI_SCAN_ASYNC is not set # -# SCSI Transport Attributes +# SCSI Transports # # CONFIG_SCSI_SPI_ATTRS is not set # CONFIG_SCSI_FC_ATTRS is not set # CONFIG_SCSI_ISCSI_ATTRS is not set # CONFIG_SCSI_SAS_ATTRS is not set +# CONFIG_SCSI_SAS_LIBSAS is not set # # SCSI low-level drivers @@ -726,25 +840,34 @@ CONFIG_CHR_DEV_SG=m # CONFIG_SCSI_AIC7XXX is not set # CONFIG_SCSI_AIC7XXX_OLD is not set # CONFIG_SCSI_AIC79XX is not set +# CONFIG_SCSI_AIC94XX is not set # CONFIG_SCSI_DPT_I2O is not set +# CONFIG_SCSI_ARCMSR is not set # CONFIG_MEGARAID_NEWGEN is not set # CONFIG_MEGARAID_LEGACY is not set # CONFIG_MEGARAID_SAS is not set -# CONFIG_SCSI_SATA is not set +# CONFIG_SCSI_HPTIOP is not set # CONFIG_SCSI_DMX3191D is not set # CONFIG_SCSI_FUTURE_DOMAIN is not set # CONFIG_SCSI_IPS is not set # CONFIG_SCSI_INITIO is not set # CONFIG_SCSI_INIA100 is not set +# CONFIG_SCSI_STEX is not set # CONFIG_SCSI_SYM53C8XX_2 is not set -# CONFIG_SCSI_IPR is not set # CONFIG_SCSI_QLOGIC_1280 is not set # CONFIG_SCSI_QLA_FC is not set +# CONFIG_SCSI_QLA_ISCSI is not set # CONFIG_SCSI_LPFC is not set # CONFIG_SCSI_DC395x is not set # CONFIG_SCSI_DC390T is not set # CONFIG_SCSI_NSP32 is not set # CONFIG_SCSI_DEBUG is not set +# CONFIG_SCSI_SRP is not set + +# +# Serial ATA (prod) and Parallel ATA (experimental) drivers +# +# CONFIG_ATA is not set # # Multi-device support (RAID and LVM) @@ -787,16 +910,7 @@ CONFIG_TUN=m # # PHY device support # -CONFIG_PHYLIB=m - -# -# MII PHY device drivers -# -CONFIG_MARVELL_PHY=m -CONFIG_DAVICOM_PHY=m -CONFIG_QSEMI_PHY=m -CONFIG_LXT_PHY=m -CONFIG_CICADA_PHY=m +# CONFIG_PHYLIB is not set # # Ethernet (10 or 100Mbit) @@ -815,7 +929,6 @@ CONFIG_MII=y # # CONFIG_NET_TULIP is not set # CONFIG_HP100 is not set -# CONFIG_NE2000 is not set CONFIG_NET_PCI=y # CONFIG_PCNET32 is not set # CONFIG_AMD8111_ETH is not set @@ -839,6 +952,7 @@ CONFIG_8139_OLD_RX_RESET=y # CONFIG_SUNDANCE is not set # CONFIG_TLAN is not set # CONFIG_VIA_RHINE is not set +# CONFIG_SC92031 is not set # # Ethernet (1000 Mbit) @@ -857,13 +971,18 @@ CONFIG_8139_OLD_RX_RESET=y # CONFIG_VIA_VELOCITY is not set # CONFIG_TIGON3 is not set # CONFIG_BNX2 is not set +# CONFIG_QLA3XXX is not set +# CONFIG_ATL1 is not set # # Ethernet (10000 Mbit) # # CONFIG_CHELSIO_T1 is not set +# CONFIG_CHELSIO_T3 is not set # CONFIG_IXGB is not set # CONFIG_S2IO is not set +# CONFIG_MYRI10GE is not set +# CONFIG_NETXEN_NIC is not set # # Token Ring devices @@ -893,6 +1012,7 @@ CONFIG_NET_WIRELESS_RTNETLINK=y # Prism GT/Duette 802.11(a/b/g) PCI/Cardbus support # CONFIG_PRISM54=m +# CONFIG_USB_ZD1201 is not set # CONFIG_HOSTAP is not set CONFIG_BCM43XX=m CONFIG_BCM43XX_DEBUG=y @@ -901,6 +1021,7 @@ CONFIG_BCM43XX_PIO=y CONFIG_BCM43XX_DMA_AND_PIO_MODE=y # CONFIG_BCM43XX_DMA_MODE is not set # CONFIG_BCM43XX_PIO_MODE is not set +# CONFIG_ZD1211RW is not set CONFIG_NET_WIRELESS=y # @@ -920,6 +1041,7 @@ CONFIG_PPP_MPPE=m CONFIG_PPPOE=m CONFIG_SLIP=m CONFIG_SLIP_COMPRESSED=y +CONFIG_SLHC=m CONFIG_SLIP_SMART=y # CONFIG_SLIP_MODE_SLIP6 is not set # CONFIG_NET_FC is not set @@ -942,6 +1064,7 @@ CONFIG_SLIP_SMART=y # Input device support # CONFIG_INPUT=y +# CONFIG_INPUT_FF_MEMLESS is not set # # Userland interfaces @@ -976,6 +1099,7 @@ CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 CONFIG_VT=y CONFIG_VT_CONSOLE=y CONFIG_HW_CONSOLE=y +# CONFIG_VT_HW_CONSOLE_BINDING is not set # CONFIG_SERIAL_NONSTANDARD is not set # @@ -987,6 +1111,7 @@ CONFIG_HW_CONSOLE=y # Non-8250 serial port support # CONFIG_SERIAL_SH_SCI=y +CONFIG_SERIAL_SH_SCI_NR_UARTS=2 CONFIG_SERIAL_SH_SCI_CONSOLE=y CONFIG_SERIAL_CORE=y CONFIG_SERIAL_CORE_CONSOLE=y @@ -1011,6 +1136,7 @@ CONFIG_WATCHDOG=y # # CONFIG_SOFT_WATCHDOG is not set CONFIG_SH_WDT=m +# CONFIG_SH_WDT_MMAP is not set # # PCI-based Watchdog Cards @@ -1022,15 +1148,11 @@ CONFIG_SH_WDT=m # USB-based Watchdog Cards # # CONFIG_USBPCWATCHDOG is not set -# CONFIG_RTC is not set +CONFIG_HW_RANDOM=y # CONFIG_GEN_RTC is not set # CONFIG_DTLK is not set # CONFIG_R3964 is not set # CONFIG_APPLICOM is not set - -# -# Ftape, the floppy tape device driver -# # CONFIG_DRM is not set # CONFIG_RAW_DRIVER is not set @@ -1038,7 +1160,6 @@ CONFIG_SH_WDT=m # TPM devices # # CONFIG_TCG_TPM is not set -# CONFIG_TELCLOCK is not set # # I2C support @@ -1061,18 +1182,21 @@ CONFIG_SH_WDT=m # CONFIG_HWMON=y # CONFIG_HWMON_VID is not set +# CONFIG_SENSORS_ABITUGURU is not set # CONFIG_SENSORS_F71805F is not set +# CONFIG_SENSORS_PC87427 is not set +# CONFIG_SENSORS_VT1211 is not set # CONFIG_HWMON_DEBUG_CHIP is not set # -# Misc devices +# Multifunction device drivers # +# CONFIG_MFD_SM501 is not set # # Multimedia devices # # CONFIG_VIDEO_DEV is not set -CONFIG_VIDEO_V4L2=y # # Digital Video Broadcasting Devices @@ -1083,6 +1207,7 @@ CONFIG_VIDEO_V4L2=y # # Graphics support # +# CONFIG_BACKLIGHT_LCD_SUPPORT is not set # CONFIG_FB is not set # @@ -1096,6 +1221,12 @@ CONFIG_DUMMY_CONSOLE=y # CONFIG_SOUND is not set # +# HID Devices +# +CONFIG_HID=y +# CONFIG_HID_DEBUG is not set + +# # USB support # CONFIG_USB_ARCH_HAS_HCD=y @@ -1108,7 +1239,6 @@ CONFIG_USB=y # Miscellaneous USB options # CONFIG_USB_DEVICEFS=y -# CONFIG_USB_BANDWIDTH is not set # CONFIG_USB_DYNAMIC_MINORS is not set # CONFIG_USB_OTG is not set @@ -1116,11 +1246,14 @@ CONFIG_USB_DEVICEFS=y # USB Host Controller Drivers # CONFIG_USB_EHCI_HCD=y -# CONFIG_USB_EHCI_SPLIT_ISO is not set -# CONFIG_USB_EHCI_ROOT_HUB_TT is not set +CONFIG_USB_EHCI_SPLIT_ISO=y +CONFIG_USB_EHCI_ROOT_HUB_TT=y +CONFIG_USB_EHCI_TT_NEWSCHED=y +# CONFIG_USB_EHCI_BIG_ENDIAN_MMIO is not set # CONFIG_USB_ISP116X_HCD is not set CONFIG_USB_OHCI_HCD=y -# CONFIG_USB_OHCI_BIG_ENDIAN is not set +# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set +# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set CONFIG_USB_OHCI_LITTLE_ENDIAN=y # CONFIG_USB_UHCI_HCD is not set # CONFIG_USB_SL811_HCD is not set @@ -1148,6 +1281,7 @@ CONFIG_USB_STORAGE=y # CONFIG_USB_STORAGE_SDDR55 is not set # CONFIG_USB_STORAGE_JUMPSHOT is not set # CONFIG_USB_STORAGE_ALAUDA is not set +# CONFIG_USB_STORAGE_KARMA is not set # CONFIG_USB_LIBUSUAL is not set # @@ -1172,6 +1306,7 @@ CONFIG_USB_STORAGE=y # CONFIG_USB_ATI_REMOTE2 is not set # CONFIG_USB_KEYSPAN_REMOTE is not set # CONFIG_USB_APPLETOUCH is not set +# CONFIG_USB_GTCO is not set # # USB Imaging devices @@ -1182,13 +1317,23 @@ CONFIG_USB_STORAGE=y # # USB Network Adapters # -# CONFIG_USB_CATC is not set -# CONFIG_USB_KAWETH is not set -# CONFIG_USB_PEGASUS is not set -# CONFIG_USB_RTL8150 is not set -# CONFIG_USB_USBNET is not set -# CONFIG_USB_ZD1201 is not set -CONFIG_USB_MON=y +CONFIG_USB_CATC=m +CONFIG_USB_KAWETH=m +CONFIG_USB_PEGASUS=m +CONFIG_USB_RTL8150=m +CONFIG_USB_USBNET_MII=m +CONFIG_USB_USBNET=m +CONFIG_USB_NET_AX8817X=m +CONFIG_USB_NET_CDCETHER=m +# CONFIG_USB_NET_DM9601 is not set +# CONFIG_USB_NET_GL620A is not set +CONFIG_USB_NET_NET1080=m +CONFIG_USB_NET_PLUSB=m +# CONFIG_USB_NET_MCS7830 is not set +# CONFIG_USB_NET_RNDIS_HOST is not set +# CONFIG_USB_NET_CDC_SUBSET is not set +CONFIG_USB_NET_ZAURUS=m +# CONFIG_USB_MON is not set # # USB port drivers @@ -1199,8 +1344,8 @@ CONFIG_USB_MON=y # CONFIG_USB_SERIAL=m CONFIG_USB_SERIAL_GENERIC=y +# CONFIG_USB_SERIAL_AIRCABLE is not set # CONFIG_USB_SERIAL_AIRPRIME is not set -# CONFIG_USB_SERIAL_ANYDATA is not set CONFIG_USB_SERIAL_ARK3116=m # CONFIG_USB_SERIAL_BELKIN is not set # CONFIG_USB_SERIAL_WHITEHEAT is not set @@ -1222,31 +1367,42 @@ CONFIG_USB_SERIAL_ARK3116=m # CONFIG_USB_SERIAL_KLSI is not set # CONFIG_USB_SERIAL_KOBIL_SCT is not set # CONFIG_USB_SERIAL_MCT_U232 is not set +# CONFIG_USB_SERIAL_MOS7720 is not set +# CONFIG_USB_SERIAL_MOS7840 is not set # CONFIG_USB_SERIAL_NAVMAN is not set CONFIG_USB_SERIAL_PL2303=m # CONFIG_USB_SERIAL_HP4X is not set # CONFIG_USB_SERIAL_SAFE is not set +# CONFIG_USB_SERIAL_SIERRAWIRELESS is not set # CONFIG_USB_SERIAL_TI is not set # CONFIG_USB_SERIAL_CYBERJACK is not set # CONFIG_USB_SERIAL_XIRCOM is not set +# CONFIG_USB_SERIAL_OPTION is not set # CONFIG_USB_SERIAL_OMNINET is not set +# CONFIG_USB_SERIAL_DEBUG is not set # # USB Miscellaneous drivers # # CONFIG_USB_EMI62 is not set # CONFIG_USB_EMI26 is not set +# CONFIG_USB_ADUTUX is not set # CONFIG_USB_AUERSWALD is not set # CONFIG_USB_RIO500 is not set # CONFIG_USB_LEGOTOWER is not set # CONFIG_USB_LCD is not set +# CONFIG_USB_BERRY_CHARGE is not set # CONFIG_USB_LED is not set +# CONFIG_USB_CYPRESS_CY7C63 is not set # CONFIG_USB_CYTHERM is not set -# CONFIG_USB_PHIDGETKIT is not set -# CONFIG_USB_PHIDGETSERVO is not set +# CONFIG_USB_PHIDGET is not set # CONFIG_USB_IDMOUSE is not set +# CONFIG_USB_FTDI_ELAN is not set +# CONFIG_USB_APPLEDISPLAY is not set # CONFIG_USB_SISUSBVGA is not set # CONFIG_USB_LD is not set +# CONFIG_USB_TRANCEVIBRATOR is not set +# CONFIG_USB_IOWARRIOR is not set # CONFIG_USB_TEST is not set # @@ -1288,7 +1444,47 @@ CONFIG_USB_SERIAL_PL2303=m # # Real Time Clock # -# CONFIG_RTC_CLASS is not set +CONFIG_RTC_LIB=m +CONFIG_RTC_CLASS=m + +# +# RTC interfaces +# +CONFIG_RTC_INTF_SYSFS=m +CONFIG_RTC_INTF_PROC=m +CONFIG_RTC_INTF_DEV=m +CONFIG_RTC_INTF_DEV_UIE_EMUL=y + +# +# RTC drivers +# +# CONFIG_RTC_DRV_DS1553 is not set +# CONFIG_RTC_DRV_DS1742 is not set +# CONFIG_RTC_DRV_M48T86 is not set +CONFIG_RTC_DRV_SH=m +# CONFIG_RTC_DRV_TEST is not set +# CONFIG_RTC_DRV_V3020 is not set + +# +# DMA Engine support +# +# CONFIG_DMA_ENGINE is not set + +# +# DMA Clients +# + +# +# DMA Devices +# + +# +# Auxiliary Display support +# + +# +# Virtualization +# # # File systems @@ -1298,8 +1494,12 @@ CONFIG_EXT2_FS=y # CONFIG_EXT2_FS_XIP is not set CONFIG_EXT3_FS=y # CONFIG_EXT3_FS_XATTR is not set +CONFIG_EXT4DEV_FS=m +# CONFIG_EXT4DEV_FS_XATTR is not set CONFIG_JBD=y # CONFIG_JBD_DEBUG is not set +CONFIG_JBD2=m +# CONFIG_JBD2_DEBUG is not set CONFIG_REISERFS_FS=m # CONFIG_REISERFS_CHECK is not set # CONFIG_REISERFS_PROC_INFO is not set @@ -1307,15 +1507,16 @@ CONFIG_REISERFS_FS=m # CONFIG_JFS_FS is not set # CONFIG_FS_POSIX_ACL is not set CONFIG_XFS_FS=m -CONFIG_XFS_EXPORT=y # CONFIG_XFS_QUOTA is not set # CONFIG_XFS_SECURITY is not set # CONFIG_XFS_POSIX_ACL is not set # CONFIG_XFS_RT is not set +# CONFIG_GFS2_FS is not set # CONFIG_OCFS2_FS is not set # CONFIG_MINIX_FS is not set -# CONFIG_ROMFS_FS is not set +CONFIG_ROMFS_FS=y CONFIG_INOTIFY=y +CONFIG_INOTIFY_USER=y # CONFIG_QUOTA is not set CONFIG_DNOTIFY=y # CONFIG_AUTOFS_FS is not set @@ -1328,7 +1529,6 @@ CONFIG_FUSE_FS=m CONFIG_ISO9660_FS=m CONFIG_JOLIET=y CONFIG_ZISOFS=y -CONFIG_ZISOFS_FS=m CONFIG_UDF_FS=m CONFIG_UDF_NLS=y @@ -1347,8 +1547,10 @@ CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" # CONFIG_PROC_FS=y CONFIG_PROC_KCORE=y +CONFIG_PROC_SYSCTL=y CONFIG_SYSFS=y CONFIG_TMPFS=y +# CONFIG_TMPFS_POSIX_ACL is not set # CONFIG_HUGETLBFS is not set # CONFIG_HUGETLB_PAGE is not set CONFIG_RAMFS=y @@ -1364,7 +1566,6 @@ CONFIG_CONFIGFS_FS=m # CONFIG_BEFS_FS is not set # CONFIG_BFS_FS is not set # CONFIG_EFS_FS is not set -# CONFIG_JFFS_FS is not set # CONFIG_JFFS2_FS is not set # CONFIG_CRAMFS is not set # CONFIG_VXFS_FS is not set @@ -1396,7 +1597,12 @@ CONFIG_SUNRPC=y # CONFIG_RPCSEC_GSS_SPKM3 is not set CONFIG_SMB_FS=m # CONFIG_SMB_NLS_DEFAULT is not set -# CONFIG_CIFS is not set +CONFIG_CIFS=m +# CONFIG_CIFS_STATS is not set +CONFIG_CIFS_WEAK_PW_HASH=y +# CONFIG_CIFS_XATTR is not set +# CONFIG_CIFS_DEBUG2 is not set +# CONFIG_CIFS_EXPERIMENTAL is not set # CONFIG_NCP_FS is not set # CONFIG_CODA_FS is not set # CONFIG_AFS_FS is not set @@ -1468,33 +1674,57 @@ CONFIG_NLS_ISO8859_1=m CONFIG_NLS_UTF8=m # +# Distributed Lock Manager +# +# CONFIG_DLM is not set + +# # Profiling support # -# CONFIG_PROFILING is not set +CONFIG_PROFILING=y +CONFIG_OPROFILE=y # # Kernel hacking # +CONFIG_TRACE_IRQFLAGS_SUPPORT=y # CONFIG_PRINTK_TIME is not set +CONFIG_ENABLE_MUST_CHECK=y CONFIG_MAGIC_SYSRQ=y +# CONFIG_UNUSED_SYMBOLS is not set +# CONFIG_DEBUG_FS is not set +# CONFIG_HEADERS_CHECK is not set CONFIG_DEBUG_KERNEL=y +# CONFIG_DEBUG_SHIRQ is not set CONFIG_LOG_BUF_SHIFT=16 # CONFIG_DETECT_SOFTLOCKUP is not set # CONFIG_SCHEDSTATS is not set +# CONFIG_TIMER_STATS is not set # CONFIG_DEBUG_SLAB is not set -# CONFIG_DEBUG_MUTEXES is not set +# CONFIG_DEBUG_RT_MUTEXES is not set +# CONFIG_RT_MUTEX_TESTER is not set # CONFIG_DEBUG_SPINLOCK is not set +# CONFIG_DEBUG_MUTEXES is not set +# CONFIG_DEBUG_LOCK_ALLOC is not set +# CONFIG_PROVE_LOCKING is not set # CONFIG_DEBUG_SPINLOCK_SLEEP is not set +# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set # CONFIG_DEBUG_KOBJECT is not set +# CONFIG_DEBUG_BUGVERBOSE is not set # CONFIG_DEBUG_INFO is not set -# CONFIG_DEBUG_FS is not set # CONFIG_DEBUG_VM is not set -# CONFIG_FRAME_POINTER is not set +# CONFIG_DEBUG_LIST is not set +CONFIG_FRAME_POINTER=y # CONFIG_FORCED_INLINING is not set # CONFIG_RCU_TORTURE_TEST is not set +# CONFIG_FAULT_INJECTION is not set # CONFIG_SH_STANDARD_BIOS is not set CONFIG_EARLY_SCIF_CONSOLE=y -# CONFIG_EARLY_PRINTK is not set +CONFIG_EARLY_SCIF_CONSOLE_PORT=0xffe80000 +CONFIG_EARLY_PRINTK=y +# CONFIG_DEBUG_STACKOVERFLOW is not set +# CONFIG_DEBUG_STACK_USAGE is not set +# CONFIG_4KSTACKS is not set # CONFIG_KGDB is not set # @@ -1507,7 +1737,12 @@ CONFIG_EARLY_SCIF_CONSOLE=y # Cryptographic options # CONFIG_CRYPTO=y +CONFIG_CRYPTO_ALGAPI=y +CONFIG_CRYPTO_BLKCIPHER=y +CONFIG_CRYPTO_HASH=y +CONFIG_CRYPTO_MANAGER=y CONFIG_CRYPTO_HMAC=y +CONFIG_CRYPTO_XCBC=m CONFIG_CRYPTO_NULL=m CONFIG_CRYPTO_MD4=m CONFIG_CRYPTO_MD5=y @@ -1516,9 +1751,16 @@ CONFIG_CRYPTO_SHA256=m CONFIG_CRYPTO_SHA512=m CONFIG_CRYPTO_WP512=m CONFIG_CRYPTO_TGR192=m +CONFIG_CRYPTO_GF128MUL=m +CONFIG_CRYPTO_ECB=y +CONFIG_CRYPTO_CBC=y +CONFIG_CRYPTO_PCBC=m +CONFIG_CRYPTO_LRW=m CONFIG_CRYPTO_DES=y +CONFIG_CRYPTO_FCRYPT=m CONFIG_CRYPTO_BLOWFISH=m CONFIG_CRYPTO_TWOFISH=m +CONFIG_CRYPTO_TWOFISH_COMMON=m CONFIG_CRYPTO_SERPENT=m CONFIG_CRYPTO_AES=y CONFIG_CRYPTO_CAST5=m @@ -1530,6 +1772,7 @@ CONFIG_CRYPTO_ANUBIS=m CONFIG_CRYPTO_DEFLATE=y CONFIG_CRYPTO_MICHAEL_MIC=y CONFIG_CRYPTO_CRC32C=m +CONFIG_CRYPTO_CAMELLIA=m # CONFIG_CRYPTO_TEST is not set # @@ -1539,6 +1782,7 @@ CONFIG_CRYPTO_CRC32C=m # # Library routines # +CONFIG_BITREVERSE=y CONFIG_CRC_CCITT=m CONFIG_CRC16=m CONFIG_CRC32=y @@ -1549,3 +1793,6 @@ CONFIG_TEXTSEARCH=y CONFIG_TEXTSEARCH_KMP=m CONFIG_TEXTSEARCH_BM=m CONFIG_TEXTSEARCH_FSM=m +CONFIG_PLIST=y +CONFIG_HAS_IOMEM=y +CONFIG_HAS_IOPORT=y diff --git a/packages/linux/linux-titan-sh4/titan-flash.patch b/packages/linux/linux-titan-sh4/titan-flash.patch index fc633f3e05..c84adcdb8c 100644 --- a/packages/linux/linux-titan-sh4/titan-flash.patch +++ b/packages/linux/linux-titan-sh4/titan-flash.patch @@ -1,14 +1,14 @@ - Add the driver for onboard flash. The quality of this driver means that it has not been included in the -upstream CVS. -This implements the block device translation layer to match what the +upstream kernel sources. +This implements a block device translation layer to match what the onboard firmware implements. -diff -duNr linux-2.6.16-orig/drivers/block/Kconfig linux-2.6.16/drivers/block/Kconfig ---- linux-2.6.16-orig/drivers/block/Kconfig 2006-06-29 16:12:57.000000000 +1000 -+++ linux-2.6.16/drivers/block/Kconfig 2006-06-29 16:13:27.000000000 +1000 -@@ -190,6 +190,13 @@ +diff --git a/drivers/block/Kconfig b/drivers/block/Kconfig +index 58c1deb..9668ac7 100644 +--- a/drivers/block/Kconfig ++++ b/drivers/block/Kconfig +@@ -186,6 +186,13 @@ config BLK_DEV_DAC960 To compile this driver as a module, choose M here: the module will be called DAC960. @@ -16,16 +16,17 @@ diff -duNr linux-2.6.16-orig/drivers/block/Kconfig linux-2.6.16/drivers/block/Kc + tristate "SmartMedia(TM) Driver (sm)" + depends on SH_TITAN + help -+ Say Y here if you want the SmartMedia chip enabled. ++ Say Y here if you want the SmartMedia chip enabled. + Otherwise say N. + config BLK_DEV_UMEM tristate "Micro Memory MM5415 Battery Backed RAM support (EXPERIMENTAL)" depends on PCI && EXPERIMENTAL -diff -duNr linux-2.6.16-orig/drivers/block/Makefile linux-2.6.16/drivers/block/Makefile ---- linux-2.6.16-orig/drivers/block/Makefile 2006-06-29 16:12:57.000000000 +1000 -+++ linux-2.6.16/drivers/block/Makefile 2006-06-29 16:13:27.000000000 +1000 -@@ -21,6 +21,7 @@ +diff --git a/drivers/block/Makefile b/drivers/block/Makefile +index dd88e33..37fc9e8 100644 +--- a/drivers/block/Makefile ++++ b/drivers/block/Makefile +@@ -19,6 +19,7 @@ obj-$(CONFIG_BLK_DEV_XD) += xd.o obj-$(CONFIG_BLK_CPQ_DA) += cpqarray.o obj-$(CONFIG_BLK_CPQ_CISS_DA) += cciss.o obj-$(CONFIG_BLK_DEV_DAC960) += DAC960.o @@ -33,10 +34,12 @@ diff -duNr linux-2.6.16-orig/drivers/block/Makefile linux-2.6.16/drivers/block/M obj-$(CONFIG_CDROM_PKTCDVD) += pktcdvd.o obj-$(CONFIG_BLK_DEV_UMEM) += umem.o -diff -duNr linux-2.6.16-orig/drivers/block/ssfdc.c linux-2.6.16/drivers/block/ssfdc.c ---- linux-2.6.16-orig/drivers/block/ssfdc.c 1970-01-01 10:00:00.000000000 +1000 -+++ linux-2.6.16/drivers/block/ssfdc.c 2006-06-29 16:13:50.000000000 +1000 -@@ -0,0 +1,2742 @@ +diff --git a/drivers/block/ssfdc.c b/drivers/block/ssfdc.c +new file mode 100644 +index 0000000..482d617 +--- /dev/null ++++ b/drivers/block/ssfdc.c +@@ -0,0 +1,2733 @@ +/* $id: $ +ssfdc.c - Solid State Flopyy Disk Card + @@ -102,7 +105,6 @@ diff -duNr linux-2.6.16-orig/drivers/block/ssfdc.c linux-2.6.16/drivers/block/ss +#include <linux/errno.h> +#include <linux/major.h> +#include <linux/init.h> -+#include <linux/devfs_fs_kernel.h> +#include <asm/uaccess.h> +#include <asm/hardirq.h> +#include <linux/bio.h> @@ -122,7 +124,6 @@ diff -duNr linux-2.6.16-orig/drivers/block/ssfdc.c linux-2.6.16/drivers/block/ss +static ssfdc_dev *ssfdc[MAX_SSFDC]; + +static int ssfdc_open(struct inode *i_node, struct file *fptr); -+static int ssfdc_getgeo(struct block_device *bdev, struct hd_geometry *geo); +static int ssfdc_release(struct inode *i_node, struct file *fptr); +static int ssfdc_ioctl(struct inode *i_node, struct file *fptr, unsigned cmd, unsigned long arg); +static int ssfdc_revalidate(struct gendisk *disk); @@ -131,7 +132,6 @@ diff -duNr linux-2.6.16-orig/drivers/block/ssfdc.c linux-2.6.16/drivers/block/ss +static struct block_device_operations ssfdc_fops = { + .owner = THIS_MODULE, + .open = ssfdc_open, -+ .getgeo = ssfdc_getgeo, + .release = ssfdc_release, + .ioctl = ssfdc_ioctl, + // bjm out .revalidate_disk = ssfdc_revalidate, @@ -2387,7 +2387,10 @@ diff -duNr linux-2.6.16-orig/drivers/block/ssfdc.c linux-2.6.16/drivers/block/ss + +static int ssfdc_ioctl(struct inode *i_node, struct file *fptr, unsigned cmd, unsigned long arg) +{ -+ int drive, int_val; ++ int err, drive, int_val; ++ unsigned char heads, sectors; ++ unsigned int cylinders; ++ struct hd_geometry geo; + ssfdc_dev *psm; + +#if DEBUG_SSFDC @@ -2428,33 +2431,28 @@ diff -duNr linux-2.6.16-orig/drivers/block/ssfdc.c linux-2.6.16/drivers/block/ss + printk(KERN_DEBUG "ssfdc_ioctl(BLKGETSIZE) not handled.\n"); +#endif + break; ++ ++ case HDIO_GETGEO: ++ if ((void *) arg == NULL) return -EINVAL; ++ if (!access_ok(VERIFY_WRITE, (void __user *)arg, sizeof(geo))) ++ return -EFAULT; ++ if ((err=CheckLogCHS( psm, &cylinders, &heads, §ors))) ++ return ssfdc_maperror(err); ++ memset(&geo, 0, sizeof(geo)); ++ geo.cylinders = cylinders; ++ geo.heads = heads; ++ geo.sectors = sectors; ++ geo.start = get_start_sect(i_node->i_bdev); ++ if (copy_to_user((void *) arg, &geo, sizeof(geo))) ++ return -EFAULT; ++ if (copy_to_user((void *) arg, &geo, sizeof(geo))) ++ return -EFAULT; ++ return 0; + } + return -EINVAL; +} + + -+static int ssfdc_getgeo(struct block_device *bdev, struct hd_geometry *geo) -+{ -+ unsigned char heads, sectors; -+ unsigned int cylinders; -+ struct gendisk *disk = bdev->bd_disk; -+ ssfdc_dev *psm = disk->private_data; -+ int drive = psm->sm_minor; -+ int err; -+ -+ if (drive < 0 || drive >= MAX_SSFDC) -+ return -ENODEV; -+ -+ err = CheckLogCHS(psm, &cylinders, &heads, §ors); -+ if (err) -+ return ssfdc_maperror(err); -+ -+ geo->heads = heads; -+ geo->sectors = sectors; -+ geo->cylinders = cylinders; -+ return 0; -+} -+ + +static int ssfdc_revalidate(struct gendisk *disk) +{ @@ -2514,14 +2512,11 @@ diff -duNr linux-2.6.16-orig/drivers/block/ssfdc.c linux-2.6.16/drivers/block/ss + goto busy_error; + } + -+ devfs_mk_dir("sm"); -+ + for ( i=0; i < MAX_SSFDC; ++i) { + disks[i]->major = SSFDC_MAJOR; + disks[i]->first_minor = i << SSFDC_PARTN_BITS; + disks[i]->fops = &ssfdc_fops; + sprintf(disks[i]->disk_name, "sm%d", i); -+ sprintf(disks[i]->devfs_name, "sm/%d", i); + disks[i]->private_data = ssfdc[i]; + ssfdc_init_device(ssfdc[i], i << SSFDC_PARTN_BITS, + CPLD_BASE_ADDRESS + SMART_MEDIA_ONE_OFFSET); @@ -2592,7 +2587,6 @@ diff -duNr linux-2.6.16-orig/drivers/block/ssfdc.c linux-2.6.16/drivers/block/ss + + if (unregister_blkdev(SSFDC_MAJOR, "smartmedia")) + printk(KERN_WARNING "smartmedia: cannot unregister blkdev\n"); -+ devfs_remove("sm"); +} + +#if DEBUG_SSFDC @@ -2779,9 +2773,11 @@ diff -duNr linux-2.6.16-orig/drivers/block/ssfdc.c linux-2.6.16/drivers/block/ss +MODULE_LICENSE("GPL"); + +/* End of Linux Driver Modifications */ -diff -duNr linux-2.6.16-orig/drivers/block/ssfdc.h linux-2.6.16/drivers/block/ssfdc.h ---- linux-2.6.16-orig/drivers/block/ssfdc.h 1970-01-01 10:00:00.000000000 +1000 -+++ linux-2.6.16/drivers/block/ssfdc.h 2006-06-29 16:13:27.000000000 +1000 +diff --git a/drivers/block/ssfdc.h b/drivers/block/ssfdc.h +new file mode 100644 +index 0000000..06f4a3c +--- /dev/null ++++ b/drivers/block/ssfdc.h @@ -0,0 +1,372 @@ +/* $id: $ */ +#ifndef _SSFDC_H diff --git a/packages/linux/linux-titan-sh4_2.6.17.bb b/packages/linux/linux-titan-sh4_2.6.21.bb index 5069510bfe..ee890e2415 100644 --- a/packages/linux/linux-titan-sh4_2.6.17.bb +++ b/packages/linux/linux-titan-sh4_2.6.21.bb @@ -1,12 +1,12 @@ SECTION = "kernel" -DESCRIPTION = "Linux kernel for SH4 based TITAN router appliance" +DESCRIPTION = "Linux kernel for SH4 based TITAN (NP51R/LinkGear Series 100) router appliance" LICENSE = "GPL" -PR = "r2" +PR = "r0" SRC_URI = "${KERNELORG_MIRROR}/pub/linux/kernel/v2.6/linux-${PV}.tar.bz2 \ - cvs://anonymous@linuxsh.cvs.sourceforge.net/cvsroot/linuxsh;module=linux;date=20060726 \ file://titan-flash.patch;patch=1 \ file://titan-pcibios-scan-update.patch;patch=1 \ + file://no-mm-mutex.patch;patch=1 \ file://titan-config" S = "${WORKDIR}/linux-${PV}" @@ -20,16 +20,6 @@ KERNEL_IMAGETYPE = "zImage" KERNEL_OUTPUT = "arch/${ARCH}/boot/${KERNEL_IMAGETYPE}" # -# The linux-sh cvs tree is a "drop in source tree" and needs to be copied -# over the top of the normal linux source since it only includes modified -# files. -# -do_unpack_extra(){ - cp -pPR ${WORKDIR}/linux/* ${S} -} -addtask unpack_extra after do_unpack before do_patch - -# # Use an updated defconfig which includes the flash driver # The flash driver quality doesn't allow it to be a part of the main kernel # @@ -37,12 +27,3 @@ do_configure_prepend() { install -m 0644 ${WORKDIR}/titan-config ${S}/arch/sh/configs/titan_defconfig yes '' | oe_runmake titan_defconfig } - -# -# Should I make the nfs boot image? -# -#do_deploy_titan() { -# To NFS boot you need to objcopy the image... -# ${HOST_PREFIX}objcopy -O binary -R .note -R .comment -S arch/sh/boot/compressed/vmlinux ${DEPLOY_DIR}/linux.bin -#} -#addtask deploy before do_build after do_compile diff --git a/packages/linux/linux-x86-2.6.20/defconfig b/packages/linux/linux-x86-2.6.20/defconfig index 2b7dc6a3f7..ed299d667d 100644 --- a/packages/linux/linux-x86-2.6.20/defconfig +++ b/packages/linux/linux-x86-2.6.20/defconfig @@ -702,7 +702,7 @@ CONFIG_S2IO=m # # Wireless LAN (non-hamradio) # -# CONFIG_NET_RADIO is not set +CONFIG_NET_RADIO=y # # Wan interfaces diff --git a/packages/linux/mx21ads-kernel_2.6.19rc6.bb b/packages/linux/mx21ads-kernel_2.6.19rc6.bb index f218904c43..579bedd8d6 100644 --- a/packages/linux/mx21ads-kernel_2.6.19rc6.bb +++ b/packages/linux/mx21ads-kernel_2.6.19rc6.bb @@ -16,7 +16,6 @@ COMPATIBLE_HOST = 'arm.*-linux' COMPATIBLE_MACHINE = "mx21ads" inherit kernel -inherit package ARCH = "arm" KERNEL_IMAGETYPE = "zImage" |