ludeos: Added nas100d/ludeos distribution, including nas100d-kernel.

11 files changed, 2095 insertions, 0 deletions

diff --git a/packages/linux/nas100d-kernel/.mtn2git_empty b/packages/linux/nas100d-kernel/.mtn2git_empty
new file mode 100644
index 0000000000..e69de29bb2
--- /dev/null
+++ b/packages/linux/nas100d-kernel/.mtn2git_empty
diff --git a/packages/linux/nas100d-kernel/2.6.14/.mtn2git_empty b/packages/linux/nas100d-kernel/2.6.14/.mtn2git_empty
new file mode 100644
index 0000000000..e69de29bb2
--- /dev/null
+++ b/packages/linux/nas100d-kernel/2.6.14/.mtn2git_empty
diff --git a/packages/linux/nas100d-kernel/2.6.14/10-ixp4xx-copy-from.patch b/packages/linux/nas100d-kernel/2.6.14/10-ixp4xx-copy-from.patch
new file mode 100644
index 0000000000..f3da2e093f
--- /dev/null
+++ b/packages/linux/nas100d-kernel/2.6.14/10-ixp4xx-copy-from.patch
@@ -0,0 +1,73 @@
+--- linux-2.6.14/drivers/mtd/maps/ixp4xx.c	2005-10-27 17:02:08.000000000 -0700
++++ linux-2.6.14/drivers/mtd/maps/ixp4xx.c	2005-10-29 23:11:24.990820968 -0700
+@@ -38,10 +38,14 @@
+ #define	BYTE1(h)	((h) & 0xFF)
+ #endif
+ 
++#define FLASHWORD(a)	(*(__u16*)(a))
++#define FLASHVAL(a)	FLASHWORD(a)
++#define FLASHSET(a,v)	do { FLASHWORD(a) = (v); } while (0)
++
+ static map_word ixp4xx_read16(struct map_info *map, unsigned long ofs)
+ {
+ 	map_word val;
+-	val.x[0] = *(__u16 *) (map->map_priv_1 + ofs);
++	val.x[0] = FLASHVAL(map->map_priv_1 + ofs);
+ 	return val;
+ }
+ 
+@@ -53,19 +57,25 @@ static map_word ixp4xx_read16(struct map
+ static void ixp4xx_copy_from(struct map_info *map, void *to,
+ 			     unsigned long from, ssize_t len)
+ {
+-	int i;
+-	u8 *dest = (u8 *) to;
+-	u16 *src = (u16 *) (map->map_priv_1 + from);
+-	u16 data;
+-
+-	for (i = 0; i < (len / 2); i++) {
+-		data = src[i];
+-		dest[i * 2] = BYTE0(data);
+-		dest[i * 2 + 1] = BYTE1(data);
++	u8 *dest, *src;
++
++	if (len <= 0)
++		return;
++
++	dest = (u8 *) to;
++	src  = (u8 *) (map->map_priv_1 + from);
++	if (from & 1)
++		*dest++ = BYTE1(FLASHVAL(src-1)), ++src, --len;
++
++	while (len >= 2) {
++		u16 data = FLASHVAL(src); src += 2;
++		*dest++ = BYTE0(data);
++		*dest++ = BYTE1(data);
++		len -= 2;
+ 	}
+ 
+-	if (len & 1)
+-		dest[len - 1] = BYTE0(src[i]);
++	if (len > 0)
++		*dest++ = BYTE0(FLASHVAL(src));
+ }
+ 
+ /* 
+@@ -75,7 +85,7 @@ static void ixp4xx_copy_from(struct map_
+ static void ixp4xx_probe_write16(struct map_info *map, map_word d, unsigned long adr)
+ {
+ 	if (!(adr & 1))
+-	       *(__u16 *) (map->map_priv_1 + adr) = d.x[0];
++	       FLASHSET(map->map_priv_1 + adr, d.x[0]);
+ }
+ 
+ /* 
+@@ -83,7 +93,7 @@ static void ixp4xx_probe_write16(struct 
+  */
+ static void ixp4xx_write16(struct map_info *map, map_word d, unsigned long adr)
+ {
+-       *(__u16 *) (map->map_priv_1 + adr) = d.x[0];
++       FLASHSET(map->map_priv_1 + adr, d.x[0]);
+ }
+ 
+ struct ixp4xx_flash_info {
diff --git a/packages/linux/nas100d-kernel/2.6.14/10-ixp4xx-le.patch b/packages/linux/nas100d-kernel/2.6.14/10-ixp4xx-le.patch
new file mode 100644
index 0000000000..0b50e4e1a0
--- /dev/null
+++ b/packages/linux/nas100d-kernel/2.6.14/10-ixp4xx-le.patch
@@ -0,0 +1,54 @@
+--- linux-2.6.14/drivers/mtd/maps/ixp4xx.c	2005-10-27 17:02:08.000000000 -0700
++++ linux-2.6.14/drivers/mtd/maps/ixp4xx.c	2005-10-29 23:11:24.990820968 -0700
+@@ -22,6 +22,7 @@
+ #include <linux/string.h>
+ #include <linux/mtd/mtd.h>
+ #include <linux/mtd/map.h>
++#include <linux/mtd/cfi_endian.h>
+ #include <linux/mtd/partitions.h>
+ #include <linux/ioport.h>
+ #include <linux/device.h>
+@@ -30,17 +31,40 @@
+ 
+ #include <linux/reboot.h>
+ 
++/* On a little-endian IXP4XX system (tested on NSLU2) an LDRH or STRH
++ * will flip the second address bit - i.e. XOR the address with 10b.
++ * This causes the cfi commands (sent to the command address, 0xAA for
++ * 16 bit flash) to fail.  This is fixed here by XOR'ing the address
++ * before use with 10b.  The cost of this is that the flash layout ends
++ * up with pdp-endiannes (on an LE system), however this is not a problem
++ * as the access code consistently only accesses half words - so the
++ * endianness is not determinable on stuff which is written and read
++ * consistently in the little endian world.
++ *
++ * For flash data from the big-endian world, however, the results are
++ * weird - the pdp-endianness results in the data apparently being
++ * 2-byte swapped (as in dd conv=swab).  To work round this the 16
++ * bit values are written and read using cpu_to_cfi16 and cfi16_to_cpu,
++ * by default these are no-ops, but if the MTD driver is configed with
++ * CONFIG_MTD_CFI_BE_BYTE_SWAP the macros will byte swap the data,
++ * resulting in a consistently BE view of the flash on both BE (no
++ * op) and LE systems.  This config setting also causes the command
++ * data from the CFI implementation to get swapped - as is required
++ * so that this code will *unswap* it and give the correct command
++ * data to the flash.
++ */
+ #ifndef __ARMEB__
+ #define	BYTE0(h)	((h) & 0xFF)
+ #define	BYTE1(h)	(((h) >> 8) & 0xFF)
++#define	FLASHWORD(a)	(*(__u16*)((u32)(a) ^ 2))
+ #else
+ #define	BYTE0(h)	(((h) >> 8) & 0xFF)
+ #define	BYTE1(h)	((h) & 0xFF)
++#define	FLASHWORD(a)	(*(__u16*)(a))
+ #endif
+ 
+-#define FLASHWORD(a)	(*(__u16*)(a))
+-#define FLASHVAL(a)	FLASHWORD(a)
+-#define FLASHSET(a,v)	do { FLASHWORD(a) = (v); } while (0)
++#define FLASHVAL(a)	cfi16_to_cpu(FLASHWORD(a))
++#define FLASHSET(a,v)	(FLASHWORD(a) = cpu_to_cfi16(v))
+ 
+ static map_word ixp4xx_read16(struct map_info *map, unsigned long ofs)
+ {
diff --git a/packages/linux/nas100d-kernel/2.6.14/10-mtdpart-redboot-fis-byteswap.patch b/packages/linux/nas100d-kernel/2.6.14/10-mtdpart-redboot-fis-byteswap.patch
new file mode 100644
index 0000000000..37d19bd1b0
--- /dev/null
+++ b/packages/linux/nas100d-kernel/2.6.14/10-mtdpart-redboot-fis-byteswap.patch
@@ -0,0 +1,44 @@
+On IXP4XX systems the FIS directory is big endian even with a little
+endian kernel.  This patch recognises the FIS directory on such a
+system and byte swaps it to obtain a valid table based on the 'size'
+field of the FIS directory (the size field is know to always match the
+erase block size on such systems, and probably all systems.)
+
+--- linux-2.6.13/.pc/10-mtdpart-redboot-fis-byteswap.patch/drivers/mtd/redboot.c	2005-08-28 16:41:01.000000000 -0700
++++ linux-2.6.13/drivers/mtd/redboot.c	2005-10-23 21:44:59.999694674 -0700
+@@ -89,8 +89,34 @@
+ 			i = numslots;
+ 			break;
+ 		}
+-		if (!memcmp(buf[i].name, "FIS directory", 14))
++		if (!memcmp(buf[i].name, "FIS directory", 14)) {
++			/* This is apparently the FIS directory entry for the
++			 * FIS directory itself.  The FIS directory size is
++			 * one erase block, if the buf[i].size field is
++			 * swab32(erasesize) then we know we are looking at
++			 * a byte swapped FIS directory - swap all the entries!
++			 * (NOTE: this is 'size' not 'data_length', size is
++			 * the full size of the entry.)
++			 */
++			if (swab32(buf[i].size) == master->erasesize) {
++				int j;
++				for (j = 0; j < numslots && buf[j].name[0] != 0xff; ++j) {
++					/* The unsigned long fields were written with the
++					 * wrong byte sex, name and pad have no byte sex.
++					 */
++#					define do_swab32(x) (x) = swab32(x)
++					do_swab32(buf[j].flash_base);
++					do_swab32(buf[j].mem_base);
++					do_swab32(buf[j].size);
++					do_swab32(buf[j].entry_point);
++					do_swab32(buf[j].data_length);
++					do_swab32(buf[j].desc_cksum);
++					do_swab32(buf[j].file_cksum);
++#					undef do_swab32
++				}
++			}
+ 			break;
++		}
+ 	}
+ 	if (i == numslots) {
+ 		/* Didn't find it */
diff --git a/packages/linux/nas100d-kernel/2.6.14/15-ixp4xx-writesb-l-w.patch b/packages/linux/nas100d-kernel/2.6.14/15-ixp4xx-writesb-l-w.patch
new file mode 100644
index 0000000000..6ac0807f1e
--- /dev/null
+++ b/packages/linux/nas100d-kernel/2.6.14/15-ixp4xx-writesb-l-w.patch
@@ -0,0 +1,31 @@
+# The inline caller of these APIs were changed to have
+# const vaddr parameters...
+--- linux-2.6.13/include/asm-arm/arch-ixp4xx/io.h.orig	2005-09-24 17:06:19.968099976 -0700
++++ linux-2.6.13/include/asm-arm/arch-ixp4xx/io.h	2005-09-24 17:06:52.542149731 -0700
+@@ -113,7 +113,7 @@
+ }
+ 
+ static inline void
+-__ixp4xx_writesb(u32 bus_addr, u8 *vaddr, int count)
++__ixp4xx_writesb(u32 bus_addr, const u8 *vaddr, int count)
+ {
+ 	while (count--)
+ 		writeb(*vaddr++, bus_addr);
+@@ -136,7 +136,7 @@
+ }
+ 
+ static inline void
+-__ixp4xx_writesw(u32 bus_addr, u16 *vaddr, int count)
++__ixp4xx_writesw(u32 bus_addr, const u16 *vaddr, int count)
+ {
+ 	while (count--)
+ 		writew(*vaddr++, bus_addr);
+@@ -154,7 +154,7 @@
+ }
+ 
+ static inline void
+-__ixp4xx_writesl(u32 bus_addr, u32 *vaddr, int count)
++__ixp4xx_writesl(u32 bus_addr, const u32 *vaddr, int count)
+ {
+ 	while (count--)
+ 		writel(*vaddr++, bus_addr);
diff --git a/packages/linux/nas100d-kernel/2.6.14/18-ixp4xx-io-h-addr.patch b/packages/linux/nas100d-kernel/2.6.14/18-ixp4xx-io-h-addr.patch
new file mode 100644
index 0000000000..5813bbb7ac
--- /dev/null
+++ b/packages/linux/nas100d-kernel/2.6.14/18-ixp4xx-io-h-addr.patch
@@ -0,0 +1,287 @@
+--- linux-2.6.14/include/asm-arm/arch-ixp4xx/io.h	2005-10-29 23:33:21.757679882 -0700
++++ linux-2.6.14/include/asm-arm/arch-ixp4xx/io.h	2005-10-29 23:47:02.581331058 -0700
+@@ -80,9 +80,9 @@ __ixp4xx_iounmap(void __iomem *addr)
+ #define __arch_ioremap(a, s, f, x)	__ixp4xx_ioremap(a, s, f, x)
+ #define	__arch_iounmap(a)		__ixp4xx_iounmap(a)
+ 
+-#define	writeb(p, v)			__ixp4xx_writeb(p, v)
+-#define	writew(p, v)			__ixp4xx_writew(p, v)
+-#define	writel(p, v)			__ixp4xx_writel(p, v)
++#define	writeb(v, p)			__ixp4xx_writeb(v, p)
++#define	writew(v, p)			__ixp4xx_writew(v, p)
++#define	writel(v, p)			__ixp4xx_writel(v, p)
+ 
+ #define	writesb(p, v, l)		__ixp4xx_writesb(p, v, l)
+ #define	writesw(p, v, l)		__ixp4xx_writesw(p, v, l)
+@@ -97,8 +97,9 @@ __ixp4xx_iounmap(void __iomem *addr)
+ #define	readsl(p, v, l)			__ixp4xx_readsl(p, v, l)
+ 
+ static inline void 
+-__ixp4xx_writeb(u8 value, u32 addr)
++__ixp4xx_writeb(u8 value, volatile void __iomem *p)
+ {
++	u32 addr = (u32)p;
+ 	u32 n, byte_enables, data;
+ 
+ 	if (addr >= VMALLOC_START) {
+@@ -113,15 +114,16 @@ __ixp4xx_writeb(u8 value, u32 addr)
+ }
+ 
+ static inline void
+-__ixp4xx_writesb(u32 bus_addr, const u8 *vaddr, int count)
++__ixp4xx_writesb(volatile void __iomem *bus_addr, const u8 *vaddr, int count)
+ {
+ 	while (count--)
+ 		writeb(*vaddr++, bus_addr);
+ }
+ 
+ static inline void 
+-__ixp4xx_writew(u16 value, u32 addr)
++__ixp4xx_writew(u16 value, volatile void __iomem *p)
+ {
++	u32 addr = (u32)p;
+ 	u32 n, byte_enables, data;
+ 
+ 	if (addr >= VMALLOC_START) {
+@@ -136,15 +138,16 @@ __ixp4xx_writew(u16 value, u32 addr)
+ }
+ 
+ static inline void
+-__ixp4xx_writesw(u32 bus_addr, const u16 *vaddr, int count)
++__ixp4xx_writesw(volatile void __iomem *bus_addr, const u16 *vaddr, int count)
+ {
+ 	while (count--)
+ 		writew(*vaddr++, bus_addr);
+ }
+ 
+ static inline void 
+-__ixp4xx_writel(u32 value, u32 addr)
++__ixp4xx_writel(u32 value, volatile void __iomem *p)
+ {
++	u32 addr = (u32)p;
+ 	if (addr >= VMALLOC_START) {
+ 		__raw_writel(value, addr);
+ 		return;
+@@ -154,15 +157,16 @@ __ixp4xx_writel(u32 value, u32 addr)
+ }
+ 
+ static inline void
+-__ixp4xx_writesl(u32 bus_addr, const u32 *vaddr, int count)
++__ixp4xx_writesl(volatile void __iomem *bus_addr, const u32 *vaddr, int count)
+ {
+ 	while (count--)
+ 		writel(*vaddr++, bus_addr);
+ }
+ 
+ static inline unsigned char 
+-__ixp4xx_readb(u32 addr)
++__ixp4xx_readb(const volatile void __iomem *p)
+ {
++	u32 addr = (u32)p;
+ 	u32 n, byte_enables, data;
+ 
+ 	if (addr >= VMALLOC_START)
+@@ -177,15 +181,16 @@ __ixp4xx_readb(u32 addr)
+ }
+ 
+ static inline void
+-__ixp4xx_readsb(u32 bus_addr, u8 *vaddr, u32 count)
++__ixp4xx_readsb(const volatile void __iomem *bus_addr, u8 *vaddr, u32 count)
+ {
+ 	while (count--)
+ 		*vaddr++ = readb(bus_addr);
+ }
+ 
+ static inline unsigned short 
+-__ixp4xx_readw(u32 addr)
++__ixp4xx_readw(const volatile void __iomem *p)
+ {
++	u32 addr = (u32)p;
+ 	u32 n, byte_enables, data;
+ 
+ 	if (addr >= VMALLOC_START)
+@@ -200,15 +205,16 @@ __ixp4xx_readw(u32 addr)
+ }
+ 
+ static inline void 
+-__ixp4xx_readsw(u32 bus_addr, u16 *vaddr, u32 count)
++__ixp4xx_readsw(const volatile void __iomem *bus_addr, u16 *vaddr, u32 count)
+ {
+ 	while (count--)
+ 		*vaddr++ = readw(bus_addr);
+ }
+ 
+ static inline unsigned long 
+-__ixp4xx_readl(u32 addr)
++__ixp4xx_readl(const volatile void __iomem *p)
+ {
++	u32 addr = (u32)p;
+ 	u32 data;
+ 
+ 	if (addr >= VMALLOC_START)
+@@ -221,7 +227,7 @@ __ixp4xx_readl(u32 addr)
+ }
+ 
+ static inline void 
+-__ixp4xx_readsl(u32 bus_addr, u32 *vaddr, u32 count)
++__ixp4xx_readsl(const volatile void __iomem *bus_addr, u32 *vaddr, u32 count)
+ {
+ 	while (count--)
+ 		*vaddr++ = readl(bus_addr);
+@@ -239,7 +245,7 @@ __ixp4xx_readsl(u32 bus_addr, u32 *vaddr
+ 				eth_copy_and_sum((s),__mem_pci(c),(l),(b))
+ 
+ static inline int
+-check_signature(unsigned long bus_addr, const unsigned char *signature,
++check_signature(const unsigned char __iomem *bus_addr, const unsigned char *signature,
+ 		int length)
+ {
+ 	int retval = 0;
+@@ -389,7 +395,7 @@ __ixp4xx_insl(u32 io_addr, u32 *vaddr, u
+ #define	__is_io_address(p)	(((unsigned long)p >= PIO_OFFSET) && \
+ 					((unsigned long)p <= (PIO_MASK + PIO_OFFSET)))
+ static inline unsigned int
+-__ixp4xx_ioread8(void __iomem *addr)
++__ixp4xx_ioread8(const void __iomem *addr)
+ {
+ 	unsigned long port = (unsigned long __force)addr;
+ 	if (__is_io_address(port))
+@@ -398,12 +404,12 @@ __ixp4xx_ioread8(void __iomem *addr)
+ #ifndef CONFIG_IXP4XX_INDIRECT_PCI
+ 		return (unsigned int)__raw_readb(port);
+ #else
+-		return (unsigned int)__ixp4xx_readb(port);
++		return (unsigned int)__ixp4xx_readb(addr);
+ #endif
+ }
+ 
+ static inline void
+-__ixp4xx_ioread8_rep(void __iomem *addr, void *vaddr, u32 count)
++__ixp4xx_ioread8_rep(const void __iomem *addr, void *vaddr, u32 count)
+ {
+ 	unsigned long port = (unsigned long __force)addr;
+ 	if (__is_io_address(port))
+@@ -412,12 +418,12 @@ __ixp4xx_ioread8_rep(void __iomem *addr,
+ #ifndef	CONFIG_IXP4XX_INDIRECT_PCI
+ 		__raw_readsb(addr, vaddr, count);
+ #else
+-		__ixp4xx_readsb(port, vaddr, count);
++		__ixp4xx_readsb(addr, vaddr, count);
+ #endif
+ }
+ 
+ static inline unsigned int
+-__ixp4xx_ioread16(void __iomem *addr)
++__ixp4xx_ioread16(const void __iomem *addr)
+ {
+ 	unsigned long port = (unsigned long __force)addr;
+ 	if (__is_io_address(port))
+@@ -426,12 +432,12 @@ __ixp4xx_ioread16(void __iomem *addr)
+ #ifndef CONFIG_IXP4XX_INDIRECT_PCI
+ 		return le16_to_cpu(__raw_readw((u32)port));
+ #else
+-		return (unsigned int)__ixp4xx_readw((u32)port);
++		return (unsigned int)__ixp4xx_readw(addr);
+ #endif
+ }
+ 
+ static inline void
+-__ixp4xx_ioread16_rep(void __iomem *addr, void *vaddr, u32 count)
++__ixp4xx_ioread16_rep(const void __iomem *addr, void *vaddr, u32 count)
+ {
+ 	unsigned long port = (unsigned long __force)addr;
+ 	if (__is_io_address(port))
+@@ -440,12 +446,12 @@ __ixp4xx_ioread16_rep(void __iomem *addr
+ #ifndef	CONFIG_IXP4XX_INDIRECT_PCI
+ 		__raw_readsw(addr, vaddr, count);
+ #else
+-		__ixp4xx_readsw(port, vaddr, count);
++		__ixp4xx_readsw(addr, vaddr, count);
+ #endif
+ }
+ 
+ static inline unsigned int
+-__ixp4xx_ioread32(void __iomem *addr)
++__ixp4xx_ioread32(const void __iomem *addr)
+ {
+ 	unsigned long port = (unsigned long __force)addr;
+ 	if (__is_io_address(port))
+@@ -454,13 +460,13 @@ __ixp4xx_ioread32(void __iomem *addr)
+ #ifndef CONFIG_IXP4XX_INDIRECT_PCI
+ 		return le32_to_cpu(__raw_readl((u32)port));
+ #else
+-		return (unsigned int)__ixp4xx_readl((u32)port);
++		return (unsigned int)__ixp4xx_readl(addr);
+ #endif
+ 	}
+ }
+ 
+ static inline void
+-__ixp4xx_ioread32_rep(void __iomem *addr, void *vaddr, u32 count)
++__ixp4xx_ioread32_rep(const void __iomem *addr, void *vaddr, u32 count)
+ {
+ 	unsigned long port = (unsigned long __force)addr;
+ 	if (__is_io_address(port))
+@@ -469,7 +475,7 @@ __ixp4xx_ioread32_rep(void __iomem *addr
+ #ifndef	CONFIG_IXP4XX_INDIRECT_PCI
+ 		__raw_readsl(addr, vaddr, count);
+ #else
+-		__ixp4xx_readsl(port, vaddr, count);
++		__ixp4xx_readsl(addr, vaddr, count);
+ #endif
+ }
+ 
+@@ -483,7 +489,7 @@ __ixp4xx_iowrite8(u8 value, void __iomem
+ #ifndef CONFIG_IXP4XX_INDIRECT_PCI
+ 		__raw_writeb(value, port);
+ #else
+-		__ixp4xx_writeb(value, port);
++		__ixp4xx_writeb(value, addr);
+ #endif
+ }
+ 
+@@ -497,7 +503,7 @@ __ixp4xx_iowrite8_rep(void __iomem *addr
+ #ifndef CONFIG_IXP4XX_INDIRECT_PCI
+ 		__raw_writesb(addr, vaddr, count);
+ #else
+-		__ixp4xx_writesb(port, vaddr, count);
++		__ixp4xx_writesb(addr, vaddr, count);
+ #endif
+ }
+ 
+@@ -511,7 +517,7 @@ __ixp4xx_iowrite16(u16 value, void __iom
+ #ifndef CONFIG_IXP4XX_INDIRECT_PCI
+ 		__raw_writew(cpu_to_le16(value), addr);
+ #else
+-		__ixp4xx_writew(value, port);
++		__ixp4xx_writew(value, addr);
+ #endif
+ }
+ 
+@@ -525,7 +531,7 @@ __ixp4xx_iowrite16_rep(void __iomem *add
+ #ifndef CONFIG_IXP4XX_INDIRECT_PCI
+ 		__raw_writesw(addr, vaddr, count);
+ #else
+-		__ixp4xx_writesw(port, vaddr, count);
++		__ixp4xx_writesw(addr, vaddr, count);
+ #endif
+ }
+ 
+@@ -539,7 +545,7 @@ __ixp4xx_iowrite32(u32 value, void __iom
+ #ifndef CONFIG_IXP4XX_INDIRECT_PCI
+ 		__raw_writel(cpu_to_le32(value), port);
+ #else
+-		__ixp4xx_writel(value, port);
++		__ixp4xx_writel(value, addr);
+ #endif
+ }
+ 
+@@ -553,7 +559,7 @@ __ixp4xx_iowrite32_rep(void __iomem *add
+ #ifndef CONFIG_IXP4XX_INDIRECT_PCI
+ 		__raw_writesl(addr, vaddr, count);
+ #else
+-		__ixp4xx_writesl(port, vaddr, count);
++		__ixp4xx_writesl(addr, vaddr, count);
+ #endif
+ }
+ 
diff --git a/packages/linux/nas100d-kernel/2.6.14/28-spinlock-up.patch b/packages/linux/nas100d-kernel/2.6.14/28-spinlock-up.patch
new file mode 100644
index 0000000000..3ae5178cff
--- /dev/null
+++ b/packages/linux/nas100d-kernel/2.6.14/28-spinlock-up.patch
@@ -0,0 +1,32 @@
+--- linux-2.6.14-rc5/include/linux/spinlock_up.h	2005-10-26 08:37:20.164248408 -0700
++++ patched/include/linux/spinlock_up.h	2005-10-26 12:15:13.458898975 -0700
+@@ -47,6 +47,14 @@ static inline void __raw_spin_unlock(raw
+ 	lock->slock = 1;
+ }
+ 
++#else /* DEBUG_SPINLOCK */
++#define __raw_spin_is_locked(lock)	((void)(lock), 0)
++/* for sched.c and kernel_lock.c: */
++# define __raw_spin_lock(lock)		do { (void)(lock); } while (0)
++# define __raw_spin_unlock(lock)	do { (void)(lock); } while (0)
++# define __raw_spin_trylock(lock)	({ (void)(lock); 1; })
++#endif /* DEBUG_SPINLOCK */
++
+ /*
+  * Read-write spinlocks. No debug version.
+  */
+@@ -57,14 +65,6 @@ static inline void __raw_spin_unlock(raw
+ #define __raw_read_unlock(lock)		do { (void)(lock); } while (0)
+ #define __raw_write_unlock(lock)	do { (void)(lock); } while (0)
+ 
+-#else /* DEBUG_SPINLOCK */
+-#define __raw_spin_is_locked(lock)	((void)(lock), 0)
+-/* for sched.c and kernel_lock.c: */
+-# define __raw_spin_lock(lock)		do { (void)(lock); } while (0)
+-# define __raw_spin_unlock(lock)	do { (void)(lock); } while (0)
+-# define __raw_spin_trylock(lock)	({ (void)(lock); 1; })
+-#endif /* DEBUG_SPINLOCK */
+-
+ #define __raw_read_can_lock(lock)	(((void)(lock), 1))
+ #define __raw_write_can_lock(lock)	(((void)(lock), 1))
+ 
diff --git a/packages/linux/nas100d-kernel/2.6.14/29-ipv4-route-c-spinlock.patch b/packages/linux/nas100d-kernel/2.6.14/29-ipv4-route-c-spinlock.patch
new file mode 100644
index 0000000000..93e070518c
--- /dev/null
+++ b/packages/linux/nas100d-kernel/2.6.14/29-ipv4-route-c-spinlock.patch
@@ -0,0 +1,11 @@
+--- linux-2.6.14-rc5/net/ipv4/route.c	2005-10-26 08:37:20.752285410 -0700
++++ patched/net/ipv4/route.c	2005-10-26 12:17:00.761651111 -0700
+@@ -231,7 +231,7 @@ static spinlock_t	*rt_hash_locks;
+ 			spin_lock_init(&rt_hash_locks[i]); \
+ 		}
+ #else
+-# define rt_hash_lock_addr(slot) NULL
++# define rt_hash_lock_addr(slot) ((spinlock_t*)NULL)
+ # define rt_hash_lock_init()
+ #endif
+ 
diff --git a/packages/linux/nas100d-kernel/2.6.14/90-ixp4xx-pci-le.patch b/packages/linux/nas100d-kernel/2.6.14/90-ixp4xx-pci-le.patch
new file mode 100644
index 0000000000..1a37b13a79
--- /dev/null
+++ b/packages/linux/nas100d-kernel/2.6.14/90-ixp4xx-pci-le.patch
@@ -0,0 +1,11 @@
+--- linux-2.6.13/.pc/90-ixp4xx-pci-le.patch/arch/arm/mach-ixp4xx/common-pci.c	2005-08-28 16:41:01.000000000 -0700
++++ linux-2.6.13/arch/arm/mach-ixp4xx/common-pci.c	2005-10-26 15:24:30.337542292 -0700
+@@ -427,7 +427,7 @@ void __init ixp4xx_pci_preinit(void)
+ #ifdef __ARMEB__
+ 	*PCI_CSR = PCI_CSR_IC | PCI_CSR_ABE | PCI_CSR_PDS | PCI_CSR_ADS;
+ #else
+-	*PCI_CSR = PCI_CSR_IC;
++	*PCI_CSR = PCI_CSR_IC | PCI_CSR_ABE;
+ #endif
+ 
+ 	pr_debug("DONE\n");
diff --git a/packages/linux/nas100d-kernel/2.6.14/defconfig b/packages/linux/nas100d-kernel/2.6.14/defconfig
new file mode 100644
index 0000000000..564bffa17e
--- /dev/null
+++ b/packages/linux/nas100d-kernel/2.6.14/defconfig
@@ -0,0 +1,1552 @@
+#
+# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.14-rc4
+# Fri Oct 21 16:13:58 2005
+#
+CONFIG_ARM=y
+CONFIG_MMU=y
+CONFIG_UID16=y
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+CONFIG_GENERIC_CALIBRATE_DELAY=y
+
+#
+# Code maturity level options
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_CLEAN_COMPILE=y
+CONFIG_BROKEN_ON_SMP=y
+CONFIG_INIT_ENV_ARG_LIMIT=32
+
+#
+# General setup
+#
+CONFIG_LOCALVERSION=""
+CONFIG_LOCALVERSION_AUTO=y
+CONFIG_SWAP=y
+CONFIG_SYSVIPC=y
+# CONFIG_POSIX_MQUEUE is not set
+# CONFIG_BSD_PROCESS_ACCT is not set
+CONFIG_SYSCTL=y
+# CONFIG_AUDIT is not set
+CONFIG_HOTPLUG=y
+CONFIG_KOBJECT_UEVENT=y
+# CONFIG_IKCONFIG is not set
+CONFIG_INITRAMFS_SOURCE=""
+CONFIG_EMBEDDED=y
+# CONFIG_KALLSYMS is not set
+CONFIG_PRINTK=y
+CONFIG_BUG=y
+# CONFIG_BASE_FULL is not set
+CONFIG_FUTEX=y
+CONFIG_EPOLL=y
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
+CONFIG_SHMEM=y
+CONFIG_CC_ALIGN_FUNCTIONS=0
+CONFIG_CC_ALIGN_LABELS=0
+CONFIG_CC_ALIGN_LOOPS=0
+CONFIG_CC_ALIGN_JUMPS=0
+# CONFIG_TINY_SHMEM is not set
+CONFIG_BASE_SMALL=1
+
+#
+# Loadable module support
+#
+CONFIG_MODULES=y
+CONFIG_MODULE_UNLOAD=y
+# CONFIG_MODULE_FORCE_UNLOAD is not set
+CONFIG_OBSOLETE_MODPARM=y
+# CONFIG_MODVERSIONS is not set
+# CONFIG_MODULE_SRCVERSION_ALL is not set
+CONFIG_KMOD=y
+
+#
+# System Type
+#
+# CONFIG_ARCH_CLPS7500 is not set
+# CONFIG_ARCH_CLPS711X is not set
+# CONFIG_ARCH_CO285 is not set
+# CONFIG_ARCH_EBSA110 is not set
+# CONFIG_ARCH_CAMELOT is not set
+# CONFIG_ARCH_FOOTBRIDGE is not set
+# CONFIG_ARCH_INTEGRATOR is not set
+# CONFIG_ARCH_IOP3XX is not set
+CONFIG_ARCH_IXP4XX=y
+# CONFIG_ARCH_IXP2000 is not set
+# CONFIG_ARCH_L7200 is not set
+# CONFIG_ARCH_PXA is not set
+# CONFIG_ARCH_RPC is not set
+# CONFIG_ARCH_SA1100 is not set
+# CONFIG_ARCH_S3C2410 is not set
+# CONFIG_ARCH_SHARK is not set
+# CONFIG_ARCH_LH7A40X is not set
+# CONFIG_ARCH_OMAP is not set
+# CONFIG_ARCH_VERSATILE is not set
+# CONFIG_ARCH_IMX is not set
+# CONFIG_ARCH_H720X is not set
+# CONFIG_ARCH_AAEC2000 is not set
+CONFIG_ARCH_SUPPORTS_BIG_ENDIAN=y
+
+#
+# Intel IXP4xx Implementation Options
+#
+
+#
+# IXP4xx Platforms
+#
+# CONFIG_ARCH_AVILA is not set
+# CONFIG_ARCH_ADI_COYOTE is not set
+CONFIG_ARCH_IXDP425=y
+# CONFIG_MACH_IXDPG425 is not set
+# CONFIG_MACH_IXDP465 is not set
+# CONFIG_MACH_NAS100D is not set
+# CONFIG_ARCH_PRPMC1100 is not set
+# CONFIG_MACH_GTWX5715 is not set
+
+#
+# IXP4xx Options
+#
+CONFIG_IXP4XX_INDIRECT_PCI=y
+
+#
+# Processor Type
+#
+CONFIG_CPU_32=y
+CONFIG_CPU_XSCALE=y
+CONFIG_CPU_32v5=y
+CONFIG_CPU_ABRT_EV5T=y
+CONFIG_CPU_CACHE_VIVT=y
+CONFIG_CPU_TLB_V4WBI=y
+
+#
+# Processor Features
+#
+CONFIG_ARM_THUMB=y
+CONFIG_CPU_BIG_ENDIAN=y
+CONFIG_XSCALE_PMU=y
+CONFIG_DMABOUNCE=y
+
+#
+# Bus support
+#
+CONFIG_ISA_DMA_API=y
+CONFIG_PCI=y
+# CONFIG_PCI_LEGACY_PROC is not set
+
+#
+# PCCARD (PCMCIA/CardBus) support
+#
+# CONFIG_PCCARD is not set
+
+#
+# Kernel Features
+#
+# CONFIG_PREEMPT is not set
+# CONFIG_NO_IDLE_HZ is not set
+# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set
+CONFIG_SELECT_MEMORY_MODEL=y
+CONFIG_FLATMEM_MANUAL=y
+# CONFIG_DISCONTIGMEM_MANUAL is not set
+# CONFIG_SPARSEMEM_MANUAL is not set
+CONFIG_FLATMEM=y
+CONFIG_FLAT_NODE_MEM_MAP=y
+# CONFIG_SPARSEMEM_STATIC is not set
+# CONFIG_LEDS is not set
+CONFIG_ALIGNMENT_TRAP=y
+
+#
+# Boot options
+#
+CONFIG_ZBOOT_ROM_TEXT=0x0
+CONFIG_ZBOOT_ROM_BSS=0x0
+CONFIG_CMDLINE="root=/dev/mtdblock4 rw rootfstype=jffs2 mem=32M@0x00000000 init=/linuxrc x1205.hctosys=1 noirqdebug console=ttyS0,115200n8"
+# CONFIG_XIP_KERNEL is not set
+
+#
+# Floating point emulation
+#
+
+#
+# At least one emulation must be selected
+#
+CONFIG_FPE_NWFPE=y
+# CONFIG_FPE_NWFPE_XP is not set
+# CONFIG_FPE_FASTFPE is not set
+
+#
+# Userspace binary formats
+#
+CONFIG_BINFMT_ELF=y
+# CONFIG_BINFMT_AOUT is not set
+# CONFIG_BINFMT_MISC is not set
+# CONFIG_ARTHUR is not set
+
+#
+# Power management options
+#
+# CONFIG_PM is not set
+
+#
+# Networking
+#
+CONFIG_NET=y
+
+#
+# Networking options
+#
+CONFIG_PACKET=m
+CONFIG_PACKET_MMAP=y
+CONFIG_UNIX=y
+CONFIG_XFRM=y
+# CONFIG_XFRM_USER is not set
+# CONFIG_NET_KEY is not set
+CONFIG_INET=y
+# CONFIG_IP_MULTICAST is not set
+# CONFIG_IP_ADVANCED_ROUTER is not set
+CONFIG_IP_FIB_HASH=y
+# CONFIG_IP_PNP is not set
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE is not set
+# CONFIG_ARPD is not set
+# CONFIG_SYN_COOKIES is not set
+CONFIG_INET_AH=m
+CONFIG_INET_ESP=m
+CONFIG_INET_IPCOMP=m
+CONFIG_INET_TUNNEL=m
+CONFIG_INET_DIAG=y
+CONFIG_INET_TCP_DIAG=y
+# CONFIG_TCP_CONG_ADVANCED is not set
+CONFIG_TCP_CONG_BIC=y
+
+#
+# IP: Virtual Server Configuration
+#
+# CONFIG_IP_VS is not set
+CONFIG_IPV6=m
+# CONFIG_IPV6_PRIVACY is not set
+CONFIG_INET6_AH=m
+CONFIG_INET6_ESP=m
+CONFIG_INET6_IPCOMP=m
+CONFIG_INET6_TUNNEL=m
+CONFIG_IPV6_TUNNEL=m
+CONFIG_NETFILTER=y
+# CONFIG_NETFILTER_DEBUG is not set
+CONFIG_BRIDGE_NETFILTER=y
+# CONFIG_NETFILTER_NETLINK is not set
+
+#
+# IP: Netfilter Configuration
+#
+CONFIG_IP_NF_CONNTRACK=m
+# CONFIG_IP_NF_CT_ACCT is not set
+# CONFIG_IP_NF_CONNTRACK_MARK is not set
+# CONFIG_IP_NF_CONNTRACK_EVENTS is not set
+CONFIG_IP_NF_CT_PROTO_SCTP=m
+CONFIG_IP_NF_FTP=m
+CONFIG_IP_NF_IRC=m
+# CONFIG_IP_NF_NETBIOS_NS is not set
+CONFIG_IP_NF_TFTP=m
+CONFIG_IP_NF_AMANDA=m
+# CONFIG_IP_NF_PPTP is not set
+CONFIG_IP_NF_QUEUE=m
+CONFIG_IP_NF_IPTABLES=m
+CONFIG_IP_NF_MATCH_LIMIT=m
+CONFIG_IP_NF_MATCH_IPRANGE=m
+CONFIG_IP_NF_MATCH_MAC=m
+CONFIG_IP_NF_MATCH_PKTTYPE=m
+CONFIG_IP_NF_MATCH_MARK=m
+CONFIG_IP_NF_MATCH_MULTIPORT=m
+CONFIG_IP_NF_MATCH_TOS=m
+CONFIG_IP_NF_MATCH_RECENT=m
+CONFIG_IP_NF_MATCH_ECN=m
+CONFIG_IP_NF_MATCH_DSCP=m
+CONFIG_IP_NF_MATCH_AH_ESP=m
+CONFIG_IP_NF_MATCH_LENGTH=m
+CONFIG_IP_NF_MATCH_TTL=m
+CONFIG_IP_NF_MATCH_TCPMSS=m
+CONFIG_IP_NF_MATCH_HELPER=m
+CONFIG_IP_NF_MATCH_STATE=m
+CONFIG_IP_NF_MATCH_CONNTRACK=m
+CONFIG_IP_NF_MATCH_OWNER=m
+CONFIG_IP_NF_MATCH_PHYSDEV=m
+CONFIG_IP_NF_MATCH_ADDRTYPE=m
+CONFIG_IP_NF_MATCH_REALM=m
+# CONFIG_IP_NF_MATCH_SCTP is not set
+# CONFIG_IP_NF_MATCH_DCCP is not set
+CONFIG_IP_NF_MATCH_COMMENT=m
+CONFIG_IP_NF_MATCH_HASHLIMIT=m
+# CONFIG_IP_NF_MATCH_STRING is not set
+CONFIG_IP_NF_FILTER=m
+# CONFIG_IP_NF_TARGET_REJECT is not set
+CONFIG_IP_NF_TARGET_LOG=m
+CONFIG_IP_NF_TARGET_ULOG=m
+CONFIG_IP_NF_TARGET_TCPMSS=m
+# CONFIG_IP_NF_TARGET_NFQUEUE is not set
+CONFIG_IP_NF_NAT=m
+CONFIG_IP_NF_NAT_NEEDED=y
+CONFIG_IP_NF_TARGET_MASQUERADE=m
+CONFIG_IP_NF_TARGET_REDIRECT=m
+CONFIG_IP_NF_TARGET_NETMAP=m
+CONFIG_IP_NF_TARGET_SAME=m
+CONFIG_IP_NF_NAT_SNMP_BASIC=m
+CONFIG_IP_NF_NAT_IRC=m
+CONFIG_IP_NF_NAT_FTP=m
+CONFIG_IP_NF_NAT_TFTP=m
+CONFIG_IP_NF_NAT_AMANDA=m
+CONFIG_IP_NF_MANGLE=m
+CONFIG_IP_NF_TARGET_TOS=m
+CONFIG_IP_NF_TARGET_ECN=m
+CONFIG_IP_NF_TARGET_DSCP=m
+CONFIG_IP_NF_TARGET_MARK=m
+CONFIG_IP_NF_TARGET_CLASSIFY=m
+# CONFIG_IP_NF_TARGET_TTL is not set
+# CONFIG_IP_NF_RAW is not set
+# CONFIG_IP_NF_ARPTABLES is not set
+
+#
+# IPv6: Netfilter Configuration (EXPERIMENTAL)
+#
+# CONFIG_IP6_NF_QUEUE is not set
+# CONFIG_IP6_NF_IPTABLES is not set
+# CONFIG_IP6_NF_TARGET_NFQUEUE is not set
+
+#
+# Bridge: Netfilter Configuration
+#
+# CONFIG_BRIDGE_NF_EBTABLES is not set
+
+#
+# DCCP Configuration (EXPERIMENTAL)
+#
+# CONFIG_IP_DCCP is not set
+
+#
+# SCTP Configuration (EXPERIMENTAL)
+#
+# CONFIG_IP_SCTP is not set
+# CONFIG_ATM is not set
+CONFIG_BRIDGE=m
+CONFIG_VLAN_8021Q=m
+# CONFIG_DECNET is not set
+CONFIG_LLC=m
+# CONFIG_LLC2 is not set
+CONFIG_IPX=m
+# CONFIG_IPX_INTERN is not set
+CONFIG_ATALK=m
+CONFIG_DEV_APPLETALK=y
+CONFIG_IPDDP=m
+CONFIG_IPDDP_ENCAP=y
+CONFIG_IPDDP_DECAP=y
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_NET_DIVERT is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+# CONFIG_NET_SCHED is not set
+CONFIG_NET_CLS_ROUTE=y
+
+#
+# Network testing
+#
+CONFIG_NET_PKTGEN=m
+# CONFIG_HAMRADIO is not set
+# CONFIG_IRDA is not set
+CONFIG_BT=m
+CONFIG_BT_L2CAP=m
+CONFIG_BT_SCO=m
+CONFIG_BT_RFCOMM=m
+CONFIG_BT_RFCOMM_TTY=y
+CONFIG_BT_BNEP=m
+CONFIG_BT_BNEP_MC_FILTER=y
+CONFIG_BT_BNEP_PROTO_FILTER=y
+# CONFIG_BT_HIDP is not set
+
+#
+# Bluetooth device drivers
+#
+CONFIG_BT_HCIUSB=m
+CONFIG_BT_HCIUSB_SCO=y
+# CONFIG_BT_HCIUART is not set
+CONFIG_BT_HCIBCM203X=m
+# CONFIG_BT_HCIBPA10X is not set
+# CONFIG_BT_HCIBFUSB is not set
+# CONFIG_BT_HCIVHCI is not set
+# CONFIG_IEEE80211 is not set
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+CONFIG_STANDALONE=y
+CONFIG_PREVENT_FIRMWARE_BUILD=y
+CONFIG_FW_LOADER=m
+
+#
+# Memory Technology Devices (MTD)
+#
+CONFIG_MTD=y
+# CONFIG_MTD_DEBUG is not set
+CONFIG_MTD_CONCAT=y
+CONFIG_MTD_PARTITIONS=y
+CONFIG_MTD_REDBOOT_PARTS=y
+CONFIG_MTD_REDBOOT_DIRECTORY_BLOCK=-1
+# CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED is not set
+# CONFIG_MTD_REDBOOT_PARTS_READONLY is not set
+# CONFIG_MTD_CMDLINE_PARTS is not set
+# CONFIG_MTD_AFS_PARTS is not set
+
+#
+# User Modules And Translation Layers
+#
+CONFIG_MTD_CHAR=y
+CONFIG_MTD_BLOCK=y
+# CONFIG_FTL is not set
+# CONFIG_NFTL is not set
+# CONFIG_INFTL is not set
+
+#
+# RAM/ROM/Flash chip drivers
+#
+CONFIG_MTD_CFI=y
+# CONFIG_MTD_JEDECPROBE is not set
+CONFIG_MTD_GEN_PROBE=y
+CONFIG_MTD_CFI_ADV_OPTIONS=y