diff options
| author | Denys Dmytriyenko <denis@denix.org> | 2009-03-17 14:32:59 -0400 |
|---|---|---|
| committer | Denys Dmytriyenko <denis@denix.org> | 2009-03-17 14:32:59 -0400 |
| commit | 709c4d66e0b107ca606941b988bad717c0b45d9b (patch) | |
| tree | 37ee08b1eb308f3b2b6426d5793545c38396b838 /packages/linux/linux-2.6.24/gesbc-9302 | |
| parent | fa6cd5a3b993f16c27de4ff82b42684516d433ba (diff) | |
rename packages/ to recipes/ per earlier agreement
See links below for more details:
http://thread.gmane.org/gmane.comp.handhelds.openembedded/21326
http://thread.gmane.org/gmane.comp.handhelds.openembedded/21816
Signed-off-by: Denys Dmytriyenko <denis@denix.org>
Acked-by: Mike Westerhof <mwester@dls.net>
Acked-by: Philip Balister <philip@balister.org>
Acked-by: Khem Raj <raj.khem@gmail.com>
Acked-by: Marcin Juszkiewicz <hrw@openembedded.org>
Acked-by: Koen Kooi <koen@openembedded.org>
Acked-by: Frans Meulenbroeks <fransmeulenbroeks@gmail.com>
Diffstat (limited to 'packages/linux/linux-2.6.24/gesbc-9302')
5 files changed, 0 insertions, 3965 deletions
diff --git a/packages/linux/linux-2.6.24/gesbc-9302/0001-gesbc-nand.patch b/packages/linux/linux-2.6.24/gesbc-9302/0001-gesbc-nand.patch deleted file mode 100644 index 399bc43d31..0000000000 --- a/packages/linux/linux-2.6.24/gesbc-9302/0001-gesbc-nand.patch +++ /dev/null @@ -1,306 +0,0 @@ -From 30026f5e13ac18daeeea1a3fd4ab06aa2961ef23 Mon Sep 17 00:00:00 2001 -From: Cliff Brake <cbrake@happy.(none)> -Date: Mon, 17 Dec 2007 16:45:47 -0500 -Subject: [PATCH] gesbc-nand - ---- - drivers/mtd/nand/Kconfig | 7 ++ - drivers/mtd/nand/Makefile | 1 + - drivers/mtd/nand/gesbc.c | 255 +++++++++++++++++++++++++++++++++++++++++++++ - 3 files changed, 263 insertions(+), 0 deletions(-) - create mode 100644 drivers/mtd/nand/gesbc.c - -diff --git a/drivers/mtd/nand/Kconfig b/drivers/mtd/nand/Kconfig -index 246d451..cde3146 100644 ---- a/drivers/mtd/nand/Kconfig -+++ b/drivers/mtd/nand/Kconfig -@@ -51,6 +51,13 @@ config MTD_NAND_EDB7312 - This enables the driver for the Cirrus Logic EBD7312 evaluation - board to access the onboard NAND Flash. - -+config MTD_NAND_GESBC -+ tristate "Support for Glomation GESBC-93xx board" -+ depends on MTD_NAND && MACH_EDB9302 -+ help -+ This enables the driver for the Glomation GESBC-93xx -+ board to access the onboard NAND Flash. -+ - config MTD_NAND_H1900 - tristate "iPAQ H1900 flash" - depends on ARCH_PXA && MTD_PARTITIONS -diff --git a/drivers/mtd/nand/Makefile b/drivers/mtd/nand/Makefile -index 3ad6c01..58c1961 100644 ---- a/drivers/mtd/nand/Makefile -+++ b/drivers/mtd/nand/Makefile -@@ -12,6 +12,7 @@ obj-$(CONFIG_MTD_NAND_AMS_DELTA) += ams-delta.o - obj-$(CONFIG_MTD_NAND_TOTO) += toto.o - obj-$(CONFIG_MTD_NAND_AUTCPU12) += autcpu12.o - obj-$(CONFIG_MTD_NAND_EDB7312) += edb7312.o -+obj-$(CONFIG_MTD_NAND_GESBC) += gesbc.o - obj-$(CONFIG_MTD_NAND_AU1550) += au1550nd.o - obj-$(CONFIG_MTD_NAND_BF5XX) += bf5xx_nand.o - obj-$(CONFIG_MTD_NAND_PPCHAMELEONEVB) += ppchameleonevb.o -diff --git a/drivers/mtd/nand/gesbc.c b/drivers/mtd/nand/gesbc.c -new file mode 100644 -index 0000000..a5844b1 ---- /dev/null -+++ b/drivers/mtd/nand/gesbc.c -@@ -0,0 +1,255 @@ -+/* -+ * drivers/mtd/nand/gesbc-9302.c -+ * -+ * Copyright (C) 2004 Glomation (support@glomationinc.com) -+ * -+ * Derived from drivers/mtd/nand/edb7312.c -+ * Copyright (C) 2004 Marius Grer (mag@sysgo.de) -+ * -+ * Derived from drivers/mtd/nand/autcpu12.c -+ * Copyright (c) 2001 Thomas Gleixner (gleixner@autronix.de) -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ * -+ * Overview: -+ * This is a device driver for the NAND flash device found on the -+ * GESBC-93xx board with Samsung 128/256/512 Mbyte part. -+ */ -+ -+#include <linux/slab.h> -+#include <linux/module.h> -+#include <linux/init.h> -+#include <linux/mtd/mtd.h> -+#include <linux/mtd/nand.h> -+#include <linux/mtd/partitions.h> -+#include <asm/io.h> -+#include <asm/arch/hardware.h> -+#include <asm/sizes.h> -+ -+#define GESBC_NAND_FLASH_DATA 0x10000000 -+ -+#define GPIO_PADR EP93XX_GPIO_REG(0x0) -+#define GPIO_PADDR EP93XX_GPIO_REG(0x10) -+#define SMCBCR1 (EP93XX_AHB_VIRT_BASE + 0x00082000 + 0x04) -+ -+/* -+ * MTD structure for GESBC-93xx board -+ */ -+static struct mtd_info *gesbc_mtd = NULL; -+ -+ -+/* -+ * Module stuff -+ */ -+static unsigned long gesbc_fio_pbase = GESBC_NAND_FLASH_DATA; -+ -+#ifdef CONFIG_MTD_PARTITIONS -+/* -+ * Define static partitions for flash device -+ */ -+static struct mtd_partition partition_info32[] = { -+ { .name= "GESBC NAND FLASH", -+ .offset= 0, -+ .size= 128*1024*1024 }, -+}; -+/* -+ * Define static partitions for flash device -+ */ -+static struct mtd_partition partition_info128[] = { -+ { .name= "GESBC NAND FLASH", -+ .offset= 0, -+ .size= 128*1024*1024 }, -+}; -+ -+/* -+ * Define static partitions for flash device -+ */ -+static struct mtd_partition partition_info256[] = { -+ { .name= "GESBC NAND FLASH", -+ .offset= 0, -+ .size= 256*1024*1024 }, -+}; -+ -+/* -+ * Define static partitions for flash device -+ */ -+static struct mtd_partition partition_info512[] = { -+ { .name= "GESBC NAND FLASH", -+ .offset= 0, -+ .size= 512*1024*1024 }, -+}; -+ -+#define NUM_PARTITIONS 1 -+#endif -+ -+ -+/* -+ * hardware specific access to control-lines -+ * NAND_NCE: bit 0 -> bit 3 -+ * NAND_CLE: bit 1 -> bit 4 -+ * NAND_ALE: bit 2 -> bit 6 -+ */ -+static void gesbc_hwcontrol(struct mtd_info *mtd, int cmd, int ctrl) -+{ -+ unsigned long flags; -+ struct nand_chip *chip = mtd->priv; -+ -+ /* Disbale interrupt to avoid race condition */ -+ local_irq_save(flags); -+ -+ if (ctrl & NAND_CTRL_CHANGE) { -+ unsigned char bits; -+ -+ bits = (ctrl & NAND_CLE) << 3; -+ bits |= (ctrl & NAND_ALE) << 4; -+ if (ctrl & NAND_NCE) -+ bits &= ~0x08; -+ else -+ bits |= 0x08; -+ -+ __raw_writel( (__raw_readl(GPIO_PADR) & ~0x58 )| bits, GPIO_PADR); -+ } -+ if (cmd != NAND_CMD_NONE) -+ writeb(cmd, chip->IO_ADDR_W); -+ /* Restore interrupt state */ -+ local_irq_restore(flags); -+} -+ -+/* -+ * read device ready pin -+ */ -+static int gesbc_device_ready(struct mtd_info *mtd) -+{ -+ return (__raw_readl(GPIO_PADR) & 0x80) >> 7; -+} -+ -+#define MTDID "s3c2440-nand" -+ -+static const char *probes[] = { "cmdlinepart", NULL }; -+ -+ -+ -+/* -+ * Main initialization routine -+ */ -+static int __init gesbc_nand_init (void) -+{ -+ struct nand_chip *this; -+ const char *part_type = 0; -+ int mtd_parts_nb = 0; -+ struct mtd_partition *mtd_parts = 0; -+ unsigned long flags; -+ void * gesbc_fio_base; -+ -+ /* Allocate memory for MTD device structure and private data */ -+ gesbc_mtd = kmalloc(sizeof(struct mtd_info) + -+ sizeof(struct nand_chip), -+ GFP_KERNEL); -+ if (!gesbc_mtd) { -+ printk("Unable to allocate GESBC NAND MTD device structure.\n"); -+ return -ENOMEM; -+ } -+ -+ /* map physical adress */ -+ gesbc_fio_base = ioremap(gesbc_fio_pbase, SZ_1K); -+ if(!gesbc_fio_base) { -+ printk("ioremap GESBC-93xx NAND flash failed\n"); -+ kfree(gesbc_mtd); -+ return -EIO; -+ } -+ -+ -+ /* Get pointer to private data */ -+ this = (struct nand_chip *) (&gesbc_mtd[1]); -+ -+ /* Initialize structures */ -+ memset((char *) gesbc_mtd, 0, sizeof(struct mtd_info)); -+ memset((char *) this, 0, sizeof(struct nand_chip)); -+ -+ /* Link the private data with the MTD structure */ -+ gesbc_mtd->priv = this; -+ -+ /* Disbale interrupt to avoid race condition */ -+ local_irq_save(flags); -+ -+ /* -+ * Set GPIO Port A control register so that the pins are configured -+ * to be outputs for controlling the NAND flash. -+ */ -+ __raw_writel((__raw_readl(GPIO_PADDR) | 0x58) & ~0x80, GPIO_PADDR); -+ /* Clear NCE, clear CLE, clear ALE */ -+ __raw_writel( (__raw_readl(GPIO_PADR) | 0x08 ) & ~0x50, GPIO_PADR); -+ /* Set SRAM controller to 32 bit (8 bit just doesn't work, don't know why) bus width and 7 CLK wait state */ -+ __raw_writel(0x10003ce0, SMCBCR1); -+ local_irq_restore(flags); -+ -+ -+ /* insert callbacks */ -+ this->IO_ADDR_R = (void *) gesbc_fio_base; -+ this->IO_ADDR_W = (void *) gesbc_fio_base; -+ this->cmd_ctrl = (void *) gesbc_hwcontrol; -+ this->dev_ready = gesbc_device_ready; -+ this->chip_delay = 25; -+ this->ecc.mode = NAND_ECC_SOFT; -+ -+ __raw_writel(0xffffffff, gesbc_fio_base); -+ printk("Searching for NAND flash...\n"); -+ /* Scan to find existence of the device */ -+ if (nand_scan (gesbc_mtd, 1)) { -+ iounmap((void *)gesbc_fio_base); -+ kfree (gesbc_mtd); -+ return -ENXIO; -+ } -+ -+#ifdef CONFIG_MTD_CMDLINE_PARTS -+ gesbc_mtd->name="GESBC-NAND"; -+ mtd_parts_nb = parse_mtd_partitions(gesbc_mtd, probes, &mtd_parts, 0); -+ if (mtd_parts_nb > 0) -+ part_type = "command line"; -+ else -+ mtd_parts_nb = 0; -+#endif -+ -+ if (mtd_parts_nb == 0) -+ { -+ mtd_parts_nb = NUM_PARTITIONS; -+ mtd_parts = partition_info32; -+ if (gesbc_mtd->size >= (128 * 0x100000)) -+ mtd_parts = partition_info128; -+ if (gesbc_mtd->size >= (256 * 0x100000)) -+ mtd_parts = partition_info256; -+ if (gesbc_mtd->size >= (512 * 0x100000)) -+ mtd_parts = partition_info512; -+ part_type = "static"; -+ } -+ -+ /* Register the partitions */ -+ printk(KERN_NOTICE "Using %s partition definition\n", part_type); -+ add_mtd_partitions(gesbc_mtd, mtd_parts, mtd_parts_nb); -+ -+ /* Return happy */ -+ return 0; -+} -+module_init(gesbc_nand_init); -+ -+/* -+ * Clean up routine -+ */ -+static void __exit gesbc_nand_cleanup (void) -+{ -+/* struct nand_chip *this = (struct nand_chip *) &gesbc_mtd[1]; */ -+ -+ /* Unregister the device */ -+ del_mtd_device (gesbc_mtd); -+ -+ /* Free the MTD device structure */ -+ kfree (gesbc_mtd); -+} -+module_exit(gesbc_nand_cleanup); -+ -+MODULE_LICENSE("GPL"); -+MODULE_AUTHOR("zql@glomationinc.com"); -+MODULE_DESCRIPTION("MTD map driver for Glomation GESBC-93xx board"); -+ --- -1.5.4.rc4 - diff --git a/packages/linux/linux-2.6.24/gesbc-9302/0002-gesbc-eth-platform.patch b/packages/linux/linux-2.6.24/gesbc-9302/0002-gesbc-eth-platform.patch deleted file mode 100644 index 3afda5a225..0000000000 --- a/packages/linux/linux-2.6.24/gesbc-9302/0002-gesbc-eth-platform.patch +++ /dev/null @@ -1,54 +0,0 @@ -From b537e497d5490e7e8d94a49b7fbf2200c13ef200 Mon Sep 17 00:00:00 2001 -From: Cliff Brake <cbrake@bec-systems.com> -Date: Sat, 19 Jan 2008 17:56:56 -0500 -Subject: [PATCH] gesbc-eth-platform - ---- - arch/arm/mach-ep93xx/edb9302.c | 27 +++++++++++++++++++++++++++ - 1 files changed, 27 insertions(+), 0 deletions(-) - -diff --git a/arch/arm/mach-ep93xx/edb9302.c b/arch/arm/mach-ep93xx/edb9302.c -index 0315615..8dbeb7c 100644 ---- a/arch/arm/mach-ep93xx/edb9302.c -+++ b/arch/arm/mach-ep93xx/edb9302.c -@@ -43,10 +43,37 @@ static struct platform_device edb9302_flash = { - .resource = &edb9302_flash_resource, - }; - -+static struct ep93xx_eth_data ep93xx_eth_data = { -+ .phy_id = 1, -+}; -+ -+static struct resource ep93xx_eth_resource[] = { -+ { -+ .start = EP93XX_ETHERNET_PHYS_BASE, -+ .end = EP93XX_ETHERNET_PHYS_BASE + 0xffff, -+ .flags = IORESOURCE_MEM, -+ }, { -+ .start = IRQ_EP93XX_ETHERNET, -+ .end = IRQ_EP93XX_ETHERNET, -+ .flags = IORESOURCE_IRQ, -+ } -+}; -+ -+static struct platform_device ep93xx_eth_device = { -+ .name = "ep93xx-eth", -+ .id = -1, -+ .dev = { -+ .platform_data = &ep93xx_eth_data, -+ }, -+ .num_resources = 2, -+ .resource = ep93xx_eth_resource, -+}; -+ - static void __init edb9302_init_machine(void) - { - ep93xx_init_devices(); - platform_device_register(&edb9302_flash); -+ platform_device_register(&ep93xx_eth_device); - } - - MACHINE_START(EDB9302, "Cirrus Logic EDB9302 Evaluation Board") --- -1.5.4.rc4 - diff --git a/packages/linux/linux-2.6.24/gesbc-9302/0003-gesbc9302-defconfig.patch b/packages/linux/linux-2.6.24/gesbc-9302/0003-gesbc9302-defconfig.patch deleted file mode 100644 index 8fca0d5c10..0000000000 --- a/packages/linux/linux-2.6.24/gesbc-9302/0003-gesbc9302-defconfig.patch +++ /dev/null @@ -1,1184 +0,0 @@ -From d0d110243832e82847ea3e0a806bb6e6edaaf71f Mon Sep 17 00:00:00 2001 -From: Cliff Brake <cbrake@happy.(none)> -Date: Mon, 17 Dec 2007 16:46:19 -0500 -Subject: [PATCH] gesbc9302-defconfig - ---- - arch/arm/configs/gesbc9302_defconfig | 1165 ++++++++++++++++++++++++++++++++++ - 1 files changed, 1165 insertions(+), 0 deletions(-) - create mode 100644 arch/arm/configs/gesbc9302_defconfig - -diff --git a/arch/arm/configs/gesbc9302_defconfig b/arch/arm/configs/gesbc9302_defconfig -new file mode 100644 -index 0000000..da4fc81 ---- /dev/null -+++ b/arch/arm/configs/gesbc9302_defconfig -@@ -0,0 +1,1165 @@ -+# -+# Automatically generated make config: don't edit -+# Linux kernel version: 2.6.24 -+# Thu Jan 31 23:28:43 2008 -+# -+CONFIG_ARM=y -+CONFIG_SYS_SUPPORTS_APM_EMULATION=y -+# CONFIG_GENERIC_GPIO is not set -+# CONFIG_GENERIC_TIME is not set -+# CONFIG_GENERIC_CLOCKEVENTS is not set -+CONFIG_MMU=y -+# CONFIG_NO_IOPORT is not set -+CONFIG_GENERIC_HARDIRQS=y -+CONFIG_STACKTRACE_SUPPORT=y -+CONFIG_LOCKDEP_SUPPORT=y -+CONFIG_TRACE_IRQFLAGS_SUPPORT=y -+CONFIG_HARDIRQS_SW_RESEND=y -+CONFIG_GENERIC_IRQ_PROBE=y -+CONFIG_RWSEM_GENERIC_SPINLOCK=y -+# CONFIG_ARCH_HAS_ILOG2_U32 is not set -+# CONFIG_ARCH_HAS_ILOG2_U64 is not set -+CONFIG_GENERIC_HWEIGHT=y -+CONFIG_GENERIC_CALIBRATE_DELAY=y -+CONFIG_ZONE_DMA=y -+CONFIG_VECTORS_BASE=0xffff0000 -+CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" -+ -+# -+# General setup -+# -+CONFIG_EXPERIMENTAL=y -+CONFIG_BROKEN_ON_SMP=y -+CONFIG_INIT_ENV_ARG_LIMIT=32 -+CONFIG_LOCALVERSION="" -+CONFIG_LOCALVERSION_AUTO=y -+CONFIG_SWAP=y -+CONFIG_SYSVIPC=y -+CONFIG_SYSVIPC_SYSCTL=y -+# CONFIG_POSIX_MQUEUE is not set -+# CONFIG_BSD_PROCESS_ACCT is not set -+# CONFIG_TASKSTATS is not set -+# CONFIG_USER_NS is not set -+# CONFIG_PID_NS is not set -+# CONFIG_AUDIT is not set -+CONFIG_IKCONFIG=y -+CONFIG_IKCONFIG_PROC=y -+CONFIG_LOG_BUF_SHIFT=14 -+# CONFIG_CGROUPS is not set -+# CONFIG_FAIR_GROUP_SCHED is not set -+# CONFIG_SYSFS_DEPRECATED is not set -+# CONFIG_RELAY is not set -+CONFIG_BLK_DEV_INITRD=y -+CONFIG_INITRAMFS_SOURCE="" -+CONFIG_CC_OPTIMIZE_FOR_SIZE=y -+CONFIG_SYSCTL=y -+CONFIG_EMBEDDED=y -+CONFIG_UID16=y -+CONFIG_SYSCTL_SYSCALL=y -+CONFIG_KALLSYMS=y -+# CONFIG_KALLSYMS_ALL is not set -+# CONFIG_KALLSYMS_EXTRA_PASS is not set -+CONFIG_HOTPLUG=y -+CONFIG_PRINTK=y -+CONFIG_BUG=y -+CONFIG_ELF_CORE=y -+CONFIG_BASE_FULL=y -+CONFIG_FUTEX=y -+CONFIG_ANON_INODES=y -+CONFIG_EPOLL=y -+CONFIG_SIGNALFD=y -+CONFIG_EVENTFD=y -+CONFIG_SHMEM=y -+CONFIG_VM_EVENT_COUNTERS=y -+CONFIG_SLAB=y -+# CONFIG_SLUB is not set -+# CONFIG_SLOB is not set -+CONFIG_SLABINFO=y -+CONFIG_RT_MUTEXES=y -+# CONFIG_TINY_SHMEM is not set -+CONFIG_BASE_SMALL=0 -+CONFIG_MODULES=y -+CONFIG_MODULE_UNLOAD=y -+CONFIG_MODULE_FORCE_UNLOAD=y -+# CONFIG_MODVERSIONS is not set -+# CONFIG_MODULE_SRCVERSION_ALL is not set -+CONFIG_KMOD=y -+CONFIG_BLOCK=y -+# CONFIG_LBD is not set -+# CONFIG_BLK_DEV_IO_TRACE is not set -+# CONFIG_LSF is not set -+# CONFIG_BLK_DEV_BSG is not set -+ -+# -+# IO Schedulers -+# -+CONFIG_IOSCHED_NOOP=y -+# CONFIG_IOSCHED_AS is not set -+CONFIG_IOSCHED_DEADLINE=y -+# CONFIG_IOSCHED_CFQ is not set -+# CONFIG_DEFAULT_AS is not set -+CONFIG_DEFAULT_DEADLINE=y -+# CONFIG_DEFAULT_CFQ is not set -+# CONFIG_DEFAULT_NOOP is not set -+CONFIG_DEFAULT_IOSCHED="deadline" -+ -+# -+# System Type -+# -+# CONFIG_ARCH_AAEC2000 is not set -+# CONFIG_ARCH_INTEGRATOR is not set -+# CONFIG_ARCH_REALVIEW is not set -+# CONFIG_ARCH_VERSATILE is not set -+# CONFIG_ARCH_AT91 is not set -+# CONFIG_ARCH_CLPS7500 is not set -+# CONFIG_ARCH_CLPS711X is not set -+# CONFIG_ARCH_CO285 is not set -+# CONFIG_ARCH_EBSA110 is not set -+CONFIG_ARCH_EP93XX=y -+# CONFIG_ARCH_FOOTBRIDGE is not set -+# CONFIG_ARCH_NETX is not set -+# CONFIG_ARCH_H720X is not set -+# CONFIG_ARCH_IMX is not set -+# CONFIG_ARCH_IOP13XX is not set -+# CONFIG_ARCH_IOP32X is not set -+# CONFIG_ARCH_IOP33X is not set -+# CONFIG_ARCH_IXP23XX is not set -+# CONFIG_ARCH_IXP2000 is not set -+# CONFIG_ARCH_IXP4XX is not set -+# CONFIG_ARCH_L7200 is not set -+# CONFIG_ARCH_KS8695 is not set -+# CONFIG_ARCH_NS9XXX is not set -+# CONFIG_ARCH_MXC is not set -+# CONFIG_ARCH_PNX4008 is not set -+# CONFIG_ARCH_PXA is not set -+# CONFIG_ARCH_RPC is not set -+# CONFIG_ARCH_SA1100 is not set -+# CONFIG_ARCH_S3C2410 is not set -+# CONFIG_ARCH_SHARK is not set -+# CONFIG_ARCH_LH7A40X is not set -+# CONFIG_ARCH_DAVINCI is not set -+# CONFIG_ARCH_OMAP is not set -+ -+# -+# Cirrus EP93xx Implementation Options -+# -+CONFIG_CRUNCH=y -+ -+# -+# EP93xx Platforms -+# -+# CONFIG_MACH_ADSSPHERE is not set -+CONFIG_MACH_EDB9302=y -+# CONFIG_MACH_EDB9302A is not set -+# CONFIG_MACH_EDB9307 is not set -+# CONFIG_MACH_EDB9312 is not set -+# CONFIG_MACH_EDB9315 is not set -+# CONFIG_MACH_EDB9315A is not set -+# CONFIG_MACH_GESBC9312 is not set -+# CONFIG_MACH_MICRO9 is not set -+# CONFIG_MACH_MICRO9H is not set -+# CONFIG_MACH_MICRO9M is not set -+# CONFIG_MACH_MICRO9L is not set -+# CONFIG_MACH_TS72XX is not set -+ -+# -+# Boot options -+# -+ -+# -+# Power management -+# -+ -+# -+# Processor Type -+# -+CONFIG_CPU_32=y -+CONFIG_CPU_ARM920T=y -+CONFIG_CPU_32v4T=y -+CONFIG_CPU_ABRT_EV4T=y -+CONFIG_CPU_CACHE_V4WT=y -+CONFIG_CPU_CACHE_VIVT=y -+CONFIG_CPU_COPY_V4WB=y -+CONFIG_CPU_TLB_V4WBI=y -+CONFIG_CPU_CP15=y -+CONFIG_CPU_CP15_MMU=y -+ -+# -+# Processor Features -+# -+# CONFIG_ARM_THUMB is not set -+# CONFIG_CPU_ICACHE_DISABLE is not set -+# CONFIG_CPU_DCACHE_DISABLE is not set -+# CONFIG_CPU_DCACHE_WRITETHROUGH is not set -+# CONFIG_OUTER_CACHE is not set -+CONFIG_ARM_VIC=y -+ -+# -+# Bus support -+# -+CONFIG_ARM_AMBA=y -+# CONFIG_PCI_SYSCALL is not set -+# CONFIG_ARCH_SUPPORTS_MSI is not set -+# CONFIG_PCCARD is not set -+ -+# -+# Kernel Features -+# -+# CONFIG_TICK_ONESHOT is not set -+# CONFIG_PREEMPT is not set -+# CONFIG_NO_IDLE_HZ is not set -+CONFIG_HZ=100 -+CONFIG_AEABI=y -+CONFIG_OABI_COMPAT=y -+# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set -+CONFIG_SELECT_MEMORY_MODEL=y -+CONFIG_FLATMEM_MANUAL=y -+# CONFIG_DISCONTIGMEM_MANUAL is not set -+# CONFIG_SPARSEMEM_MANUAL is not set -+CONFIG_FLATMEM=y -+CONFIG_FLAT_NODE_MEM_MAP=y -+# CONFIG_SPARSEMEM_STATIC is not set -+# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set -+CONFIG_SPLIT_PTLOCK_CPUS=4096 -+# CONFIG_RESOURCES_64BIT is not set -+CONFIG_ZONE_DMA_FLAG=1 -+CONFIG_BOUNCE=y -+CONFIG_VIRT_TO_BUS=y -+CONFIG_ALIGNMENT_TRAP=y -+ -+# -+# Boot options -+# -+CONFIG_ZBOOT_ROM_TEXT=0x0 -+CONFIG_ZBOOT_ROM_BSS=0x0 -+CONFIG_CMDLINE="console=ttyAM0 root=mtd5 rootfstype=jffs2 mtdparts=GESBC-NAND:64m(app),-(data)" -+# CONFIG_XIP_KERNEL is not set -+# CONFIG_KEXEC is not set -+ -+# -+# Floating point emulation -+# -+ -+# -+# At least one emulation must be selected -+# -+CONFIG_FPE_NWFPE=y -+CONFIG_FPE_NWFPE_XP=y -+# CONFIG_FPE_FASTFPE is not set -+ -+# -+# Userspace binary formats -+# -+CONFIG_BINFMT_ELF=y -+# CONFIG_BINFMT_AOUT is not set -+# CONFIG_BINFMT_MISC is not set -+ -+# -+# Power management options -+# -+# CONFIG_PM is not set -+CONFIG_SUSPEND_UP_POSSIBLE=y -+ -+# -+# Networking -+# -+CONFIG_NET=y -+ -+# -+# Networking options -+# -+CONFIG_PACKET=y -+CONFIG_PACKET_MMAP=y -+CONFIG_UNIX=y -+CONFIG_XFRM=y -+# CONFIG_XFRM_USER is not set -+# CONFIG_XFRM_SUB_POLICY is not set -+# CONFIG_XFRM_MIGRATE is not set -+CONFIG_NET_KEY=y -+# CONFIG_NET_KEY_MIGRATE is not set -+CONFIG_INET=y -+# CONFIG_IP_MULTICAST is not set -+# CONFIG_IP_ADVANCED_ROUTER is not set -+CONFIG_IP_FIB_HASH=y -+CONFIG_IP_PNP=y -+CONFIG_IP_PNP_DHCP=y -+CONFIG_IP_PNP_BOOTP=y -+# CONFIG_IP_PNP_RARP is not set -+# CONFIG_NET_IPIP is not set -+# CONFIG_NET_IPGRE is not set -+# CONFIG_ARPD is not set -+CONFIG_SYN_COOKIES=y -+# CONFIG_INET_AH is not set -+# CONFIG_INET_ESP is not set -+# CONFIG_INET_IPCOMP is not set -+# CONFIG_INET_XFRM_TUNNEL is not set -+# CONFIG_INET_TUNNEL is not set -+CONFIG_INET_XFRM_MODE_TRANSPORT=y -+CONFIG_INET_XFRM_MODE_TUNNEL=y -+CONFIG_INET_XFRM_MODE_BEET=y -+# CONFIG_INET_LRO is not set -+CONFIG_INET_DIAG=y -+CONFIG_INET_TCP_DIAG=y -+# CONFIG_TCP_CONG_ADVANCED is not set -+CONFIG_TCP_CONG_CUBIC=y -+CONFIG_DEFAULT_TCP_CONG="cubic" -+# CONFIG_TCP_MD5SIG is not set -+# CONFIG_IPV6 is not set -+# CONFIG_INET6_XFRM_TUNNEL is not set -+# CONFIG_INET6_TUNNEL is not set -+# CONFIG_NETWORK_SECMARK is not set -+# CONFIG_NETFILTER is not set -+# CONFIG_IP_DCCP is not set -+# CONFIG_IP_SCTP is not set -+# CONFIG_TIPC is not set -+# CONFIG_ATM is not set -+# CONFIG_BRIDGE is not set -+# CONFIG_VLAN_8021Q is not set -+# CONFIG_DECNET is not set -+# CONFIG_LLC2 is not set -+# CONFIG_IPX is not set -+# CONFIG_ATALK is not set -+# CONFIG_X25 is not set -+# CONFIG_LAPB is not set -+# CONFIG_ECONET is not set -+# CONFIG_WAN_ROUTER is not set -+# CONFIG_NET_SCHED is not set -+ -+# -+# Network testing -+# -+# CONFIG_NET_PKTGEN is not set -+# CONFIG_HAMRADIO is not set -+# CONFIG_IRDA is not set -+# CONFIG_BT is not set -+# CONFIG_AF_RXRPC is not set -+ -+# -+# Wireless -+# -+# CONFIG_CFG80211 is not set -+# CONFIG_WIRELESS_EXT is not set -+# CONFIG_MAC80211 is not set -+# CONFIG_IEEE80211 is not set -+# CONFIG_RFKILL is not set -+# CONFIG_NET_9P is not set -+ -+# -+# Device Drivers -+# -+ -+# -+# Generic Driver Options -+# -+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" -+CONFIG_STANDALONE=y -+CONFIG_PREVENT_FIRMWARE_BUILD=y -+# CONFIG_FW_LOADER is not set -+# CONFIG_DEBUG_DRIVER is not set -+# CONFIG_DEBUG_DEVRES is not set -+# CONFIG_SYS_HYPERVISOR is not set -+# CONFIG_CONNECTOR is not set -+CONFIG_MTD=y -+# CONFIG_MTD_DEBUG is not set -+CONFIG_MTD_CONCAT=y -+CONFIG_MTD_PARTITIONS=y -+CONFIG_MTD_REDBOOT_PARTS=y -+CONFIG_MTD_REDBOOT_DIRECTORY_BLOCK=-1 -+# CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED is not set -+# CONFIG_MTD_REDBOOT_PARTS_READONLY is not set -+CONFIG_MTD_CMDLINE_PARTS=y -+# CONFIG_MTD_AFS_PARTS is not set -+ -+# -+# User Modules And Translation Layers -+# -+CONFIG_MTD_CHAR=y -+CONFIG_MTD_BLKDEVS=y -+CONFIG_MTD_BLOCK=y -+# CONFIG_FTL is not set -+# CONFIG_NFTL is not set -+# CONFIG_INFTL is not set -+# CONFIG_RFD_FTL is not set -+# CONFIG_SSFDC is not set -+# CONFIG_MTD_OOPS is not set -+ -+# -+# RAM/ROM/Flash chip drivers -+# -+CONFIG_MTD_CFI=y -+# CONFIG_MTD_JEDECPROBE is not set -+CONFIG_MTD_GEN_PROBE=y -+CONFIG_MTD_CFI_ADV_OPTIONS=y -+CONFIG_MTD_CFI_NOSWAP=y -+# CONFIG_MTD_CFI_BE_BYTE_SWAP is not set -+# CONFIG_MTD_CFI_LE_BYTE_SWAP is not set -+# CONFIG_MTD_CFI_GEOMETRY is not set -+CONFIG_MTD_MAP_BANK_WIDTH_1=y -+CONFIG_MTD_MAP_BANK_WIDTH_2=y -+CONFIG_MTD_MAP_BANK_WIDTH_4=y -+# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set -+# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set -+# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set -+CONFIG_MTD_CFI_I1=y -+CONFIG_MTD_CFI_I2=y -+# CONFIG_MTD_CFI_I4 is not set -+# CONFIG_MTD_CFI_I8 is not set -+# CONFIG_MTD_OTP is not set -+CONFIG_MTD_CFI_INTELEXT=y -+CONFIG_MTD_CFI_AMDSTD=y -+CONFIG_MTD_CFI_STAA=y -+CONFIG_MTD_CFI_UTIL=y -+# CONFIG_MTD_RAM is not set -+CONFIG_MTD_ROM=y -+# CONFIG_MTD_ABSENT is not set -+ -+# -+# Mapping drivers for chip access -+# -+# CONFIG_MTD_COMPLEX_MAPPINGS is not set -+CONFIG_MTD_PHYSMAP=y -+CONFIG_MTD_PHYSMAP_START=0x0 -+CONFIG_MTD_PHYSMAP_LEN=0x0 -+CONFIG_MTD_PHYSMAP_BANKWIDTH=1 -+# CONFIG_MTD_ARM_INTEGRATOR is not set -+# CONFIG_MTD_PLATRAM is not set -+ -+# -+# Self-contained MTD device drivers -+# -+# CONFIG_MTD_SLRAM is not set -+# CONFIG_MTD_PHRAM is not set -+# CONFIG_MTD_MTDRAM is not set -+# CONFIG_MTD_BLOCK2MTD is not set -+ -+# -+# Disk-On-Chip Device Drivers -+# -+# CONFIG_MTD_DOC2000 is not set -+# CONFIG_MTD_DOC2001 is not set -+# CONFIG_MTD_DOC2001PLUS is not set -+CONFIG_MTD_NAND=y -+CONFIG_MTD_NAND_VERIFY_WRITE=y -+# CONFIG_MTD_NAND_ECC_SMC is not set -+# CONFIG_MTD_NAND_MUSEUM_IDS is not set -+CONFIG_MTD_NAND_GESBC=y -+CONFIG_MTD_NAND_IDS=y -+# CONFIG_MTD_NAND_DISKONCHIP is not set -+# CONFIG_MTD_NAND_NANDSIM is not set -+# CONFIG_MTD_NAND_PLATFORM is not set -+# CONFIG_MTD_ALAUDA is not set -+# CONFIG_MTD_ONENAND is not set -+ -+# -+# UBI - Unsorted block images -+# -+# CONFIG_MTD_UBI is not set -+# CONFIG_PARPORT is not set -+CONFIG_BLK_DEV=y -+# CONFIG_BLK_DEV_COW_COMMON is not set -+# CONFIG_BLK_DEV_LOOP is not set -+# CONFIG_BLK_DEV_NBD is not set -+# CONFIG_BLK_DEV_UB is not set -+CONFIG_BLK_DEV_RAM=y -+CONFIG_BLK_DEV_RAM_COUNT=16 -+CONFIG_BLK_DEV_RAM_SIZE=12288 -+CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024 -+# CONFIG_CDROM_PKTCDVD is not set -+# CONFIG_ATA_OVER_ETH is not set -+CONFIG_MISC_DEVICES=y -+# CONFIG_EEPROM_93CX6 is not set -+ -+# -+# SCSI device support -+# -+# CONFIG_RAID_ATTRS is not set -+CONFIG_SCSI=y -+CONFIG_SCSI_DMA=y -+# CONFIG_SCSI_TGT is not set -+# CONFIG_SCSI_NETLINK is not set -+# CONFIG_SCSI_PROC_FS is not set -+ -+# -+# SCSI support type (disk, tape, CD-ROM) -+# -+CONFIG_BLK_DEV_SD=y -+# CONFIG_CHR_DEV_ST is not set -+# CONFIG_CHR_DEV_OSST is not set -+# CONFIG_BLK_DEV_SR is not set -+# CONFIG_CHR_DEV_SG is not set -+# CONFIG_CHR_DEV_SCH is not set -+ -+# -+# Some SCSI devices (e.g. CD jukebox) support multiple LUNs -+# -+# CONFIG_SCSI_MULTI_LUN is not set -+# CONFIG_SCSI_CONSTANTS is not set -+# CONFIG_SCSI_LOGGING is not set -+# CONFIG_SCSI_SCAN_ASYNC is not set -+CONFIG_SCSI_WAIT_SCAN=m -+ -+# -+# SCSI Transports -+# -+# CONFIG_SCSI_SPI_ATTRS is not set -+# CONFIG_SCSI_FC_ATTRS is not set -+# CONFIG_SCSI_ISCSI_ATTRS is not set -+# CONFIG_SCSI_SAS_LIBSAS is not set -+# CONFIG_SCSI_SRP_ATTRS is not set -+CONFIG_SCSI_LOWLEVEL=y -+# CONFIG_ISCSI_TCP is not set -+# CONFIG_SCSI_DEBUG is not set -+# CONFIG_ATA is not set -+# CONFIG_MD is not set -+CONFIG_NETDEVICES=y -+# CONFIG_NETDEVICES_MULTIQUEUE is not set -+# CONFIG_DUMMY is not set -+# CONFIG_BONDING is not set -+# CONFIG_MACVLAN is not set -+# CONFIG_EQUALIZER is not set -+# CONFIG_TUN is not set -+# CONFIG_VETH is not set -+# CONFIG_PHYLIB is not set -+CONFIG_NET_ETHERNET=y -+CONFIG_MII=y -+CONFIG_EP93XX_ETH=y -+# CONFIG_AX88796 is not set -+# CONFIG_SMC91X is not set -+# CONFIG_DM9000 is not set -+# CONFIG_IBM_NEW_EMAC_ZMII is not set -+# CONFIG_IBM_NEW_EMAC_RGMII is not set -+# CONFIG_IBM_NEW_EMAC_TAH is not set -+# CONFIG_IBM_NEW_EMAC_EMAC4 is not set -+# CONFIG_B44 is not set -+# CONFIG_NETDEV_1000 is not set -+# CONFIG_NETDEV_10000 is not set -+ -+# -+# Wireless LAN -+# -+# CONFIG_WLAN_PRE80211 is not set -+# CONFIG_WLAN_80211 is not set -+ -+# -+# USB Network Adapters -+# -+# CONFIG_USB_CATC is not set -+# CONFIG_USB_KAWETH is not set -+# CONFIG_USB_PEGASUS is not set -+# CONFIG_USB_RTL8150 is not set -+# CONFIG_USB_USBNET is not set -+# CONFIG_WAN is not set -+# CONFIG_PPP is not set -+# CONFIG_SLIP is not set -+# CONFIG_SHAPER is not set -+# CONFIG_NETCONSOLE is not set -+# CONFIG_NETPOLL is not set -+# CONFIG_NET_POLL_CONTROLLER is not set -+# CONFIG_ISDN is not set -+ -+# -+# Input device support -+# -+# CONFIG_INPUT is not set -+ -+# -+# Hardware I/O ports -+# -+# CONFIG_SERIO is not set -+# CONFIG_GAMEPORT is not set -+ -+# -+# Character devices -+# -+# CONFIG_VT is not set -+# CONFIG_SERIAL_NONSTANDARD is not set -+ -+# -+# Serial drivers -+# -+# CONFIG_SERIAL_8250 is not set -+ -+# -+# Non-8250 serial port support -+# -+CONFIG_SERIAL_AMBA_PL010=y -+CONFIG_SERIAL_AMBA_PL010_CONSOLE=y -+# CONFIG_SERIAL_AMBA_PL011 is not set -+CONFIG_SERIAL_CORE=y -+CONFIG_SERIAL_CORE_CONSOLE=y -+CONFIG_UNIX98_PTYS=y -+# CONFIG_LEGACY_PTYS is not set -+# CONFIG_IPMI_HANDLER is not set -+# CONFIG_HW_RANDOM is not set -+# CONFIG_NVRAM is not set -+# CONFIG_R3964 is not set -+# CONFIG_RAW_DRIVER is not set -+# CONFIG_TCG_TPM is not set -+CONFIG_I2C=y -+CONFIG_I2C_BOARDINFO=y -+CONFIG_I2C_CHARDEV=y -+ -+# -+# I2C Algorithms -+# -+CONFIG_I2C_ALGOBIT=y -+# CONFIG_I2C_ALGOPCF is not set -+# CONFIG_I2C_ALGOPCA is not set -+ -+# -+# I2C Hardware Bus support -+# -+# CONFIG_I2C_OCORES is not set -+# CONFIG_I2C_PARPORT_LIGHT is not set -+# CONFIG_I2C_SIMTEC is not set -+# CONFIG_I2C_TAOS_EVM is not set -+# CONFIG_I2C_STUB is not set -+# CONFIG_I2C_TINY_USB is not set -+ -+# -+# Miscellaneous I2C Chip support -+# -+CONFIG_SENSORS_DS1337=y -+# CONFIG_SENSORS_DS1374 is not set -+# CONFIG_DS1682 is not set -+# CONFIG_SENSORS_EEPROM is not set -+# CONFIG_SENSORS_PCF8574 is not set -+# CONFIG_SENSORS_PCA9539 is not set -+# CONFIG_SENSORS_PCF8591 is not set -+# CONFIG_SENSORS_MAX6875 is not set -+# CONFIG_SENSORS_TSL2550 is not set -+CONFIG_I2C_DEBUG_CORE=y -+CONFIG_I2C_DEBUG_ALGO=y -+CONFIG_I2C_DEBUG_BUS=y -+CONFIG_I2C_DEBUG_CHIP=y -+ -+# -+# SPI support -+# -+# CONFIG_SPI is not set -+# CONFIG_SPI_MASTER is not set -+# CONFIG_W1 is not set -+# CONFIG_POWER_SUPPLY is not set -+CONFIG_HWMON=y -+# CONFIG_HWMON_VID is not set -+# CONFIG_SENSORS_AD7418 is not set -+# CONFIG_SENSORS_ADM1021 is not set -+# CONFIG_SENSORS_ADM1025 is not set -+# CONFIG_SENSORS_ADM1026 is not set -+# CONFIG_SENSORS_ADM1029 is not set -+# CONFIG_SENSORS_ADM1031 is not set -+# CONFIG_SENSORS_ADM9240 is not set -+# CONFIG_SENSORS_ADT7470 is not set -+# CONFIG_SENSORS_ATXP1 is not set -+# CONFIG_SENSORS_DS1621 is not set -+# CONFIG_SENSORS_F71805F is not set -+# CONFIG_SENSORS_F71882FG is not set -+# CONFIG_SENSORS_F75375S is not set -+# CONFIG_SENSORS_GL518SM is not set -+# CONFIG_SENSORS_GL520SM is not set -+# CONFIG_SENSORS_IT87 is not set -+# CONFIG_SENSORS_LM63 is not set -+# CONFIG_SENSORS_LM75 is not set -+# CONFIG_SENSORS_LM77 is not set -+# CONFIG_SENSORS_LM78 is not set -+# CONFIG_SENSORS_LM80 is not set -+# CONFIG_SENSORS_LM83 is not set -+# CONFIG_SENSORS_LM85 is not set -+# CONFIG_SENSORS_LM87 is not set -+# CONFIG_SENSORS_LM90 is not set -+# CONFIG_SENSORS_LM92 is not set -+# CONFIG_SENSORS_LM93 is not set -+# CONFIG_SENSORS_MAX1619 is not set -+# CONFIG_SENSORS_MAX6650 is not set -+# CONFIG_SENSORS_PC87360 is not set -+# CONFIG_SENSORS_PC87427 is not set -+# CONFIG_SENSORS_DME1737 is not set -+# CONFIG_SENSORS_SMSC47M1 is not set -+# CONFIG_SENSORS_SMSC47M192 is not set -+# CONFIG_SENSORS_SMSC47B397 is not set -+# CONFIG_SENSORS_THMC50 is not set -+# CONFIG_SENSORS_VT1211 is not set -+# CONFIG_SENSORS_W83781D is not set -+# CONFIG_SENSORS_W83791D is not set -+# CONFIG_SENSORS_W83792D is not set -+# CONFIG_SENSORS_W83793 is not set -+# CONFIG_SENSORS_W83L785TS is not set -+# CONFIG_SENSORS_W83627HF is not set -+# CONFIG_SENSORS_W83627EHF is not set -+# CONFIG_HWMON_DEBUG_CHIP is not set -+CONFIG_WATCHDOG=y -+# CONFIG_WATCHDOG_NOWAYOUT is not set -+ -+# -+# Watchdog Device Drivers -+# -+# CONFIG_SOFT_WATCHDOG is not set -+CONFIG_EP93XX_WATCHDOG=y -+ -+# -+# USB-based Watchdog Cards -+# -+# CONFIG_USBPCWATCHDOG is not set -+ -+# -+# Sonics Silicon Backplane -+# -+CONFIG_SSB_POSSIBLE=y -+# CONFIG_SSB is not set -+ -+# -+# Multifunction device drivers -+# -+# CONFIG_MFD_SM501 is not set -+ -+# -+# Multimedia devices -+# -+# CONFIG_VIDEO_DEV is not set -+# CONFIG_DVB_CORE is not set -+# CONFIG_DAB is not set -+ -+# -+# Graphics support -+# -+# CONFIG_VGASTATE is not set -+# CONFIG_VIDEO_OUTPUT_CONTROL is not set -+# CONFIG_FB is not set -+# CONFIG_BACKLIGHT_LCD_SUPPORT is not set -+ -+# -+# Display device support -+# -+# CONFIG_DISPLAY_SUPPORT is not set -+ -+# -+# Sound -+# -+# CONFIG_SOUND is not set -+CONFIG_USB_SUPPORT=y -+CONFIG_USB_ARCH_HAS_HCD=y -+CONFIG_USB_ARCH_HAS_OHCI=y -+# CONFIG_USB_ARCH_HAS_EHCI is not set -+CONFIG_USB=y -+CONFIG_USB_DEBUG=y -+ -+# -+# Miscellaneous USB options -+# -+CONFIG_USB_DEVICEFS=y -+# CONFIG_USB_DEVICE_CLASS is not set -+CONFIG_USB_DYNAMIC_MINORS=y -+# CONFIG_USB_OTG is not set -+ -+# -+# USB Host Controller Drivers -+# -+# CONFIG_USB_ISP116X_HCD is not set -+CONFIG_USB_OHCI_HCD=y -+# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set -+# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set -+CONFIG_USB_OHCI_LITTLE_ENDIAN=y -+# CONFIG_USB_SL811_HCD is not set -+# CONFIG_USB_R8A66597_HCD is not set -+ -+# -+# USB Device Class drivers -+# -+# CONFIG_USB_ACM is not set -+# CONFIG_USB_PRINTER is not set -+ -+# -+# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' -+# -+ -+# -+# may also be needed; see USB_STORAGE Help for more information -+# -+CONFIG_USB_STORAGE=y -+# CONFIG_USB_STORAGE_DEBUG is not set -+# CONFIG_USB_STORAGE_DATAFAB is not set -+# CONFIG_USB_STORAGE_FREECOM is not set -+# CONFIG_USB_STORAGE_ISD200 is not set -+# CONFIG_USB_STORAGE_DPCM is not set -+# CONFIG_USB_STORAGE_USBAT is not set -+# CONFIG_USB_STORAGE_SDDR09 is not set -+# CONFIG_USB_STORAGE_SDDR55 is not set -+# CONFIG_USB_STORAGE_JUMPSHOT is not set -+# CONFIG_USB_STORAGE_ALAUDA is not set -+# CONFIG_USB_STORAGE_KARMA is not set -+# CONFIG_USB_LIBUSUAL is not set -+ -+# -+# USB Imaging devices -+# -+# CONFIG_USB_MDC800 is not set -+# CONFIG_USB_MICROTEK is not set -+# CONFIG_USB_MON is not set -+ -+# -+# USB port drivers -+# -+ -+# -+# USB Serial Converter support -+# -+CONFIG_USB_SERIAL=m -+CONFIG_USB_SERIAL_GENERIC=y -+# CONFIG_USB_SERIAL_AIRCABLE is not set -+# CONFIG_USB_SERIAL_AIRPRIME is not set -+# CONFIG_USB_SERIAL_ARK3116 is not set -+# CONFIG_USB_SERIAL_BELKIN is not set -+# CONFIG_USB_SERIAL_CH341 is not set -+# CONFIG_USB_SERIAL_WHITEHEAT is not set -+# CONFIG_USB_SERIAL_DIGI_ACCELEPORT is not set -+# CONFIG_USB_SERIAL_CP2101 is not set -+# CONFIG_USB_SERIAL_CYPRESS_M8 is not set -+# CONFIG_USB_SERIAL_EMPEG is not set -+CONFIG_USB_SERIAL_FTDI_SIO=m -+# CONFIG_USB_SERIAL_FUNSOFT is not set -+# CONFIG_USB_SERIAL_VISOR is not set -+# CONFIG_USB_SERIAL_IPAQ is not set -+# CONFIG_USB_SERIAL_IR is not set -+# CONFIG_USB_SERIAL_EDGEPORT is not set -+# CONFIG_USB_SERIAL_EDGEPORT_TI is not set -+# CONFIG_USB_SERIAL_GARMIN is not set -+# CONFIG_USB_SERIAL_IPW is not set -+# CONFIG_USB_SERIAL_KEYSPAN_PDA is not set -+# CONFIG_USB_SERIAL_KEYSPAN is not set -+# CONFIG_USB_SERIAL_KLSI is not set -+# CONFIG_USB_SERIAL_KOBIL_SCT is not set -+# CONFIG_USB_SERIAL_MCT_U232 is not set -+# CONFIG_USB_SERIAL_MOS7720 is not set -+# CONFIG_USB_SERIAL_MOS7840 is not set -+# CONFIG_USB_SERIAL_NAVMAN is not set -+# CONFIG_USB_SERIAL_PL2303 is not set -+# CONFIG_USB_SERIAL_OTI6858 is not set -+# CONFIG_USB_SERIAL_HP4X is not set -+# CONFIG_USB_SERIAL_SAFE is not set -+# CONFIG_USB_SERIAL_SIERRAWIRELESS is not set -+# CONFIG_USB_SERIAL_TI is not set -+# CONFIG_USB_SERIAL_CYBERJACK is not set -+# CONFIG_USB_SERIAL_XIRCOM is not set -+# CONFIG_USB_SERIAL_OPTION is not set -+# CONFIG_USB_SERIAL_OMNINET is not set -+# CONFIG_USB_SERIAL_DEBUG is not set -+ -+# -+# USB Miscellaneous drivers -+# -+# CONFIG_USB_EMI62 is not set -+# CONFIG_USB_EMI26 is not set -+# CONFIG_USB_ADUTUX is not set -+# CONFIG_USB_AUERSWALD is not set -+# CONFIG_USB_RIO500 is not set -+# CONFIG_USB_LEGOTOWER is not set -+# CONFIG_USB_LCD is not set -+# CONFIG_USB_BERRY_CHARGE is not set -+# CONFIG_USB_LED is not set -+# CONFIG_USB_CYPRESS_CY7C63 is not set -+# CONFIG_USB_CYTHERM is not set -+# CONFIG_USB_PHIDGET is not set -+# CONFIG_USB_IDMOUSE is not set -+# CONFIG_USB_FTDI_ELAN is not set -+# CONFIG_USB_APPLEDISPLAY is not set -+# CONFIG_USB_LD is not set -+# CONFIG_USB_TRANCEVIBRATOR is not set -+# CONFIG_USB_IOWARRIOR is not set -+# CONFIG_USB_TEST is not set -+ -+# -+# USB DSL modem support -+# -+ -+# -+# USB Gadget Support -+# -+# CONFIG_USB_GADGET is not set -+# CONFIG_MMC is not set -+# CONFIG_NEW_LEDS is not set -+CONFIG_RTC_LIB=y -+CONFIG_RTC_CLASS=y -+CONFIG_RTC_HCTOSYS=y -+CONFIG_RTC_HCTOSYS_DEVICE="rtc0" -+# CONFIG_RTC_DEBUG is not set -+ -+# -+# RTC interfaces -+# -+CONFIG_RTC_INTF_SYSFS=y -+CONFIG_RTC_INTF_PROC=y -+CONFIG_RTC_INTF_DEV=y -+# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set -+# CONFIG_RTC_DRV_TEST is not set -+ -+# -+# I2C RTC drivers -+# -+# CONFIG_RTC_DRV_DS1307 is not set -+# CONFIG_RTC_DRV_DS1374 is not set -+# CONFIG_RTC_DRV_DS1672 is not set -+# CONFIG_RTC_DRV_MAX6900 is not set -+# CONFIG_RTC_DRV_RS5C372 is not set -+# CONFIG_RTC_DRV_ISL1208 is not set -+# CONFIG_RTC_DRV_X1205 is not set -+# CONFIG_RTC_DRV_PCF8563 is not set -+# CONFIG_RTC_DRV_PCF8583 is not set -+# CONFIG_RTC_DRV_M41T80 is not set -+ -+# -+# SPI RTC drivers -+# -+ -+# -+# Platform RTC drivers -+# -+# CONFIG_RTC_DRV_CMOS is not set -+# CONFIG_RTC_DRV_DS1553 is not set -+# CONFIG_RTC_DRV_STK17TA8 is not set -+# CONFIG_RTC_DRV_DS1742 is not set -+# CONFIG_RTC_DRV_M48T86 is not set -+# CONFIG_RTC_DRV_M48T59 is not set -+# CONFIG_RTC_DRV_V3020 is not set -+ -+# -+# on-CPU RTC drivers -+# -+CONFIG_RTC_DRV_EP93XX=y -+# CONFIG_RTC_DRV_PL031 is not set -+ -+# -+# File systems -+# -+CONFIG_EXT2_FS=y -+# CONFIG_EXT2_FS_XATTR is not set -+# CONFIG_EXT2_FS_XIP is not set -+CONFIG_EXT3_FS=y -+# CONFIG_EXT3_FS_XATTR is not set -+# CONFIG_EXT4DEV_FS is not set -+CONFIG_JBD=y -+# CONFIG_REISERFS_FS is not set -+# CONFIG_JFS_FS is not set -+# CONFIG_FS_POSIX_ACL is not set -+# CONFIG_XFS_FS is not set -+# CONFIG_GFS2_FS is not set -+# CONFIG_OCFS2_FS is not set -+# CONFIG_MINIX_FS is not set -+# CONFIG_ROMFS_FS is not set -+CONFIG_INOTIFY=y -+CONFIG_INOTIFY_USER=y -+# CONFIG_QUOTA is not set -+CONFIG_DNOTIFY=y -+# CONFIG_AUTOFS_FS is not set -+# CONFIG_AUTOFS4_FS is not set -+# CONFIG_FUSE_FS is not set -+ -+# -+# CD-ROM/DVD Filesystems -+# -+# CONFIG_ISO9660_FS is not set -+# CONFIG_UDF_FS is not set -+ -+# -+# DOS/FAT/NT Filesystems -+# -+CONFIG_FAT_FS=y -+# CONFIG_MSDOS_FS is not set -+CONFIG_VFAT_FS=y -+CONFIG_FAT_DEFAULT_CODEPAGE=437 -+CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" -+# CONFIG_NTFS_FS is not set -+ -+# -+# Pseudo filesystems -+# -+CONFIG_PROC_FS=y -+CONFIG_PROC_SYSCTL=y -+CONFIG_SYSFS=y -+CONFIG_TMPFS=y -+# CONFIG_TMPFS_POSIX_ACL is not set -+# CONFIG_HUGETLB_PAGE is not set -+# CONFIG_CONFIGFS_FS is not set -+ -+# -+# Miscellaneous filesystems -+# -+# CONFIG_ADFS_FS is not set -+# CONFIG_AFFS_FS is not set -+# CONFIG_HFS_FS is not set -+# CONFIG_HFSPLUS_FS is not set -+# CONFIG_BEFS_FS is not set -+# CONFIG_BFS_FS is not set -+# CONFIG_EFS_FS is not set -+CONFIG_JFFS2_FS=y -+CONFIG_JFFS2_FS_DEBUG=0 -+CONFIG_JFFS2_FS_WRITEBUFFER=y -+# CONFIG_JFFS2_FS_WBUF_VERIFY is not set -+CONFIG_JFFS2_SUMMARY=y -+# CONFIG_JFFS2_FS_XATTR is not set -+# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set -+CONFIG_JFFS2_ZLIB=y -+# CONFIG_JFFS2_LZO is not set -+CONFIG_JFFS2_RTIME=y -+# CONFIG_JFFS2_RUBIN is not set -+# CONFIG_CRAMFS is not set -+# CONFIG_VXFS_FS is not set -+# CONFIG_HPFS_FS is not set -+# CONFIG_QNX4FS_FS is not set -+# CONFIG_SYSV_FS is not set -+# CONFIG_UFS_FS is not set -+CONFIG_NETWORK_FILESYSTEMS=y -+CONFIG_NFS_FS=y -+CONFIG_NFS_V3=y -+# CONFIG_NFS_V3_ACL is not set -+# CONFIG_NFS_V4 is not set -+# CONFIG_NFS_DIRECTIO is not set -+# CONFIG_NFSD is not set -+CONFIG_ROOT_NFS=y -+CONFIG_LOCKD=y -+CONFIG_LOCKD_V4=y -+CONFIG_NFS_COMMON=y -+CONFIG_SUNRPC=y -+# CONFIG_SUNRPC_BIND34 is not set -+# CONFIG_RPCSEC_GSS_KRB5 is not set -+# CONFIG_RPCSEC_GSS_SPKM3 is not set -+CONFIG_SMB_FS=y -+# CONFIG_SMB_NLS_DEFAULT is not set -+# CONFIG_CIFS is not set -+# CONFIG_NCP_FS is not set -+# CONFIG_CODA_FS is not set -+# CONFIG_AFS_FS is not set -+ -+# -+# Partition Types -+# -+CONFIG_PARTITION_ADVANCED=y -+# CONFIG_ACORN_PARTITION is not set -+# CONFIG_OSF_PARTITION is not set -+# CONFIG_AMIGA_PARTITION is not set -+# CONFIG_ATARI_PARTITION is not set -+# CONFIG_MAC_PARTITION is not set -+CONFIG_MSDOS_PARTITION=y -+# CONFIG_BSD_DISKLABEL is not set -+# CONFIG_MINIX_SUBPARTITION is not set -+# CONFIG_SOLARIS_X86_PARTITION is not set -+# CONFIG_UNIXWARE_DISKLABEL is not set -+# CONFIG_LDM_PARTITION is not set -+# CONFIG_SGI_PARTITION is not set -+# CONFIG_ULTRIX_PARTITION is not set -+# CONFIG_SUN_PARTITION is not set -+# CONFIG_KARMA_PARTITION is not set -+# CONFIG_EFI_PARTITION is not set -+# CONFIG_SYSV68_PARTITION is not set -+CONFIG_NLS=y -+CONFIG_NLS_DEFAULT="iso8859-1" -+CONFIG_NLS_CODEPAGE_437=y -+# CONFIG_NLS_CODEPAGE_737 is not set -+# CONFIG_NLS_CODEPAGE_775 is not set -+# CONFIG_NLS_CODEPAGE_850 is not set -+# CONFIG_NLS_CODEPAGE_852 is not set -+# CONFIG_NLS_CODEPAGE_855 is not set -+# CONFIG_NLS_CODEPAGE_857 is not set -+# CONFIG_NLS_CODEPAGE_860 is not set -+# CONFIG_NLS_CODEPAGE_861 is not set -+# CONFIG_NLS_CODEPAGE_862 is not set -+# CONFIG_NLS_CODEPAGE_863 is not set -+# CONFIG_NLS_CODEPAGE_864 is not set -+# CONFIG_NLS_CODEPAGE_865 is not set -+# CONFIG_NLS_CODEPAGE_866 is not set -+# CONFIG_NLS_CODEPAGE_869 is not set -+# CONFIG_NLS_CODEPAGE_936 is not set -+# CONFIG_NLS_CODEPAGE_950 is not set -+# CONFIG_NLS_CODEPAGE_932 is not set -+# CONFIG_NLS_CODEPAGE_949 is not set -+# CONFIG_NLS_CODEPAGE_874 is not set -+# CONFIG_NLS_ISO8859_8 is not set -+# CONFIG_NLS_CODEPAGE_1250 is not set -+# CONFIG_NLS_CODEPAGE_1251 is not set -+# CONFIG_NLS_ASCII is not set -+CONFIG_NLS_ISO8859_1=y -+# CONFIG_NLS_ISO8859_2 is not set -+# CONFIG_NLS_ISO8859_3 is not set -+# CONFIG_NLS_ISO8859_4 is not set -+# CONFIG_NLS_ISO8859_5 is not set -+# CONFIG_NLS_ISO8859_6 is not set -+# CONFIG_NLS_ISO8859_7 is not set -+# CONFIG_NLS_ISO8859_9 is not set -+# CONFIG_NLS_ISO8859_13 is not set -+# CONFIG_NLS_ISO8859_14 is not set -+# CONFIG_NLS_ISO8859_15 is not set -+# CONFIG_NLS_KOI8_R is not set -+# CONFIG_NLS_KOI8_U is not set -+# CONFIG_NLS_UTF8 is not set -+# CONFIG_DLM is not set -+CONFIG_INSTRUMENTATION=y -+# CONFIG_PROFILING is not set -+# CONFIG_MARKERS is not set -+ -+# -+# Kernel hacking -+# -+# CONFIG_PRINTK_TIME is not set -+CONFIG_ENABLE_WARN_DEPRECATED=y -+CONFIG_ENABLE_MUST_CHECK=y -+CONFIG_MAGIC_SYSRQ=y -+# CONFIG_UNUSED_SYMBOLS is not set -+# CONFIG_DEBUG_FS is not set -+# CONFIG_HEADERS_CHECK is not set -+CONFIG_DEBUG_KERNEL=y -+# CONFIG_DEBUG_SHIRQ is not set -+CONFIG_DETECT_SOFTLOCKUP=y -+CONFIG_SCHED_DEBUG=y -+# CONFIG_SCHEDSTATS is not set -+# CONFIG_TIMER_STATS is not set -+CONFIG_DEBUG_SLAB=y -+# CONFIG_DEBUG_SLAB_LEAK is not set -+# CONFIG_DEBUG_RT_MUTEXES is not set -+# CONFIG_RT_MUTEX_TESTER is not set -+CONFIG_DEBUG_SPINLOCK=y -+CONFIG_DEBUG_MUTEXES=y -+# CONFIG_DEBUG_LOCK_ALLOC is not set -+# CONFIG_PROVE_LOCKING is not set -+# CONFIG_LOCK_STAT is not set -+# CONFIG_DEBUG_SPINLOCK_SLEEP is not set -+# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set -+# CONFIG_DEBUG_KOBJECT is not set -+CONFIG_DEBUG_BUGVERBOSE=y -+# CONFIG_DEBUG_INFO is not set -+# CONFIG_DEBUG_VM is not set -+# CONFIG_DEBUG_LIST is not set -+# CONFIG_DEBUG_SG is not set -+CONFIG_FRAME_POINTER=y -+CONFIG_FORCED_INLINING=y -+# CONFIG_BOOT_PRINTK_DELAY is not set -+# CONFIG_RCU_TORTURE_TEST is not set -+# CONFIG_FAULT_INJECTION is not set -+# CONFIG_SAMPLES is not set -+CONFIG_DEBUG_USER=y -+CONFIG_DEBUG_ERRORS=y -+CONFIG_DEBUG_LL=y -+# CONFIG_DEBUG_ICEDCC is not set -+ -+# -+# Security options -+# -+# CONFIG_KEYS is not set -+# CONFIG_SECURITY is not set -+# CONFIG_SECURITY_FILE_CAPABILITIES is not set -+# CONFIG_CRYPTO is not set -+ -+# -+# Library routines -+# -+CONFIG_BITREVERSE=y -+# CONFIG_CRC_CCITT is not set -+# CONFIG_CRC16 is not set -+# CONFIG_CRC_ITU_T is not set -+CONFIG_CRC32=y -+# CONFIG_CRC7 is not set -+CONFIG_LIBCRC32C=y -+CONFIG_ZLIB_INFLATE=y -+CONFIG_ZLIB_DEFLATE=y -+CONFIG_PLIST=y -+CONFIG_HAS_IOMEM=y -+CONFIG_HAS_IOPORT=y -+CONFIG_HAS_DMA=y --- -1.5.4.rc4 - diff --git a/packages/linux/linux-2.6.24/gesbc-9302/0005-ep93xx-reboot.patch b/packages/linux/linux-2.6.24/gesbc-9302/0005-ep93xx-reboot.patch deleted file mode 100644 index fa84a0bbcf..0000000000 --- a/packages/linux/linux-2.6.24/gesbc-9302/0005-ep93xx-reboot.patch +++ /dev/null @@ -1,1256 +0,0 @@ -From 1b16045d453045e93b4f94cc57d3205ae9b9d118 Mon Sep 17 00:00:00 2001 -From: Cliff Brake <cbrake@bec-systems.com> -Date: Thu, 7 Feb 2008 08:47:28 -0500 -Subject: [PATCH] ep93xx-reboot - ---- - include/asm-arm/arch-ep93xx/ep93xx-regs.h | 1047 ++++++++++++++++++++++++++++- - include/asm-arm/arch-ep93xx/system.h | 114 +++- - 2 files changed, 1148 insertions(+), 13 deletions(-) - -diff --git a/include/asm-arm/arch-ep93xx/ep93xx-regs.h b/include/asm-arm/arch-ep93xx/ep93xx-regs.h -index 625c6f0..6e799d9 100644 ---- a/include/asm-arm/arch-ep93xx/ep93xx-regs.h -+++ b/include/asm-arm/arch-ep93xx/ep93xx-regs.h -@@ -15,17 +15,898 @@ - */ - - #define EP93XX_AHB_PHYS_BASE 0x80000000 --#define EP93XX_AHB_VIRT_BASE 0xfef00000 -+#define EP93XX_AHB_VIRT_BASE 0xff000000//0xfef00000 - #define EP93XX_AHB_SIZE 0x00100000 - -+ - #define EP93XX_APB_PHYS_BASE 0x80800000 --#define EP93XX_APB_VIRT_BASE 0xfed00000 -+#define EP93XX_APB_VIRT_BASE 0xff800000//0xfed00000 - #define EP93XX_APB_SIZE 0x00200000 - - --/* AHB peripherals */ -+#define IO_BASE_PHYS EP93XX_AHB_PHYS_BASE -+#define IO_BASE_VIRT EP93XX_AHB_VIRT_BASE -+/* -+ * We don't map the PCMCIA initially. The PCMCIA driver will use ioremap -+ * to be able to see it. But besides that PCMCIA will not exist in the -+ * memory map. -+ */ -+#define PCMCIA_BASE_VIRT 0xD0000000 // Virtual address of PCMCIA -+#define PCMCIA_BASE_PHYS 0x40000000 // Physical address of PCMCIA -+#define PCMCIA_SIZE 0x10000000 // How much? -+ -+ -+ -+/* -+ * We don't map the PCMCIA initially. The PCMCIA driver will use ioremap -+ * to be able to see it. But besides that PCMCIA will not exist in the */ -+/* SMC register map */ -+/* Address Read Location Write Location */ -+/* 0x8000.2000 SMCBCR0(Bank config register 0) SMCBCR0(Bank config register 0) */ -+/* 0x8000.2004 SMCBCR1(Bank config register 1) SMCBCR1(Bank config register 1) */ -+/* 0x8000.2008 SMCBCR2(Bank config register 2) SMCBCR2(Bank config register 2) */ -+/* 0x8000.200C SMCBCR3(Bank config register 3) SMCBCR3(Bank config register 3) */ -+/* 0x8000.2010 Reserved, RAZ Reserved, RAZ */ -+/* 0x8000.2014 Reserved, RAZ Reserved, RAZ */ -+/* 0x8000.2018 SMCBCR6(Bank config register 6) SMCBCR6(Bank config register 6) */ -+/* 0x8000.201C SMCBCR7(Bank config register 7) SMCBCR7(Bank config register 7) */ -+/* 0x8000.2020 PCAttribute Register PCAttribute Register */ -+/* 0x8000.2024 PCCommon Register PCCommon Register */ -+/* 0x8000.2028 PCIO Register PCIO Register */ -+/* 0x8000.202C Reserved, RAZ Reserved, RAZ */ -+/* 0x8000.2030 Reserved, RAZ Reserved, RAZ */ -+/* 0x8000.2034 Reserved, RAZ Reserved, RAZ */ -+/* 0x8000.2038 Reserved, RAZ Reserved, RAZ */ -+/* 0x8000.203C Reserved, RAZ Reserved, RAZ */ -+/* 0x8000.2040 PCMCIACtrl Register PCMCIACtrl Register */ -+ -+#define SRAM_OFFSET 0x080000 -+#define SRAM_BASE (EP93XX_AHB_VIRT_BASE|SRAM_OFFSET) -+#define SMCBCR0 (SRAM_BASE+0x00) /* 0x8000.2000 Bank config register 0 */ -+#define SMCBCR1 (SRAM_BASE+0x04) /* 0x8000.2004 Bank config register 1 */ -+#define SMCBCR2 (SRAM_BASE+0x08) /* 0x8000.2008 Bank config register 2 */ -+#define SMCBCR3 (SRAM_BASE+0x0C) /* 0x8000.200C Bank config register 3 */ -+ /* 0x8000.2010 Reserved, RAZ */ -+ /* 0x8000.2014 Reserved, RAZ */ -+#define SMCBCR6 (SRAM_BASE+0x18) /* 0x8000.2018 Bank config register 6 */ -+#define SMCBCR7 (SRAM_BASE+0x1C) /* 0x8000.201C Bank config register 7 */ -+ -+#define SMC_PCAttribute (SRAM_BASE+0x20) /* 0x8000.2020 PCMCIA Attribute Register */ -+#define SMC_PCCommon (SRAM_BASE+0x24) /* 0x8000.2024 PCMCIA Common Register */ -+#define SMC_PCIO (SRAM_BASE+0x28) /* 0x8000.2028 PCMCIA IO Register */ -+ /* 0x8000.202C Reserved, RAZ */ -+ /* 0x8000.2030 Reserved, RAZ */ -+ /* 0x8000.2034 Reserved, RAZ */ -+ /* 0x8000.2038 Reserved, RAZ */ -+ /* 0x8000.203C Reserved, RAZ */ -+#define SMC_PCMCIACtrl (SRAM_BASE+0x40) /* 0x8000.2040 PCMCIA control register */ -+ -+ -+ -+ - #define EP93XX_DMA_BASE (EP93XX_AHB_VIRT_BASE + 0x00000000) -+// -+/* 8000_0000 - 8000_ffff: DMA */ -+#define DMA_OFFSET 0x000000 -+#define DMA_BASE (EP93XX_DMA_BASE) -+#define DMAMP_TX_0_CONTROL (DMA_BASE+0x0000) -+#define DMAMP_TX_0_INTERRUPT (DMA_BASE+0x0004) -+#define DMAMP_TX_0_PPALLOC (DMA_BASE+0x0008) -+#define DMAMP_TX_0_STATUS (DMA_BASE+0x000C) -+#define DMAMP_TX_0_REMAIN (DMA_BASE+0x0014) -+#define DMAMP_TX_0_MAXCNT0 (DMA_BASE+0x0020) -+#define DMAMP_TX_0_BASE0 (DMA_BASE+0x0024) -+#define DMAMP_TX_0_CURRENT0 (DMA_BASE+0x0028) -+#define DMAMP_TX_0_MAXCNT1 (DMA_BASE+0x0030) -+#define DMAMP_TX_0_BASE1 (DMA_BASE+0x0034) -+#define DMAMP_TX_0_CURRENT1 (DMA_BASE+0x0038) -+ -+#define DMAMP_RX_1_CONTROL (DMA_BASE+0x0040) -+#define DMAMP_RX_1_INTERRUPT (DMA_BASE+0x0044) -+#define DMAMP_RX_1_PPALLOC (DMA_BASE+0x0048) -+#define DMAMP_RX_1_STATUS (DMA_BASE+0x004C) -+#define DMAMP_RX_1_REMAIN (DMA_BASE+0x0054) -+#define DMAMP_RX_1_MAXCNT0 (DMA_BASE+0x0060) -+#define DMAMP_RX_1_BASE0 (DMA_BASE+0x0064) -+#define DMAMP_RX_1_CURRENT0 (DMA_BASE+0x0068) -+#define DMAMP_RX_1_MAXCNT1 (DMA_BASE+0x0070) -+#define DMAMP_RX_1_BASE1 (DMA_BASE+0x0074) -+#define DMAMP_RX_1_CURRENT1 (DMA_BASE+0x0078) -+ -+#define DMAMP_TX_2_CONTROL (DMA_BASE+0x0080) -+#define DMAMP_TX_2_INTERRUPT (DMA_BASE+0x0084) -+#define DMAMP_TX_2_PPALLOC (DMA_BASE+0x0088) -+#define DMAMP_TX_2_STATUS (DMA_BASE+0x008C) -+#define DMAMP_TX_2_REMAIN (DMA_BASE+0x0094) -+#define DMAMP_TX_2_MAXCNT0 (DMA_BASE+0x00A0) -+#define DMAMP_TX_2_BASE0 (DMA_BASE+0x00A4) -+#define DMAMP_TX_2_CURRENT0 (DMA_BASE+0x00A8) -+#define DMAMP_TX_2_MAXCNT1 (DMA_BASE+0x00B0) -+#define DMAMP_TX_2_BASE1 (DMA_BASE+0x00B4) -+#define DMAMP_TX_2_CURRENT1 (DMA_BASE+0x00B8) -+ -+#define DMAMP_RX_3_CONTROL (DMA_BASE+0x00C0) -+#define DMAMP_RX_3_INTERRUPT (DMA_BASE+0x00C4) -+#define DMAMP_RX_3_PPALLOC (DMA_BASE+0x00C8) -+#define DMAMP_RX_3_STATUS (DMA_BASE+0x00CC) -+#define DMAMP_RX_3_REMAIN (DMA_BASE+0x00D4) -+#define DMAMP_RX_3_MAXCNT0 (DMA_BASE+0x00E0) -+#define DMAMP_RX_3_BASE0 (DMA_BASE+0x00E4) -+#define DMAMP_RX_3_CURRENT0 (DMA_BASE+0x00E8) -+#define DMAMP_RX_3_MAXCNT1 (DMA_BASE+0x00F0) -+#define DMAMP_RX_3_BASE1 (DMA_BASE+0x00F4) -+#define DMAMP_RX_3_CURRENT1 (DMA_BASE+0x00F8) -+ -+#define DMAMM_0_CONTROL (DMA_BASE+0x0100) -+#define DMAMM_0_INTERRUPT (DMA_BASE+0x0104) -+#define DMAMM_0_STATUS (DMA_BASE+0x010C) -+#define DMAMM_0_BCR0 (DMA_BASE+0x0110) -+#define DMAMM_0_BCR1 (DMA_BASE+0x0114) -+#define DMAMM_0_SAR_BASE0 (DMA_BASE+0x0118) -+#define DMAMM_0_SAR_BASE1 (DMA_BASE+0x011C) -+#define DMAMM_0_SAR_CURRENT0 (DMA_BASE+0x0124) -+#define DMAMM_0_SAR_CURRENT1 (DMA_BASE+0x0128) -+#define DMAMM_0_DAR_BASE0 (DMA_BASE+0x012C) -+#define DMAMM_0_DAR_BASE1 (DMA_BASE+0x0130) -+#define DMAMM_0_DAR_CURRENT0 (DMA_BASE+0x0134) -+#define DMAMM_0_DAR_CURRENT1 (DMA_BASE+0x013C) -+ -+#define DMAMM_1_CONTROL (DMA_BASE+0x0140) -+#define DMAMM_1_INTERRUPT (DMA_BASE+0x0144) -+#define DMAMM_1_STATUS (DMA_BASE+0x014C) -+#define DMAMM_1_BCR0 (DMA_BASE+0x0150) -+#define DMAMM_1_BCR1 (DMA_BASE+0x0154) -+#define DMAMM_1_SAR_BASE0 (DMA_BASE+0x0158) -+#define DMAMM_1_SAR_BASE1 (DMA_BASE+0x015C) -+#define DMAMM_1_SAR_CURRENT0 (DMA_BASE+0x0164) -+#define DMAMM_1_SAR_CURRENT1 (DMA_BASE+0x0168) -+#define DMAMM_1_DAR_BASE0 (DMA_BASE+0x016C) -+#define DMAMM_1_DAR_BASE1 (DMA_BASE+0x0170) -+#define DMAMM_1_DAR_CURRENT0 (DMA_BASE+0x0174) -+#define DMAMM_1_DAR_CURRENT1 (DMA_BASE+0x017C) -+ -+#define DMAMP_RX_5_CONTROL (DMA_BASE+0x0200) -+#define DMAMP_RX_5_INTERRUPT (DMA_BASE+0x0204) -+#define DMAMP_RX_5_PPALLOC (DMA_BASE+0x0208) -+#define DMAMP_RX_5_STATUS (DMA_BASE+0x020C) -+#define DMAMP_RX_5_REMAIN (DMA_BASE+0x0214) -+#define DMAMP_RX_5_MAXCNT0 (DMA_BASE+0x0220) -+#define DMAMP_RX_5_BASE0 (DMA_BASE+0x0224) -+#define DMAMP_RX_5_CURRENT0 (DMA_BASE+0x0228) -+#define DMAMP_RX_5_MAXCNT1 (DMA_BASE+0x0230) -+#define DMAMP_RX_5_BASE1 (DMA_BASE+0x0234) -+#define DMAMP_RX_5_CURRENT1 (DMA_BASE+0x0238) -+ -+#define DMAMP_TX_4_CONTROL (DMA_BASE+0x0240) -+#define DMAMP_TX_4_INTERRUPT (DMA_BASE+0x0244) -+#define DMAMP_TX_4_PPALLOC (DMA_BASE+0x0248) -+#define DMAMP_TX_4_STATUS (DMA_BASE+0x024C) -+#define DMAMP_TX_4_REMAIN (DMA_BASE+0x0254) -+#define DMAMP_TX_4_MAXCNT0 (DMA_BASE+0x0260) -+#define DMAMP_TX_4_BASE0 (DMA_BASE+0x0264) -+#define DMAMP_TX_4_CURRENT0 (DMA_BASE+0x0268) -+#define DMAMP_TX_4_MAXCNT1 (DMA_BASE+0x0270) -+#define DMAMP_TX_4_BASE1 (DMA_BASE+0x0274) -+#define DMAMP_TX_4_CURRENT1 (DMA_BASE+0x0278) -+ -+#define DMAMP_RX_7_CONTROL (DMA_BASE+0x0280) -+#define DMAMP_RX_7_INTERRUPT (DMA_BASE+0x0284) -+#define DMAMP_RX_7_PPALLOC (DMA_BASE+0x0288) -+#define DMAMP_RX_7_STATUS (DMA_BASE+0x028C) -+#define DMAMP_RX_7_REMAIN (DMA_BASE+0x0294) -+#define DMAMP_RX_7_MAXCNT0 (DMA_BASE+0x02A0) -+#define DMAMP_RX_7_BASE0 (DMA_BASE+0x02A4) -+#define DMAMP_RX_7_CURRENT0 (DMA_BASE+0x02A8) -+#define DMAMP_RX_7_MAXCNT1 (DMA_BASE+0x02B0) -+#define DMAMP_RX_7_BASE1 (DMA_BASE+0x02B4) -+#define DMAMP_RX_7_CURRENT1 (DMA_BASE+0x02B8) -+ -+#define DMAMP_TX_6_CONTROL (DMA_BASE+0x02C0) -+#define DMAMP_TX_6_INTERRUPT (DMA_BASE+0x02C4) -+#define DMAMP_TX_6_PPALLOC (DMA_BASE+0x02C8) -+#define DMAMP_TX_6_STATUS (DMA_BASE+0x02CC) -+#define DMAMP_TX_6_REMAIN (DMA_BASE+0x02D4) -+#define DMAMP_TX_6_MAXCNT0 (DMA_BASE+0x02E0) -+#define DMAMP_TX_6_BASE0 (DMA_BASE+0x02E4) -+#define DMAMP_TX_6_CURRENT0 (DMA_BASE+0x02E8) -+#define DMAMP_TX_6_MAXCNT1 (DMA_BASE+0x02F0) -+#define DMAMP_TX_6_BASE1 (DMA_BASE+0x02F4) -+#define DMAMP_TX_6_CURRENT1 (DMA_BASE+0x02F8) -+ -+#define DMAMP_RX_9_CONTROL (DMA_BASE+0x0300) -+#define DMAMP_RX_9_INTERRUPT (DMA_BASE+0x0304) -+#define DMAMP_RX_9_PPALLOC (DMA_BASE+0x0308) -+#define DMAMP_RX_9_STATUS (DMA_BASE+0x030C) -+#define DMAMP_RX_9_REMAIN (DMA_BASE+0x0314) -+#define DMAMP_RX_9_MAXCNT0 (DMA_BASE+0x0320) -+#define DMAMP_RX_9_BASE0 (DMA_BASE+0x0324) -+#define DMAMP_RX_9_CURRENT0 (DMA_BASE+0x0328) -+#define DMAMP_RX_9_MAXCNT1 (DMA_BASE+0x0330) -+#define DMAMP_RX_9_BASE1 (DMA_BASE+0x0334) -+#define DMAMP_RX_9_CURRENT1 (DMA_BASE+0x0338) -+ -+#define DMAMP_TX_8_CONTROL (DMA_BASE+0x0340) -+#define DMAMP_TX_8_INTERRUPT (DMA_BASE+0x0344) -+#define DMAMP_TX_8_PPALLOC (DMA_BASE+0x0348) -+#define DMAMP_TX_8_STATUS (DMA_BASE+0x034C) -+#define DMAMP_TX_8_REMAIN (DMA_BASE+0x0354) -+#define DMAMP_TX_8_MAXCNT0 (DMA_BASE+0x0360) -+#define DMAMP_TX_8_BASE0 (DMA_BASE+0x0364) -+#define DMAMP_TX_8_CURRENT0 (DMA_BASE+0x0368) -+#define DMAMP_TX_8_MAXCNT1 (DMA_BASE+0x0370) -+#define DMAMP_TX_8_BASE1 (DMA_BASE+0x0374) -+#define DMAMP_TX_8_CURRENT1 (DMA_BASE+0x0378) -+ -+#define DMA_ARBITRATION (DMA_BASE+0x0380) -+#define DMA_INTERRUPT (DMA_BASE+0x03C0) -+ -+ -+/* -+ * DMA Register Base addresses and Offsets -+ */ -+#define DMA_M2P_TX_0_BASE DMAMP_TX_0_CONTROL -+#define DMA_M2P_RX_1_BASE DMAMP_RX_1_CONTROL -+#define DMA_M2P_TX_2_BASE DMAMP_TX_2_CONTROL -+#define DMA_M2P_RX_3_BASE DMAMP_RX_3_CONTROL -+#define DMA_M2M_0_BASE DMAMM_0_CONTROL -+#define DMA_M2M_1_BASE DMAMM_1_CONTROL -+#define DMA_M2P_RX_5_BASE DMAMP_RX_5_CONTROL -+#define DMA_M2P_TX_4_BASE DMAMP_TX_4_CONTROL -+#define DMA_M2P_RX_7_BASE DMAMP_RX_7_CONTROL -+#define DMA_M2P_TX_6_BASE DMAMP_TX_6_CONTROL -+#define DMA_M2P_RX_9_BASE DMAMP_RX_9_CONTROL -+#define DMA_M2P_TX_8_BASE DMAMP_TX_8_CONTROL -+ -+#define M2P_OFFSET_CONTROL 0x0000 -+#define M2P_OFFSET_INTERRUPT 0x0004 -+#define M2P_OFFSET_PPALLOC 0x0008 -+#define M2P_OFFSET_STATUS 0x000C -+#define M2P_OFFSET_REMAIN 0x0014 -+#define M2P_OFFSET_MAXCNT0 0x0020 -+#define M2P_OFFSET_BASE0 0x0024 -+#define M2P_OFFSET_CURRENT0 0x0028 -+#define M2P_OFFSET_MAXCNT1 0x0030 -+#define M2P_OFFSET_BASE1 0x0034 -+#define M2P_OFFSET_CURRENT1 0x0038 -+ -+#define M2M_OFFSET_CONTROL 0x0000 -+#define M2M_OFFSET_INTERRUPT 0x0004 -+#define M2M_OFFSET_STATUS 0x000C -+#define M2M_OFFSET_BCR0 0x0010 -+#define M2M_OFFSET_BCR1 0x0014 -+#define M2M_OFFSET_SAR_BASE0 0x0018 -+#define M2M_OFFSET_SAR_BASE1 0x001C -+#define M2M_OFFSET_SAR_CURRENT0 0x0024 -+#define M2M_OFFSET_SAR_CURRENT1 0x0028 -+#define M2M_OFFSET_DAR_BASE0 0x002C -+#define M2M_OFFSET_DAR_BASE1 0x0030 -+#define M2M_OFFSET_DAR_CURRENT0 0x0034 -+#define M2M_OFFSET_DAR_CURRENT1 0x003C -+ -+ -+ -+/* 8003_0000 - 8003_ffff: Raster */ -+#define RASTER_OFFSET 0x030000 -+#define RASTER_BASE (EP93XX_AHB_VIRT_BASE|RASTER_OFFSET) -+#define VLINESTOTAL (RASTER_BASE+0x00) -+#define VSYNCSTRTSTOP (RASTER_BASE+0x04) -+#define VACTIVESTRTSTOP (RASTER_BASE+0x08) -+#define VCLKSTRTSTOP (RASTER_BASE+0x0C) -+#define HCLKSTOTAL (RASTER_BASE+0x10) -+#define HSYNCSTRTSTOP (RASTER_BASE+0x14) -+#define HACTIVESTRTSTOP (RASTER_BASE+0x18) -+#define HCLKSTRTSTOP (RASTER_BASE+0x1C) -+#define BRIGHTNESS (RASTER_BASE+0x20) -+#define VIDEOATTRIBS (RASTER_BASE+0x24) -+#define VIDSCRNPAGE (RASTER_BASE+0x28) -+#define VIDSCRNHPG (RASTER_BASE+0x2C) -+#define SCRNLINES (RASTER_BASE+0x30) -+#define LINELENGTH (RASTER_BASE+0x34) -+#define VLINESTEP (RASTER_BASE+0x38) -+#define LINECARRY (RASTER_BASE+0x3C) -+#define BLINKRATE (RASTER_BASE+0x40) -+#define BLINKMASK (RASTER_BASE+0x44) -+#define BLINKPATTRN (RASTER_BASE+0x48) -+#define PATTRNMASK (RASTER_BASE+0x4C) -+#define BG_OFFSET (RASTER_BASE+0x50) -+#define PIXELMODE (RASTER_BASE+0x54) -+#define PARLLIFOUT (RASTER_BASE+0x58) -+#define PARLLIFIN (RASTER_BASE+0x5C) -+#define CURSOR_ADR_START (RASTER_BASE+0x60) -+#define CURSOR_ADR_RESET (RASTER_BASE+0x64) -+#define CURSORSIZE (RASTER_BASE+0x68) -+#define CURSORCOLOR1 (RASTER_BASE+0x6C) -+#define CURSORCOLOR2 (RASTER_BASE+0x70) -+#define CURSORXYLOC (RASTER_BASE+0x74) -+#define CURSOR_DHSCAN_LH_YLOC (RASTER_BASE+0x78) -+#define RASTER_SWLOCK (RASTER_BASE+0x7C) -+#define GS_LUT (RASTER_BASE+0x80) -+#define RASTER_TCR (RASTER_BASE+0x100) -+#define RASTER_TISRA (RASTER_BASE+0x104) -+#define RASTER_TISRB (RASTER_BASE+0x108) -+#define CURSOR_TISR (RASTER_BASE+0x10C) -+#define RASTER_TOCRA (RASTER_BASE+0x110) -+#define RASTER_TOCRB (RASTER_BASE+0x114) -+#define FIFO_TOCRA (RASTER_BASE+0x118) -+#define FIFO_TOCRB (RASTER_BASE+0x11C) -+#define BLINK_TISR (RASTER_BASE+0x120) -+#define DAC_TISRA (RASTER_BASE+0x124) -+#define DAC_TISRB (RASTER_BASE+0x128) -+#define SHIFT_TISR (RASTER_BASE+0x12C) -+#define DACMUX_TOCRA (RASTER_BASE+0x130) -+#define DACMUX_TOCRB (RASTER_BASE+0x134) -+#define PELMUX_TOCR (RASTER_BASE+0x138) -+#define VIDEO_TOCRA (RASTER_BASE+0x13C) -+#define VIDEO_TOCRB (RASTER_BASE+0x140) -+#define YCRCB_TOCR (RASTER_BASE+0x144) -+#define CURSOR_TOCR (RASTER_BASE+0x148) -+#define VIDEO_TOCRC (RASTER_BASE+0x14C) -+#define SHIFT_TOCR (RASTER_BASE+0x150) -+#define BLINK_TOCR (RASTER_BASE+0x154) -+#define RASTER_TCER (RASTER_BASE+0x180) -+#define SIGVAL (RASTER_BASE+0x200) -+#define SIGCTL (RASTER_BASE+0x204) -+#define VSIGSTRTSTOP (RASTER_BASE+0x208) -+#define HSIGSTRTSTOP (RASTER_BASE+0x20C) -+#define SIGCLR (RASTER_BASE+0x210) -+#define ACRATE (RASTER_BASE+0x214) -+#define LUTCONT (RASTER_BASE+0x218) -+#define VBLANKSTRTSTOP (RASTER_BASE+0x228) -+#define HBLANKSTRTSTOP (RASTER_BASE+0x22C) -+#define LUT (RASTER_BASE+0x400) -+#define CURSORBLINK1 (RASTER_BASE+0x21C) -+#define CURSORBLINK2 (RASTER_BASE+0x220) -+#define CURSORBLINK (RASTER_BASE+0x224) -+#define EOLOFFSET (RASTER_BASE+0x230) -+#define FIFOLEVEL (RASTER_BASE+0x234) -+#define GS_LUT2 (RASTER_BASE+0x280) -+#define GS_LUT3 (RASTER_BASE+0x300) -+#define COLOR_LUT (RASTER_BASE+0x400) -+ -+/* 8004_0000 - 8004_ffff: Graphics */ -+#define GRAPHICS_OFFSET 0x040000 -+#define GRAPHICS_BASE (EP93XX_AHB_VIRT_BASE|GRAPHICS_OFFSET) -+#define SRCPIXELSTRT (GRAPHICS_BASE+0x00) -+#define DESTPIXELSTRT (GRAPHICS_BASE+0x04) -+#define BLKSRCSTRT (GRAPHICS_BASE+0x08) -+#define BLKDSTSTRT (GRAPHICS_BASE+0x0C) -+#define BLKSRCWIDTH (GRAPHICS_BASE+0x10) -+#define SRCLINELENGTH (GRAPHICS_BASE+0x14) -+#define BLKDESTWIDTH (GRAPHICS_BASE+0x18) -+#define BLKDESTHEIGHT (GRAPHICS_BASE+0x1C) -+#define DESTLINELENGTH (GRAPHICS_BASE+0x20) -+#define BLOCKCTRL (GRAPHICS_BASE+0x24) -+#define TRANSPATTRN (GRAPHICS_BASE+0x28) -+#define BLOCKMASK (GRAPHICS_BASE+0x2C) -+#define BACKGROUND (GRAPHICS_BASE+0x30) -+#define LINEINC (GRAPHICS_BASE+0x34) -+#define LINEINIT (GRAPHICS_BASE+0x38) -+#define LINEPATTRN (GRAPHICS_BASE+0x3C) -+ -+ -+/* 800B_0000 - 800B_FFFF: VIC 0 */ -+#define VIC0_OFFSET 0x0B0000 -+#define VIC0_BASE (EP93XX_AHB_VIRT_BASE|VIC0_OFFSET) -+#define VIC0 (VIC0_BASE+0x000) -+#define VIC0IRQSTATUS (VIC0_BASE+0x000) /* R IRQ status register */ -+#define VIC0FIQSTATUS (VIC0_BASE+0x004) /* R FIQ status register */ -+#define VIC0RAWINTR (VIC0_BASE+0x008) /* R Raw interrupt status register */ -+#define VIC0INTSELECT (VIC0_BASE+0x00C) /* R/W Interrupt select register */ -+#define VIC0INTENABLE (VIC0_BASE+0x010) /* R/W Interrupt enable register */ -+#define VIC0INTENCLEAR (VIC0_BASE+0x014) /* W Interrupt enable clear register */ -+#define VIC0SOFTINT (VIC0_BASE+0x018) /* R/W Software interrupt register */ -+#define VIC0SOFTINTCLEAR (VIC0_BASE+0x01C) /* R/W Software interrupt clear register */ -+#define VIC0PROTECTION (VIC0_BASE+0x020) /* R/W Protection enable register */ -+#define VIC0VECTADDR (VIC0_BASE+0x030) /* R/W Vector address register */ -+#define VIC0DEFVECTADDR (VIC0_BASE+0x034) /* R/W Default vector address register */ -+#define VIC0VECTADDR00 (VIC0_BASE+0x100) /* R/W Vector address 00 register */ -+#define VIC0VECTADDR01 (VIC0_BASE+0x104) /* R/W Vector address 01 register */ -+#define VIC0VECTADDR02 (VIC0_BASE+0x108) /* R/W Vector address 02 register */ -+#define VIC0VECTADDR03 (VIC0_BASE+0x10C) /* R/W Vector address 03 register */ -+#define VIC0VECTADDR04 (VIC0_BASE+0x110) /* R/W Vector address 04 register */ -+#define VIC0VECTADDR05 (VIC0_BASE+0x114) /* R/W Vector address 05 register */ -+#define VIC0VECTADDR06 (VIC0_BASE+0x118) /* R/W Vector address 06 register */ -+#define VIC0VECTADDR07 (VIC0_BASE+0x11C) /* R/W Vector address 07 register */ -+#define VIC0VECTADDR08 (VIC0_BASE+0x120) /* R/W Vector address 08 register */ -+#define VIC0VECTADDR09 (VIC0_BASE+0x124) /* R/W Vector address 09 register */ -+#define VIC0VECTADDR10 (VIC0_BASE+0x128) /* R/W Vector address 10 register */ -+#define VIC0VECTADDR11 (VIC0_BASE+0x12C) /* R/W Vector address 11 register */ -+#define VIC0VECTADDR12 (VIC0_BASE+0x130) /* R/W Vector address 12 register */ -+#define VIC0VECTADDR13 (VIC0_BASE+0x134) /* R/W Vector address 13 register */ -+#define VIC0VECTADDR14 (VIC0_BASE+0x138) /* R/W Vector address 14 register */ -+#define VIC0VECTADDR15 (VIC0_BASE+0x13C) /* R/W Vector address 15 register */ -+#define VIC0VECTCNTL00 (VIC0_BASE+0x200) /* R/W Vector control 00 register */ -+#define VIC0VECTCNTL01 (VIC0_BASE+0x204) /* R/W Vector control 01 register */ -+#define VIC0VECTCNTL02 (VIC0_BASE+0x208) /* R/W Vector control 02 register */ -+#define VIC0VECTCNTL03 (VIC0_BASE+0x20C) /* R/W Vector control 03 register */ -+#define VIC0VECTCNTL04 (VIC0_BASE+0x210) /* R/W Vector control 04 register */ -+#define VIC0VECTCNTL05 (VIC0_BASE+0x214) /* R/W Vector control 05 register */ -+#define VIC0VECTCNTL06 (VIC0_BASE+0x218) /* R/W Vector control 06 register */ -+#define VIC0VECTCNTL07 (VIC0_BASE+0x21C) /* R/W Vector control 07 register */ -+#define VIC0VECTCNTL08 (VIC0_BASE+0x220) /* R/W Vector control 08 register */ -+#define VIC0VECTCNTL09 (VIC0_BASE+0x224) /* R/W Vector control 09 register */ -+#define VIC0VECTCNTL10 (VIC0_BASE+0x228) /* R/W Vector control 10 register */ -+#define VIC0VECTCNTL11 (VIC0_BASE+0x22C) /* R/W Vector control 11 register */ -+#define VIC0VECTCNTL12 (VIC0_BASE+0x230) /* R/W Vector control 12 register */ -+#define VIC0VECTCNTL13 (VIC0_BASE+0x234) /* R/W Vector control 13 register */ -+#define VIC0VECTCNTL14 (VIC0_BASE+0x238) /* R/W Vector control 14 register */ -+#define VIC0VECTCNTL15 (VIC0_BASE+0x23C) /* R/W Vector control 15 register */ -+#define VIC0ITCR (VIC0_BASE+0x300) /* R/W Test control register */ -+#define VIC0ITIP1 (VIC0_BASE+0x304) /* R Test input register (nVICIRQIN/nVICFIQIN)*/ -+#define VIC0ITIP2 (VIC0_BASE+0x308) /* R Test input register (VICVECTADDRIN) */ -+#define VIC0ITOP1 (VIC0_BASE+0x30C) /* R Test output register (nVICIRQ/nVICFIQ) */ -+#define VIC0ITOP2 (VIC0_BASE+0x310) /* R Test output register (VICVECTADDROUT) */ -+#define VIC0PERIPHID0 (VIC0_BASE+0xFE0) /* R Peripheral ID register bits 7:0 */ -+#define VIC0PERIPHID1 (VIC0_BASE+0xFE4) /* R Peripheral ID register bits 15:8 */ -+#define VIC0PERIPHID2 (VIC0_BASE+0xFE8) /* R Peripheral ID register bits 23:16 */ -+#define VIC0PERIPHID3 (VIC0_BASE+0xFEC) /* R Peripheral ID register bits 31:24 */ -+ -+ -+/* 800C_0000 - 800C_FFFF: VIC 0 */ -+#define VIC1_OFFSET 0x0C0000 -+#define VIC1_BASE (EP93XX_AHB_VIRT_BASE|VIC1_OFFSET) -+#define VIC1 (VIC1_BASE+0x000) -+#define VIC1IRQSTATUS (VIC1_BASE+0x000) /* R IRQ status register */ -+#define VIC1FIQSTATUS (VIC1_BASE+0x004) /* R FIQ status register */ -+#define VIC1RAWINTR (VIC1_BASE+0x008) /* R Raw interrupt status register */ -+#define VIC1INTSELECT (VIC1_BASE+0x00C) /* R/W Interrupt select register */ -+#define VIC1INTENABLE (VIC1_BASE+0x010) /* R/W Interrupt enable register */ -+#define VIC1INTENCLEAR (VIC1_BASE+0x014) /* W Interrupt enable clear register */ -+#define VIC1SOFTINT (VIC1_BASE+0x018) /* R/W Software interrupt register */ -+#define VIC1SOFTINTCLEAR (VIC1_BASE+0x01C) /* R/W Software interrupt clear register */ -+#define VIC1PROTECTION (VIC1_BASE+0x020) /* R/W Protection enable register */ -+#define VIC1VECTADDR (VIC1_BASE+0x030) /* R/W Vector address register */ -+#define VIC1DEFVECTADDR (VIC1_BASE+0x034) /* R/W Default vector address register */ -+#define VIC1VECTADDR00 (VIC1_BASE+0x100) /* R/W Vector address 00 register */ -+#define VIC1VECTADDR01 (VIC1_BASE+0x104) /* R/W Vector address 01 register */ -+#define VIC1VECTADDR02 (VIC1_BASE+0x108) /* R/W Vector address 02 register */ -+#define VIC1VECTADDR03 (VIC1_BASE+0x10C) /* R/W Vector address 03 register */ -+#define VIC1VECTADDR04 (VIC1_BASE+0x110) /* R/W Vector address 04 register */ -+#define VIC1VECTADDR05 (VIC1_BASE+0x114) /* R/W Vector address 05 register */ -+#define VIC1VECTADDR06 (VIC1_BASE+0x118) /* R/W Vector address 06 register */ -+#define VIC1VECTADDR07 (VIC1_BASE+0x11C) /* R/W Vector address 07 register */ -+#define VIC1VECTADDR08 (VIC1_BASE+0x120) /* R/W Vector address 08 register */ -+#define VIC1VECTADDR09 (VIC1_BASE+0x124) /* R/W Vector address 09 register */ -+#define VIC1VECTADDR10 (VIC1_BASE+0x128) /* R/W Vector address 10 register */ -+#define VIC1VECTADDR11 (VIC1_BASE+0x12C) /* R/W Vector address 11 register */ -+#define VIC1VECTADDR12 (VIC1_BASE+0x130) /* R/W Vector address 12 register */ -+#define VIC1VECTADDR13 (VIC1_BASE+0x134) /* R/W Vector address 13 register */ -+#define VIC1VECTADDR14 (VIC1_BASE+0x138) /* R/W Vector address 14 register */ -+#define VIC1VECTADDR15 (VIC1_BASE+0x13C) /* R/W Vector address 15 register */ -+#define VIC1VECTCNTL00 (VIC1_BASE+0x200) /* R/W Vector control 00 register */ -+#define VIC1VECTCNTL01 (VIC1_BASE+0x204) /* R/W Vector control 01 register */ -+#define VIC1VECTCNTL02 (VIC1_BASE+0x208) /* R/W Vector control 02 register */ -+#define VIC1VECTCNTL03 (VIC1_BASE+0x20C) /* R/W Vector control 03 register */ -+#define VIC1VECTCNTL04 (VIC1_BASE+0x210) /* R/W Vector control 04 register */ -+#define VIC1VECTCNTL05 (VIC1_BASE+0x214) /* R/W Vector control 05 register */ -+#define VIC1VECTCNTL06 (VIC1_BASE+0x218) /* R/W Vector control 06 register */ -+#define VIC1VECTCNTL07 (VIC1_BASE+0x21C) /* R/W Vector control 07 register */ -+#define VIC1VECTCNTL08 (VIC1_BASE+0x220) /* R/W Vector control 08 register */ -+#define VIC1VECTCNTL09 (VIC1_BASE+0x224) /* R/W Vector control 09 register */ -+#define VIC1VECTCNTL10 (VIC1_BASE+0x228) /* R/W Vector control 10 register */ -+#define VIC1VECTCNTL11 (VIC1_BASE+0x22C) /* R/W Vector control 11 register */ -+#define VIC1VECTCNTL12 (VIC1_BASE+0x230) /* R/W Vector control 12 register */ -+#define VIC1VECTCNTL13 (VIC1_BASE+0x234) /* R/W Vector control 13 register */ -+#define VIC1VECTCNTL14 (VIC1_BASE+0x238) /* R/W Vector control 14 register */ -+#define VIC1VECTCNTL15 (VIC1_BASE+0x23C) /* R/W Vector control 15 register */ -+#define VIC1ITCR (VIC1_BASE+0x300) /* R/W Test control register */ -+#define VIC1ITIP1 (VIC1_BASE+0x304) /* R Test input register (nVICIRQIN/nVICFIQIN)*/ -+#define VIC1ITIP2 (VIC1_BASE+0x308) /* R Test input register (VICVECTADDRIN) */ -+#define VIC1ITOP1 (VIC1_BASE+0x30C) /* R Test output register (nVICIRQ/nVICFIQ) */ -+#define VIC1ITOP2 (VIC1_BASE+0x310) /* R Test output register (VICVECTADDROUT) */ -+#define VIC1PERIPHID0 (VIC1_BASE+0xFE0) /* R Peripheral ID register bits 7:0 */ -+#define VIC1PERIPHID1 (VIC1_BASE+0xFE4) /* R Peripheral ID register bits 15:8 */ -+#define VIC1PERIPHID2 (VIC1_BASE+0xFE8) /* R Peripheral ID register bits 23:16 */ -+#define VIC1PERIPHID3 (VIC1_BASE+0xFEC) /* R Peripheral ID register bits 31:24 */ -+ -+ -+/////////////////////////////////////////////////////////////////////////////////////////////////////////// -+///////////////////////////////////APB///////////////////////////////////////////////////////////////////// -+/////////////////////////////////////////////////////////////////////////////////////////////////////////// -+/* 8081_0000 - 8081_ffff: Timers */ -+#define TIMERS_OFFSET 0x010000 -+#define TIMERS_BASE (EP93XX_APB_VIRT_BASE|TIMERS_OFFSET) -+ -+#define TIMER1LOAD (TIMERS_BASE+0x00) -+#define TIMER1VALUE (TIMERS_BASE+0x04) -+#define TIMER1CONTROL (TIMERS_BASE+0x08) -+#define TIMER1CLEAR (TIMERS_BASE+0x0C) -+#define TIMER1TEST (TIMERS_BASE+0x10) -+ -+#define TIMER2LOAD (TIMERS_BASE+0x20) -+#define TIMER2VALUE (TIMERS_BASE+0x24) -+#define TIMER2CONTROL (TIMERS_BASE+0x28) -+#define TIMER2CLEAR (TIMERS_BASE+0x2C) -+#define TIMER2TEST (TIMERS_BASE+0x30) -+ -+#define TIMER3LOAD (TIMERS_BASE+0x80) -+#define TIMER3VALUE (TIMERS_BASE+0x84) -+#define TIMER3CONTROL (TIMERS_BASE+0x88) -+#define TIMER3CLEAR (TIMERS_BASE+0x8C) -+#define TIMER3TEST (TIMERS_BASE+0x90) -+ -+#define TTIMERBZCONT (TIMERS_BASE+0x40) -+ -+#define TIMER4VALUELOW (TIMERS_BASE+0x60) -+#define TIMER4VALUEHIGH (TIMERS_BASE+0x64) -+ -+ -+/* 8082_0000 - 8082_ffff: I2S */ -+#define I2S_OFFSET 0x020000 -+#define I2S_BASE (EP93XX_APB_VIRT_BASE|I2S_OFFSET) -+#define I2S_PHYS_BASE (EP93XX_APB_PHYS_BASE + I2S_OFFSET) -+ -+ -+ -+#define I2STxClkCfg (I2S_BASE+0x00) /* 8082.0000 R/W Transmitter clock config register */ -+#define I2SRxClkCfg (I2S_BASE+0x04) /* 8082.0004 R/W Receiver clock config register */ -+#define I2SGlSts (I2S_BASE+0x08) /* 8082.0008 R/W SAI Global Status register. */ -+#define I2SGlCtrl (I2S_BASE+0x0C) /* 8082.000C R/W SAI Global Control register */ -+ -+#define I2STX0Lft (I2S_BASE+0x10) /* 8082.0010 R/W Left TX data reg for channel 0 */ -+#define I2STX0Rt (I2S_BASE+0x14) /* 8082.0014 R/W Right TX data reg for channel 0 */ -+#define I2STX1Lft (I2S_BASE+0x18) /* 8082.0018 R/W Left TX data reg for channel 1 */ -+#define I2STX1Rt (I2S_BASE+0x1C) /* 8082.001C R/W Right TX data reg for channel 1 */ -+#define I2STX2Lft (I2S_BASE+0x20) /* 8082.0020 R/W Left TX data reg for channel 2 */ -+#define I2STX2Rt (I2S_BASE+0x24) /* 8082.0024 R/W Right TX data reg for channel 2 */ -+ -+#define I2STXLinCtrlData (I2S_BASE+0x28) /* 8082.0028 R/W TX Line Control data register */ -+#define I2STXCtrl (I2S_BASE+0x2C) /* 8082.002C R/W TX Control register */ -+#define I2STXWrdLen (I2S_BASE+0x30) /* 8082.0030 R/W TX Word Length */ -+#define I2STX0En (I2S_BASE+0x34) /* 8082.0034 R/W TX0 Channel Enable */ -+#define I2STX1En (I2S_BASE+0x38) /* 8082.0038 R/W TX1 Channel Enable */ -+#define I2STX2En (I2S_BASE+0x3C) /* 8082.003C R/W TX2 Channel Enable */ -+ -+#define I2SRX0Lft (I2S_BASE+0x40) /* 8082.0040 R Left RX data reg for channel 0 */ -+#define I2SRX0Rt (I2S_BASE+0x44) /* 8082.0044 R Right RX data reg for channel 0 */ -+#define I2SRX1Lft (I2S_BASE+0x48) /* 8082.0048 R Left RX data reg for channel 1 */ -+#define I2SRX1Rt (I2S_BASE+0x4C) /* 8082.004c R Right RX data reg for channel 1 */ -+#define I2SRX2Lft (I2S_BASE+0x50) /* 8082.0050 R Left RX data reg for channel 2 */ -+#define I2SRX2Rt (I2S_BASE+0x54) /* 8082.0054 R Right RX data reg for channel 2 */ -+ -+#define I2SRXLinCtrlData (I2S_BASE+0x58) /* 8082.0058 R/W RX Line Control data register */ -+#define I2SRXCtrl (I2S_BASE+0x5C) /* 8082.005C R/W RX Control register */ -+#define I2SRXWrdLen (I2S_BASE+0x60) /* 8082.0060 R/W RX Word Length */ -+#define I2SRX0En (I2S_BASE+0x64) /* 8082.0064 R/W RX0 Channel Enable */ -+#define I2SRX1En (I2S_BASE+0x68) /* 8082.0068 R/W RX1 Channel Enable */ -+#define I2SRX2En (I2S_BASE+0x6C) /* 8082.006C R/W RX2 Channel Enable */ -+ -+ -+ -+ -+/* 8084_0000 - 8084_ffff: GPIO */ -+#define GPIO_OFFSET 0x040000 -+#define GPIO_BASE (EP93XX_APB_VIRT_BASE|GPIO_OFFSET) -+#define GPIO_PADR (GPIO_BASE+0x00) -+#define GPIO_PBDR (GPIO_BASE+0x04) -+#define GPIO_PCDR (GPIO_BASE+0x08) -+#define GPIO_PDDR (GPIO_BASE+0x0C) -+#define GPIO_PADDR (GPIO_BASE+0x10) -+#define GPIO_PBDDR (GPIO_BASE+0x14) -+#define GPIO_PCDDR (GPIO_BASE+0x18) -+#define GPIO_PDDDR (GPIO_BASE+0x1C) -+#define GPIO_PEDR (GPIO_BASE+0x20) -+#define GPIO_PEDDR (GPIO_BASE+0x24) -+// #define 0x8084.0028 Reserved -+// #define 0x8084.002C Reserved -+#define GPIO_PFDR (GPIO_BASE+0x30) -+#define GPIO_PFDDR (GPIO_BASE+0x34) -+#define GPIO_PGDR (GPIO_BASE+0x38) -+#define GPIO_PGDDR (GPIO_BASE+0x3C) -+#define GPIO_PHDR (GPIO_BASE+0x40) -+#define GPIO_PHDDR (GPIO_BASE+0x44) -+// #define 0x8084.0048 RAZ RAZ -+#define GPIO_FINTTYPE1 (GPIO_BASE+0x4C) -+#define GPIO_FINTTYPE2 (GPIO_BASE+0x50) -+#define GPIO_FEOI (GPIO_BASE+0x54) /* WRITE ONLY - READ UNDEFINED */ -+#define GPIO_FINTEN (GPIO_BASE+0x58) -+#define GPIO_INTSTATUSF (GPIO_BASE+0x5C) -+#define GPIO_RAWINTSTASUSF (GPIO_BASE+0x60) -+#define GPIO_FDB (GPIO_BASE+0x64) -+#define GPIO_PAPINDR (GPIO_BASE+0x68) -+#define GPIO_PBPINDR (GPIO_BASE+0x6C) -+#define GPIO_PCPINDR (GPIO_BASE+0x70) -+#define GPIO_PDPINDR (GPIO_BASE+0x74) -+#define GPIO_PEPINDR (GPIO_BASE+0x78) -+#define GPIO_PFPINDR (GPIO_BASE+0x7C) -+#define GPIO_PGPINDR (GPIO_BASE+0x80) -+#define GPIO_PHPINDR (GPIO_BASE+0x84) -+#define GPIO_AINTTYPE1 (GPIO_BASE+0x90) -+#define GPIO_AINTTYPE2 (GPIO_BASE+0x94) -+#define GPIO_AEOI (GPIO_BASE+0x98) /* WRITE ONLY - READ UNDEFINED */ -+#define GPIO_AINTEN (GPIO_BASE+0x9C) -+#define GPIO_INTSTATUSA (GPIO_BASE+0xA0) -+#define GPIO_RAWINTSTSTISA (GPIO_BASE+0xA4) -+#define GPIO_ADB (GPIO_BASE+0xA8) -+#define GPIO_BINTTYPE1 (GPIO_BASE+0xAC) -+#define GPIO_BINTTYPE2 (GPIO_BASE+0xB0) -+#define GPIO_BEOI (GPIO_BASE+0xB4) /* WRITE ONLY - READ UNDEFINED */ -+#define GPIO_BINTEN (GPIO_BASE+0xB8) -+#define GPIO_INTSTATUSB (GPIO_BASE+0xBC) -+#define GPIO_RAWINTSTSTISB (GPIO_BASE+0xC0) -+#define GPIO_BDB (GPIO_BASE+0xC4) -+#define GPIO_EEDRIVE (GPIO_BASE+0xC8) -+//#define Reserved (GPIO_BASE+0xCC) -+#define GPIO_TCR (GPIO_BASE+0xD0) /* Test Registers */ -+#define GPIO_TISRA (GPIO_BASE+0xD4) /* Test Registers */ -+#define GPIO_TISRB (GPIO_BASE+0xD8) /* Test Registers */ -+#define GPIO_TISRC (GPIO_BASE+0xDC) /* Test Registers */ -+#define GPIO_TISRD (GPIO_BASE+0xE0) /* Test Registers */ -+#define GPIO_TISRE (GPIO_BASE+0xE4) /* Test Registers */ -+#define GPIO_TISRF (GPIO_BASE+0xE8) /* Test Registers */ -+#define GPIO_TISRG (GPIO_BASE+0xEC) /* Test Registers */ -+#define GPIO_TISRH (GPIO_BASE+0xF0) /* Test Registers */ -+#define GPIO_TCER (GPIO_BASE+0xF4) /* Test Registers */ -+ -+ -+/* 8088_0000 - 8088_ffff: Ac97 Controller (AAC) */ -+#define AC97_OFFSET 0x080000 -+#define AC97_BASE (EP93XX_APB_VIRT_BASE|AC97_OFFSET) -+#define EP93XX_AC97_PHY_BASE (EP93XX_APB_PHYS_BASE|AC97_OFFSET) -+#define AC97DR1 (AC97_BASE+0x00) /* 8088.0000 R/W Data read or written from/to FIFO1 */ -+#define AC97RXCR1 (AC97_BASE+0x04) /* 8088.0004 R/W Control register for receive */ -+#define AC97TXCR1 (AC97_BASE+0x08) /* 8088.0008 R/W Control register for transmit */ -+#define AC97SR1 (AC97_BASE+0x0C) /* 8088.000C R Status register */ -+#define AC97RISR1 (AC97_BASE+0x10) /* 8088.0010 R Raw interrupt status register */ -+#define AC97ISR1 (AC97_BASE+0x14) /* 8088.0014 R Interrupt Status */ -+#define AC97IE1 (AC97_BASE+0x18) /* 8088.0018 R/W Interrupt Enable */ -+ /* 8088.001C Reserved - RAZ */ -+#define AC97DR2 (AC97_BASE+0x20) /* 8088.0020 R/W Data read or written from/to FIFO2 */ -+#define AC97RXCR2 (AC97_BASE+0x24) /* 8088.0024 R/W Control register for receive */ -+#define AC97TXCR2 (AC97_BASE+0x28) /* 8088.0028 R/W Control register for transmit */ -+#define AC97SR2 (AC97_BASE+0x2C) /* 8088.002C R Status register */ -+#define AC97RISR2 (AC97_BASE+0x30) /* 8088.0030 R Raw interrupt status register */ -+#define AC97ISR2 (AC97_BASE+0x34) /* 8088.0034 R Interrupt Status */ -+#define AC97IE2 (AC97_BASE+0x38) /* 8088.0038 R/W Interrupt Enable */ -+ /* 8088.003C Reserved - RAZ */ -+#define AC97DR3 (AC97_BASE+0x40) /* 8088.0040 R/W Data read or written from/to FIFO3. */ -+#define AC97RXCR3 (AC97_BASE+0x44) /* 8088.0044 R/W Control register for receive */ -+#define AC97TXCR3 (AC97_BASE+0x48) /* 8088.0048 R/W Control register for transmit */ -+#define AC97SR3 (AC97_BASE+0x4C) /* 8088.004C R Status register */ -+#define AC97RISR3 (AC97_BASE+0x50) /* 8088.0050 R Raw interrupt status register */ -+#define AC97ISR3 (AC97_BASE+0x54) /* 8088.0054 R Interrupt Status */ -+#define AC97IE3 (AC97_BASE+0x58) /* 8088.0058 R/W Interrupt Enable */ -+ /* 8088.005C Reserved - RAZ */ -+#define AC97DR2 (AC97_BASE+0x20) /* 8088.0020 R/W Data read or written from/to FIFO2 */ -+#define AC97RXCR2 (AC97_BASE+0x24) /* 8088.0024 R/W Control register for receive */ -+#define AC97TXCR2 (AC97_BASE+0x28) /* 8088.0028 R/W Control register for transmit */ -+#define AC97SR2 (AC97_BASE+0x2C) /* 8088.002C R Status register */ -+#define AC97RISR2 (AC97_BASE+0x30) /* 8088.0030 R Raw interrupt status register */ -+#define AC97ISR2 (AC97_BASE+0x34) /* 8088.0034 R Interrupt Status */ -+#define AC97IE2 (AC97_BASE+0x38) /* 8088.0038 R/W Interrupt Enable */ -+ /* 8088.003C Reserved - RAZ */ -+#define AC97DR3 (AC97_BASE+0x40) /* 8088.0040 R/W Data read or written from/to FIFO3. */ -+#define AC97RXCR3 (AC97_BASE+0x44) /* 8088.0044 R/W Control register for receive */ -+#define AC97TXCR3 (AC97_BASE+0x48) /* 8088.0048 R/W Control register for transmit */ -+#define AC97SR3 (AC97_BASE+0x4C) /* 8088.004C R Status register */ -+#define AC97RISR3 (AC97_BASE+0x50) /* 8088.0050 R Raw interrupt status register */ -+#define AC97ISR3 (AC97_BASE+0x54) /* 8088.0054 R Interrupt Status */ -+#define AC97IE3 (AC97_BASE+0x58) /* 8088.0058 R/W Interrupt Enable */ -+ /* 8088.005C Reserved - RAZ */ -+#define AC97DR4 (AC97_BASE+0x60) /* 8088.0060 R/W Data read or written from/to FIFO4. */ -+#define AC97RXCR4 (AC97_BASE+0x64) /* 8088.0064 R/W Control register for receive */ -+#define AC97TXCR4 (AC97_BASE+0x68) /* 8088.0068 R/W Control register for transmit */ -+#define AC97SR4 (AC97_BASE+0x6C) /* 8088.006C R Status register */ -+#define AC97RISR4 (AC97_BASE+0x70) /* 8088.0070 R Raw interrupt status register */ -+#define AC97ISR4 (AC97_BASE+0x74) /* 8088.0074 R Interrupt Status */ -+#define AC97IE4 (AC97_BASE+0x78) /* 8088.0078 R/W Interrupt Enable */ -+ /* 8088.007C Reserved - RAZ */ -+#define AC97S1DATA (AC97_BASE+0x80) /* 8088.0080 R/W Data received/transmitted on SLOT1 */ -+#define AC97S2DATA (AC97_BASE+0x84) /* 8088.0084 R/W Data received/transmitted on SLOT2 */ -+#define AC97S12DATA (AC97_BASE+0x88) /* 8088.0088 R/W Data received/transmitted on SLOT12 */ -+#define AC97RGIS (AC97_BASE+0x8C) /* 8088.008C R/W Raw Global interrupt status register*/ -+#define AC97GIS (AC97_BASE+0x90) /* 8088.0090 R Global interrupt status register */ -+#define AC97IM (AC97_BASE+0x94) /* 8088.0094 R/W Interrupt mask register */ -+#define AC97EOI (AC97_BASE+0x98) /* 8088.0098 W Interrupt clear register */ -+#define AC97GCR (AC97_BASE+0x9C) /* 8088.009C R/W Main Control register */ -+#define AC97RESET (AC97_BASE+0xA0) /* 8088.00A0 R/W RESET control register. */ -+#define AC97SYNC (AC97_BASE+0xA4) /* 8088.00A4 R/W SYNC control register. */ -+#define AC97GCIS (AC97_BASE+0xA8) /* 8088.00A8 R Global chan FIFO int status register */ -+ -+ -+/* 808A_0000 - 808A_ffff: SSP - (SPI) */ -+#define SSP_OFFSET 0x0A0000 -+#define SSP_BASE (EP93XX_APB_VIRT_BASE|SSP_OFFSET) -+#define SSPCR0 (SSP_BASE+0x00) -+#define SSPCR1 (SSP_BASE+0x04) -+#define SSPDR (SSP_BASE+0x08) -+#define SSPSR (SSP_BASE+0x0c) -+#define SSPCPSR (SSP_BASE+0x10) -+#define SSPIIR (SSP_BASE+0x14) - -+ -+/*808B_0000 - 808B_ffff: IrDA */ -+#define IRDA_OFFSET 0x0B0000 -+#define IRDA_BASE (EP93XX_APB_VIRT_BASE|IRDA_OFFSET) -+#define IrEnable (IRDA_BASE+0x00) -+#define IrCtrl (IRDA_BASE+0x04) -+#define IrAdrMatchVal (IRDA_BASE+0x08) -+#define IrFlag (IRDA_BASE+0x0C) -+#define IrData (IRDA_BASE+0x10) -+#define IrDataTail1 (IRDA_BASE+0x14) -+#define IrDataTail2 (IRDA_BASE+0x18) -+#define IrDataTail3 (IRDA_BASE+0x1c) -+#define IrRIB (IRDA_BASE+0x20) -+#define IrTR0 (IRDA_BASE+0x24) -+#define IrDMACR (IRDA_BASE+0x28) -+#define SIRTR0 (IRDA_BASE+0x30) -+#define MISR (IRDA_BASE+0x80) -+#define MIMR (IRDA_BASE+0x84) -+#define MIIR (IRDA_BASE+0x88) -+#define FISR (IRDA_BASE+0x180) -+#define FIMR (IRDA_BASE+0x184) -+#define FIIR (IRDA_BASE+0x188) -+ -+ -+/* 808C_0000 - 808C_ffff: UART1 */ -+#define UART1_OFFSET 0x0C0000 -+#define UART1_BASE (EP93XX_APB_VIRT_BASE|UART1_OFFSET) -+#define UART1_BASE_VIRT (EP93XX_APB_PHYS_BASE|UART1_OFFSET) -+#define UART1DR (UART1_BASE+0x000) -+#define UART1RSR (UART1_BASE+0x004) -+#define UART1ECR (UART1_BASE+0x004) -+#define UART1CR_H (UART1_BASE+0x008) -+#define UART1CR_M (UART1_BASE+0x00C) -+#define UART1CR_L (UART1_BASE+0x010) -+#define UART1CR (UART1_BASE+0x014) -+#define UART1FR (UART1_BASE+0x018) -+#define UART1IIR (UART1_BASE+0x01C) -+#define UART1ICR (UART1_BASE+0x01C) -+#define UART1ILPR (UART1_BASE+0x020) -+#define UART1DMACR (UART1_BASE+0x028) -+#define UART1TMR (UART1_BASE+0x084) -+#define UART1MCR (UART1_BASE+0x100) -+#define UART1MSR (UART1_BASE+0x104) -+#define UART1TCR (UART1_BASE+0x108) -+#define UART1TISR (UART1_BASE+0x10C) -+#define UART1TOCR (UART1_BASE+0x110) -+#define HDLC1CR (UART1_BASE+0x20c) -+#define HDLC1AMV (UART1_BASE+0x210) -+#define HDLC1AMSK (UART1_BASE+0x214) -+#define HDLC1RIB (UART1_BASE+0x218) -+#define HDLC1SR (UART1_BASE+0x21c) -+ -+/* Offsets to the various UART registers */ -+#define UARTDR 0x0000 -+#define UARTRSR 0x0004 -+#define UARTECR 0x0004 -+#define UARTCR_H 0x0008 -+#define UARTCR_M 0x000C -+#define UARTCR_L 0x0010 -+#define UARTCR 0x0014 -+#define UARTFR 0x0018 -+#define UARTIIR 0x001C -+#define UARTICR 0x001C -+#define UARTMCR 0x0100 -+#define UARTMSR 0x0104 -+ -+/* 808d_0000 - 808d_ffff: UART2 */ -+#define UART2_OFFSET 0x0D0000 -+#define UART2_BASE (EP93XX_APB_VIRT_BASE|UART2_OFFSET) -+#define UART2_BASE_VIRT (EP93XX_APB_PHYS_BASE|UART2_OFFSET) -+#define UART2DR (UART2_BASE+0x00) -+#define UART2RSR (UART2_BASE+0x04) /* Read */ -+#define UART2ECR (UART2_BASE+0x04) /* Write */ -+#define UART2CR_H (UART2_BASE+0x08) -+#define UART2CR_M (UART2_BASE+0x0C) -+#define UART2CR_L (UART2_BASE+0x10) -+#define UART2CR (UART2_BASE+0x14) -+#define UART2FR (UART2_BASE+0x18) -+#define UART2IIR (UART2_BASE+0x1C) /* Read */ -+#define UART2ICR (UART2_BASE+0x1C) /* Write */ -+#define UART2ILPR (UART2_BASE+0x20) -+#define UART2DMACR (UART2_BASE+0x28) -+#define UART2TMR (UART2_BASE+0x84) -+ -+ -+/* 808e_0000 - 808e_ffff: UART3 */ -+#define UART3_OFFSET 0x0E0000 -+#define UART3_BASE (EP93XX_APB_VIRT_BASE|UART3_OFFSET) -+#define UART3_BASE_VIRT (EP93XX_APB_PHYS_BASE|UART3_OFFSET) -+#define UART3DR (UART3_BASE+0x00) -+#define UART3RSR (UART3_BASE+0x04) /* Read */ -+#define UART3ECR (UART3_BASE+0x04) /* Write */ -+#define UART3CR_H (UART3_BASE+0x08) -+#define UART3CR_M (UART3_BASE+0x0C) -+#define UART3CR_L (UART3_BASE+0x10) -+#define UART3CR (UART3_BASE+0x14) -+#define UART3FR (UART3_BASE+0x18) -+#define UART3IIR (UART3_BASE+0x1C) /* Read */ -+#define UART3ICR (UART3_BASE+0x1C) /* Write */ -+#define UART3ILPR (UART3_BASE+0x20) -+#define UART3DMACR (UART3_BASE+0x28) -+#define UART3TCR (UART3_BASE+0x80) -+#define UART3TISR (UART3_BASE+0x88) -+#define UART3TOCR (UART3_BASE+0x8C) -+#define UART3TMR (UART3_BASE+0x84) -+#define UART3MCR (UART3_BASE+0x100) /* Modem Control Reg */ -+#define UART3MSR (UART3_BASE+0x104) /* Modem Status Reg */ -+ -+#define UART3HDLCCR (UART3_BASE+0x20C) /* HDLC Registers */ -+#define UART3HDLCAMV (UART3_BASE+0x210) /* HDLC Registers */ -+#define UART3HDLCAMSK (UART3_BASE+0x214) /* HDLC Registers */ -+#define UART3HDLCCRIB (UART3_BASE+0x218) /* HDLC Registers */ -+#define UART3HDLCSR (UART3_BASE+0x21C) /* HDLC Registers */ -+ -+/* 808f_0000 - 808f_ffff: KEY Matrix */ -+#define KEY_OFFSET 0x0F0000 -+#define KEY_BASE (EP93XX_APB_VIRT_BASE|KEY_OFFSET) -+#define SCANINIT (KEY_BASE+0x00) -+#define KEY_DIAG (KEY_BASE+0x04) -+#define KEY_REG (KEY_BASE+0x08) -+#define KEY_TCR (KEY_BASE+0x10) -+#define KEY_TISR (KEY_BASE+0x14) -+#define KEY_TOCR (KEY_BASE+0x18) -+ -+ -+#define TOUCH_OFFSET 0x100000 -+#define TOUCH_BASE (EP93XX_APB_VIRT_BASE|TOUCH_OFFSET) -+#define TSSetup (TOUCH_BASE+0x00) /* R/W touchscreen controller setup control register. */ -+#define TSXYMaxMin (TOUCH_BASE+0x04) /* R/W touchscreen controller max/min register. */ -+#define TSXYResult (TOUCH_BASE+0x08) /* R touchscreen controller result register. */ -+#define TSDischarge (TOUCH_BASE+0x0C) /* LOCKED R/W touchscreen Switch Matrix control register. */ -+#define TSXSample (TOUCH_BASE+0x10) /* LOCKED R/W touchscreen Switch Matrix control register. */ -+#define TSYSample (TOUCH_BASE+0x14) /* LOCKED R/W touchscreen Switch Matrix control register. */ -+#define TSDirect (TOUCH_BASE+0x18) /* LOCKED R/W touchscreen Switch Matrix control register. */ -+#define TSDetect (TOUCH_BASE+0x1C) /* LOCKED R/W touchscreen Switch Matrix control register. */ -+#define TSSWLock (TOUCH_BASE+0x20) /* NA R/W touchscreen software lock register. */ -+#define TSSetup2 (TOUCH_BASE+0x24) /* R/W touchscreen setup control register #2. */ -+ -+ -+/* 8093_0000 - 8093_ffff: CSC/Syscon PLL, clock control, & misc. stuff */ -+#define SYSCON_OFFSET 0x130000 -+#define SYSCON_BASE ((EP93XX_APB_VIRT_BASE)|SYSCON_OFFSET) -+#define SYSCON_PWRSR (SYSCON_BASE+0x0000) -+#define SYSCON_PWRCNT (SYSCON_BASE+0x0004) -+#define SYSCON_HALT (SYSCON_BASE+0x0008) -+#define SYSCON_STBY (SYSCON_BASE+0x000c) -+#define SYSCON_BLEOI (SYSCON_BASE+0x0010) -+#define SYSCON_MCEOI (SYSCON_BASE+0x0014) -+#define SYSCON_TEOI (SYSCON_BASE+0x0018) -+#define SYSCON_STFCLR (SYSCON_BASE+0x001c) -+#define SYSCON_CLKSET1 (SYSCON_BASE+0x0020) -+#define SYSCON_CLKSET2 (SYSCON_BASE+0x0024) -+#define SYSCON_RESV00 (SYSCON_BASE+0x0028) -+#define SYSCON_RESV01 (SYSCON_BASE+0x002c) -+#define SYSCON_RESV02 (SYSCON_BASE+0x0030) -+#define SYSCON_RESV03 (SYSCON_BASE+0x0034) -+#define SYSCON_RESV04 (SYSCON_BASE+0x0038) -+#define SYSCON_RESV05 (SYSCON_BASE+0x003c) -+#define SYSCON_SCRREG0 (SYSCON_BASE+0x0040) -+#define SYSCON_SCRREG1 (SYSCON_BASE+0x0044) -+#define SYSCON_CLKTEST (SYSCON_BASE+0x0048) -+#define SYSCON_USBRESET (SYSCON_BASE+0x004c) -+#define SYSCON_APBWAIT (SYSCON_BASE+0x0050) -+#define SYSCON_BMAR (SYSCON_BASE+0x0054) -+#define SYSCON_BOOTCLR (SYSCON_BASE+0x0058) -+#define SYSCON_DEVCFG (SYSCON_BASE+0x0080) -+#define SYSCON_VIDDIV (SYSCON_BASE+0x0084) -+#define SYSCON_MIRDIV (SYSCON_BASE+0x0088) -+#define SYSCON_I2SDIV (SYSCON_BASE+0x008C) -+#define SYSCON_KTDIV (SYSCON_BASE+0x0090) -+#define SYSCON_CHIPID (SYSCON_BASE+0x0094) -+#define SYSCON_TSTCR (SYSCON_BASE+0x0098) -+#define SYSCON_SYSCFG (SYSCON_BASE+0x009C) -+#define SYSCON_SWLOCK (SYSCON_BASE+0x00C0) -+ -+#define SYSCON_DEVCFG_KEYS 0x00000002 -+#define SYSCON_DEVCFG_RasOnP3 0x00000010 -+#define SYSCON_DEVCFG_GONK 0x08000000 -+ -+#define SYSCON_KTDIV_KEN 0x00008000 -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+// - #define EP93XX_ETHERNET_BASE (EP93XX_AHB_VIRT_BASE + 0x00010000) - #define EP93XX_ETHERNET_PHYS_BASE (EP93XX_AHB_PHYS_BASE + 0x00010000) - -@@ -33,8 +914,11 @@ - #define EP93XX_USB_PHYS_BASE (EP93XX_AHB_PHYS_BASE + 0x00020000) - - #define EP93XX_RASTER_BASE (EP93XX_AHB_VIRT_BASE + 0x00030000) -+#define EP93XX_RASTER_PHYS_BASE (EP93XX_AHB_PHYS_BASE + 0x00030000) - - #define EP93XX_GRAPHICS_ACCEL_BASE (EP93XX_AHB_VIRT_BASE + 0x00040000) -+#define EP93XX_GRAPHICS_ACCEL_PHYS_BASE (EP93XX_AHB_PHYS_BASE + 0x00040000 -+ - - #define EP93XX_SDRAM_CONTROLLER_BASE (EP93XX_AHB_VIRT_BASE + 0x00060000) - -@@ -43,7 +927,141 @@ - #define EP93XX_BOOT_ROM_BASE (EP93XX_AHB_VIRT_BASE + 0x00090000) - - #define EP93XX_IDE_BASE (EP93XX_AHB_VIRT_BASE + 0x000a0000) -+#define EP93XX_IDE_REG(x) (EP93XX_IDE_BASE + (x)) -+#define EP93XX_IDE_CTRL EP93XX_IDE_REG(0x0000) -+#define EP93XX_IDE_CFG EP93XX_IDE_REG(0x0004) -+#define EP93XX_IDE_DATAOUT EP93XX_IDE_REG(0x0010) -+#define EP93XX_IDE_DATAIN EP93XX_IDE_REG(0x0014) -+ -+#define EP93XX_IDE_CTRL_CS0n (1L << 0) -+#define EP93XX_IDE_CTRL_CS1n (1L << 1) -+#define EP93XX_IDE_CTRL_DA_MASK 0x1C -+#define EP93XX_IDE_CTRL_DA(x) ((x << 2) & EP93XX_IDE_CTRL_DA_MASK) -+#define EP93XX_IDE_CTRL_DA_CS_MASK (EP93XX_IDE_CTRL_DA_MASK | EP93XX_IDE_CTRL_CS0n | EP93XX_IDE_CTRL_CS1n) -+#define EP93XX_IDE_CTRL_DA_CS(x) (((x)) & EP93XX_IDE_CTRL_DA_CS_MASK) -+#define EP93XX_IDE_CTRL_DIORn (1L << 5) -+#define EP93XX_IDE_CTRL_DIOWn (1L << 6) -+#define EP93XX_IDE_CTRL_DASPn (1L << 7) -+#define EP93XX_IDE_CTRL_DMARQ (1L << 8) -+#define EP93XX_IDE_CTRL_INTRQ (1L << 9) -+#define EP93XX_IDE_CTRL_IORDY (1L << 10) -+ -+#define EP93XX_IDE_CFG_IDEEN (1L << 0) -+#define EP93XX_IDE_CFG_PIO (1L << 1) -+#define EP93XX_IDE_CFG_MDMA (1L << 2) -+#define EP93XX_IDE_CFG_UDMA (1L << 3) -+#define EP93XX_IDE_CFG_MODE(x) ((x & 0x0F) << 4) -+#define EP93XX_IDE_CFG_WST(x) ((x & 0x03) << 8) - -+ -+ -+/* Olde IDE DMA defines */ -+/* 800A_0000 - 800A_ffff: IDE Interface */ -+#define IDE_OFFSET 0x0a0000 -+#define IDE_BASE (EP93XX_AHB_VIRT_BASE|IDE_OFFSET) -+#define IDECR (IDE_BASE+0x00) -+#define IDECFG (IDE_BASE+0x04) -+#define IDEMDMAOP (IDE_BASE+0x08) -+#define IDEUDMAOP (IDE_BASE+0x0C) -+#define IDEDATAOUT (IDE_BASE+0x10) -+#define IDEDATAIN (IDE_BASE+0x14) -+#define IDEMDMADATAOUT (IDE_BASE+0x18) -+#define IDEMDMADATAIN (IDE_BASE+0x1C) -+#define IDEUDMADATAOUT (IDE_BASE+0x20) -+#define IDEUDMADATAIN (IDE_BASE+0x24) -+#define IDEUDMASTATUS (IDE_BASE+0x28) -+#define IDEUDMADEBUG (IDE_BASE+0x2C) -+#define IDEUDMAWFST (IDE_BASE+0x30) -+#define IDEUDMARFST (IDE_BASE+0x34) -+ -+/***************************************************************************** -+ * -+ * Bit definitions for use with assembly code for the ide control register. -+ * -+ ****************************************************************************/ -+#define IDECtrl_CS0n 0x00000001 -+#define IDECtrl_CS1n 0x00000002 -+#define IDECtrl_DA_MASK 0x0000001c -+#define IDECtrl_DA_SHIFT 2 -+#define IDECtrl_DIORn 0x00000020 -+#define IDECtrl_DIOWn 0x00000040 -+#define IDECtrl_DASPn 0x00000080 -+#define IDECtrl_DMARQ 0x00000100 -+#define IDECtrl_INTRQ 0x00000200 -+#define IDECtrl_IORDY 0x00000400 -+ -+#define IDECfg_IDEEN 0x00000001 -+#define IDECfg_PIO 0x00000002 -+#define IDECfg_MDMA 0x00000004 -+#define IDECfg_UDMA 0x00000008 -+#define IDECfg_MODE_MASK 0x000000f0 -+#define IDECfg_MODE_SHIFT 4 -+#define IDECfg_WST_MASK 0x00000300 -+#define IDECfg_WST_SHIFT 8 -+ -+#define IDEMDMAOp_MEN 0x00000001 -+#define IDEMDMAOp_RWOP 0x00000002 -+ -+#define IDEUDMAOp_UEN 0x00000001 -+#define IDEUDMAOp_RWOP 0x00000002 -+ -+#define IDEUDMASts_CS0n 0x00000001 -+#define IDEUDMASts_CS1n 0x00000002 -+#define IDEUDMASts_DA_MASK 0x0000001c -+#define IDEUDMASts_DA_SHIFT 2 -+#define IDEUDMASts_HSHD 0x00000020 -+#define IDEUDMASts_STOP 0x00000040 -+#define IDEUDMASts_DM 0x00000080 -+#define IDEUDMASts_DDOE 0x00000100 -+#define IDEUDMASts_DMARQ 0x00000200 -+#define IDEUDMASts_DSDD 0x00000400 -+#define IDEUDMASts_DMAide 0x00010000 -+#define IDEUDMASts_INTide 0x00020000 -+#define IDEUDMASts_SBUSY 0x00040000 -+#define IDEUDMASts_NDO 0x01000000 -+#define IDEUDMASts_NDI 0x02000000 -+#define IDEUDMASts_N4X 0x04000000 -+ -+#define IDEUDMADebug_RWOE 0x00000001 -+#define IDEUDMADebug_RWPTR 0x00000002 -+#define IDEUDMADebug_RWDR 0x00000004 -+#define IDEUDMADebug_RROE 0x00000008 -+#define IDEUDMADebug_RRPTR 0x00000010 -+#define IDEUDMADebug_RRDR 0x00000020 -+ -+#define IDEUDMAWrBufSts_HPTR_MASK 0x0000000f -+#define IDEUDMAWrBufSts_HPTR_SHIFT 0 -+#define IDEUDMAWrBufSts_TPTR_MASK 0x000000f0 -+#define IDEUDMAWrBufSts_TPTR_SHIFT 4 -+#define IDEUDMAWrBufSts_EMPTY 0x00000100 -+#define IDEUDMAWrBufSts_HOM 0x00000200 -+#define IDEUDMAWrBufSts_NFULL 0x00000400 -+#define IDEUDMAWrBufSts_FULL 0x00000800 -+#define IDEUDMAWrBufSts_CRC_MASK 0xffff0000 -+#define IDEUDMAWrBufSts_CRC_SHIFT 16 -+ -+#define IDEUDMARdBufSts_HPTR_MASK 0x0000000f -+#define IDEUDMARdBufSts_HPTR_SHIFT 0 -+#define IDEUDMARdBufSts_TPTR_MASK 0x000000f0 -+#define IDEUDMARdBufSts_TPTR_SHIFT 4 -+#define IDEUDMARdBufSts_EMPTY 0x00000100 -+#define IDEUDMARdBufSts_HOM 0x00000200 -+#define IDEUDMARdBufSts_NFULL 0x00000400 -+#define IDEUDMARdBufSts_FULL 0x00000800 -+#define IDEUDMARdBufSts_CRC_MASK 0xffff0000 -+#define IDEUDMARdBufSts_CRC_SHIFT 16 -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+/*----------------------------------old-------------------------------*/ - #define EP93XX_VIC1_BASE (EP93XX_AHB_VIRT_BASE + 0x000b0000) - - #define EP93XX_VIC2_BASE (EP93XX_AHB_VIRT_BASE + 0x000c0000) -@@ -73,21 +1091,29 @@ - - #define EP93XX_GPIO_BASE (EP93XX_APB_VIRT_BASE + 0x00040000) - #define EP93XX_GPIO_REG(x) (EP93XX_GPIO_BASE + (x)) --#define EP93XX_GPIO_F_INT_TYPE1 EP93XX_GPIO_REG(0x4c) --#define EP93XX_GPIO_F_INT_TYPE2 EP93XX_GPIO_REG(0x50) --#define EP93XX_GPIO_F_INT_ACK EP93XX_GPIO_REG(0x54) --#define EP93XX_GPIO_F_INT_ENABLE EP93XX_GPIO_REG(0x58) --#define EP93XX_GPIO_F_INT_STATUS EP93XX_GPIO_REG(0x5c) -+#define EP93XX_GPIO_F_INT_TYPE1 EP93XX_GPIO_REG(0x4c) -+#define EP93XX_GPIO_F_INT_TYPE2 EP93XX_GPIO_REG(0x50) -+#define EP93XX_GPIO_F_INT_ACK EP93XX_GPIO_REG(0x54) -+#define EP93XX_GPIO_F_INT_ENABLE EP93XX_GPIO_REG(0x58) -+#define EP93XX_GPIO_F_INT_STATUS EP93XX_GPIO_REG(0x5c) - #define EP93XX_GPIO_A_INT_TYPE1 EP93XX_GPIO_REG(0x90) - #define EP93XX_GPIO_A_INT_TYPE2 EP93XX_GPIO_REG(0x94) - #define EP93XX_GPIO_A_INT_ACK EP93XX_GPIO_REG(0x98) - #define EP93XX_GPIO_A_INT_ENABLE EP93XX_GPIO_REG(0x9c) - #define EP93XX_GPIO_A_INT_STATUS EP93XX_GPIO_REG(0xa0) -+#define EP93XX_GPIO_A_INT_DEBOUNCE EP93XX_GPIO_REG(0xa8) - #define EP93XX_GPIO_B_INT_TYPE1 EP93XX_GPIO_REG(0xac) - #define EP93XX_GPIO_B_INT_TYPE2 EP93XX_GPIO_REG(0xb0) - #define EP93XX_GPIO_B_INT_ACK EP93XX_GPIO_REG(0xb4) - #define EP93XX_GPIO_B_INT_ENABLE EP93XX_GPIO_REG(0xb8) - #define EP93XX_GPIO_B_INT_STATUS EP93XX_GPIO_REG(0xbc) -+#define EP93XX_GPIO_B_INT_DEBOUNCE EP93XX_GPIO_REG(0xc4) -+ -+ -+ -+ -+ -+ - - #define EP93XX_AAC_BASE (EP93XX_APB_VIRT_BASE + 0x00080000) - -@@ -121,10 +1147,15 @@ - #define EP93XX_SYSCON_CLOCK_USH_EN 0x10000000 - #define EP93XX_SYSCON_HALT EP93XX_SYSCON_REG(0x08) - #define EP93XX_SYSCON_STANDBY EP93XX_SYSCON_REG(0x0c) -+#define EP93XX_SYSCON_CLKSET1 EP93XX_SYSCON_REG(0x20) - #define EP93XX_SYSCON_CLOCK_SET1 EP93XX_SYSCON_REG(0x20) -+#define EP93XX_SYSCON_CLKSET2 EP93XX_SYSCON_REG(0x24) - #define EP93XX_SYSCON_CLOCK_SET2 EP93XX_SYSCON_REG(0x24) - #define EP93XX_SYSCON_DEVICE_CONFIG EP93XX_SYSCON_REG(0x80) - #define EP93XX_SYSCON_DEVICE_CONFIG_CRUNCH_ENABLE 0x00800000 -+ -+#define EP93XX_SYSCON_BMAR EP93XX_SYSCON_REG(0x54) -+#define EP93XX_SYSCON_CHIPID EP93XX_SYSCON_REG(0x94) - #define EP93XX_SYSCON_SWLOCK EP93XX_SYSCON_REG(0xc0) - - #define EP93XX_WATCHDOG_BASE (EP93XX_APB_VIRT_BASE + 0x00140000) -diff --git a/include/asm-arm/arch-ep93xx/system.h b/include/asm-arm/arch-ep93xx/system.h -index 79b7185..d69c15f 100644 ---- a/include/asm-arm/arch-ep93xx/system.h -+++ b/include/asm-arm/arch-ep93xx/system.h -@@ -3,6 +3,13 @@ - */ - - #include <asm/hardware.h> -+#include <asm-arm/arch-ep93xx/ep93xx-regs.h> -+ -+#define MAC_SELFCTL (EP93XX_MAC_BASE+0x20) /* 1-RW Self Control for LED interface */ -+#define HCCOMMANDSTATUS (EP93XX_USB_BASE+0x08) -+#define MAC_OFFSET 0x010000 -+#define EP93XX_MAC_BASE (EP93XX_AHB_VIRT_BASE|MAC_OFFSET) -+#define SYSCON_SYSCFG_LEECK 0x00000008 - - static inline void arch_idle(void) - { -@@ -15,11 +22,108 @@ static inline void arch_reset(char mode) - - local_irq_disable(); - -- devicecfg = __raw_readl(EP93XX_SYSCON_DEVICE_CONFIG); -- __raw_writel(0xaa, EP93XX_SYSCON_SWLOCK); -- __raw_writel(devicecfg | 0x80000000, EP93XX_SYSCON_DEVICE_CONFIG); -- __raw_writel(0xaa, EP93XX_SYSCON_SWLOCK); -- __raw_writel(devicecfg & ~0x80000000, EP93XX_SYSCON_DEVICE_CONFIG); -+// Modified 6/29/2007 -+// by Steve Beaver, MedAvant Healthcare Solutions Inc -+ -+// This code was lifted from cirrus-arm-linux-2.4.21 and puts the edb93xx in a known, default -+// state before the restart. -+ -+// Disable the peripherals. -+// -+outl(0xffffffff, VIC0INTENCLEAR); -+outl(0xffffffff, VIC1INTENCLEAR); -+outl(0, DMAMP_TX_0_CONTROL); -+outl(0, DMAMP_RX_1_CONTROL); -+outl(0, DMAMP_TX_2_CONTROL); -+outl(0, DMAMP_RX_3_CONTROL); -+outl(0, DMAMM_0_CONTROL); -+outl(0, DMAMM_1_CONTROL); -+outl(0, DMAMP_TX_4_CONTROL); -+outl(0, DMAMP_RX_5_CONTROL); -+outl(0, DMAMP_TX_6_CONTROL); -+outl(0, DMAMP_RX_7_CONTROL); -+outl(0, DMAMP_TX_8_CONTROL); -+outl(0, DMAMP_RX_9_CONTROL); -+outl(1, MAC_SELFCTL); -+while(inl(MAC_SELFCTL) & 1) -+barrier(); -+outl(1, HCCOMMANDSTATUS); -+while(inl(HCCOMMANDSTATUS) & 1) -+barrier(); -+outl(0, IrEnable); -+outl(0, UART1CR); -+outl(0, UART2CR); -+outl(0, I2STX0En); -+outl(0, I2SRX0En); -+outl(0, AC97GCR); -+outl(0, SSPCR1); -+#ifdef CONFIG_ARCH_EP9315 -+outl(0, SMC_PCMCIACtrl); -+outl(0, BLOCKCTRL); -+#endif -+#if defined(CONFIG_ARCH_EP9312) || defined(CONFIG_ARCH_EP9315) -+outl(0, VIDEOATTRIBS); -+outl(0, UART3CR); -+outl(0, I2STX1En); -+outl(0, I2SRX1En); -+outl(0, I2STX2En); -+outl(0, I2SRX2En); -+outl(0, TSSetup); -+outl(0, IDECFG); -+outl(0xaa, SYSCON_SWLOCK); -+outl(0, SYSCON_VIDDIV); -+outl(0xaa, SYSCON_SWLOCK); -+outl(0, SYSCON_KTDIV); -+#endif -+outl(0xaa, SYSCON_SWLOCK); -+outl(0, SYSCON_MIRDIV); -+outl(0xaa, SYSCON_SWLOCK); -+outl(0, SYSCON_I2SDIV); -+outl(0, SYSCON_PWRCNT); -+outl(0xaa, SYSCON_SWLOCK); -+outl(0, SYSCON_DEVCFG); -+outl(0x000398e7, SYSCON_CLKSET1); -+inl(SYSCON_CLKSET1); -+__asm__ __volatile__("nop"); -+__asm__ __volatile__("nop"); -+__asm__ __volatile__("nop"); -+__asm__ __volatile__("nop"); -+__asm__ __volatile__("nop"); -+outl(0x0003c317, SYSCON_CLKSET2); -+__asm__ __volatile__("nop"); -+__asm__ __volatile__("nop"); -+__asm__ __volatile__("nop"); -+__asm__ __volatile__("nop"); -+__asm__ __volatile__("nop"); -+outl(0, GPIO_PADDR); -+outl(0, GPIO_PBDDR); -+outl(0, GPIO_PCDDR); -+#if defined(CONFIG_ARCH_EP9312) || defined(CONFIG_ARCH_EP9315) -+outl(0, GPIO_PDDDR); -+#endif -+outl(0x3, GPIO_PEDR); -+outl(0x3, GPIO_PEDDR); -+outl(0, GPIO_PFDDR); -+outl(0, GPIO_PGDR); -+outl(0xc, GPIO_PGDDR); -+outl(0, GPIO_PHDDR); -+outl(0, GPIO_PDDDR); -+outl(0, GPIO_PDDDR); -+outl(0, GPIO_AINTEN); -+outl(0, GPIO_BINTEN); -+outl(0, GPIO_FINTEN); -+outl(0, GPIO_EEDRIVE); -+ -+ -+// devicecfg = __raw_readl(EP93XX_SYSCON_DEVICE_CONFIG); -+// __raw_writel(0xaa, EP93XX_SYSCON_SWLOCK); -+// __raw_writel(devicecfg | 0x80000000, EP93XX_SYSCON_DEVICE_CONFIG); -+// __raw_writel(0xaa, EP93XX_SYSCON_SWLOCK); -+// __raw_writel(devicecfg & ~0x80000000, EP93XX_SYSCON_DEVICE_CONFIG); -+ -+// SYSCON_SYSCFG_LEECK indicates internal or external boot. -+// Jump to internal boot ROM or external boot device. -+cpu_reset((inl(SYSCON_SYSCFG) & SYSCON_SYSCFG_LEECK) ? 0x80090000 : 0x0); - - while (1) - ; --- -1.5.3 - diff --git a/packages/linux/linux-2.6.24/gesbc-9302/defconfig b/packages/linux/linux-2.6.24/gesbc-9302/defconfig deleted file mode 100644 index c7db3e6da0..0000000000 --- a/packages/linux/linux-2.6.24/gesbc-9302/defconfig +++ /dev/null @@ -1,1165 +0,0 @@ -# -# Automatically generated make config: don't edit -# Linux kernel version: 2.6.24 -# Mon Feb 4 15:05:53 2008 -# -CONFIG_ARM=y -CONFIG_SYS_SUPPORTS_APM_EMULATION=y -# CONFIG_GENERIC_GPIO is not set -# CONFIG_GENERIC_TIME is not set -# CONFIG_GENERIC_CLOCKEVENTS is not set -CONFIG_MMU=y -# CONFIG_NO_IOPORT is not set -CONFIG_GENERIC_HARDIRQS=y -CONFIG_STACKTRACE_SUPPORT=y -CONFIG_LOCKDEP_SUPPORT=y -CONFIG_TRACE_IRQFLAGS_SUPPORT=y -CONFIG_HARDIRQS_SW_RESEND=y -CONFIG_GENERIC_IRQ_PROBE=y -CONFIG_RWSEM_GENERIC_SPINLOCK=y -# CONFIG_ARCH_HAS_ILOG2_U32 is not set -# CONFIG_ARCH_HAS_ILOG2_U64 is not set -CONFIG_GENERIC_HWEIGHT=y -CONFIG_GENERIC_CALIBRATE_DELAY=y -CONFIG_ZONE_DMA=y -CONFIG_VECTORS_BASE=0xffff0000 -CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" - -# -# General setup -# -CONFIG_EXPERIMENTAL=y -CONFIG_BROKEN_ON_SMP=y -CONFIG_INIT_ENV_ARG_LIMIT=32 -CONFIG_LOCALVERSION="" -CONFIG_LOCALVERSION_AUTO=y -CONFIG_SWAP=y -CONFIG_SYSVIPC=y -CONFIG_SYSVIPC_SYSCTL=y -# CONFIG_POSIX_MQUEUE is not set -# CONFIG_BSD_PROCESS_ACCT is not set -# CONFIG_TASKSTATS is not set -# CONFIG_USER_NS is not set -# CONFIG_PID_NS is not set -# CONFIG_AUDIT is not set -CONFIG_IKCONFIG=y -CONFIG_IKCONFIG_PROC=y -CONFIG_LOG_BUF_SHIFT=14 -# CONFIG_CGROUPS is not set -# CONFIG_FAIR_GROUP_SCHED is not set -# CONFIG_SYSFS_DEPRECATED is not set -# CONFIG_RELAY is not set -CONFIG_BLK_DEV_INITRD=y -CONFIG_INITRAMFS_SOURCE="" -CONFIG_CC_OPTIMIZE_FOR_SIZE=y -CONFIG_SYSCTL=y -CONFIG_EMBEDDED=y -CONFIG_UID16=y -CONFIG_SYSCTL_SYSCALL=y -CONFIG_KALLSYMS=y -# CONFIG_KALLSYMS_ALL is not set -# CONFIG_KALLSYMS_EXTRA_PASS is not set -CONFIG_HOTPLUG=y -CONFIG_PRINTK=y -CONFIG_BUG=y -CONFIG_ELF_CORE=y -CONFIG_BASE_FULL=y -CONFIG_FUTEX=y -CONFIG_ANON_INODES=y -CONFIG_EPOLL=y -CONFIG_SIGNALFD=y -CONFIG_EVENTFD=y -CONFIG_SHMEM=y -CONFIG_VM_EVENT_COUNTERS=y -CONFIG_SLAB=y -# CONFIG_SLUB is not set -# CONFIG_SLOB is not set -CONFIG_SLABINFO=y -CONFIG_RT_MUTEXES=y -# CONFIG_TINY_SHMEM is not set -CONFIG_BASE_SMALL=0 -CONFIG_MODULES=y -CONFIG_MODULE_UNLOAD=y -CONFIG_MODULE_FORCE_UNLOAD=y -# CONFIG_MODVERSIONS is not set -# CONFIG_MODULE_SRCVERSION_ALL is not set -CONFIG_KMOD=y -CONFIG_BLOCK=y -# CONFIG_LBD is not set -# CONFIG_BLK_DEV_IO_TRACE is not set -# CONFIG_LSF is not set -# CONFIG_BLK_DEV_BSG is not set - -# -# IO Schedulers -# -CONFIG_IOSCHED_NOOP=y -# CONFIG_IOSCHED_AS is not set -CONFIG_IOSCHED_DEADLINE=y -# CONFIG_IOSCHED_CFQ is not set -# CONFIG_DEFAULT_AS is not set -CONFIG_DEFAULT_DEADLINE=y -# CONFIG_DEFAULT_CFQ is not set -# CONFIG_DEFAULT_NOOP is not set -CONFIG_DEFAULT_IOSCHED="deadline" - -# -# System Type -# -# CONFIG_ARCH_AAEC2000 is not set -# CONFIG_ARCH_INTEGRATOR is not set -# CONFIG_ARCH_REALVIEW is not set -# CONFIG_ARCH_VERSATILE is not set -# CONFIG_ARCH_AT91 is not set -# CONFIG_ARCH_CLPS7500 is not set -# CONFIG_ARCH_CLPS711X is not set -# CONFIG_ARCH_CO285 is not set -# CONFIG_ARCH_EBSA110 is not set -CONFIG_ARCH_EP93XX=y -# CONFIG_ARCH_FOOTBRIDGE is not set -# CONFIG_ARCH_NETX is not set -# CONFIG_ARCH_H720X is not set -# CONFIG_ARCH_IMX is not set -# CONFIG_ARCH_IOP13XX is not set -# CONFIG_ARCH_IOP32X is not set -# CONFIG_ARCH_IOP33X is not set -# CONFIG_ARCH_IXP23XX is not set -# CONFIG_ARCH_IXP2000 is not set -# CONFIG_ARCH_IXP4XX is not set -# CONFIG_ARCH_L7200 is not set -# CONFIG_ARCH_KS8695 is not set -# CONFIG_ARCH_NS9XXX is not set -# CONFIG_ARCH_MXC is not set -# CONFIG_ARCH_PNX4008 is not set -# CONFIG_ARCH_PXA is not set -# CONFIG_ARCH_RPC is not set -# CONFIG_ARCH_SA1100 is not set -# CONFIG_ARCH_S3C2410 is not set -# CONFIG_ARCH_SHARK is not set -# CONFIG_ARCH_LH7A40X is not set -# CONFIG_ARCH_DAVINCI is not set -# CONFIG_ARCH_OMAP is not set - -# -# Cirrus EP93xx Implementation Options -# -CONFIG_CRUNCH=y - -# -# EP93xx Platforms -# -# CONFIG_MACH_ADSSPHERE is not set -CONFIG_MACH_EDB9302=y -# CONFIG_MACH_EDB9302A is not set -# CONFIG_MACH_EDB9307 is not set -# CONFIG_MACH_EDB9312 is not set -# CONFIG_MACH_EDB9315 is not set -# CONFIG_MACH_EDB9315A is not set -# CONFIG_MACH_GESBC9312 is not set -# CONFIG_MACH_MICRO9 is not set -# CONFIG_MACH_MICRO9H is not set -# CONFIG_MACH_MICRO9M is not set -# CONFIG_MACH_MICRO9L is not set -# CONFIG_MACH_TS72XX is not set - -# -# Boot options -# - -# -# Power management -# - -# -# Processor Type -# -CONFIG_CPU_32=y -CONFIG_CPU_ARM920T=y -CONFIG_CPU_32v4T=y -CONFIG_CPU_ABRT_EV4T=y -CONFIG_CPU_CACHE_V4WT=y -CONFIG_CPU_CACHE_VIVT=y -CONFIG_CPU_COPY_V4WB=y -CONFIG_CPU_TLB_V4WBI=y -CONFIG_CPU_CP15=y -CONFIG_CPU_CP15_MMU=y - -# -# Processor Features -# -# CONFIG_ARM_THUMB is not set -# CONFIG_CPU_ICACHE_DISABLE is not set -# CONFIG_CPU_DCACHE_DISABLE is not set -# CONFIG_CPU_DCACHE_WRITETHROUGH is not set -# CONFIG_OUTER_CACHE is not set -CONFIG_ARM_VIC=y - -# -# Bus support -# -CONFIG_ARM_AMBA=y -# CONFIG_PCI_SYSCALL is not set -# CONFIG_ARCH_SUPPORTS_MSI is not set -# CONFIG_PCCARD is not set - -# -# Kernel Features -# -# CONFIG_TICK_ONESHOT is not set -# CONFIG_PREEMPT is not set -# CONFIG_NO_IDLE_HZ is not set -CONFIG_HZ=100 -CONFIG_AEABI=y -CONFIG_OABI_COMPAT=y -# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set -CONFIG_SELECT_MEMORY_MODEL=y -CONFIG_FLATMEM_MANUAL=y -# CONFIG_DISCONTIGMEM_MANUAL is not set -# CONFIG_SPARSEMEM_MANUAL is not set -CONFIG_FLATMEM=y -CONFIG_FLAT_NODE_MEM_MAP=y -# CONFIG_SPARSEMEM_STATIC is not set -# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set -CONFIG_SPLIT_PTLOCK_CPUS=4096 -# CONFIG_RESOURCES_64BIT is not set -CONFIG_ZONE_DMA_FLAG=1 -CONFIG_BOUNCE=y -CONFIG_VIRT_TO_BUS=y -CONFIG_ALIGNMENT_TRAP=y - -# -# Boot options -# -CONFIG_ZBOOT_ROM_TEXT=0x0 -CONFIG_ZBOOT_ROM_BSS=0x0 -CONFIG_CMDLINE="console=ttyAM0 root=mtd5 rootfstype=jffs2 mtdparts=GESBC-NAND:64m(app),-(data)" -# CONFIG_XIP_KERNEL is not set -# CONFIG_KEXEC is not set - -# -# Floating point emulation -# - -# -# At least one emulation must be selected -# -CONFIG_FPE_NWFPE=y -CONFIG_FPE_NWFPE_XP=y -# CONFIG_FPE_FASTFPE is not set - -# -# Userspace binary formats -# -CONFIG_BINFMT_ELF=y -# CONFIG_BINFMT_AOUT is not set -# CONFIG_BINFMT_MISC is not set - -# -# Power management options -# -# CONFIG_PM is not set -CONFIG_SUSPEND_UP_POSSIBLE=y - -# -# Networking -# -CONFIG_NET=y - -# -# Networking options -# -CONFIG_PACKET=y -CONFIG_PACKET_MMAP=y -CONFIG_UNIX=y -CONFIG_XFRM=y -# CONFIG_XFRM_USER is not set -# CONFIG_XFRM_SUB_POLICY is not set -# CONFIG_XFRM_MIGRATE is not set -CONFIG_NET_KEY=y -# CONFIG_NET_KEY_MIGRATE is not set -CONFIG_INET=y -# CONFIG_IP_MULTICAST is not set -# CONFIG_IP_ADVANCED_ROUTER is not set -CONFIG_IP_FIB_HASH=y -CONFIG_IP_PNP=y -CONFIG_IP_PNP_DHCP=y -CONFIG_IP_PNP_BOOTP=y -# CONFIG_IP_PNP_RARP is not set -# CONFIG_NET_IPIP is not set -# CONFIG_NET_IPGRE is not set -# CONFIG_ARPD is not set -CONFIG_SYN_COOKIES=y -# CONFIG_INET_AH is not set -# CONFIG_INET_ESP is not set -# CONFIG_INET_IPCOMP is not set -# CONFIG_INET_XFRM_TUNNEL is not set -# CONFIG_INET_TUNNEL is not set -CONFIG_INET_XFRM_MODE_TRANSPORT=y -CONFIG_INET_XFRM_MODE_TUNNEL=y -CONFIG_INET_XFRM_MODE_BEET=y -# CONFIG_INET_LRO is not set -CONFIG_INET_DIAG=y -CONFIG_INET_TCP_DIAG=y -# CONFIG_TCP_CONG_ADVANCED is not set -CONFIG_TCP_CONG_CUBIC=y -CONFIG_DEFAULT_TCP_CONG="cubic" -# CONFIG_TCP_MD5SIG is not set -# CONFIG_IPV6 is not set -# CONFIG_INET6_XFRM_TUNNEL is not set -# CONFIG_INET6_TUNNEL is not set -# CONFIG_NETWORK_SECMARK is not set -# CONFIG_NETFILTER is not set -# CONFIG_IP_DCCP is not set -# CONFIG_IP_SCTP is not set -# CONFIG_TIPC is not set -# CONFIG_ATM is not set -# CONFIG_BRIDGE is not set -# CONFIG_VLAN_8021Q is not set -# CONFIG_DECNET is not set -# CONFIG_LLC2 is not set -# CONFIG_IPX is not set -# CONFIG_ATALK is not set -# CONFIG_X25 is not set -# CONFIG_LAPB is not set -# CONFIG_ECONET is not set -# CONFIG_WAN_ROUTER is not set -# CONFIG_NET_SCHED is not set - -# -# Network testing -# -# CONFIG_NET_PKTGEN is not set -# CONFIG_HAMRADIO is not set -# CONFIG_IRDA is not set -# CONFIG_BT is not set -# CONFIG_AF_RXRPC is not set - -# -# Wireless -# -# CONFIG_CFG80211 is not set -# CONFIG_WIRELESS_EXT is not set -# CONFIG_MAC80211 is not set -# CONFIG_IEEE80211 is not set -# CONFIG_RFKILL is not set -# CONFIG_NET_9P is not set - -# -# Device Drivers -# - -# -# Generic Driver Options -# -CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" -CONFIG_STANDALONE=y -CONFIG_PREVENT_FIRMWARE_BUILD=y -# CONFIG_FW_LOADER is not set -# CONFIG_DEBUG_DRIVER is not set -# CONFIG_DEBUG_DEVRES is not set -# CONFIG_SYS_HYPERVISOR is not set -# CONFIG_CONNECTOR is not set -CONFIG_MTD=y -# CONFIG_MTD_DEBUG is not set -CONFIG_MTD_CONCAT=y -CONFIG_MTD_PARTITIONS=y -CONFIG_MTD_REDBOOT_PARTS=y -CONFIG_MTD_REDBOOT_DIRECTORY_BLOCK=-1 -# CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED is not set -# CONFIG_MTD_REDBOOT_PARTS_READONLY is not set -CONFIG_MTD_CMDLINE_PARTS=y -# CONFIG_MTD_AFS_PARTS is not set - -# -# User Modules And Translation Layers -# -CONFIG_MTD_CHAR=y -CONFIG_MTD_BLKDEVS=y -CONFIG_MTD_BLOCK=y -# CONFIG_FTL is not set -# CONFIG_NFTL is not set -# CONFIG_INFTL is not set -# CONFIG_RFD_FTL is not set -# CONFIG_SSFDC is not set -# CONFIG_MTD_OOPS is not set - -# -# RAM/ROM/Flash chip drivers -# -CONFIG_MTD_CFI=y -# CONFIG_MTD_JEDECPROBE is not set -CONFIG_MTD_GEN_PROBE=y -CONFIG_MTD_CFI_ADV_OPTIONS=y -CONFIG_MTD_CFI_NOSWAP=y -# CONFIG_MTD_CFI_BE_BYTE_SWAP is not set -# CONFIG_MTD_CFI_LE_BYTE_SWAP is not set -# CONFIG_MTD_CFI_GEOMETRY is not set -CONFIG_MTD_MAP_BANK_WIDTH_1=y -CONFIG_MTD_MAP_BANK_WIDTH_2=y -CONFIG_MTD_MAP_BANK_WIDTH_4=y -# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set -# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set -# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set -CONFIG_MTD_CFI_I1=y -CONFIG_MTD_CFI_I2=y -# CONFIG_MTD_CFI_I4 is not set -# CONFIG_MTD_CFI_I8 is not set -# CONFIG_MTD_OTP is not set -CONFIG_MTD_CFI_INTELEXT=y -CONFIG_MTD_CFI_AMDSTD=y -CONFIG_MTD_CFI_STAA=y -CONFIG_MTD_CFI_UTIL=y -# CONFIG_MTD_RAM is not set -CONFIG_MTD_ROM=y -# CONFIG_MTD_ABSENT is not set - -# -# Mapping drivers for chip access -# -# CONFIG_MTD_COMPLEX_MAPPINGS is not set -CONFIG_MTD_PHYSMAP=y -CONFIG_MTD_PHYSMAP_START=0x0 -CONFIG_MTD_PHYSMAP_LEN=0x0 -CONFIG_MTD_PHYSMAP_BANKWIDTH=1 -# CONFIG_MTD_ARM_INTEGRATOR is not set -# CONFIG_MTD_PLATRAM is not set - -# -# Self-contained MTD device drivers -# -# CONFIG_MTD_SLRAM is not set -# CONFIG_MTD_PHRAM is not set -# CONFIG_MTD_MTDRAM is not set -# CONFIG_MTD_BLOCK2MTD is not set - -# -# Disk-On-Chip Device Drivers -# -# CONFIG_MTD_DOC2000 is not set -# CONFIG_MTD_DOC2001 is not set -# CONFIG_MTD_DOC2001PLUS is not set -CONFIG_MTD_NAND=y -CONFIG_MTD_NAND_VERIFY_WRITE=y -# CONFIG_MTD_NAND_ECC_SMC is not set -# CONFIG_MTD_NAND_MUSEUM_IDS is not set -CONFIG_MTD_NAND_GESBC=y -CONFIG_MTD_NAND_IDS=y -# CONFIG_MTD_NAND_DISKONCHIP is not set -# CONFIG_MTD_NAND_NANDSIM is not set -# CONFIG_MTD_NAND_PLATFORM is not set -# CONFIG_MTD_ALAUDA is not set -# CONFIG_MTD_ONENAND is not set - -# -# UBI - Unsorted block images -# -# CONFIG_MTD_UBI is not set -# CONFIG_PARPORT is not set -CONFIG_BLK_DEV=y -# CONFIG_BLK_DEV_COW_COMMON is not set -# CONFIG_BLK_DEV_LOOP is not set -# CONFIG_BLK_DEV_NBD is not set -# CONFIG_BLK_DEV_UB is not set -CONFIG_BLK_DEV_RAM=y -CONFIG_BLK_DEV_RAM_COUNT=16 -CONFIG_BLK_DEV_RAM_SIZE=12288 -CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024 -# CONFIG_CDROM_PKTCDVD is not set -# CONFIG_ATA_OVER_ETH is not set -CONFIG_MISC_DEVICES=y -# CONFIG_EEPROM_93CX6 is not set - -# -# SCSI device support -# -# CONFIG_RAID_ATTRS is not set -CONFIG_SCSI=y -CONFIG_SCSI_DMA=y -# CONFIG_SCSI_TGT is not set -# CONFIG_SCSI_NETLINK is not set -# CONFIG_SCSI_PROC_FS is not set - -# -# SCSI support type (disk, tape, CD-ROM) -# -CONFIG_BLK_DEV_SD=y -# CONFIG_CHR_DEV_ST is not set -# CONFIG_CHR_DEV_OSST is not set -# CONFIG_BLK_DEV_SR is not set -# CONFIG_CHR_DEV_SG is not set -# CONFIG_CHR_DEV_SCH is not set - -# -# Some SCSI devices (e.g. CD jukebox) support multiple LUNs -# -# CONFIG_SCSI_MULTI_LUN is not set -# CONFIG_SCSI_CONSTANTS is not set -# CONFIG_SCSI_LOGGING is not set -# CONFIG_SCSI_SCAN_ASYNC is not set -CONFIG_SCSI_WAIT_SCAN=m - -# -# SCSI Transports -# -# CONFIG_SCSI_SPI_ATTRS is not set -# CONFIG_SCSI_FC_ATTRS is not set -# CONFIG_SCSI_ISCSI_ATTRS is not set -# CONFIG_SCSI_SAS_LIBSAS is not set -# CONFIG_SCSI_SRP_ATTRS is not set -CONFIG_SCSI_LOWLEVEL=y -# CONFIG_ISCSI_TCP is not set -# CONFIG_SCSI_DEBUG is not set -# CONFIG_ATA is not set -# CONFIG_MD is not set -CONFIG_NETDEVICES=y -# CONFIG_NETDEVICES_MULTIQUEUE is not set -# CONFIG_DUMMY is not set -# CONFIG_BONDING is not set -# CONFIG_MACVLAN is not set -# CONFIG_EQUALIZER is not set -# CONFIG_TUN is not set -# CONFIG_VETH is not set -# CONFIG_PHYLIB is not set -CONFIG_NET_ETHERNET=y -CONFIG_MII=y -CONFIG_EP93XX_ETH=y -# CONFIG_AX88796 is not set -# CONFIG_SMC91X is not set -# CONFIG_DM9000 is not set -# CONFIG_IBM_NEW_EMAC_ZMII is not set -# CONFIG_IBM_NEW_EMAC_RGMII is not set -# CONFIG_IBM_NEW_EMAC_TAH is not set -# CONFIG_IBM_NEW_EMAC_EMAC4 is not set -# CONFIG_B44 is not set -# CONFIG_NETDEV_1000 is not set -# CONFIG_NETDEV_10000 is not set - -# -# Wireless LAN -# -# CONFIG_WLAN_PRE80211 is not set -# CONFIG_WLAN_80211 is not set - -# -# USB Network Adapters -# -# CONFIG_USB_CATC is not set -# CONFIG_USB_KAWETH is not set -# CONFIG_USB_PEGASUS is not set -# CONFIG_USB_RTL8150 is not set -# CONFIG_USB_USBNET is not set -# CONFIG_WAN is not set -# CONFIG_PPP is not set -# CONFIG_SLIP is not set -# CONFIG_SHAPER is not set -# CONFIG_NETCONSOLE is not set -# CONFIG_NETPOLL is not set -# CONFIG_NET_POLL_CONTROLLER is not set -# CONFIG_ISDN is not set - -# -# Input device support -# -# CONFIG_INPUT is not set - -# -# Hardware I/O ports -# -# CONFIG_SERIO is not set -# CONFIG_GAMEPORT is not set - -# -# Character devices -# -# CONFIG_VT is not set -# CONFIG_SERIAL_NONSTANDARD is not set - -# -# Serial drivers -# -# CONFIG_SERIAL_8250 is not set - -# -# Non-8250 serial port support -# -CONFIG_SERIAL_AMBA_PL010=y -CONFIG_SERIAL_AMBA_PL010_CONSOLE=y -# CONFIG_SERIAL_AMBA_PL011 is not set -CONFIG_SERIAL_CORE=y -CONFIG_SERIAL_CORE_CONSOLE=y -CONFIG_UNIX98_PTYS=y -# CONFIG_LEGACY_PTYS is not set -# CONFIG_IPMI_HANDLER is not set -# CONFIG_HW_RANDOM is not set -# CONFIG_NVRAM is not set -# CONFIG_R3964 is not set -# CONFIG_RAW_DRIVER is not set -# CONFIG_TCG_TPM is not set -CONFIG_I2C=y -CONFIG_I2C_BOARDINFO=y -CONFIG_I2C_CHARDEV=y - -# -# I2C Algorithms -# -CONFIG_I2C_ALGOBIT=y -# CONFIG_I2C_ALGOPCF is not set -# CONFIG_I2C_ALGOPCA is not set - -# -# I2C Hardware Bus support -# -# CONFIG_I2C_OCORES is not set -# CONFIG_I2C_PARPORT_LIGHT is not set -# CONFIG_I2C_SIMTEC is not set -# CONFIG_I2C_TAOS_EVM is not set -# CONFIG_I2C_STUB is not set -# CONFIG_I2C_TINY_USB is not set - -# -# Miscellaneous I2C Chip support -# -CONFIG_SENSORS_DS1337=y -# CONFIG_SENSORS_DS1374 is not set -# CONFIG_DS1682 is not set -# CONFIG_SENSORS_EEPROM is not set -# CONFIG_SENSORS_PCF8574 is not set -# CONFIG_SENSORS_PCA9539 is not set -# CONFIG_SENSORS_PCF8591 is not set -# CONFIG_SENSORS_MAX6875 is not set -# CONFIG_SENSORS_TSL2550 is not set -CONFIG_I2C_DEBUG_CORE=y -CONFIG_I2C_DEBUG_ALGO=y -CONFIG_I2C_DEBUG_BUS=y -CONFIG_I2C_DEBUG_CHIP=y - -# -# SPI support -# -# CONFIG_SPI is not set -# CONFIG_SPI_MASTER is not set -# CONFIG_W1 is not set -# CONFIG_POWER_SUPPLY is not set -CONFIG_HWMON=y -# CONFIG_HWMON_VID is not set -# CONFIG_SENSORS_AD7418 is not set -# CONFIG_SENSORS_ADM1021 is not set -# CONFIG_SENSORS_ADM1025 is not set -# CONFIG_SENSORS_ADM1026 is not set -# CONFIG_SENSORS_ADM1029 is not set -# CONFIG_SENSORS_ADM1031 is not set -# CONFIG_SENSORS_ADM9240 is not set -# CONFIG_SENSORS_ADT7470 is not set -# CONFIG_SENSORS_ATXP1 is not set -# CONFIG_SENSORS_DS1621 is not set -# CONFIG_SENSORS_F71805F is not set -# CONFIG_SENSORS_F71882FG is not set -# CONFIG_SENSORS_F75375S is not set -# CONFIG_SENSORS_GL518SM is not set -# CONFIG_SENSORS_GL520SM is not set -# CONFIG_SENSORS_IT87 is not set -# CONFIG_SENSORS_LM63 is not set -# CONFIG_SENSORS_LM75 is not set -# CONFIG_SENSORS_LM77 is not set -# CONFIG_SENSORS_LM78 is not set -# CONFIG_SENSORS_LM80 is not set -# CONFIG_SENSORS_LM83 is not set -# CONFIG_SENSORS_LM85 is not set -# CONFIG_SENSORS_LM87 is not set -# CONFIG_SENSORS_LM90 is not set -# CONFIG_SENSORS_LM92 is not set -# CONFIG_SENSORS_LM93 is not set -# CONFIG_SENSORS_MAX1619 is not set -# CONFIG_SENSORS_MAX6650 is not set -# CONFIG_SENSORS_PC87360 is not set -# CONFIG_SENSORS_PC87427 is not set -# CONFIG_SENSORS_DME1737 is not set -# CONFIG_SENSORS_SMSC47M1 is not set -# CONFIG_SENSORS_SMSC47M192 is not set -# CONFIG_SENSORS_SMSC47B397 is not set -# CONFIG_SENSORS_THMC50 is not set -# CONFIG_SENSORS_VT1211 is not set -# CONFIG_SENSORS_W83781D is not set -# CONFIG_SENSORS_W83791D is not set -# CONFIG_SENSORS_W83792D is not set -# CONFIG_SENSORS_W83793 is not set -# CONFIG_SENSORS_W83L785TS is not set -# CONFIG_SENSORS_W83627HF is not set -# CONFIG_SENSORS_W83627EHF is not set -# CONFIG_HWMON_DEBUG_CHIP is not set -CONFIG_WATCHDOG=y -# CONFIG_WATCHDOG_NOWAYOUT is not set - -# -# Watchdog Device Drivers -# -# CONFIG_SOFT_WATCHDOG is not set -CONFIG_EP93XX_WATCHDOG=y - -# -# USB-based Watchdog Cards -# -# CONFIG_USBPCWATCHDOG is not set - -# -# Sonics Silicon Backplane -# -CONFIG_SSB_POSSIBLE=y -# CONFIG_SSB is not set - -# -# Multifunction device drivers -# -# CONFIG_MFD_SM501 is not set - -# -# Multimedia devices -# -# CONFIG_VIDEO_DEV is not set -# CONFIG_DVB_CORE is not set -# CONFIG_DAB is not set - -# -# Graphics support -# -# CONFIG_VGASTATE is not set -# CONFIG_VIDEO_OUTPUT_CONTROL is not set -# CONFIG_FB is not set -# CONFIG_BACKLIGHT_LCD_SUPPORT is not set - -# -# Display device support -# -# CONFIG_DISPLAY_SUPPORT is not set - -# -# Sound -# -# CONFIG_SOUND is not set -CONFIG_USB_SUPPORT=y -CONFIG_USB_ARCH_HAS_HCD=y -CONFIG_USB_ARCH_HAS_OHCI=y -# CONFIG_USB_ARCH_HAS_EHCI is not set -CONFIG_USB=y -CONFIG_USB_DEBUG=y - -# -# Miscellaneous USB options -# -CONFIG_USB_DEVICEFS=y -# CONFIG_USB_DEVICE_CLASS is not set -CONFIG_USB_DYNAMIC_MINORS=y -# CONFIG_USB_OTG is not set - -# -# USB Host Controller Drivers -# -# CONFIG_USB_ISP116X_HCD is not set -CONFIG_USB_OHCI_HCD=y -# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set -# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set -CONFIG_USB_OHCI_LITTLE_ENDIAN=y -# CONFIG_USB_SL811_HCD is not set -# CONFIG_USB_R8A66597_HCD is not set - -# -# USB Device Class drivers -# -# CONFIG_USB_ACM is not set -# CONFIG_USB_PRINTER is not set - -# -# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' -# - -# -# may also be needed; see USB_STORAGE Help for more information -# -CONFIG_USB_STORAGE=y -# CONFIG_USB_STORAGE_DEBUG is not set -# CONFIG_USB_STORAGE_DATAFAB is not set -# CONFIG_USB_STORAGE_FREECOM is not set -# CONFIG_USB_STORAGE_ISD200 is not set -# CONFIG_USB_STORAGE_DPCM is not set -# CONFIG_USB_STORAGE_USBAT is not set -# CONFIG_USB_STORAGE_SDDR09 is not set -# CONFIG_USB_STORAGE_SDDR55 is not set -# CONFIG_USB_STORAGE_JUMPSHOT is not set -# CONFIG_USB_STORAGE_ALAUDA is not set -# CONFIG_USB_STORAGE_KARMA is not set -# CONFIG_USB_LIBUSUAL is not set - -# -# USB Imaging devices -# -# CONFIG_USB_MDC800 is not set -# CONFIG_USB_MICROTEK is not set -# CONFIG_USB_MON is not set - -# -# USB port drivers -# - -# -# USB Serial Converter support -# -CONFIG_USB_SERIAL=m -CONFIG_USB_SERIAL_GENERIC=y -# CONFIG_USB_SERIAL_AIRCABLE is not set -# CONFIG_USB_SERIAL_AIRPRIME is not set -# CONFIG_USB_SERIAL_ARK3116 is not set -# CONFIG_USB_SERIAL_BELKIN is not set -# CONFIG_USB_SERIAL_CH341 is not set -# CONFIG_USB_SERIAL_WHITEHEAT is not set -# CONFIG_USB_SERIAL_DIGI_ACCELEPORT is not set -# CONFIG_USB_SERIAL_CP2101 is not set -# CONFIG_USB_SERIAL_CYPRESS_M8 is not set -# CONFIG_USB_SERIAL_EMPEG is not set -CONFIG_USB_SERIAL_FTDI_SIO=m -# CONFIG_USB_SERIAL_FUNSOFT is not set -# CONFIG_USB_SERIAL_VISOR is not set -# CONFIG_USB_SERIAL_IPAQ is not set -# CONFIG_USB_SERIAL_IR is not set -# CONFIG_USB_SERIAL_EDGEPORT is not set -# CONFIG_USB_SERIAL_EDGEPORT_TI is not set -# CONFIG_USB_SERIAL_GARMIN is not set -# CONFIG_USB_SERIAL_IPW is not set -# CONFIG_USB_SERIAL_KEYSPAN_PDA is not set -# CONFIG_USB_SERIAL_KEYSPAN is not set -# CONFIG_USB_SERIAL_KLSI is not set -# CONFIG_USB_SERIAL_KOBIL_SCT is not set -# CONFIG_USB_SERIAL_MCT_U232 is not set -# CONFIG_USB_SERIAL_MOS7720 is not set -# CONFIG_USB_SERIAL_MOS7840 is not set -# CONFIG_USB_SERIAL_NAVMAN is not set -# CONFIG_USB_SERIAL_PL2303 is not set -# CONFIG_USB_SERIAL_OTI6858 is not set -# CONFIG_USB_SERIAL_HP4X is not set -# CONFIG_USB_SERIAL_SAFE is not set -# CONFIG_USB_SERIAL_SIERRAWIRELESS is not set -# CONFIG_USB_SERIAL_TI is not set -# CONFIG_USB_SERIAL_CYBERJACK is not set -# CONFIG_USB_SERIAL_XIRCOM is not set -# CONFIG_USB_SERIAL_OPTION is not set -# CONFIG_USB_SERIAL_OMNINET is not set -# CONFIG_USB_SERIAL_DEBUG is not set - -# -# USB Miscellaneous drivers -# -# CONFIG_USB_EMI62 is not set -# CONFIG_USB_EMI26 is not set -# CONFIG_USB_ADUTUX is not set -# CONFIG_USB_AUERSWALD is not set -# CONFIG_USB_RIO500 is not set -# CONFIG_USB_LEGOTOWER is not set -# CONFIG_USB_LCD is not set -# CONFIG_USB_BERRY_CHARGE is not set -# CONFIG_USB_LED is not set -# CONFIG_USB_CYPRESS_CY7C63 is not set -# CONFIG_USB_CYTHERM is not set -# CONFIG_USB_PHIDGET is not set -# CONFIG_USB_IDMOUSE is not set -# CONFIG_USB_FTDI_ELAN is not set -# CONFIG_USB_APPLEDISPLAY is not set -# CONFIG_USB_LD is not set -# CONFIG_USB_TRANCEVIBRATOR is not set -# CONFIG_USB_IOWARRIOR is not set -# CONFIG_USB_TEST is not set - -# -# USB DSL modem support -# - -# -# USB Gadget Support -# -# CONFIG_USB_GADGET is not set -# CONFIG_MMC is not set -# CONFIG_NEW_LEDS is not set -CONFIG_RTC_LIB=y -CONFIG_RTC_CLASS=y -CONFIG_RTC_HCTOSYS=y -CONFIG_RTC_HCTOSYS_DEVICE="rtc0" -# CONFIG_RTC_DEBUG is not set - -# -# RTC interfaces -# -CONFIG_RTC_INTF_SYSFS=y -CONFIG_RTC_INTF_PROC=y -CONFIG_RTC_INTF_DEV=y -# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set -# CONFIG_RTC_DRV_TEST is not set - -# -# I2C RTC drivers -# -# CONFIG_RTC_DRV_DS1307 is not set -# CONFIG_RTC_DRV_DS1374 is not set -# CONFIG_RTC_DRV_DS1672 is not set -# CONFIG_RTC_DRV_MAX6900 is not set -# CONFIG_RTC_DRV_RS5C372 is not set -# CONFIG_RTC_DRV_ISL1208 is not set -# CONFIG_RTC_DRV_X1205 is not set -# CONFIG_RTC_DRV_PCF8563 is not set -# CONFIG_RTC_DRV_PCF8583 is not set -# CONFIG_RTC_DRV_M41T80 is not set - -# -# SPI RTC drivers -# - -# -# Platform RTC drivers -# -# CONFIG_RTC_DRV_CMOS is not set -# CONFIG_RTC_DRV_DS1553 is not set -# CONFIG_RTC_DRV_STK17TA8 is not set -# CONFIG_RTC_DRV_DS1742 is not set -# CONFIG_RTC_DRV_M48T86 is not set -# CONFIG_RTC_DRV_M48T59 is not set -# CONFIG_RTC_DRV_V3020 is not set - -# -# on-CPU RTC drivers -# -CONFIG_RTC_DRV_EP93XX=y -# CONFIG_RTC_DRV_PL031 is not set - -# -# File systems -# -CONFIG_EXT2_FS=y -# CONFIG_EXT2_FS_XATTR is not set -# CONFIG_EXT2_FS_XIP is not set -CONFIG_EXT3_FS=y -# CONFIG_EXT3_FS_XATTR is not set -# CONFIG_EXT4DEV_FS is not set -CONFIG_JBD=y -# CONFIG_REISERFS_FS is not set -# CONFIG_JFS_FS is not set -# CONFIG_FS_POSIX_ACL is not set -# CONFIG_XFS_FS is not set -# CONFIG_GFS2_FS is not set -# CONFIG_OCFS2_FS is not set -# CONFIG_MINIX_FS is not set -# CONFIG_ROMFS_FS is not set -CONFIG_INOTIFY=y -CONFIG_INOTIFY_USER=y -# CONFIG_QUOTA is not set -CONFIG_DNOTIFY=y -# CONFIG_AUTOFS_FS is not set -# CONFIG_AUTOFS4_FS is not set -# CONFIG_FUSE_FS is not set - -# -# CD-ROM/DVD Filesystems -# -# CONFIG_ISO9660_FS is not set -# CONFIG_UDF_FS is not set - -# -# DOS/FAT/NT Filesystems -# -CONFIG_FAT_FS=y -# CONFIG_MSDOS_FS is not set -CONFIG_VFAT_FS=y -CONFIG_FAT_DEFAULT_CODEPAGE=437 -CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" -# CONFIG_NTFS_FS is not set - -# -# Pseudo filesystems -# -CONFIG_PROC_FS=y -CONFIG_PROC_SYSCTL=y -CONFIG_SYSFS=y -CONFIG_TMPFS=y -# CONFIG_TMPFS_POSIX_ACL is not set -# CONFIG_HUGETLB_PAGE is not set -# CONFIG_CONFIGFS_FS is not set - -# -# Miscellaneous filesystems -# -# CONFIG_ADFS_FS is not set -# CONFIG_AFFS_FS is not set -# CONFIG_HFS_FS is not set -# CONFIG_HFSPLUS_FS is not set -# CONFIG_BEFS_FS is not set -# CONFIG_BFS_FS is not set -# CONFIG_EFS_FS is not set -CONFIG_JFFS2_FS=y -CONFIG_JFFS2_FS_DEBUG=0 -CONFIG_JFFS2_FS_WRITEBUFFER=y -# CONFIG_JFFS2_FS_WBUF_VERIFY is not set -CONFIG_JFFS2_SUMMARY=y -# CONFIG_JFFS2_FS_XATTR is not set -# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set -CONFIG_JFFS2_ZLIB=y -# CONFIG_JFFS2_LZO is not set -CONFIG_JFFS2_RTIME=y -# CONFIG_JFFS2_RUBIN is not set -# CONFIG_CRAMFS is not set -# CONFIG_VXFS_FS is not set -# CONFIG_HPFS_FS is not set -# CONFIG_QNX4FS_FS is not set -# CONFIG_SYSV_FS is not set -# CONFIG_UFS_FS is not set -CONFIG_NETWORK_FILESYSTEMS=y -CONFIG_NFS_FS=y -CONFIG_NFS_V3=y -# CONFIG_NFS_V3_ACL is not set -# CONFIG_NFS_V4 is not set -# CONFIG_NFS_DIRECTIO is not set -# CONFIG_NFSD is not set -CONFIG_ROOT_NFS=y -CONFIG_LOCKD=y -CONFIG_LOCKD_V4=y -CONFIG_NFS_COMMON=y -CONFIG_SUNRPC=y -# CONFIG_SUNRPC_BIND34 is not set -# CONFIG_RPCSEC_GSS_KRB5 is not set -# CONFIG_RPCSEC_GSS_SPKM3 is not set -CONFIG_SMB_FS=y -# CONFIG_SMB_NLS_DEFAULT is not set -# CONFIG_CIFS is not set -# CONFIG_NCP_FS is not set -# CONFIG_CODA_FS is not set -# CONFIG_AFS_FS is not set - -# -# Partition Types -# -CONFIG_PARTITION_ADVANCED=y -# CONFIG_ACORN_PARTITION is not set -# CONFIG_OSF_PARTITION is not set -# CONFIG_AMIGA_PARTITION is not set -# CONFIG_ATARI_PARTITION is not set -# CONFIG_MAC_PARTITION is not set -CONFIG_MSDOS_PARTITION=y -# CONFIG_BSD_DISKLABEL is not set -# CONFIG_MINIX_SUBPARTITION is not set -# CONFIG_SOLARIS_X86_PARTITION is not set -# CONFIG_UNIXWARE_DISKLABEL is not set -# CONFIG_LDM_PARTITION is not set -# CONFIG_SGI_PARTITION is not set -# CONFIG_ULTRIX_PARTITION is not set -# CONFIG_SUN_PARTITION is not set -# CONFIG_KARMA_PARTITION is not set -# CONFIG_EFI_PARTITION is not set -# CONFIG_SYSV68_PARTITION is not set -CONFIG_NLS=y -CONFIG_NLS_DEFAULT="iso8859-1" -CONFIG_NLS_CODEPAGE_437=y -# CONFIG_NLS_CODEPAGE_737 is not set -# CONFIG_NLS_CODEPAGE_775 is not set -# CONFIG_NLS_CODEPAGE_850 is not set -# CONFIG_NLS_CODEPAGE_852 is not set -# CONFIG_NLS_CODEPAGE_855 is not set -# CONFIG_NLS_CODEPAGE_857 is not set -# CONFIG_NLS_CODEPAGE_860 is not set -# CONFIG_NLS_CODEPAGE_861 is not set -# CONFIG_NLS_CODEPAGE_862 is not set -# CONFIG_NLS_CODEPAGE_863 is not set -# CONFIG_NLS_CODEPAGE_864 is not set -# CONFIG_NLS_CODEPAGE_865 is not set -# CONFIG_NLS_CODEPAGE_866 is not set -# CONFIG_NLS_CODEPAGE_869 is not set -# CONFIG_NLS_CODEPAGE_936 is not set -# CONFIG_NLS_CODEPAGE_950 is not set -# CONFIG_NLS_CODEPAGE_932 is not set -# CONFIG_NLS_CODEPAGE_949 is not set -# CONFIG_NLS_CODEPAGE_874 is not set -# CONFIG_NLS_ISO8859_8 is not set -# CONFIG_NLS_CODEPAGE_1250 is not set -# CONFIG_NLS_CODEPAGE_1251 is not set -# CONFIG_NLS_ASCII is not set -CONFIG_NLS_ISO8859_1=y -# CONFIG_NLS_ISO8859_2 is not set -# CONFIG_NLS_ISO8859_3 is not set -# CONFIG_NLS_ISO8859_4 is not set -# CONFIG_NLS_ISO8859_5 is not set -# CONFIG_NLS_ISO8859_6 is not set -# CONFIG_NLS_ISO8859_7 is not set -# CONFIG_NLS_ISO8859_9 is not set -# CONFIG_NLS_ISO8859_13 is not set -# CONFIG_NLS_ISO8859_14 is not set -# CONFIG_NLS_ISO8859_15 is not set -# CONFIG_NLS_KOI8_R is not set -# CONFIG_NLS_KOI8_U is not set -# CONFIG_NLS_UTF8 is not set -# CONFIG_DLM is not set -CONFIG_INSTRUMENTATION=y -# CONFIG_PROFILING is not set -# CONFIG_MARKERS is not set - -# -# Kernel hacking -# -# CONFIG_PRINTK_TIME is not set -CONFIG_ENABLE_WARN_DEPRECATED=y -CONFIG_ENABLE_MUST_CHECK=y -CONFIG_MAGIC_SYSRQ=y -# CONFIG_UNUSED_SYMBOLS is not set -# CONFIG_DEBUG_FS is not set -# CONFIG_HEADERS_CHECK is not set -CONFIG_DEBUG_KERNEL=y -# CONFIG_DEBUG_SHIRQ is not set -CONFIG_DETECT_SOFTLOCKUP=y -CONFIG_SCHED_DEBUG=y -# CONFIG_SCHEDSTATS is not set -# CONFIG_TIMER_STATS is not set -CONFIG_DEBUG_SLAB=y -# CONFIG_DEBUG_SLAB_LEAK is not set -# CONFIG_DEBUG_RT_MUTEXES is not set -# CONFIG_RT_MUTEX_TESTER is not set -CONFIG_DEBUG_SPINLOCK=y -CONFIG_DEBUG_MUTEXES=y -# CONFIG_DEBUG_LOCK_ALLOC is not set -# CONFIG_PROVE_LOCKING is not set -# CONFIG_LOCK_STAT is not set -# CONFIG_DEBUG_SPINLOCK_SLEEP is not set -# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set -# CONFIG_DEBUG_KOBJECT is not set -CONFIG_DEBUG_BUGVERBOSE=y -# CONFIG_DEBUG_INFO is not set -# CONFIG_DEBUG_VM is not set -# CONFIG_DEBUG_LIST is not set -# CONFIG_DEBUG_SG is not set -CONFIG_FRAME_POINTER=y -CONFIG_FORCED_INLINING=y -# CONFIG_BOOT_PRINTK_DELAY is not set -# CONFIG_RCU_TORTURE_TEST is not set -# CONFIG_FAULT_INJECTION is not set -# CONFIG_SAMPLES is not set -CONFIG_DEBUG_USER=y -CONFIG_DEBUG_ERRORS=y -CONFIG_DEBUG_LL=y -# CONFIG_DEBUG_ICEDCC is not set - -# -# Security options -# -# CONFIG_KEYS is not set -# CONFIG_SECURITY is not set -# CONFIG_SECURITY_FILE_CAPABILITIES is not set -# CONFIG_CRYPTO is not set - -# -# Library routines -# -CONFIG_BITREVERSE=y -# CONFIG_CRC_CCITT is not set -# CONFIG_CRC16 is not set -# CONFIG_CRC_ITU_T is not set -CONFIG_CRC32=y -# CONFIG_CRC7 is not set -CONFIG_LIBCRC32C=y -CONFIG_ZLIB_INFLATE=y -CONFIG_ZLIB_DEFLATE=y -CONFIG_PLIST=y -CONFIG_HAS_IOMEM=y -CONFIG_HAS_IOPORT=y -CONFIG_HAS_DMA=y |