ixp4xx-csr: November 16 2005 release from Intel 2.1

8 files changed, 233 insertions, 0 deletions

diff --git a/packages/ixp4xx/ixp4xx-csr-2.1/.mtn2git_empty b/packages/ixp4xx/ixp4xx-csr-2.1/.mtn2git_empty
new file mode 100644
index 0000000000..e69de29bb2
--- /dev/null
+++ b/packages/ixp4xx/ixp4xx-csr-2.1/.mtn2git_empty
diff --git a/packages/ixp4xx/ixp4xx-csr-2.1/Makefile.patch b/packages/ixp4xx/ixp4xx-csr-2.1/Makefile.patch
new file mode 100644
index 0000000000..b90a3d7da4
--- /dev/null
+++ b/packages/ixp4xx/ixp4xx-csr-2.1/Makefile.patch
@@ -0,0 +1,59 @@
+--- ixp400_xscale_sw/Makefile	2005-11-20 08:43:17.610454268 -0800
++++ ixp400_xscale_sw/Makefile	2005-11-20 08:44:37.387474319 -0800
+@@ -297,9 +297,9 @@ endif
+ else # IX_TARGET_OS == vxworks
+ # linux compiler flags 
+ MAKE_DEP_FLAG := -M
+-LINUX_MACH_CFLAGS := -D__LINUX_ARM_ARCH__=5 -mcpu=xscale -mtune=xscale
++LINUX_MACH_CFLAGS := -D__LINUX_ARM_ARCH__=5 -mtune=xscale
+ 
+-CFLAGS := -D__KERNEL__ -I$(LINUX_SRC)/include -Wall -Wno-trigraphs -fno-common -pipe -mapcs-32 -mshort-load-bytes -msoft-float -DMODULE -Isrc/include -D__linux -DCPU=33 -DXSCALE=33 $(LINUX_MACH_CFLAGS)
++CFLAGS := -D__KERNEL__ -I$(LINUX_SRC)/include -Wall -Wno-trigraphs -fno-common -pipe -mapcs-32 -msoft-float -DMODULE -Isrc/include -D__linux -DCPU=33 -DXSCALE=33 $(LINUX_MACH_CFLAGS)
+ ifndef IX_INCLUDE_MICROCODE
+ CFLAGS += -DIX_NPEDL_READ_MICROCODE_FROM_FILE
+ endif
+@@ -867,9 +867,11 @@ $(NPE_DAT) : $(NPE_CONVERTER)
+ 
+ ifeq ($(IX_HOST_OS),linux)
+ ifndef IX_INCLUDE_MICROCODE
++ifdef IX_BUILD_MICROCODE
+ Makefile: $(NPE_CONVERTER) $(NPE_DAT)
+ endif
+ endif
++endif
+ 
+ ################################################################
+ # Rules to check that macros are defined.
+@@ -1321,10 +1323,18 @@ ixp400.o : $(OBJ_DIR)/ixp400.o
+ 
+ ifndef IX_INCLUDE_MICROCODE
+ $(OBJ_DIR)/ixp400.o: $(COMPONENTS:%=$(OBJ_DIR)/ixp400_%.o) $(OSAL_MODULE)
++	touch $(OBJ_DIR)/ixp400.c
++	cp Makefile.kmod26 $(OBJ_DIR)/Makefile
++	make -C $(OBJ_DIR)
+ 	$(LD) $(LDFLAGS) $^ -o $@
++	make -C $(OBJ_DIR)
+ else
+ $(OBJ_DIR)/ixp400.o: $(COMPONENTS:%=$(OBJ_DIR)/ixp400_%.o) $(NPE_PRODUCTION_HEADER_OBJ) $(OSAL_MODULE)
++	touch $(OBJ_DIR)/ixp400.c
++	cp Makefile.kmod26 $(OBJ_DIR)/Makefile
++	make -C $(OBJ_DIR)
+ 	$(LD) $(LDFLAGS) $^ -o $@
++	make -C $(OBJ_DIR)
+ endif
+ 
+ 
+--- ixp400_xscale_sw/Makefile.kmod26	1970-01-01 01:00:00.000000000 +0100
++++ ixp400_xscale_sw/Makefile.kmod26	2005-08-24 22:33:12.000000000 +0200
+@@ -0,0 +1,11 @@
++obj-m := ixp400.o
++
++PWD         := $(shell pwd)
++
++LINUX_SRC := $($(IX_TARGET)_KERNEL_DIR)
++
++default:
++	$(MAKE) ARCH=arm CROSS_COMPILE=$(LINUX_CROSS_COMPILE) $(KERNEL_VERBOSE) -C $(LINUX_SRC) SUBDIRS=$(PWD) modules
++
++clean:
++	rm -f ixp400.ko
diff --git a/packages/ixp4xx/ixp4xx-csr-2.1/bit-macro.patch b/packages/ixp4xx/ixp4xx-csr-2.1/bit-macro.patch
new file mode 100644
index 0000000000..5cdb395f28
--- /dev/null
+++ b/packages/ixp4xx/ixp4xx-csr-2.1/bit-macro.patch
@@ -0,0 +1,14 @@
+--- ixp400_xscale_sw/src/include/IxTypes.h	2005-08-24 00:16:36.000000000 +0200
++++ ixp400_xscale_sw/src/include/IxTypes.h	2005-08-26 01:19:15.000000000 +0200
+@@ -79,6 +79,10 @@
+ #endif
+ #endif
+ 
++#ifndef BIT
++#define BIT(x)  ((1)<<(x))
++#endif
++
+ #include "IxOsalBackward.h"
+ 
+ #endif /* IxTypes_H */
+
diff --git a/packages/ixp4xx/ixp4xx-csr-2.1/ixethdb-header.patch b/packages/ixp4xx/ixp4xx-csr-2.1/ixethdb-header.patch
new file mode 100644
index 0000000000..e426afe914
--- /dev/null
+++ b/packages/ixp4xx/ixp4xx-csr-2.1/ixethdb-header.patch
@@ -0,0 +1,11 @@
+--- ixp400_xscale_sw/src/ethDB/include/IxEthDB_p.h.orig	2005-11-20 08:51:54.710993353 -0800
++++ ixp400_xscale_sw/src/ethDB/include/IxEthDB_p.h	2005-11-20 08:51:57.559172578 -0800
+@@ -693,7 +693,7 @@ IX_ETH_DB_PUBLIC UINT32 ixEthDBEntryXORH
+ IX_ETH_DB_PUBLIC UINT32 ixEthDBKeyXORHash(void *macAddress);
+ 
+ /* Port updates */
+-IX_ETH_DB_PUBLIC IxEthDBStatus ixEthDBNPEUpdateHandler(IxEthDBPortId portID, IxEthDBFeature type);
++IX_ETH_DB_PUBLIC IxEthDBStatus ixEthDBNPEUpdateHandler(IxEthDBPortId portID, IxEthDBRecordType type);
+ IX_ETH_DB_PUBLIC void ixEthDBUpdatePortLearningTrees(IxEthDBPortMap triggerPorts);
+ IX_ETH_DB_PUBLIC void ixEthDBNPEAccessRequest(IxEthDBPortId portID);
+ IX_ETH_DB_PUBLIC void ixEthDBUpdateLock(void);
diff --git a/packages/ixp4xx/ixp4xx-csr-2.1/ixnpemhconfigisr-is-private.patch b/packages/ixp4xx/ixp4xx-csr-2.1/ixnpemhconfigisr-is-private.patch
new file mode 100644
index 0000000000..6f853ac19e
--- /dev/null
+++ b/packages/ixp4xx/ixp4xx-csr-2.1/ixnpemhconfigisr-is-private.patch
@@ -0,0 +1,18 @@
+--- ixp400_xscale_sw/src/npeMh/IxNpeMhSymbols.c.orig	2005-11-20 08:59:46.816701092 -0800
++++ ixp400_xscale_sw/src/npeMh/IxNpeMhSymbols.c	2005-11-20 08:59:54.561188422 -0800
+@@ -63,7 +63,6 @@ EXPORT_SYMBOL(ixNpeMhMessagesReceive);
+ EXPORT_SYMBOL(ixNpeMhShow);
+ EXPORT_SYMBOL(ixNpeMhShowReset);
+ 
+-extern void ixNpeMhConfigIsr (void *parameter);
+ extern BOOL ixNpeMhConfigInFifoIsFull(IxNpeMhNpeId npeId);
+ extern BOOL ixNpeMhConfigOutFifoIsEmpty (IxNpeMhNpeId npeId);
+ extern void ixNpeMhConfigLockRelease (IxNpeMhNpeId npeId);
+@@ -72,7 +71,6 @@ extern void ixNpeMhConfigOutFifoRead (Ix
+ extern void ixNpeMhConfigInFifoWrite (IxNpeMhNpeId npeId,IxNpeMhMessage message);
+ extern struct ixNpeMhConfigNpeInfo ixNpeMhConfigNpeInfo[IX_NPEMH_NUM_NPES];
+ 
+-EXPORT_SYMBOL(ixNpeMhConfigIsr);
+ EXPORT_SYMBOL(ixNpeMhConfigInFifoIsFull);
+ EXPORT_SYMBOL(ixNpeMhConfigOutFifoIsEmpty);
+ EXPORT_SYMBOL(ixNpeMhConfigLockRelease);
diff --git a/packages/ixp4xx/ixp4xx-csr-2.1/le.patch b/packages/ixp4xx/ixp4xx-csr-2.1/le.patch
new file mode 100644
index 0000000000..b62389cbee
--- /dev/null
+++ b/packages/ixp4xx/ixp4xx-csr-2.1/le.patch
@@ -0,0 +1,13 @@
+--- ixp400_xscale_sw/.pc/le.patch/src/include/IxQMgr.h	2005-04-17 20:55:31.000000000 -0700
++++ ixp400_xscale_sw/src/include/IxQMgr.h	2005-11-19 16:01:52.817556623 -0800
+@@ -96,8 +98,8 @@
+ 
+ #else
+ 
+-#define IX_QMGR_INLINE_READ_LONG IX_OSAL_READ_LONG_LE_DC
+-#define IX_QMGR_INLINE_WRITE_LONG IX_OSAL_WRITE_LONG_LE_DC
++#define IX_QMGR_INLINE_READ_LONG IX_OSAL_READ_LONG_LE_AC
++#define IX_QMGR_INLINE_WRITE_LONG IX_OSAL_WRITE_LONG_LE_AC
+ 
+ #endif
+ 
diff --git a/packages/ixp4xx/ixp4xx-csr_2.0.bb b/packages/ixp4xx/ixp4xx-csr_2.0.bb
index 88c8482d85..963ecc2f64 100644
--- a/packages/ixp4xx/ixp4xx-csr_2.0.bb
+++ b/packages/ixp4xx/ixp4xx-csr_2.0.bb
@@ -18,6 +18,11 @@ LICENSE_HOMEPAGE = "http://www.intel.com/design/network/products/npfamily/ixp425
 # versions 2.0, encryption is not required.)
 #
 # Store the files with the names given below in your downloads directory
+# and store the 32 character md5sum of the file in a file of the same
+# name with the additional extension .md5:
+#
+#	IPL_ixp400AccessLibrary-2_0.zip.md5
+#	IPL_ixp400NpeLibrary-2_0_5.zip.md5
 #
 SRC_URI = "http://www.intel.com/Please-Read-The-BB-File/IPL_ixp400AccessLibrary-2_0.zip"
 SRC_URI += "http://www.intel.com/Please-Read-The-BB-File/IPL_ixp400NpeLibrary-2_0_5.zip"
diff --git a/packages/ixp4xx/ixp4xx-csr_2.1.bb b/packages/ixp4xx/ixp4xx-csr_2.1.bb
new file mode 100644
index 0000000000..65282c4aa3
--- /dev/null
+++ b/packages/ixp4xx/ixp4xx-csr_2.1.bb
@@ -0,0 +1,113 @@
+# Intel ixp4xx access library software.  Note that this has an Intel
+# license which restricts its use.
+MAINTAINER = "NSLU2 Linux <nslu2-linux@yahoogroups.com>"
+HOMEPAGE = "http://www.intel.com/design/network/products/npfamily/ixp420.htm"
+LICENSE = "http://www.intel.com/design/network/swsup/np_sla/ixp400.htm"
+LICENSE_HOMEPAGE = "http://www.intel.com/design/network/products/npfamily/ixp425swr1.htm"
+# You must download the following software to your OpenEmbedded downloads
+# directory before using this package:
+#
+#	IPL_ixp400AccessLibrary-2_1.zip
+#	IPL_ixp400NpeLibrary-2_1.zip
+#
+# To do this go to the LICENSE_HOMEPAGE above, register/login (using a
+# web browser which is supported by the login page), this will give you
+# access to the web page from which you can download the software - you
+# need the: "Intel® IXP400 Software and RedBoot* Boot Loader" and, from
+# this the "Intel Hardware Access Software" and "NPE Microcode" (both
+# versions 2.1, encryption is not required.)
+#
+# Store the files with the names given below in your downloads directory
+# and store the 32 character md5sum of the file in a file of the same
+# name with the additional extension .md5:
+#
+#	IPL_ixp400AccessLibrary-2_1.zip.md5
+#	IPL_ixp400NpeLibrary-2_1.zip.md5
+#
+SRC_URI = "http://www.intel.com/Please-Read-The-BB-File/IPL_ixp400AccessLibrary-2_1.zip"
+SRC_URI += "http://www.intel.com/Please-Read-The-BB-File/IPL_ixp400NpeLibrary-2_1.zip"
+SRC_URI += "file://Makefile.patch;patch=1"
+SRC_URI += "file://ixethdb-header.patch;patch=1"
+SRC_URI += "file://bit-macro.patch;patch=1"
+SRC_URI += "file://ixnpemhconfigisr-is-private.patch;patch=1"
+SRC_URI += "file://le.patch;patch=1"
+
+DEPENDS = "ixp-osal"
+S = "${WORKDIR}/ixp400_xscale_sw"
+PR = "r0"
+
+COMPATIBLE_HOST = "^arm.*-linux.*"
+
+inherit module
+
+# Add the architecture compiler flags to KERNEL_CC and KERNEL_LD as
+# required.  Notice that this has to be done for each separately built
+# module as well!
+KERNEL_CC += "${TARGET_CC_KERNEL_ARCH}"
+KERNEL_LD += "${TARGET_LD_KERNEL_ARCH}"
+
+IX_TARGET = "linux${ARCH_BYTE_SEX}"
+IX_ENSURE = ""
+#IX_ENSURE = "IX_OSAL_ENSURE_ON=1"
+
+OSAL_PATH = "lib/ixp425/linux/${IX_TARGET}"
+# This is a somewhat arbitrary choice:
+OSAL_DIR = "${STAGING_KERNEL_DIR}/ixp_osal"
+
+# COMPONENTS: do not build all the components, this just creates a
+# ridiculously large module which duplicates functionality in the
+# available Linux drivers.
+COMPONENTS = "qmgr npeMh npeDl ethAcc ethDB ethMii featureCtrl osServices oslinux"
+CODELETS_COMPONENTS = ""
+
+# NOTE: IX_INCLUDE_MICROCODE causes the microcode to be included in
+# the ixp4xx-csr module, this *requires* the IPL_ixp400NpeLibrary-2_1.zip
+# to be added to the SRC_URI - see above.
+EXTRA_OEMAKE = "'AR=${AR}' \
+		'IX_XSCALE_SW=${S}' \
+		'IX_TARGET=${IX_TARGET}' \
+		'${IX_TARGET}_COMPONENTS=${COMPONENTS}' \
+		'${IX_TARGET}_CODELETS_COMPONENTS=${CODELETS_COMPONENTS}' \
+		'IX_DEVICE=ixp42X' \
+		'IX_MPHY=1' \
+		'IX_MPHYSINGLEPORT=1' \
+		'IX_INCLUDE_MICROCODE=1' \
+		${IX_ENSURE} \
+		'LINUX_SRC=${STAGING_KERNEL_DIR}' \
+		'LINUX_CROSS_COMPILE=${HOST_PREFIX}' \
+		'OSAL_DIR=${OSAL_DIR}' \
+		'OSAL_IMAGE=${OSAL_DIR}/${OSAL_PATH}/libosal.a' \
+		'OSAL_MODULE=${OSAL_DIR}/${OSAL_PATH}/ixp_osal.o' \
+		"
+
+MAKE_TARGETS = "lib/${IX_TARGET}/ixp400.o"
+
+KCONFIG_FILE = "${STAGING_KERNEL_DIR}/config-${KERNEL_VERSION}"
+do_stage () {
+	install -d ${STAGING_INCDIR}/linux/ixp4xx-csr
+	install -m 0644 src/include/*.h ${STAGING_INCDIR}/linux/ixp4xx-csr/
+	# Since Module.symvers in the kernel staging directory doesn't include
+	# the symbols from ixp400.o we need to add them to another file for
+	# the ixp400-eth build
+	rm -f '${STAGING_KERNEL_DIR}/ixp400-csr.symvers'
+	. '${KCONFIG_FILE}'
+	if '${STAGING_KERNEL_DIR}/scripts/mod/modpost' \
+		${CONFIG_MODVERSIONS:+-m} \
+		${CONFIG_MODULE_SRCVERSION_ALL:+-a} \
+		-i '${STAGING_KERNEL_DIR}/Module.symvers' \
+		-o '${STAGING_KERNEL_DIR}/ixp400-csr.symvers' \
+		${MAKE_TARGETS} >&2 | egrep .
+	then
+		echo "MODPOST errors - see above"
+		return 1
+	else
+		return 0
+	fi
+}
+
+PACKAGES = "${PN}"
+
+do_install () {
+	install -d ${D}${base_libdir}/modules/${KERNEL_VERSION}/kernel/drivers/ixp400
+	install -m 0644 lib/${IX_TARGET}/ixp400.ko ${D}${base_libdir}/modules/${KERNEL_VERSION}/kernel/drivers/ixp400/
+}