gcc 4.2.2: add more avr32 patches.

* an image compiled from scratch boots straight into X, although the avahi seggault is still there 

6 files changed, 243 insertions, 3 deletions

diff --git a/packages/gcc/gcc-4.2.2.inc b/packages/gcc/gcc-4.2.2.inc
index 5691fb647a..0f4de3cdc7 100644
--- a/packages/gcc/gcc-4.2.2.inc
+++ b/packages/gcc/gcc-4.2.2.inc
@@ -43,7 +43,9 @@ SRC_URI = "ftp://ftp.gnu.org/pub/gnu/gcc/gcc-${PV}/gcc-${PV}.tar.bz2 \
 
 SRC_URI_append_avr32 = " \
         file://gcc-4.2.2.atmel.1.0.8.patch.bz2;patch=1 \
-        file://901-avr32-no-cond-exec-before-reload-by-default.patch;patch=1 \
+	file://901-avr32-fix-no-cond-exec-before-reload.patch;patch=1 \
+	file://902-avr32-fix-sync-insn-instructions.patch;patch=1 \
+	file://903-avr32-fix-removal-of-redundant-cast-operations.patch;patch=1 \
 "
 
 
diff --git a/packages/gcc/gcc-4.2.2/901-avr32-fix-no-cond-exec-before-reload.patch b/packages/gcc/gcc-4.2.2/901-avr32-fix-no-cond-exec-before-reload.patch
new file mode 100644
index 0000000000..5d84dd82a8
--- /dev/null
+++ b/packages/gcc/gcc-4.2.2/901-avr32-fix-no-cond-exec-before-reload.patch
@@ -0,0 +1,48 @@
+Index: trunk/gcc/config/avr32/avr32.c
+===================================================================
+--- trunk/gcc/config/avr32/avr32.c	(revision 42108)
++++ trunk/gcc/config/avr32/avr32.c	(revision 42335)
+@@ -3737,7 +3737,34 @@
+   return 0;
+ }
+ 
++/* Return TRUE if X contains a MEM expression.  */
++int
++mem_mentioned_p (rtx x)
++{
++  const char *fmt;
++  int i;
+ 
++  if (MEM_P (x))
++    return 1;
++
++  fmt = GET_RTX_FORMAT (GET_CODE (x));
++  for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--)
++    {
++      if (fmt[i] == 'E')
++	{
++	  int j;
++
++	  for (j = XVECLEN (x, i) - 1; j >= 0; j--)
++	    if (mem_mentioned_p (XVECEXP (x, i, j)))
++	      return 1;
++	}
++      else if (fmt[i] == 'e' && mem_mentioned_p (XEXP (x, i)))
++	return 1;
++    }
++
++  return 0;
++}
++
+ int
+ avr32_legitimate_pic_operand_p (rtx x)
+ {
+@@ -7547,7 +7574,7 @@
+                    /* We cannot move memory loads outside of the if-then-else
+                       since the memory access should not be perfomed if the
+                       condition is not met. */
+-                   && !MEM_P (SET_SRC (op)) )
++                   && !mem_mentioned_p (SET_SRC (op)) )
+                 {
+                   rtx scratch_reg = gen_reg_rtx (mode);
+                   rtx op_pattern = copy_rtx (op);
diff --git a/packages/gcc/gcc-4.2.2/902-avr32-fix-sync-insn-instructions.patch b/packages/gcc/gcc-4.2.2/902-avr32-fix-sync-insn-instructions.patch
new file mode 100644
index 0000000000..aab1490c98
--- /dev/null
+++ b/packages/gcc/gcc-4.2.2/902-avr32-fix-sync-insn-instructions.patch
@@ -0,0 +1,174 @@
+Index: a/gcc/config/avr32/predicates.md
+===================================================================
+--- a/gcc/config/avr32/predicates.md	(revision 42108)
++++ b/gcc/config/avr32/predicates.md	(working copy)
+@@ -333,6 +333,11 @@
+                          && ((GET_CODE(XEXP(op,0)) == CONST_INT)
+                              || (GET_CODE(XEXP(op,1)) == CONST_INT))")) ))
+ 
++;; An offset k16 memory operand
++(define_predicate "avr32_ks16_memory_operand"
++  (and (match_code "mem")
++       (match_test "avr32_ks16_address_operand (XEXP (op, 0), GET_MODE (XEXP (op, 0)))")))
++
+ ;; An immediate k11 address operand
+ (define_predicate "avr32_ks11_address_operand"
+   (and (match_operand 0 "address_operand")
+Index: a/gcc/config/avr32/sync.md
+===================================================================
+--- a/gcc/config/avr32/sync.md	(revision 41409)
++++ b/gcc/config/avr32/sync.md	(working copy)
+@@ -32,9 +32,14 @@
+ (define_code_attr  atomic_insn [(plus "add") (minus "sub") (and "and") (ior "ior") (xor "xor")])
+ 
+ (define_insn "sync_loadsi"
+-  [(set (match_operand:SI 0 "register_operand" "=r")
++  ; NB! Put an early clobber on the destination operand to
++  ; avoid gcc using the same register in the source and
++  ; destination. This is done in order to avoid gcc to
++  ; clobber the source operand since these instructions
++  ; are actually inside a "loop".
++  [(set (match_operand:SI 0 "register_operand" "=&r")
+ 	(unspec_volatile:SI
+-         [(match_operand:SI 1 "memory_operand" "RKs16")
++         [(match_operand:SI 1 "avr32_ks16_memory_operand" "RKs16")
+           (label_ref (match_operand 2 "" ""))]
+          VUNSPEC_SYNC_SET_LOCK_AND_LOAD) )]
+   ""
+@@ -46,7 +51,7 @@
+   )
+   
+ (define_insn "sync_store_if_lock"
+-  [(set (match_operand:SI 0 "memory_operand" "=RKs16")
++  [(set (match_operand:SI 0 "avr32_ks16_memory_operand" "=RKs16")
+         (unspec_volatile:SI
+          [(match_operand:SI 1 "register_operand" "r")
+           (label_ref (match_operand 2 "" ""))]
+@@ -62,7 +67,7 @@
+ (define_expand "sync_<atomic_insn>si"
+   [(set (match_dup 2)
+ 	(unspec_volatile:SI
+-         [(match_operand:SI 0 "memory_operand" "")
++         [(match_operand:SI 0 "avr32_ks16_memory_operand" "")
+           (match_dup 3)]
+          VUNSPEC_SYNC_SET_LOCK_AND_LOAD))
+    (set (match_dup 2) 
+@@ -72,11 +77,33 @@
+         (unspec_volatile:SI
+          [(match_dup 2)
+           (match_dup 3)]
+-         VUNSPEC_SYNC_STORE_IF_LOCK) )]
++         VUNSPEC_SYNC_STORE_IF_LOCK) )
++   (use (match_dup 1))
++   (use (match_dup 4))]
+   ""
+   {
++   rtx *mem_expr = &operands[0];
++   rtx ptr_reg;
++   if ( !avr32_ks16_memory_operand (*mem_expr, GET_MODE (*mem_expr)) )
++    {
++      ptr_reg = force_reg (Pmode, XEXP (*mem_expr, 0));
++      XEXP (*mem_expr, 0) = ptr_reg;
++    }
++   else
++    {
++      rtx address = XEXP (*mem_expr, 0);
++      if ( REG_P (address) )
++         ptr_reg = address;
++      else if ( REG_P (XEXP (address, 0)) )
++         ptr_reg = XEXP (address, 0);
++      else
++         ptr_reg = XEXP (address, 1);
++    }
++
+    operands[2] = gen_reg_rtx (SImode);
+    operands[3] = gen_rtx_LABEL_REF(Pmode, gen_label_rtx ());
++   operands[4] = ptr_reg;
++
+   }
+   )
+ 
+@@ -85,7 +112,7 @@
+ (define_expand "sync_old_<atomic_insn>si"
+   [(set (match_operand:SI 0 "register_operand" "")
+ 	(unspec_volatile:SI
+-         [(match_operand:SI 1 "memory_operand" "")
++         [(match_operand:SI 1 "avr32_ks16_memory_operand" "")
+           (match_dup 4)]
+          VUNSPEC_SYNC_SET_LOCK_AND_LOAD))
+    (set (match_dup 3) 
+@@ -95,18 +122,39 @@
+         (unspec_volatile:SI
+          [(match_dup 3)
+           (match_dup 4)]
+-         VUNSPEC_SYNC_STORE_IF_LOCK) )]
++         VUNSPEC_SYNC_STORE_IF_LOCK) )
++   (use (match_dup 2))
++   (use (match_dup 5))]
+   ""
+   {
++   rtx *mem_expr = &operands[1];
++   rtx ptr_reg;
++   if ( !avr32_ks16_memory_operand (*mem_expr, GET_MODE (*mem_expr)) )
++    {
++      ptr_reg = force_reg (Pmode, XEXP (*mem_expr, 0));
++      XEXP (*mem_expr, 0) = ptr_reg;
++    }
++   else
++    {
++      rtx address = XEXP (*mem_expr, 0);
++      if ( REG_P (address) )
++         ptr_reg = address;
++      else if ( REG_P (XEXP (address, 0)) )
++         ptr_reg = XEXP (address, 0);
++      else
++         ptr_reg = XEXP (address, 1);
++    }
++
+    operands[3] = gen_reg_rtx (SImode);
+    operands[4] = gen_rtx_LABEL_REF(Pmode, gen_label_rtx ());
++   operands[5] = ptr_reg;
+   }
+   )
+ 
+ (define_expand "sync_new_<atomic_insn>si"
+   [(set (match_operand:SI 0 "register_operand" "")
+ 	(unspec_volatile:SI
+-         [(match_operand:SI 1 "memory_operand" "")
++         [(match_operand:SI 1 "avr32_ks16_memory_operand" "")
+           (match_dup 3)]
+          VUNSPEC_SYNC_SET_LOCK_AND_LOAD))
+    (set (match_dup 0) 
+@@ -116,10 +164,31 @@
+         (unspec_volatile:SI
+          [(match_dup 0)
+           (match_dup 3)]
+-         VUNSPEC_SYNC_STORE_IF_LOCK) )]
++         VUNSPEC_SYNC_STORE_IF_LOCK) )
++   (use (match_dup 2))
++   (use (match_dup 4))]
+   ""
+   {
++   rtx *mem_expr = &operands[1];
++   rtx ptr_reg;
++   if ( !avr32_ks16_memory_operand (*mem_expr, GET_MODE (*mem_expr)) )
++    {
++      ptr_reg = force_reg (Pmode, XEXP (*mem_expr, 0));
++      XEXP (*mem_expr, 0) = ptr_reg;
++    }
++   else
++    {
++      rtx address = XEXP (*mem_expr, 0);
++      if ( REG_P (address) )
++         ptr_reg = address;
++      else if ( REG_P (XEXP (address, 0)) )
++         ptr_reg = XEXP (address, 0);
++      else
++         ptr_reg = XEXP (address, 1);
++    }
++
+    operands[3] = gen_rtx_LABEL_REF(Pmode, gen_label_rtx ());
++   operands[4] = ptr_reg;
+   }
+   )
+ 
diff --git a/packages/gcc/gcc-4.2.2/903-avr32-fix-removal-of-redundant-cast-operations.patch b/packages/gcc/gcc-4.2.2/903-avr32-fix-removal-of-redundant-cast-operations.patch
new file mode 100644
index 0000000000..59ecbff4f5
--- /dev/null
+++ b/packages/gcc/gcc-4.2.2/903-avr32-fix-removal-of-redundant-cast-operations.patch
@@ -0,0 +1,16 @@
+Index: trunk/gcc/config/avr32/avr32.c
+===================================================================
+--- trunk/gcc/config/avr32/avr32.c	(revision 43495)
++++ trunk/gcc/config/avr32/avr32.c	(revision 43496)
+@@ -6499,6 +6499,11 @@
+ 		    break;
+ 		}
+ 
++              /* Check if we have a call and the register is used as an argument. */
++              if (CALL_P (scan)
++                  && find_reg_fusage (scan, USE, reg) )
++                break;
++
+ 	      if (!reg_mentioned_p (reg, PATTERN (scan)))
+ 		continue;
+ 
diff --git a/packages/gcc/gcc-cross_4.2.2.bb b/packages/gcc/gcc-cross_4.2.2.bb
index 816eddba19..38a69aafc3 100644
--- a/packages/gcc/gcc-cross_4.2.2.bb
+++ b/packages/gcc/gcc-cross_4.2.2.bb
@@ -1,4 +1,4 @@
-PR = "r10"
+PR = "r11"
 
 require gcc-${PV}.inc
 require gcc-cross4.inc
diff --git a/packages/gcc/gcc_4.2.2.bb b/packages/gcc/gcc_4.2.2.bb
index a2ae0c0e92..ca22e0f69c 100644
--- a/packages/gcc/gcc_4.2.2.bb
+++ b/packages/gcc/gcc_4.2.2.bb
@@ -1,4 +1,4 @@
-PR = "r8"
+PR = "r9"
 
 require gcc-${PV}.inc
 require gcc-configure-target.inc