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-rw-r--r--mtcdt/ap1-lora-0.0.dtso2
-rw-r--r--mtcdt/ap1-lora-0.2.dtso50
2 files changed, 50 insertions, 2 deletions
diff --git a/mtcdt/ap1-lora-0.0.dtso b/mtcdt/ap1-lora-0.0.dtso
index 0b6bcca..f957c62 100644
--- a/mtcdt/ap1-lora-0.0.dtso
+++ b/mtcdt/ap1-lora-0.0.dtso
@@ -7,9 +7,7 @@
/*
* Location(s):
* Put: MTCDT/0.0/lora/ap1-lora.dtbo
- * Link: MTCDT/0.2/lora/ap1-lora.dtbo
* Link: MTCDTIP/0.0/lora/ap1-lora.dtbo
- * Link: MTCDTIP/0.1/lora/ap1-lora.dtbo
*/
#include <dt-bindings/dma/at91.h>
diff --git a/mtcdt/ap1-lora-0.2.dtso b/mtcdt/ap1-lora-0.2.dtso
new file mode 100644
index 0000000..1fda8e7
--- /dev/null
+++ b/mtcdt/ap1-lora-0.2.dtso
@@ -0,0 +1,50 @@
+/*
+ * DTS overlay for MTCDT 0.2 hardware versions.
+ */
+
+/dts-v1/;
+
+/*
+ * Location(s):
+ * Put: MTCDT/0.2/lora/ap1-lora.dtbo
+ * Link: MTCDTIP/0.1/lora/ap1-lora.dtbo
+ */
+
+#include <dt-bindings/dma/at91.h>
+#include <dt-bindings/pinctrl/at91.h>
+#include <dt-bindings/interrupt-controller/irq.h>
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/clock/at91.h>
+#include <dt-bindings/gpio/mt-at91.h>
+
+/ {
+ compatible = "atmel,at91sam9g25ek", "atmel,at91sam9x5ek", "atmel,at91sam9x5", "atmel,at91sam9";
+ model = "Multi-Tech Systems MTCDT-0.0";
+ fragment@0 {
+ target-path = "/ahb/apb/spi@f0000000";
+ __overlay__ {
+ status = "okay";
+ cs-gpios = <GPIO0_PH 4 0>, <GPIO0_PH 2 0>, <GPIO0_PH 3 0>, <GPIO0_PH 28 0>;
+ ap1-spi@0 {
+ compatible = "mts,mtac";
+ spi-max-frequency = <20000000>;
+ reg = <0>;
+ };
+ ap1-spi@1 {
+ compatible = "mts,mtac";
+ spi-max-frequency = <2000000>;
+ reg = <1>;
+ };
+ ap1-spi@2 {
+ compatible = "mts,mtac";
+ spi-max-frequency = <2000000>;
+ reg = <2>;
+ };
+ ap1-din@3 {
+ compatible = "mts-io-ap1-din";
+ spi-max-frequency = <1000000>;
+ reg = <3>;
+ };
+ }; /*overlay*/
+ }; /*fragment@0*/
+};