blob: 1fda8e7efbb8e778227f55e0e4e510cb8f3b1b1f (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
|
/*
* DTS overlay for MTCDT 0.2 hardware versions.
*/
/dts-v1/;
/*
* Location(s):
* Put: MTCDT/0.2/lora/ap1-lora.dtbo
* Link: MTCDTIP/0.1/lora/ap1-lora.dtbo
*/
#include <dt-bindings/dma/at91.h>
#include <dt-bindings/pinctrl/at91.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/clock/at91.h>
#include <dt-bindings/gpio/mt-at91.h>
/ {
compatible = "atmel,at91sam9g25ek", "atmel,at91sam9x5ek", "atmel,at91sam9x5", "atmel,at91sam9";
model = "Multi-Tech Systems MTCDT-0.0";
fragment@0 {
target-path = "/ahb/apb/spi@f0000000";
__overlay__ {
status = "okay";
cs-gpios = <GPIO0_PH 4 0>, <GPIO0_PH 2 0>, <GPIO0_PH 3 0>, <GPIO0_PH 28 0>;
ap1-spi@0 {
compatible = "mts,mtac";
spi-max-frequency = <20000000>;
reg = <0>;
};
ap1-spi@1 {
compatible = "mts,mtac";
spi-max-frequency = <2000000>;
reg = <1>;
};
ap1-spi@2 {
compatible = "mts,mtac";
spi-max-frequency = <2000000>;
reg = <2>;
};
ap1-din@3 {
compatible = "mts-io-ap1-din";
spi-max-frequency = <1000000>;
reg = <3>;
};
}; /*overlay*/
}; /*fragment@0*/
};
|
