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| author | Harsh Sharma <harsh.sharma@multitech.com> | 2018-07-31 15:08:46 -0500 |
|---|---|---|
| committer | Harsh Sharma <harsh.sharma@multitech.com> | 2018-07-31 15:08:46 -0500 |
| commit | b55d02b1b9620b2bd736df88d9f987d61b52168d (patch) | |
| tree | 28eac67fbf8bb819fbcc40c49b438d9df1429b8b /libloragw/src/loragw_reg.c | |
| parent | e81839dd723cdf8218987e8f7917c12e39c179d8 (diff) | |
| download | lora_gateway_mtac_full-b55d02b1b9620b2bd736df88d9f987d61b52168d.tar.gz lora_gateway_mtac_full-b55d02b1b9620b2bd736df88d9f987d61b52168d.tar.bz2 lora_gateway_mtac_full-b55d02b1b9620b2bd736df88d9f987d61b52168d.zip | |
Added function to setup fpga attenuation and tx lut variable
Diffstat (limited to 'libloragw/src/loragw_reg.c')
| -rw-r--r-- | libloragw/src/loragw_reg.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/libloragw/src/loragw_reg.c b/libloragw/src/loragw_reg.c index 4d689da..e040942 100644 --- a/libloragw/src/loragw_reg.c +++ b/libloragw/src/loragw_reg.c @@ -511,7 +511,7 @@ bool check_fpga_version(uint8_t version) { } /* Concentrator connect */ -int lgw_connect(bool spi_only, uint32_t tx_notch_freq) { +int lgw_connect(bool spi_only, uint32_t tx_notch_freq, bool fpga_attn_used) { int spi_stat = LGW_SPI_SUCCESS; uint8_t u = 0; int x; @@ -548,7 +548,7 @@ int lgw_connect(bool spi_only, uint32_t tx_notch_freq) { lgw_spi_w(lgw_spi_target, lgw_spi_mux_mode, LGW_SPI_MUX_TARGET_FPGA, 0, 1); lgw_spi_w(lgw_spi_target, lgw_spi_mux_mode, LGW_SPI_MUX_TARGET_FPGA, 0, 0); /* FPGA configure */ - x = lgw_fpga_configure(tx_notch_freq); + x = lgw_fpga_configure(tx_notch_freq, fpga_attn_used); if (x != LGW_REG_SUCCESS) { DEBUG_MSG("ERROR CONFIGURING FPGA\n"); return LGW_REG_ERROR; |