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author | Harsh Sharma <harsh.sharma@multitech.com> | 2018-07-31 15:08:46 -0500 |
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committer | Harsh Sharma <harsh.sharma@multitech.com> | 2018-07-31 15:08:46 -0500 |
commit | b55d02b1b9620b2bd736df88d9f987d61b52168d (patch) | |
tree | 28eac67fbf8bb819fbcc40c49b438d9df1429b8b /libloragw/src/loragw_fpga.c | |
parent | e81839dd723cdf8218987e8f7917c12e39c179d8 (diff) | |
download | lora_gateway_mtac_full-b55d02b1b9620b2bd736df88d9f987d61b52168d.tar.gz lora_gateway_mtac_full-b55d02b1b9620b2bd736df88d9f987d61b52168d.tar.bz2 lora_gateway_mtac_full-b55d02b1b9620b2bd736df88d9f987d61b52168d.zip |
Added function to setup fpga attenuation and tx lut variable
Diffstat (limited to 'libloragw/src/loragw_fpga.c')
-rw-r--r-- | libloragw/src/loragw_fpga.c | 15 |
1 files changed, 14 insertions, 1 deletions
diff --git a/libloragw/src/loragw_fpga.c b/libloragw/src/loragw_fpga.c index 832152b..c2cb305 100644 --- a/libloragw/src/loragw_fpga.c +++ b/libloragw/src/loragw_fpga.c @@ -130,7 +130,7 @@ float lgw_fpga_get_tx_notch_delay(void) { /* ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ */ -int lgw_fpga_configure(uint32_t tx_notch_freq) { +int lgw_fpga_configure(uint32_t tx_notch_freq, bool fpga_attn_used) { int x; int32_t val; bool spectral_scan_support, lbt_support; @@ -175,6 +175,19 @@ int lgw_fpga_configure(uint32_t tx_notch_freq) { DEBUG_MSG("ERROR: Failed to configure FPGA polarity\n"); return LGW_REG_ERROR; } + /* Set Attenuator mode to be used or not depending on if a full card with valid conf settings are given*/ + if (fpga_version == 32) { + printf("INFO: Full Card with FPGA version %u detected\n", fpga_version); + if (fpga_attn_used == true) { + lgw_reg_w(LGW_FPGA_RF_ATTN_MODE, 0); + printf("INFO: Valid config detected. Using Attenuator mode\n"); + } else { + printf("INFO: Invalid config detected. Using Legacy mode\n"); + lgw_reg_w(LGW_FPGA_RF_ATTN_MODE, 1); + } + } else { + lgw_reg_w(LGW_FPGA_RF_ATTN_MODE, 1); + } } /* Configure TX notch filter */ |