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Diffstat (limited to 'multitech/recipes/at91bootstrap/at91bootstrap-3.5.3/mtocgd/at91bootstrap-3.5.2-mtocgd.patch')
-rw-r--r--multitech/recipes/at91bootstrap/at91bootstrap-3.5.3/mtocgd/at91bootstrap-3.5.2-mtocgd.patch64
1 files changed, 64 insertions, 0 deletions
diff --git a/multitech/recipes/at91bootstrap/at91bootstrap-3.5.3/mtocgd/at91bootstrap-3.5.2-mtocgd.patch b/multitech/recipes/at91bootstrap/at91bootstrap-3.5.3/mtocgd/at91bootstrap-3.5.2-mtocgd.patch
new file mode 100644
index 0000000..3a5075e
--- /dev/null
+++ b/multitech/recipes/at91bootstrap/at91bootstrap-3.5.3/mtocgd/at91bootstrap-3.5.2-mtocgd.patch
@@ -0,0 +1,64 @@
+Index: at91bootstrap-3.5.2/board/at91sam9x5ek/at91sam9x5eknf_uboot_defconfig
+===================================================================
+--- at91bootstrap-3.5.2.orig/board/at91sam9x5ek/at91sam9x5eknf_uboot_defconfig 2013-01-30 04:01:20.000000000 -0600
++++ at91bootstrap-3.5.2/board/at91sam9x5ek/at91sam9x5eknf_uboot_defconfig 2013-02-08 16:44:22.759998432 -0600
+@@ -42,7 +42,8 @@
+ ALLOW_PIO3=y
+ CONFIG_HAS_PIO3=y
+ CPU_HAS_PMECC=y
+-CONFIG_LOAD_ONE_WIRE=y
++# MTS: don't load one wire
++# CONFIG_LOAD_ONE_WIRE is not set
+
+ #
+ # Memory selection
+@@ -102,4 +103,5 @@
+ # CONFIG_USER_HW_INIT is not set
+ CONFIG_THUMB=y
+ CONFIG_SCLK=y
+-CONFIG_DISABLE_WATCHDOG=y
++# MTS: don't disable watchdog
++# CONFIG_DISABLE_WATCHDOG is not set
+Index: at91bootstrap-3.5.2/board/at91sam9x5ek/at91sam9x5ek.h
+===================================================================
+--- at91bootstrap-3.5.2.orig/board/at91sam9x5ek/at91sam9x5ek.h 2013-01-30 04:01:20.000000000 -0600
++++ at91bootstrap-3.5.2/board/at91sam9x5ek/at91sam9x5ek.h 2013-02-08 16:44:22.759998432 -0600
+@@ -95,7 +95,8 @@
+ #define CONFIG_SYS_NAND_CLE_PIN AT91C_PIN_PD(3)
+ #define CONFIG_SYS_NAND_ENABLE_PIN AT91C_PIN_PD(4)
+
+-#define PMECC_ERROR_CORR_BITS 2
++/* MTS: use 4-bit PMECC */
++#define PMECC_ERROR_CORR_BITS 4
+ #define PMECC_SECTOR_SIZE 512
+
+ #define CONFIG_LOOKUP_TABLE_ALPHA_OFFSET 0xC000
+Index: at91bootstrap-3.5.2/board/at91sam9x5ek/at91sam9x5ek.c
+===================================================================
+--- at91bootstrap-3.5.2.orig/board/at91sam9x5ek/at91sam9x5ek.c 2013-01-30 04:01:20.000000000 -0600
++++ at91bootstrap-3.5.2/board/at91sam9x5ek/at91sam9x5ek.c 2013-02-08 16:46:23.260086935 -0600
+@@ -268,10 +268,8 @@
+
+ reg = readl(AT91C_BASE_CCFG + CCFG_EBICSA);
+ reg |= AT91C_EBI_CS3A_SM;
+- if ((get_cm_rev() == 'A') && (get_cm_vendor() == VENDOR_EMBEST))
+- reg &= ~AT91C_EBI_NFD0_ON_D16;
+- else
+- reg |= (AT91C_EBI_DDR_MP_EN | AT91C_EBI_NFD0_ON_D16);
++ /* MTR */
++ reg |= (AT91C_EBI_DDR_MP_EN | AT91C_EBI_NFD0_ON_D16);
+
+ reg &= ~AT91C_EBI_DRV;
+ writel(reg, AT91C_BASE_CCFG + CCFG_EBICSA);
+@@ -300,10 +298,7 @@
+ | AT91_SMC_TDF_(1)),
+ AT91C_BASE_SMC + SMC_CTRL3);
+
+- /* Configure the PIO controller */
+- if ((get_cm_rev() == 'A') && (get_cm_vendor() == VENDOR_EMBEST))
+- pio_configure(nand_pins_lo);
+- else
++ /* MTR2 */
+ pio_configure(nand_pins_hi);
+
+ writel((1 << AT91C_ID_PIOC_D), (PMC_PCER + AT91C_BASE_PMC));