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author | Jason Reiss <jreiss@multitech.com> | 2017-04-21 15:08:25 -0500 |
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committer | Jason Reiss <jreiss@multitech.com> | 2017-04-21 15:08:25 -0500 |
commit | 756b541a5722c9e248dc8bef593d34cc2acbd22a (patch) | |
tree | 973d0a68c445da70705e55ebd6ad27a373a7371b /recipes-connectivity/lora/lora-gateway/lora-gateway-v28-skip-IQ-invert.patch | |
parent | a6153fbb5503cac3b93aedca526e86a218e86070 (diff) | |
download | meta-mlinux-756b541a5722c9e248dc8bef593d34cc2acbd22a.tar.gz meta-mlinux-756b541a5722c9e248dc8bef593d34cc2acbd22a.tar.bz2 meta-mlinux-756b541a5722c9e248dc8bef593d34cc2acbd22a.zip |
lora: update network server, loragw, and packet-forwarder versions
Diffstat (limited to 'recipes-connectivity/lora/lora-gateway/lora-gateway-v28-skip-IQ-invert.patch')
-rw-r--r-- | recipes-connectivity/lora/lora-gateway/lora-gateway-v28-skip-IQ-invert.patch | 24 |
1 files changed, 24 insertions, 0 deletions
diff --git a/recipes-connectivity/lora/lora-gateway/lora-gateway-v28-skip-IQ-invert.patch b/recipes-connectivity/lora/lora-gateway/lora-gateway-v28-skip-IQ-invert.patch new file mode 100644 index 0000000..25065df --- /dev/null +++ b/recipes-connectivity/lora/lora-gateway/lora-gateway-v28-skip-IQ-invert.patch @@ -0,0 +1,24 @@ +diff --git a/libloragw/src/loragw_fpga.c b/libloragw/src/loragw_fpga.c +index fa83a2a..7e667e3 100644 +--- a/libloragw/src/loragw_fpga.c ++++ b/libloragw/src/loragw_fpga.c +@@ -144,11 +144,14 @@ int lgw_fpga_configure(uint32_t tx_notch_freq) { + return LGW_REG_ERROR; + } + +- /* Required for Semtech AP2 reference design */ +- x = lgw_fpga_reg_w(LGW_FPGA_CTRL_INVERT_IQ, 1); +- if (x != LGW_REG_SUCCESS) { +- DEBUG_MSG("ERROR: Failed to configure FPGA polarity\n"); +- return LGW_REG_ERROR; ++ ++ if (read_fpga_version() > 28) { ++ /* Required for Semtech AP2 reference design and AP1.5 > v28 */ ++ x = lgw_fpga_reg_w(LGW_FPGA_CTRL_INVERT_IQ, 1); ++ if (x != LGW_REG_SUCCESS) { ++ DEBUG_MSG("ERROR: Failed to configure FPGA polarity\n"); ++ return LGW_REG_ERROR; ++ } + } + + /* Configure TX notch filter */ |