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| author | André Draszik <git@andred.net> | 2016-04-26 10:27:59 +0100 |
|---|---|---|
| committer | Richard Purdie <richard.purdie@linuxfoundation.org> | 2016-06-29 19:34:41 +0100 |
| commit | c95b89f65dc7b13c4973e3fd6cdaed331d161219 (patch) | |
| tree | 49ff9b2c17a63e7d2d0fcdf9a810ad92658bbac4 /meta | |
| parent | 0822edc390eea27f68bc257531d84959e3cc1efe (diff) | |
| download | openembedded-core-c95b89f65dc7b13c4973e3fd6cdaed331d161219.tar.gz openembedded-core-c95b89f65dc7b13c4973e3fd6cdaed331d161219.tar.bz2 openembedded-core-c95b89f65dc7b13c4973e3fd6cdaed331d161219.zip | |
feature-arm-neon.inc: restore vfpv3-d16 support
Commit 6661718 (feature-arm-{neon,vfp}.inc: refactor and fix issues)
effectively changed the gcc -mfpu= option from -mfpu=vfpv3-d16 to
-mfpu=vfpv3d16, which gcc doesn't understand.
Restore the original value.
After doing that, we also need to adjust ARMPKGSFX_FPU which should
contain the same value without dash '-' as it is used that way
throughout.
(From OE-Core rev: 972b4fc459258572eeaad8af91e48ee9f0acade7)
Signed-off-by: André Draszik <git@andred.net>
Signed-off-by: Ross Burton <ross.burton@intel.com>
Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
Signed-off-by: Armin Kuster <akuster808@gmail.com>
Diffstat (limited to 'meta')
| -rw-r--r-- | meta/conf/machine/include/arm/feature-arm-neon.inc | 2 | ||||
| -rw-r--r-- | meta/conf/machine/include/arm/feature-arm-vfp.inc | 2 |
2 files changed, 2 insertions, 2 deletions
diff --git a/meta/conf/machine/include/arm/feature-arm-neon.inc b/meta/conf/machine/include/arm/feature-arm-neon.inc index 50d917522c..b34af8e7c7 100644 --- a/meta/conf/machine/include/arm/feature-arm-neon.inc +++ b/meta/conf/machine/include/arm/feature-arm-neon.inc @@ -8,7 +8,7 @@ TUNEVALID[neon] = "Enable Neon SIMD accelerator unit." TUNE_CCARGS_MFPU .= "${@bb.utils.contains('TUNE_FEATURES', 'neon', ' neon', '', d)}" TUNEVALID[vfpv3d16] = "Enable Vector Floating Point Version 3 with 16 registers (vfpv3-d16) unit." -TUNE_CCARGS_MFPU .= "${@bb.utils.contains('TUNE_FEATURES', 'vfpv3d16', ' vfpv3d16', '', d)}" +TUNE_CCARGS_MFPU .= "${@bb.utils.contains('TUNE_FEATURES', 'vfpv3d16', ' vfpv3-d16', '', d)}" TUNEVALID[vfpv3] = "Enable Vector Floating Point Version 3 with 32 registers (vfpv3) unit." TUNE_CCARGS_MFPU .= "${@bb.utils.contains('TUNE_FEATURES', 'vfpv3', ' vfpv3', '' , d)}" diff --git a/meta/conf/machine/include/arm/feature-arm-vfp.inc b/meta/conf/machine/include/arm/feature-arm-vfp.inc index 4247255c51..bd366a19f5 100644 --- a/meta/conf/machine/include/arm/feature-arm-vfp.inc +++ b/meta/conf/machine/include/arm/feature-arm-vfp.inc @@ -6,7 +6,7 @@ TUNEVALID[vfp] = "Enable Vector Floating Point (vfp) unit." TUNE_CCARGS_MFPU .= "${@bb.utils.contains('TUNE_FEATURES', 'vfp', ' vfp', '', d)}" TUNE_CCARGS .= "${@ (' -mfpu=%s ' % d.getVar('TUNE_CCARGS_MFPU', True).split()[-1]) if (d.getVar('TUNE_CCARGS_MFPU', True) != '') else ''}" -ARMPKGSFX_FPU = "${@ ('-%s' % d.getVar('TUNE_CCARGS_MFPU', True).split()[-1]) if (d.getVar('TUNE_CCARGS_MFPU', True) != '') else ''}" +ARMPKGSFX_FPU = "${@ ('-%s' % d.getVar('TUNE_CCARGS_MFPU', True).split()[-1].replace('-', '')) if (d.getVar('TUNE_CCARGS_MFPU', True) != '') else ''}" TUNEVALID[callconvention-hard] = "Enable EABI hard float call convention, requires VFP." TUNE_CCARGS_MFLOAT = "${@ bb.utils.contains('TUNE_FEATURES', 'callconvention-hard', 'hard', 'softfp', d) if (d.getVar('TUNE_CCARGS_MFPU', True) != '') else '' }" |