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author | Khem Raj <raj.khem@gmail.com> | 2017-10-09 12:58:36 -0700 |
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committer | Richard Purdie <richard.purdie@linuxfoundation.org> | 2017-10-16 23:52:03 +0100 |
commit | 908cf4d624d54f0dc46f5f5cc1879b89e1640692 (patch) | |
tree | cd98ed502012963728f808889874fbf43ca8137a | |
parent | 094499c819722ad698ccb64ec65dd439b211c31c (diff) | |
download | openembedded-core-908cf4d624d54f0dc46f5f5cc1879b89e1640692.tar.gz openembedded-core-908cf4d624d54f0dc46f5f5cc1879b89e1640692.tar.bz2 openembedded-core-908cf4d624d54f0dc46f5f5cc1879b89e1640692.zip |
gcc: Backport fix for a segfault on riscv
seen during kernel compile
Signed-off-by: Khem Raj <raj.khem@gmail.com>
Signed-off-by: Ross Burton <ross.burton@intel.com>
-rw-r--r-- | meta/recipes-devtools/gcc/gcc-7.2.inc | 1 | ||||
-rw-r--r-- | meta/recipes-devtools/gcc/gcc-7.2/0050-RISC-V-Handle-non-legitimate-address-in-riscv_legiti.patch | 51 |
2 files changed, 52 insertions, 0 deletions
diff --git a/meta/recipes-devtools/gcc/gcc-7.2.inc b/meta/recipes-devtools/gcc/gcc-7.2.inc index 796e6b1eef..5883bc61a6 100644 --- a/meta/recipes-devtools/gcc/gcc-7.2.inc +++ b/meta/recipes-devtools/gcc/gcc-7.2.inc @@ -74,6 +74,7 @@ SRC_URI = "\ file://0047-sync-gcc-stddef.h-with-musl.patch \ file://0048-gcc-Enable-static-PIE.patch \ file://fix-segmentation-fault-precompiled-hdr.patch \ + file://0050-RISC-V-Handle-non-legitimate-address-in-riscv_legiti.patch \ ${BACKPORTS} \ " BACKPORTS = "\ diff --git a/meta/recipes-devtools/gcc/gcc-7.2/0050-RISC-V-Handle-non-legitimate-address-in-riscv_legiti.patch b/meta/recipes-devtools/gcc/gcc-7.2/0050-RISC-V-Handle-non-legitimate-address-in-riscv_legiti.patch new file mode 100644 index 0000000000..5a14d04b6f --- /dev/null +++ b/meta/recipes-devtools/gcc/gcc-7.2/0050-RISC-V-Handle-non-legitimate-address-in-riscv_legiti.patch @@ -0,0 +1,51 @@ +From 16210e6270e200cd4892a90ecef608906be3a130 Mon Sep 17 00:00:00 2001 +From: Kito Cheng <kito.cheng@gmail.com> +Date: Thu, 4 May 2017 02:11:13 +0800 +Subject: [PATCH] RISC-V: Handle non-legitimate address in + riscv_legitimize_move + +GCC may generate non-legitimate address due to we allow some +load/store with non-legitimate address in pic.md. + + 2017-05-12 Kito Cheng <kito.cheng@gmail.com> + + * config/riscv/riscv.c (riscv_legitimize_move): Handle + non-legitimate address. +--- +Upstream-Status: Backport +Signed-off-by: Khem Raj <raj.khem@gmail.com> + + gcc/ChangeLog | 5 +++++ + gcc/config/riscv/riscv.c | 16 ++++++++++++++++ + 2 files changed, 21 insertions(+) + +diff --git a/gcc/config/riscv/riscv.c b/gcc/config/riscv/riscv.c +index f7fec4bfcf8..d519be1659a 100644 +--- a/gcc/config/riscv/riscv.c ++++ b/gcc/config/riscv/riscv.c +@@ -1385,6 +1385,22 @@ riscv_legitimize_move (enum machine_mode mode, rtx dest, rtx src) + return true; + } + ++ /* RISC-V GCC may generate non-legitimate address due to we provide some ++ pattern for optimize access PIC local symbol and it's make GCC generate ++ unrecognizable instruction during optmizing. */ ++ ++ if (MEM_P (dest) && !riscv_legitimate_address_p (mode, XEXP (dest, 0), ++ reload_completed)) ++ { ++ XEXP (dest, 0) = riscv_force_address (XEXP (dest, 0), mode); ++ } ++ ++ if (MEM_P (src) && !riscv_legitimate_address_p (mode, XEXP (src, 0), ++ reload_completed)) ++ { ++ XEXP (src, 0) = riscv_force_address (XEXP (src, 0), mode); ++ } ++ + return false; + } + +-- +2.14.2 + |