linux-rp-2.6.23: Add zyonite touchscreend driver forward port

git-svn-id: https://svn.o-hand.com/repos/poky/trunk@3793 311d38ba-8fff-0310-9ca6-ca027cbcb966

3 files changed, 1603 insertions, 23 deletions

diff --git a/meta/packages/linux/linux-rp-2.6.23/zylonite_mtd-r0.patch b/meta/packages/linux/linux-rp-2.6.23/zylonite_mtd-r0.patch
index 231b3d76c9..cb5a9c5f72 100644
--- a/meta/packages/linux/linux-rp-2.6.23/zylonite_mtd-r0.patch
+++ b/meta/packages/linux/linux-rp-2.6.23/zylonite_mtd-r0.patch
@@ -4,8 +4,8 @@ Flash driver forward ported to 2.6.14
 
 Index: linux-2.6.23/drivers/mtd/nand/Kconfig
 ===================================================================
---- linux-2.6.23.orig/drivers/mtd/nand/Kconfig	2008-02-12 18:02:36.000000000 +0000
-+++ linux-2.6.23/drivers/mtd/nand/Kconfig	2008-02-12 18:03:07.000000000 +0000
+--- linux-2.6.23.orig/drivers/mtd/nand/Kconfig	2007-10-09 21:31:38.000000000 +0100
++++ linux-2.6.23/drivers/mtd/nand/Kconfig	2008-02-13 00:59:45.000000000 +0000
 @@ -223,6 +223,10 @@
  	tristate "Support for NAND Flash on Sharp SL Series (C7xx + others)"
  	depends on ARCH_PXA
@@ -19,8 +19,8 @@ Index: linux-2.6.23/drivers/mtd/nand/Kconfig
  	depends on BASLER_EXCITE
 Index: linux-2.6.23/drivers/mtd/nand/Makefile
 ===================================================================
---- linux-2.6.23.orig/drivers/mtd/nand/Makefile	2008-02-12 18:02:36.000000000 +0000
-+++ linux-2.6.23/drivers/mtd/nand/Makefile	2008-02-12 18:03:27.000000000 +0000
+--- linux-2.6.23.orig/drivers/mtd/nand/Makefile	2007-10-09 21:31:38.000000000 +0100
++++ linux-2.6.23/drivers/mtd/nand/Makefile	2008-02-13 00:59:45.000000000 +0000
 @@ -19,6 +19,7 @@
  obj-$(CONFIG_MTD_NAND_H1900)		+= h1910.o
  obj-$(CONFIG_MTD_NAND_RTC_FROM4)	+= rtc_from4.o
@@ -32,7 +32,7 @@ Index: linux-2.6.23/drivers/mtd/nand/Makefile
 Index: linux-2.6.23/drivers/mtd/nand/mhn_nand.c
 ===================================================================
 --- /dev/null	1970-01-01 00:00:00.000000000 +0000
-+++ linux-2.6.23/drivers/mtd/nand/mhn_nand.c	2008-02-12 23:54:00.000000000 +0000
++++ linux-2.6.23/drivers/mtd/nand/mhn_nand.c	2008-02-13 00:59:45.000000000 +0000
 @@ -0,0 +1,3869 @@
 +/*
 + *  drivers/mtd/nand/mhn_nand.c
@@ -3905,8 +3905,8 @@ Index: linux-2.6.23/drivers/mtd/nand/mhn_nand.c
 +
 Index: linux-2.6.23/arch/arm/mach-pxa/zylonite.c
 ===================================================================
---- linux-2.6.23.orig/arch/arm/mach-pxa/zylonite.c	2008-02-12 21:12:29.000000000 +0000
-+++ linux-2.6.23/arch/arm/mach-pxa/zylonite.c	2008-02-13 00:50:30.000000000 +0000
+--- linux-2.6.23.orig/arch/arm/mach-pxa/zylonite.c	2008-02-13 00:59:45.000000000 +0000
++++ linux-2.6.23/arch/arm/mach-pxa/zylonite.c	2008-02-13 09:11:02.000000000 +0000
 @@ -29,6 +29,8 @@
  #include "generic.h"
  
@@ -3916,7 +3916,7 @@ Index: linux-2.6.23/arch/arm/mach-pxa/zylonite.c
  int gpio_eth_irq;
  
  int lcd_id;
-@@ -54,6 +56,11 @@
+@@ -54,6 +56,16 @@
  	.resource	= smc91x_resources,
  };
  
@@ -3925,10 +3925,15 @@ Index: linux-2.6.23/arch/arm/mach-pxa/zylonite.c
 +	.id		= -1,
 +};
 +
++static struct platform_device touch_device = {
++	.name		= "pxa2xx-touch",
++	.id		= -1,
++};
++
  #if defined(CONFIG_FB_PXA) || (CONFIG_FB_PXA_MODULES)
  static void zylonite_backlight_power(int on)
  {
-@@ -96,7 +103,7 @@
+@@ -96,7 +108,7 @@
  };
  
  static struct pxafb_mode_info sharp_ls037_modes[] = {
@@ -3937,7 +3942,7 @@ Index: linux-2.6.23/arch/arm/mach-pxa/zylonite.c
  		.pixclock	= 158000,
  		.xres		= 240,
  		.yres		= 320,
-@@ -109,8 +116,8 @@
+@@ -109,8 +121,8 @@
  		.lower_margin	= 3,
  		.sync		= 0,
  	},
@@ -3948,7 +3953,7 @@ Index: linux-2.6.23/arch/arm/mach-pxa/zylonite.c
  		.xres		= 480,
  		.yres		= 640,
  		.bpp		= 16,
-@@ -137,6 +144,11 @@
+@@ -137,6 +149,11 @@
  	/* backlight GPIO: output, default on */
  	gpio_direction_output(gpio_backlight, 1);
  
@@ -3960,20 +3965,35 @@ Index: linux-2.6.23/arch/arm/mach-pxa/zylonite.c
  	if (lcd_id & 0x20) {
  		set_pxa_fb_info(&zylonite_sharp_lcd_info);
  		return;
-@@ -169,6 +181,8 @@
+@@ -169,6 +186,8 @@
  	smc91x_resources[1].start = gpio_to_irq(gpio_eth_irq);
  	smc91x_resources[1].end   = gpio_to_irq(gpio_eth_irq);
  	platform_device_register(&smc91x_device);
 +	platform_device_register(&nand_device);
-+	printk(KERN_ERR "Nand device registered\n");
++	platform_device_register(&touch_device);
  
  	zylonite_init_lcd();
  }
 Index: linux-2.6.23/arch/arm/mach-pxa/zylonite_pxa300.c
 ===================================================================
---- linux-2.6.23.orig/arch/arm/mach-pxa/zylonite_pxa300.c	2008-02-12 20:52:26.000000000 +0000
-+++ linux-2.6.23/arch/arm/mach-pxa/zylonite_pxa300.c	2008-02-13 00:26:37.000000000 +0000
-@@ -104,6 +104,30 @@
+--- linux-2.6.23.orig/arch/arm/mach-pxa/zylonite_pxa300.c	2008-02-13 00:59:45.000000000 +0000
++++ linux-2.6.23/arch/arm/mach-pxa/zylonite_pxa300.c	2008-02-13 14:01:13.000000000 +0000
+@@ -62,12 +62,12 @@
+ 	GPIO110_UART3_RXD,
+ 
+ 	/* AC97 */
+-	GPIO23_AC97_nACRESET,
++	/*GPIO23_AC97_nACRESET,
+ 	GPIO24_AC97_SYSCLK,
+ 	GPIO29_AC97_BITCLK,
+ 	GPIO25_AC97_SDATA_IN_0,
+ 	GPIO27_AC97_SDATA_OUT,
+-	GPIO28_AC97_SYNC,
++	GPIO28_AC97_SYNC,*/
+ 
+ 	/* Keypad */
+ 	GPIO107_KP_DKIN_0,
+@@ -104,6 +104,41 @@
  	/* Ethernet */
  	GPIO2_nCS3,
  	GPIO99_GPIO,
@@ -4001,10 +4021,21 @@ Index: linux-2.6.23/arch/arm/mach-pxa/zylonite_pxa300.c
 +	MFP_CFG_X(DF_IO12, AF1, DS08X, PULL_LOW),
 +	MFP_CFG_X(DF_IO13, AF1, DS08X, PULL_LOW),
 +	MFP_CFG_X(DF_IO14, AF1, DS08X, PULL_LOW),
++
++	/* AC97 */
++	MFP_CFG_X(GPIO23, AF1, DS03X, PULL_LOW),
++	MFP_CFG_X(GPIO27, AF1, DS03X, PULL_LOW),
++	MFP_CFG_X(GPIO28, AF1, DS03X, PULL_LOW),
++	MFP_CFG_X(GPIO29, AF1, DS03X, PULL_LOW),
++	MFP_CFG_X(GPIO25, AF1, DS03X, PULL_LOW),
++
++	MFP_CFG_X(GPIO26, AF0, DS01X, PULL_LOW), /* Interrupt */
++	MFP_CFG_X(GPIO24, AF0, DS03X, PULL_LOW), /*SYSCLK external */
++	MFP_CFG_X(GPIO11, AF0, DS01X, PULL_LOW),
  };
  
  static mfp_cfg_t pxa310_mfp_cfg[] __initdata = {
-@@ -163,6 +187,9 @@
+@@ -163,6 +198,9 @@
  		pxa3xx_mfp_write(lcd_detect_pins[i], mfpr_save[i]);
  }
  
@@ -4014,7 +4045,7 @@ Index: linux-2.6.23/arch/arm/mach-pxa/zylonite_pxa300.c
  void __init zylonite_pxa300_init(void)
  {
  	if (cpu_is_pxa300() || cpu_is_pxa310()) {
-@@ -174,6 +201,8 @@
+@@ -174,6 +212,8 @@
  
  		/* GPIO pin assignment */
  		gpio_backlight = mfp_to_gpio(MFP_PIN_GPIO20);
@@ -4025,8 +4056,8 @@ Index: linux-2.6.23/arch/arm/mach-pxa/zylonite_pxa300.c
  	if (cpu_is_pxa300()) {
 Index: linux-2.6.23/drivers/video/pxafb.c
 ===================================================================
---- linux-2.6.23.orig/drivers/video/pxafb.c	2008-02-13 00:05:42.000000000 +0000
-+++ linux-2.6.23/drivers/video/pxafb.c	2008-02-13 00:06:02.000000000 +0000
+--- linux-2.6.23.orig/drivers/video/pxafb.c	2008-02-13 00:59:45.000000000 +0000
++++ linux-2.6.23/drivers/video/pxafb.c	2008-02-13 00:59:45.000000000 +0000
 @@ -1543,9 +1543,9 @@
          if (inf->lccr0 & LCCR0_INVALID_CONFIG_MASK)
                  dev_warn(&dev->dev, "machine LCCR0 setting contains illegal bits: %08x\n",
@@ -4042,8 +4073,8 @@ Index: linux-2.6.23/drivers/video/pxafb.c
  	     (inf->lccr0 & LCCR0_SDS) != LCCR0_Sngl ||
 Index: linux-2.6.23/include/asm-arm/arch-pxa/mfp-pxa300.h
 ===================================================================
---- linux-2.6.23.orig/include/asm-arm/arch-pxa/mfp-pxa300.h	2008-02-13 00:44:38.000000000 +0000
-+++ linux-2.6.23/include/asm-arm/arch-pxa/mfp-pxa300.h	2008-02-13 00:49:38.000000000 +0000
+--- linux-2.6.23.orig/include/asm-arm/arch-pxa/mfp-pxa300.h	2008-02-13 00:59:45.000000000 +0000
++++ linux-2.6.23/include/asm-arm/arch-pxa/mfp-pxa300.h	2008-02-13 00:59:45.000000000 +0000
 @@ -175,13 +175,13 @@
  #define GPIO68_LCD_LDD_14	MFP_CFG_DRV(GPIO68, AF1, DS01X)
  #define GPIO69_LCD_LDD_15	MFP_CFG_DRV(GPIO69, AF1, DS01X)
diff --git a/meta/packages/linux/linux-rp-2.6.23/zylonite_touch-r0.patch b/meta/packages/linux/linux-rp-2.6.23/zylonite_touch-r0.patch
new file mode 100644
index 0000000000..1c00696051
--- /dev/null
+++ b/meta/packages/linux/linux-rp-2.6.23/zylonite_touch-r0.patch
@@ -0,0 +1,1548 @@
+Index: linux-2.6.23/drivers/input/touchscreen/Kconfig
+===================================================================
+--- linux-2.6.23.orig/drivers/input/touchscreen/Kconfig	2008-02-13 01:12:29.000000000 +0000
++++ linux-2.6.23/drivers/input/touchscreen/Kconfig	2008-02-13 01:13:20.000000000 +0000
+@@ -54,6 +54,12 @@
+ 	  To compile this driver as a module, choose M here: the
+ 	  module will be called corgi_ts.
+ 
++config TOUCHSCREEN_ZYLONITE
++	tristate "Zylonite touchscreen driver"
++	default y
++	help
++	  Say Y here for the Zylonite touchscreen driver
++
+ config TOUCHSCREEN_FUJITSU
+ 	tristate "Fujitsu serial touchscreen"
+ 	select SERIO
+Index: linux-2.6.23/drivers/input/touchscreen/Makefile
+===================================================================
+--- linux-2.6.23.orig/drivers/input/touchscreen/Makefile	2008-02-13 01:12:29.000000000 +0000
++++ linux-2.6.23/drivers/input/touchscreen/Makefile	2008-02-13 01:13:38.000000000 +0000
+@@ -19,3 +19,4 @@
+ obj-$(CONFIG_TOUCHSCREEN_TOUCHWIN)	+= touchwin.o
+ obj-$(CONFIG_TOUCHSCREEN_UCB1400)	+= ucb1400_ts.o
+ obj-$(CONFIG_TOUCHSCREEN_TSC2101)	+= tsc2101_ts.o
++obj-$(CONFIG_TOUCHSCREEN_ZYLONITE)	+= zylonite-ts.o
+Index: linux-2.6.23/drivers/input/touchscreen/zylonite-ts.c
+===================================================================
+--- /dev/null	1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.23/drivers/input/touchscreen/zylonite-ts.c	2008-02-13 16:19:15.000000000 +0000
+@@ -0,0 +1,1517 @@
++/*
++ *  drivers/input/touchscreen/mhn_audio_touch.c.
++ *
++ *  Author:	bridge.wu@marvell.com
++ *  Created:	Nov 17, 2006
++ *  Copyright:	Marvell Corporation.
++ *
++ *  This program is free software; you can redistribute it and/or modify
++ *  it under the terms of the GNU General Public License version 2 as
++ *  published by the Free Software Foundation.
++ */
++#include <linux/init.h>
++#include <linux/module.h>
++#include <linux/kernel.h>
++#include <linux/device.h>
++#include <linux/platform_device.h>
++#include <linux/interrupt.h>
++#include <linux/delay.h>
++
++#include <sound/driver.h>
++#include <sound/core.h>
++#include <sound/pcm.h>
++#include <sound/initval.h>
++
++#include <asm/semaphore.h>
++#include <asm/hardware.h>
++#include <asm/arch/pxa-regs.h>
++#include <asm/arch/gpio.h>
++#include <asm/arch/mfp.h>
++//#include <asm/arch/ipmc.h>
++#include <linux/suspend.h>
++#include <linux/spinlock.h>
++
++//#include <asm/arch/codec/acodec.h>
++//#include <asm/arch/mhn_audio_plat.h>
++
++#define OSCC               __REG(0x41350000)  /* Oscillator Configuration Register */
++#define AC97_DIV	__REG(0x41340014)
++
++#define ALSA_ZY_CARD_DEBUG
++#undef ALSA_ZY_CARD_DEBUG
++
++#define WM_9713_ID  0x4C13 /* this should be the 7E register value */
++
++#ifdef ALSA_ZY_CARD_DEBUG
++#define dbg(format, arg...) printk(KERN_DEBUG format, ##arg)
++#else
++#define dbg(format, arg...)
++#endif
++
++#define DEBUG
++#undef DEBUG
++#ifdef DEBUG
++unsigned int start_time;
++unsigned int end_time;
++unsigned int time;
++#define PRINT_TIME() do {\
++        time = ((end_time > start_time))?\
++                (end_time - start_time)*100/325:\
++                (0xffffffff - start_time + end_time)*100/325;\
++        printk("\n%s:%dus\n", __FUNCTION__, time);\
++} while(0)
++#endif
++
++
++
++
++/* 9713 specific
++ *	Register Name			Index
++ */
++#define RESET				0X00
++#define SPEAKER_VOLUME 			0X02
++#define HEADPHONE_VOLUME		0X04
++#define OUT3_OUT4_VOLUME  		0X06
++#define MONOVOL_MONOINPGA_ROUTE		0X08
++#define LINE_IN_PGA_VOL_ROUTE		0X0A
++#define DAC_PGA_VOL_ROUTE		0X0C
++#define MIC_PGA_VOLUME			0X0E
++#define MIC_ROUTING			0X10
++#define REC_PGA_VOL			0X12
++#define REC_ROUTE_MUX_SEL		0X14
++#define PCBEEP_VOL_ROUTE		0X16
++#define VXDAC_VOLUME_ROUTE		0X18
++#define AUX_DAC_VOL_ROUTE		0X1A
++#define OUTPUT_PGA_MUX			0X1C
++#define DAC_3D_CTRL_INV_MUX_SEL		0X1E
++#define DAC_TONE_CTRL			0X20
++#define MIC_BIAS			0X22
++#define OUTPUT_VOL_MAPPING_JACK		0X24
++#define POWERDOWN_CTRL_STAT		0X26
++#define EXTENDED_AUD_ID			0X28
++#define EXTENDED_AUD_STAT_CTRL  	0X2A
++#define AUDIO_DAC_RATE			0X2C
++#define AUX_DAC_RATE			0X2E
++#define AUDIO_ADC_RATE			0X32
++#define PCM_CODEC_CTRL			0X36
++#define SPDIF_CTRL			0X3A
++#define POWER_DOWN_1			0X3C
++#define POWER_DOWN_2			0X3E
++#define GENERAL_PURPOSE_WM_13		0X40
++#define FAST_POWERUP_CTRL		0X42
++#define MCLK_PLL_CTRL_1			0X44
++#define MCLK_PLL_CTRL_2			0X46
++#define GPIO_PIN_CFG			0X4C
++#define GPIO_PIN_POL_TYPE		0X4E
++#define GPIO_PIN_STICKY 		0X50
++#define GPIO_PIN_WAKEUP			0X52
++#define GPIO_PIN_STATUS			0X54
++#define GPIO_PIN_SHARING		0X56
++#define GPIO_PULL_UP_DOWN_CTRL		0X58
++#define ADD_FUNC_1         		0X5A
++#define ADD_FUNC_2        		0X5C
++#define ALC_CTRL         		0X60
++#define ALC_NOISE_GATE_CTRL		0X62
++#define AUX_DAC_INPUT_CTRL 		0X64
++#define TEST_REG_1 			0X68
++#define TEST_REG_2 			0X6A
++#define TEST_REG_3 			0X6C
++#define TEST_REG_4 			0X6E
++#define DIGITIZER_1_WM13	    	0x74
++#define DIGITIZER_2_WM13	    	0x76
++#define DIGITIZER_3_WM13	    	0x78
++#define DIGITIZER_READ_BACK	    	0x7a
++#define VENDOR_ID1	  		0x7c
++#define VENDOR_ID2	  		0x7e
++
++#define ZY_TOUCH_SAMPLE_X 1
++#define ZY_TOUCH_SAMPLE_Y 2
++
++#define ZY_EVENT_TYPE_NONE			0
++#define ZY_EVENT_TYPE_PDN			1
++
++
++typedef enum _zy_acodec_error_t {
++    ZY_ACODEC_SUCCESS = 0,    /* successful completion of a function */
++    ZY_ACODEC_GENERAL_SW_ERR, /* null pointer to registers or other software error */
++    ZY_ACODEC_CONTROLLER_INTERFACE_TIMEOUT, /* time-out for waiting for respponse */
++    ZY_ACODEC_SAMPLERATE_NOT_SUPPORTED, /* the sample rate is not supported either in controller or codec */
++    ZY_ACODEC_FEATURE_NO_SUPPORTED, /* this codec feature is not supported  */
++    ZY_ACODEC_GENERAL_HW_ERR ,/* other hardware error besides time out */
++    ZY_ACODEC_ROUTE_NO_SUPPORTED, /* the codec can not set the route required */
++    ZY_ACODEC_SLEEP /* the codec is sleep */
++} zy_acodec_error_t;
++
++typedef unsigned int zy_acodec_device_id_t;
++
++typedef enum _codec_state {
++	ZY_CODEC_SLEEP  = 0,
++	ZY_CODEC_WAKEUP = 1
++} acodec_state_t;
++
++typedef enum {
++       ZY_FM = 0,
++       ZY_MIC1 = 1,
++       ZY_MIC2 = 2,
++       ZY_SPEAKER =3,
++       ZY_HEADSET =4,
++       ZY_HANDSET =5,
++} vol_port_type_t;
++
++typedef struct _context_t {
++	int  use_count; 		/* probe/remove and suspend/resume usage count, sync among multiple devices */
++	zy_acodec_device_id_t acodec_id;/* - an ID that uniquely identifies the codec to be used */
++	unsigned long init_number; 	/* used by driver to track whether it is inited or not */
++
++	void *p_voice_reg;       	/* pointer to Monahans registers that has PCM interface to codec */
++	void *p_hifi_reg;        	/* pointer to Monahans registers that has hifi interface to codec */
++	void *p_ctrl_reg;        	/* pointer to Monahans registers that has control interface to codec */
++	int  *p_ost_regs;		/* needed for time out */
++	void *p_save_memory;        	/* pointer to a memory region to save context while suspend */
++    	void *p_zy_scenario;        	/* pointer to the scenario data structure  */
++    	long u_max_read_write_time_out_ms;/* input the max time to wait in milliseconds before giving up on a read or write operation */
++	long u_max_setup_time_out_ms;	/* input the maximum time in milliseconds to wait during initial setup of the ACODEC controller and codec */
++
++	/* member functions these pointers must be set by */
++	zy_acodec_error_t (* g_pfn_codec_specific_init)      (struct _context_t *p_device_context);
++	zy_acodec_error_t (* g_pfn_codec_specific_dinit)    (struct _context_t *p_device_context);
++	zy_acodec_error_t (* g_pfn_acodec_read)             (struct _context_t *p_dev_context, unsigned short reg_addr, unsigned short *p_reg_value);
++	zy_acodec_error_t (* g_pfn_acodec_write)            (struct _context_t *p_dev_context, unsigned short reg_addr, unsigned short reg_value);
++
++	/* add for route */
++	zy_acodec_error_t (* g_pfn_set_route)           (struct _context_t *p_device_context, unsigned short * rout_map ,unsigned short* current_map);
++	/* add for sleep the codec */
++	zy_acodec_error_t (* g_pfn_sleep_codec)           (struct _context_t *p_device_context);
++	/* add for Wake up the codec */
++	zy_acodec_error_t (* g_pfn_wake_codec)           (struct _context_t *p_device_context);
++	/* add for get codec state */
++	zy_acodec_error_t (* g_pfn_get_state)           (struct _context_t *p_device_context, acodec_state_t *p_state);
++	/* add for volume */
++	zy_acodec_error_t (* g_pfn_get_vol)(struct _context_t *p_device_context, vol_port_type_t port,  unsigned short *gain_in_db);
++	zy_acodec_error_t (* g_pfn_set_vol)(struct _context_t *p_device_context, vol_port_type_t port,  unsigned short gain_in_db);
++
++        void (* g_pfn_get_event)(struct _context_t *p_device_context, unsigned char * event_type);
++        void (* g_pfn_event_ack)(struct _context_t *p_device_context, unsigned char event_type);
++        zy_acodec_error_t (* g_pfn_enable_touch)(struct _context_t *p_device_context);
++        zy_acodec_error_t (* g_pfn_disable_touch)(struct _context_t *p_device_context);
++} zy_acocec_context_t, *p_zy_acocec_context_t;
++
++
++
++
++
++static p_zy_acocec_context_t p_zy_codec_ctxt = NULL;
++
++#include <linux/input.h>
++//#include <asm/arch/codec/wm9713.h>
++
++#define PEN_DOWN 		1
++#define PEN_UP			0
++#define TS_SAMPLE_INTERVAL 	1
++
++typedef struct {
++	struct input_dev *idev;
++	struct timer_list *timer;
++	int  use_count;
++} codec_zy_ts_t;
++
++codec_zy_ts_t codec_zy_ts;
++
++static struct input_dev *codec_zy_ts_input;
++
++#ifdef CONFIG_PM
++static volatile int touch_suspend = 0 ;
++#endif
++
++#define ZY_AC97_CODEC_REGS_NUM        0x40
++
++typedef struct
++{  //   Register symbol     // Usage
++    volatile unsigned long pocr;           // PCM Out Control Register
++    volatile unsigned long picr;           // PCM In Control Register
++    volatile unsigned long mccr;           // Mic In Control Register
++    volatile unsigned long gcr;            // Global Control Register
++    volatile unsigned long posr;           // PCM Out Status Register
++    volatile unsigned long pisr;           // PCM In Status Register
++    volatile unsigned long mcsr;           // Mic In Status Register
++    volatile unsigned long gsr;            // Global Status Register
++    volatile unsigned long car;            // CODEC Access Register
++    volatile unsigned long pcscr;          // PCM Surround Out Control
++    volatile unsigned long pcssr;          // PCM Surround Out Status
++    volatile unsigned long pcsdr;          // PCM Surround Out Data
++    volatile unsigned long pcclcr;         // PCM Center/LFE Out Control
++    volatile unsigned long pcclsr;         // PCM Center/LFE Out Status
++    volatile unsigned long pccldr;         // PCM Center/LFE Out Data
++    volatile unsigned long reserved1;       //
++    volatile unsigned long pcdr;           // PCM FIFO Data Register
++    volatile unsigned long reserved2 [0x7];      // 0x4050-0044 through 0x4050-005C
++    volatile unsigned long mcdr;           // Mic-in FIFO Data Register
++    volatile unsigned long reserved3 [0x27];   // 0x4050-0064 through 0x4050-00FC
++    volatile unsigned long mocr;           // MODEM Out Control Register
++    volatile unsigned long reserved4;
++    volatile unsigned long micr;           // MODEM In Control Register
++    volatile unsigned long reserved5;
++    volatile unsigned long mosr;           // MODEM Out Status Register
++    volatile unsigned long reserved6;
++    volatile unsigned long misr;           // MODEM In Status Register
++    volatile unsigned long reserved7 [0x9];      // 0x4050-011C through 0x4050-013C
++    volatile unsigned long modr;           // MODEM FIFO Data Register
++    volatile unsigned long reserved8 [0x2F];   // 0x4050-0144 through 0x4050-01FC
++                            // Primary Audio CODEC registers access
++    volatile unsigned long codec_regs_primary_aud   [ZY_AC97_CODEC_REGS_NUM];
++                            // Secondary ID 01 Audio CODEC registers access
++    volatile unsigned long codec_regs_secondary_aud [ZY_AC97_CODEC_REGS_NUM];
++                            // Primary MODEM CODEC registers access
++    volatile unsigned long codec_regs_primary_mdm   [ZY_AC97_CODEC_REGS_NUM];
++                            // Secondary ID 01 MODEM CODEC registers access
++    volatile unsigned long codec_regs_secondary_mdm [ZY_AC97_CODEC_REGS_NUM];
++                            // Secondary ID 10 MODEM CODEC registers access
++    volatile unsigned long codec_regs_third_mdm [ZY_AC97_CODEC_REGS_NUM];
++                            // Secondary ID 11 MODEM CODEC registers access
++    volatile unsigned long codec_regs_fouth_mdm [ZY_AC97_CODEC_REGS_NUM];
++                            // Secondary ID 10 Audio CODEC registers access
++    volatile unsigned long codec_regs_third_aud [ZY_AC97_CODEC_REGS_NUM];
++                            // Secondary ID 11 Audio CODEC registers access
++    volatile unsigned long codec_regs_fouth_aud [ZY_AC97_CODEC_REGS_NUM];
++}  zy_ac97_acodec_t, *p_zy_ac97acodec_t ;
++
++
++/* Constants for the Global Control Register and Global Status Register */
++
++// AC97 Global Control Register bit mask constants
++
++#define ZY_AC97_GCR_GIE_MSK          (1u << 0 )
++#define ZY_AC97_GCR_COLD_RESET_MSK   (1u << 1 )
++#define ZY_AC97_GCR_WARM_RESET_MSK   (1u << 2 )
++#define ZY_AC97_GCR_LINK_OFF_MSK     (1u << 3 )
++#define ZY_AC97_GCR_PCRSM_IEN_MSK    (1u << 4 )
++#define ZY_AC97_GCR_SCRSM_IEN_MSK    (1u << 5 )
++#define ZY_AC97_GCR_PCRDY_IEN_MSK    (1u << 8 )
++#define ZY_AC97_GCR_SCRDY_IEN_MSK    (1u << 9 )
++#define ZY_AC97_GCR_SDONE_IE_MSK     (1u << 18)
++#define ZY_AC97_GCR_CDONE_IE_MSK     (1u << 19)
++#define ZY_AC97_GCR_nDMAEN_MSK       (1u << 24)
++#define ZY_AC97_GCR_CLKBPB_MSK       (1u << 31)
++#define ZY_AC97_GCR_FRCRST_MSK       (1u << 30)
++// Global Status Register bit mask constants
++
++#define ZY_AC97_GSR_GSCI_MSK       (1u << 0 )
++#define ZY_AC97_GSR_MIINT_MSK      (1u << 1 )
++#define ZY_AC97_GSR_MOINT_MSK      (1u << 2 )
++#define ZY_AC97_GSR_ACOFFD_MSK     (1u << 3 )
++#define ZY_AC97_GSR_PIINT_MSK      (1u << 5 )
++#define ZY_AC97_GSR_POINT_MSK      (1u << 6 )
++#define ZY_AC97_GSR_MINT_MSK       (1u << 7 )
++#define ZY_AC97_GSR_PCRDY_MSK      (1u << 8 )
++#define ZY_AC97_GSR_SCRDY_MSK      (1u << 9 )
++#define ZY_AC97_GSR_PCRSM_MSK      (1u << 10)
++#define ZY_AC97_GSR_SCRSM_MSK      (1u << 11)
++#define ZY_AC97_GSR_SLT12_BITS_MSK (7u << 12)
++#define ZY_AC97_GSR_RCS_ERR_MSK    (1u << 15)
++#define ZY_AC97_GSR_SDONE_MSK      (1u << 18)
++#define ZY_AC97_GSR_CDONE_MSK      (1u << 19)
++
++
++// Bit mask and values for CAIP bit in car register.
++#define ZY_AC97_CAR_CAIP_MSK       (0x1<<0)
++#define ZY_AC97_CAR_CAIP_LOCKED    (0x1<<0)
++#define ZY_AC97_CAR_CAIP_CLEAR     (0<<0)
++
++/* Constants for FIFO status reporting and control */
++
++// One bit location is used to report FIFO error conditions and clear
++//  interrupts on those conditions in the various non-global status registers.
++
++// ZY_AC97_FIFOSTAT_FIFOE is used in:
++                                                // posr
++                                                // pisr
++                                                // mcsr
++                                                // mosr
++                                                // misr
++
++#define ZY_AC97_FIFOSTAT_FIFOE  (1u << 4)
++#define ZY_AC97_FIFOSTAT_EOC	  (1u << 3)
++#define ZY_AC97_FIFOSTAT_FSR	  (1u << 2)
++
++// A different bit location is used to enable or disable interrupts based on
++//  FIFO error conditions in the various non-global control registers.
++
++// ZY_AC97_FIFOCTRL_FEIE is used in:
++                                                // pocr
++                                                // picr
++                                                // mccr
++                                                // mocr
++                                                // micr
++
++#define ZY_AC97_FIFOCTRL_FEIE  (1u << 3)
++#define ZY_AC97_FIFOCTRL_FSRIE (1u << 1)
++
++/*
++*******************************************************************************
++    AC'97 Codec Registers Location and Bit Definition
++*******************************************************************************
++*/
++
++/* */
++
++    // Includes symbolic values for certain proprietary register asssignments
++    //   in AC'97 devices that might be used with ZY_AC97.
++
++    // Valid for subset of R 2.1 specification.
++    // Leading "e" in comment means it is an "expanded" register definition as
++    //  found in one or more of the Appendices A-D of the R 2.1 specification.
++    //  Appendix identifier will immediately follow the "e", such as "eA"
++    // R/O indicates read-only
++    // Registers not supported by the assumed controller will be commented out.
++
++#define    ZY_AC97_CR_RESET_ID             0x00  // RESET CODEC TO DEFAULT, get ID info
++#define    ZY_AC97_CR_MASTER_VOLUME        0x02  // LINE OUT VOLUME
++#define    ZY_AC97_CR_HEADPHONE_VOLUME     0x04  //
++#define    ZY_AC97_CR_MASTER_VOLUME_MONO   0x06  //
++#define    ZY_AC97_CR_MASTER_TONE_R_L      0x08  //
++#define    ZY_AC97_CR_PC_BEEP_VOLUME       0x0A  //
++#define    ZY_AC97_CR_PHONE_VOLUME         0x0C  //
++#define    ZY_AC97_CR_MIC_VOLUME           0x0E  //   micrOPHONE VOLUME/ AGC
++#define    ZY_AC97_CR_LINE_IN_VOLUME       0x10  //   LINE IN VOLUME
++#define    ZY_AC97_CR_CD_VOLUME            0x12  //
++#define    ZY_AC97_CR_VIDEO_VOLUME         0x14  //
++#define    ZY_AC97_CR_AUX_VOLUME           0x16  //
++#define    ZY_AC97_CR_PCM_OUT_VOLUME       0x18  //
++#define    ZY_AC97_CR_RECORD_SELECT        0x1A  //   SELECT LINE IN OR micrOPHONE
++#define    ZY_AC97_CR_RECORD_GAIN          0x1C  //
++#define    ZY_AC97_CR_RECORD_GAIN_MIC      0x1E  //
++#define    ZY_AC97_CR_GENERAL_PURPOSE      0x20  //
++#define    ZY_AC97_CR_CONTROL_3D           0x22  //
++#define    ZY_AC97_CR_POWERDOWN_CTRL_STAT  0x26  //   POWER MANAGEMENT
++#define    ZY_AC97_CR_E_AUDIO_ID           0x28  // eA Extended audio sprt info, R/O
++#define    ZY_AC97_CR_E_AUDIO_CTRL_STAT    0x2A  // eA Extended audio stat + control
++
++//
++// Audio Sample Rate Control Registers, 0x2C - 0x34
++//
++                                           // eA PCM Front DAC rate control
++#define    ZY_AC97_CR_E_ASR_PCM_FRNT_DAC_RT 0x2C  //  (output slots 3, 4, 6)
++#define    ZY_AC97_CR_E_ASR_PCM_LR_ADC_RT   0x32  // eA PCM L+R ADC rate control (3+4)
++#define    ZY_AC97_CR_E_ASR_MIC_ADC_RT      0x34  // eA PCM Mic ADC rate control (5)
++
++
++#define    ZY_AC97_CR_E_MDM_GPIO_PIN_STAT     0x54
++//
++// 5Ah-7Ah: Vendor Reserved
++//
++//
++// 7Ch-7Eh: Vendor ID registers.  Optional but standardized for Plug'n'Play
++//
++#define    ZY_AC97_CR_VENDOR_ID1         0x7C
++#define    ZY_AC97_CR_VENDOR_ID2         0x7E
++
++#define    ZY_AC97_CR_MAX               ZY_AC97_CR_VENDOR_ID2
++
++#define    ZY_AC97_CR_END_OF_LIST       (ZY_AC97_CR_MAX +  2)
++
++
++
++/* Other Constants */
++
++// For accessing the Codec mixer registers, each increment of one 32-bit word
++//  in processor space increments the addressed mixer register by two.
++// This does not cause any ambiguities because only even mixer register
++//  addresses are currently supported (AC '97 spec, R 2.2)
++#define ZY_AC97_CODEC_REGS_PER_WORD   	2
++
++/* Default timeout and holdtime settings */
++
++// timeout in reading and writing codec registers through AC link
++#define ZY_AC97_RW_TIMEOUT_DEF		200	//unit is us
++
++// timeout in waiting for codec's ready signal during setup process
++#define ZY_AC97_SETUP_TIMEOUT_DEF		500	//unit is us
++
++// timeout in waiting for locking the link successfully
++#define ZY_AC97_LOCK_TIMEOUT_DEF   		300	//unit is us
++
++// timeout in shutting down the link
++#define ZY_AC97_LINKOFF_TIMEOUT_DEF   	500	//unit is us
++
++// holdtime for keeping nReset signal active(low) in AC link
++#define ZY_AC97_COLD_HOLDTIME			100	//unit is us
++
++/*
++*******************************************************************************
++  ZY AC97 data structure used in function interface
++*******************************************************************************
++*/
++
++typedef struct
++{
++    unsigned long pocr;           // PCM Out Control Register
++    unsigned long picr;           // PCM In Control Register
++    unsigned long mccr;           // Mic In Control Register
++    unsigned long gcr;            // Global Control Register
++    unsigned long pcscr;          // PCM Surround Out Control
++    unsigned long pcclcr;         // PCM Center/LFE Out Control
++    unsigned long mocr;           // MODEM Out Control Register
++    unsigned long micr;           // MODEM In Control Register
++}zy_ac97_save_context_t;
++
++
++#define AC97_SAVE_CONTEXT_SIZE (sizeof(zy_ac97_save_context_t))
++
++static int zy_ac97_acodec_link_lock(p_zy_ac97acodec_t p_ac97_reg)
++{
++	int		status = 1;
++	volatile unsigned long	car_tmp;
++
++	car_tmp = p_ac97_reg->car;
++	if (car_tmp & ZY_AC97_CAR_CAIP_MSK)	/*  "1" in CAIP bit means lock failed. */
++	{
++		status = 0;
++	}
++	return (status);
++}
++
++
++zy_acodec_error_t zy_ac97_acodec_write (zy_acocec_context_t *p_dev_context, unsigned short offset, unsigned short data)
++{
++	zy_acodec_error_t	status = ZY_ACODEC_SUCCESS;
++	int			got_link;
++	unsigned long		time_remaining;
++	volatile unsigned long *	p_codec_reg;
++	p_zy_ac97acodec_t p_ac97_reg = (p_zy_ac97acodec_t)(p_dev_context->p_ctrl_reg);
++	unsigned long max_rw_time_out_us = (p_dev_context->u_max_read_write_time_out_ms) * 1000;
++
++
++	if(offset == ZY_AC97_CR_E_MDM_GPIO_PIN_STAT)
++	{/* it is a special register and sent out on slot 12 */
++		p_codec_reg = &(p_ac97_reg->codec_regs_primary_mdm[0]);
++		p_codec_reg += offset / ZY_AC97_CODEC_REGS_PER_WORD;
++		/*  The data will be sent out on slot 12. */
++		*p_codec_reg = (unsigned long)data;
++		goto done;
++	}
++
++	/*  Point to specified register within area mapped to target codec regs */
++	p_codec_reg = &(p_ac97_reg->codec_regs_primary_aud[0]);
++	p_codec_reg += offset / ZY_AC97_CODEC_REGS_PER_WORD;
++
++
++	/* Lock the ACLINK */
++	time_remaining = ZY_AC97_LOCK_TIMEOUT_DEF;
++	do
++	{
++		got_link = zy_ac97_acodec_link_lock(p_ac97_reg);
++		if (0 == got_link)	/*  1 usec is a long time.  Skip delay if possible. */
++		{
++			udelay(1);
++		}
++	}		/*  Wait while time remaining and ACLINK not available */
++	while (time_remaining-- && (0 == got_link));
++
++	if (0 == got_link)	/*  Didn't get the ACLINK */
++	{
++		status = ZY_ACODEC_CONTROLLER_INTERFACE_TIMEOUT;
++		printk(KERN_ERR "AC97 Write Link Timeout\n");
++	}
++	else	/*  We got the link. Perform the write operation and don't wait. */
++	{
++		/*  First, clear old write status indication CDONE by writing a ONE to that bit. */
++		p_ac97_reg->gsr = ZY_AC97_GSR_CDONE_MSK;
++
++		*p_codec_reg = (unsigned long)data;	   /*  Now the write! */
++
++		/* Wait until write cycle is complete. There should be a way
++		 * to do this speculatively at the beginning of the procedure.
++		 * Need to discover it. Too inefficient to always wait.
++		 */
++
++		time_remaining = max_rw_time_out_us;
++		do
++		{
++			udelay(1);
++		}	 /*  Wait while time remaining and command I/O still incomplete. */
++		while ( (time_remaining--) && !(p_ac97_reg->gsr & ZY_AC97_GSR_CDONE_MSK));
++		if (!(p_ac97_reg->gsr & ZY_AC97_GSR_CDONE_MSK))
++		{
++			status = ZY_ACODEC_CONTROLLER_INTERFACE_TIMEOUT;
++			p_ac97_reg->car = ZY_AC97_CAR_CAIP_CLEAR;
++		}
++	}  /*  Got AC link */
++
++done:
++	return(status);
++} /*  Ac97CtrlCodecWrite() */
++
++#define CKENA		__REG(0x4134000C)	/* A Clock Enable Register */
++#define CKENB		__REG(0x41340010)
++
++zy_acodec_error_t zy_ac97_acodec_read  (zy_acocec_context_t *p_dev_context, unsigned short offset,  unsigned short *pdata)
++{
++	zy_acodec_error_t	status = ZY_ACODEC_SUCCESS;
++	int			got_link;
++	unsigned long		time_remaining;
++	volatile unsigned long *	p_codec_reg;
++	p_zy_ac97acodec_t p_ac97_reg = (p_zy_ac97acodec_t)(p_dev_context->p_ctrl_reg);
++	unsigned long max_rw_time_out_us = (p_dev_context->u_max_read_write_time_out_ms) * 1000;
++
++	/*  Point to specified register within area mapped to target codec regs */
++	p_codec_reg = &(p_ac97_reg->codec_regs_primary_aud[0]);
++	p_codec_reg += offset / ZY_AC97_CODEC_REGS_PER_WORD;
++
++	/* Lock the ACLINK */
++	time_remaining = ZY_AC97_LOCK_TIMEOUT_DEF;
++	do
++	{
++		got_link = zy_ac97_acodec_link_lock(p_ac97_reg);
++		if (0 == got_link)	/*  1 usec is a long time.  Skip delay if possible. */
++		{
++			udelay(1);
++		}
++	}		/*  Wait while time remaining and ACLINK not available */
++	while (time_remaining-- && (0 == got_link));
++
++	if (0 == got_link)	/*  Didn't get the ACLINK */
++	{
++		status = ZY_ACODEC_CONTROLLER_INTERFACE_TIMEOUT;
++		printk(KERN_ERR "AC97 Read Link Timeout\n");
++	}
++	else	/*  We got the link. Perform the write operation and don't wait. */
++	{
++		 /*  First, clear old read status indications. */
++		p_ac97_reg->gsr = ZY_AC97_GSR_SDONE_MSK | ZY_AC97_GSR_RCS_ERR_MSK;
++
++		*pdata = (unsigned short)(*p_codec_reg); /*  This is THE DUMMY READ. */
++
++		 /*  Wait for read I/O with codec to complete before doing real read. */
++		time_remaining = max_rw_time_out_us;
++		do
++		{
++			udelay(1);
++		}   /*  Wait while time remaining and read I/O still incomplete */
++		while( (time_remaining--) && (!(p_ac97_reg->gsr & ZY_AC97_GSR_SDONE_MSK)) );
++
++		if ((p_ac97_reg->gsr & ZY_AC97_GSR_SDONE_MSK) && (!(p_ac97_reg->gsr & ZY_AC97_GSR_RCS_ERR_MSK)) )
++		{
++			if (p_ac97_reg->gsr & ZY_AC97_GSR_RCS_ERR_MSK)
++			{/* timeout indicated by RCS bit */
++				status = ZY_ACODEC_CONTROLLER_INTERFACE_TIMEOUT;
++			}
++			/*  succeed in reading. clear status bits first. */
++			p_ac97_reg->gsr = ZY_AC97_GSR_SDONE_MSK | ZY_AC97_GSR_RCS_ERR_MSK;
++			*pdata = (unsigned short)(*p_codec_reg);	/*  THE REAL READ. */
++			if (*pdata == 0xffff)
++			{/* timeout indicated by returned value */
++				status = ZY_ACODEC_CONTROLLER_INTERFACE_TIMEOUT;
++			}
++			/* check later: is second waiting really needed? */
++	 		time_remaining = max_rw_time_out_us;
++			do
++			{
++				udelay(1);
++  			}   /*  Wait while time remaining and read I/O still incomplete */
++			while( (time_remaining--) && (!(p_ac97_reg->gsr & ZY_AC97_GSR_SDONE_MSK)) );
++			//printk(KERN_ERR "AC97 Read Result %d\n", (p_ac97_reg->gsr & ZY_AC97_GSR_SDONE_MSK) );
++		}
++		else	/*  failed */
++		{
++			status = ZY_ACODEC_CONTROLLER_INTERFACE_TIMEOUT;
++			p_ac97_reg->car = ZY_AC97_CAR_CAIP_CLEAR;
++			//printk(KERN_ERR "AC97 Read Link Timeout2 %x %x %x\n", CKENA, OSCC, CKENB);
++		} /*  else  (OK to do real read) */
++
++	} /*  else  (We got the link.  Perform the read operations.) */
++
++	return (status);
++}
++
++
++
++zy_acodec_error_t zy_acodec_get_adc_sample(zy_acocec_context_t *p_device_context, unsigned short *p_sample_data, unsigned short adc_type, int *p_pen_down)
++{
++	zy_acodec_error_t	status = ZY_ACODEC_SUCCESS;
++	unsigned short value;
++	unsigned long wait;
++
++	if (adc_type == ZY_TOUCH_SAMPLE_X)
++	{
++		value = 0x202;
++	}
++	else
++	{/* Y sample */
++		value = 0x204;
++	}
++
++	status = zy_ac97_acodec_write(p_device_context, DIGITIZER_1_WM13, value);
++
++	wait = 0;
++	do
++	{
++		status = zy_ac97_acodec_read(p_device_context, DIGITIZER_1_WM13, &value);
++		if ( !(value & 0x200 ) )
++		{
++			break;
++		}
++	}while ( 100 > wait++ );
++
++	status = zy_ac97_acodec_read(p_device_context, DIGITIZER_READ_BACK, &value);
++	if (value & 0x8000)
++	{/* means pen down */
++		*p_pen_down = 1;
++	}
++	else
++	{
++		*p_pen_down = 0;
++	}
++	*p_sample_data = value & 0xfff;
++
++	return status;
++}
++
++
++
++/*
++ * add a touch event
++ */
++static int codec_zy_ts_evt_add(codec_zy_ts_t* ts, u16 pressure, u16 x, u16 y)
++{
++        /* add event and remove adc src bits */
++        static u16 pre_press = 0;
++
++        input_report_abs(ts->idev, ABS_X, x & 0xfff);
++        input_report_abs(ts->idev, ABS_Y, y & 0xfff);
++        if (pressure == pre_press){
++                pressure--;
++        }
++        pre_press = pressure;
++        input_report_abs(ts->idev, ABS_PRESSURE, pressure & 0xfff);
++	input_sync(ts->idev);<