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| author | Samuel Ortiz <sameo@openedhand.com> | 2007-09-25 10:27:46 +0000 |
|---|---|---|
| committer | Samuel Ortiz <sameo@openedhand.com> | 2007-09-25 10:27:46 +0000 |
| commit | 6c85a2a0dc13fe2aa19df73c78ef1d805be35e64 (patch) | |
| tree | 8d0e66bddeb00ea03103cf73265247e20ed7f4b8 | |
| parent | b4c4ff16989f00e9c014b2fff8e755024b3cb221 (diff) | |
| download | openembedded-core-6c85a2a0dc13fe2aa19df73c78ef1d805be35e64.tar.gz openembedded-core-6c85a2a0dc13fe2aa19df73c78ef1d805be35e64.tar.bz2 openembedded-core-6c85a2a0dc13fe2aa19df73c78ef1d805be35e64.zip | |
linux-rp: minimal zylonite kernel
We don't have a NAND driver yet, but we boot all the way up to
userspace.
git-svn-id: https://svn.o-hand.com/repos/poky/trunk@2782 311d38ba-8fff-0310-9ca6-ca027cbcb966
7 files changed, 7506 insertions, 2 deletions
diff --git a/meta/conf/machine/zylonite.conf b/meta/conf/machine/zylonite.conf index f42c8c10ba..644675e849 100644 --- a/meta/conf/machine/zylonite.conf +++ b/meta/conf/machine/zylonite.conf @@ -17,7 +17,7 @@ IMAGE_FSTYPES ?= "tar.bz2 jffs2" SERIAL_CONSOLE = "38400 ttyS0" -PREFERRED_PROVIDER_virtual/kernel = "linux-zylonite" +PREFERRED_PROVIDER_virtual/kernel = "linux-rp" PREFERRED_PROVIDER_virtual/xserver = "xserver-kdrive" XSERVER = "xserver-kdrive-fbdev" diff --git a/meta/packages/linux/linux-rp-2.6.22+2.6.23-rc4/arm_pxa_20070923.patch b/meta/packages/linux/linux-rp-2.6.22+2.6.23-rc4/arm_pxa_20070923.patch new file mode 100644 index 0000000000..1fba1a3b03 --- /dev/null +++ b/meta/packages/linux/linux-rp-2.6.22+2.6.23-rc4/arm_pxa_20070923.patch @@ -0,0 +1,5975 @@ +# Base git commit: da8f153e51290e7438ba7da66234a864e5d3e1c1 +# (Revert "x86_64: Quicklist support for x86_64") +# +# Author: eric miao (Wed Sep 12 03:13:17 BST 2007) +# Committer: Russell King (Sun Sep 23 14:18:19 BST 2007) +# +# [ARM] pxa: PXA3xx base support +# +# Signed-off-by: eric miao +# Signed-off-by: Russell King +# +# arch/arm/Kconfig | 6 +# arch/arm/boot/compressed/head-xscale.S | 4 +# arch/arm/mach-pxa/Kconfig | 30 + +# arch/arm/mach-pxa/Makefile | 9 +# arch/arm/mach-pxa/clock.c | 79 ++-- +# arch/arm/mach-pxa/clock.h | 43 ++ +# arch/arm/mach-pxa/devices.h | 3 +# arch/arm/mach-pxa/generic.c | 146 ++++--- +# arch/arm/mach-pxa/generic.h | 26 + +# arch/arm/mach-pxa/irq.c | 80 ---- +# arch/arm/mach-pxa/mfp.c | 235 ++++++++++++ +# arch/arm/mach-pxa/pxa25x.c | 90 ++++ +# arch/arm/mach-pxa/pxa27x.c | 127 ++++++ +# arch/arm/mach-pxa/pxa300.c | 93 +++++ +# arch/arm/mach-pxa/pxa320.c | 88 ++++ +# arch/arm/mach-pxa/pxa3xx.c | 216 +++++++++++ +# arch/arm/mach-pxa/time.c | 53 ++ +# arch/arm/mach-pxa/zylonite.c | 184 +++++++++ +# arch/arm/mach-pxa/zylonite_pxa300.c | 188 ++++++++++ +# arch/arm/mach-pxa/zylonite_pxa320.c | 173 +++++++++ +# arch/arm/mm/Kconfig | 4 +# drivers/i2c/busses/i2c-pxa.c | 45 +- +# drivers/input/keyboard/pxa27x_keyboard.c | 25 + +# drivers/mmc/host/pxamci.c | 43 +- +# drivers/mmc/host/pxamci.h | 14 +# drivers/mtd/maps/lubbock-flash.c | 9 +# drivers/mtd/maps/mainstone-flash.c | 5 +# drivers/net/irda/pxaficp_ir.c | 51 ++ +# drivers/net/smc91x.c | 62 --- +# drivers/net/smc91x.h | 71 +++ +# drivers/serial/pxa.c | 163 ++++---- +# drivers/serial/serial_core.c | 18 +# drivers/usb/gadget/pxa2xx_udc.c | 68 ++- +# drivers/usb/gadget/pxa2xx_udc.h | 1 +# drivers/video/pxafb.c | 36 + +# drivers/video/pxafb.h | 1 +# include/asm-arm/arch-pxa/hardware.h | 72 +++ +# include/asm-arm/arch-pxa/irqs.h | 6 +# include/asm-arm/arch-pxa/mfp-pxa300.h | 574 ++++++++++++++++++++++++++++++ +# include/asm-arm/arch-pxa/mfp-pxa320.h | 446 ++++++++++++++++++++++++ +# include/asm-arm/arch-pxa/mfp.h | 576 +++++++++++++++++++++++++++++++ +# include/asm-arm/arch-pxa/pxa-regs.h | 2 +# include/asm-arm/arch-pxa/pxa3xx-regs.h | 75 ++++ +# include/asm-arm/arch-pxa/timex.h | 2 +# include/asm-arm/arch-pxa/zylonite.h | 35 + +# 45 files changed, 3825 insertions(+), 452 deletions(-) +# create mode 100644 arch/arm/mach-pxa/mfp.c +# create mode 100644 arch/arm/mach-pxa/pxa300.c +# create mode 100644 arch/arm/mach-pxa/pxa320.c +# create mode 100644 arch/arm/mach-pxa/pxa3xx.c +# create mode 100644 arch/arm/mach-pxa/zylonite.c +# create mode 100644 arch/arm/mach-pxa/zylonite_pxa300.c +# create mode 100644 arch/arm/mach-pxa/zylonite_pxa320.c +# create mode 100644 include/asm-arm/arch-pxa/mfp-pxa300.h +# create mode 100644 include/asm-arm/arch-pxa/mfp-pxa320.h +# create mode 100644 include/asm-arm/arch-pxa/mfp.h +# create mode 100644 include/asm-arm/arch-pxa/pxa3xx-regs.h +# create mode 100644 include/asm-arm/arch-pxa/zylonite.h +# +# Author: Russell King (Sat Sep 1 21:27:18 BST 2007) +# Committer: Russell King (Sun Sep 23 14:18:17 BST 2007) +# +# [NET] smc91x: fix PXA DMA support code +# +# The PXA DMA support code for smc91x doesn't pass a struct device to +# the dma_*map_single() functions, which leads to an oops in the dma +# bounce code. We have a struct device which was used to probe the +# SMC chip. Use it. +# +# (This patch is slightly larger because it requires struct smc_local +# to move into the header file.) +# +# Signed-off-by: Russell King +# +# +# Author: Russell King (Sat Sep 1 21:25:09 BST 2007) +# Committer: Russell King (Sun Sep 23 14:18:12 BST 2007) +# +# [SERIAL] Fix console initialisation ordering +# +# Ensure pm callback is called upon initialisation to place port in +# correct power saving state. Ensure console is initialised prior +# to deciding whether to power down the port. +# +# Signed-off-by: Russell King +# +# +# Author: Russell King (Wed Sep 19 09:21:51 BST 2007) +# Committer: Russell King (Sun Sep 23 14:18:07 BST 2007) +# +# [ARM] pxa: tidy up arch/arm/mach-pxa/Makefile +# +# Signed-off-by: Russell King +# +# +# Author: Russell King (Sat Sep 1 21:28:55 BST 2007) +# Committer: Russell King (Sun Sep 23 14:18:03 BST 2007) +# +# [ARM] lubbock, mainstone: only initialise if running on that platform +# +# Signed-off-by: Russell King +# +# +# Author: eric miao (Wed Aug 29 10:22:17 BST 2007) +# Committer: Russell King (Sun Sep 23 14:18:01 BST 2007) +# +# [ARM] 4560/1: pxa: move processor specific set_wake logic out of irq.c +# +# a function pxa_init_irq_set_wake() was introduced, so that +# processor specific code could install their own version +# +# code setting PFER and PRER registers within pxa_gpio_irq_type +# are removed, and the edge configuration is postponed to the +# (*set_wake) and copies the GRER and GFER register, which will +# always be set up correctly by pxa_gpio_irq_type() +# +# Signed-off-by: eric miao +# Signed-off-by: Russell King +# +# +# Author: eric miao (Wed Aug 29 10:18:47 BST 2007) +# Committer: Russell King (Sun Sep 23 14:17:59 BST 2007) +# +# [ARM] 4559/1: pxa: make PXA_LAST_GPIO a run-time variable +# +# This definition produces processor specific code in generic function +# pxa_gpio_mode(), thus creating inconsistencies for support of pxa25x +# and pxa27x in a single zImage. +# +# As David Brownell suggests, make it a run-time variable and initialize +# at run-time according to the number of GPIOs on the processor. For now +# the initialization happens in pxa_init_irq_gpio(), since there is +# already a parameter for that, besides, this is and MUST be earlier +# than any subsequent calls to pxa_gpio_mode(). +# +# Signed-off-by: eric miao +# Signed-off-by: Russell King +# +# +# Author: eric miao (Wed Aug 29 10:15:41 BST 2007) +# Committer: Russell King (Sun Sep 23 14:17:57 BST 2007) +# +# [ARM] 4558/1: pxa: remove MACH_TYPE_LUBBOCK assignment and leave it to boot loader +# +# since both u-boot and blob support passing MACH_TYPE_LUBBOCK to the +# kernel, it should be quite safe to remove this +# +# Signed-off-by: eric miao +# Acked-by: Nicolas Pitre +# Signed-off-by: Russell King +# +# +# Author: eric miao (Wed Sep 12 03:13:17 BST 2007) +# Committer: Russell King (Sun Sep 23 14:17:55 BST 2007) +# +# [ARM] pxa: add PXA3 cpu_is_xxx() macros +# +# Extracted from patch by Eric Miao, this adds the cpu_is_xxx() macros +# for identifying PXA3 SoCs. +# +# Signed-off-by: eric miao +# Signed-off-by: Russell King +# +# +# Author: Russell King (Wed Sep 19 09:38:32 BST 2007) +# Committer: Russell King (Sun Sep 23 14:17:51 BST 2007) +# +# [ARM] pxa: Make CPU_XSCALE depend on PXA25x or PXA27x +# +# PXA3 SoCs are supported by the Xscale3 CPU code rather than the +# Xscale CPU code. +# +# Signed-off-by: Russell King +# +# +# Author: Russell King (Wed Sep 19 09:33:55 BST 2007) +# Committer: Russell King (Sun Sep 23 14:17:48 BST 2007) +# +# [ARM] pxa: mark pxa_set_cken deprecated +# +# Allow the generic clock support code to fiddle with the CKEN register +# and mark pxa_set_cken() deprecated. +# +# Signed-off-by: Russell King +# +# +# Author: Russell King (Mon Aug 20 10:34:37 BST 2007) +# Committer: Russell King (Sun Sep 23 14:17:43 BST 2007) +# +# [ARM] pxa: remove get_lcdclk_frequency_10khz() +# +# get_lcdclk_frequency_10khz() is now redundant, remove it. Hide +# pxa27x_get_lcdclk_frequency_10khz() from public view. +# +# Signed-off-by: Russell King +# +# +# Author: Russell King (Sun Sep 2 17:09:23 BST 2007) +# Committer: Russell King (Sun Sep 23 14:17:39 BST 2007) +# +# [ARM] pxa: update pxa irda driver to use clk support +# +# Signed-off-by: Russell King +# +# +# Author: Russell King (Sun Sep 2 17:08:42 BST 2007) +# Committer: Russell King (Sun Sep 23 14:17:36 BST 2007) +# +# [ARM] pxa: Make STUART and FICP clocks available +# +# Signed-off-by: Russell King +# +# +# Author: Russell King (Mon Aug 20 10:33:35 BST 2007) +# Committer: Russell King (Sun Sep 23 14:17:34 BST 2007) +# +# [ARM] pxa: update PXA UDC driver to use clk support +# +# Note: this produces a WARN() dump. +# +# Signed-off-by: Russell King +# +# +# Author: Russell King (Mon Aug 20 10:28:15 BST 2007) +# Committer: Russell King (Sun Sep 23 14:17:31 BST 2007) +# +# [ARM] pxa: update pxa serial driver to use clk support +# +# Signed-off-by: Russell King +# +# +# Author: Russell King (Mon Aug 20 10:20:03 BST 2007) +# Committer: Russell King (Sun Sep 23 14:17:27 BST 2007) +# +# [ARM] pxa: update PXA MMC interface driver to use clk support +# +# Signed-off-by: Russell King +# +# +# Author: Russell King (Mon Aug 20 10:19:39 BST 2007) +# Committer: Russell King (Sun Sep 23 14:17:23 BST 2007) +# +# [ARM] pxa: update pxa27x keypad driver to use clk support +# +# Signed-off-by: Russell King +# +# +# Author: Russell King (Mon Aug 20 10:19:10 BST 2007) +# Committer: Russell King (Sun Sep 23 14:17:19 BST 2007) +# +# [ARM] pxa: update pxa i2c driver to use clk support +# +# Signed-off-by: Russell King +# +# +# Author: Russell King (Mon Aug 20 10:18:42 BST 2007) +# Committer: Russell King (Sun Sep 23 14:16:50 BST 2007) +# +# [ARM] pxa: update pxafb to use clk support +# +# Signed-off-by: Russell King +# +# +# Author: Russell King (Mon Aug 20 10:18:02 BST 2007) +# Committer: Russell King (Sat Sep 22 20:48:09 BST 2007) +# +# [ARM] pxa: introduce clk support for PXA SoC clocks +# +# Signed-off-by: Russell King +# +# create mode 100644 arch/arm/mach-pxa/clock.h +# +# Author: Russell King (Mon Aug 20 10:09:18 BST 2007) +# Committer: Russell King (Sat Sep 22 20:48:09 BST 2007) +# +# [ARM] pxa: make pxa27x devices globally visible +# +# Signed-off-by: Russell King +# +# +# Author: Russell King (Mon Aug 20 10:07:44 BST 2007) +# Committer: Russell King (Sat Sep 22 20:48:08 BST 2007) +# +# [ARM] pxa: fix naming of memory/lcd/core clock functions +# +# Rename pxa25x and pxa27x memory/lcd/core clock functions, and +# select the correct version at run time. +# +# Signed-off-by: Russell King +# +# +# Author: Russell King (Mon Aug 20 09:47:41 BST 2007) +# Committer: Russell King (Sat Sep 22 20:48:08 BST 2007) +# +# [ARM] pxa: convert PXA serial drivers to use platform resources +# +# Signed-off-by: Russell King +# +# +# Author: Russell King (Sat Sep 1 21:12:50 BST 2007) +# Committer: Russell King (Sat Sep 22 20:48:07 BST 2007) +# +# [ARM] pxa: make pxa timer initialisation select clock rate at runtime +# +# Rather than using the compile-time constant CLOCK_TICK_RATE, select +# the clock tick rate at run time. We organise the selection so that +# PXA3 automatically falls out with the right tick rate. +# +# Signed-off-by: Russell King +# +# +# Author: Nicolas Pitre (Fri Aug 17 16:55:22 BST 2007) +# Committer: Russell King (Sat Sep 22 20:48:05 BST 2007) +# +# [ARM] 4550/1: sched_clock on PXA should cope with run time clock rate selection +# +# The previous implementation was relying on compile time optimizations +# based on a constant clock rate. However, support for different PXA +# flavors in the same kernel binary requires that the clock be selected at +# run time, so here it is. +# +# Let's move this code to a more appropriate location while at it. +# +# Signed-off-by: Nicolas Pitre +# Signed-off-by: Russell King +# +# +Index: linux-2.6.22/arch/arm/Kconfig +=================================================================== +--- linux-2.6.22.orig/arch/arm/Kconfig 2007-09-24 20:57:20.000000000 +0200 ++++ linux-2.6.22/arch/arm/Kconfig 2007-09-24 20:57:20.000000000 +0200 +@@ -336,14 +336,14 @@ + This enables support for Philips PNX4008 mobile platform. + + config ARCH_PXA +- bool "PXA2xx-based" ++ bool "PXA2xx/PXA3xx-based" + depends on MMU + select ARCH_MTD_XIP + select GENERIC_GPIO + select GENERIC_TIME + select GENERIC_CLOCKEVENTS + help +- Support for Intel's PXA2XX processor line. ++ Support for Intel/Marvell's PXA2xx/PXA3xx processor line. + + config ARCH_RPC + bool "RiscPC" +@@ -486,7 +486,7 @@ + config IWMMXT + bool "Enable iWMMXt support" + depends on CPU_XSCALE || CPU_XSC3 +- default y if PXA27x ++ default y if PXA27x || PXA3xx + help + Enable support for iWMMXt context switching at run time if + running on a CPU that supports it. +Index: linux-2.6.22/arch/arm/boot/compressed/head-xscale.S +=================================================================== +--- linux-2.6.22.orig/arch/arm/boot/compressed/head-xscale.S 2007-09-24 20:56:50.000000000 +0200 ++++ linux-2.6.22/arch/arm/boot/compressed/head-xscale.S 2007-09-24 21:03:05.000000000 +0200 +@@ -33,10 +33,6 @@ + bic r0, r0, #0x1000 @ clear Icache + mcr p15, 0, r0, c1, c0, 0 + +-#ifdef CONFIG_ARCH_LUBBOCK +- mov r7, #MACH_TYPE_LUBBOCK +-#endif +- + #ifdef CONFIG_ARCH_COTULLA_IDP + mov r7, #MACH_TYPE_COTULLA_IDP + #endif +Index: linux-2.6.22/arch/arm/mach-pxa/Kconfig +=================================================================== +--- linux-2.6.22.orig/arch/arm/mach-pxa/Kconfig 2007-09-24 20:57:20.000000000 +0200 ++++ linux-2.6.22/arch/arm/mach-pxa/Kconfig 2007-09-24 20:57:20.000000000 +0200 +@@ -1,6 +1,24 @@ + if ARCH_PXA + +-menu "Intel PXA2xx Implementations" ++menu "Intel PXA2xx/PXA3xx Implementations" ++ ++if PXA3xx ++ ++menu "Supported PXA3xx Processor Variants" ++ ++config CPU_PXA300 ++ bool "PXA300 (codename Monahans-L)" ++ ++config CPU_PXA310 ++ bool "PXA310 (codename Monahans-LV)" ++ select CPU_PXA300 ++ ++config CPU_PXA320 ++ bool "PXA320 (codename Monahans-P)" ++ ++endmenu ++ ++endif + + choice + prompt "Select target board" +@@ -41,6 +59,11 @@ + bool "CompuLab EM-x270 platform" + select PXA27x + ++ ++config MACH_ZYLONITE ++ bool "PXA3xx Development Platform" ++ select PXA3xx ++ + config MACH_HX2750 + bool "HP iPAQ hx2750" + select PXA27x +@@ -228,6 +251,11 @@ + help + Select code specific to PXA27x variants + ++config PXA3xx ++ bool ++ help ++ Select code specific to PXA3xx variants ++ + config PXA_SHARP_C7xx + bool + select PXA_SSP +Index: linux-2.6.22/arch/arm/mach-pxa/Makefile +=================================================================== +--- linux-2.6.22.orig/arch/arm/mach-pxa/Makefile 2007-09-24 20:57:20.000000000 +0200 ++++ linux-2.6.22/arch/arm/mach-pxa/Makefile 2007-09-24 21:03:57.000000000 +0200 +@@ -6,6 +6,9 @@ + obj-y += clock.o generic.o irq.o dma.o time.o + obj-$(CONFIG_PXA25x) += pxa25x.o + obj-$(CONFIG_PXA27x) += pxa27x.o ++obj-$(CONFIG_PXA3xx) += pxa3xx.o mfp.o ++obj-$(CONFIG_CPU_PXA300) += pxa300.o ++obj-$(CONFIG_CPU_PXA320) += pxa320.o + + # Specific board support + obj-$(CONFIG_ARCH_LUBBOCK) += lubbock.o +@@ -19,6 +22,12 @@ + obj-$(CONFIG_MACH_POODLE) += poodle.o corgi_ssp.o sharpsl_pm.o poodle_pm.o + obj-$(CONFIG_MACH_TOSA) += tosa.o + obj-$(CONFIG_MACH_EM_X270) += em-x270.o ++ifeq ($(CONFIG_MACH_ZYLONITE),y) ++ obj-y += zylonite.o ++ obj-$(CONFIG_CPU_PXA300) += zylonite_pxa300.o ++ obj-$(CONFIG_CPU_PXA320) += zylonite_pxa320.o ++endif ++ + obj-$(CONFIG_MACH_HX2750) += hx2750.o hx2750_test.o + obj-$(CONFIG_MACH_HTCUNIVERSAL) += htcuniversal/ + +Index: linux-2.6.22/arch/arm/mach-pxa/clock.c +=================================================================== +--- linux-2.6.22.orig/arch/arm/mach-pxa/clock.c 2007-09-24 20:56:51.000000000 +0200 ++++ linux-2.6.22/arch/arm/mach-pxa/clock.c 2007-09-24 20:57:20.000000000 +0200 +@@ -9,19 +9,15 @@ + #include <linux/string.h> + #include <linux/clk.h> + #include <linux/spinlock.h> ++#include <linux/platform_device.h> ++#include <linux/delay.h> + + #include <asm/arch/pxa-regs.h> + #include <asm/hardware.h> + +-struct clk { +- struct list_head node; +- unsigned long rate; +- struct module *owner; +- const char *name; +- unsigned int enabled; +- void (*enable)(void); +- void (*disable)(void); +-}; ++#include "devices.h" ++#include "generic.h" ++#include "clock.h" + + static LIST_HEAD(clocks); + static DEFINE_MUTEX(clocks_mutex); +@@ -33,7 +29,8 @@ + + mutex_lock(&clocks_mutex); + list_for_each_entry(p, &clocks, node) { +- if (strcmp(id, p->name) == 0 && try_module_get(p->owner)) { ++ if (strcmp(id, p->name) == 0 && ++ (p->dev == NULL || p->dev == dev)) { + clk = p; + break; + } +@@ -46,7 +43,6 @@ + + void clk_put(struct clk *clk) + { +- module_put(clk->owner); + } + EXPORT_SYMBOL(clk_put); + +@@ -56,8 +52,12 @@ + + spin_lock_irqsave(&clocks_lock, flags); + if (clk->enabled++ == 0) +- clk->enable(); ++ clk->ops->enable(clk); + spin_unlock_irqrestore(&clocks_lock, flags); ++ ++ if (clk->delay) ++ udelay(clk->delay); ++ + return 0; + } + EXPORT_SYMBOL(clk_enable); +@@ -70,54 +70,75 @@ + + spin_lock_irqsave(&clocks_lock, flags); + if (--clk->enabled == 0) +- clk->disable(); ++ clk->ops->disable(clk); + spin_unlock_irqrestore(&clocks_lock, flags); + } + EXPORT_SYMBOL(clk_disable); + + unsigned long clk_get_rate(struct clk *clk) + { +- return clk->rate; ++ unsigned long rate; ++ ++ rate = clk->rate; ++ if (clk->ops->getrate) ++ rate = clk->ops->getrate(clk); ++ ++ return rate; + } + EXPORT_SYMBOL(clk_get_rate); + + +-static void clk_gpio27_enable(void) ++static void clk_gpio27_enable(struct clk *clk) + { + pxa_gpio_mode(GPIO11_3_6MHz_MD); + } + +-static void clk_gpio27_disable(void) ++static void clk_gpio27_disable(struct clk *clk) + { + } + +-static struct clk clk_gpio27 = { +- .name = "GPIO27_CLK", +- .rate = 3686400, ++static const struct clkops clk_gpio27_ops = { + .enable = clk_gpio27_enable, + .disable = clk_gpio27_disable, + }; + +-int clk_register(struct clk *clk) ++ ++void clk_cken_enable(struct clk *clk) + { +- mutex_lock(&clocks_mutex); +- list_add(&clk->node, &clocks); +- mutex_unlock(&clocks_mutex); +- return 0; ++ CKEN |= 1 << clk->cken; + } +-EXPORT_SYMBOL(clk_register); + +-void clk_unregister(struct clk *clk) ++void clk_cken_disable(struct clk *clk) + { ++ CKEN &= ~(1 << clk->cken); ++} ++ ++const struct clkops clk_cken_ops = { ++ .enable = clk_cken_enable, ++ .disable = clk_cken_disable, ++}; ++ ++static struct clk common_clks[] = { ++ { ++ .name = "GPIO27_CLK", ++ .ops = &clk_gpio27_ops, ++ .rate = 3686400, ++ }, ++}; ++ ++void clks_register(struct clk *clks, size_t num) ++{ ++ int i; ++ + mutex_lock(&clocks_mutex); +- list_del(&clk->node); ++ for (i = 0; i < num; i++) ++ list_add(&clks[i].node, &clocks); + mutex_unlock(&clocks_mutex); + } +-EXPORT_SYMBOL(clk_unregister); + + static int __init clk_init(void) + { +- clk_register(&clk_gpio27); ++ clks_register(common_clks, ARRAY_SIZE(common_clks)); + return 0; + } + arch_initcall(clk_init); +Index: linux-2.6.22/arch/arm/mach-pxa/clock.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-2.6.22/arch/arm/mach-pxa/clock.h 2007-09-24 20:57:20.000000000 +0200 +@@ -0,0 +1,43 @@ ++struct clk; ++ ++struct clkops { ++ void (*enable)(struct clk *); ++ void (*disable)(struct clk *); ++ unsigned long (*getrate)(struct clk *); ++}; ++ ++struct clk { ++ struct list_head node; ++ const char *name; ++ struct device *dev; ++ const struct clkops *ops; ++ unsigned long rate; ++ unsigned int cken; ++ unsigned int delay; ++ unsigned int enabled; ++}; ++ ++#define INIT_CKEN(_name, _cken, _rate, _delay, _dev) \ ++ { \ ++ .name = _name, \ ++ .dev = _dev, \ ++ .ops = &clk_cken_ops, \ ++ .rate = _rate, \ ++ .cken = CKEN_##_cken, \ ++ .delay = _delay, \ ++ } ++ ++#define INIT_CK(_name, _cken, _ops, _dev) \ ++ { \ ++ .name = _name, \ ++ .dev = _dev, \ ++ .ops = _ops, \ ++ .cken = CKEN_##_cken, \ ++ } ++ ++extern const struct clkops clk_cken_ops; ++ ++void clk_cken_enable(struct clk *clk); ++void clk_cken_disable(struct clk *clk); ++ ++void clks_register(struct clk *clks, size_t num); +Index: linux-2.6.22/arch/arm/mach-pxa/devices.h +=================================================================== +--- linux-2.6.22.orig/arch/arm/mach-pxa/devices.h 2007-09-24 20:56:51.000000000 +0200 ++++ linux-2.6.22/arch/arm/mach-pxa/devices.h 2007-09-24 20:57:20.000000000 +0200 +@@ -9,3 +9,6 @@ + extern struct platform_device pxa_device_i2s; + extern struct platform_device pxa_device_ficp; + extern struct platform_device pxa_device_rtc; ++ ++extern struct platform_device pxa27x_device_i2c_power; ++extern struct platform_device pxa27x_device_ohci; +Index: linux-2.6.22/arch/arm/mach-pxa/generic.c +=================================================================== +--- linux-2.6.22.orig/arch/arm/mach-pxa/generic.c 2007-09-24 20:57:20.000000000 +0200 ++++ linux-2.6.22/arch/arm/mach-pxa/generic.c 2007-09-24 20:57:20.000000000 +0200 +@@ -25,10 +25,6 @@ + #include <linux/pm.h> + #include <linux/string.h> + +-#include <linux/sched.h> +-#include <asm/cnt32_to_63.h> +-#include <asm/div64.h> +- + #include <asm/hardware.h> + #include <asm/irq.h> + #include <asm/system.h> +@@ -48,66 +44,39 @@ + #include "generic.h" + + /* +- * This is the PXA2xx sched_clock implementation. This has a resolution +- * of at least 308ns and a maximum value that depends on the value of +- * CLOCK_TICK_RATE. +- * +- * The return value is guaranteed to be monotonic in that range as +- * long as there is always less than 582 seconds between successive +- * calls to this function. ++ * Get the clock frequency as reflected by CCCR and the turbo flag. ++ * We assume these values have been applied via a fcs. ++ * If info is not 0 we also display the current settings. + */ +-unsigned long long sched_clock(void) ++unsigned int get_clk_frequency_khz(int info) + { +- unsigned long long v = cnt32_to_63(OSCR); +- /* Note: top bit ov v needs cleared unless multiplier is even. */ +- +-#if CLOCK_TICK_RATE == 3686400 +- /* 1E9 / 3686400 => 78125 / 288, max value = 32025597s (370 days). */ +- /* The <<1 is used to get rid of tick.hi top bit */ +- v *= 78125<<1; +- do_div(v, 288<<1); +-#elif CLOCK_TICK_RATE == 3250000 +- /* 1E9 / 3250000 => 4000 / 13, max value = 709490156s (8211 days) */ +- v *= 4000; +- do_div(v, 13); +-#elif CLOCK_TICK_RATE == 3249600 +- /* 1E9 / 3249600 => 625000 / 2031, max value = 4541295s (52 days) */ +- v *= 625000; +- do_div(v, 2031); +-#else +-#warning "consider fixing sched_clock for your value of CLOCK_TICK_RATE" +- /* +- * 96-bit math to perform tick * NSEC_PER_SEC / CLOCK_TICK_RATE for +- * any value of CLOCK_TICK_RATE. Max value is in the 80 thousand +- * years range and truncation to unsigned long long limits it to +- * sched_clock's max range of ~584 years. This is nice but with +- * higher computation cost. +- */ +- { +- union { +- unsigned long long val; +- struct { unsigned long lo, hi; }; +- } x; +- unsigned long long y; +- +- x.val = v; +- x.hi &= 0x7fffffff; +- y = (unsigned long long)x.lo * NSEC_PER_SEC; +- x.lo = y; +- y = (y >> 32) + (unsigned long long)x.hi * NSEC_PER_SEC; +- x.hi = do_div(y, CLOCK_TICK_RATE); +- do_div(x.val, CLOCK_TICK_RATE); +- x.hi += y; +- v = x.val; +- } +-#endif ++ if (cpu_is_pxa21x() || cpu_is_pxa25x()) ++ return pxa25x_get_clk_frequency_khz(info); ++ else if (cpu_is_pxa27x()) ++ return pxa27x_get_clk_frequency_khz(info); ++ else ++ return pxa3xx_get_clk_frequency_khz(info); ++} ++EXPORT_SYMBOL(get_clk_frequency_khz); + +- return v; ++/* ++ * Return the current memory clock frequency in units of 10kHz ++ */ ++unsigned int get_memclk_frequency_10khz(void) ++{ ++ if (cpu_is_pxa21x() || cpu_is_pxa25x()) ++ return pxa25x_get_memclk_frequency_10khz(); ++ else if (cpu_is_pxa27x()) ++ return pxa27x_get_memclk_frequency_10khz(); ++ else ++ return pxa3xx_get_memclk_frequency_10khz(); + } ++EXPORT_SYMBOL(get_memclk_frequency_10khz); + + /* + * Handy function to set GPIO alternate functions + */ ++int pxa_last_gpio; + + int pxa_gpio_mode(int gpio_mode) + { +@@ -116,7 +85,7 @@ + int fn = (gpio_mode & GPIO_MD_MASK_FN) >> 8; + int gafr; + +- if (gpio > PXA_LAST_GPIO) ++ if (gpio > pxa_last_gpio) + return -EINVAL; + + local_irq_save(flags); +@@ -160,7 +129,7 @@ + /* + * Routine to safely enable or disable a clock in the CKEN + */ +-void pxa_set_cken(int clock, int enable) ++void __pxa_set_cken(int clock, int enable) + { + unsigned long flags; + local_irq_save(flags); +@@ -173,7 +142,7 @@ + local_irq_restore(flags); + } + +-EXPORT_SYMBOL(pxa_set_cken); ++EXPORT_SYMBOL(__pxa_set_cken); + + /* + * Intel PXA2xx internal register mapping. +@@ -330,21 +299,80 @@ + pxa_device_fb.dev.parent = parent_dev; + } + ++static struct resource pxa_resource_ffuart[] = { ++ { ++ .start = __PREG(FFUART), ++ .end = __PREG(FFUART) + 35, ++ .flags = IORESOURCE_MEM, ++ }, { ++ .start = IRQ_FFUART, ++ .end = IRQ_FFUART, ++ .flags = IORESOURCE_IRQ, ++ } ++}; ++ + struct platform_device pxa_device_ffuart= { + .name = "pxa2xx-uart", + .id = 0, ++ .resource = pxa_resource_ffuart, ++ .num_resources = ARRAY_SIZE(pxa_resource_ffuart), ++}; ++ ++static struct resource pxa_resource_btuart[] = { ++ { ++ .start = __PREG(BTUART), ++ .end = __PREG(BTUART) + 35, ++ .flags = IORESOURCE_MEM, ++ }, { ++ .start = IRQ_BTUART, ++ .end = IRQ_BTUART, ++ .flags = IORESOURCE_IRQ, ++ } + }; ++ + struct platform_device pxa_device_btuart = { + .name = "pxa2xx-uart", + .id = 1, ++ .resource = pxa_resource_btuart, ++ .num_resources = ARRAY_SIZE(pxa_resource_btuart), + }; ++ ++static struct resource pxa_resource_stuart[] = { ++ { ++ .start = __PREG(STUART), ++ .end = __PREG(STUART) + 35, ++ .flags = IORESOURCE_MEM, ++ }, { ++ .start = IRQ_STUART, ++ .end = IRQ_STUART, ++ .flags = IORESOURCE_IRQ, ++ } ++}; ++ + struct platform_device pxa_device_stuart = { + .name = "pxa2xx-uart", + .id = 2, ++ .resource = pxa_resource_stuart, ++ .num_resources = ARRAY_SIZE(pxa_resource_stuart), ++}; ++ ++static struct resource pxa_resource_hwuart[] = { ++ { ++ .start = __PREG(HWUART), ++ .end = __PREG(HWUART) + 47, ++ .flags = IORESOURCE_MEM, ++ }, { ++ .start = IRQ_HWUART, ++ .end = IRQ_HWUART, ++ .flags = IORESOURCE_IRQ, ++ } + }; ++ + struct platform_device pxa_device_hwuart = { + .name = "pxa2xx-uart", + .id = 3, ++ .resource = pxa_resource_hwuart, ++ .num_resources = ARRAY_SIZE(pxa_resource_hwuart), + }; + + void __init pxa_set_ffuart_info(struct platform_pxa_serial_funcs *info) +Index: linux-2.6.22/arch/arm/mach-pxa/generic.h +=================================================================== +--- linux-2.6.22.orig/arch/arm/mach-pxa/generic.h 2007-09-24 20:56:51.000000000 +0200 ++++ linux-2.6.22/arch/arm/mach-pxa/generic.h 2007-09-24 20:57:20.000000000 +0200 +@@ -15,14 +15,40 @@ + extern void __init pxa_init_irq_low(void); + extern void __init pxa_init_irq_high(void); + extern void __init pxa_init_irq_gpio(int gpio_nr); ++extern void __init pxa_init_irq_set_wake(int (*set_wake)(unsigned int, unsigned int)); + extern void __init pxa25x_init_irq(void); + extern void __init pxa27x_init_irq(void); ++extern void __init pxa3xx_init_irq(void); + extern void __init pxa_map_io(void); + + extern unsigned int get_clk_frequency_khz(int info); ++extern int pxa_last_gpio; + + #define SET_BANK(__nr,__start,__size) \ + mi->bank[__nr].start = (__start), \ + mi->bank[__nr].size = (__size), \ + mi->bank[__nr].node = (((unsigned)(__start) - PHYS_OFFSET) >> 27) + ++#ifdef CONFIG_PXA25x ++extern unsigned pxa25x_get_clk_frequency_khz(int); ++extern unsigned pxa25x_get_memclk_frequency_10khz(void); ++#else ++#define pxa25x_get_clk_frequency_khz(x) (0) ++#define pxa25x_get_memclk_frequency_10khz() (0) ++#endif ++ ++#ifdef CONFIG_PXA27x ++extern unsigned pxa27x_get_clk_frequency_khz(int); ++extern unsigned pxa27x_get_memclk_frequency_10khz(void); ++#else ++#define pxa27x_get_clk_frequency_khz(x) (0) ++#define pxa27x_get_memclk_frequency_10khz() (0) ++#endif ++ ++#ifdef CONFIG_PXA3xx ++extern unsigned pxa3xx_get_clk_frequency_khz(int); ++extern unsigned pxa3xx_get_memclk_frequency_10khz(void); ++#else ++#define pxa3xx_get_clk_frequency_khz(x) (0) ++#define pxa3xx_get_memclk_frequency_10khz() (0) ++#endif +Index: linux-2.6.22/arch/arm/mach-pxa/irq.c +=================================================================== +--- linux-2.6.22.orig/arch/arm/mach-pxa/irq.c 2007-09-24 20:56:51.000000000 +0200 ++++ linux-2.6.22/arch/arm/mach-pxa/irq.c 2007-09-24 20:57:20.000000000 +0200 +@@ -38,33 +38,11 @@ + ICMR |= (1 << irq); + } + +-static int pxa_set_wake(unsigned int irq, unsigned int on) +-{ +- u32 mask; +- +- switch (irq) { +- case IRQ_RTCAlrm: +- mask = PWER_RTC; +- break; +-#ifdef CONFIG_PXA27x +- /* REVISIT can handle USBH1, USBH2, USB, MSL, USIM, ... */ +-#endif +- default: +- return -EINVAL; +- } +- if (on) +- PWER |= mask; +- else +- PWER &= ~mask; +- return 0; +-} +- + static struct irq_chip pxa_internal_chip_low = { + .name = "SC", + .ack = pxa_mask_low_irq, + .mask = pxa_mask_low_irq, + .unmask = pxa_unmask_low_irq, +- .set_wake = pxa_set_wake, + }; + + void __init pxa_init_irq_low(void) +@@ -87,7 +65,7 @@ + } + } + +-#ifdef CONFIG_PXA27x ++#if defined(CONFIG_PXA27x) || defined(CONFIG_PXA3xx) + + /* + * This is for the second set of internal IRQs as found on the PXA27x. +@@ -125,26 +103,6 @@ + } + #endif + +-/* Note that if an input/irq line ever gets changed to an output during +- * suspend, the relevant PWER, PRER, and PFER bits should be cleared. +- */ +-#ifdef CONFIG_PXA27x +- +-/* PXA27x: Various gpios can issue wakeup events. This logic only +- * handles the simple cases, not the WEMUX2 and WEMUX3 options +- */ +-#define PXA27x_GPIO_NOWAKE_MASK \ +- ((1 << 8) | (1 << 7) | (1 << 6) | (1 << 5) | (1 << 2)) +-#define WAKEMASK(gpio) \ +- (((gpio) <= 15) \ +- ? ((1 << (gpio)) & ~PXA27x_GPIO_NOWAKE_MASK) \ +- : ((gpio == 35) ? (1 << 24) : 0)) +-#else +- +-/* pxa 210, 250, 255, 26x: gpios 0..15 can issue wakeups */ +-#define WAKEMASK(gpio) (((gpio) <= 15) ? (1 << (gpio)) : 0) +-#endif +- + /* + * PXA GPIO edge detection for IRQs: + * IRQs are generated on Falling-Edge, Rising-Edge, or both. +@@ -158,11 +116,9 @@ + static int pxa_gpio_irq_type(unsigned int irq, unsigned int type) + { + int gpio, idx; |
