diff options
| author | Anuj Mittal <anuj.mittal@intel.com> | 2018-09-13 15:25:47 +0800 |
|---|---|---|
| committer | Richard Purdie <richard.purdie@linuxfoundation.org> | 2018-09-13 10:40:31 +0100 |
| commit | 3db567d7835c6bb158d0f6c5b5533835a0181c45 (patch) | |
| tree | 52de66ae035489e0e27a04e32a5f876aabea6cc6 /.gitignore | |
| parent | 325af0f4a821971a7aeeca35b10e3558f86029e0 (diff) | |
| download | openembedded-core-3db567d7835c6bb158d0f6c5b5533835a0181c45.tar.gz openembedded-core-3db567d7835c6bb158d0f6c5b5533835a0181c45.tar.bz2 openembedded-core-3db567d7835c6bb158d0f6c5b5533835a0181c45.zip | |
tune-core2: use n270 instead of core2duo
Fixes warnings in builds using core2-32 tune:
warning: TCG doesn't support requested feature: CPUID.80000001H:EDX.syscall [bit 11]
warning: TCG doesn't support requested feature: CPUID.80000001H:EDX.lm [bit 29]
when executing postinsts using qemu-i386.
i386 target doesn't enable CPUID_EXT2_SYSCALL and CPUID_EXT2_LM [1]
while cpu choice of core2duo that we use for core2-32 TUNE does [2].
Use n270 cpu instead to use with qemu which supports SSSE3 and doesn't
have these bits enabled [3].
[1] https://github.com/qemu/qemu/blob/master/target/i386/cpu.c#L739
[2] https://github.com/qemu/qemu/blob/master/target/i386/cpu.c#L1439
[3] https://github.com/qemu/qemu/blob/master/target/i386/cpu.c#L1603
Fixes [YOCTO #12916]
Signed-off-by: Anuj Mittal <anuj.mittal@intel.com>
Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
Diffstat (limited to '.gitignore')
0 files changed, 0 insertions, 0 deletions