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path: root/recipes/ixp4xx/ixp4xx-csr-2.1/rtl8201-support.patch
blob: 150dc27016e77525bb9b500d9f97d6f3eaef8670 (plain)
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this patch adds support for the RTL8201CP PHY

--- ixp400_xscale_sw/src/ethMii/IxEthMii.c	1970-01-01 00:00:00.000000000 +0000
+++ ixp400_xscale_sw/src/ethMii/IxEthMii.c	1970-01-01 00:00:00.000000000 +0000
@@ -119,6 +119,7 @@ ixEthMiiPhyScan(BOOL phyPresent[], UINT3
 		    || (ixEthMiiPhyId[i] == IX_ETH_MII_LXT973_PHY_ID)
 		    || (ixEthMiiPhyId[i] == IX_ETH_MII_LXT973A3_PHY_ID)
 		    || (ixEthMiiPhyId[i] == IX_ETH_MII_LXT9785_PHY_ID)
+		    || (ixEthMiiPhyId[i] == IX_ETH_MII_RTL8201_PHY_ID)
 		    )
 		{
 		    /* supported phy */
@@ -287,6 +288,7 @@ ixEthMiiPhyReset(UINT32 phyAddr)
 	    (ixEthMiiPhyId[phyAddr] == IX_ETH_MII_LXT972_PHY_ID)	||
 	    (ixEthMiiPhyId[phyAddr] == IX_ETH_MII_LXT973_PHY_ID)	||
 	    (ixEthMiiPhyId[phyAddr] == IX_ETH_MII_LXT973A3_PHY_ID)	||
+	    (ixEthMiiPhyId[phyAddr] == IX_ETH_MII_RTL8201_PHY_ID)	||
 		(ixEthMiiPhyId[phyAddr] == IX_ETH_MII_LXT9785_PHY_ID)
 	    )
 	{
--- ixp400_xscale_sw/src/ethMii/IxEthMii_p.h	1970-01-01 00:00:00.000000000 +0000
+++ ixp400_xscale_sw/src/ethMii/IxEthMii_p.h	1970-01-01 00:00:00.000000000 +0000
@@ -179,6 +179,7 @@
 #define IX_ETH_MII_LXT973A3_PHY_ID   	0x00137A11
 #define IX_ETH_MII_KS8995_PHY_ID   	0x00221450
 #define IX_ETH_MII_LXT9785_PHY_ID       0x001378FF
+#define IX_ETH_MII_RTL8201_PHY_ID       0x00008201
 #define IX_ETH_MII_RTL8305_FAKE_PHY_ID  0x83058305
 
 #define IX_ETH_MII_INVALID_PHY_ID 	0x00000000