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#
# Patch managed by http://www.mn-logistik.de/unsupported/pxa250/patcher
#
--- glibc-2.2.5/sysdeps/powerpc/atomicity.h~glibc-2.2.5-ppc405erratum77.patch 2004-09-03 19:00:33.000000000 -0500
+++ glibc-2.2.5/sysdeps/powerpc/atomicity.h 2004-09-03 19:00:38.000000000 -0500
@@ -28,6 +28,17 @@
# define __ATOMICITY_INLINE inline
#endif
+#ifdef __PPC405__
+/* workaround for PPC405 erratum #77 - Mark Hatle, dank. References:
+ http://www-3.ibm.com/chips/techlib/techlib.nsf/techdocs/89DED00DEBFF54BF87256A8000491BA2/$file/405CR_C_errata_1_2.pdf
+ http://ppc.bkbits.net:8080/linuxppc_2_4_devel/cset@1.489
+ http://www.kegel.com/xgcc3/ppc405erratum77.html
+ FIXME: using dbct instead of sync would be faster */
+#define __LIBC_PPC405_ERR77_SYNC "sync \n\t"
+#else
+#define __LIBC_PPC405_ERR77_SYNC
+#endif
+
static __ATOMICITY_INLINE int
__attribute__ ((unused))
exchange_and_add (volatile uint32_t *mem, int val)
@@ -36,6 +47,7 @@
__asm__ ("\n\
0: lwarx %0,0,%2 \n\
add%I3 %1,%0,%3 \n\
+ " __LIBC_PPC405_ERR77_SYNC "\n\
stwcx. %1,0,%2 \n\
bne- 0b \n\
" : "=&b"(result), "=&r"(tmp) : "r" (mem), "Ir"(val) : "cr0", "memory");
@@ -50,6 +62,7 @@
__asm__ ("\n\
0: lwarx %0,0,%1 \n\
add%I2 %0,%0,%2 \n\
+ " __LIBC_PPC405_ERR77_SYNC "\n\
stwcx. %0,0,%1 \n\
bne- 0b \n\
" : "=&b"(tmp) : "r" (mem), "Ir"(val) : "cr0", "memory");
@@ -65,6 +78,7 @@
sub%I2c. %0,%0,%2 \n\
cntlzw %0,%0 \n\
bne- 1f \n\
+ " __LIBC_PPC405_ERR77_SYNC "\n\
stwcx. %3,0,%1 \n\
bne- 0b \n\
1: \n\
@@ -79,6 +93,7 @@
long int result;
__asm__ ("\n\
0: lwarx %0,0,%1 \n\
+ " __LIBC_PPC405_ERR77_SYNC "\n\
stwcx. %2,0,%1 \n\
bne- 0b \n\
" : "=&r"(result) : "r"(p), "r"(newval) : "cr0", "memory");
@@ -94,6 +109,7 @@
0: lwarx %0,0,%1 \n\
cmpwi %0,0 \n\
bne- 1f \n\
+ " __LIBC_PPC405_ERR77_SYNC "\n\
stwcx. %2,0,%1 \n\
bne- 0b \n\
1: \n\
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