1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
|
diff -urN gcc-4.1.2/gcc/config/arm/arm.c ../../../../old-tmp/work/arm-oabi-angstrom-linux/gcc-cross-4.1.2-backup/gcc-4.1.2/gcc/config/arm/arm.c
--- gcc-4.1.2/gcc/config/arm/arm.c 2007-05-31 12:39:48.000000000 +1000
+++ gcc-4.1.2/gcc/config/arm/arm.c 2007-05-29 17:19:38.000000000 +1000
@@ -11427,26 +11427,53 @@
/* These encodings assume that AC=1 in the FPA system control
byte. This allows us to handle all cases except UNEQ and
LTGT. */
- switch (comp_code)
- {
- case GE: return ARM_GE;
- case GT: return ARM_GT;
- case LE: return ARM_LS;
- case LT: return ARM_MI;
- case NE: return ARM_NE;
- case EQ: return ARM_EQ;
- case ORDERED: return ARM_VC;
- case UNORDERED: return ARM_VS;
- case UNLT: return ARM_LT;
- case UNLE: return ARM_LE;
- case UNGT: return ARM_HI;
- case UNGE: return ARM_PL;
- /* UNEQ and LTGT do not have a representation. */
- case UNEQ: /* Fall through. */
- case LTGT: /* Fall through. */
- default: gcc_unreachable ();
- }
-
+ if (!TARGET_MAVERICK)
+ {
+ switch (comp_code)
+ {
+ case GE: return ARM_GE;
+ case GT: return ARM_GT;
+ case LE: return ARM_LS;
+ case LT: return ARM_MI;
+ case NE: return ARM_NE;
+ case EQ: return ARM_EQ;
+ case ORDERED: return ARM_VC;
+ case UNORDERED: return ARM_VS;
+ case UNLT: return ARM_LT;
+ case UNLE: return ARM_LE;
+ case UNGT: return ARM_HI;
+ case UNGE: return ARM_PL;
+ /* UNEQ and LTGT do not have a representation. */
+ case UNEQ: /* Fall through. */
+ case LTGT: /* Fall through. */
+ default: gcc_unreachable ();
+ }
+ }
+ else
+ {
+ /* CIRRUS */
+ switch (comp_code)
+ {
+#if 1
+ case GT: return ARM_VS;
+ case LE: return ARM_LE;
+ case LT: return ARM_LT;
+ case NE: return ARM_NE;
+ case EQ: return ARM_EQ;
+ case UNLE: return ARM_VC;
+ case UNGT: return ARM_GT;
+ case UNGE: return ARM_GE;
+ case UNEQ: return ARM_PL;
+ case LTGT: return ARM_MI;
+ /* These do not have a representation. */
+ case GE: /* Fall through. -UNGE wrong atm */
+ case UNLT: /* Fall through. -LT wrong atm */
+ case ORDERED: /* Fall through. -AL wrong atm */
+ case UNORDERED: /* Fall through. -AL wrong atm */
+#endif
+ default: gcc_unreachable ();
+ }
+ }
case CC_SWPmode:
switch (comp_code)
{
diff -urN gcc-4.1.2/gcc/config/arm/arm.md ../../../../old-tmp/work/arm-oabi-angstrom-linux/gcc-cross-4.1.2-backup/gcc-4.1.2/gcc/config/arm/arm.md
--- gcc-4.1.2/gcc/config/arm/arm.md 2007-05-31 12:39:48.000000000 +1000
+++ gcc-4.1.2/gcc/config/arm/arm.md 2007-05-29 15:17:18.000000000 +1000
@@ -6952,10 +6952,11 @@
"operands[1] = arm_gen_compare_reg (LE, arm_compare_op0, arm_compare_op1);"
)
+;broken on cirrus
(define_expand "bge"
[(set (pc)
(if_then_else (ge (match_dup 1) (const_int 0))
(label_ref (match_operand 0 "" ""))
(pc)))]
- "TARGET_ARM"
+ "TARGET_ARM"
"operands[1] = arm_gen_compare_reg (GE, arm_compare_op0, arm_compare_op1);"
@@ -6988,6 +6989,7 @@
"operands[1] = arm_gen_compare_reg (LEU, arm_compare_op0, arm_compare_op1);"
)
+; broken on cirrus?
(define_expand "bgeu"
[(set (pc)
(if_then_else (geu (match_dup 1) (const_int 0))
@@ -7031,14 +7033,15 @@
(if_then_else (ungt (match_dup 1) (const_int 0))
(label_ref (match_operand 0 "" ""))
(pc)))]
- "TARGET_ARM && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP)"
+ "TARGET_ARM && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP || TARGET_MAVERICK)"
"operands[1] = arm_gen_compare_reg (UNGT, arm_compare_op0, arm_compare_op1);"
)
-(define_expand "bunlt"
+; broken for cirrus
+(define_expand "bunlt"
[(set (pc)
(if_then_else (unlt (match_dup 1) (const_int 0))
(label_ref (match_operand 0 "" ""))
(pc)))]
- "TARGET_ARM && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP)"
+ "TARGET_ARM && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP || TARGET_MAVERICK)"
"operands[1] = arm_gen_compare_reg (UNLT, arm_compare_op0, arm_compare_op1);"
@@ -7049,7 +7052,7 @@
(if_then_else (unge (match_dup 1) (const_int 0))
(label_ref (match_operand 0 "" ""))
(pc)))]
- "TARGET_ARM && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP)"
+ "TARGET_ARM && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP || TARGET_MAVERICK)"
"operands[1] = arm_gen_compare_reg (UNGE, arm_compare_op0, arm_compare_op1);"
)
@@ -7058,7 +7061,7 @@
(if_then_else (unle (match_dup 1) (const_int 0))
(label_ref (match_operand 0 "" ""))
(pc)))]
- "TARGET_ARM && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP)"
+ "TARGET_ARM && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP || TARGET_MAVERICK)"
"operands[1] = arm_gen_compare_reg (UNLE, arm_compare_op0, arm_compare_op1);"
)
@@ -7069,7 +7072,7 @@
(if_then_else (uneq (match_dup 1) (const_int 0))
(label_ref (match_operand 0 "" ""))
(pc)))]
- "TARGET_ARM && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP)"
+ "TARGET_ARM && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP)" ;; || TARGET_MAVERICK
"operands[1] = arm_gen_compare_reg (UNEQ, arm_compare_op0, arm_compare_op1);"
)
@@ -7078,7 +7081,7 @@
(if_then_else (ltgt (match_dup 1) (const_int 0))
(label_ref (match_operand 0 "" ""))
(pc)))]
- "TARGET_ARM && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP)"
+ "TARGET_ARM && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP)" ;; || TARGET_MAVERICK
"operands[1] = arm_gen_compare_reg (LTGT, arm_compare_op0, arm_compare_op1);"
)
@@ -7086,7 +7089,7 @@
;; Patterns to match conditional branch insns.
;;
-; Special pattern to match UNEQ.
+; Special pattern to match UNEQ for FPA and VFP.
(define_insn "*arm_buneq"
[(set (pc)
(if_then_else (uneq (match_operand 1 "cc_register" "") (const_int 0))
@@ -7102,7 +7105,7 @@
(set_attr "length" "8")]
)
-; Special pattern to match LTGT.
+; Special pattern to match LTGT for FPA and VFP.
(define_insn "*arm_bltgt"
[(set (pc)
(if_then_else (ltgt (match_operand 1 "cc_register" "") (const_int 0))
@@ -7118,6 +7121,38 @@
(set_attr "length" "8")]
)
+; Special pattern to match GE for MAVERICK.
+(define_insn "*arm_bge"
+ [(set (pc)
+ (if_then_else (ge (match_operand 1 "cc_register" "") (const_int 0))
+ (label_ref (match_operand 0 "" ""))
+ (pc)))]
+ "TARGET_ARM && (TARGET_MAVERICK)"
+ "*
+ gcc_assert (!arm_ccfsm_state);
+
+ return \"beq\\t%l0\;bvs\\t%l0\";
+ "
+ [(set_attr "conds" "jump_clob")
+ (set_attr "length" "8")]
+)
+
+; Special pattern to match UNLT for MAVERICK.
+(define_insn "*arm_bunlt"
+ [(set (pc)
+ (if_then_else (unlt (match_operand 1 "cc_register" "") (const_int 0))
+ (label_ref (match_operand 0 "" ""))
+ (pc)))]
+ "TARGET_ARM && (TARGET_MAVERICK)"
+ "*
+ gcc_assert (!arm_ccfsm_state);
+
+ return \"bne\\t%l0\;bvc\\t%l0\";
+ "
+ [(set_attr "conds" "jump_clob")
+ (set_attr "length" "8")]
+)
+
(define_insn "*arm_cond_branch"
[(set (pc)
(if_then_else (match_operator 1 "arm_comparison_operator"
@@ -7137,7 +7172,7 @@
(set_attr "type" "branch")]
)
-; Special pattern to match reversed UNEQ.
+; Special pattern to match reversed UNEQ for FPA and VFP.
(define_insn "*arm_buneq_reversed"
[(set (pc)
(if_then_else (uneq (match_operand 1 "cc_register" "") (const_int 0))
@@ -7153,7 +7188,7 @@
(set_attr "length" "8")]
)
-; Special pattern to match reversed LTGT.
+; Special pattern to match reversed LTGT for FPA and VFP.
(define_insn "*arm_bltgt_reversed"
[(set (pc)
(if_then_else (ltgt (match_operand 1 "cc_register" "") (const_int 0))
@@ -7169,6 +7204,39 @@
(set_attr "length" "8")]
)
+; Special pattern to match reversed GE for MAVERICK.
+(define_insn "*arm_bge_reversed"
+ [(set (pc)
+ (if_then_else (ge (match_operand 1 "cc_register" "") (const_int 0))
+ (pc)
+ (label_ref (match_operand 0 "" ""))))]
+ "TARGET_ARM && (TARGET_MAVERICK)"
+ "*
+ gcc_assert (!arm_ccfsm_state);
+
+ return \"bne\\t%l0\;bvc\\t%l0\";
+ "
+ [(set_attr "conds" "jump_clob")
+ (set_attr "length" "8")]
+)
+
+; Special pattern to match reversed UNLT for MAVERICK.
+(define_insn "*arm_bunlt_reversed"
+ [(set (pc)
+ (if_then_else (unlt (match_operand 1 "cc_register" "") (const_int 0))
+ (pc)
+ (label_ref (match_operand 0 "" ""))))]
+ "TARGET_ARM && (TARGET_MAVERICK)"
+ "*
+ gcc_assert (!arm_ccfsm_state);
+
+ return \"beq\\t%l0\;bvs\\t%l0\";
+ "
+ [(set_attr "conds" "jump_clob")
+ (set_attr "length" "8")]
+)
+
+
(define_insn "*arm_cond_branch_reversed"
[(set (pc)
(if_then_else (match_operator 1 "arm_comparison_operator"
@@ -7220,8 +7288,9 @@
"operands[1] = arm_gen_compare_reg (LE, arm_compare_op0, arm_compare_op1);"
)
+;; broken for cirrus - definitely
(define_expand "sge"
[(set (match_operand:SI 0 "s_register_operand" "")
(ge:SI (match_dup 1) (const_int 0)))]
- "TARGET_ARM"
+ "TARGET_ARM && !(TARGET_HARD_FLOAT && TARGET_MAVERICK)"
"operands[1] = arm_gen_compare_reg (GE, arm_compare_op0, arm_compare_op1);"
@@ -7227,6 +7296,14 @@
"operands[1] = arm_gen_compare_reg (GE, arm_compare_op0, arm_compare_op1);"
)
+;;; DO NOT add patterns for SGE these can not be represented with MAVERICK
+; (define_expand "sge"
+; [(set (match_operand:SI 0 "s_register_operand" "")
+; (ge:SI (match_dup 1) (const_int 0)))]
+; "TARGET_ARM && (TARGET_MAVERICK)"
+; "gcc_unreachable ();"
+; )
+
(define_expand "slt"
[(set (match_operand:SI 0 "s_register_operand" "")
(lt:SI (match_dup 1) (const_int 0)))]
@@ -7248,6 +7325,7 @@
"operands[1] = arm_gen_compare_reg (LEU, arm_compare_op0, arm_compare_op1);"
)
+;; broken for cirrus - maybe
(define_expand "sgeu"
[(set (match_operand:SI 0 "s_register_operand" "")
(geu:SI (match_dup 1) (const_int 0)))]
@@ -7255,6 +7333,14 @@
"operands[1] = arm_gen_compare_reg (GEU, arm_compare_op0, arm_compare_op1);"
)
+;;; DO NOT add patterns for SGEU these may not be represented with MAVERICK?
+; (define_expand "sgeu"
+; [(set (match_operand:SI 0 "s_register_operand" "")
+; (ge:SI (match_dup 1) (const_int 0)))]
+; "TARGET_ARM && (TARGET_MAVERICK)"
+; "gcc_unreachable ();"
+; )
+
(define_expand "sltu"
[(set (match_operand:SI 0 "s_register_operand" "")
(ltu:SI (match_dup 1) (const_int 0)))]
@@ -7281,7 +7367,7 @@
(define_expand "sungt"
[(set (match_operand:SI 0 "s_register_operand" "")
(ungt:SI (match_dup 1) (const_int 0)))]
- "TARGET_ARM && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP)"
+ "TARGET_ARM && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP || TARGET_MAVERICK)"
"operands[1] = arm_gen_compare_reg (UNGT, arm_compare_op0,
arm_compare_op1);"
)
@@ -7289,23 +7375,32 @@
(define_expand "sunge"
[(set (match_operand:SI 0 "s_register_operand" "")
(unge:SI (match_dup 1) (const_int 0)))]
- "TARGET_ARM && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP)"
+ "TARGET_ARM && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP || TARGET_MAVERICK)"
"operands[1] = arm_gen_compare_reg (UNGE, arm_compare_op0,
arm_compare_op1);"
)
+; broken for cirrus
(define_expand "sunlt"
[(set (match_operand:SI 0 "s_register_operand" "")
(unlt:SI (match_dup 1) (const_int 0)))]
- "TARGET_ARM && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP)"
+ "TARGET_ARM && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP)"
"operands[1] = arm_gen_compare_reg (UNLT, arm_compare_op0,
arm_compare_op1);"
)
+;;; DO NOT add patterns for SUNLT these can't be represented with MAVERICK
+; (define_expand "sunlt"
+; [(set (match_operand:SI 0 "s_register_operand" "")
+; (unlt:SI (match_dup 1) (const_int 0)))]
+; "TARGET_ARM && (TARGET_MAVERICK)"
+; "gcc_unreachable ();"
+; )
+
(define_expand "sunle"
[(set (match_operand:SI 0 "s_register_operand" "")
(unle:SI (match_dup 1) (const_int 0)))]
- "TARGET_ARM && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP)"
+ "TARGET_ARM && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP || TARGET_MAVERICK)"
"operands[1] = arm_gen_compare_reg (UNLE, arm_compare_op0,
arm_compare_op1);"
)
@@ -7371,7 +7466,7 @@
enum rtx_code code = GET_CODE (operands[1]);
rtx ccreg;
- if (code == UNEQ || code == LTGT)
+ if (code == UNEQ || code == LTGT || code == GE || code == UNLT || code == ORDERED || code == UNORDERED)
FAIL;
ccreg = arm_gen_compare_reg (code, arm_compare_op0, arm_compare_op1);
@@ -7390,7 +7485,8 @@
enum rtx_code code = GET_CODE (operands[1]);
rtx ccreg;
- if (code == UNEQ || code == LTGT)
+ if (code == UNEQ || code == LTGT || code == GE || code == UNLT || code == ORDERED || code == UNORDERED)
+
FAIL;
/* When compiling for SOFT_FLOAT, ensure both arms are in registers.
@@ -7409,13 +7505,13 @@
(if_then_else:DF (match_operand 1 "arm_comparison_operator" "")
(match_operand:DF 2 "s_register_operand" "")
(match_operand:DF 3 "arm_float_add_operand" "")))]
- "TARGET_ARM && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP)"
+ "TARGET_ARM && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP || TARGET_MAVERICK)"
"
{
enum rtx_code code = GET_CODE (operands[1]);
rtx ccreg;
- if (code == UNEQ || code == LTGT)
+ if (code == UNEQ || code == LTGT || code == GE || code == UNLT || code == ORDERED || code == UNORDERED)
FAIL;
ccreg = arm_gen_compare_reg (code, arm_compare_op0, arm_compare_op1);
|
