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-rw-r--r--recipes/llvm/llvm2.7/BX_to_BLX.patch13
-rw-r--r--recipes/llvm/llvm2.7/MOVLRPC.patch106
-rw-r--r--recipes/llvm/llvm2.7/arm_ppc.patch172
3 files changed, 278 insertions, 13 deletions
diff --git a/recipes/llvm/llvm2.7/BX_to_BLX.patch b/recipes/llvm/llvm2.7/BX_to_BLX.patch
deleted file mode 100644
index 2e34c623b4..0000000000
--- a/recipes/llvm/llvm2.7/BX_to_BLX.patch
+++ /dev/null
@@ -1,13 +0,0 @@
-Index: llvm/lib/Target/ARM/ARMInstrInfo.td
-===================================================================
---- llvm.orig/lib/Target/ARM/ARMInstrInfo.td 2010-03-08 16:07:25.000000000 +0100
-+++ llvm/lib/Target/ARM/ARMInstrInfo.td 2010-03-08 16:10:21.000000000 +0100
-@@ -942,7 +942,7 @@
- IIC_Br, "mov\tlr, pc\n\tbx\t$func",
- [(ARMcall_nolink tGPR:$func)]>,
- Requires<[IsARM, HasV4T, IsNotDarwin]> {
-- let Inst{7-4} = 0b0001;
-+ let Inst{7-4} = 0b0011;
- let Inst{19-8} = 0b111111111111;
- let Inst{27-20} = 0b00010010;
- }
diff --git a/recipes/llvm/llvm2.7/MOVLRPC.patch b/recipes/llvm/llvm2.7/MOVLRPC.patch
new file mode 100644
index 0000000000..c00c4b1425
--- /dev/null
+++ b/recipes/llvm/llvm2.7/MOVLRPC.patch
@@ -0,0 +1,106 @@
+Index: llvm/lib/Target/ARM/ARMISelLowering.cpp
+===================================================================
+--- llvm.orig/lib/Target/ARM/ARMISelLowering.cpp 2010-07-11 12:57:59.000000000 +0200
++++ llvm/lib/Target/ARM/ARMISelLowering.cpp 2010-07-11 22:07:28.000000000 +0200
+@@ -560,6 +560,7 @@
+ case ARMISD::BR_JT: return "ARMISD::BR_JT";
+ case ARMISD::BR2_JT: return "ARMISD::BR2_JT";
+ case ARMISD::RET_FLAG: return "ARMISD::RET_FLAG";
++ case ARMISD::MOVLRPC: return "ARMISD::MOVLRPC";
+ case ARMISD::PIC_ADD: return "ARMISD::PIC_ADD";
+ case ARMISD::CMP: return "ARMISD::CMP";
+ case ARMISD::CMPZ: return "ARMISD::CMPZ";
+@@ -1288,6 +1289,14 @@
+ // implicit def LR - LR mustn't be allocated as GRP:$dst of CALL_NOLINK
+ Chain = DAG.getCopyToReg(Chain, dl, ARM::LR, DAG.getUNDEF(MVT::i32),InFlag);
+ InFlag = Chain.getValue(1);
++
++ if(!isTailCall){
++ // explicit copy PC to LR and chain flag it to the call.
++ Chain = DAG.getNode(ARMISD::MOVLRPC, dl,
++ DAG.getVTList(MVT::Other, MVT::Flag),
++ Chain, InFlag);
++ InFlag = Chain.getValue(1);
++ }
+ }
+
+ std::vector<SDValue> Ops;
+Index: llvm/lib/Target/ARM/ARMISelLowering.h
+===================================================================
+--- llvm.orig/lib/Target/ARM/ARMISelLowering.h 2010-07-11 12:57:59.000000000 +0200
++++ llvm/lib/Target/ARM/ARMISelLowering.h 2010-07-11 12:59:02.000000000 +0200
+@@ -42,6 +42,7 @@
+ BR_JT, // Jumptable branch.
+ BR2_JT, // Jumptable branch (2 level - jumptable entry is a jump).
+ RET_FLAG, // Return with a flag operand.
++ MOVLRPC, // Store return address PC in LR before call - flag before CALL_NOLINK
+
+ PIC_ADD, // Add with a PC operand and a PIC label.
+
+Index: llvm/lib/Target/ARM/ARMInstrInfo.td
+===================================================================
+--- llvm.orig/lib/Target/ARM/ARMInstrInfo.td 2010-07-11 12:57:59.000000000 +0200
++++ llvm/lib/Target/ARM/ARMInstrInfo.td 2010-07-11 12:59:02.000000000 +0200
+@@ -74,6 +74,9 @@
+ [SDNPHasChain, SDNPOptInFlag, SDNPOutFlag,
+ SDNPVariadic]>;
+
++def ARMmovlrpc : SDNode<"ARMISD::MOVLRPC", SDTNone,
++ [SDNPHasChain, SDNPOptInFlag, SDNPOutFlag]>;
++
+ def ARMretflag : SDNode<"ARMISD::RET_FLAG", SDTNone,
+ [SDNPHasChain, SDNPOptInFlag]>;
+
+@@ -674,6 +677,16 @@
+ [(ARMcallseq_start timm:$amt)]>;
+ }
+
++let Defs = [LR], hasSideEffects = 1 in
++def MOVLRPC : AI<(outs), (ins), BrMiscFrm, IIC_Br,
++ "mov", "\tlr, pc", [(ARMmovlrpc)]>,
++ Requires<[IsARM]> {
++ let Inst{11-0} = 0b000000001111;
++ let Inst{15-12} = 0b1110;
++ let Inst{19-16} = 0b0000;
++ let Inst{27-20} = 0b00011010;
++}
++
+ def NOP : AI<(outs), (ins), MiscFrm, NoItinerary, "nop", "",
+ [/* For disassembly only; pattern left blank */]>,
+ Requires<[IsARM, HasV6T2]> {
+@@ -962,7 +975,7 @@
+ // ARMv4T
+ // Note: Restrict $func to the tGPR regclass to prevent it being in LR.
+ def BX : ABXIx2<(outs), (ins tGPR:$func, variable_ops),
+- IIC_Br, "mov\tlr, pc\n\tbx\t$func",
++ IIC_Br, "bx\t$func",
+ [(ARMcall_nolink tGPR:$func)]>,
+ Requires<[IsARM, HasV4T, IsNotDarwin]> {
+ let Inst{7-4} = 0b0001;
+@@ -972,7 +985,7 @@
+
+ // ARMv4
+ def BMOVPCRX : ABXIx2<(outs), (ins tGPR:$func, variable_ops),
+- IIC_Br, "mov\tlr, pc\n\tmov\tpc, $func",
++ IIC_Br, "mov\tpc, $func",
+ [(ARMcall_nolink tGPR:$func)]>,
+ Requires<[IsARM, NoV4T, IsNotDarwin]> {
+ let Inst{11-4} = 0b00000000;
+@@ -1011,7 +1024,7 @@
+ // ARMv4T
+ // Note: Restrict $func to the tGPR regclass to prevent it being in LR.
+ def BXr9 : ABXIx2<(outs), (ins tGPR:$func, variable_ops),
+- IIC_Br, "mov\tlr, pc\n\tbx\t$func",
++ IIC_Br, "bx\t$func",
+ [(ARMcall_nolink tGPR:$func)]>,
+ Requires<[IsARM, HasV4T, IsDarwin]> {
+ let Inst{7-4} = 0b0001;
+@@ -1021,7 +1034,7 @@
+
+ // ARMv4
+ def BMOVPCRXr9 : ABXIx2<(outs), (ins tGPR:$func, variable_ops),
+- IIC_Br, "mov\tlr, pc\n\tmov\tpc, $func",
++ IIC_Br, "mov\tpc, $func",
+ [(ARMcall_nolink tGPR:$func)]>,
+ Requires<[IsARM, NoV4T, IsDarwin]> {
+ let Inst{11-4} = 0b00000000;
diff --git a/recipes/llvm/llvm2.7/arm_ppc.patch b/recipes/llvm/llvm2.7/arm_ppc.patch
new file mode 100644
index 0000000000..d55230dfc3
--- /dev/null
+++ b/recipes/llvm/llvm2.7/arm_ppc.patch
@@ -0,0 +1,172 @@
+Index: llvm-2.7/lib/ExecutionEngine/JIT/JIT.cpp
+===================================================================
+--- llvm-2.7.orig/lib/ExecutionEngine/JIT/JIT.cpp 2010-02-16 12:11:14.000000000 +0100
++++ llvm-2.7/lib/ExecutionEngine/JIT/JIT.cpp 2010-07-12 11:03:03.047811849 +0200
+@@ -254,7 +254,12 @@
+ MutexGuard guard(Lock);
+ JITs.erase(jit);
+ }
+- void *getPointerToNamedFunction(const char *Name) const {
++ bool empty() {
++ MutexGuard guard(Lock);
++ return JITs.empty();
++ }
++ void *getPointerToNamedFunction(const char *Name,
++ bool AbortOnFailure = true) const {
+ MutexGuard guard(Lock);
+ assert(JITs.size() != 0 && "No Jit registered");
+ //search function in every instance of JIT
+@@ -266,7 +271,19 @@
+ }
+ // The function is not available : fallback on the first created (will
+ // search in symbol of the current program/library)
+- return (*JITs.begin())->getPointerToNamedFunction(Name);
++ return (*JITs.begin())->getPointerToNamedFunction(Name, AbortOnFailure);
++ }
++ void *getPointerToGlobalIfAvailable(GlobalValue *V) const {
++ MutexGuard guard(Lock);
++ assert(JITs.size() != 0 && "No Jit registered");
++ //search function in every instance of JIT
++ for (SmallPtrSet<JIT*, 1>::const_iterator Jit = JITs.begin(),
++ end = JITs.end();
++ Jit != end; ++Jit) {
++ if (void *Ptr = (*Jit)->getPointerToGlobalIfAvailable(V))
++ return Ptr;
++ }
++ return 0;
+ }
+ };
+ ManagedStatic<JitPool> AllJits;
+@@ -282,6 +299,22 @@
+ }
+ }
+
++extern "C" {
++ // getPointerToNamedFunctionOrNull - same as the above, but returns
++ // NULL instead of aborting if the function cannot be found.
++ void *getPointerToNamedFunctionOrNull(const char *Name) {
++ return !AllJits->empty() ? AllJits->getPointerToNamedFunction(Name, false) : 0;
++ }
++}
++
++extern "C" {
++ // getPointerToGlobalIfAvailable - same as the above, but for global
++ // variables, and only for those that have been codegened already.
++ void *getPointerToGlobalIfAvailable(GlobalValue *V) {
++ return !AllJits->empty() ? AllJits->getPointerToGlobalIfAvailable(V) : 0;
++ }
++}
++
+ JIT::JIT(Module *M, TargetMachine &tm, TargetJITInfo &tji,
+ JITMemoryManager *JMM, CodeGenOpt::Level OptLevel, bool GVsWithCode)
+ : ExecutionEngine(M), TM(tm), TJI(tji), AllocateGVsWithCode(GVsWithCode),
+Index: llvm-2.7/lib/Target/PowerPC/PPCISelLowering.cpp
+===================================================================
+--- llvm-2.7.orig/lib/Target/PowerPC/PPCISelLowering.cpp 2010-03-02 02:55:18.000000000 +0100
++++ llvm-2.7/lib/Target/PowerPC/PPCISelLowering.cpp 2010-07-12 11:03:03.047811849 +0200
+@@ -2450,6 +2450,9 @@
+ InFlag = Chain.getValue(1);
+ }
+
++extern "C" void *getPointerToNamedFunctionOrNull(const char *Name);
++extern "C" void *getPointerToGlobalIfAvailable(GlobalValue *Value);
++
+ static
+ unsigned PrepareCall(SelectionDAG &DAG, SDValue &Callee, SDValue &InFlag,
+ SDValue &Chain, DebugLoc dl, int SPDiff, bool isTailCall,
+@@ -2462,6 +2465,29 @@
+
+ unsigned CallOpc = isSVR4ABI ? PPCISD::CALL_SVR4 : PPCISD::CALL_Darwin;
+
++ // XXX Work around for http://llvm.org/bugs/show_bug.cgi?id=5201
++ // and http://icedtea.classpath.org/bugzilla/show_bug.cgi?id=399
++ // for Shark.
++ //
++ // If the callee is an ExternalSymbol node, and the symbol can be
++ // resolved to a function pointer, then insert that pointer as a
++ // constant. This causes the next block of code to fall into the
++ // block that emits an indirect call. This works around
++ //
++ // This works for Shark because the only kinds of call that Shark
++ // makes that do not already fall into the indirect call block are
++ // calls to pre-existing external functions.
++ if (ExternalSymbolSDNode *S = dyn_cast<ExternalSymbolSDNode>(Callee)) {
++ void *FuncPtr = getPointerToNamedFunctionOrNull(S->getSymbol());
++ if (FuncPtr)
++ Callee = DAG.getConstant((uint64_t) FuncPtr, PtrVT);
++ }
++ if (GlobalAddressSDNode *G = dyn_cast<GlobalAddressSDNode>(Callee)) {
++ void *FuncPtr = getPointerToGlobalIfAvailable(G->getGlobal());
++ if (FuncPtr)
++ Callee = DAG.getConstant((uint64_t) FuncPtr, PtrVT);
++ }
++
+ // If the callee is a GlobalAddress/ExternalSymbol node (quite common, every
+ // direct call is) turn it into a TargetGlobalAddress/TargetExternalSymbol
+ // node so that legalize doesn't hack it.
+Index: llvm-2.7/lib/Target/ARM/ARMISelLowering.cpp
+===================================================================
+--- llvm-2.7.orig/lib/Target/ARM/ARMISelLowering.cpp 2010-03-02 02:55:18.000000000 +0100
++++ llvm-2.7/lib/Target/ARM/ARMISelLowering.cpp 2010-07-12 11:03:03.057827385 +0200
+@@ -895,6 +895,9 @@
+ }
+ }
+
++extern "C" void *getPointerToNamedFunctionOrNull(const char *Name);
++extern "C" void *getPointerToGlobalIfAvailable(GlobalValue *Value);
++
+ /// LowerCall - Lowering a call into a callseq_start <-
+ /// ARMISD:CALL <- callseq_end chain. Also add input and output parameter
+ /// nodes.
+@@ -1004,6 +1007,31 @@
+ InFlag = Chain.getValue(1);
+ }
+
++ EVT PtrVT = DAG.getTargetLoweringInfo().getPointerTy();
++
++ // XXX Work around for http://llvm.org/bugs/show_bug.cgi?id=5201
++ // and http://icedtea.classpath.org/bugzilla/show_bug.cgi?id=399
++ // for Shark.
++ //
++ // If the callee is an ExternalSymbol node, and the symbol can be
++ // resolved to a function pointer, then insert that pointer as a
++ // constant. This causes the next block of code to fall into the
++ // block that emits an indirect call. This works around
++ //
++ // This works for Shark because the only kinds of call that Shark
++ // makes that do not already fall into the indirect call block are
++ // calls to pre-existing external functions.
++ if (ExternalSymbolSDNode *S = dyn_cast<ExternalSymbolSDNode>(Callee)) {
++ void *FuncPtr = getPointerToNamedFunctionOrNull(S->getSymbol());
++ if (FuncPtr)
++ Callee = DAG.getConstant((uint64_t) FuncPtr, PtrVT);
++ }
++ if (GlobalAddressSDNode *G = dyn_cast<GlobalAddressSDNode>(Callee)) {
++ void *FuncPtr = getPointerToGlobalIfAvailable(G->getGlobal());
++ if (FuncPtr)
++ Callee = DAG.getConstant((uint64_t) FuncPtr, PtrVT);
++ }
++
+ // If the callee is a GlobalAddress/ExternalSymbol node (quite common, every
+ // direct call is) turn it into a TargetGlobalAddress/TargetExternalSymbol
+ // node so that legalize doesn't hack it.
+Index: llvm-2.7/tools/llc/CMakeLists.txt
+===================================================================
+--- llvm-2.7.orig/tools/llc/CMakeLists.txt 2009-09-03 00:45:31.000000000 +0200
++++ llvm-2.7/tools/llc/CMakeLists.txt 2010-07-12 11:03:03.057827385 +0200
+@@ -1,4 +1,4 @@
+-set(LLVM_LINK_COMPONENTS ${LLVM_TARGETS_TO_BUILD} bitreader asmparser)
++set(LLVM_LINK_COMPONENTS ${LLVM_TARGETS_TO_BUILD} jit bitreader asmparser)
+
+ add_llvm_tool(llc
+ llc.cpp
+Index: llvm-2.7/tools/llvm-mc/CMakeLists.txt
+===================================================================
+--- llvm-2.7.orig/tools/llvm-mc/CMakeLists.txt 2010-07-12 11:07:09.417811782 +0200
++++ llvm-2.7/tools/llvm-mc/CMakeLists.txt 2010-07-12 11:07:19.866561599 +0200
+@@ -1,4 +1,4 @@
+-set(LLVM_LINK_COMPONENTS ${LLVM_TARGETS_TO_BUILD} support MC MCParser)
++set(LLVM_LINK_COMPONENTS ${LLVM_TARGETS_TO_BUILD} jit support MC MCParser)
+
+ add_llvm_tool(llvm-mc
+ llvm-mc.cpp
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