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-rw-r--r--recipes/linux/linux-2.6.27/ts72xx/0009-CPU-info-and-board-revision.patch64
1 files changed, 64 insertions, 0 deletions
diff --git a/recipes/linux/linux-2.6.27/ts72xx/0009-CPU-info-and-board-revision.patch b/recipes/linux/linux-2.6.27/ts72xx/0009-CPU-info-and-board-revision.patch
new file mode 100644
index 0000000000..5dd360a796
--- /dev/null
+++ b/recipes/linux/linux-2.6.27/ts72xx/0009-CPU-info-and-board-revision.patch
@@ -0,0 +1,64 @@
+From 3f48e4dc8affb4ddfe7b1ca8f209003cfb8ac314 Mon Sep 17 00:00:00 2001
+From: Matthieu Crapet <mcrapet@gmail.com>
+Date: Sat, 3 Jan 2009 22:19:21 +0100
+Subject: [PATCH] CPU info and board revision
+MIME-Version: 1.0
+Content-Type: text/plain; charset=utf-8
+Content-Transfer-Encoding: 8bit
+
+Adds support for SoC's unique ID (Maverick Key) in /proc/cpuinfo and
+information about board revision.
+
+Signed-off-by: Petr Štetiar <ynezz@true.cz>
+---
+ arch/arm/kernel/setup.c | 9 +++++++++
+ arch/arm/mach-ep93xx/include/mach/ep93xx-regs.h | 3 +++
+ 2 files changed, 12 insertions(+), 0 deletions(-)
+
+diff --git a/arch/arm/kernel/setup.c b/arch/arm/kernel/setup.c
+index 2ca7038..891fcf3 100644
+--- a/arch/arm/kernel/setup.c
++++ b/arch/arm/kernel/setup.c
+@@ -994,9 +994,18 @@ static int c_show(struct seq_file *m, void *v)
+ seq_puts(m, "\n");
+
+ seq_printf(m, "Hardware\t: %s\n", machine_name);
++
++#if defined(CONFIG_ARCH_EP93XX)
++#include <mach/ep93xx-regs.h>
++ seq_printf(m, "Revision\t: %04x\n",
++ *((unsigned int *)EP93XX_SYSCON_CHIPID) >> 28);
++ seq_printf(m, "Serial\t\t: %016x\n",
++ *((unsigned int *)EP93XX_SECURITY_UNIQID));
++#else
+ seq_printf(m, "Revision\t: %04x\n", system_rev);
+ seq_printf(m, "Serial\t\t: %08x%08x\n",
+ system_serial_high, system_serial_low);
++#endif
+
+ return 0;
+ }
+diff --git a/arch/arm/mach-ep93xx/include/mach/ep93xx-regs.h b/arch/arm/mach-ep93xx/include/mach/ep93xx-regs.h
+index 5582138..e26b41b 100644
+--- a/arch/arm/mach-ep93xx/include/mach/ep93xx-regs.h
++++ b/arch/arm/mach-ep93xx/include/mach/ep93xx-regs.h
+@@ -70,6 +70,8 @@
+ #define EP93XX_I2S_BASE (EP93XX_APB_VIRT_BASE + 0x00020000)
+
+ #define EP93XX_SECURITY_BASE (EP93XX_APB_VIRT_BASE + 0x00030000)
++#define EP93XX_SECURITY_REG(x) (EP93XX_SECURITY_BASE + (x))
++#define EP93XX_SECURITY_UNIQID EP93XX_SECURITY_REG(0x2440)
+
+ #define EP93XX_GPIO_BASE (EP93XX_APB_VIRT_BASE + 0x00040000)
+ #define EP93XX_GPIO_REG(x) (EP93XX_GPIO_BASE + (x))
+@@ -129,6 +131,7 @@
+ #define EP93XX_SYSCON_DEVICE_CONFIG EP93XX_SYSCON_REG(0x80)
+ #define EP93XX_SYSCON_DEVICE_CONFIG_CRUNCH_ENABLE 0x00800000
+ #define EP93XX_SYSCON_SWLOCK EP93XX_SYSCON_REG(0xc0)
++#define EP93XX_SYSCON_CHIPID EP93XX_SYSCON_REG(0x94)
+
+ #define EP93XX_WATCHDOG_BASE (EP93XX_APB_VIRT_BASE + 0x00140000)
+
+--
+1.6.0.4
+