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-rw-r--r--recipes/glibc/glibc-cvs-2.3.5/arm-audit.patch58
-rw-r--r--recipes/glibc/glibc-cvs-2.3.5/arm-audit2.patch18
-rw-r--r--recipes/glibc/glibc-cvs-2.3.5/arm-longlong.patch59
-rw-r--r--recipes/glibc/glibc-cvs-2.3.5/arm-memcpy.patch758
-rw-r--r--recipes/glibc/glibc-cvs-2.3.5/arm-no-hwcap.patch11
-rw-r--r--recipes/glibc/glibc-cvs-2.3.5/dl-cache-libcmp.patch10
-rw-r--r--recipes/glibc/glibc-cvs-2.3.5/dyn-ldconfig-20041128.patch22
-rw-r--r--recipes/glibc/glibc-cvs-2.3.5/ldsocache-varrun.patch18
-rw-r--r--recipes/glibc/glibc-cvs-2.3.5/no-z-defs.patch9
-rw-r--r--recipes/glibc/glibc-cvs-2.3.5/raise.patch37
-rw-r--r--recipes/glibc/glibc-cvs-2.3.5/superh-fcntl.patch40
-rw-r--r--recipes/glibc/glibc-cvs-2.3.5/zecke-sane-readelf.patch154
12 files changed, 1194 insertions, 0 deletions
diff --git a/recipes/glibc/glibc-cvs-2.3.5/arm-audit.patch b/recipes/glibc/glibc-cvs-2.3.5/arm-audit.patch
new file mode 100644
index 0000000000..2404f755e7
--- /dev/null
+++ b/recipes/glibc/glibc-cvs-2.3.5/arm-audit.patch
@@ -0,0 +1,58 @@
+2005-05-09 Daniel Jacobowitz <dan@codesourcery.com>
+ Mark Mitchell <mark@codesourcery.com>
+
+ * sysdeps/generic/ldsodefs.h (struct audit_ifaces): Add ARM entries.
+ * elf/tst-auditmod1.c: Add ARM definitions.
+
+Index: glibc/sysdeps/generic/ldsodefs.h
+===================================================================
+--- glibc.orig/sysdeps/generic/ldsodefs.h 2005-04-05 17:36:52.000000000 -0400
++++ glibc/sysdeps/generic/ldsodefs.h 2005-05-06 15:54:44.000000000 -0400
+@@ -203,6 +203,8 @@ struct La_sparc32_regs;
+ struct La_sparc32_retval;
+ struct La_sparc64_regs;
+ struct La_sparc64_retval;
++struct La_arm_regs;
++struct La_arm_retval;
+
+ struct audit_ifaces
+ {
+@@ -284,6 +286,10 @@ struct audit_ifaces
+ const struct La_sparc64_regs *,
+ unsigned int *, const char *name,
+ long int *framesizep);
++ Elf32_Addr (*arm_gnu_pltenter) (Elf32_Sym *, unsigned int, uintptr_t *,
++ uintptr_t *, struct La_arm_regs *,
++ unsigned int *, const char *name,
++ long int *framesizep);
+ };
+ union
+ {
+@@ -352,6 +358,9 @@ struct audit_ifaces
+ const struct La_sparc32_regs *,
+ struct La_sparc32_retval *,
+ const char *);
++ unsigned int (*arm_gnu_pltexit) (Elf32_Sym *, unsigned int, uintptr_t *,
++ uintptr_t *, const struct La_arm_regs *,
++ struct La_arm_retval *, const char *);
+ };
+ unsigned int (*objclose) (uintptr_t *);
+
+Index: glibc/elf/tst-auditmod1.c
+===================================================================
+--- glibc.orig/elf/tst-auditmod1.c 2005-04-05 17:36:53.000000000 -0400
++++ glibc/elf/tst-auditmod1.c 2005-05-06 15:53:28.000000000 -0400
+@@ -192,6 +192,12 @@ la_symbind64 (Elf64_Sym *sym, unsigned i
+ # define La_regs La_sparc64_regs
+ # define La_retval La_sparc64_retval
+ # define int_retval lrv_reg[0]
++#elif __arm__
++# define pltenter la_arm_gnu_pltenter
++# define pltext la_arm_gnu_pltexit
++# define La_regs La_arm_regs
++# define La_retval La_arm_retval
++# define int_retval lrv_reg[0]
+ #else
+ # error "architecture specific code needed"
+ #endif
+
diff --git a/recipes/glibc/glibc-cvs-2.3.5/arm-audit2.patch b/recipes/glibc/glibc-cvs-2.3.5/arm-audit2.patch
new file mode 100644
index 0000000000..855632c53e
--- /dev/null
+++ b/recipes/glibc/glibc-cvs-2.3.5/arm-audit2.patch
@@ -0,0 +1,18 @@
+Index: ports/sysdeps/arm/dl-machine.h
+===================================================================
+RCS file: /cvs/glibc/ports/sysdeps/arm/dl-machine.h,v
+retrieving revision 1.53
+diff -u -r1.53 dl-machine.h
+--- libc/ports/sysdeps/arm/dl-machine.h 10 Jun 2005 11:33:52 -0000 1.53
++++ libc/ports/sysdeps/arm/dl-machine.h 11 Jun 2005 08:58:04 -0000
+@@ -243,6 +243,10 @@
+ Prelinked libraries may use Elf32_Rela though. */
+ #define ELF_MACHINE_NO_RELA defined RTLD_BOOTSTRAP
+
++/* Names of the architecture-specific auditing callback functions. */
++#define ARCH_LA_PLTENTER arm_gnu_pltenter
++#define ARCH_LA_PLTEXIT arm_gnu_pltexit
++
+ #ifdef RESOLVE_MAP
+
+ /* Deal with an out-of-range PC24 reloc. */
diff --git a/recipes/glibc/glibc-cvs-2.3.5/arm-longlong.patch b/recipes/glibc/glibc-cvs-2.3.5/arm-longlong.patch
new file mode 100644
index 0000000000..a0b2ed0039
--- /dev/null
+++ b/recipes/glibc/glibc-cvs-2.3.5/arm-longlong.patch
@@ -0,0 +1,59 @@
+--- stdlib/longlong.h~ 2002-09-29 18:45:58.000000000 +0100
++++ stdlib/longlong.h 2004-03-20 19:16:44.000000000 +0000
+@@ -210,6 +210,14 @@
+ "rI" ((USItype) (bh)), \
+ "r" ((USItype) (al)), \
+ "rI" ((USItype) (bl)))
++/* v3m and all higher arches have long multiply support. */
++#if !defined(__ARM_ARCH_2__) && !defined(__ARM_ARCH_3__)
++#define umul_ppmm(xh, xl, a, b) \
++ __asm__ ("umull %0,%1,%2,%3" : "=&r" (xl), "=&r" (xh) : "r" (a), "r" (b))
++#define UMUL_TIME 5
++#define smul_ppmm(xh, xl, a, b) \
++ __asm__ ("smull %0,%1,%2,%3" : "=&r" (xl), "=&r" (xh) : "r" (a), "r" (b))
++#else
+ #define umul_ppmm(xh, xl, a, b) \
+ {register USItype __t0, __t1, __t2; \
+ __asm__ ("%@ Inlined umul_ppmm\n" \
+@@ -231,7 +239,14 @@
+ : "r" ((USItype) (a)), \
+ "r" ((USItype) (b)));}
+ #define UMUL_TIME 20
++#endif
+ #define UDIV_TIME 100
++
++#if defined(__ARM_ARCH_5__) || defined(__ARM_ARCH_5T__) || defined(__ARM_ARCH_5TE__)
++#define count_leading_zeros(COUNT,X) ((COUNT) = __builtin_clz (X))
++#define COUNT_LEADING_ZEROS_0 32
++#endif
++
+ #endif /* __arm__ */
+
+ #if defined (__hppa) && W_TYPE_SIZE == 32
+--- /dev/null 2004-02-02 20:32:13.000000000 +0000
++++ ports/sysdeps/arm/mp_clz_tab.c 2004-03-20 19:24:26.000000000 +0000
+@@ -0,0 +1,24 @@
++/* __clz_tab -- support for longlong.h
++ Copyright (C) 2004 Free Software Foundation, Inc.
++ This file is part of the GNU C Library.
++
++ The GNU C Library is free software; you can redistribute it and/or
++ modify it under the terms of the GNU Lesser General Public
++ License as published by the Free Software Foundation; either
++ version 2.1 of the License, or (at your option) any later version.
++
++ The GNU C Library is distributed in the hope that it will be useful,
++ but WITHOUT ANY WARRANTY; without even the implied warranty of
++ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
++ Lesser General Public License for more details.
++
++ You should have received a copy of the GNU Lesser General Public
++ License along with the GNU C Library; if not, write to the Free
++ Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
++ 02111-1307 USA. */
++
++#if defined(__ARM_ARCH_5__) || defined(__ARM_ARCH_5T__) || defined(__ARM_ARCH_5TE__)
++/* Nothing required. */
++#else
++#include <sysdeps/generic/mp_clz_tab.c>
++#endif
diff --git a/recipes/glibc/glibc-cvs-2.3.5/arm-memcpy.patch b/recipes/glibc/glibc-cvs-2.3.5/arm-memcpy.patch
new file mode 100644
index 0000000000..db1120058b
--- /dev/null
+++ b/recipes/glibc/glibc-cvs-2.3.5/arm-memcpy.patch
@@ -0,0 +1,758 @@
+--- /dev/null 2004-02-02 20:32:13.000000000 +0000
++++ libc/ports/sysdeps/arm/memmove.S 2004-03-20 18:37:23.000000000 +0000
+@@ -0,0 +1,251 @@
++/*
++ * Optimized memmove implementation for ARM processors
++ *
++ * Author: Nicolas Pitre
++ * Created: Dec 23, 2003
++ * Copyright: (C) MontaVista Software, Inc.
++ *
++ * This file is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU Lesser General Public
++ * License as published by the Free Software Foundation; either
++ * version 2.1 of the License, or (at your option) any later version.
++ *
++ * This file is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
++ * Lesser General Public License for more details.
++ */
++
++#include <sysdep.h>
++
++
++/*
++ * Endian independent macros for shifting bytes within registers.
++ */
++#ifndef __ARMEB__
++#define pull lsr
++#define push lsl
++#else
++#define pull lsl
++#define push lsr
++#endif
++
++/*
++ * Enable data preload for architectures that support it (ARMv5 and above)
++ */
++#if defined(__ARM_ARCH_5__) || \
++ defined(__ARM_ARCH_5T__) || \
++ defined(__ARM_ARCH_5TE__)
++#define PLD(code...) code
++#else
++#define PLD(code...)
++#endif
++
++
++/* char * memmove (char *dst, const char *src) */
++ENTRY(memmove)
++ subs ip, r0, r1
++ cmphi r2, ip
++ bls memcpy(PLT)
++
++ stmfd sp!, {r0, r4, lr}
++ add r1, r1, r2
++ add r0, r0, r2
++ subs r2, r2, #4
++ blt 25f
++ ands ip, r0, #3
++ PLD( pld [r1, #-4] )
++ bne 26f
++ ands ip, r1, #3
++ bne 27f
++
++19: subs r2, r2, #4
++ blt 24f
++ subs r2, r2, #8
++ blt 23f
++ subs r2, r2, #16
++ blt 22f
++
++ PLD( pld [r1, #-32] )
++ PLD( subs r2, r2, #96 )
++ stmfd sp!, {r5 - r8}
++ PLD( blt 21f )
++
++ PLD( @ cache alignment )
++ PLD( ands ip, r1, #31 )
++ PLD( pld [r1, #-64] )
++ PLD( beq 20f )
++ PLD( cmp r2, ip )
++ PLD( pld [r1, #-96] )
++ PLD( blt 20f )
++ PLD( cmp ip, #16 )
++ PLD( sub r2, r2, ip )
++ PLD( ldmgedb r1!, {r3 - r6} )
++ PLD( stmgedb r0!, {r3 - r6} )
++ PLD( beq 20f )
++ PLD( and ip, ip, #15 )
++ PLD( cmp ip, #8 )
++ PLD( ldr r3, [r1, #-4]! )
++ PLD( ldrge r4, [r1, #-4]! )
++ PLD( ldrgt r5, [r1, #-4]! )
++ PLD( str r3, [r0, #-4]! )
++ PLD( strge r4, [r0, #-4]! )
++ PLD( strgt r5, [r0, #-4]! )
++
++20: PLD( pld [r1, #-96] )
++ PLD( pld [r1, #-128] )
++21: ldmdb r1!, {r3, r4, ip, lr}
++ subs r2, r2, #32
++ stmdb r0!, {r3, r4, ip, lr}
++ ldmdb r1!, {r3, r4, ip, lr}
++ stmgedb r0!, {r3, r4, ip, lr}
++ ldmgedb r1!, {r3, r4, ip, lr}
++ stmgedb r0!, {r3, r4, ip, lr}
++ ldmgedb r1!, {r3, r4, ip, lr}
++ subges r2, r2, #32
++ stmdb r0!, {r3, r4, ip, lr}
++ bge 20b
++ PLD( cmn r2, #96 )
++ PLD( bge 21b )
++ PLD( add r2, r2, #96 )
++ tst r2, #31
++ ldmfd sp!, {r5 - r8}
++ ldmeqfd sp!, {r0, r4, pc}
++
++ tst r2, #16
++22: ldmnedb r1!, {r3, r4, ip, lr}
++ stmnedb r0!, {r3, r4, ip, lr}
++
++ tst r2, #8
++23: ldmnedb r1!, {r3, r4}
++ stmnedb r0!, {r3, r4}
++
++ tst r2, #4
++24: ldrne r3, [r1, #-4]!
++ strne r3, [r0, #-4]!
++
++25: ands r2, r2, #3
++ ldmeqfd sp!, {r0, r4, pc}
++
++ cmp r2, #2
++ ldrb r3, [r1, #-1]
++ ldrgeb r4, [r1, #-2]
++ ldrgtb ip, [r1, #-3]
++ strb r3, [r0, #-1]
++ strgeb r4, [r0, #-2]
++ strgtb ip, [r0, #-3]
++ ldmfd sp!, {r0, r4, pc}
++
++26: cmp ip, #2
++ ldrb r3, [r1, #-1]!
++ ldrgeb r4, [r1, #-1]!
++ ldrgtb lr, [r1, #-1]!
++ strb r3, [r0, #-1]!
++ strgeb r4, [r0, #-1]!
++ strgtb lr, [r0, #-1]!
++ subs r2, r2, ip
++ blt 25b
++ ands ip, r1, #3
++ beq 19b
++
++27: bic r1, r1, #3
++ cmp ip, #2
++ ldr r3, [r1]
++ beq 35f
++ blt 36f
++
++
++ .macro backward_copy_shift push pull
++
++ cmp r2, #12
++ PLD( pld [r1, #-4] )
++ blt 33f
++ subs r2, r2, #28
++ stmfd sp!, {r5 - r9}
++ blt 31f
++
++ PLD( subs r2, r2, #96 )
++ PLD( pld [r1, #-32] )
++ PLD( blt 30f )
++ PLD( pld [r1, #-64] )
++
++ PLD( @ cache alignment )
++ PLD( ands ip, r1, #31 )
++ PLD( pld [r1, #-96] )
++ PLD( beq 29f )
++ PLD( cmp r2, ip )
++ PLD( pld [r1, #-128] )
++ PLD( blt 29f )
++ PLD( sub r2, r2, ip )
++28: PLD( mov r4, r3, push #\push )
++ PLD( ldr r3, [r1, #-4]! )
++ PLD( subs ip, ip, #4 )
++ PLD( orr r4, r4, r3, pull #\pull )
++ PLD( str r4, [r0, #-4]! )
++ PLD( bgt 28b )
++
++29: PLD( pld [r1, #-128] )
++30: mov lr, r3, push #\push
++ ldmdb r1!, {r3 - r9, ip}
++ subs r2, r2, #32
++ orr lr, lr, ip, pull #\pull
++ mov ip, ip, push #\push
++ orr ip, ip, r9, pull #\pull
++ mov r9, r9, push #\push
++ orr r9, r9, r8, pull #\pull
++ mov r8, r8, push #\push
++ orr r8, r8, r7, pull #\pull
++ mov r7, r7, push #\push
++ orr r7, r7, r6, pull #\pull
++ mov r6, r6, push #\push
++ orr r6, r6, r5, pull #\pull
++ mov r5, r5, push #\push
++ orr r5, r5, r4, pull #\pull
++ mov r4, r4, push #\push
++ orr r4, r4, r3, pull #\pull
++ stmdb r0!, {r4 - r9, ip, lr}
++ bge 29b
++ PLD( cmn r2, #96 )
++ PLD( bge 30b )
++ PLD( add r2, r2, #96 )
++ cmn r2, #16
++ blt 32f
++31: mov r7, r3, push #\push
++ ldmdb r1!, {r3 - r6}
++ sub r2, r2, #16
++ orr r7, r7, r6, pull #\pull
++ mov r6, r6, push #\push
++ orr r6, r6, r5, pull #\pull
++ mov r5, r5, push #\push
++ orr r5, r5, r4, pull #\pull
++ mov r4, r4, push #\push
++ orr r4, r4, r3, pull #\pull
++ stmdb r0!, {r4 - r7}
++32: adds r2, r2, #28
++ ldmfd sp!, {r5 - r9}
++ blt 34f
++33: mov r4, r3, push #\push
++ ldr r3, [r1, #-4]!
++ subs r2, r2, #4
++ orr r4, r4, r3, pull #\pull
++ str r4, [r0, #-4]!
++ bge 33b
++34:
++ .endm
++
++
++ backward_copy_shift push=8 pull=24
++ add r1, r1, #3
++ b 25b
++
++35: backward_copy_shift push=16 pull=16
++ add r1, r1, #2
++ b 25b
++
++36: backward_copy_shift push=24 pull=8
++ add r1, r1, #1
++ b 25b
++
++ .size memmove, . - memmove
++END(memmove)
++libc_hidden_builtin_def (memmove)
+--- /dev/null 2004-02-02 20:32:13.000000000 +0000
++++ libc/ports/sysdeps/arm/bcopy.S 2004-03-20 18:37:48.000000000 +0000
+@@ -0,0 +1,255 @@
++/*
++ * Optimized memmove implementation for ARM processors
++ *
++ * Author: Nicolas Pitre
++ * Created: Dec 23, 2003
++ * Copyright: (C) MontaVista Software, Inc.
++ *
++ * This file is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU Lesser General Public
++ * License as published by the Free Software Foundation; either
++ * version 2.1 of the License, or (at your option) any later version.
++ *
++ * This file is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
++ * Lesser General Public License for more details.
++ */
++
++#include <sysdep.h>
++
++
++/*
++ * Endian independent macros for shifting bytes within registers.
++ */
++#ifndef __ARMEB__
++#define pull lsr
++#define push lsl
++#else
++#define pull lsl
++#define push lsr
++#endif
++
++/*
++ * Enable data preload for architectures that support it (ARMv5 and above)
++ */
++#if defined(__ARM_ARCH_5__) || \
++ defined(__ARM_ARCH_5T__) || \
++ defined(__ARM_ARCH_5TE__)
++#define PLD(code...) code
++#else
++#define PLD(code...)
++#endif
++
++dst .req r1
++src .req r0
++
++/* void *bcopy (const char *src, char *dst, size_t size) */
++ENTRY(bcopy)
++ subs ip, dst, src
++ cmphi r2, ip
++ movls r3, r0
++ movls r0, r1
++ movls r1, r3
++ bls memcpy(PLT)
++
++ stmfd sp!, {r4, lr}
++ add src, src, r2
++ add dst, dst, r2
++ subs r2, r2, #4
++ blt 25f
++ ands ip, dst, #3
++ PLD( pld [src, #-4] )
++ bne 26f
++ ands ip, src, #3
++ bne 27f
++
++19: subs r2, r2, #4
++ blt 24f
++ subs r2, r2, #8
++ blt 23f
++ subs r2, r2, #16
++ blt 22f
++
++ PLD( pld [src, #-32] )
++ PLD( subs r2, r2, #96 )
++ stmfd sp!, {r5 - r8}
++ PLD( blt 21f )
++
++ PLD( @ cache alignment )
++ PLD( ands ip, src, #31 )
++ PLD( pld [src, #-64] )
++ PLD( beq 20f )
++ PLD( cmp r2, ip )
++ PLD( pld [src, #-96] )
++ PLD( blt 20f )
++ PLD( cmp ip, #16 )
++ PLD( sub r2, r2, ip )
++ PLD( ldmgedb src!, {r3 - r6} )
++ PLD( stmgedb dst!, {r3 - r6} )
++ PLD( beq 20f )
++ PLD( and ip, ip, #15 )
++ PLD( cmp ip, #8 )
++ PLD( ldr r3, [src, #-4]! )
++ PLD( ldrge r4, [src, #-4]! )
++ PLD( ldrgt r5, [src, #-4]! )
++ PLD( str r3, [dst, #-4]! )
++ PLD( strge r4, [dst, #-4]! )
++ PLD( strgt r5, [dst, #-4]! )
++
++20: PLD( pld [src, #-96] )
++ PLD( pld [src, #-128] )
++21: ldmdb src!, {r3, r4, ip, lr}
++ subs r2, r2, #32
++ stmdb dst!, {r3, r4, ip, lr}
++ ldmdb src!, {r3, r4, ip, lr}
++ stmgedb dst!, {r3, r4, ip, lr}
++ ldmgedb src!, {r3, r4, ip, lr}
++ stmgedb dst!, {r3, r4, ip, lr}
++ ldmgedb src!, {r3, r4, ip, lr}
++ subges r2, r2, #32
++ stmdb dst!, {r3, r4, ip, lr}
++ bge 20b
++ PLD( cmn r2, #96 )
++ PLD( bge 21b )
++ PLD( add r2, r2, #96 )
++ tst r2, #31
++ ldmfd sp!, {r5 - r8}
++ ldmeqfd sp!, {r4, pc}
++
++ tst r2, #16
++22: ldmnedb src!, {r3, r4, ip, lr}
++ stmnedb dst!, {r3, r4, ip, lr}
++
++ tst r2, #8
++23: ldmnedb src!, {r3, r4}
++ stmnedb dst!, {r3, r4}
++
++ tst r2, #4
++24: ldrne r3, [src, #-4]!
++ strne r3, [dst, #-4]!
++
++25: ands r2, r2, #3
++ ldmeqfd sp!, {dst, r4, pc}
++
++ cmp r2, #2
++ ldrb r3, [src, #-1]
++ ldrgeb r4, [src, #-2]
++ ldrgtb ip, [src, #-3]
++ strb r3, [dst, #-1]
++ strgeb r4, [dst, #-2]
++ strgtb ip, [dst, #-3]
++ ldmfd sp!, {dst, r4, pc}
++
++26: cmp ip, #2
++ ldrb r3, [src, #-1]!
++ ldrgeb r4, [src, #-1]!
++ ldrgtb lr, [src, #-1]!
++ strb r3, [dst, #-1]!
++ strgeb r4, [dst, #-1]!
++ strgtb lr, [dst, #-1]!
++ subs r2, r2, ip
++ blt 25b
++ ands ip, src, #3
++ beq 19b
++
++27: bic src, src, #3
++ cmp ip, #2
++ ldr r3, [src]
++ beq 35f
++ blt 36f
++
++
++ .macro backward_copy_shift push pull
++
++ cmp r2, #12
++ PLD( pld [src, #-4] )
++ blt 33f
++ subs r2, r2, #28
++ stmfd sp!, {r5 - r9}
++ blt 31f
++
++ PLD( subs r2, r2, #96 )
++ PLD( pld [src, #-32] )
++ PLD( blt 30f )
++ PLD( pld [src, #-64] )
++
++ PLD( @ cache alignment )
++ PLD( ands ip, src, #31 )
++ PLD( pld [src, #-96] )
++ PLD( beq 29f )
++ PLD( cmp r2, ip )
++ PLD( pld [src, #-128] )
++ PLD( blt 29f )
++ PLD( sub r2, r2, ip )
++28: PLD( mov r4, r3, push #\push )
++ PLD( ldr r3, [src, #-4]! )
++ PLD( subs ip, ip, #4 )
++ PLD( orr r4, r4, r3, pull #\pull )
++ PLD( str r4, [dst, #-4]! )
++ PLD( bgt 28b )
++
++29: PLD( pld [src, #-128] )
++30: mov lr, r3, push #\push
++ ldmdb src!, {r3 - r9, ip}
++ subs r2, r2, #32
++ orr lr, lr, ip, pull #\pull
++ mov ip, ip, push #\push
++ orr ip, ip, r9, pull #\pull
++ mov r9, r9, push #\push
++ orr r9, r9, r8, pull #\pull
++ mov r8, r8, push #\push
++ orr r8, r8, r7, pull #\pull
++ mov r7, r7, push #\push
++ orr r7, r7, r6, pull #\pull
++ mov r6, r6, push #\push
++ orr r6, r6, r5, pull #\pull
++ mov r5, r5, push #\push
++ orr r5, r5, r4, pull #\pull
++ mov r4, r4, push #\push
++ orr r4, r4, r3, pull #\pull
++ stmdb dst!, {r4 - r9, ip, lr}
++ bge 29b
++ PLD( cmn r2, #96 )
++ PLD( bge 30b )
++ PLD( add r2, r2, #96 )
++ cmn r2, #16
++ blt 32f
++31: mov r7, r3, push #\push
++ ldmdb src!, {r3 - r6}
++ sub r2, r2, #16
++ orr r7, r7, r6, pull #\pull
++ mov r6, r6, push #\push
++ orr r6, r6, r5, pull #\pull
++ mov r5, r5, push #\push
++ orr r5, r5, r4, pull #\pull
++ mov r4, r4, push #\push
++ orr r4, r4, r3, pull #\pull
++ stmdb dst!, {r4 - r7}
++32: adds r2, r2, #28
++ ldmfd sp!, {r5 - r9}
++ blt 34f
++33: mov r4, r3, push #\push
++ ldr r3, [src, #-4]!
++ subs r2, r2, #4
++ orr r4, r4, r3, pull #\pull
++ str r4, [dst, #-4]!
++ bge 33b
++34:
++ .endm
++
++
++ backward_copy_shift push=8 pull=24
++ add src, src, #3
++ b 25b
++
++35: backward_copy_shift push=16 pull=16
++ add src, src, #2
++ b 25b
++
++36: backward_copy_shift push=24 pull=8
++ add src, src, #1
++ b 25b
++
++ .size bcopy, . - bcopy
++END(bcopy)
+
+--- /dev/null 2004-02-02 20:32:13.000000000 +0000
++++ libc/ports/sysdeps/arm/memcpy.S 2004-05-02 14:33:22.000000000 +0100
+@@ -0,0 +1,242 @@
++/*
++ * Optimized memcpy implementation for ARM processors
++ *
++ * Author: Nicolas Pitre
++ * Created: Dec 23, 2003
++ * Copyright: (C) MontaVista Software, Inc.
++ *
++ * This file is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU Lesser General Public
++ * License as published by the Free Software Foundation; either
++ * version 2.1 of the License, or (at your option) any later version.
++ *
++ * This file is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
++ * Lesser General Public License for more details.
++ */
++
++#include <sysdep.h>
++
++
++/*
++ * Endian independent macros for shifting bytes within registers.
++ */
++#ifndef __ARMEB__
++#define pull lsr
++#define push lsl
++#else
++#define pull lsl
++#define push lsr
++#endif
++
++/*
++ * Enable data preload for architectures that support it (ARMv5 and above)
++ */
++#if defined(__ARM_ARCH_5__) || \
++ defined(__ARM_ARCH_5T__) || \
++ defined(__ARM_ARCH_5TE__)
++#define PLD(code...) code
++#else
++#define PLD(code...)
++#endif
++
++
++/* char * memcpy (char *dst, const char *src) */
++
++ENTRY(memcpy)
++ subs r2, r2, #4
++ stmfd sp!, {r0, r4, lr}
++ blt 7f
++ ands ip, r0, #3
++ PLD( pld [r1, #0] )
++ bne 8f
++ ands ip, r1, #3
++ bne 9f
++
++1: subs r2, r2, #4
++ blt 6f
++ subs r2, r2, #8
++ blt 5f
++ subs r2, r2, #16
++ blt 4f
++
++ PLD( subs r2, r2, #65 )
++ stmfd sp!, {r5 - r8}
++ PLD( blt 3f )
++ PLD( pld [r1, #32] )
++
++ PLD( @ cache alignment )
++ PLD( ands ip, r1, #31 )
++ PLD( pld [r1, #64] )
++ PLD( beq 2f )
++ PLD( rsb ip, ip, #32 )
++ PLD( cmp r2, ip )
++ PLD( pld [r1, #96] )
++ PLD( blt 2f )
++ PLD( cmp ip, #16 )
++ PLD( sub r2, r2, ip )
++ PLD( ldmgeia r1!, {r3 - r6} )
++ PLD( stmgeia r0!, {r3 - r6} )
++ PLD( beq 2f )
++ PLD( and ip, ip, #15 )
++ PLD( cmp ip, #8 )
++ PLD( ldr r3, [r1], #4 )
++ PLD( ldrge r4, [r1], #4 )
++ PLD( ldrgt r5, [r1], #4 )
++ PLD( str r3, [r0], #4 )
++ PLD( strge r4, [r0], #4 )
++ PLD( strgt r5, [r0], #4 )
++
++2: PLD( pld [r1, #96] )
++3: ldmia r1!, {r3 - r8, ip, lr}
++ subs r2, r2, #32
++ stmia r0!, {r3 - r8, ip, lr}
++ bge 2b
++ PLD( cmn r2, #65 )
++ PLD( bge 3b )
++ PLD( add r2, r2, #65 )
++ tst r2, #31
++ ldmfd sp!, {r5 - r8}
++ ldmeqfd sp!, {r0, r4, pc}
++
++ tst r2, #16
++4: ldmneia r1!, {r3, r4, ip, lr}
++ stmneia r0!, {r3, r4, ip, lr}
++
++ tst r2, #8
++5: ldmneia r1!, {r3, r4}
++ stmneia r0!, {r3, r4}
++
++ tst r2, #4
++6: ldrne r3, [r1], #4
++ strne r3, [r0], #4
++
++7: ands r2, r2, #3
++ ldmeqfd sp!, {r0, r4, pc}
++
++ cmp r2, #2
++ ldrb r3, [r1], #1
++ ldrgeb r4, [r1], #1
++ ldrgtb ip, [r1]
++ strb r3, [r0], #1
++ strgeb r4, [r0], #1
++ strgtb ip, [r0]
++ ldmfd sp!, {r0, r4, pc}
++
++8: rsb ip, ip, #4
++ cmp ip, #2
++ ldrb r3, [r1], #1
++ ldrgeb r4, [r1], #1
++ ldrgtb lr, [r1], #1
++ strb r3, [r0], #1
++ strgeb r4, [r0], #1
++ strgtb lr, [r0], #1
++ subs r2, r2, ip
++ blt 7b
++ ands ip, r1, #3
++ beq 1b
++
++9: bic r1, r1, #3
++ cmp ip, #2
++ ldr lr, [r1], #4
++ beq 17f
++ bgt 18f
++
++
++ .macro forward_copy_shift pull push
++
++ cmp r2, #12
++ PLD( pld [r1, #0] )
++ blt 15f
++ subs r2, r2, #28
++ stmfd sp!, {r5 - r9}
++ blt 13f
++
++ PLD( subs r2, r2, #97 )
++ PLD( blt 12f )
++ PLD( pld [r1, #32] )
++
++ PLD( @ cache alignment )
++ PLD( rsb ip, r1, #36 )
++ PLD( pld [r1, #64] )
++ PLD( ands ip, ip, #31 )
++ PLD( pld [r1, #96] )
++ PLD( beq 11f )
++ PLD( cmp r2, ip )
++ PLD( pld [r1, #128] )
++ PLD( blt 11f )
++ PLD( sub r2, r2, ip )
++10: PLD( mov r3, lr, pull #\pull )
++ PLD( ldr lr, [r1], #4 )
++ PLD( subs ip, ip, #4 )
++ PLD( orr r3, r3, lr, push #\push )
++ PLD( str r3, [r0], #4 )
++ PLD( bgt 10b )
++
++11: PLD( pld [r1, #128] )
++12: mov r3, lr, pull #\pull
++ ldmia r1!, {r4 - r9, ip, lr}
++ subs r2, r2, #32
++ orr r3, r3, r4, push #\push
++ mov r4, r4, pull #\pull
++ orr r4, r4, r5, push #\push
++ mov r5, r5, pull #\pull
++ orr r5, r5, r6, push #\push
++ mov r6, r6, pull #\pull
++ orr r6, r6, r7, push #\push
++ mov r7, r7, pull #\pull
++ orr r7, r7, r8, push #\push
++ mov r8, r8, pull #\pull
++ orr r8, r8, r9, push #\push
++ mov r9, r9, pull #\pull
++ orr r9, r9, ip, push #\push
++ mov ip, ip, pull #\pull
++ orr ip, ip, lr, push #\push
++ stmia r0!, {r3 - r9, ip}
++ bge 11b
++ PLD( cmn r2, #97 )
++ PLD( bge 12b )
++ PLD( add r2, r2, #97 )
++ cmn r2, #16
++ blt 14f
++13: mov r3, lr, pull #\pull
++ ldmia r1!, {r4 - r6, lr}
++ sub r2, r2, #16
++ orr r3, r3, r4, push #\push
++ mov r4, r4, pull #\pull
++ orr r4, r4, r5, push #\push
++ mov r5, r5, pull #\pull
++ orr r5, r5, r6, push #\push
++ mov r6, r6, pull #\pull
++ orr r6, r6, lr, push #\push
++ stmia r0!, {r3 - r6}
++14: adds r2, r2, #28
++ ldmfd sp!, {r5 - r9}
++ blt 16f
++15: mov r3, lr, pull #\pull
++ ldr lr, [r1], #4
++ subs r2, r2, #4
++ orr r3, r3, lr, push #\push
++ str r3, [r0], #4
++ bge 15b
++16:
++ .endm
++
++
++ forward_copy_shift pull=8 push=24
++ sub r1, r1, #3
++ b 7b
++
++17: forward_copy_shift pull=16 push=16
++ sub r1, r1, #2
++ b 7b
++
++18: forward_copy_shift pull=24 push=8
++ sub r1, r1, #1
++ b 7b
++
++ .size memcpy, . - memcpy
++END(memcpy)
++libc_hidden_builtin_def (memcpy)
++
diff --git a/recipes/glibc/glibc-cvs-2.3.5/arm-no-hwcap.patch b/recipes/glibc/glibc-cvs-2.3.5/arm-no-hwcap.patch
new file mode 100644
index 0000000000..d3263a7dc6
--- /dev/null
+++ b/recipes/glibc/glibc-cvs-2.3.5/arm-no-hwcap.patch
@@ -0,0 +1,11 @@
+--- libc/ports/sysdeps/unix/sysv/linux/arm/dl-procinfo.h.orig 2005-12-11 14:49:51 +0100
++++ libc/ports/sysdeps/unix/sysv/linux/arm/dl-procinfo.h 2005-12-11 14:51:28 +0100
+@@ -64,7 +64,7 @@
+ HWCAP_ARM_VFP = 1 << 6,
+ HWCAP_ARM_EDSP = 1 << 7,
+
+- HWCAP_IMPORTANT = (HWCAP_ARM_HALF | HWCAP_ARM_FAST_MULT)
++ HWCAP_IMPORTANT = HWCAP_ARM_FAST_MULT
+ };
+
+ static inline int
diff --git a/recipes/glibc/glibc-cvs-2.3.5/dl-cache-libcmp.patch b/recipes/glibc/glibc-cvs-2.3.5/dl-cache-libcmp.patch
new file mode 100644
index 0000000000..c74ebf6c09
--- /dev/null
+++ b/recipes/glibc/glibc-cvs-2.3.5/dl-cache-libcmp.patch
@@ -0,0 +1,10 @@
+--- libc/elf/Versions.old 2005-06-27 13:38:25.000000000 +0100
++++ libc/elf/Versions 2005-06-27 14:03:54.000000000 +0100
+@@ -56,5 +56,7 @@
+ _dl_make_stack_executable;
+ # Only here for gdb while a better method is developed.
+ _dl_debug_state;
++ # for ldconfig
++ _dl_cache_libcmp;
+ }
+ }
diff --git a/recipes/glibc/glibc-cvs-2.3.5/dyn-ldconfig-20041128.patch b/recipes/glibc/glibc-cvs-2.3.5/dyn-ldconfig-20041128.patch
new file mode 100644
index 0000000000..451b6d4afc
--- /dev/null
+++ b/recipes/glibc/glibc-cvs-2.3.5/dyn-ldconfig-20041128.patch
@@ -0,0 +1,22 @@
+
+#
+# Patch managed by http://www.holgerschurig.de/patcher.html
+#
+
+--- libc/elf/Makefile~dyn-ldconfig-20041128
++++ libc/elf/Makefile
+@@ -118,12 +118,13 @@
+
+ ifeq (yes,$(use-ldconfig))
+ ifeq (yes,$(build-shared))
+-others-static += ldconfig
++#others-static += ldconfig
+ others += ldconfig
+ install-rootsbin += ldconfig
+
+ ldconfig-modules := cache readlib xmalloc xstrdup chroot_canon
+ extra-objs += $(ldconfig-modules:=.o)
++CPPFLAGS-readlib.c = -DNOT_IN_libc=1
+
+ # To find xmalloc.c and xstrdup.c
+ vpath %.c ../locale/programs
diff --git a/recipes/glibc/glibc-cvs-2.3.5/ldsocache-varrun.patch b/recipes/glibc/glibc-cvs-2.3.5/ldsocache-varrun.patch
new file mode 100644
index 0000000000..9994d4f879
--- /dev/null
+++ b/recipes/glibc/glibc-cvs-2.3.5/ldsocache-varrun.patch
@@ -0,0 +1,18 @@
+This patch moves ld.so.cache from /etc to /var/run. This is for devices
+where /etc is JFFS2 or CRAMFS but /var is a ramdisk.
+
+#
+# Patch managed by http://www.mn-logistik.de/unsupported/pxa250/patcher
+#
+
+--- libc/sysdeps/generic/dl-cache.h~ldsocache-varrun
++++ libc/sysdeps/generic/dl-cache.h
+@@ -29,7 +29,7 @@
+ #endif
+
+ #ifndef LD_SO_CACHE
+-# define LD_SO_CACHE SYSCONFDIR "/ld.so.cache"
++# define LD_SO_CACHE "/var/run/ld.so.cache"
+ #endif
+
+ #ifndef add_system_dir
diff --git a/recipes/glibc/glibc-cvs-2.3.5/no-z-defs.patch b/recipes/glibc/glibc-cvs-2.3.5/no-z-defs.patch
new file mode 100644
index 0000000000..48c6a41267
--- /dev/null
+++ b/recipes/glibc/glibc-cvs-2.3.5/no-z-defs.patch
@@ -0,0 +1,9 @@
+Create a configparms file which disabled no-z-defs.
+This is required to build a working glibs for sh4,
+without there will be a lot linker errors during the build.
+
+diff -duNr libc.orig/configparms libc/configparms
+--- libc.orig/configparms 1970-01-01 10:00:00.000000000 +1000
++++ libc/configparms 2006-02-23 14:08:18.000000000 +1100
+@@ -0,0 +1 @@
++no-z-defs=yes
diff --git a/recipes/glibc/glibc-cvs-2.3.5/raise.patch b/recipes/glibc/glibc-cvs-2.3.5/raise.patch
new file mode 100644
index 0000000000..16b4cb85a1
--- /dev/null
+++ b/recipes/glibc/glibc-cvs-2.3.5/raise.patch
@@ -0,0 +1,37 @@
+--- glibc.orig/linuxthreads/sysdeps/unix/sysv/linux/raise.c 2003-01-02 19:38:38.000000000 -0500
++++ glibc/linuxthreads/sysdeps/unix/sysv/linux/raise.c 2005-10-31 14:19:58.000000000 -0500
+@@ -1,4 +1,4 @@
+-/* Copyright (C) 1991, 1996, 2002, 2003 Free Software Foundation, Inc.
++/* Copyright (C) 1991, 1996, 2002, 2003, 2005 Free Software Foundation, Inc.
+ This file is part of the GNU C Library.
+
+ The GNU C Library is free software; you can redistribute it and/or
+@@ -18,10 +18,13 @@
+
+ #include <signal.h>
+ #include <unistd.h>
+-#include <bits/libc-lock.h>
+
+-#ifndef SHARED
++#ifndef IS_IN_rtld
++# include <bits/libc-lock.h>
++
++# ifndef SHARED
+ weak_extern (__pthread_raise)
++# endif
+ #endif
+
+ /* Raise the signal SIG. */
+@@ -29,8 +32,12 @@ int
+ raise (sig)
+ int sig;
+ {
++#ifdef IS_IN_rtld
++ return __kill (__getpid (), sig);
++#else
+ return __libc_maybe_call2 (pthread_raise, (sig),
+ __kill (__getpid (), sig));
++#endif
+ }
+ libc_hidden_def (raise)
+ weak_alias (raise, gsignal
diff --git a/recipes/glibc/glibc-cvs-2.3.5/superh-fcntl.patch b/recipes/glibc/glibc-cvs-2.3.5/superh-fcntl.patch
new file mode 100644
index 0000000000..364b9e1b32
--- /dev/null
+++ b/recipes/glibc/glibc-cvs-2.3.5/superh-fcntl.patch
@@ -0,0 +1,40 @@
+--- sysdeps/unix/sysv/linux/sh/bits/fcntl.h_orig 2006-05-16 16:58:30.000000000 +0000
++++ sysdeps/unix/sysv/linux/sh/bits/fcntl.h 2006-05-16 16:58:49.000000000 +0000
+@@ -90,6 +90,12 @@
+ # define F_GETSIG 11 /* Get number of signal to be sent. */
+ #endif
+
++#ifdef __USE_GNU
++# define F_SETLEASE 1024 /* Set a lease. */
++# define F_GETLEASE 1025 /* Enquire what lease is active. */
++# define F_NOTIFY 1026 /* Request notifications on a directory */
++#endif
++
+ /* For F_[GET|SET]FL. */
+ #define FD_CLOEXEC 1 /* actually anything with low bit set goes */
+
+@@ -111,6 +117,24 @@
+ # define LOCK_UN 8 /* remove lock */
+ #endif
+
++#ifdef __USE_GNU
++# define LOCK_MAND 32 /* this is a mandatory flock: */
++# define LOCK_READ 64 /* ...which allows concurrent read operations. */
++# define LOCK_WRITE 128 /* ...which allows concurrent write operations. */
++# define LOCK_RW 192 /* ...which allows concurrent read & write operations. */
++#endif
++
++#ifdef __USE_GNU
++/* Types of directory notifications that may be requested with F_NOTIFY. */
++# define DN_ACCESS 0x00000001 /* File Acessed. */
++# define DN_MODIFY 0x00000002 /* File Modified. */
++# define DN_CREATE 0x00000004 /* File created. */
++# define DN_DELETE 0x00000008 /* File removed. */
++# define DN_RENAME 0x00000010 /* File renamed. */
++# define DN_ATTRIB 0x00000020 /* File changed attributes. */
++# define DN_MULTISHOT 0x80000000 /* Don't remove notifier. */
++#endif
++
+ struct flock
+ {
+ short int l_type; /* Type of lock: F_RDLCK, F_WRLCK, or F_UNLCK. */
diff --git a/recipes/glibc/glibc-cvs-2.3.5/zecke-sane-readelf.patch b/recipes/glibc/glibc-cvs-2.3.5/zecke-sane-readelf.patch
new file mode 100644
index 0000000000..7dc699cfad
--- /dev/null
+++ b/recipes/glibc/glibc-cvs-2.3.5/zecke-sane-readelf.patch
@@ -0,0 +1,154 @@
+upstream: http://sources.redhat.com/bugzilla/show_bug.cgi?id=3004
+status: WONTFIX
+comment: Use OEs version of the readelf version. There might be no
+host system version (e.g. on OSX) or it is not multiarch.
+
+Index: glibc-2.3.2/configure
+===================================================================
+--- glibc-2.3.2.orig/configure 2006-08-05 20:18:11.000000000 +0200
++++ glibc-2.3.2/configure 2006-08-05 22:09:08.000000000 +0200
+@@ -4799,6 +4799,95 @@
+ fi
+ fi
+
++### XXXX copy and pasted
++# Check for readelf
++# Extract the first word of "$target_alias-readelf", so it can be a program name with args.
++set dummy $target_alias-readelf; ac_word=$2
++{ echo "$as_me:$LINENO: checking for $ac_word" >&5
++echo $ECHO_N "checking for $ac_word... $ECHO_C" >&6; }
++if test "${ac_cv_prog_READELF+set}" = set; then
++ echo $ECHO_N "(cached) $ECHO_C" >&6
++else
++ if test -n "$READELF"; then
++ ac_cv_prog_READELF="$READELF" # Let the user override the test.
++else
++as_save_IFS=$IFS; IFS=$PATH_SEPARATOR
++for as_dir in $PATH
++do
++ IFS=$as_save_IFS
++ test -z "$as_dir" && as_dir=.
++ for ac_exec_ext in '' $ac_executable_extensions; do
++ if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_executable_p "$as_dir/$ac_word$ac_exec_ext"; }; then
++ ac_cv_prog_READELF="$target_alias-readelf"
++ echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5
++ break 2
++ fi
++done
++done
++IFS=$as_save_IFS
++
++fi
++fi
++READELF=$ac_cv_prog_READELF
++if test -n "$READELF"; then
++ { echo "$as_me:$LINENO: result: $READELF" >&5
++echo "${ECHO_T}$READELF" >&6; }
++else
++ { echo "$as_me:$LINENO: result: no" >&5
++echo "${ECHO_T}no" >&6; }
++fi
++
++
++if test -z "$ac_cv_prog_READELF"; then
++ if test "$build" = "$target"; then
++ ac_ct_READELF=$READELF
++ # Extract the first word of "readelf", so it can be a program name with args.
++set dummy readelf; ac_word=$2
++{ echo "$as_me:$LINENO: checking for $ac_word" >&5
++echo $ECHO_N "checking for $ac_word... $ECHO_C" >&6; }
++if test "${ac_cv_prog_ac_ct_READELF+set}" = set; then
++ echo $ECHO_N "(cached) $ECHO_C" >&6
++else
++ if test -n "$ac_ct_READELF"; then
++ ac_cv_prog_ac_ct_READELF="$ac_ct_READELF" # Let the user override the test.
++else
++as_save_IFS=$IFS; IFS=$PATH_SEPARATOR
++for as_dir in $PATH
++do
++ IFS=$as_save_IFS
++ test -z "$as_dir" && as_dir=.
++ for ac_exec_ext in '' $ac_executable_extensions; do
++ if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_executable_p "$as_dir/$ac_word$ac_exec_ext"; }; then
++ ac_cv_prog_ac_ct_READELF="readelf"
++ echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5
++ break 2
++ fi
++done
++done
++IFS=$as_save_IFS
++
++ test -z "$ac_cv_prog_ac_ct_READELF" && ac_cv_prog_ac_ct_READELF="readelf"
++fi
++fi
++ac_ct_READELF=$ac_cv_prog_ac_ct_READELF
++if test -n "$ac_ct_READELF"; then
++ { echo "$as_me:$LINENO: result: $ac_ct_READELF" >&5
++echo "${ECHO_T}$ac_ct_READELF" >&6; }
++else
++ { echo "$as_me:$LINENO: result: no" >&5
++echo "${ECHO_T}no" >&6; }
++fi
++
++ READELF=ac_ct_READELF
++ else
++ READELF="readelf"
++ fi
++else
++ READELF="$ac_cv_prog_READELF"
++fi
++
++### XXXX copy and pasted
++
+ echo "$as_me:$LINENO: checking for .preinit_array/.init_array/.fini_array support" >&5
+ echo $ECHO_N "checking for .preinit_array/.init_array/.fini_array support... $ECHO_C" >&6
+ if test "${libc_cv_initfinit_array+set}" = set; then
+@@ -4818,7 +4907,7 @@
+ echo "$as_me:$LINENO: \$? = $ac_status" >&5
+ (exit $ac_status); }; }
+ then
+- if readelf -S conftest | fgrep INIT_ARRAY > /dev/null; then
++ if $READELF -S conftest | fgrep INIT_ARRAY > /dev/null; then
+ libc_cv_initfinit_array=yes
+ else
+ libc_cv_initfinit_array=no
+@@ -4963,7 +5052,7 @@
+ echo "$as_me:$LINENO: \$? = $ac_status" >&5
+ (exit $ac_status); }; }
+ then
+- if readelf -S conftest.so | grep '\.rel\(a\|\)\.dyn' > /dev/null; then
++ if $READELF -S conftest.so | grep '\.rel\(a\|\)\.dyn' > /dev/null; then
+ libc_cv_z_combreloc=yes
+ else
+ libc_cv_z_combreloc=no
+Index: glibc-2.3.2/configure.in
+===================================================================
+--- glibc-2.3.2.orig/configure.in 2003-02-26 01:46:31.000000000 +0100
++++ glibc-2.3.2/configure.in 2006-08-05 22:05:32.000000000 +0200
+@@ -1187,6 +1187,8 @@
+ fi
+ fi
+
++ AC_CHECK_TARGET_TOOL([READELF],[readelf],[readelf],[$PATH])
++
+ AC_CACHE_CHECK(for .preinit_array/.init_array/.fini_array support,
+ libc_cv_initfinit_array, [dnl
+ cat > conftest.c <<EOF
+@@ -1198,7 +1200,7 @@
+ if AC_TRY_COMMAND([${CC-cc} -o conftest conftest.c
+ -static -nostartfiles -nostdlib 1>&AS_MESSAGE_LOG_FD])
+ then
+- if readelf -S conftest | fgrep INIT_ARRAY > /dev/null; then
++ if $READELF -S conftest | fgrep INIT_ARRAY > /dev/null; then
+ libc_cv_initfinit_array=yes
+ else
+ libc_cv_initfinit_array=no
+@@ -1290,7 +1292,7 @@
+ dnl introducing new options this is not easily doable. Instead use a tool
+ dnl which always is cross-platform: readelf. To detect whether -z combreloc
+ dnl look for a section named .rel.dyn.
+- if readelf -S conftest.so | grep '\.rel\(a\|\)\.dyn' > /dev/null; then
++ if $READELF -S conftest.so | grep '\.rel\(a\|\)\.dyn' > /dev/null; then
+ libc_cv_z_combreloc=yes
+ else
+ libc_cv_z_combreloc=no
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-16 02:07:17 +0000