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-rw-r--r--recipes/gcc/gcc-4.2.4/ep93xx/arm-size-bugfix.patch27
1 files changed, 27 insertions, 0 deletions
diff --git a/recipes/gcc/gcc-4.2.4/ep93xx/arm-size-bugfix.patch b/recipes/gcc/gcc-4.2.4/ep93xx/arm-size-bugfix.patch
new file mode 100644
index 0000000000..86daf146f7
--- /dev/null
+++ b/recipes/gcc/gcc-4.2.4/ep93xx/arm-size-bugfix.patch
@@ -0,0 +1,27 @@
+Fix an obvious bug in GCC-4.3.2's ARM code generator.
+
+PR target/37668
+ * arm.c (arm_size_rtx_costs, case NEG): Don't fall through if the
+ result will be in an FPU register.
+
+This has been applied in gcc-4.4.0
+
+ Martin Guy <martinwguy@yahoo.it>
+
+Index: gcc-4.2.4/gcc/config/arm/arm.c
+===================================================================
+--- gcc-4.2.4.orig/gcc/config/arm/arm.c 2009-08-09 15:43:47.000000000 +0100
++++ gcc-4.2.4/gcc/config/arm/arm.c 2009-08-09 15:44:55.000000000 +0100
+@@ -4771,7 +4771,11 @@
+
+ case NEG:
+ if (TARGET_HARD_FLOAT && GET_MODE_CLASS (mode) == MODE_FLOAT)
+- *total = COSTS_N_INSNS (1);
++ {
++ *total = COSTS_N_INSNS (1);
++ return false;
++ }
++
+ /* Fall through */
+ case NOT:
+ *total = COSTS_N_INSNS (ARM_NUM_REGS (mode));