diff options
Diffstat (limited to 'recipes/gcc/gcc-3.4.6/gcc34-arm-ldm-peephole.patch')
| -rw-r--r-- | recipes/gcc/gcc-3.4.6/gcc34-arm-ldm-peephole.patch | 79 |
1 files changed, 79 insertions, 0 deletions
diff --git a/recipes/gcc/gcc-3.4.6/gcc34-arm-ldm-peephole.patch b/recipes/gcc/gcc-3.4.6/gcc34-arm-ldm-peephole.patch new file mode 100644 index 0000000000..92ad25d09c --- /dev/null +++ b/recipes/gcc/gcc-3.4.6/gcc34-arm-ldm-peephole.patch @@ -0,0 +1,79 @@ +--- gcc-3.4.0/gcc/config/arm/arm.md.arm-ldm-peephole 2004-01-13 08:24:37.000000000 -0500 ++++ gcc-3.4.0/gcc/config/arm/arm.md 2004-04-24 18:18:04.000000000 -0400 +@@ -8810,13 +8810,16 @@ + (set_attr "length" "4,8,8")] + ) + ++; Try to convert LDR+LDR+arith into [add+]LDM+arith ++; On XScale, LDM is always slower than two LDRs, so only do this if ++; optimising for size. + (define_insn "*arith_adjacentmem" + [(set (match_operand:SI 0 "s_register_operand" "=r") + (match_operator:SI 1 "shiftable_operator" + [(match_operand:SI 2 "memory_operand" "m") + (match_operand:SI 3 "memory_operand" "m")])) + (clobber (match_scratch:SI 4 "=r"))] +- "TARGET_ARM && adjacent_mem_locations (operands[2], operands[3])" ++ "TARGET_ARM && (!arm_tune_xscale || optimize_size) && adjacent_mem_locations (operands[2], operands[3])" + "* + { + rtx ldm[3]; +@@ -8851,6 +8854,8 @@ + } + if (val1 && val2) + { ++ /* This would be a loss on a Harvard core, but adjacent_mem_locations() ++ will prevent it from happening. */ + rtx ops[3]; + ldm[0] = ops[0] = operands[4]; + ops[1] = XEXP (XEXP (operands[2], 0), 0); +--- gcc-3.4.0/gcc/genpeep.c.arm-ldm-peephole 2003-07-05 01:27:22.000000000 -0400 ++++ gcc-3.4.0/gcc/genpeep.c 2004-04-24 18:18:04.000000000 -0400 +@@ -381,6 +381,7 @@ + printf ("#include \"recog.h\"\n"); + printf ("#include \"except.h\"\n\n"); + printf ("#include \"function.h\"\n\n"); ++ printf ("#include \"flags.h\"\n\n"); + + printf ("#ifdef HAVE_peephole\n"); + printf ("extern rtx peep_operand[];\n\n"); +--- gcc/gcc/config/arm/arm.c.orig 2005-06-02 22:40:40.000000000 +0100 ++++ gcc/gcc/config/arm/arm.c 2005-06-02 22:45:45.000000000 +0100 +@@ -4610,9 +4610,12 @@ + if (arm_eliminable_register (reg0)) + return 0; + ++ /* For Harvard cores, only accept pairs where one offset is zero. ++ See comment in load_multiple_sequence. */ + val_diff = val1 - val0; + return ((REGNO (reg0) == REGNO (reg1)) +- && (val_diff == 4 || val_diff == -4)); ++ && (val_diff == 4 || val_diff == -4)) ++ && (!arm_ld_sched || val0 == 0 || val1 == 0); + } + + return 0; +@@ -4857,6 +4860,11 @@ + *load_offset = unsorted_offsets[order[0]]; + } + ++ /* For XScale a two-word LDM is a performance loss, so only do this if ++ size is more important. See comments in arm_gen_load_multiple. */ ++ if (nops == 2 && arm_tune_xscale && !optimize_size) ++ return 0; ++ + if (unsorted_offsets[order[0]] == 0) + return 1; /* ldmia */ + +@@ -5083,6 +5091,11 @@ + *load_offset = unsorted_offsets[order[0]]; + } + ++ /* For XScale a two-word LDM is a performance loss, so only do this if ++ size is more important. See comments in arm_gen_load_multiple. */ ++ if (nops == 2 && arm_tune_xscale && !optimize_size) ++ return 0; ++ + if (unsorted_offsets[order[0]] == 0) + return 1; /* stmia */ + |