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-rw-r--r--packages/u-boot/files/sffsdr-u-boot.patch830
1 files changed, 0 insertions, 830 deletions
diff --git a/packages/u-boot/files/sffsdr-u-boot.patch b/packages/u-boot/files/sffsdr-u-boot.patch
deleted file mode 100644
index dcb34e2c51..0000000000
--- a/packages/u-boot/files/sffsdr-u-boot.patch
+++ /dev/null
@@ -1,830 +0,0 @@
-X-Mozilla-Status: 0001
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-X-Mozilla-Keys:
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-From: Hugo Villeneuve <hugo.villeneuve@lyrtech.com>
-To: u-boot-users@lists.sourceforge.net
-Date: Fri, 6 Jun 2008 16:39:10 -0400
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-Cc: "Philip Balister, OpenSDR" <philip@opensdr.com>
-Subject: [U-Boot-Users] [PATCH V8] ARM: Add support for Lyrtech SFF-SDR
- board (ARM926EJS)
-X-BeenThere: u-boot-users@lists.sourceforge.net
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-
-ARM: This patch adds support for the Lyrtech SFF-SDR
-board, based on the TI DaVinci architecture (ARM926EJS).
-
-Signed-off-by: Hugo Villeneuve <hugo.villeneuve@lyrtech.com>
-Signed-off-by: Philip Balister, OpenSDR <philip@opensdr.com>
-
----
-
- CREDITS | 5 +
- MAKEALL | 1 +
- Makefile | 3 +
- board/davinci/sffsdr/Makefile | 51 ++++++
- board/davinci/sffsdr/board_init.S | 32 ++++
- board/davinci/sffsdr/config.mk | 42 +++++
- board/davinci/sffsdr/sffsdr.c | 306 +++++++++++++++++++++++++++++++++++++
- board/davinci/sffsdr/u-boot.lds | 52 +++++++
- include/asm-arm/mach-types.h | 13 ++
- include/configs/davinci_sffsdr.h | 148 ++++++++++++++++++
- 10 files changed, 653 insertions(+), 0 deletions(-)
-
-diff --git a/CREDITS b/CREDITS
-index e84ef38..b855904 100644
---- a/CREDITS
-+++ b/CREDITS
-@@ -533,3 +533,8 @@ N: Timo Tuunainen
- E: timo.tuunainen@sysart.fi
- D: Support for Artila M-501 starter kit
- W: http://www.sysart.fi/
-+
-+N: Philip Balister
-+E: philip@opensdr.com
-+D: Port to Lyrtech SFFSDR development board.
-+W: www.opensdr.com
-diff --git a/MAKEALL b/MAKEALL
-index 37b4334..f53ceec 100755
---- a/MAKEALL
-+++ b/MAKEALL
-@@ -496,6 +496,7 @@ LIST_ARM9=" \
- voiceblue \
- davinci_dvevm \
- davinci_schmoogie \
-+ davinci_sffsdr \
- davinci_sonata \
- "
-
-diff --git a/Makefile b/Makefile
-index 6548f8e..05d90aa 100644
---- a/Makefile
-+++ b/Makefile
-@@ -2408,6 +2408,9 @@ davinci_dvevm_config : unconfig
- davinci_schmoogie_config : unconfig
- @$(MKCONFIG) $(@:_config=) arm arm926ejs schmoogie davinci davinci
-
-+davinci_sffsdr_config : unconfig
-+ @$(MKCONFIG) $(@:_config=) arm arm926ejs sffsdr davinci davinci
-+
- davinci_sonata_config : unconfig
- @$(MKCONFIG) $(@:_config=) arm arm926ejs sonata davinci davinci
-
-diff --git a/board/davinci/sffsdr/Makefile b/board/davinci/sffsdr/Makefile
-new file mode 100644
-index 0000000..4413b33
---- /dev/null
-+++ b/board/davinci/sffsdr/Makefile
-@@ -0,0 +1,51 @@
-+#
-+# (C) Copyright 2000, 2001, 2002
-+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-+#
-+# Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
-+#
-+# See file CREDITS for list of people who contributed to this
-+# project.
-+#
-+# This program is free software; you can redistribute it and/or
-+# modify it under the terms of the GNU General Public License as
-+# published by the Free Software Foundation; either version 2 of
-+# the License, or (at your option) any later version.
-+#
-+# This program is distributed in the hope that it will be useful,
-+# but WITHOUT ANY WARRANTY; without even the implied warranty of
-+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-+# GNU General Public License for more details.
-+#
-+# You should have received a copy of the GNU General Public License
-+# along with this program; if not, write to the Free Software
-+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-+# MA 02111-1307 USA
-+
-+include $(TOPDIR)/config.mk
-+
-+LIB = $(obj)lib$(BOARD).a
-+
-+COBJS := $(BOARD).o
-+SOBJS := board_init.o
-+
-+SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-+OBJS := $(addprefix $(obj),$(COBJS))
-+SOBJS := $(addprefix $(obj),$(SOBJS))
-+
-+$(LIB): $(obj).depend $(OBJS) $(SOBJS)
-+ $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
-+
-+clean:
-+ rm -f $(SOBJS) $(OBJS)
-+
-+distclean: clean
-+ rm -f $(LIB) core *.bak *~ .depend
-+
-+#########################################################################
-+# This is for $(obj).depend target
-+include $(SRCTREE)/rules.mk
-+
-+sinclude $(obj).depend
-+
-+#########################################################################
-diff --git a/board/davinci/sffsdr/board_init.S b/board/davinci/sffsdr/board_init.S
-new file mode 100644
-index 0000000..84ecd96
---- /dev/null
-+++ b/board/davinci/sffsdr/board_init.S
-@@ -0,0 +1,32 @@
-+/*
-+ * Board-specific low level initialization code. Called at the very end
-+ * of cpu/arm926ejs/davinci/lowlevel_init.S. Just returns if there is no
-+ * initialization required.
-+ *
-+ * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
-+ *
-+ * See file CREDITS for list of people who contributed to this
-+ * project.
-+ *
-+ * This program is free software; you can redistribute it and/or
-+ * modify it under the terms of the GNU General Public License as
-+ * published by the Free Software Foundation; either version 2 of
-+ * the License, or (at your option) any later version.
-+ *
-+ * This program is distributed in the hope that it will be useful,
-+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-+ * GNU General Public License for more details.
-+ *
-+ * You should have received a copy of the GNU General Public License
-+ * along with this program; if not, write to the Free Software
-+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-+ * MA 02111-1307 USA
-+ */
-+
-+#include <config.h>
-+
-+.globl dv_board_init
-+dv_board_init:
-+
-+ mov pc, lr
-diff --git a/board/davinci/sffsdr/config.mk b/board/davinci/sffsdr/config.mk
-new file mode 100644
-index 0000000..b1c4ead
---- /dev/null
-+++ b/board/davinci/sffsdr/config.mk
-@@ -0,0 +1,42 @@
-+#
-+# Lyrtech SFF SDR board (ARM926EJS) cpu
-+#
-+# (C) Copyright 2002
-+# Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
-+# David Mueller, ELSOFT AG, <d.mueller@elsoft.ch>
-+#
-+# Copyright (C) 2008 Lyrtech <www.lyrtech.com>
-+# Copyright (C) 2008 Philip Balister, OpenSDR <philip@opensdr.com>
-+#
-+# See file CREDITS for list of people who contributed to this
-+# project.
-+#
-+# This program is free software; you can redistribute it and/or
-+# modify it under the terms of the GNU General Public License as
-+# published by the Free Software Foundation; either version 2 of
-+# the License, or (at your option) any later version.
-+#
-+# This program is distributed in the hope that it will be useful,
-+# but WITHOUT ANY WARRANTY; without even the implied warranty of
-+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-+# GNU General Public License for more details.
-+#
-+# You should have received a copy of the GNU General Public License
-+# along with this program; if not, write to the Free Software
-+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-+# MA 02111-1307 USA
-+
-+#
-+# SFF SDR board has 1 bank of 128 MB DDR RAM
-+# Physical Address:
-+# 8000'0000 to 87FF'FFFF
-+#
-+# Linux-Kernel is expected to be at 8000'8000, entry 8000'8000
-+# (mem base + reserved)
-+#
-+# Integrity kernel is expected to be at 8000'0000, entry 8000'00D0,
-+# up to 81FF'FFFF (uses up to 32 MB of memory for text, heap, etc).
-+#
-+# we load ourself to 8400'0000 to provide at least 32MB spacing
-+# between us and the Integrity kernel image
-+TEXT_BASE = 0x84000000
-diff --git a/board/davinci/sffsdr/sffsdr.c b/board/davinci/sffsdr/sffsdr.c
-new file mode 100644
-index 0000000..31e0f24
---- /dev/null
-+++ b/board/davinci/sffsdr/sffsdr.c
-@@ -0,0 +1,306 @@
-+/*
-+ * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
-+ *
-+ * Copyright (C) 2008 Lyrtech <www.lyrtech.com>
-+ * Copyright (C) 2008 Philip Balister, OpenSDR <philip@opensdr.com>
-+ *
-+ * Parts are shamelessly stolen from various TI sources, original copyright
-+ * follows:
-+ *
-+ * Copyright (C) 2004 Texas Instruments.
-+ *
-+ * See file CREDITS for list of people who contributed to this
-+ * project.
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License as published by
-+ * the Free Software Foundation; either version 2 of the License, or
-+ * (at your option) any later version.
-+ *
-+ * This program is distributed in the hope that it will be useful,
-+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-+ * GNU General Public License for more details.
-+ *
-+ * You should have received a copy of the GNU General Public License
-+ * along with this program; if not, write to the Free Software
-+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
-+ */
-+
-+#include <common.h>
-+#include <i2c.h>
-+#include <asm/arch/hardware.h>
-+#include <asm/arch/emac_defs.h>
-+
-+#define DAVINCI_A3CR (0x01E00014) /* EMIF-A CS3 config register. */
-+#define DAVINCI_A3CR_VAL (0x3FFFFFFD) /* EMIF-A CS3 value for FPGA. */
-+
-+#define INTEGRITY_SYSCFG_OFFSET 0x7E8
-+#define INTEGRITY_CHECKWORD_OFFSET 0x7F8
-+#define INTEGRITY_CHECKWORD_VALUE 0x10ADBEEF
-+
-+DECLARE_GLOBAL_DATA_PTR;
-+
-+extern void timer_init(void);
-+extern int eth_hw_init(void);
-+extern phy_t phy;
-+
-+
-+/* Works on Always On power domain only (no PD argument) */
-+void lpsc_on(unsigned int id)
-+{
-+ dv_reg_p mdstat, mdctl;
-+
-+ if (id >= DAVINCI_LPSC_GEM)
-+ return; /* Don't work on DSP Power Domain */
-+
-+ mdstat = REG_P(PSC_MDSTAT_BASE + (id * 4));
-+ mdctl = REG_P(PSC_MDCTL_BASE + (id * 4));
-+
-+ while (REG(PSC_PTSTAT) & 0x01);
-+
-+ if ((*mdstat & 0x1f) == 0x03)
-+ return; /* Already on and enabled */
-+
-+ *mdctl |= 0x03;
-+
-+ /* Special treatment for some modules as for sprue14 p.7.4.2 */
-+ switch (id) {
-+ case DAVINCI_LPSC_VPSSSLV:
-+ case DAVINCI_LPSC_EMAC:
-+ case DAVINCI_LPSC_EMAC_WRAPPER:
-+ case DAVINCI_LPSC_MDIO:
-+ case DAVINCI_LPSC_USB:
-+ case DAVINCI_LPSC_ATA:
-+ case DAVINCI_LPSC_VLYNQ:
-+ case DAVINCI_LPSC_UHPI:
-+ case DAVINCI_LPSC_DDR_EMIF:
-+ case DAVINCI_LPSC_AEMIF:
-+ case DAVINCI_LPSC_MMC_SD:
-+ case DAVINCI_LPSC_MEMSTICK:
-+ case DAVINCI_LPSC_McBSP:
-+ case DAVINCI_LPSC_GPIO:
-+ *mdctl |= 0x200;
-+ break;
-+ }
-+
-+ REG(PSC_PTCMD) = 0x01;
-+
-+ while (REG(PSC_PTSTAT) & 0x03);
-+ while ((*mdstat & 0x1f) != 0x03); /* Probably an overkill... */
-+}
-+
-+void dsp_on(void)
-+{
-+ int i;
-+
-+ if (REG(PSC_PDSTAT1) & 0x1f)
-+ return; /* Already on */
-+
-+ REG(PSC_GBLCTL) |= 0x01;
-+ REG(PSC_PDCTL1) |= 0x01;
-+ REG(PSC_PDCTL1) &= ~0x100;
-+ REG(PSC_MDCTL_BASE + (DAVINCI_LPSC_GEM * 4)) |= 0x03;
-+ REG(PSC_MDCTL_BASE + (DAVINCI_LPSC_GEM * 4)) &= 0xfffffeff;
-+ REG(PSC_MDCTL_BASE + (DAVINCI_LPSC_IMCOP * 4)) |= 0x03;
-+ REG(PSC_MDCTL_BASE + (DAVINCI_LPSC_IMCOP * 4)) &= 0xfffffeff;
-+ REG(PSC_PTCMD) = 0x02;
-+
-+ for (i = 0; i < 100; i++) {
-+ if (REG(PSC_EPCPR) & 0x02)
-+ break;
-+ }
-+
-+ REG(PSC_CHP_SHRTSW) = 0x01;
-+ REG(PSC_PDCTL1) |= 0x100;
-+ REG(PSC_EPCCR) = 0x02;
-+
-+ for (i = 0; i < 100; i++) {
-+ if (!(REG(PSC_PTSTAT) & 0x02))
-+ break;
-+ }
-+
-+ REG(PSC_GBLCTL) &= ~0x1f;
-+}
-+
-+int board_init(void)
-+{
-+ /* arch number of the board */
-+ gd->bd->bi_arch_number = MACH_TYPE_SFFSDR;
-+
-+ /* address of boot parameters */
-+ gd->bd->bi_boot_params = LINUX_BOOT_PARAM_ADDR;
-+
-+ /* Workaround for TMS320DM6446 errata 1.3.22 */
-+ REG(PSC_SILVER_BULLET) = 0;
-+
-+ /* Power on required peripherals */
-+ lpsc_on(DAVINCI_LPSC_EMAC);
-+ lpsc_on(DAVINCI_LPSC_EMAC_WRAPPER);
-+ lpsc_on(DAVINCI_LPSC_MDIO);
-+ lpsc_on(DAVINCI_LPSC_I2C);
-+ lpsc_on(DAVINCI_LPSC_UART0);
-+ lpsc_on(DAVINCI_LPSC_TIMER1);
-+ lpsc_on(DAVINCI_LPSC_GPIO);
-+
-+ /* Powerup the DSP */
-+ dsp_on();
-+
-+ /* Bringup UART0 out of reset */
-+ REG(UART0_PWREMU_MGMT) = 0x0000e003;
-+
-+ /* Enable GIO3.3V cells used for EMAC */
-+ REG(VDD3P3V_PWDN) = 0;
-+
-+ /* Enable UART0 MUX lines */
-+ REG(PINMUX1) |= 1;
-+
-+ /* Enable EMAC and AEMIF pins */
-+ REG(PINMUX0) = 0x80000c1f;
-+
-+ /* Enable I2C pin Mux */
-+ REG(PINMUX1) |= (1 << 7);
-+
-+ /* Set the Bus Priority Register to appropriate value */
-+ REG(VBPR) = 0x20;
-+
-+ timer_init();
-+
-+ return(0);
-+}
-+
-+/* Read ethernet MAC address from Integrity data structure inside EEPROM. */
-+int read_mac_address(uint8_t *buf)
-+{
-+ u_int32_t value, mac[2], address;
-+
-+ /* Read Integrity data structure checkword. */
-+ if (i2c_read(CFG_I2C_EEPROM_ADDR, INTEGRITY_CHECKWORD_OFFSET,
-+ CFG_I2C_EEPROM_ADDR_LEN, (uint8_t *) &value, 4))
-+ goto err;
-+ if (value != INTEGRITY_CHECKWORD_VALUE)
-+ return 1;
-+
-+ /* Read SYSCFG structure offset. */
-+ if (i2c_read(CFG_I2C_EEPROM_ADDR, INTEGRITY_SYSCFG_OFFSET,
-+ CFG_I2C_EEPROM_ADDR_LEN, (uint8_t *) &value, 4))
-+ goto err;
-+ address = 0x800 + (int) value; /* Address of SYSCFG structure. */
-+
-+ /* Read NET CONFIG structure offset. */
-+ if (i2c_read(CFG_I2C_EEPROM_ADDR, address,
-+ CFG_I2C_EEPROM_ADDR_LEN, (uint8_t *) &value, 4))
-+ goto err;
-+ address = 0x800 + (int) value; /* Address of NET CONFIG structure. */
-+ address += 12; /* Address of NET INTERFACE CONFIG structure. */
-+
-+ /* Read NET INTERFACE CONFIG 2 structure offset. */
-+ if (i2c_read(CFG_I2C_EEPROM_ADDR, address,
-+ CFG_I2C_EEPROM_ADDR_LEN, (uint8_t *) &value, 4))
-+ goto err;
-+ address = 0x800 + 16 + (int) value; /* Address of NET INTERFACE
-+ * CONFIG 2 structure. */
-+
-+ /* Read MAC address. */
-+ if (i2c_read(CFG_I2C_EEPROM_ADDR, address,
-+ CFG_I2C_EEPROM_ADDR_LEN, (uint8_t *) &mac[0], 8))
-+ goto err;
-+
-+ buf[0] = mac[0] >> 24;
-+ buf[1] = mac[0] >> 16;
-+ buf[2] = mac[0] >> 8;
-+ buf[3] = mac[0];
-+ buf[4] = mac[1] >> 24;
-+ buf[5] = mac[1] >> 16;
-+
-+ return 0;
-+
-+err:
-+ printf("Read from EEPROM @ 0x%02x failed\n", CFG_I2C_EEPROM_ADDR);
-+ return 1;
-+}
-+
-+/* Platform dependent initialisation. */
-+int misc_init_r(void)
-+{
-+ int i;
-+ u_int8_t i2cbuf;
-+ u_int8_t env_enetaddr[6], eeprom_enetaddr[6];
-+ char *tmp = getenv("ethaddr");
-+ char *end;
-+ int clk;
-+
-+ /* EMIF-A CS3 configuration for FPGA. */
-+ REG(DAVINCI_A3CR) = DAVINCI_A3CR_VAL;
-+
-+ clk = ((REG(PLL2_PLLM) + 1) * 27) / ((REG(PLL2_DIV2) & 0x1f) + 1);
-+
-+ printf("ARM Clock: %dMHz\n", ((REG(PLL1_PLLM) + 1) * 27) / 2);
-+ printf("DDR Clock: %dMHz\n", (clk / 2));
-+
-+ /* Configure I2C switch (PCA9543) to enable channel 0. */
-+ i2cbuf = CFG_I2C_PCA9543_ENABLE_CH0;
-+ if (i2c_write(CFG_I2C_PCA9543_ADDR, 0,
-+ CFG_I2C_PCA9543_ADDR_LEN, &i2cbuf, 1)) {
-+ printf("Write to MUX @ 0x%02x failed\n", CFG_I2C_PCA9543_ADDR);
-+ return 1;
-+ }
-+
-+ /* Read Ethernet MAC address from the U-Boot environment. */
-+ for (i = 0; i < 6; i++) {
-+ env_enetaddr[i] = tmp ? simple_strtoul(tmp, &end, 16) : 0;
-+ if (tmp)
-+ tmp = (*end) ? end+1 : end;
-+ }
-+
-+ /* Read Ethernet MAC address from EEPROM. */
-+ if (read_mac_address(eeprom_enetaddr) == 0) {
-+ if (memcmp(env_enetaddr, "\0\0\0\0\0\0", 6) != 0 &&
-+ memcmp(env_enetaddr, eeprom_enetaddr, 6) != 0) {
-+ printf("\nWarning: MAC addresses don't match:\n");
-+ printf("\tHW MAC address: "
-+ "%02X:%02X:%02X:%02X:%02X:%02X\n",
-+ eeprom_enetaddr[0], eeprom_enetaddr[1],
-+ eeprom_enetaddr[2], eeprom_enetaddr[3],
-+ eeprom_enetaddr[4], eeprom_enetaddr[5]);
-+ printf("\t\"ethaddr\" value: "
-+ "%02X:%02X:%02X:%02X:%02X:%02X\n",
-+ env_enetaddr[0], env_enetaddr[1],
-+ env_enetaddr[2], env_enetaddr[3],
-+ env_enetaddr[4], env_enetaddr[5]) ;
-+ debug("### Set MAC addr from environment\n");
-+ memcpy(eeprom_enetaddr, env_enetaddr, 6);
-+ }
-+ if (!tmp) {
-+ char ethaddr[20];
-+
-+ sprintf(ethaddr, "%02X:%02X:%02X:%02X:%02X:%02X",
-+ eeprom_enetaddr[0], eeprom_enetaddr[1],
-+ eeprom_enetaddr[2], eeprom_enetaddr[3],
-+ eeprom_enetaddr[4], eeprom_enetaddr[5]) ;
-+ debug("### Set environment from HW MAC addr = \"%s\"\n",
-+ ethaddr);
-+ setenv("ethaddr", ethaddr);
-+ }
-+ }
-+
-+ if (!eth_hw_init()) {
-+ printf("Ethernet init failed\n");
-+ } else {
-+ printf("ETH PHY: %s\n", phy.name);
-+ }
-+
-+ /* On this platform, U-Boot is copied in RAM by the UBL,
-+ * so we are always in the relocated state. */
-+ gd->flags |= GD_FLG_RELOC;
-+
-+ return(0);
-+}
-+
-+int dram_init(void)
-+{
-+ gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
-+ gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
-+
-+ return(0);
-+}
-diff --git a/board/davinci/sffsdr/u-boot.lds b/board/davinci/sffsdr/u-boot.lds
-new file mode 100644
-index 0000000..a4fcd1a
---- /dev/null
-+++ b/board/davinci/sffsdr/u-boot.lds
-@@ -0,0 +1,52 @@
-+/*
-+ * (C) Copyright 2002
-+ * Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
-+ *
-+ * See file CREDITS for list of people who contributed to this
-+ * project.
-+ *
-+ * This program is free software; you can redistribute it and/or
-+ * modify it under the terms of the GNU General Public License as
-+ * published by the Free Software Foundation; either version 2 of
-+ * the License, or (at your option) any later version.
-+ *
-+ * This program is distributed in the hope that it will be useful,
-+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-+ * GNU General Public License for more details.
-+ *
-+ * You should have received a copy of the GNU General Public License
-+ * along with this program; if not, write to the Free Software
-+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-+ * MA 02111-1307 USA
-+ */
-+
-+OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
-+OUTPUT_ARCH(arm)
-+ENTRY(_start)
-+SECTIONS
-+{
-+ . = 0x00000000;
-+ . = ALIGN(4);
-+ .text :
-+ {
-+ cpu/arm926ejs/start.o (.text)
-+ *(.text)
-+ }
-+ . = ALIGN(4);
-+ .rodata : { *(.rodata) }
-+ . = ALIGN(4);
-+ .data : { *(.data) }
-+ . = ALIGN(4);
-+ .got : { *(.got) }
-+
-+ . = .;
-+ __u_boot_cmd_start = .;
-+ .u_boot_cmd : { *(.u_boot_cmd) }
-+ __u_boot_cmd_end = .;
-+
-+ . = ALIGN(4);
-+ __bss_start = .;
-+ .bss (NOLOAD) : { *(.bss) }
-+ _end = .;
-+}
-diff --git a/include/asm-arm/mach-types.h b/include/asm-arm/mach-types.h
-index aaf2ea2..b347857 100644
---- a/include/asm-arm/mach-types.h
-+++ b/include/asm-arm/mach-types.h
-@@ -1595,6 +1595,7 @@ extern unsigned int __machine_arch_type;
- #define MACH_TYPE_P300 1602
- #define MACH_TYPE_XDACOMET 1603
- #define MACH_TYPE_DEXFLEX2 1604
-+#define MACH_TYPE_SFFSDR 1657
-
- #ifdef CONFIG_ARCH_EBSA110
- # ifdef machine_arch_type
-@@ -16500,6 +16501,18 @@ extern unsigned int __machine_arch_type;
- # define machine_is_schmoogie() (0)
- #endif
-
-+#ifdef CONFIG_MACH_SFFSDR
-+# ifdef machine_arch_type
-+# undef machine_arch_type
-+# define machine_arch_type __machine_arch_type
-+# else
-+# define machine_arch_type MACH_TYPE_SFFSDR
-+# endif
-+# define machine_is_sffsdr() (machine_arch_type == MACH_TYPE_SFFSDR)
-+#else
-+# define machine_is_sffsdr() (0)
-+#endif
-+
- #ifdef CONFIG_MACH_AZTOOL
- # ifdef machine_arch_type
- # undef machine_arch_type
-diff --git a/include/configs/davinci_sffsdr.h b/include/configs/davinci_sffsdr.h
-new file mode 100644
-index 0000000..897e9e5
---- /dev/null
-+++ b/include/configs/davinci_sffsdr.h
-@@ -0,0 +1,148 @@
-+/*
-+ * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
-+ *
-+ * Copyright (C) 2008 Lyrtech <www.lyrtech.com>
-+ * Copyright (C) 2008 Philip Balister, OpenSDR <philip@opensdr.com>
-+ *
-+ * This program is free software; you can redistribute it and/or
-+ * modify it under the terms of the GNU General Public License as
-+ * published by the Free Software Foundation; either version 2 of
-+ * the License, or (at your option) any later version.
-+ *
-+ * This program is distributed in the hope that it will be useful,
-+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-+ * GNU General Public License for more details.
-+ *
-+ * You should have received a copy of the GNU General Public License
-+ * along with this program; if not, write to the Free Software
-+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-+ * MA 02111-1307 USA
-+ */
-+
-+#ifndef __CONFIG_H
-+#define __CONFIG_H
-+#include <asm/sizes.h>
-+
-+/* Board */
-+#define SFFSDR
-+#define CFG_NAND_LARGEPAGE
-+#define CFG_USE_NAND
-+/* SoC Configuration */
-+#define CONFIG_ARM926EJS /* arm926ejs CPU core */
-+#define CONFIG_SYS_CLK_FREQ 297000000 /* Arm Clock frequency */
-+#define CFG_TIMERBASE 0x01c21400 /* use timer 0 */
-+#define CFG_HZ_CLOCK 27000000 /* Timer Input clock freq */
-+#define CFG_HZ 1000
-+/* EEPROM definitions for Atmel 24LC64 EEPROM chip */
-+#define CFG_I2C_EEPROM_ADDR_LEN 2
-+#define CFG_I2C_EEPROM_ADDR 0x50
-+#define CFG_EEPROM_PAGE_WRITE_BITS 5
-+#define CFG_EEPROM_PAGE_WRITE_DELAY_MS 20
-+/* Memory Info */
-+#define CFG_MALLOC_LEN (0x10000 + 256*1024) /* malloc() len */
-+#define CFG_GBL_DATA_SIZE 128 /* reserved for initial data */
-+#define CFG_MEMTEST_START 0x80000000 /* memtest start address */
-+#define CFG_MEMTEST_END 0x81000000 /* 16MB RAM test */
-+#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */
-+#define CONFIG_STACKSIZE (256*1024) /* regular stack */
-+#define PHYS_SDRAM_1 0x80000000 /* DDR Start */
-+#define PHYS_SDRAM_1_SIZE 0x08000000 /* DDR size 128MB */
-+#define DDR_4BANKS /* 4-bank DDR2 (128MB) */
-+/* Serial Driver info */
-+#define CFG_NS16550
-+#define CFG_NS16550_SERIAL
-+#define CFG_NS16550_REG_SIZE 4 /* NS16550 register size */
-+#define CFG_NS16550_COM1 0x01c20000 /* Base address of UART0 */
-+#define CFG_NS16550_CLK 27000000 /* Input clock to NS16550 */
-+#define CONFIG_CONS_INDEX 1 /* use UART0 for console */
-+#define CONFIG_BAUDRATE 115200 /* Default baud rate */
-+#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
-+/* I2C Configuration */
-+#define CONFIG_HARD_I2C
-+#define CONFIG_DRIVER_DAVINCI_I2C
-+#define CFG_I2C_SPEED 80000 /* 100Kbps won't work, silicon bug */
-+#define CFG_I2C_SLAVE 10 /* Bogus, master-only in U-Boot */
-+/* Network & Ethernet Configuration */
-+#define CONFIG_DRIVER_TI_EMAC
-+#define CONFIG_MII
-+#define CONFIG_BOOTP_DEFAULT
-+#define CONFIG_BOOTP_DNS
-+#define CONFIG_BOOTP_DNS2
-+#define CONFIG_BOOTP_SEND_HOSTNAME
-+#define CONFIG_NET_RETRY_COUNT 10
-+#define CONFIG_OVERWRITE_ETHADDR_ONCE
-+/* Flash & Environment */
-+#undef CFG_ENV_IS_IN_FLASH
-+#define CFG_NO_FLASH
-+#define CFG_ENV_IS_IN_NAND /* U-Boot env in NAND Flash */
-+#define CFG_ENV_SECT_SIZE 2048 /* Env sector Size */
-+#define CFG_ENV_SIZE SZ_128K
-+#define CONFIG_SKIP_LOWLEVEL_INIT /* U-Boot is loaded by a bootloader */
-+#define CONFIG_SKIP_RELOCATE_UBOOT /* to a proper address, init done */
-+#define CFG_NAND_BASE 0x02000000
-+#define CFG_NAND_HW_ECC
-+#define CFG_MAX_NAND_DEVICE 1 /* Max number of NAND devices */
-+#define NAND_MAX_CHIPS 1
-+#define CFG_ENV_OFFSET 0x0 /* Block 0--not used by bootcode */
-+/* I2C switch definitions for PCA9543 chip */
-+#define CFG_I2C_PCA9543_ADDR 0x70
-+#define CFG_I2C_PCA9543_ADDR_LEN 0 /* Single register. */
-+#define CFG_I2C_PCA9543_ENABLE_CH0 0x01 /* Enable channel 0. */
-+/* U-Boot general configuration */
-+#undef CONFIG_USE_IRQ /* No IRQ/FIQ in U-Boot */
-+#define CONFIG_MISC_INIT_R
-+#define CONFIG_BOOTDELAY 5 /* Autoboot after 5 seconds. */
-+#define CONFIG_BOOTFILE "uImage" /* Boot file name */
-+#define CFG_PROMPT "U-Boot > " /* Monitor Command Prompt */
-+#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
-+#define CFG_PBSIZE \
-+ (CFG_CBSIZE + sizeof(CFG_PROMPT) + 16) /* Print buffer size */
-+#define CFG_MAXARGS 16 /* max number of command args */
-+#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
-+#define CFG_LOAD_ADDR 0x80700000 /* Default Linux kernel
-+ * load address. */
-+#define CONFIG_VERSION_VARIABLE
-+#define CONFIG_AUTO_COMPLETE /* Won't work with hush so far,
-+ * may be later */
-+#define CFG_HUSH_PARSER
-+#define CFG_PROMPT_HUSH_PS2 "> "
-+#define CONFIG_CMDLINE_EDITING
-+#define CFG_LONGHELP
-+#define CONFIG_CRC32_VERIFY
-+#define CONFIG_MX_CYCLIC
-+/* Linux Information */
-+#define LINUX_BOOT_PARAM_ADDR 0x80000100
-+#define CONFIG_CMDLINE_TAG
-+#define CONFIG_SETUP_MEMORY_TAGS
-+#define CONFIG_BOOTARGS \
-+ "mem=56M " \
-+ "console=ttyS0,115200n8 " \
-+ "root=/dev/nfs rw noinitrd ip=dhcp " \
-+ "nfsroot=${serverip}:/nfsroot/sffsdr " \
-+ "nwhwconf=device:eth0,hwaddr:${ethaddr}"
-+#define CONFIG_BOOTCOMMAND \
-+ "nand read 87A00000 100000 300000;" \
-+ "bootelf 87A00000"
-+/* U-Boot commands */
-+#include <config_cmd_default.h>
-+#define CONFIG_CMD_ASKENV
-+#define CONFIG_CMD_DHCP
-+#define CONFIG_CMD_DIAG
-+#define CONFIG_CMD_I2C
-+#define CONFIG_CMD_MII
-+#define CONFIG_CMD_PING
-+#define CONFIG_CMD_SAVES
-+#define CONFIG_CMD_NAND
-+#define CONFIG_CMD_EEPROM
-+#undef CONFIG_CMD_BDI
-+#undef CONFIG_CMD_FPGA
-+#undef CONFIG_CMD_SETGETDCR
-+#undef CONFIG_CMD_FLASH
-+#undef CONFIG_CMD_IMLS
-+/* KGDB support (if any) */
-+#ifdef CONFIG_CMD_KGDB
-+#define CONFIG_KGDB_BAUDRATE 115200 /* speed to run kgdb serial port */
-+#define CONFIG_KGDB_SER_INDEX 1 /* which serial port to use */
-+#endif
-+#endif /* __CONFIG_H */
-
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