diff options
Diffstat (limited to 'packages/linux')
47 files changed, 37054 insertions, 133 deletions
diff --git a/packages/linux/at91_2.6.28.bb b/packages/linux/at91_2.6.28.bb deleted file mode 100644 index a24dad3ee5..0000000000 --- a/packages/linux/at91_2.6.28.bb +++ /dev/null @@ -1,36 +0,0 @@ -require linux.inc - -KERNEL_RELEASE = "2.6.28" -PV = "2.6.28" -PR = "r0" - -DEPENDS += "u-boot-utils-native" -DEPENDS += "ipkg-utils-native" - -S = "${WORKDIR}/linux-${KERNEL_RELEASE}" - -# Mark archs/machines that this kernel supports -DEFAULT_PREFERENCE = "-1" - -DEFAULT_PREFERENCE_at91sam9260ek = "1" -CMDLINE_at91sam9260ek = "mem=64M console=ttyS0,115200 root=/dev/mtdblock0 rw rootfstype=jffs2" -FILES_kernel-image_at91sam9260ek = "" - -DEFAULT_PREFERENCE_at91sam9261ek = "1" -CMDLINE_at91sam9261ek = "mem=64M console=ttyS0,115200 root=/dev/mtdblock0 rw rootfstype=jffs2" -FILES_kernel-image_at91sam9261ek = "" - -DEFAULT_PREFERENCE_at91sam9263ek = "1" -CMDLINE_at91sam9263ek = "mem=64M console=ttyS0,115200 root=/dev/mtdblock0 rw rootfstype=jffs2" -FILES_kernel-image_at91sam9263ek = "" - -DEFAULT_PREFERENCE_at91sam9g20ek = "1" -CMDLINE_at91sam9g20ek = "mem=64M console=ttyS0,115200 root=/dev/mtdblock0 rw rootfstype=jffs2" -FILES_kernel-image_at91sam9g20ek = "" - - -SRC_URI = "${KERNELORG_MIRROR}/pub/linux/kernel/v2.6/linux-${KERNEL_RELEASE}.tar.bz2 \ - file://linux-2.6.28-at91.patch.bz2;patch=1 \ - file://linux-2.6.28-exp.patch.bz2;patch=1 \ - file://defconfig \ - " diff --git a/packages/linux/linux-2.6.25.20/ronetix-pm9261/defconfig b/packages/linux/linux-2.6.25.20/ronetix-pm9261/defconfig new file mode 100644 index 0000000000..77cb9fafe5 --- /dev/null +++ b/packages/linux/linux-2.6.25.20/ronetix-pm9261/defconfig @@ -0,0 +1,1346 @@ +# +# Automatically generated make config: don't edit +# Linux kernel version: 2.6.25.20 +# Fri Jan 2 12:42:20 2009 +# +CONFIG_ARM=y +CONFIG_SYS_SUPPORTS_APM_EMULATION=y +CONFIG_GENERIC_GPIO=y +CONFIG_GENERIC_TIME=y +CONFIG_GENERIC_CLOCKEVENTS=y +CONFIG_MMU=y +# CONFIG_NO_IOPORT is not set +CONFIG_GENERIC_HARDIRQS=y +CONFIG_STACKTRACE_SUPPORT=y +CONFIG_LOCKDEP_SUPPORT=y +CONFIG_TRACE_IRQFLAGS_SUPPORT=y +CONFIG_HARDIRQS_SW_RESEND=y +CONFIG_GENERIC_IRQ_PROBE=y +CONFIG_RWSEM_GENERIC_SPINLOCK=y +# CONFIG_ARCH_HAS_ILOG2_U32 is not set +# CONFIG_ARCH_HAS_ILOG2_U64 is not set +CONFIG_GENERIC_HWEIGHT=y +CONFIG_GENERIC_CALIBRATE_DELAY=y +CONFIG_ARCH_SUPPORTS_AOUT=y +CONFIG_ZONE_DMA=y +CONFIG_VECTORS_BASE=0xffff0000 +CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" + +# +# General setup +# +CONFIG_EXPERIMENTAL=y +CONFIG_BROKEN_ON_SMP=y +CONFIG_INIT_ENV_ARG_LIMIT=32 +CONFIG_LOCALVERSION="-KaeilOS-PM9261" +# CONFIG_LOCALVERSION_AUTO is not set +# CONFIG_SWAP is not set +CONFIG_SYSVIPC=y +CONFIG_SYSVIPC_SYSCTL=y +# CONFIG_POSIX_MQUEUE is not set +# CONFIG_BSD_PROCESS_ACCT is not set +# CONFIG_TASKSTATS is not set +# CONFIG_AUDIT is not set +# CONFIG_IKCONFIG is not set +CONFIG_LOG_BUF_SHIFT=14 +# CONFIG_CGROUPS is not set +CONFIG_GROUP_SCHED=y +CONFIG_FAIR_GROUP_SCHED=y +# CONFIG_RT_GROUP_SCHED is not set +CONFIG_USER_SCHED=y +# CONFIG_CGROUP_SCHED is not set +CONFIG_SYSFS_DEPRECATED=y +CONFIG_SYSFS_DEPRECATED_V2=y +# CONFIG_RELAY is not set +CONFIG_NAMESPACES=y +# CONFIG_UTS_NS is not set +# CONFIG_IPC_NS is not set +# CONFIG_USER_NS is not set +# CONFIG_PID_NS is not set +CONFIG_BLK_DEV_INITRD=y +CONFIG_INITRAMFS_SOURCE="" +CONFIG_CC_OPTIMIZE_FOR_SIZE=y +CONFIG_SYSCTL=y +# CONFIG_EMBEDDED is not set +CONFIG_UID16=y +CONFIG_SYSCTL_SYSCALL=y +CONFIG_KALLSYMS=y +# CONFIG_KALLSYMS_ALL is not set +# CONFIG_KALLSYMS_EXTRA_PASS is not set +CONFIG_HOTPLUG=y +CONFIG_PRINTK=y +CONFIG_BUG=y +CONFIG_ELF_CORE=y +CONFIG_COMPAT_BRK=y +CONFIG_BASE_FULL=y +CONFIG_FUTEX=y +CONFIG_ANON_INODES=y +CONFIG_EPOLL=y +CONFIG_SIGNALFD=y +CONFIG_TIMERFD=y +CONFIG_EVENTFD=y +CONFIG_SHMEM=y +CONFIG_VM_EVENT_COUNTERS=y +CONFIG_SLAB=y +# CONFIG_SLUB is not set +# CONFIG_SLOB is not set +# CONFIG_PROFILING is not set +# CONFIG_MARKERS is not set +CONFIG_HAVE_OPROFILE=y +# CONFIG_KPROBES is not set +CONFIG_HAVE_KPROBES=y +CONFIG_HAVE_KRETPROBES=y +CONFIG_PROC_PAGE_MONITOR=y +CONFIG_SLABINFO=y +CONFIG_RT_MUTEXES=y +# CONFIG_TINY_SHMEM is not set +CONFIG_BASE_SMALL=0 +CONFIG_MODULES=y +CONFIG_MODULE_UNLOAD=y +# CONFIG_MODULE_FORCE_UNLOAD is not set +# CONFIG_MODVERSIONS is not set +# CONFIG_MODULE_SRCVERSION_ALL is not set +CONFIG_KMOD=y +CONFIG_BLOCK=y +# CONFIG_LBD is not set +# CONFIG_BLK_DEV_IO_TRACE is not set +# CONFIG_LSF is not set +# CONFIG_BLK_DEV_BSG is not set + +# +# IO Schedulers +# +CONFIG_IOSCHED_NOOP=y +CONFIG_IOSCHED_AS=y +# CONFIG_IOSCHED_DEADLINE is not set +# CONFIG_IOSCHED_CFQ is not set +CONFIG_DEFAULT_AS=y +# CONFIG_DEFAULT_DEADLINE is not set +# CONFIG_DEFAULT_CFQ is not set +# CONFIG_DEFAULT_NOOP is not set +CONFIG_DEFAULT_IOSCHED="anticipatory" +CONFIG_CLASSIC_RCU=y + +# +# System Type +# +# CONFIG_ARCH_AAEC2000 is not set +# CONFIG_ARCH_INTEGRATOR is not set +# CONFIG_ARCH_REALVIEW is not set +# CONFIG_ARCH_VERSATILE is not set +CONFIG_ARCH_AT91=y +# CONFIG_ARCH_CLPS7500 is not set +# CONFIG_ARCH_CLPS711X is not set +# CONFIG_ARCH_CO285 is not set +# CONFIG_ARCH_EBSA110 is not set +# CONFIG_ARCH_EP93XX is not set +# CONFIG_ARCH_FOOTBRIDGE is not set +# CONFIG_ARCH_NETX is not set +# CONFIG_ARCH_H720X is not set +# CONFIG_ARCH_IMX is not set +# CONFIG_ARCH_IOP13XX is not set +# CONFIG_ARCH_IOP32X is not set +# CONFIG_ARCH_IOP33X is not set +# CONFIG_ARCH_IXP23XX is not set +# CONFIG_ARCH_IXP2000 is not set +# CONFIG_ARCH_IXP4XX is not set +# CONFIG_ARCH_L7200 is not set +# CONFIG_ARCH_KS8695 is not set +# CONFIG_ARCH_NS9XXX is not set +# CONFIG_ARCH_MXC is not set +# CONFIG_ARCH_ORION is not set +# CONFIG_ARCH_PNX4008 is not set +# CONFIG_ARCH_PXA is not set +# CONFIG_ARCH_RPC is not set +# CONFIG_ARCH_SA1100 is not set +# CONFIG_ARCH_S3C2410 is not set +# CONFIG_ARCH_SHARK is not set +# CONFIG_ARCH_LH7A40X is not set +# CONFIG_ARCH_DAVINCI is not set +# CONFIG_ARCH_OMAP is not set +# CONFIG_ARCH_MSM7X00A is not set + +# +# Boot options +# + +# +# Power management +# + +# +# Atmel AT91 System-on-Chip +# +# CONFIG_ARCH_AT91RM9200 is not set +# CONFIG_ARCH_AT91SAM9260 is not set +CONFIG_ARCH_AT91SAM9261=y +# CONFIG_ARCH_AT91SAM9263 is not set +# CONFIG_ARCH_AT91SAM9RL is not set +# CONFIG_ARCH_AT91CAP9 is not set +# CONFIG_ARCH_AT91X40 is not set +CONFIG_AT91_PMC_UNIT=y + +# +# AT91SAM9261 Board Type +# +# CONFIG_MACH_AT91SAM9261EK is not set +CONFIG_MACH_PM9261=y + +# +# AT91 Board Options +# +# CONFIG_MTD_NAND_AT91_BUSWIDTH_16 is not set + +# +# AT91 Feature Selections +# +CONFIG_AT91_PROGRAMMABLE_CLOCKS=y +CONFIG_AT91_TIMER_HZ=100 +CONFIG_AT91_EARLY_DBGU=y +# CONFIG_AT91_EARLY_USART0 is not set +# CONFIG_AT91_EARLY_USART1 is not set +# CONFIG_AT91_EARLY_USART2 is not set +# CONFIG_AT91_EARLY_USART3 is not set +# CONFIG_AT91_EARLY_USART4 is not set +# CONFIG_AT91_EARLY_USART5 is not set + +# +# Processor Type +# +CONFIG_CPU_32=y +CONFIG_CPU_ARM926T=y +CONFIG_CPU_32v5=y +CONFIG_CPU_ABRT_EV5TJ=y +CONFIG_CPU_CACHE_VIVT=y +CONFIG_CPU_COPY_V4WB=y +CONFIG_CPU_TLB_V4WBI=y +CONFIG_CPU_CP15=y +CONFIG_CPU_CP15_MMU=y + +# +# Processor Features +# +CONFIG_ARM_THUMB=y +# CONFIG_CPU_ICACHE_DISABLE is not set +# CONFIG_CPU_DCACHE_DISABLE is not set +# CONFIG_CPU_DCACHE_WRITETHROUGH is not set +# CONFIG_CPU_CACHE_ROUND_ROBIN is not set +# CONFIG_OUTER_CACHE is not set + +# +# Bus support +# +# CONFIG_PCI_SYSCALL is not set +# CONFIG_ARCH_SUPPORTS_MSI is not set +CONFIG_PCCARD=y +# CONFIG_PCMCIA_DEBUG is not set +CONFIG_PCMCIA=y +CONFIG_PCMCIA_LOAD_CIS=y +CONFIG_PCMCIA_IOCTL=y + +# +# PC-card bridges +# +CONFIG_AT91_CF=y + +# +# Kernel Features +# +# CONFIG_TICK_ONESHOT is not set +# CONFIG_NO_HZ is not set +# CONFIG_HIGH_RES_TIMERS is not set +CONFIG_GENERIC_CLOCKEVENTS_BUILD=y +# CONFIG_PREEMPT is not set +CONFIG_HZ=100 +CONFIG_AEABI=y +# CONFIG_OABI_COMPAT is not set +# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set +CONFIG_SELECT_MEMORY_MODEL=y +CONFIG_FLATMEM_MANUAL=y +# CONFIG_DISCONTIGMEM_MANUAL is not set +# CONFIG_SPARSEMEM_MANUAL is not set +CONFIG_FLATMEM=y +CONFIG_FLAT_NODE_MEM_MAP=y +# CONFIG_SPARSEMEM_STATIC is not set +# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set +CONFIG_SPLIT_PTLOCK_CPUS=4096 +# CONFIG_RESOURCES_64BIT is not set +CONFIG_ZONE_DMA_FLAG=1 +CONFIG_BOUNCE=y +CONFIG_VIRT_TO_BUS=y +# CONFIG_LEDS is not set +CONFIG_ALIGNMENT_TRAP=y + +# +# Boot options +# +CONFIG_ZBOOT_ROM_TEXT=0x0 +CONFIG_ZBOOT_ROM_BSS=0x0 +CONFIG_CMDLINE=" debug " +# CONFIG_XIP_KERNEL is not set +# CONFIG_KEXEC is not set + +# +# Floating point emulation +# + +# +# At least one emulation must be selected +# +# CONFIG_VFP is not set + +# +# Userspace binary formats +# +CONFIG_BINFMT_ELF=y +# CONFIG_BINFMT_AOUT is not set +# CONFIG_BINFMT_MISC is not set + +# +# Power management options +# +# CONFIG_PM is not set +CONFIG_ARCH_SUSPEND_POSSIBLE=y + +# +# Networking +# +CONFIG_NET=y + +# +# Networking options +# +CONFIG_PACKET=y +# CONFIG_PACKET_MMAP is not set +CONFIG_UNIX=y +# CONFIG_NET_KEY is not set +CONFIG_INET=y +# CONFIG_IP_MULTICAST is not set +# CONFIG_IP_ADVANCED_ROUTER is not set +CONFIG_IP_FIB_HASH=y +CONFIG_IP_PNP=y +# CONFIG_IP_PNP_DHCP is not set +CONFIG_IP_PNP_BOOTP=y +CONFIG_IP_PNP_RARP=y +# CONFIG_NET_IPIP is not set +# CONFIG_NET_IPGRE is not set +# CONFIG_ARPD is not set +# CONFIG_SYN_COOKIES is not set +# CONFIG_INET_AH is not set +# CONFIG_INET_ESP is not set +# CONFIG_INET_IPCOMP is not set +# CONFIG_INET_XFRM_TUNNEL is not set +# CONFIG_INET_TUNNEL is not set +# CONFIG_INET_XFRM_MODE_TRANSPORT is not set +# CONFIG_INET_XFRM_MODE_TUNNEL is not set +# CONFIG_INET_XFRM_MODE_BEET is not set +# CONFIG_INET_LRO is not set +# CONFIG_INET_DIAG is not set +# CONFIG_TCP_CONG_ADVANCED is not set +CONFIG_TCP_CONG_CUBIC=y +CONFIG_DEFAULT_TCP_CONG="cubic" +# CONFIG_TCP_MD5SIG is not set +# CONFIG_IPV6 is not set +# CONFIG_INET6_XFRM_TUNNEL is not set +# CONFIG_INET6_TUNNEL is not set +# CONFIG_NETWORK_SECMARK is not set +# CONFIG_NETFILTER is not set +# CONFIG_IP_DCCP is not set +# CONFIG_IP_SCTP is not set +# CONFIG_TIPC is not set +# CONFIG_ATM is not set +# CONFIG_BRIDGE is not set +# CONFIG_VLAN_8021Q is not set +# CONFIG_DECNET is not set +# CONFIG_LLC2 is not set +# CONFIG_IPX is not set +# CONFIG_ATALK is not set +# CONFIG_X25 is not set +# CONFIG_LAPB is not set +# CONFIG_ECONET is not set +# CONFIG_WAN_ROUTER is not set +# CONFIG_NET_SCHED is not set + +# +# Network testing +# +# CONFIG_NET_PKTGEN is not set +# CONFIG_HAMRADIO is not set +# CONFIG_CAN is not set +# CONFIG_IRDA is not set +# CONFIG_BT is not set +# CONFIG_AF_RXRPC is not set + +# +# Wireless +# +# CONFIG_CFG80211 is not set +# CONFIG_WIRELESS_EXT is not set +# CONFIG_MAC80211 is not set +# CONFIG_IEEE80211 is not set +# CONFIG_RFKILL is not set +# CONFIG_NET_9P is not set + +# +# Device Drivers +# + +# +# Generic Driver Options +# +CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" +CONFIG_STANDALONE=y +CONFIG_PREVENT_FIRMWARE_BUILD=y +CONFIG_FW_LOADER=y +# CONFIG_DEBUG_DRIVER is not set +# CONFIG_DEBUG_DEVRES is not set +# CONFIG_SYS_HYPERVISOR is not set +# CONFIG_CONNECTOR is not set +CONFIG_MTD=y +# CONFIG_MTD_DEBUG is not set +# CONFIG_MTD_CONCAT is not set +CONFIG_MTD_PARTITIONS=y +# CONFIG_MTD_REDBOOT_PARTS is not set +CONFIG_MTD_CMDLINE_PARTS=y +# CONFIG_MTD_AFS_PARTS is not set + +# +# User Modules And Translation Layers +# +CONFIG_MTD_CHAR=y +CONFIG_MTD_BLKDEVS=y +CONFIG_MTD_BLOCK=y +# CONFIG_FTL is not set +# CONFIG_NFTL is not set +# CONFIG_INFTL is not set +# CONFIG_RFD_FTL is not set +# CONFIG_SSFDC is not set +# CONFIG_MTD_OOPS is not set + +# +# RAM/ROM/Flash chip drivers +# +CONFIG_MTD_CFI=y +CONFIG_MTD_JEDECPROBE=y +CONFIG_MTD_GEN_PROBE=y +# CONFIG_MTD_CFI_ADV_OPTIONS is not set +CONFIG_MTD_MAP_BANK_WIDTH_1=y +CONFIG_MTD_MAP_BANK_WIDTH_2=y +CONFIG_MTD_MAP_BANK_WIDTH_4=y +# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set +CONFIG_MTD_CFI_I1=y +CONFIG_MTD_CFI_I2=y +# CONFIG_MTD_CFI_I4 is not set +# CONFIG_MTD_CFI_I8 is not set +CONFIG_MTD_CFI_INTELEXT=y +CONFIG_MTD_CFI_AMDSTD=y +CONFIG_MTD_CFI_STAA=y +CONFIG_MTD_CFI_UTIL=y +CONFIG_MTD_RAM=y +CONFIG_MTD_ROM=y +CONFIG_MTD_ABSENT=y + +# +# Mapping drivers for chip access +# +CONFIG_MTD_COMPLEX_MAPPINGS=y +CONFIG_MTD_PHYSMAP=y +CONFIG_MTD_PHYSMAP_START=0x10000000 +CONFIG_MTD_PHYSMAP_LEN=0x400000 +CONFIG_MTD_PHYSMAP_BANKWIDTH=2 +# CONFIG_MTD_ARM_INTEGRATOR is not set +# CONFIG_MTD_IMPA7 is not set +# CONFIG_MTD_PLATRAM is not set + +# +# Self-contained MTD device drivers +# +CONFIG_MTD_DATAFLASH=y +# CONFIG_MTD_M25P80 is not set +# CONFIG_MTD_SLRAM is not set +# CONFIG_MTD_PHRAM is not set +# CONFIG_MTD_MTDRAM is not set +# CONFIG_MTD_BLOCK2MTD is not set + +# +# Disk-On-Chip Device Drivers +# +# CONFIG_MTD_DOC2000 is not set +# CONFIG_MTD_DOC2001 is not set +# CONFIG_MTD_DOC2001PLUS is not set +CONFIG_MTD_NAND=y +CONFIG_MTD_NAND_VERIFY_WRITE=y +# CONFIG_MTD_NAND_ECC_SMC is not set +# CONFIG_MTD_NAND_MUSEUM_IDS is not set +CONFIG_MTD_NAND_IDS=y +# CONFIG_MTD_NAND_DISKONCHIP is not set +CONFIG_MTD_NAND_AT91=y +CONFIG_MTD_NAND_AT91_ECC_SOFT=y +# CONFIG_MTD_NAND_AT91_ECC_HW is not set +# CONFIG_MTD_NAND_AT91_ECC_NONE is not set +# CONFIG_MTD_NAND_NANDSIM is not set +# CONFIG_MTD_NAND_PLATFORM is not set +# CONFIG_MTD_ALAUDA is not set +# CONFIG_MTD_ONENAND is not set + +# +# UBI - Unsorted block images +# +# CONFIG_MTD_UBI is not set +# CONFIG_PARPORT is not set +CONFIG_BLK_DEV=y +# CONFIG_BLK_DEV_COW_COMMON is not set +CONFIG_BLK_DEV_LOOP=y +# CONFIG_BLK_DEV_CRYPTOLOOP is not set +# CONFIG_BLK_DEV_NBD is not set +# CONFIG_BLK_DEV_UB is not set +CONFIG_BLK_DEV_RAM=y +CONFIG_BLK_DEV_RAM_COUNT=16 +CONFIG_BLK_DEV_RAM_SIZE=8192 +# CONFIG_BLK_DEV_XIP is not set +# CONFIG_CDROM_PKTCDVD is not set +# CONFIG_ATA_OVER_ETH is not set +CONFIG_MISC_DEVICES=y +# CONFIG_ATMEL_PWM is not set +# CONFIG_EEPROM_93CX6 is not set +CONFIG_ATMEL_SSC=y +# CONFIG_ENCLOSURE_SERVICES is not set +CONFIG_HAVE_IDE=y +CONFIG_IDE=y +CONFIG_BLK_DEV_IDE=y + +# +# Please see Documentation/ide/ide.txt for help/info on IDE drives +# +# CONFIG_BLK_DEV_IDE_SATA is not set +CONFIG_BLK_DEV_IDEDISK=y +CONFIG_IDEDISK_MULTI_MODE=y +CONFIG_BLK_DEV_IDECS=y +# CONFIG_BLK_DEV_IDECD is not set +# CONFIG_BLK_DEV_IDETAPE is not set +# CONFIG_BLK_DEV_IDEFLOPPY is not set +# CONFIG_BLK_DEV_IDESCSI is not set +# CONFIG_IDE_TASK_IOCTL is not set +CONFIG_IDE_PROC_FS=y + +# +# IDE chipset support/bugfixes +# +# CONFIG_IDE_GENERIC is not set +# CONFIG_BLK_DEV_PLATFORM is not set +# CONFIG_BLK_DEV_IDEDMA is not set +CONFIG_IDE_ARCH_OBSOLETE_INIT=y +# CONFIG_BLK_DEV_HD is not set + +# +# SCSI device support +# +# CONFIG_RAID_ATTRS is not set +CONFIG_SCSI=m +CONFIG_SCSI_DMA=y +# CONFIG_SCSI_TGT is not set +# CONFIG_SCSI_NETLINK is not set +CONFIG_SCSI_PROC_FS=y + +# +# SCSI support type (disk, tape, CD-ROM) +# +CONFIG_BLK_DEV_SD=m +# CONFIG_CHR_DEV_ST is not set +# CONFIG_CHR_DEV_OSST is not set +# CONFIG_BLK_DEV_SR is not set +# CONFIG_CHR_DEV_SG is not set +# CONFIG_CHR_DEV_SCH is not set + +# +# Some SCSI devices (e.g. CD jukebox) support multiple LUNs +# +CONFIG_SCSI_MULTI_LUN=y +# CONFIG_SCSI_CONSTANTS is not set +# CONFIG_SCSI_LOGGING is not set +# CONFIG_SCSI_SCAN_ASYNC is not set +CONFIG_SCSI_WAIT_SCAN=m + +# +# SCSI Transports +# +# CONFIG_SCSI_SPI_ATTRS is not set +# CONFIG_SCSI_FC_ATTRS is not set +# CONFIG_SCSI_ISCSI_ATTRS is not set +# CONFIG_SCSI_SAS_LIBSAS is not set +# CONFIG_SCSI_SRP_ATTRS is not set +# CONFIG_SCSI_LOWLEVEL is not set +# CONFIG_SCSI_LOWLEVEL_PCMCIA is not set +# CONFIG_ATA is not set +# CONFIG_MD is not set +CONFIG_NETDEVICES=y +# CONFIG_NETDEVICES_MULTIQUEUE is not set +# CONFIG_DUMMY is not set +# CONFIG_BONDING is not set +# CONFIG_MACVLAN is not set +# CONFIG_EQUALIZER is not set +# CONFIG_TUN is not set +# CONFIG_VETH is not set +CONFIG_PHYLIB=y + +# +# MII PHY device drivers +# +# CONFIG_MARVELL_PHY is not set +# CONFIG_DAVICOM_PHY is not set +# CONFIG_QSEMI_PHY is not set +# CONFIG_LXT_PHY is not set +# CONFIG_CICADA_PHY is not set +# CONFIG_VITESSE_PHY is not set +# CONFIG_SMSC_PHY is not set +# CONFIG_BROADCOM_PHY is not set +# CONFIG_ICPLUS_PHY is not set +# CONFIG_REALTEK_PHY is not set +# CONFIG_FIXED_PHY is not set +# CONFIG_MDIO_BITBANG is not set +CONFIG_NET_ETHERNET=y +CONFIG_MII=y +# CONFIG_AX88796 is not set +# CONFIG_SMC91X is not set +CONFIG_DM9000=y +# CONFIG_ENC28J60 is not set +CONFIG_DM9000_DEBUGLEVEL=4 +# CONFIG_IBM_NEW_EMAC_ZMII is not set +# CONFIG_IBM_NEW_EMAC_RGMII is not set +# CONFIG_IBM_NEW_EMAC_TAH is not set +# CONFIG_IBM_NEW_EMAC_EMAC4 is not set +# CONFIG_B44 is not set +# CONFIG_NETDEV_1000 is not set +# CONFIG_NETDEV_10000 is not set + +# +# Wireless LAN +# +# CONFIG_WLAN_PRE80211 is not set +# CONFIG_WLAN_80211 is not set + +# +# USB Network Adapters +# +# CONFIG_USB_CATC is not set +# CONFIG_USB_KAWETH is not set +# CONFIG_USB_PEGASUS is not set +# CONFIG_USB_RTL8150 is not set +# CONFIG_USB_USBNET is not set +# CONFIG_NET_PCMCIA is not set +# CONFIG_WAN is not set +# CONFIG_PPP is not set +# CONFIG_SLIP is not set +# CONFIG_NETCONSOLE is not set +# CONFIG_NETPOLL is not set +# CONFIG_NET_POLL_CONTROLLER is not set +# CONFIG_ISDN is not set + +# +# Input device support +# +CONFIG_INPUT=y +# CONFIG_INPUT_FF_MEMLESS is not set +# CONFIG_INPUT_POLLDEV is not set + +# +# Userland interfaces +# +CONFIG_INPUT_MOUSEDEV=y +# CONFIG_INPUT_MOUSEDEV_PSAUX is not set +CONFIG_INPUT_MOUSEDEV_SCREEN_X=320 +CONFIG_INPUT_MOUSEDEV_SCREEN_Y=240 +# CONFIG_INPUT_JOYDEV is not set +CONFIG_INPUT_EVDEV=y +# CONFIG_INPUT_EVBUG is not set + +# +# Input Device Drivers +# +CONFIG_INPUT_KEYBOARD=y +# CONFIG_KEYBOARD_ATKBD is not set +# CONFIG_KEYBOARD_SUNKBD is not set +# CONFIG_KEYBOARD_LKKBD is not set +# CONFIG_KEYBOARD_XTKBD is not set +# CONFIG_KEYBOARD_NEWTON is not set +# CONFIG_KEYBOARD_STOWAWAY is not set +CONFIG_KEYBOARD_GPIO=y +# CONFIG_INPUT_MOUSE is not set +# CONFIG_INPUT_JOYSTICK is not set +# CONFIG_INPUT_TABLET is not set +CONFIG_INPUT_TOUCHSCREEN=y +# CONFIG_TOUCHSCREEN_ADS7846 is not set +# CONFIG_TOUCHSCREEN_FUJITSU is not set +# CONFIG_TOUCHSCREEN_GUNZE is not set +# CONFIG_TOUCHSCREEN_ELO is not set +# CONFIG_TOUCHSCREEN_MTOUCH is not set +# CONFIG_TOUCHSCREEN_MK712 is not set +# CONFIG_TOUCHSCREEN_PENMOUNT is not set +# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set +# CONFIG_TOUCHSCREEN_TOUCHWIN is not set +# CONFIG_TOUCHSCREEN_UCB1400 is not set +# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set +CONFIG_TOUCHSCREEN_TSC2301=y +# CONFIG_TSC2301_XY_SWAP is not set +# CONFIG_TSC2301_X_INVERSE is not set +# CONFIG_TSC2301_Y_INVERSE is not set +# CONFIG_INPUT_MISC is not set + +# +# Hardware I/O ports +# +# CONFIG_SERIO is not set +# CONFIG_GAMEPORT is not set + +# +# Character devices +# +CONFIG_VT=y +CONFIG_VT_CONSOLE=y +CONFIG_HW_CONSOLE=y +# CONFIG_VT_HW_CONSOLE_BINDING is not set +# CONFIG_SERIAL_NONSTANDARD is not set + +# +# Serial drivers +# +# CONFIG_SERIAL_8250 is not set + +# +# Non-8250 serial port support +# +CONFIG_SERIAL_ATMEL=y +CONFIG_SERIAL_ATMEL_CONSOLE=y +CONFIG_SERIAL_ATMEL_PDC=y +# CONFIG_SERIAL_ATMEL_TTYAT is not set +CONFIG_SERIAL_CORE=y +CONFIG_SERIAL_CORE_CONSOLE=y +CONFIG_UNIX98_PTYS=y +# CONFIG_LEGACY_PTYS is not set +# CONFIG_IPMI_HANDLER is not set +CONFIG_HW_RANDOM=y +# CONFIG_NVRAM is not set +# CONFIG_R3964 is not set + +# +# PCMCIA character devices +# +# CONFIG_SYNCLINK_CS is not set +# CONFIG_CARDMAN_4000 is not set +# CONFIG_CARDMAN_4040 is not set +# CONFIG_IPWIRELESS is not set +# CONFIG_RAW_DRIVER is not set +# CONFIG_TCG_TPM is not set +# CONFIG_I2C is not set + +# +# SPI support +# +CONFIG_SPI=y +# CONFIG_SPI_DEBUG is not set +CONFIG_SPI_MASTER=y + +# +# SPI Master Controller Drivers +# +CONFIG_SPI_ATMEL=y +# CONFIG_SPI_BITBANG is not set + +# +# SPI Protocol Masters +# +# CONFIG_SPI_AT25 is not set +# CONFIG_SPI_SPIDEV is not set +# CONFIG_SPI_TLE62X0 is not set +CONFIG_SPI_TSC2301=y +CONFIG_W1=y + +# +# 1-wire Bus Masters +# +# CONFIG_W1_MASTER_DS2490 is not set +# CONFIG_W1_MASTER_DS1WM is not set +CONFIG_W1_MASTER_GPIO=y + +# +# 1-wire Slaves +# +# CONFIG_W1_SLAVE_THERM is not set +CONFIG_W1_SLAVE_SMEM=y +# CONFIG_W1_SLAVE_DS2433 is not set +# CONFIG_W1_SLAVE_DS2760 is not set +# CONFIG_POWER_SUPPLY is not set +# CONFIG_HWMON is not set +CONFIG_WATCHDOG=y +CONFIG_WATCHDOG_NOWAYOUT=y + +# +# Watchdog Device Drivers +# +# CONFIG_SOFT_WATCHDOG is not set +CONFIG_AT91SAM9_WATCHDOG=y + +# +# USB-based Watchdog Cards +# +# CONFIG_USBPCWATCHDOG is not set + +# +# Sonics Silicon Backplane +# +CONFIG_SSB_POSSIBLE=y +# CONFIG_SSB is not set + +# +# Multifunction device drivers +# +# CONFIG_MFD_SM501 is not set +# CONFIG_MFD_ASIC3 is not set + +# +# Multimedia devices +# +# CONFIG_VIDEO_DEV is not set +# CONFIG_DVB_CORE is not set +# CONFIG_DAB is not set + +# +# Graphics support +# +# CONFIG_VGASTATE is not set +# CONFIG_VIDEO_OUTPUT_CONTROL is not set +CONFIG_FB=y +# CONFIG_FIRMWARE_EDID is not set +# CONFIG_FB_DDC is not set +CONFIG_FB_CFB_FILLRECT=y +CONFIG_FB_CFB_COPYAREA=y +CONFIG_FB_CFB_IMAGEBLIT=y +# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set +# CONFIG_FB_SYS_FILLRECT is not set +# CONFIG_FB_SYS_COPYAREA is not set +# CONFIG_FB_SYS_IMAGEBLIT is not set +# CONFIG_FB_SYS_FOPS is not set +CONFIG_FB_DEFERRED_IO=y +# CONFIG_FB_SVGALIB is not set +# CONFIG_FB_MACMODES is not set +# CONFIG_FB_BACKLIGHT is not set +# CONFIG_FB_MODE_HELPERS is not set +# CONFIG_FB_TILEBLITTING is not set + +# +# Frame buffer hardware drivers +# +# CONFIG_FB_S1D15605 is not set +# CONFIG_FB_S1D13XXX is not set +CONFIG_FB_ATMEL=y +# CONFIG_FB_VIRTUAL is not set +# CONFIG_BACKLIGHT_LCD_SUPPORT is not set + +# +# Display device support +# +# CONFIG_DISPLAY_SUPPORT is not set + +# +# Console display driver support +# +# CONFIG_VGA_CONSOLE is not set +CONFIG_DUMMY_CONSOLE=y +CONFIG_FRAMEBUFFER_CONSOLE=y +# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set +CONFIG_FRAMEBUFFER_CONSOLE_ROTATION=y +# CONFIG_FONTS is not set +CONFIG_FONT_8x8=y +CONFIG_FONT_8x16=y +CONFIG_LOGO=y +CONFIG_LOGO_LINUX_MONO=y +CONFIG_LOGO_LINUX_VGA16=y +CONFIG_LOGO_LINUX_CLUT224=y + +# +# Sound +# +CONFIG_SOUND=y + +# +# Advanced Linux Sound Architecture +# +CONFIG_SND=y +CONFIG_SND_TIMER=y +CONFIG_SND_PCM=y +# CONFIG_SND_SEQUENCER is not set +CONFIG_SND_OSSEMUL=y +CONFIG_SND_MIXER_OSS=y +CONFIG_SND_PCM_OSS=y +CONFIG_SND_PCM_OSS_PLUGINS=y +# CONFIG_SND_DYNAMIC_MINORS is not set +CONFIG_SND_SUPPORT_OLD_API=y +CONFIG_SND_VERBOSE_PROCFS=y +CONFIG_SND_VERBOSE_PRINTK=y +# CONFIG_SND_DEBUG is not set + +# +# Generic devices +# +# CONFIG_SND_DUMMY is not set +# CONFIG_SND_MTPAV is not set +# CONFIG_SND_SERIAL_U16550 is not set +# CONFIG_SND_MPU401 is not set + +# +# ALSA ARM devices +# + +# +# SPI devices +# +# CONFIG_SND_AT73C213 is not set + +# +# USB devices +# +# CONFIG_SND_USB_AUDIO is not set +# CONFIG_SND_USB_CAIAQ is not set + +# +# PCMCIA devices +# +# CONFIG_SND_VXPOCKET is not set +# CONFIG_SND_PDAUDIOCF is not set + +# +# System on Chip audio support +# +CONFIG_SND_SOC=y +CONFIG_SND_AT91_SOC=y +CONFIG_SND_AT91_SOC_SSC=y +CONFIG_SND_AT91_SOC_PM9261_TSC2301=y + +# +# SoC Audio support for SuperH +# + +# +# ALSA SoC audio for Freescale SOCs +# +CONFIG_SND_SOC_TSC2301=y + +# +# Open Sound System +# +# CONFIG_SOUND_PRIME is not set +CONFIG_HID_SUPPORT=y +CONFIG_HID=y +CONFIG_HID_DEBUG=y +# CONFIG_HIDRAW is not set + +# +# USB Input Devices +# +CONFIG_USB_HID=y +# CONFIG_USB_HIDINPUT_POWERBOOK is not set +# CONFIG_HID_FF is not set +# CONFIG_USB_HIDDEV is not set +CONFIG_USB_SUPPORT=y +CONFIG_USB_ARCH_HAS_HCD=y +CONFIG_USB_ARCH_HAS_OHCI=y +# CONFIG_USB_ARCH_HAS_EHCI is not set +CONFIG_USB=y +# CONFIG_USB_DEBUG is not set +# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set + +# +# Miscellaneous USB options +# +CONFIG_USB_DEVICEFS=y +CONFIG_USB_DEVICE_CLASS=y +# CONFIG_USB_DYNAMIC_MINORS is not set +# CONFIG_USB_OTG is not set + +# +# USB Host Controller Drivers +# +# CONFIG_USB_ISP116X_HCD is not set +CONFIG_USB_OHCI_HCD=y +# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set +# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set +CONFIG_USB_OHCI_LITTLE_ENDIAN=y +# CONFIG_USB_SL811_HCD is not set +# CONFIG_USB_R8A66597_HCD is not set + +# +# USB Device Class drivers +# +# CONFIG_USB_ACM is not set +# CONFIG_USB_PRINTER is not set + +# +# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' +# + +# +# may also be needed; see USB_STORAGE Help for more information +# +CONFIG_USB_STORAGE=m +# CONFIG_USB_STORAGE_DEBUG is not set +CONFIG_USB_STORAGE_DATAFAB=y +CONFIG_USB_STORAGE_FREECOM=y +CONFIG_USB_STORAGE_ISD200=y +CONFIG_USB_STORAGE_DPCM=y +CONFIG_USB_STORAGE_USBAT=y +CONFIG_USB_STORAGE_SDDR09=y +CONFIG_USB_STORAGE_SDDR55=y +CONFIG_USB_STORAGE_JUMPSHOT=y +CONFIG_USB_STORAGE_ALAUDA=y +# CONFIG_USB_STORAGE_ONETOUCH is not set +# CONFIG_USB_STORAGE_KARMA is not set +# CONFIG_USB_LIBUSUAL is not set + +# +# USB Imaging devices +# +# CONFIG_USB_MDC800 is not set +# CONFIG_USB_MICROTEK is not set +CONFIG_USB_MON=y + +# +# USB port drivers +# +# CONFIG_USB_SERIAL is not set + +# +# USB Miscellaneous drivers +# +# CONFIG_USB_EMI62 is not set +# CONFIG_USB_EMI26 is not set +# CONFIG_USB_ADUTUX is not set +# CONFIG_USB_AUERSWALD is not set +# CONFIG_USB_RIO500 is not set +# CONFIG_USB_LEGOTOWER is not set +# CONFIG_USB_LCD is not set +# CONFIG_USB_BERRY_CHARGE is not set +# CONFIG_USB_LED is not set +# CONFIG_USB_CYPRESS_CY7C63 is not set +# CONFIG_USB_CYTHERM is not set +# CONFIG_USB_PHIDGET is not set +# CONFIG_USB_IDMOUSE is not set +# CONFIG_USB_FTDI_ELAN is not set +# CONFIG_USB_APPLEDISPLAY is not set +# CONFIG_USB_LD is not set +# CONFIG_USB_TRANCEVIBRATOR is not set +# CONFIG_USB_IOWARRIOR is not set +# CONFIG_USB_TEST is not set +CONFIG_USB_GADGET=m +# CONFIG_USB_GADGET_DEBUG is not set +# CONFIG_USB_GADGET_DEBUG_FILES is not set +CONFIG_USB_GADGET_SELECTED=y +# CONFIG_USB_GADGET_AMD5536UDC is not set +# CONFIG_USB_GADGET_ATMEL_USBA is not set +# CONFIG_USB_GADGET_FSL_USB2 is not set +# CONFIG_USB_GADGET_NET2280 is not set +# CONFIG_USB_GADGET_PXA2XX is not set +# CONFIG_USB_GADGET_M66592 is not set +# CONFIG_USB_GADGET_GOKU is not set +# CONFIG_USB_GADGET_LH7A40X is not set +# CONFIG_USB_GADGET_OMAP is not set +# CONFIG_USB_GADGET_S3C2410 is not set +CONFIG_USB_GADGET_AT91=y +CONFIG_USB_AT91=m +# CONFIG_USB_GADGET_DUMMY_HCD is not set +# CONFIG_USB_GADGET_DUALSPEED is not set +CONFIG_USB_ZERO=m +# CONFIG_USB_ETH is not set +CONFIG_USB_GADGETFS=m +CONFIG_USB_FILE_STORAGE=m +# CONFIG_USB_FILE_STORAGE_TEST is not set +CONFIG_USB_G_SERIAL=m +# CONFIG_USB_MIDI_GADGET is not set +# CONFIG_USB_G_PRINTER is not set +CONFIG_MMC=y +# CONFIG_MMC_DEBUG is not set +# CONFIG_MMC_UNSAFE_RESUME is not set + +# +# MMC/SD Card Drivers +# +CONFIG_MMC_BLOCK=y +CONFIG_MMC_BLOCK_BOUNCE=y +# CONFIG_SDIO_UART is not set + +# +# MMC/SD Host Controller Drivers +# +# CONFIG_MMC_AT91 is not set +CONFIG_MMC_SPI=y +CONFIG_NEW_LEDS=y +CONFIG_LEDS_CLASS=y + +# +# LED drivers +# +CONFIG_LEDS_GPIO=y + +# +# LED Triggers +# +CONFIG_LEDS_TRIGGERS=y +CONFIG_LEDS_TRIGGER_TIMER=y +CONFIG_LEDS_TRIGGER_IDE_DISK=y +CONFIG_LEDS_TRIGGER_HEARTBEAT=y +CONFIG_RTC_LIB=y +CONFIG_RTC_CLASS=y +CONFIG_RTC_HCTOSYS=y +CONFIG_RTC_HCTOSYS_DEVICE="rtc0" +# CONFIG_RTC_DEBUG is not set + +# +# RTC interfaces +# +CONFIG_RTC_INTF_SYSFS=y +CONFIG_RTC_INTF_PROC=y +CONFIG_RTC_INTF_DEV=y +CONFIG_RTC_INTF_DEV_UIE_EMUL=y +# CONFIG_RTC_DRV_TEST is not set + +# +# SPI RTC drivers +# +# CONFIG_RTC_DRV_MAX6902 is not set +# CONFIG_RTC_DRV_R9701 is not set +# CONFIG_RTC_DRV_RS5C348 is not set + +# +# Platform RTC drivers +# +# CONFIG_RTC_DRV_CMOS is not set +# CONFIG_RTC_DRV_DS1511 is not set +# CONFIG_RTC_DRV_DS1553 is not set +# CONFIG_RTC_DRV_DS1742 is not set +# CONFIG_RTC_DRV_STK17TA8 is not set +# CONFIG_RTC_DRV_M48T86 is not set +# CONFIG_RTC_DRV_M48T59 is not set +# CONFIG_RTC_DRV_V3020 is not set + +# +# on-CPU RTC drivers +# +CONFIG_RTC_DRV_AT91SAM9=y +CONFIG_RTC_DRV_AT91SAM9_RTT=0 +CONFIG_RTC_DRV_AT91SAM9_GPBR=0 + +# +# File systems +# +CONFIG_EXT2_FS=y +# CONFIG_EXT2_FS_XATTR is not set +# CONFIG_EXT2_FS_XIP is not set +CONFIG_EXT3_FS=y +# CONFIG_EXT3_FS_XATTR is not set +# CONFIG_EXT4DEV_FS is not set +CONFIG_JBD=y +# CONFIG_REISERFS_FS is not set +# CONFIG_JFS_FS is not set +# CONFIG_FS_POSIX_ACL is not set +# CONFIG_XFS_FS is not set +# CONFIG_GFS2_FS is not set +# CONFIG_OCFS2_FS is not set +CONFIG_DNOTIFY=y +CONFIG_INOTIFY=y +CONFIG_INOTIFY_USER=y +# CONFIG_QUOTA is not set +# CONFIG_AUTOFS_FS is not set +# CONFIG_AUTOFS4_FS is not set +# CONFIG_FUSE_FS is not set + +# +# CD-ROM/DVD Filesystems +# +# CONFIG_ISO9660_FS is not set +# CONFIG_UDF_FS is not set + +# +# DOS/FAT/NT Filesystems +# +CONFIG_FAT_FS=m +# CONFIG_MSDOS_FS is not set +CONFIG_VFAT_FS=m +CONFIG_FAT_DEFAULT_CODEPAGE=437 +CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" +# CONFIG_NTFS_FS is not set + +# +# Pseudo filesystems +# +CONFIG_PROC_FS=y +CONFIG_PROC_SYSCTL=y +CONFIG_SYSFS=y +CONFIG_TMPFS=y +# CONFIG_TMPFS_POSIX_ACL is not set +# CONFIG_HUGETLB_PAGE is not set +# CONFIG_CONFIGFS_FS is not set + +# +# Miscellaneous filesystems +# +# CONFIG_ADFS_FS is not set +# CONFIG_AFFS_FS is not set +# CONFIG_HFS_FS is not set +# CONFIG_HFSPLUS_FS is not set +# CONFIG_BEFS_FS is not set +# CONFIG_BFS_FS is not set +# CONFIG_EFS_FS is not set +CONFIG_JFFS2_FS=y +CONFIG_JFFS2_FS_DEBUG=0 +CONFIG_JFFS2_FS_WRITEBUFFER=y +# CONFIG_JFFS2_FS_WBUF_VERIFY is not set +# CONFIG_JFFS2_SUMMARY is not set +# CONFIG_JFFS2_FS_XATTR is not set +# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set +CONFIG_JFFS2_ZLIB=y +# CONFIG_JFFS2_LZO is not set +CONFIG_JFFS2_RTIME=y +# CONFIG_JFFS2_RUBIN is not set +# CONFIG_CRAMFS is not set +# CONFIG_VXFS_FS is not set +# CONFIG_MINIX_FS is not set +# CONFIG_HPFS_FS is not set +# CONFIG_QNX4FS_FS is not set +# CONFIG_ROMFS_FS is not set +# CONFIG_SYSV_FS is not set +# CONFIG_UFS_FS is not set +CONFIG_NETWORK_FILESYSTEMS=y +CONFIG_NFS_FS=y +# CONFIG_NFS_V3 is not set +# CONFIG_NFS_V4 is not set +# CONFIG_NFS_DIRECTIO is not set +# CONFIG_NFSD is not set +CONFIG_ROOT_NFS=y +CONFIG_LOCKD=y +CONFIG_NFS_COMMON=y +CONFIG_SUNRPC=y +CONFIG_SUNRPC_BIND34=y +# CONFIG_RPCSEC_GSS_KRB5 is not set +# CONFIG_RPCSEC_GSS_SPKM3 is not set +# CONFIG_SMB_FS is not set +# CONFIG_CIFS is not set +# CONFIG_NCP_FS is not set +# CONFIG_CODA_FS is not set +# CONFIG_AFS_FS is not set + +# +# Partition Types +# +# CONFIG_PARTITION_ADVANCED is not set +CONFIG_MSDOS_PARTITION=y +CONFIG_NLS=y +CONFIG_NLS_DEFAULT="iso8859-1" +CONFIG_NLS_CODEPAGE_437=m +# CONFIG_NLS_CODEPAGE_737 is not set +# CONFIG_NLS_CODEPAGE_775 is not set +# CONFIG_NLS_CODEPAGE_850 is not set +# CONFIG_NLS_CODEPAGE_852 is not set +# CONFIG_NLS_CODEPAGE_855 is not set +# CONFIG_NLS_CODEPAGE_857 is not set +# CONFIG_NLS_CODEPAGE_860 is not set +# CONFIG_NLS_CODEPAGE_861 is not set +# CONFIG_NLS_CODEPAGE_862 is not set +# CONFIG_NLS_CODEPAGE_863 is not set +# CONFIG_NLS_CODEPAGE_864 is not set +# CONFIG_NLS_CODEPAGE_865 is not set +# CONFIG_NLS_CODEPAGE_866 is not set +# CONFIG_NLS_CODEPAGE_869 is not set +# CONFIG_NLS_CODEPAGE_936 is not set +# CONFIG_NLS_CODEPAGE_950 is not set +# CONFIG_NLS_CODEPAGE_932 is not set +# CONFIG_NLS_CODEPAGE_949 is not set +# CONFIG_NLS_CODEPAGE_874 is not set +# CONFIG_NLS_ISO8859_8 is not set +# CONFIG_NLS_CODEPAGE_1250 is not set +# CONFIG_NLS_CODEPAGE_1251 is not set +# CONFIG_NLS_ASCII is not set +CONFIG_NLS_ISO8859_1=m +# CONFIG_NLS_ISO8859_2 is not set +# CONFIG_NLS_ISO8859_3 is not set +# CONFIG_NLS_ISO8859_4 is not set +# CONFIG_NLS_ISO8859_5 is not set +# CONFIG_NLS_ISO8859_6 is not set +# CONFIG_NLS_ISO8859_7 is not set +# CONFIG_NLS_ISO8859_9 is not set +# CONFIG_NLS_ISO8859_13 is not set +# CONFIG_NLS_ISO8859_14 is not set +# CONFIG_NLS_ISO8859_15 is not set +# CONFIG_NLS_KOI8_R is not set +# CONFIG_NLS_KOI8_U is not set +# CONFIG_NLS_UTF8 is not set +# CONFIG_DLM is not set + +# +# Kernel hacking +# +# CONFIG_PRINTK_TIME is not set +CONFIG_ENABLE_WARN_DEPRECATED=y +CONFIG_ENABLE_MUST_CHECK=y +# CONFIG_MAGIC_SYSRQ is not set +# CONFIG_UNUSED_SYMBOLS is not set +# CONFIG_DEBUG_FS is not set +# CONFIG_HEADERS_CHECK is not set +CONFIG_DEBUG_KERNEL=y +# CONFIG_DEBUG_SHIRQ is not set +CONFIG_DETECT_SOFTLOCKUP=y +CONFIG_SCHED_DEBUG=y +# CONFIG_SCHEDSTATS is not set +CONFIG_TIMER_STATS=y +# CONFIG_DEBUG_SLAB is not set +# CONFIG_DEBUG_RT_MUTEXES is not set +# CONFIG_RT_MUTEX_TESTER is not set +# CONFIG_DEBUG_SPINLOCK is not set +# CONFIG_DEBUG_MUTEXES is not set +# CONFIG_DEBUG_LOCK_ALLOC is not set +# CONFIG_PROVE_LOCKING is not set +# CONFIG_LOCK_STAT is not set +# CONFIG_DEBUG_SPINLOCK_SLEEP is not set +# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set +# CONFIG_DEBUG_KOBJECT is not set +CONFIG_DEBUG_BUGVERBOSE=y +# CONFIG_DEBUG_INFO is not set +# CONFIG_DEBUG_VM is not set +# CONFIG_DEBUG_LIST is not set +# CONFIG_DEBUG_SG is not set +CONFIG_FRAME_POINTER=y +# CONFIG_BOOT_PRINTK_DELAY is not set +# CONFIG_RCU_TORTURE_TEST is not set +# CONFIG_BACKTRACE_SELF_TEST is not set +# CONFIG_FAULT_INJECTION is not set +# CONFIG_SAMPLES is not set +CONFIG_DEBUG_USER=y +# CONFIG_DEBUG_ERRORS is not set +# CONFIG_DEBUG_STACK_USAGE is not set +CONFIG_DEBUG_LL=y +# CONFIG_DEBUG_ICEDCC is not set + +# +# Security options +# +# CONFIG_KEYS is not set +# CONFIG_SECURITY is not set +# CONFIG_SECURITY_FILE_CAPABILITIES is not set +# CONFIG_CRYPTO is not set + +# +# Library routines +# +CONFIG_BITREVERSE=y +# CONFIG_CRC_CCITT is not set +# CONFIG_CRC16 is not set +CONFIG_CRC_ITU_T=y +CONFIG_CRC32=y +CONFIG_CRC7=y +# CONFIG_LIBCRC32C is not set +CONFIG_ZLIB_INFLATE=y +CONFIG_ZLIB_DEFLATE=y +CONFIG_PLIST=y +CONFIG_HAS_IOMEM=y +CONFIG_HAS_IOPORT=y +CONFIG_HAS_DMA=y diff --git a/packages/linux/linux-2.6.25.20/ronetix-pm9263/defconfig b/packages/linux/linux-2.6.25.20/ronetix-pm9263/defconfig new file mode 100644 index 0000000000..c7171cd4ae --- /dev/null +++ b/packages/linux/linux-2.6.25.20/ronetix-pm9263/defconfig @@ -0,0 +1,1344 @@ +# +# Automatically generated make config: don't edit +# Linux kernel version: 2.6.25.20 +# Fri Jan 2 12:48:49 2009 +# +CONFIG_ARM=y +CONFIG_SYS_SUPPORTS_APM_EMULATION=y +CONFIG_GENERIC_GPIO=y +CONFIG_GENERIC_TIME=y +CONFIG_GENERIC_CLOCKEVENTS=y +CONFIG_MMU=y +# CONFIG_NO_IOPORT is not set +CONFIG_GENERIC_HARDIRQS=y +CONFIG_STACKTRACE_SUPPORT=y +CONFIG_LOCKDEP_SUPPORT=y +CONFIG_TRACE_IRQFLAGS_SUPPORT=y +CONFIG_HARDIRQS_SW_RESEND=y +CONFIG_GENERIC_IRQ_PROBE=y +CONFIG_RWSEM_GENERIC_SPINLOCK=y +# CONFIG_ARCH_HAS_ILOG2_U32 is not set +# CONFIG_ARCH_HAS_ILOG2_U64 is not set +CONFIG_GENERIC_HWEIGHT=y +CONFIG_GENERIC_CALIBRATE_DELAY=y +CONFIG_ARCH_SUPPORTS_AOUT=y +CONFIG_ZONE_DMA=y +CONFIG_VECTORS_BASE=0xffff0000 +CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" + +# +# General setup +# +CONFIG_EXPERIMENTAL=y +CONFIG_BROKEN_ON_SMP=y +CONFIG_INIT_ENV_ARG_LIMIT=32 +CONFIG_LOCALVERSION="-KaeilOS-PM9263" +# CONFIG_LOCALVERSION_AUTO is not set +# CONFIG_SWAP is not set +CONFIG_SYSVIPC=y +CONFIG_SYSVIPC_SYSCTL=y +# CONFIG_POSIX_MQUEUE is not set +# CONFIG_BSD_PROCESS_ACCT is not set +# CONFIG_TASKSTATS is not set +# CONFIG_AUDIT is not set +# CONFIG_IKCONFIG is not set +CONFIG_LOG_BUF_SHIFT=14 +# CONFIG_CGROUPS is not set +CONFIG_GROUP_SCHED=y +CONFIG_FAIR_GROUP_SCHED=y +# CONFIG_RT_GROUP_SCHED is not set +CONFIG_USER_SCHED=y +# CONFIG_CGROUP_SCHED is not set +CONFIG_SYSFS_DEPRECATED=y +CONFIG_SYSFS_DEPRECATED_V2=y +# CONFIG_RELAY is not set +CONFIG_NAMESPACES=y +# CONFIG_UTS_NS is not set +# CONFIG_IPC_NS is not set +# CONFIG_USER_NS is not set +# CONFIG_PID_NS is not set +CONFIG_BLK_DEV_INITRD=y +CONFIG_INITRAMFS_SOURCE="" +CONFIG_CC_OPTIMIZE_FOR_SIZE=y +CONFIG_SYSCTL=y +# CONFIG_EMBEDDED is not set +CONFIG_UID16=y +CONFIG_SYSCTL_SYSCALL=y +CONFIG_KALLSYMS=y +# CONFIG_KALLSYMS_ALL is not set +# CONFIG_KALLSYMS_EXTRA_PASS is not set +CONFIG_HOTPLUG=y +CONFIG_PRINTK=y +CONFIG_BUG=y +CONFIG_ELF_CORE=y +CONFIG_COMPAT_BRK=y +CONFIG_BASE_FULL=y +CONFIG_FUTEX=y +CONFIG_ANON_INODES=y +CONFIG_EPOLL=y +CONFIG_SIGNALFD=y +CONFIG_TIMERFD=y +CONFIG_EVENTFD=y +CONFIG_SHMEM=y +CONFIG_VM_EVENT_COUNTERS=y +CONFIG_SLAB=y +# CONFIG_SLUB is not set +# CONFIG_SLOB is not set +# CONFIG_PROFILING is not set +# CONFIG_MARKERS is not set +CONFIG_HAVE_OPROFILE=y +# CONFIG_KPROBES is not set +CONFIG_HAVE_KPROBES=y +CONFIG_HAVE_KRETPROBES=y +CONFIG_PROC_PAGE_MONITOR=y +CONFIG_SLABINFO=y +CONFIG_RT_MUTEXES=y +# CONFIG_TINY_SHMEM is not set +CONFIG_BASE_SMALL=0 +CONFIG_MODULES=y +CONFIG_MODULE_UNLOAD=y +# CONFIG_MODULE_FORCE_UNLOAD is not set +# CONFIG_MODVERSIONS is not set +# CONFIG_MODULE_SRCVERSION_ALL is not set +CONFIG_KMOD=y +CONFIG_BLOCK=y +# CONFIG_LBD is not set +# CONFIG_BLK_DEV_IO_TRACE is not set +# CONFIG_LSF is not set +# CONFIG_BLK_DEV_BSG is not set + +# +# IO Schedulers +# +CONFIG_IOSCHED_NOOP=y +CONFIG_IOSCHED_AS=y +# CONFIG_IOSCHED_DEADLINE is not set +# CONFIG_IOSCHED_CFQ is not set +CONFIG_DEFAULT_AS=y +# CONFIG_DEFAULT_DEADLINE is not set +# CONFIG_DEFAULT_CFQ is not set +# CONFIG_DEFAULT_NOOP is not set +CONFIG_DEFAULT_IOSCHED="anticipatory" +CONFIG_CLASSIC_RCU=y + +# +# System Type +# +# CONFIG_ARCH_AAEC2000 is not set +# CONFIG_ARCH_INTEGRATOR is not set +# CONFIG_ARCH_REALVIEW is not set +# CONFIG_ARCH_VERSATILE is not set +CONFIG_ARCH_AT91=y +# CONFIG_ARCH_CLPS7500 is not set +# CONFIG_ARCH_CLPS711X is not set +# CONFIG_ARCH_CO285 is not set +# CONFIG_ARCH_EBSA110 is not set +# CONFIG_ARCH_EP93XX is not set +# CONFIG_ARCH_FOOTBRIDGE is not set +# CONFIG_ARCH_NETX is not set +# CONFIG_ARCH_H720X is not set +# CONFIG_ARCH_IMX is not set +# CONFIG_ARCH_IOP13XX is not set +# CONFIG_ARCH_IOP32X is not set +# CONFIG_ARCH_IOP33X is not set +# CONFIG_ARCH_IXP23XX is not set +# CONFIG_ARCH_IXP2000 is not set +# CONFIG_ARCH_IXP4XX is not set +# CONFIG_ARCH_L7200 is not set +# CONFIG_ARCH_KS8695 is not set +# CONFIG_ARCH_NS9XXX is not set +# CONFIG_ARCH_MXC is not set +# CONFIG_ARCH_ORION is not set +# CONFIG_ARCH_PNX4008 is not set +# CONFIG_ARCH_PXA is not set +# CONFIG_ARCH_RPC is not set +# CONFIG_ARCH_SA1100 is not set +# CONFIG_ARCH_S3C2410 is not set +# CONFIG_ARCH_SHARK is not set +# CONFIG_ARCH_LH7A40X is not set +# CONFIG_ARCH_DAVINCI is not set +# CONFIG_ARCH_OMAP is not set +# CONFIG_ARCH_MSM7X00A is not set + +# +# Boot options +# + +# +# Power management +# + +# +# Atmel AT91 System-on-Chip +# +# CONFIG_ARCH_AT91RM9200 is not set +# CONFIG_ARCH_AT91SAM9260 is not set +# CONFIG_ARCH_AT91SAM9261 is not set +CONFIG_ARCH_AT91SAM9263=y +# CONFIG_ARCH_AT91SAM9RL is not set +# CONFIG_ARCH_AT91CAP9 is not set +# CONFIG_ARCH_AT91X40 is not set +CONFIG_AT91_PMC_UNIT=y + +# +# AT91SAM9263 Board Type +# +# CONFIG_MACH_AT91SAM9263EK is not set +# CONFIG_MACH_USB_A9263 is not set +CONFIG_MACH_PM9263=y +CONFIG_PM9263_LCD_TX09D70=y +# CONFIG_PM9263_LCD_TCG057VGLAC is not set + +# +# AT91 Board Options +# +# CONFIG_MTD_NAND_AT91_BUSWIDTH_16 is not set + +# +# AT91 Feature Selections +# +# CONFIG_AT91_PROGRAMMABLE_CLOCKS is not set +CONFIG_AT91_TIMER_HZ=100 +CONFIG_AT91_EARLY_DBGU=y +# CONFIG_AT91_EARLY_USART0 is not set +# CONFIG_AT91_EARLY_USART1 is not set +# CONFIG_AT91_EARLY_USART2 is not set +# CONFIG_AT91_EARLY_USART3 is not set +# CONFIG_AT91_EARLY_USART4 is not set +# CONFIG_AT91_EARLY_USART5 is not set + +# +# Processor Type +# +CONFIG_CPU_32=y +CONFIG_CPU_ARM926T=y +CONFIG_CPU_32v5=y +CONFIG_CPU_ABRT_EV5TJ=y +CONFIG_CPU_CACHE_VIVT=y +CONFIG_CPU_COPY_V4WB=y +CONFIG_CPU_TLB_V4WBI=y +CONFIG_CPU_CP15=y +CONFIG_CPU_CP15_MMU=y + +# +# Processor Features +# +CONFIG_ARM_THUMB=y +# CONFIG_CPU_ICACHE_DISABLE is not set +# CONFIG_CPU_DCACHE_DISABLE is not set +# CONFIG_CPU_DCACHE_WRITETHROUGH is not set +# CONFIG_CPU_CACHE_ROUND_ROBIN is not set +# CONFIG_OUTER_CACHE is not set + +# +# Bus support +# +# CONFIG_PCI_SYSCALL is not set +# CONFIG_ARCH_SUPPORTS_MSI is not set +CONFIG_PCCARD=y +# CONFIG_PCMCIA_DEBUG is not set +CONFIG_PCMCIA=y +CONFIG_PCMCIA_LOAD_CIS=y +CONFIG_PCMCIA_IOCTL=y + +# +# PC-card bridges +# +CONFIG_AT91_CF=y + +# +# Kernel Features +# +# CONFIG_TICK_ONESHOT is not set +# CONFIG_NO_HZ is not set +# CONFIG_HIGH_RES_TIMERS is not set +CONFIG_GENERIC_CLOCKEVENTS_BUILD=y +# CONFIG_PREEMPT is not set +CONFIG_HZ=100 +CONFIG_AEABI=y +# CONFIG_OABI_COMPAT is not set +# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set +CONFIG_SELECT_MEMORY_MODEL=y +CONFIG_FLATMEM_MANUAL=y +# CONFIG_DISCONTIGMEM_MANUAL is not set +# CONFIG_SPARSEMEM_MANUAL is not set +CONFIG_FLATMEM=y +CONFIG_FLAT_NODE_MEM_MAP=y +# CONFIG_SPARSEMEM_STATIC is not set +# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set +CONFIG_SPLIT_PTLOCK_CPUS=4096 +# CONFIG_RESOURCES_64BIT is not set +CONFIG_ZONE_DMA_FLAG=1 +CONFIG_BOUNCE=y +CONFIG_VIRT_TO_BUS=y +# CONFIG_LEDS is not set +CONFIG_ALIGNMENT_TRAP=y + +# +# Boot options +# +CONFIG_ZBOOT_ROM_TEXT=0x0 +CONFIG_ZBOOT_ROM_BSS=0x0 +CONFIG_CMDLINE=" debug " +# CONFIG_XIP_KERNEL is not set +# CONFIG_KEXEC is not set + +# +# Floating point emulation +# + +# +# At least one emulation must be selected +# +# CONFIG_VFP is not set + +# +# Userspace binary formats +# +CONFIG_BINFMT_ELF=y +# CONFIG_BINFMT_AOUT is not set +# CONFIG_BINFMT_MISC is not set + +# +# Power management options +# +# CONFIG_PM is not set +CONFIG_ARCH_SUSPEND_POSSIBLE=y + +# +# Networking +# +CONFIG_NET=y + +# +# Networking options +# +CONFIG_PACKET=y +# CONFIG_PACKET_MMAP is not set +CONFIG_UNIX=y +# CONFIG_NET_KEY is not set +CONFIG_INET=y +# CONFIG_IP_MULTICAST is not set +# CONFIG_IP_ADVANCED_ROUTER is not set +CONFIG_IP_FIB_HASH=y +CONFIG_IP_PNP=y +# CONFIG_IP_PNP_DHCP is not set +CONFIG_IP_PNP_BOOTP=y +CONFIG_IP_PNP_RARP=y +# CONFIG_NET_IPIP is not set +# CONFIG_NET_IPGRE is not set +# CONFIG_ARPD is not set +# CONFIG_SYN_COOKIES is not set +# CONFIG_INET_AH is not set +# CONFIG_INET_ESP is not set +# CONFIG_INET_IPCOMP is not set +# CONFIG_INET_XFRM_TUNNEL is not set +# CONFIG_INET_TUNNEL is not set +# CONFIG_INET_XFRM_MODE_TRANSPORT is not set +# CONFIG_INET_XFRM_MODE_TUNNEL is not set +# CONFIG_INET_XFRM_MODE_BEET is not set +# CONFIG_INET_LRO is not set +# CONFIG_INET_DIAG is not set +# CONFIG_TCP_CONG_ADVANCED is not set +CONFIG_TCP_CONG_CUBIC=y +CONFIG_DEFAULT_TCP_CONG="cubic" +# CONFIG_TCP_MD5SIG is not set +# CONFIG_IPV6 is not set +# CONFIG_INET6_XFRM_TUNNEL is not set +# CONFIG_INET6_TUNNEL is not set +# CONFIG_NETWORK_SECMARK is not set +# CONFIG_NETFILTER is not set +# CONFIG_IP_DCCP is not set +# CONFIG_IP_SCTP is not set +# CONFIG_TIPC is not set +# CONFIG_ATM is not set +# CONFIG_BRIDGE is not set +# CONFIG_VLAN_8021Q is not set +# CONFIG_DECNET is not set +# CONFIG_LLC2 is not set +# CONFIG_IPX is not set +# CONFIG_ATALK is not set +# CONFIG_X25 is not set +# CONFIG_LAPB is not set +# CONFIG_ECONET is not set +# CONFIG_WAN_ROUTER is not set +# CONFIG_NET_SCHED is not set + +# +# Network testing +# +# CONFIG_NET_PKTGEN is not set +# CONFIG_HAMRADIO is not set +# CONFIG_CAN is not set +# CONFIG_IRDA is not set +# CONFIG_BT is not set +# CONFIG_AF_RXRPC is not set + +# +# Wireless +# +# CONFIG_CFG80211 is not set +# CONFIG_WIRELESS_EXT is not set +# CONFIG_MAC80211 is not set +# CONFIG_IEEE80211 is not set +# CONFIG_RFKILL is not set +# CONFIG_NET_9P is not set + +# +# Device Drivers +# + +# +# Generic Driver Options +# +CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" +CONFIG_STANDALONE=y +CONFIG_PREVENT_FIRMWARE_BUILD=y +CONFIG_FW_LOADER=y +# CONFIG_DEBUG_DRIVER is not set +# CONFIG_DEBUG_DEVRES is not set +# CONFIG_SYS_HYPERVISOR is not set +# CONFIG_CONNECTOR is not set +CONFIG_MTD=y +# CONFIG_MTD_DEBUG is not set +# CONFIG_MTD_CONCAT is not set +CONFIG_MTD_PARTITIONS=y +# CONFIG_MTD_REDBOOT_PARTS is not set +CONFIG_MTD_CMDLINE_PARTS=y +# CONFIG_MTD_AFS_PARTS is not set + +# +# User Modules And Translation Layers +# +CONFIG_MTD_CHAR=y +CONFIG_MTD_BLKDEVS=y +CONFIG_MTD_BLOCK=y +# CONFIG_FTL is not set +# CONFIG_NFTL is not set +# CONFIG_INFTL is not set +# CONFIG_RFD_FTL is not set +# CONFIG_SSFDC is not set +# CONFIG_MTD_OOPS is not set + +# +# RAM/ROM/Flash chip drivers +# +CONFIG_MTD_CFI=y +CONFIG_MTD_JEDECPROBE=y +CONFIG_MTD_GEN_PROBE=y +# CONFIG_MTD_CFI_ADV_OPTIONS is not set +CONFIG_MTD_MAP_BANK_WIDTH_1=y +CONFIG_MTD_MAP_BANK_WIDTH_2=y +CONFIG_MTD_MAP_BANK_WIDTH_4=y +# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set +CONFIG_MTD_CFI_I1=y +CONFIG_MTD_CFI_I2=y +# CONFIG_MTD_CFI_I4 is not set +# CONFIG_MTD_CFI_I8 is not set +CONFIG_MTD_CFI_INTELEXT=y +CONFIG_MTD_CFI_AMDSTD=y +CONFIG_MTD_CFI_STAA=y +CONFIG_MTD_CFI_UTIL=y +CONFIG_MTD_RAM=y +CONFIG_MTD_ROM=y +CONFIG_MTD_ABSENT=y + +# +# Mapping drivers for chip access +# +CONFIG_MTD_COMPLEX_MAPPINGS=y +CONFIG_MTD_PHYSMAP=y +CONFIG_MTD_PHYSMAP_START=0x10000000 +CONFIG_MTD_PHYSMAP_LEN=0x400000 +CONFIG_MTD_PHYSMAP_BANKWIDTH=2 +# CONFIG_MTD_ARM_INTEGRATOR is not set +# CONFIG_MTD_IMPA7 is not set +# CONFIG_MTD_PLATRAM is not set + +# +# Self-contained MTD device drivers +# +CONFIG_MTD_DATAFLASH=y +# CONFIG_MTD_M25P80 is not set +# CONFIG_MTD_SLRAM is not set +# CONFIG_MTD_PHRAM is not set +# CONFIG_MTD_MTDRAM is not set +# CONFIG_MTD_BLOCK2MTD is not set + +# +# Disk-On-Chip Device Drivers +# +# CONFIG_MTD_DOC2000 is not set +# CONFIG_MTD_DOC2001 is not set +# CONFIG_MTD_DOC2001PLUS is not set +CONFIG_MTD_NAND=y +CONFIG_MTD_NAND_VERIFY_WRITE=y +# CONFIG_MTD_NAND_ECC_SMC is not set +# CONFIG_MTD_NAND_MUSEUM_IDS is not set +CONFIG_MTD_NAND_IDS=y +# CONFIG_MTD_NAND_DISKONCHIP is not set +CONFIG_MTD_NAND_AT91=y +CONFIG_MTD_NAND_AT91_ECC_SOFT=y +# CONFIG_MTD_NAND_AT91_ECC_HW is not set +# CONFIG_MTD_NAND_AT91_ECC_NONE is not set +# CONFIG_MTD_NAND_NANDSIM is not set +# CONFIG_MTD_NAND_PLATFORM is not set +# CONFIG_MTD_ALAUDA is not set +# CONFIG_MTD_ONENAND is not set + +# +# UBI - Unsorted block images +# +# CONFIG_MTD_UBI is not set +# CONFIG_PARPORT is not set +CONFIG_BLK_DEV=y +# CONFIG_BLK_DEV_COW_COMMON is not set +CONFIG_BLK_DEV_LOOP=y +# CONFIG_BLK_DEV_CRYPTOLOOP is not set +# CONFIG_BLK_DEV_NBD is not set +# CONFIG_BLK_DEV_UB is not set +CONFIG_BLK_DEV_RAM=y +CONFIG_BLK_DEV_RAM_COUNT=16 +CONFIG_BLK_DEV_RAM_SIZE=8192 +# CONFIG_BLK_DEV_XIP is not set +# CONFIG_CDROM_PKTCDVD is not set +# CONFIG_ATA_OVER_ETH is not set +CONFIG_MISC_DEVICES=y +# CONFIG_ATMEL_PWM is not set +# CONFIG_EEPROM_93CX6 is not set +CONFIG_ATMEL_SSC=y +# CONFIG_ENCLOSURE_SERVICES is not set +CONFIG_HAVE_IDE=y +CONFIG_IDE=y +CONFIG_BLK_DEV_IDE=y + +# +# Please see Documentation/ide/ide.txt for help/info on IDE drives +# +# CONFIG_BLK_DEV_IDE_SATA is not set +CONFIG_BLK_DEV_IDEDISK=y +CONFIG_IDEDISK_MULTI_MODE=y +CONFIG_BLK_DEV_IDECS=y +# CONFIG_BLK_DEV_IDECD is not set +# CONFIG_BLK_DEV_IDETAPE is not set +# CONFIG_BLK_DEV_IDEFLOPPY is not set +# CONFIG_BLK_DEV_IDESCSI is not set +# CONFIG_IDE_TASK_IOCTL is not set +CONFIG_IDE_PROC_FS=y + +# +# IDE chipset support/bugfixes +# +# CONFIG_IDE_GENERIC is not set +# CONFIG_BLK_DEV_PLATFORM is not set +# CONFIG_BLK_DEV_IDEDMA is not set +CONFIG_IDE_ARCH_OBSOLETE_INIT=y +# CONFIG_BLK_DEV_HD is not set + +# +# SCSI device support +# +# CONFIG_RAID_ATTRS is not set +CONFIG_SCSI=m +CONFIG_SCSI_DMA=y +# CONFIG_SCSI_TGT is not set +# CONFIG_SCSI_NETLINK is not set +CONFIG_SCSI_PROC_FS=y + +# +# SCSI support type (disk, tape, CD-ROM) +# +CONFIG_BLK_DEV_SD=m +# CONFIG_CHR_DEV_ST is not set +# CONFIG_CHR_DEV_OSST is not set +# CONFIG_BLK_DEV_SR is not set +# CONFIG_CHR_DEV_SG is not set +# CONFIG_CHR_DEV_SCH is not set + +# +# Some SCSI devices (e.g. CD jukebox) support multiple LUNs +# +CONFIG_SCSI_MULTI_LUN=y +# CONFIG_SCSI_CONSTANTS is not set +# CONFIG_SCSI_LOGGING is not set +# CONFIG_SCSI_SCAN_ASYNC is not set +CONFIG_SCSI_WAIT_SCAN=m + +# +# SCSI Transports +# +# CONFIG_SCSI_SPI_ATTRS is not set +# CONFIG_SCSI_FC_ATTRS is not set +# CONFIG_SCSI_ISCSI_ATTRS is not set +# CONFIG_SCSI_SAS_LIBSAS is not set +# CONFIG_SCSI_SRP_ATTRS is not set +# CONFIG_SCSI_LOWLEVEL is not set +# CONFIG_SCSI_LOWLEVEL_PCMCIA is not set +# CONFIG_ATA is not set +# CONFIG_MD is not set +CONFIG_NETDEVICES=y +# CONFIG_NETDEVICES_MULTIQUEUE is not set +# CONFIG_DUMMY is not set +# CONFIG_BONDING is not set +# CONFIG_MACVLAN is not set +# CONFIG_EQUALIZER is not set +# CONFIG_TUN is not set +# CONFIG_VETH is not set +CONFIG_PHYLIB=y + +# +# MII PHY device drivers +# +# CONFIG_MARVELL_PHY is not set +# CONFIG_DAVICOM_PHY is not set +# CONFIG_QSEMI_PHY is not set +# CONFIG_LXT_PHY is not set +# CONFIG_CICADA_PHY is not set +# CONFIG_VITESSE_PHY is not set +# CONFIG_SMSC_PHY is not set +# CONFIG_BROADCOM_PHY is not set +# CONFIG_ICPLUS_PHY is not set +# CONFIG_REALTEK_PHY is not set +# CONFIG_FIXED_PHY is not set +# CONFIG_MDIO_BITBANG is not set +CONFIG_NET_ETHERNET=y +CONFIG_MII=y +CONFIG_MACB=y +# CONFIG_AX88796 is not set +# CONFIG_SMC91X is not set +# CONFIG_DM9000 is not set +# CONFIG_ENC28J60 is not set +# CONFIG_IBM_NEW_EMAC_ZMII is not set +# CONFIG_IBM_NEW_EMAC_RGMII is not set +# CONFIG_IBM_NEW_EMAC_TAH is not set +# CONFIG_IBM_NEW_EMAC_EMAC4 is not set +# CONFIG_B44 is not set +# CONFIG_NETDEV_1000 is not set +# CONFIG_NETDEV_10000 is not set + +# +# Wireless LAN +# +# CONFIG_WLAN_PRE80211 is not set +# CONFIG_WLAN_80211 is not set + +# +# USB Network Adapters +# +# CONFIG_USB_CATC is not set +# CONFIG_USB_KAWETH is not set +# CONFIG_USB_PEGASUS is not set +# CONFIG_USB_RTL8150 is not set +# CONFIG_USB_USBNET is not set +# CONFIG_NET_PCMCIA is not set +# CONFIG_WAN is not set +# CONFIG_PPP is not set +# CONFIG_SLIP is not set +# CONFIG_NETCONSOLE is not set +# CONFIG_NETPOLL is not set +# CONFIG_NET_POLL_CONTROLLER is not set +# CONFIG_ISDN is not set + +# +# Input device support +# +CONFIG_INPUT=y +# CONFIG_INPUT_FF_MEMLESS is not set +# CONFIG_INPUT_POLLDEV is not set + +# +# Userland interfaces +# +CONFIG_INPUT_MOUSEDEV=y +# CONFIG_INPUT_MOUSEDEV_PSAUX is not set +CONFIG_INPUT_MOUSEDEV_SCREEN_X=320 +CONFIG_INPUT_MOUSEDEV_SCREEN_Y=240 +# CONFIG_INPUT_JOYDEV is not set +CONFIG_INPUT_EVDEV=y +# CONFIG_INPUT_EVBUG is not set + +# +# Input Device Drivers +# +CONFIG_INPUT_KEYBOARD=y +# CONFIG_KEYBOARD_ATKBD is not set +# CONFIG_KEYBOARD_SUNKBD is not set +# CONFIG_KEYBOARD_LKKBD is not set +# CONFIG_KEYBOARD_XTKBD is not set +# CONFIG_KEYBOARD_NEWTON is not set +# CONFIG_KEYBOARD_STOWAWAY is not set +CONFIG_KEYBOARD_GPIO=y +# CONFIG_INPUT_MOUSE is not set +# CONFIG_INPUT_JOYSTICK is not set +# CONFIG_INPUT_TABLET is not set +CONFIG_INPUT_TOUCHSCREEN=y +CONFIG_TOUCHSCREEN_ADS7846=y +# CONFIG_TOUCHSCREEN_FUJITSU is not set +# CONFIG_TOUCHSCREEN_GUNZE is not set +# CONFIG_TOUCHSCREEN_ELO is not set +# CONFIG_TOUCHSCREEN_MTOUCH is not set +# CONFIG_TOUCHSCREEN_MK712 is not set +# CONFIG_TOUCHSCREEN_PENMOUNT is not set +# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set +# CONFIG_TOUCHSCREEN_TOUCHWIN is not set +# CONFIG_TOUCHSCREEN_UCB1400 is not set +# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set +# CONFIG_INPUT_MISC is not set + +# +# Hardware I/O ports +# +# CONFIG_SERIO is not set +# CONFIG_GAMEPORT is not set + +# +# Character devices +# +CONFIG_VT=y +CONFIG_VT_CONSOLE=y +CONFIG_HW_CONSOLE=y +# CONFIG_VT_HW_CONSOLE_BINDING is not set +# CONFIG_SERIAL_NONSTANDARD is not set + +# +# Serial drivers +# +# CONFIG_SERIAL_8250 is not set + +# +# Non-8250 serial port support +# +CONFIG_SERIAL_ATMEL=y +CONFIG_SERIAL_ATMEL_CONSOLE=y +CONFIG_SERIAL_ATMEL_PDC=y +# CONFIG_SERIAL_ATMEL_TTYAT is not set +CONFIG_SERIAL_CORE=y +CONFIG_SERIAL_CORE_CONSOLE=y +CONFIG_UNIX98_PTYS=y +# CONFIG_LEGACY_PTYS is not set +# CONFIG_IPMI_HANDLER is not set +CONFIG_HW_RANDOM=y +# CONFIG_NVRAM is not set +# CONFIG_R3964 is not set + +# +# PCMCIA character devices +# +# CONFIG_SYNCLINK_CS is not set +# CONFIG_CARDMAN_4000 is not set +# CONFIG_CARDMAN_4040 is not set +# CONFIG_IPWIRELESS is not set +# CONFIG_RAW_DRIVER is not set +# CONFIG_TCG_TPM is not set +# CONFIG_I2C is not set + +# +# SPI support +# +CONFIG_SPI=y +# CONFIG_SPI_DEBUG is not set +CONFIG_SPI_MASTER=y + +# +# SPI Master Controller Drivers +# +CONFIG_SPI_ATMEL=y +# CONFIG_SPI_BITBANG is not set + +# +# SPI Protocol Masters +# +# CONFIG_SPI_AT25 is not set +# CONFIG_SPI_SPIDEV is not set +# CONFIG_SPI_TLE62X0 is not set +# CONFIG_SPI_TSC2301 is not set +CONFIG_W1=y + +# +# 1-wire Bus Masters +# +# CONFIG_W1_MASTER_DS2490 is not set +# CONFIG_W1_MASTER_DS1WM is not set +CONFIG_W1_MASTER_GPIO=y + +# +# 1-wire Slaves +# +# CONFIG_W1_SLAVE_THERM is not set +CONFIG_W1_SLAVE_SMEM=y +# CONFIG_W1_SLAVE_DS2433 is not set +# CONFIG_W1_SLAVE_DS2760 is not set +# CONFIG_POWER_SUPPLY is not set +# CONFIG_HWMON is not set +CONFIG_WATCHDOG=y +CONFIG_WATCHDOG_NOWAYOUT=y + +# +# Watchdog Device Drivers +# +# CONFIG_SOFT_WATCHDOG is not set +CONFIG_AT91SAM9_WATCHDOG=y + +# +# USB-based Watchdog Cards +# +# CONFIG_USBPCWATCHDOG is not set + +# +# Sonics Silicon Backplane +# +CONFIG_SSB_POSSIBLE=y +# CONFIG_SSB is not set + +# +# Multifunction device drivers +# +# CONFIG_MFD_SM501 is not set +# CONFIG_MFD_ASIC3 is not set + +# +# Multimedia devices +# +# CONFIG_VIDEO_DEV is not set +# CONFIG_DVB_CORE is not set +# CONFIG_DAB is not set + +# +# Graphics support +# +# CONFIG_VGASTATE is not set +# CONFIG_VIDEO_OUTPUT_CONTROL is not set +CONFIG_FB=y +# CONFIG_FIRMWARE_EDID is not set +# CONFIG_FB_DDC is not set +CONFIG_FB_CFB_FILLRECT=y +CONFIG_FB_CFB_COPYAREA=y +CONFIG_FB_CFB_IMAGEBLIT=y +# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set +# CONFIG_FB_SYS_FILLRECT is not set +# CONFIG_FB_SYS_COPYAREA is not set +# CONFIG_FB_SYS_IMAGEBLIT is not set +# CONFIG_FB_SYS_FOPS is not set +CONFIG_FB_DEFERRED_IO=y +# CONFIG_FB_SVGALIB is not set +# CONFIG_FB_MACMODES is not set +# CONFIG_FB_BACKLIGHT is not set +# CONFIG_FB_MODE_HELPERS is not set +# CONFIG_FB_TILEBLITTING is not set + +# +# Frame buffer hardware drivers +# +# CONFIG_FB_S1D15605 is not set +# CONFIG_FB_S1D13XXX is not set +CONFIG_FB_ATMEL=y +# CONFIG_FB_VIRTUAL is not set +# CONFIG_BACKLIGHT_LCD_SUPPORT is not set + +# +# Display device support +# +# CONFIG_DISPLAY_SUPPORT is not set + +# +# Console display driver support +# +# CONFIG_VGA_CONSOLE is not set +CONFIG_DUMMY_CONSOLE=y +CONFIG_FRAMEBUFFER_CONSOLE=y +# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set +CONFIG_FRAMEBUFFER_CONSOLE_ROTATION=y +# CONFIG_FONTS is not set +CONFIG_FONT_8x8=y +CONFIG_FONT_8x16=y +CONFIG_LOGO=y +CONFIG_LOGO_LINUX_MONO=y +CONFIG_LOGO_LINUX_VGA16=y +CONFIG_LOGO_LINUX_CLUT224=y + +# +# Sound +# +CONFIG_SOUND=y + +# +# Advanced Linux Sound Architecture +# +CONFIG_SND=y +CONFIG_SND_TIMER=y +CONFIG_SND_PCM=y +# CONFIG_SND_SEQUENCER is not set +CONFIG_SND_OSSEMUL=y +CONFIG_SND_MIXER_OSS=y +CONFIG_SND_PCM_OSS=y +CONFIG_SND_PCM_OSS_PLUGINS=y +# CONFIG_SND_DYNAMIC_MINORS is not set +CONFIG_SND_SUPPORT_OLD_API=y +CONFIG_SND_VERBOSE_PROCFS=y +CONFIG_SND_VERBOSE_PRINTK=y +# CONFIG_SND_DEBUG is not set + +# +# Generic devices +# +CONFIG_SND_AC97_CODEC=y +# CONFIG_SND_DUMMY is not set +# CONFIG_SND_MTPAV is not set +# CONFIG_SND_SERIAL_U16550 is not set +# CONFIG_SND_MPU401 is not set + +# +# ALSA ARM devices +# +CONFIG_SND_AT91_AC97=y + +# +# SPI devices +# +# CONFIG_SND_AT73C213 is not set + +# +# USB devices +# +# CONFIG_SND_USB_AUDIO is not set +# CONFIG_SND_USB_CAIAQ is not set + +# +# PCMCIA devices +# +# CONFIG_SND_VXPOCKET is not set +# CONFIG_SND_PDAUDIOCF is not set + +# +# System on Chip audio support +# +# CONFIG_SND_SOC is not set + +# +# SoC Audio support for SuperH +# + +# +# ALSA SoC audio for Freescale SOCs +# + +# +# Open Sound System +# +# CONFIG_SOUND_PRIME is not set +CONFIG_AC97_BUS=y +CONFIG_HID_SUPPORT=y +CONFIG_HID=y +CONFIG_HID_DEBUG=y +# CONFIG_HIDRAW is not set + +# +# USB Input Devices +# +CONFIG_USB_HID=y +# CONFIG_USB_HIDINPUT_POWERBOOK is not set +# CONFIG_HID_FF is not set +# CONFIG_USB_HIDDEV is not set +CONFIG_USB_SUPPORT=y +CONFIG_USB_ARCH_HAS_HCD=y +CONFIG_USB_ARCH_HAS_OHCI=y +# CONFIG_USB_ARCH_HAS_EHCI is not set +CONFIG_USB=y +# CONFIG_USB_DEBUG is not set +# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set + +# +# Miscellaneous USB options +# +CONFIG_USB_DEVICEFS=y +CONFIG_USB_DEVICE_CLASS=y +# CONFIG_USB_DYNAMIC_MINORS is not set +# CONFIG_USB_OTG is not set + +# +# USB Host Controller Drivers +# +# CONFIG_USB_ISP116X_HCD is not set +CONFIG_USB_OHCI_HCD=y +# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set +# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set +CONFIG_USB_OHCI_LITTLE_ENDIAN=y +# CONFIG_USB_SL811_HCD is not set +# CONFIG_USB_R8A66597_HCD is not set + +# +# USB Device Class drivers +# +# CONFIG_USB_ACM is not set +# CONFIG_USB_PRINTER is not set + +# +# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' +# + +# +# may also be needed; see USB_STORAGE Help for more information +# +CONFIG_USB_STORAGE=m +# CONFIG_USB_STORAGE_DEBUG is not set +CONFIG_USB_STORAGE_DATAFAB=y +CONFIG_USB_STORAGE_FREECOM=y +CONFIG_USB_STORAGE_ISD200=y +CONFIG_USB_STORAGE_DPCM=y +CONFIG_USB_STORAGE_USBAT=y +CONFIG_USB_STORAGE_SDDR09=y +CONFIG_USB_STORAGE_SDDR55=y +CONFIG_USB_STORAGE_JUMPSHOT=y +CONFIG_USB_STORAGE_ALAUDA=y +# CONFIG_USB_STORAGE_ONETOUCH is not set +# CONFIG_USB_STORAGE_KARMA is not set +# CONFIG_USB_LIBUSUAL is not set + +# +# USB Imaging devices +# +# CONFIG_USB_MDC800 is not set +# CONFIG_USB_MICROTEK is not set +CONFIG_USB_MON=y + +# +# USB port drivers +# +# CONFIG_USB_SERIAL is not set + +# +# USB Miscellaneous drivers +# +# CONFIG_USB_EMI62 is not set +# CONFIG_USB_EMI26 is not set +# CONFIG_USB_ADUTUX is not set +# CONFIG_USB_AUERSWALD is not set +# CONFIG_USB_RIO500 is not set +# CONFIG_USB_LEGOTOWER is not set +# CONFIG_USB_LCD is not set +# CONFIG_USB_BERRY_CHARGE is not set +# CONFIG_USB_LED is not set +# CONFIG_USB_CYPRESS_CY7C63 is not set +# CONFIG_USB_CYTHERM is not set +# CONFIG_USB_PHIDGET is not set +# CONFIG_USB_IDMOUSE is not set +# CONFIG_USB_FTDI_ELAN is not set +# CONFIG_USB_APPLEDISPLAY is not set +# CONFIG_USB_LD is not set +# CONFIG_USB_TRANCEVIBRATOR is not set +# CONFIG_USB_IOWARRIOR is not set +# CONFIG_USB_TEST is not set +CONFIG_USB_GADGET=m +# CONFIG_USB_GADGET_DEBUG is not set +# CONFIG_USB_GADGET_DEBUG_FILES is not set +CONFIG_USB_GADGET_SELECTED=y +# CONFIG_USB_GADGET_AMD5536UDC is not set +# CONFIG_USB_GADGET_ATMEL_USBA is not set +# CONFIG_USB_GADGET_FSL_USB2 is not set +# CONFIG_USB_GADGET_NET2280 is not set +# CONFIG_USB_GADGET_PXA2XX is not set +# CONFIG_USB_GADGET_M66592 is not set +# CONFIG_USB_GADGET_GOKU is not set +# CONFIG_USB_GADGET_LH7A40X is not set +# CONFIG_USB_GADGET_OMAP is not set +# CONFIG_USB_GADGET_S3C2410 is not set +CONFIG_USB_GADGET_AT91=y +CONFIG_USB_AT91=m +# CONFIG_USB_GADGET_DUMMY_HCD is not set +# CONFIG_USB_GADGET_DUALSPEED is not set +CONFIG_USB_ZERO=m +# CONFIG_USB_ETH is not set +CONFIG_USB_GADGETFS=m +CONFIG_USB_FILE_STORAGE=m +# CONFIG_USB_FILE_STORAGE_TEST is not set +CONFIG_USB_G_SERIAL=m +# CONFIG_USB_MIDI_GADGET is not set +# CONFIG_USB_G_PRINTER is not set +CONFIG_MMC=y +# CONFIG_MMC_DEBUG is not set +# CONFIG_MMC_UNSAFE_RESUME is not set + +# +# MMC/SD Card Drivers +# +CONFIG_MMC_BLOCK=y +CONFIG_MMC_BLOCK_BOUNCE=y +# CONFIG_SDIO_UART is not set + +# +# MMC/SD Host Controller Drivers +# +CONFIG_MMC_AT91=y +# CONFIG_MMC_SPI is not set +CONFIG_NEW_LEDS=y +CONFIG_LEDS_CLASS=y + +# +# LED drivers +# +CONFIG_LEDS_GPIO=y + +# +# LED Triggers +# +CONFIG_LEDS_TRIGGERS=y +CONFIG_LEDS_TRIGGER_TIMER=y +CONFIG_LEDS_TRIGGER_IDE_DISK=y +CONFIG_LEDS_TRIGGER_HEARTBEAT=y +CONFIG_RTC_LIB=y +CONFIG_RTC_CLASS=y +CONFIG_RTC_HCTOSYS=y +CONFIG_RTC_HCTOSYS_DEVICE="rtc0" +# CONFIG_RTC_DEBUG is not set + +# +# RTC interfaces +# +CONFIG_RTC_INTF_SYSFS=y +CONFIG_RTC_INTF_PROC=y +CONFIG_RTC_INTF_DEV=y +CONFIG_RTC_INTF_DEV_UIE_EMUL=y +# CONFIG_RTC_DRV_TEST is not set + +# +# SPI RTC drivers +# +# CONFIG_RTC_DRV_MAX6902 is not set +# CONFIG_RTC_DRV_R9701 is not set +# CONFIG_RTC_DRV_RS5C348 is not set + +# +# Platform RTC drivers +# +# CONFIG_RTC_DRV_CMOS is not set +# CONFIG_RTC_DRV_DS1511 is not set +# CONFIG_RTC_DRV_DS1553 is not set +# CONFIG_RTC_DRV_DS1742 is not set +# CONFIG_RTC_DRV_STK17TA8 is not set +# CONFIG_RTC_DRV_M48T86 is not set +# CONFIG_RTC_DRV_M48T59 is not set +# CONFIG_RTC_DRV_V3020 is not set + +# +# on-CPU RTC drivers +# +CONFIG_RTC_DRV_AT91SAM9=y +CONFIG_RTC_DRV_AT91SAM9_RTT=0 +CONFIG_RTC_DRV_AT91SAM9_GPBR=0 + +# +# File systems +# +CONFIG_EXT2_FS=y +# CONFIG_EXT2_FS_XATTR is not set +# CONFIG_EXT2_FS_XIP is not set +CONFIG_EXT3_FS=y +# CONFIG_EXT3_FS_XATTR is not set +# CONFIG_EXT4DEV_FS is not set +CONFIG_JBD=y +# CONFIG_REISERFS_FS is not set +# CONFIG_JFS_FS is not set +# CONFIG_FS_POSIX_ACL is not set +# CONFIG_XFS_FS is not set +# CONFIG_GFS2_FS is not set +# CONFIG_OCFS2_FS is not set +CONFIG_DNOTIFY=y +CONFIG_INOTIFY=y +CONFIG_INOTIFY_USER=y +# CONFIG_QUOTA is not set +# CONFIG_AUTOFS_FS is not set +# CONFIG_AUTOFS4_FS is not set +# CONFIG_FUSE_FS is not set + +# +# CD-ROM/DVD Filesystems +# +# CONFIG_ISO9660_FS is not set +# CONFIG_UDF_FS is not set + +# +# DOS/FAT/NT Filesystems +# +CONFIG_FAT_FS=m +# CONFIG_MSDOS_FS is not set +CONFIG_VFAT_FS=m +CONFIG_FAT_DEFAULT_CODEPAGE=437 +CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" +# CONFIG_NTFS_FS is not set + +# +# Pseudo filesystems +# +CONFIG_PROC_FS=y +CONFIG_PROC_SYSCTL=y +CONFIG_SYSFS=y +CONFIG_TMPFS=y +# CONFIG_TMPFS_POSIX_ACL is not set +# CONFIG_HUGETLB_PAGE is not set +# CONFIG_CONFIGFS_FS is not set + +# +# Miscellaneous filesystems +# +# CONFIG_ADFS_FS is not set +# CONFIG_AFFS_FS is not set +# CONFIG_HFS_FS is not set +# CONFIG_HFSPLUS_FS is not set +# CONFIG_BEFS_FS is not set +# CONFIG_BFS_FS is not set +# CONFIG_EFS_FS is not set +CONFIG_JFFS2_FS=y +CONFIG_JFFS2_FS_DEBUG=0 +CONFIG_JFFS2_FS_WRITEBUFFER=y +# CONFIG_JFFS2_FS_WBUF_VERIFY is not set +# CONFIG_JFFS2_SUMMARY is not set +# CONFIG_JFFS2_FS_XATTR is not set +# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set +CONFIG_JFFS2_ZLIB=y +# CONFIG_JFFS2_LZO is not set +CONFIG_JFFS2_RTIME=y +# CONFIG_JFFS2_RUBIN is not set +# CONFIG_CRAMFS is not set +# CONFIG_VXFS_FS is not set +# CONFIG_MINIX_FS is not set +# CONFIG_HPFS_FS is not set +# CONFIG_QNX4FS_FS is not set +# CONFIG_ROMFS_FS is not set +# CONFIG_SYSV_FS is not set +# CONFIG_UFS_FS is not set +CONFIG_NETWORK_FILESYSTEMS=y +CONFIG_NFS_FS=y +# CONFIG_NFS_V3 is not set +# CONFIG_NFS_V4 is not set +# CONFIG_NFS_DIRECTIO is not set +# CONFIG_NFSD is not set +CONFIG_ROOT_NFS=y +CONFIG_LOCKD=y +CONFIG_NFS_COMMON=y +CONFIG_SUNRPC=y +CONFIG_SUNRPC_BIND34=y +# CONFIG_RPCSEC_GSS_KRB5 is not set +# CONFIG_RPCSEC_GSS_SPKM3 is not set +# CONFIG_SMB_FS is not set +# CONFIG_CIFS is not set +# CONFIG_NCP_FS is not set +# CONFIG_CODA_FS is not set +# CONFIG_AFS_FS is not set + +# +# Partition Types +# +# CONFIG_PARTITION_ADVANCED is not set +CONFIG_MSDOS_PARTITION=y +CONFIG_NLS=y +CONFIG_NLS_DEFAULT="iso8859-1" +CONFIG_NLS_CODEPAGE_437=m +# CONFIG_NLS_CODEPAGE_737 is not set +# CONFIG_NLS_CODEPAGE_775 is not set +# CONFIG_NLS_CODEPAGE_850 is not set +# CONFIG_NLS_CODEPAGE_852 is not set +# CONFIG_NLS_CODEPAGE_855 is not set +# CONFIG_NLS_CODEPAGE_857 is not set +# CONFIG_NLS_CODEPAGE_860 is not set +# CONFIG_NLS_CODEPAGE_861 is not set +# CONFIG_NLS_CODEPAGE_862 is not set +# CONFIG_NLS_CODEPAGE_863 is not set +# CONFIG_NLS_CODEPAGE_864 is not set +# CONFIG_NLS_CODEPAGE_865 is not set +# CONFIG_NLS_CODEPAGE_866 is not set +# CONFIG_NLS_CODEPAGE_869 is not set +# CONFIG_NLS_CODEPAGE_936 is not set +# CONFIG_NLS_CODEPAGE_950 is not set +# CONFIG_NLS_CODEPAGE_932 is not set +# CONFIG_NLS_CODEPAGE_949 is not set +# CONFIG_NLS_CODEPAGE_874 is not set +# CONFIG_NLS_ISO8859_8 is not set +# CONFIG_NLS_CODEPAGE_1250 is not set +# CONFIG_NLS_CODEPAGE_1251 is not set +# CONFIG_NLS_ASCII is not set +CONFIG_NLS_ISO8859_1=m +# CONFIG_NLS_ISO8859_2 is not set +# CONFIG_NLS_ISO8859_3 is not set +# CONFIG_NLS_ISO8859_4 is not set +# CONFIG_NLS_ISO8859_5 is not set +# CONFIG_NLS_ISO8859_6 is not set +# CONFIG_NLS_ISO8859_7 is not set +# CONFIG_NLS_ISO8859_9 is not set +# CONFIG_NLS_ISO8859_13 is not set +# CONFIG_NLS_ISO8859_14 is not set +# CONFIG_NLS_ISO8859_15 is not set +# CONFIG_NLS_KOI8_R is not set +# CONFIG_NLS_KOI8_U is not set +# CONFIG_NLS_UTF8 is not set +# CONFIG_DLM is not set + +# +# Kernel hacking +# +# CONFIG_PRINTK_TIME is not set +CONFIG_ENABLE_WARN_DEPRECATED=y +CONFIG_ENABLE_MUST_CHECK=y +# CONFIG_MAGIC_SYSRQ is not set +# CONFIG_UNUSED_SYMBOLS is not set +# CONFIG_DEBUG_FS is not set +# CONFIG_HEADERS_CHECK is not set +CONFIG_DEBUG_KERNEL=y +# CONFIG_DEBUG_SHIRQ is not set +CONFIG_DETECT_SOFTLOCKUP=y +CONFIG_SCHED_DEBUG=y +# CONFIG_SCHEDSTATS is not set +CONFIG_TIMER_STATS=y +# CONFIG_DEBUG_SLAB is not set +# CONFIG_DEBUG_RT_MUTEXES is not set +# CONFIG_RT_MUTEX_TESTER is not set +# CONFIG_DEBUG_SPINLOCK is not set +# CONFIG_DEBUG_MUTEXES is not set +# CONFIG_DEBUG_LOCK_ALLOC is not set +# CONFIG_PROVE_LOCKING is not set +# CONFIG_LOCK_STAT is not set +# CONFIG_DEBUG_SPINLOCK_SLEEP is not set +# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set +# CONFIG_DEBUG_KOBJECT is not set +CONFIG_DEBUG_BUGVERBOSE=y +CONFIG_DEBUG_INFO=y +# CONFIG_DEBUG_VM is not set +# CONFIG_DEBUG_LIST is not set +# CONFIG_DEBUG_SG is not set +CONFIG_FRAME_POINTER=y +# CONFIG_BOOT_PRINTK_DELAY is not set +# CONFIG_RCU_TORTURE_TEST is not set +# CONFIG_BACKTRACE_SELF_TEST is not set +# CONFIG_FAULT_INJECTION is not set +# CONFIG_SAMPLES is not set +CONFIG_DEBUG_USER=y +# CONFIG_DEBUG_ERRORS is not set +# CONFIG_DEBUG_STACK_USAGE is not set +CONFIG_DEBUG_LL=y +# CONFIG_DEBUG_ICEDCC is not set + +# +# Security options +# +# CONFIG_KEYS is not set +# CONFIG_SECURITY is not set +# CONFIG_SECURITY_FILE_CAPABILITIES is not set +# CONFIG_CRYPTO is not set + +# +# Library routines +# +CONFIG_BITREVERSE=y +# CONFIG_CRC_CCITT is not set +# CONFIG_CRC16 is not set +# CONFIG_CRC_ITU_T is not set +CONFIG_CRC32=y +# CONFIG_CRC7 is not set +# CONFIG_LIBCRC32C is not set +CONFIG_ZLIB_INFLATE=y +CONFIG_ZLIB_DEFLATE=y +CONFIG_PLIST=y +CONFIG_HAS_IOMEM=y +CONFIG_HAS_IOPORT=y +CONFIG_HAS_DMA=y diff --git a/packages/linux/linux-2.6.27/boc01/013-090116-lcd.patch b/packages/linux/linux-2.6.27/boc01/013-090209-lcd.patch index 46a7534d2f..c867e2cf3a 100644 --- a/packages/linux/linux-2.6.27/boc01/013-090116-lcd.patch +++ b/packages/linux/linux-2.6.27/boc01/013-090209-lcd.patch @@ -160,7 +160,7 @@ Index: linux-2.6.27/drivers/video/nt7506fb.c +#define LCD_NPAGES (LCD_HEIGHT/8) /* LCD pages of 8 vertical pixels */ + +#define DEFAULT_CONTRAST 20 -+#define DEFAULT_FPS 5 ++#define DEFAULT_FPS 10 + +static struct resource *lcd_mem = NULL; +static void * _lcd_io = NULL; diff --git a/packages/linux/linux-2.6.27/boc01/014-090115-pm-wakeup.patch b/packages/linux/linux-2.6.27/boc01/014-090209-pm-wakeup.patch index 536a788ffc..3acbf40c32 100644 --- a/packages/linux/linux-2.6.27/boc01/014-090115-pm-wakeup.patch +++ b/packages/linux/linux-2.6.27/boc01/014-090209-pm-wakeup.patch @@ -1,8 +1,8 @@ Index: linux-2.6.27/arch/powerpc/platforms/83xx/Kconfig =================================================================== ---- linux-2.6.27.orig/arch/powerpc/platforms/83xx/Kconfig -+++ linux-2.6.27/arch/powerpc/platforms/83xx/Kconfig -@@ -104,6 +104,13 @@ config ASP834x +--- linux-2.6.27.orig/arch/powerpc/platforms/83xx/Kconfig 2008-10-10 00:13:53.000000000 +0200 ++++ linux-2.6.27/arch/powerpc/platforms/83xx/Kconfig 2009-01-23 10:54:03.000000000 +0100 +@@ -104,6 +104,13 @@ endif @@ -18,17 +18,17 @@ Index: linux-2.6.27/arch/powerpc/platforms/83xx/Kconfig bool Index: linux-2.6.27/arch/powerpc/platforms/83xx/Makefile =================================================================== ---- linux-2.6.27.orig/arch/powerpc/platforms/83xx/Makefile -+++ linux-2.6.27/arch/powerpc/platforms/83xx/Makefile -@@ -14,3 +14,4 @@ obj-$(CONFIG_MPC837x_MDS) += mpc837x_mds +--- linux-2.6.27.orig/arch/powerpc/platforms/83xx/Makefile 2008-10-10 00:13:53.000000000 +0200 ++++ linux-2.6.27/arch/powerpc/platforms/83xx/Makefile 2009-01-23 10:54:03.000000000 +0100 +@@ -14,3 +14,4 @@ obj-$(CONFIG_SBC834x) += sbc834x.o obj-$(CONFIG_MPC837x_RDB) += mpc837x_rdb.o obj-$(CONFIG_ASP834x) += asp834x.o +obj-$(CONFIG_WAKEUP_IT) += wakeup-it.o Index: linux-2.6.27/arch/powerpc/platforms/83xx/wakeup-it.c =================================================================== ---- /dev/null -+++ linux-2.6.27/arch/powerpc/platforms/83xx/wakeup-it.c +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-2.6.27/arch/powerpc/platforms/83xx/wakeup-it.c 2009-01-23 10:49:09.000000000 +0100 @@ -0,0 +1,163 @@ +/* + * This support a driver to be used as a wakeup source on the MPC8313. @@ -77,8 +77,8 @@ Index: linux-2.6.27/arch/powerpc/platforms/83xx/wakeup-it.c +{ + //printk(KERN_INFO "===== WAKEUP INTERRUPT %d !!\n", irq); + -+ if ( suspend ) -+ kernel_restart(NULL); ++// if ( suspend ) ++// kernel_restart(NULL); + return IRQ_HANDLED ; +} + diff --git a/packages/linux/linux-2.6.28/collie/0001-collie-start-scoop-converton-to-new-api.patch b/packages/linux/linux-2.6.28/collie/0001-collie-start-scoop-converton-to-new-api.patch new file mode 100644 index 0000000000..51c161f99d --- /dev/null +++ b/packages/linux/linux-2.6.28/collie/0001-collie-start-scoop-converton-to-new-api.patch @@ -0,0 +1,106 @@ +From 4765c85914d55590c6d17b6cf9e6f7964d1af108 Mon Sep 17 00:00:00 2001 +From: Dmitry Baryshkov <dbaryshkov@gmail.com> +Date: Tue, 28 Oct 2008 21:41:39 +0300 +Subject: [PATCH 01/23] collie: start scoop converton to new api + +Start converting scoop gpio access to new API instead of old +deprecated one. + +Signed-off-by: Dmitry Baryshkov <dbaryshkov@gmail.com> +--- + arch/arm/mach-sa1100/collie.c | 28 +++++++++++++++++++++++----- + arch/arm/mach-sa1100/include/mach/collie.h | 7 ++++--- + 2 files changed, 27 insertions(+), 8 deletions(-) + +diff --git a/arch/arm/mach-sa1100/collie.c b/arch/arm/mach-sa1100/collie.c +index fe28999..8cf267f 100644 +--- a/arch/arm/mach-sa1100/collie.c ++++ b/arch/arm/mach-sa1100/collie.c +@@ -25,6 +25,7 @@ + #include <linux/mtd/mtd.h> + #include <linux/mtd/partitions.h> + #include <linux/timer.h> ++#include <linux/gpio.h> + + #include <mach/hardware.h> + #include <asm/mach-types.h> +@@ -55,6 +56,7 @@ static struct resource collie_scoop_resources[] = { + static struct scoop_config collie_scoop_setup = { + .io_dir = COLLIE_SCOOP_IO_DIR, + .io_out = COLLIE_SCOOP_IO_OUT, ++ .gpio_base = COLLIE_SCOOP_GPIO_BASE, + }; + + struct platform_device colliescoop_device = { +@@ -196,18 +198,34 @@ static struct mtd_partition collie_partitions[] = { + } + }; + ++static int collie_flash_init(void) ++{ ++ int rc; ++ rc = gpio_request(COLLIE_GPIO_VPEN, "flash Vpp enable"); ++ if (rc) ++ return rc; ++ ++ rc = gpio_direction_output(COLLIE_GPIO_VPEN, 1); ++ if (rc) ++ gpio_free(COLLIE_GPIO_VPEN); ++ ++ return rc; ++} ++ + static void collie_set_vpp(int vpp) + { +- write_scoop_reg(&colliescoop_device.dev, SCOOP_GPCR, read_scoop_reg(&colliescoop_device.dev, SCOOP_GPCR) | COLLIE_SCP_VPEN); +- if (vpp) +- write_scoop_reg(&colliescoop_device.dev, SCOOP_GPWR, read_scoop_reg(&colliescoop_device.dev, SCOOP_GPWR) | COLLIE_SCP_VPEN); +- else +- write_scoop_reg(&colliescoop_device.dev, SCOOP_GPWR, read_scoop_reg(&colliescoop_device.dev, SCOOP_GPWR) & ~COLLIE_SCP_VPEN); ++ gpio_set_value(COLLIE_GPIO_VPEN, vpp); + } + ++static void collie_flash_exit(void) ++{ ++ gpio_free(COLLIE_GPIO_VPEN); ++} + static struct flash_platform_data collie_flash_data = { + .map_name = "cfi_probe", ++ .init = collie_flash_init, + .set_vpp = collie_set_vpp, ++ .exit = collie_flash_exit, + .parts = collie_partitions, + .nr_parts = ARRAY_SIZE(collie_partitions), + }; +diff --git a/arch/arm/mach-sa1100/include/mach/collie.h b/arch/arm/mach-sa1100/include/mach/collie.h +index 69e9624..9bc5349 100644 +--- a/arch/arm/mach-sa1100/include/mach/collie.h ++++ b/arch/arm/mach-sa1100/include/mach/collie.h +@@ -14,6 +14,7 @@ + #define __ASM_ARCH_COLLIE_H + + ++#define COLLIE_SCOOP_GPIO_BASE (GPIO_MAX + 1) + #define COLLIE_SCP_CHARGE_ON SCOOP_GPCR_PA11 + #define COLLIE_SCP_DIAG_BOOT1 SCOOP_GPCR_PA12 + #define COLLIE_SCP_DIAG_BOOT2 SCOOP_GPCR_PA13 +@@ -21,13 +22,13 @@ + #define COLLIE_SCP_MUTE_R SCOOP_GPCR_PA15 + #define COLLIE_SCP_5VON SCOOP_GPCR_PA16 + #define COLLIE_SCP_AMP_ON SCOOP_GPCR_PA17 +-#define COLLIE_SCP_VPEN SCOOP_GPCR_PA18 ++#define COLLIE_GPIO_VPEN (COLLIE_SCOOP_GPIO_BASE + 7) + #define COLLIE_SCP_LB_VOL_CHG SCOOP_GPCR_PA19 + + #define COLLIE_SCOOP_IO_DIR ( COLLIE_SCP_CHARGE_ON | COLLIE_SCP_MUTE_L | COLLIE_SCP_MUTE_R | \ +- COLLIE_SCP_5VON | COLLIE_SCP_AMP_ON | COLLIE_SCP_VPEN | \ ++ COLLIE_SCP_5VON | COLLIE_SCP_AMP_ON | \ + COLLIE_SCP_LB_VOL_CHG ) +-#define COLLIE_SCOOP_IO_OUT ( COLLIE_SCP_MUTE_L | COLLIE_SCP_MUTE_R | COLLIE_SCP_VPEN | \ ++#define COLLIE_SCOOP_IO_OUT ( COLLIE_SCP_MUTE_L | COLLIE_SCP_MUTE_R | \ + COLLIE_SCP_CHARGE_ON ) + + /* GPIOs for which the generic definition doesn't say much */ +-- +1.5.6.5 + diff --git a/packages/linux/linux-2.6.28/collie/0002-add-locomo_spi-driver.patch b/packages/linux/linux-2.6.28/collie/0002-add-locomo_spi-driver.patch new file mode 100644 index 0000000000..7530beee2c --- /dev/null +++ b/packages/linux/linux-2.6.28/collie/0002-add-locomo_spi-driver.patch @@ -0,0 +1,1228 @@ +From dae5d7c71ba47bdd0603d5cc3e8a3dfe28d209a0 Mon Sep 17 00:00:00 2001 +From: Thomas Kunze <thommycheck@gmx.de> +Date: Mon, 20 Oct 2008 17:30:32 +0200 +Subject: [PATCH 02/23] add locomo_spi driver + +--- + drivers/spi/Kconfig | 4 + + drivers/spi/Makefile | 1 + + drivers/spi/locomo_spi.c | 1097 ++++++++++++++++++++++++++++++++++++++++++++++ + drivers/spi/locomo_spi.h | 75 ++++ + 4 files changed, 1177 insertions(+), 0 deletions(-) + create mode 100644 drivers/spi/locomo_spi.c + create mode 100644 drivers/spi/locomo_spi.h + +diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig +index b9d0efb..aa3c60a 100644 +--- a/drivers/spi/Kconfig ++++ b/drivers/spi/Kconfig +@@ -123,6 +123,10 @@ config SPI_MPC52xx_PSC + This enables using the Freescale MPC52xx Programmable Serial + Controller in master SPI mode. + ++config SPI_LOCOMO ++ tristate "Locomo SPI master" ++ depends on SPI_MASTER && SHARP_LOCOMO && EXPERIMENTAL ++ + config SPI_MPC83xx + tristate "Freescale MPC83xx/QUICC Engine SPI controller" + depends on (PPC_83xx || QUICC_ENGINE) && EXPERIMENTAL +diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile +index ccf18de..794dd45 100644 +--- a/drivers/spi/Makefile ++++ b/drivers/spi/Makefile +@@ -29,6 +29,7 @@ obj-$(CONFIG_SPI_S3C24XX) += spi_s3c24xx.o + obj-$(CONFIG_SPI_TXX9) += spi_txx9.o + obj-$(CONFIG_SPI_XILINX) += xilinx_spi.o + obj-$(CONFIG_SPI_SH_SCI) += spi_sh_sci.o ++obj-$(CONFIG_SPI_LOCOMO) += locomo_spi.o + # ... add above this line ... + + # SPI protocol drivers (device/link on bus) +diff --git a/drivers/spi/locomo_spi.c b/drivers/spi/locomo_spi.c +new file mode 100644 +index 0000000..d3a4bd9 +--- /dev/null ++++ b/drivers/spi/locomo_spi.c +@@ -0,0 +1,1097 @@ ++#include <asm/io.h> ++#include <asm/irq.h> ++#include <linux/module.h> ++#include <linux/init.h> ++#include <linux/device.h> ++#include <linux/stat.h> ++#include <linux/delay.h> ++#include <linux/wait.h> ++#include <linux/interrupt.h> ++#include <asm/hardware/locomo.h> ++#include <asm/errno.h> ++#include <linux/mmc/host.h> ++#include <linux/spi/spi.h> ++#include <linux/spi/mmc_spi.h> ++#include <linux/workqueue.h> ++#include <linux/spinlock.h> ++#include <linux/list.h> ++#include "locomo_spi.h" ++static struct locomospi_dev * spidev; ++static struct work_struct transfer_wq; ++int delay; ++ ++char* transtxbuf=(char*)NULL; ++char* transrxbuf=(char*)NULL; ++int transfercount=0, transfersize=0; ++static DECLARE_WAIT_QUEUE_HEAD(transferqueue); ++/* MMC_SPI functions *********************************************************/ ++ ++static int locomommcspi_init(struct device *dev, irqreturn_t (*isr)(int, void*), void *mmc) ++{ ++ int result; ++ result=request_irq(IRQ_LOCOMO_CARDDETECT, isr, IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING, "locomo-spi", mmc); ++ return result; ++} ++ ++static void locomommcspi_exit(struct device *dev, void* mmc) ++{ ++ free_irq(IRQ_LOCOMO_CARDDETECT, mmc); ++} ++ ++static int locomommcspi_getro(struct device *dev) ++{ ++ return locomo_gpio_read_level(spidev->ldev->dev.parent,LOCOMO_GPIO_WRITE_PROT) > 0 ? 1 : 0; ++} ++ ++static void locomommcspi_setpower(struct device *dev, unsigned int mask) ++{ ++ if(!mask && spidev->card_power) ++ locomospi_power(0); ++ else if( !spidev->card_power ) ++ locomospi_power(1); ++ ++} ++ ++ ++static struct mmc_spi_platform_data colliemmc ={ ++ .init = locomommcspi_init, ++ .exit = locomommcspi_exit, ++ .detect_delay = 200, ++ .get_ro = locomommcspi_getro, ++ .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34, ++ .setpower = locomommcspi_setpower, ++ .powerup_msecs = 200, ++}; ++ ++/* Utility function **********************************************************/ ++ ++static void locomospi_power(int on) ++{ ++ locomo_gpio_write(spidev->ldev->dev.parent, LOCOMO_GPIO_CARD_POWER, on); ++ spidev->card_power=on; ++ printk(KERN_DEBUG "locomospi: power %d\n",on); ++} ++ ++static void locomospi_setclock(unsigned int div, unsigned int clock) ++{ ++ u16 r = ioread16(spidev->base+LOCOMO_SPIMD); ++ div &= 0x7; ++ clock &= 0x3; ++ if(clock != spidev->clock_base || div != spidev->clock_div){ ++ r &= ~(LOCOMO_SPI_XSEL | LOCOMO_SPI_CLKSEL | LOCOMO_SPI_XEN); ++ iowrite16(r,spidev->base+LOCOMO_SPIMD); ++ r |= (div | (clock <<3) | LOCOMO_SPI_XEN); ++ iowrite16(r,spidev->base+LOCOMO_SPIMD); ++ spidev->clock_div = div; ++ spidev->clock_base = clock; ++ udelay(300); ++ } ++ ++} ++// returns 1 if card ist present, 0 otherwise ++static int locomospi_carddetect() ++{ ++ return (locomo_gpio_read_level(spidev->ldev->dev.parent,LOCOMO_GPIO_CARD_DETECT)>0)?0:1; ++} ++ ++static void locomospi_setcs(int high) ++{ ++ u16 r; ++ printk(KERN_DEBUG "locomospi: cs %d\n",high); ++ r = ioread16(spidev->base + LOCOMO_SPICT); ++ if(high) ++ r |= LOCOMO_SPI_CS; ++ else ++ r &= ~LOCOMO_SPI_CS; ++ iowrite16(r, spidev->base + LOCOMO_SPICT); ++} ++ ++static void locomospi_reg_open() ++{ ++ u16 r; ++ spidev->clock_div = DIV_64; ++ spidev->clock_base = CLOCK_18MHZ; ++ locomospi_power(1); ++ msleep(100); ++// iowrite16( 0xec00 | (CLOCK_18MHZ <<3)|DIV_64, spidev->base+LOCOMO_SPIMD); ++ iowrite16( LOCOMO_SPI_MSB1ST | LOCOMO_SPI_DOSTAT | LOCOMO_SPI_RCPOL | LOCOMO_SPI_TCPOL ++ |(CLOCK_18MHZ <<3) | DIV_64, spidev->base+LOCOMO_SPIMD); ++// if(locomospi_carddetect()){ ++ r = ioread16(spidev->base+LOCOMO_SPIMD); ++ r |= LOCOMO_SPI_XON; ++ iowrite16( r, spidev->base+LOCOMO_SPIMD); ++ r = ioread16(spidev->base+LOCOMO_SPIMD); ++ r |= LOCOMO_SPI_XEN; ++ iowrite16( r, spidev->base+LOCOMO_SPIMD); ++// } ++ iowrite16( LOCOMO_SPI_CS, spidev->base+LOCOMO_SPICT); ++ r = ioread16(spidev->base+LOCOMO_SPICT); ++ r |= (LOCOMO_SPI_CEN | LOCOMO_SPI_RXUEN | LOCOMO_SPI_ALIGNEN); ++ iowrite16( r, spidev->base+LOCOMO_SPICT); ++ udelay(200); ++ r = ioread16(spidev->base+LOCOMO_SPICT); ++ iowrite16(r, spidev->base+LOCOMO_SPICT); ++ r = ioread16(spidev->base+LOCOMO_SPICT); ++ r &= ~LOCOMO_SPI_CS; ++ iowrite16(r, spidev->base+LOCOMO_SPICT); ++} ++ ++static void locomospi_reg_release() ++{ ++ u16 r; ++ r = ioread16(spidev->base+LOCOMO_SPICT); ++ r &= ~LOCOMO_SPI_CEN; ++ iowrite16(r, spidev->base+LOCOMO_SPICT); ++ r = ioread16(spidev->base+LOCOMO_SPIMD); ++ r &= ~LOCOMO_SPI_XEN; ++ iowrite16(r, spidev->base+LOCOMO_SPIMD); ++ r = ioread16(spidev->base+LOCOMO_SPIMD); ++ r &= ~LOCOMO_SPI_XON; ++ iowrite16(r, spidev->base+LOCOMO_SPIMD); ++ r = ioread16(spidev->base+LOCOMO_SPICT); ++ r |= LOCOMO_SPI_XEN; ++ iowrite16(r, spidev->base+LOCOMO_SPICT); ++ locomospi_power(0); ++} ++#if 0 ++static int txrx(const char* txbuffer, char* rxbuffer, int size) ++{ ++ u16 r = ioread16(spidev->base+LOCOMO_SPICT); ++ r |= LOCOMO_SPI_ALIGNEN; ++ iowrite16(r, spidev->base+LOCOMO_SPICT); ++ printk(KERN_DEBUG "locomospi: %d bytes to prozess\n",size); ++ /* initialize global vars for isr */ ++ transfercount=0; transfersize=size; ++ transtxbuf=txbuffer; transrxbuf=rxbuffer; ++ ++ /* start transmit and go sleep isr will wake us*/ ++ enable_irq(IRQ_LOCOMO_SPI_TEND); ++ iowrite8(txbuffer[0], spidev->base+LOCOMO_SPITD); ++ wait_event(transferqueue, transfercount >= transfersize); ++ disable_irq(IRQ_LOCOMO_SPI_TEND); ++ transrxbuf=NULL; transtxbuf=NULL; ++ ++ r = ioread16(spidev->base+LOCOMO_SPICT); ++ r &= ~LOCOMO_SPI_ALIGNEN; ++ iowrite16(r, spidev->base+LOCOMO_SPICT); ++ int i; ++ for(i=0; i< size; i++) ++ printk(KERN_DEBUG "locomospi: sent: %x received: %x \n",txbuffer[i], rxbuffer[i]); ++ ++ ++ return size; ++} ++ ++ ++static int tx(const char* txbuffer, int size) ++{ ++ printk(KERN_DEBUG "locomospi: %d bytes to send\n",size); ++ /* initialize global vars for isr */ ++ transfercount=0; transfersize=size; ++ transtxbuf=txbuffer; ++ ++ /* start transmit and go sleep isr will wake us*/ ++ enable_irq(IRQ_LOCOMO_SPI_RFW); ++ iowrite8(txbuffer[0], spidev->base+LOCOMO_SPITD); ++ wait_event(transferqueue, transfercount >= transfersize); ++ disable_irq(IRQ_LOCOMO_SPI_RFW); ++ transtxbuf=NULL; ++ ++ int i; ++ for(i=0; i< size; i++) ++ printk(KERN_DEBUG "locomospi: sent: %x\n",txbuffer[i]); ++ ++ ++ return size; ++} ++ ++static int rx(char* rxbuffer, int size) ++{ ++ printk(KERN_DEBUG "locomospi: %d bytes to read\n",size); ++ /* initialize global vars for isr */ ++ transfercount=0; transfersize=size; ++ transrxbuf=rxbuffer; ++ ++ /* start transmit and go sleep isr will wake us*/ ++ enable_irq(IRQ_LOCOMO_SPI_RFR); ++ rxbuffer[0]=ioread8(spidev->base+LOCOMO_SPIRD); ++ wait_event(transferqueue, transfercount >= transfersize); ++ disable_irq(IRQ_LOCOMO_SPI_RFR); ++ transrxbuf=NULL; ++ ++ int i; ++ for(i=0; i< size; i++) ++ printk(KERN_DEBUG "locomospi: received: %x \n", rxbuffer[i]); ++ ++ ++ return size; ++} ++ ++#else ++static int txrx(const char* txbuffer, char* rxbuffer, int size) ++{ ++ int i=0,j=0; ++ int wait; ++ u16 r; ++/* char * txback = kmalloc(size * sizeof(char), GFP_KERNEL); ++ memcpy(txback, txbuffer, size); ++*/ ++ if(spidev->clock_div == 4) ++ wait = 0x10000; ++ else ++ wait = 8; ++ ++// printk(KERN_DEBUG "locomospi: txrx %d bytes to prozess\n",size); ++ ++// r = ioread16(spidev->base+LOCOMO_SPICT); ++// r |= LOCOMO_SPI_ALIGNEN; ++// iowrite16(r, spidev->base+LOCOMO_SPICT); ++ //discard first bogus byte ++ ++ ioread8(spidev->base+LOCOMO_SPIRD); ++ for(i=0; i<size; i++){ ++ for(j=0; j <= wait; j++){ ++ if(ioread16(spidev->base+LOCOMO_SPIST) & LOCOMO_SPI_RFW) ++ break; ++ } ++ iowrite8(txbuffer[i], spidev->base+LOCOMO_SPITD); ++ ndelay(delay); ++ ++ for(j=0; j <= wait; j++){ ++ if(ioread16(spidev->base+LOCOMO_SPIST) & LOCOMO_SPI_RFR) ++ break; ++ } ++ rxbuffer[i] = ioread8(spidev->base+LOCOMO_SPIRD); ++ ndelay(delay); ++ } ++// r = ioread16(spidev->base+LOCOMO_SPICT); ++// r &= ~LOCOMO_SPI_ALIGNEN; ++// iowrite16(r, spidev->base+LOCOMO_SPICT); ++ ++/* for(j=0; j< size; j++) ++ printk(KERN_DEBUG "locomospi: sent: %x received: %x \n",txback[j], rxbuffer[j]); ++ ++ kfree(txback); ++*/ return i; ++} ++ ++static int tx(const char* buffer, int size) ++{ ++ int i=0,j=0; ++ int wait; ++ u16 r; ++ if(spidev->clock_div == 4) ++ wait = 0x10000; ++ else ++ wait = 8; ++ r = ioread16(spidev->base+LOCOMO_SPICT); ++ r &= ~LOCOMO_SPI_ALIGNEN; ++ iowrite16(r, spidev->base+LOCOMO_SPICT); ++ ++// printk(KERN_DEBUG "locomospi: tx %d bytes to transmit\n",size); ++ for(i=0; i<size; i++){ ++ for(j=0; j <= wait; j++){ ++ if(ioread16(spidev->base+LOCOMO_SPIST) & LOCOMO_SPI_RFW) ++ break; ++ } ++ iowrite8(buffer[i], spidev->base+LOCOMO_SPITD); ++ ndelay(delay); ++ } ++ ++ for(j=0; j <= wait; j++){ ++ if(ioread16(spidev->base+LOCOMO_SPIST) & LOCOMO_SPI_TEND) ++ break; ++ } ++ ++ r = ioread16(spidev->base+LOCOMO_SPICT); ++ r |= LOCOMO_SPI_ALIGNEN; ++ iowrite16(r, spidev->base+LOCOMO_SPICT); ++ ++// for(j=0; j< size; j++) ++// printk(KERN_DEBUG "locomospi: sent: %x \n", buffer[j]); ++// printk(KERN_DEBUG "locomospi: tx %d bytes transmitted\n",i); ++ return i; ++} ++ ++static int rx(char* buffer, int size) ++{ ++ int i,j; ++ int wait; ++ u16 r; ++ printk(KERN_DEBUG "locomospi: rx %d bytes to receive\n",size); ++ if(spidev->clock_div == 4) ++ wait = 0x10000; ++ else ++ wait = 8; ++ r = ioread16(spidev->base+LOCOMO_SPICT); ++ r &= ~LOCOMO_SPI_ALIGNEN; ++ iowrite16(r, spidev->base+LOCOMO_SPICT); ++ ++ for(i=0; i<size; i++){ ++ ++ for(j=0; j <= wait; j++){ ++ if(ioread16(spidev->base+LOCOMO_SPIST) & LOCOMO_SPI_RFR) ++ break; ++ } ++ buffer[i]= ioread8(spidev->base+LOCOMO_SPIRD); ++ ndelay(delay); ++ } ++ ++ r = ioread16(spidev->base+LOCOMO_SPICT); ++ r |= LOCOMO_SPI_ALIGNEN; ++ iowrite16(r, spidev->base+LOCOMO_SPICT); ++ ++ for(j=0; j< size; j++) ++ printk(KERN_DEBUG "locomospi: received: %x \n", buffer[j]); ++ printk(KERN_DEBUG "locomospi: rx %d bytes received\n",i); ++ return i; ++} ++#endif ++/* ++static irqreturn_t locomospi_rwready(int irq, void *dev_id) ++{ ++ struct locomospi_dev* dev=(struct locomospi_dev*) dev_id; ++// dev_dbg(&spidev->sdev->dev, "IRQ: %d\n", irq); ++// printk(KERN_DEBUG "locomospi: IRQ: %d\n", irq); ++ wake_up_interruptible(&dev->waitqueue); ++ return IRQ_HANDLED; ++} ++*/ ++static irqreturn_t locomospi_testisr(int irq, void *dev_id) ++{ ++ char *buf=""; ++ switch(irq){ ++ case IRQ_LOCOMO_SPI_RFR: buf="RFR"; ++ break; ++ case IRQ_LOCOMO_SPI_RFW: buf="RFW"; ++ break; ++ case IRQ_LOCOMO_SPI_REND:buf="REND"; ++ break; ++ case IRQ_LOCOMO_SPI_TEND:buf="TEND"; ++ break; ++ case IRQ_LOCOMO_CARDDETECT: ++ buf="CARD_DETECT"; ++ break; ++ default: return IRQ_NONE; ++ } ++ printk(KERN_DEBUG "locomospi: IRQ: %s\n",buf); ++// dev_dbg(&spidev->sdev->dev, "IRQ: %s\n",buf); ++ return IRQ_HANDLED; ++} ++static irqreturn_t locomospi_txrxisr(int irq, void *dev_id) ++{ ++ if(transfercount < transfersize){ ++ transrxbuf[transfercount++] = ioread8(spidev->base+LOCOMO_SPIRD); ++ iowrite8(transtxbuf[transfercount], spidev->base+LOCOMO_SPITD); ++ } ++ else{ ++ /* transfer complete. wake up txrx */ ++ wake_up(&transferqueue); ++ } ++ return IRQ_HANDLED; ++} ++ ++static irqreturn_t locomospi_txisr(int irq, void *dev_id) ++{ ++ if(transfercount < transfersize){ ++ iowrite8(transtxbuf[transfercount++], spidev->base+LOCOMO_SPITD); ++ } ++ else{ ++ /* transfer complete. wake up txrx */ ++ wake_up(&transferqueue); ++ } ++ return IRQ_HANDLED; ++} ++ ++static irqreturn_t locomospi_rxisr(int irq, void *dev_id) ++{ ++ if(transfercount < transfersize){ ++ transrxbuf[transfercount++] = ioread8(spidev->base+LOCOMO_SPIRD); ++ } ++ else{ ++ /* transfer complete. wake up txrx */ ++ wake_up(&transferqueue); ++ } ++ return IRQ_HANDLED; ++} ++ ++static void locomospi_clock(unsigned int Hz) ++{ ++ u16 r; ++ printk(KERN_DEBUG "locomospi: changing clock to: %d\n", Hz); ++ if(Hz == 0){ ++ r = ioread16(spidev->base+LOCOMO_SPIMD); ++ r &= ~LOCOMO_SPI_XON; ++ iowrite16(r, spidev->base+LOCOMO_SPIMD); ++ } ++ else if(Hz >= 24576000){ ++ r = ioread16(spidev->base+LOCOMO_SPIMD); ++ r |= LOCOMO_SPI_XON; ++ iowrite16(r, spidev->base+LOCOMO_SPIMD); ++ locomospi_setclock(DIV_1, CLOCK_25MHZ); ++ delay=41; ++ } ++ else if(Hz >= 22579200){ ++ r = ioread16(spidev->base+LOCOMO_SPIMD); ++ r |= LOCOMO_SPI_XON; ++ iowrite16(r, spidev->base+LOCOMO_SPIMD); ++ locomospi_setclock(DIV_1, CLOCK_22MHZ); ++ delay=45; ++ } ++ else if(Hz >= 18432000){ ++ r = ioread16(spidev->base+LOCOMO_SPIMD); ++ r |= LOCOMO_SPI_XON; ++ iowrite16(r, spidev->base+LOCOMO_SPIMD); ++ locomospi_setclock(DIV_1, CLOCK_18MHZ); ++ delay=55; ++ } ++ else if(Hz >= 12288000){ ++ r = ioread16(spidev->base+LOCOMO_SPIMD); ++ r |= LOCOMO_SPI_XON; ++ iowrite16(r, spidev->base+LOCOMO_SPIMD); ++ locomospi_setclock(DIV_2, CLOCK_25MHZ); ++ delay=82; ++ } ++ else if(Hz >= 11289600){ ++ r = ioread16(spidev->base+LOCOMO_SPIMD); ++ r |= LOCOMO_SPI_XON; ++ iowrite16(r, spidev->base+LOCOMO_SPIMD); ++ locomospi_setclock(DIV_2, CLOCK_22MHZ); ++ delay=89; ++ } ++ else if(Hz >= 9216000){ ++ r = ioread16(spidev->base+LOCOMO_SPIMD); ++ r |= LOCOMO_SPI_XON; ++ iowrite16(r, spidev->base+LOCOMO_SPIMD); ++ locomospi_setclock(DIV_2, CLOCK_18MHZ); ++ delay=110; ++ } ++ else if(Hz >= 6144000){ ++ r = ioread16(spidev->base+LOCOMO_SPIMD); ++ r |= LOCOMO_SPI_XON; ++ iowrite16(r, spidev->base+LOCOMO_SPIMD); ++ locomospi_setclock(DIV_4, CLOCK_25MHZ); ++ delay=164; ++ } ++ else if(Hz >= 5644800){ ++ r = ioread16(spidev->base+LOCOMO_SPIMD); ++ r |= LOCOMO_SPI_XON; ++ iowrite16(r, spidev->base+LOCOMO_SPIMD); ++ locomospi_setclock(DIV_4, CLOCK_22MHZ); ++ delay=178; ++ } ++ else if(Hz >= 4608000){ ++ r = ioread16(spidev->base+LOCOMO_SPIMD); ++ r |= LOCOMO_SPI_XON; ++ iowrite16(r, spidev->base+LOCOMO_SPIMD); ++ locomospi_setclock(DIV_4, CLOCK_18MHZ); ++ delay=218; ++ } ++ else if(Hz >= 3072000){ ++ r = ioread16(spidev->base+LOCOMO_SPIMD); ++ r |= LOCOMO_SPI_XON; ++ iowrite16(r, spidev->base+LOCOMO_SPIMD); ++ locomospi_setclock(DIV_8, CLOCK_25MHZ); ++ delay=327; ++ } ++ else if(Hz >= 2822400){ ++ r = ioread16(spidev->base+LOCOMO_SPIMD); ++ r |= LOCOMO_SPI_XON; ++ iowrite16(r, spidev->base+LOCOMO_SPIMD); ++ locomospi_setclock(DIV_8, CLOCK_22MHZ); ++ delay=355; ++ } ++ else if(Hz >= 2304000){ ++ r = ioread16(spidev->base+LOCOMO_SPIMD); ++ r |= LOCOMO_SPI_XON; ++ iowrite16(r, spidev->base+LOCOMO_SPIMD); ++ locomospi_setclock(DIV_8, CLOCK_18MHZ); ++ delay=435; ++ } ++ else if(Hz >= 384000){ ++ r = ioread16(spidev->base+LOCOMO_SPIMD); ++ r |= LOCOMO_SPI_XON; ++ iowrite16(r, spidev->base+LOCOMO_SPIMD); ++ locomospi_setclock(DIV_64, CLOCK_25MHZ); ++ delay=2605; ++ } ++ else if(Hz >= 352800){ ++ r = ioread16(spidev->base+LOCOMO_SPIMD); ++ r |= LOCOMO_SPI_XON; ++ iowrite16(r, spidev->base+LOCOMO_SPIMD); ++ locomospi_setclock(DIV_64, CLOCK_22MHZ); ++ delay=2834; ++ } ++ else{ /* set to 288 KHz */ ++ r = ioread16(spidev->base+LOCOMO_SPIMD); ++ r |= LOCOMO_SPI_XON; ++ iowrite16(r, spidev->base+LOCOMO_SPIMD); ++ locomospi_setclock(DIV_64, CLOCK_18MHZ); ++ delay=3473; ++ } ++ spidev->clock = Hz; ++} ++ ++/* sysfs attributes used for debug *******************************************/ ++ ++/* SPI registers */ ++ssize_t locomospi_showspimd(struct device_driver *drv, char *buf) ++{ ++ return sprintf(buf, "0x%x\n", ioread16(spidev->base+LOCOMO_SPIMD)); ++} ++ ++ssize_t locomospi_storespimd(struct device_driver *drv, const char *buf, size_t count) ++{ ++ iowrite16(simple_strtoul(buf, NULL, 16), spidev->base+LOCOMO_SPIMD); ++ return count; ++} ++static DRIVER_ATTR(spimd, S_IWUSR | S_IRUGO, locomospi_showspimd, locomospi_storespimd); ++ ++ssize_t locomospi_showspict(struct device_driver *drv, char *buf) ++{ ++ return sprintf(buf, "0x%x\n", ioread16(spidev->base+LOCOMO_SPICT)); ++} ++ ++ssize_t locomospi_storespict(struct device_driver *drv, const char *buf, size_t count) ++{ ++ iowrite16(simple_strtoul(buf, NULL, 16), spidev->base+LOCOMO_SPICT); ++ return count; ++} ++static DRIVER_ATTR(spict, S_IWUSR | S_IRUGO, locomospi_showspict, locomospi_storespict); ++ ++ssize_t locomospi_showspist(struct device_driver *drv, char *buf) ++{ ++ return sprintf(buf, "0x%x\n", ioread16(spidev->base+LOCOMO_SPIST)); ++} ++ ++ssize_t locomospi_storespist(struct device_driver *drv, const char *buf, size_t count) ++{ ++ iowrite16(simple_strtoul(buf, NULL, 16), spidev->base+LOCOMO_SPIST); ++ return count; ++} ++static DRIVER_ATTR(spist, S_IWUSR | S_IRUGO, locomospi_showspist, locomospi_storespist); ++ ++ssize_t locomospi_showspitd(struct device_driver *drv, char *buf) ++{ ++ return sprintf(buf, "0x%x\n", ioread16(spidev->base+LOCOMO_SPITD)); ++} ++ ++ssize_t locomospi_storespitd(struct device_driver *drv, const char *buf, size_t count) ++{ ++ iowrite16(simple_strtoul(buf, NULL, 16), spidev->base+LOCOMO_SPITD); ++ return count; ++} ++static DRIVER_ATTR(spitd, S_IWUSR | S_IRUGO, locomospi_showspitd, locomospi_storespitd); ++ ++ssize_t locomospi_showspird(struct device_driver *drv, char *buf) ++{ ++ return sprintf(buf, "0x%x\n", ioread16(spidev->base+LOCOMO_SPIRD)); ++} ++ ++ssize_t locomospi_storespird(struct device_driver *drv, const char *buf, size_t count) ++{ ++ iowrite16(simple_strtoul(buf, NULL, 16), spidev->base+LOCOMO_SPIRD); ++ return count; ++} ++static DRIVER_ATTR(spird, S_IWUSR | S_IRUGO, locomospi_showspird, locomospi_storespird); ++ ++ssize_t locomospi_showspits(struct device_driver *drv, char *buf) ++{ ++ return sprintf(buf, "0x%x\n", ioread16(spidev->base+LOCOMO_SPITS)); ++} ++ ++ssize_t locomospi_storespits(struct device_driver *drv, const char *buf, size_t count) ++{ ++ iowrite16(simple_strtoul(buf, NULL, 16), spidev->base+LOCOMO_SPITS); ++ return count; ++} ++static DRIVER_ATTR(spits, S_IWUSR | S_IRUGO, locomospi_showspits, locomospi_storespits); ++ ++ssize_t locomospi_showspirs(struct device_driver *drv, char *buf) ++{ ++ return sprintf(buf, "0x%x\n", ioread16(spidev->base+LOCOMO_SPIRS)); ++} ++ ++ssize_t locomospi_storespirs(struct device_driver *drv, const char *buf, size_t count) ++{ ++ iowrite16(simple_strtoul(buf, NULL, 16), spidev->base+LOCOMO_SPIRS); ++ return count; ++} ++static DRIVER_ATTR(spirs, S_IWUSR | S_IRUGO, locomospi_showspirs, locomospi_storespirs); ++ ++/* MMC Card status */ ++ ++ssize_t locomospi_showpower(struct device_driver *drv, char *buf) ++{ ++ return sprintf(buf, "%d\n", spidev->card_power); ++} ++ ++ssize_t locomospi_storepower(struct device_driver *drv, const char *buf, size_t count) ++{ ++ locomospi_power(simple_strtoul(buf, NULL, 10)); ++ return count; ++} ++static DRIVER_ATTR(cardpower, S_IWUSR | S_IRUGO, locomospi_showpower, locomospi_storepower); ++ ++ssize_t locomospi_detectcard(struct device_driver *drv, char *buf) ++{ ++ return sprintf(buf, "%d\n",(locomo_gpio_read_level(spidev->ldev->dev.parent,LOCOMO_GPIO_CARD_DETECT)>0)?0:1); ++} ++static DRIVER_ATTR(carddetect, S_IRUGO, locomospi_detectcard, NULL); ++ ++ssize_t locomospi_writeprotect(struct device_driver *drv, char *buf) ++{ ++ return sprintf(buf, "%d\n",(locomo_gpio_read_level(spidev->ldev->dev.parent,LOCOMO_GPIO_WRITE_PROT)>0)?1:0); ++} ++static DRIVER_ATTR(cardwriteprotect, S_IRUGO, locomospi_writeprotect, NULL); ++ ++ ++ssize_t locomospi_showclock(struct device_driver *drv, char *buf) ++{ ++ return sprintf(buf, "%d\n", spidev->clock); ++} ++ ++ssize_t locomospi_storeclock(struct device_driver *drv, const char *buf, size_t count) ++{ ++ locomospi_clock(simple_strtoul(buf, NULL, 10)); ++ return count; ++} ++static DRIVER_ATTR(clock, S_IWUSR | S_IRUGO, locomospi_showclock, locomospi_storeclock); ++ ++/* debug */ ++ssize_t locomospi_showdelay(struct device_driver *drv, char *buf) ++{ ++ return sprintf(buf, "%d\n", delay); ++} ++ ++ssize_t locomospi_storedelay(struct device_driver *drv, const char *buf, size_t count) ++{ ++ delay=simple_strtoul(buf,NULL,10); ++ return count; ++} ++static DRIVER_ATTR(delay, S_IWUSR | S_IRUGO, locomospi_showdelay, locomospi_storedelay); ++ ++ssize_t locomospi_reset(struct device_driver *drv, const char *buf, size_t count) ++{ ++ int choice = simple_strtoul(buf, NULL, 10); ++ char buff[100]; ++ u16 r; ++ switch(choice){ ++ case 0: locomospi_reg_release(); ++ schedule_timeout(2*HZ); ++ locomospi_reg_open(); ++ break; ++ case 1: { ++ char b1[] = "\xff\xff\xff\xff\xff\xff\xff\xff\xff\xff\xff\xff\xff\xff\xff\xff\xff\xff"; ++ char b2[] = "\xff\x40\x00\x00\x00\x00\x95\xff\xff\xff\xff\xff\xff\xff\xff\xff\xff"; ++ locomospi_setcs(1); ++ txrx(b1,b1,17); ++ locomospi_setcs(0); ++ txrx(b2,b2,18); ++ ++ } ++ break; ++ case 2: locomospi_setcs(1); ++ txrx("\xff\xff\xff\xff\xff\xff\xff\xff\xff\xff\xff\xff\xff\xff\xff\xff\xff\xff",buff,18); ++ locomospi_setcs(0); ++ txrx("\xff\x40\x00\x00\x00\x00\x95\xff\xff\xff\xff\xff\xff\xff\xff\xff\xff",buff,17); ++ break; ++ case 3: ++ r = ioread16(spidev->base+LOCOMO_SPIMD); ++ r |= LOCOMO_SPI_LOOPBACK; ++ iowrite16(r, spidev->base+LOCOMO_SPIMD); ++ txrx("X",buff,1); ++ txrx("abcdefghijklmnopqrstuvwxyz1234567890",buff,36); ++ txrx("Y",buff,1); ++ udelay(100); ++ txrx("Z",buff,1); ++ schedule_timeout(HZ); ++ txrx("abcdefghijklmnopqrstuvwxyz1234567890",buff,36); ++ ++ r = ioread16(spidev->base+LOCOMO_SPIMD); ++ r &= ~LOCOMO_SPI_LOOPBACK; ++ iowrite16(r, spidev->base+LOCOMO_SPIMD); ++ break; ++ default: /* do nothing */; ++ } ++ return count; ++} ++static DRIVER_ATTR(reset, S_IWUSR, NULL, locomospi_reset); ++ ++typedef struct locomo_reg_entry { ++ u32 addr; ++ char* name; ++} locomo_reg_entry_t; ++#define LCM (sizeof(locomo_regs)/sizeof(locomo_reg_entry_t)) ++static locomo_reg_entry_t locomo_regs[] = ++{ ++/* { addr, name, description } */ ++ { 0x00, "VER" }, ++ { 0x04, "ST" }, ++ { 0x08, "C32K" }, ++ { 0x0C, "ICR" }, ++ { 0x10, "MCSX0" }, ++ { 0x14, "MCSX1" }, ++ { 0x18, "MCSX2" }, ++ { 0x1C, "MCSX3" }, ++ { 0x20, "ASD" }, ++ { 0x28, "HSD" }, ++ { 0x2C, "HSC" }, ++ { 0x30, "TADC" }, ++ { 0x38, "TC" }, ++ { 0x3C, "CPSD" }, ++ { 0x40, "KIB" }, ++ { 0x44, "KSC" }, ++ { 0x48, "KCMD" }, ++ { 0x4C, "KIC" }, ++ { 0x54, "ACC" }, ++ { 0x60, "SPIMD" }, ++ { 0x64, "SPICT" }, ++ { 0x68, "SPIST" }, ++ { 0x70, "SPIIS" }, ++ { 0x74, "SPIWE" }, ++ { 0x78, "SPIIE" }, ++ { 0x7C, "SPIIR" }, ++ { 0x80, "SPITD" }, ++ { 0x84, "SPIRD" }, ++ { 0x88, "SPITS" }, ++ { 0x8C, "SPIRS" }, ++ { 0x90, "GPD" }, ++ { 0x94, "GPE" }, ++ { 0x98, "GPL" }, ++ { 0x9C, "GPO" }, ++ { 0xa0, "GRIE" }, ++ { 0xa4, "GFIE" }, ++ { 0xa8, "GIS" }, ++ { 0xac, "GWE" }, ++ { 0xb0, "GIE" }, ++ { 0xb4, "GIR" }, ++ { 0xc8, "ALC" }, ++ { 0xcc, "ALR" }, ++ { 0xd0, "PAIF" }, ++ { 0xd8, "LTC" }, ++ { 0xdc, "LTINT" }, ++ { 0xe0, "DAC" }, ++ { 0xe8, "LPT0" }, ++ { 0xec, "LPT1" }, ++ { 0xfc, "TCR" }, ++}; ++ ++static ssize_t lcm_show(struct device *dev, struct device_attribute *attr, char *buf) ++{ ++ int base = spidev->base - LOCOMO_SPI; ++ char b[4000]=""; ++ char c[30]; ++ int i; ++ for(i=0; i<LCM; i++){ ++ sprintf(c,"%s:\t\t 0x%x\n",locomo_regs[i].name, ioread16(base + locomo_regs[i].addr)); ++ strcat(b,c); ++ } ++ return sprintf(buf,"%s",b); ++} ++ ++static DRIVER_ATTR(regs, 0444, lcm_show, NULL); ++ ++ ++/* SPI functions *************************************************************/ ++ ++static void locomospi_do_transfer(struct work_struct *wrk) ++{ ++ struct list_head *mptr, *tptr, *mptr2; ++ struct spi_transfer *entry; ++ struct spi_message *msg; ++ ++ list_for_each_safe(mptr, mptr2, &spidev->message_list){ ++ msg = list_entry(mptr, struct spi_message, queue); ++ ++ msg->status = 0; ++ msg->actual_length = 0; ++ list_for_each(tptr, &msg->transfers){ ++ entry = list_entry(tptr, struct spi_transfer, transfer_list); ++ if(entry->tx_buf && entry->rx_buf){ //duplex ++ txrx((char*) entry->tx_buf, (char*) entry->rx_buf, entry->len); ++ msg->actual_length += entry->len; ++ } else if(entry->tx_buf && !entry->rx_buf){ //write ++ tx((char*) entry->tx_buf, entry->len); ++ msg->actual_length += entry->len; ++ } else if(!entry->tx_buf && entry->rx_buf){ //read ++ rx((char*) entry->rx_buf, entry->len); ++ msg->actual_length += entry->len; ++ } else if(!entry->tx_buf && !entry->rx_buf){ //error ++ dev_err(&spidev->sdev->dev, "do_transfer: no buffers allocated\n"); ++ msg->status = -EFAULT; ++ } ++ } ++ spin_lock(&spidev->message_lock); ++ list_del(mptr); ++ spin_unlock(&spidev->message_lock); ++ msg->complete(msg->context); ++ } ++} ++ ++static int locomospi_setup(struct spi_device *spi) ++{ ++ if((spi->mode & SPI_CS_HIGH) != (spidev->spimode & SPI_CS_HIGH)) ++ locomospi_setcs(spi->mode & SPI_CS_HIGH ? 1 : 0 ); ++ if(spidev->clock != spi->max_speed_hz){ ++ locomospi_clock(spi->max_speed_hz); ++ } ++ spidev->spimode = spi->mode; ++ ++ return 0; ++} ++ ++static int locomospi_transfer(struct spi_device *spi, struct spi_message *msg) ++{ ++ ++ spin_lock(&spidev->message_lock); ++ list_add_tail(&msg->queue, &spidev->message_list); ++ spin_unlock(&spidev->message_lock); ++ schedule_work(&transfer_wq); ++ return 0; ++} ++ ++static struct locomo_driver locomo_spi_driver = { ++ .drv = { ++ .name = "locomo-spi", ++ }, ++ .devid = LOCOMO_DEVID_SPI, ++ .probe = locomospi_probe, ++ .remove = locomospi_remove, ++#ifdef CONFIG_PM ++ .suspend = locomospi_suspend, ++ .resume = locomospi_resume, ++#endif ++}; ++ ++static struct spi_board_info board = { ++ .modalias = "mmc_spi", ++ .platform_data = (void*) &colliemmc, ++ .controller_data= NULL, ++ .irq = 0, ++ .max_speed_hz = 25000000, ++ .bus_num = 0, ++ .chip_select = 0, ++ .mode = 0, ++}; ++ ++#ifdef CONFIG_PM ++static int locomospi_suspend(struct locomo_dev *dev, pm_message_t state) ++{ ++ disable_irq(IRQ_LOCOMO_CARDDETECT); ++ return 0; ++} ++ ++static int locomospi_resume(struct locomo_dev *dev) ++{ ++ enable_irq(IRQ_LOCOMO_CARDDETECT); ++ return 0; ++} ++#endif ++ ++static int locomospi_probe(struct locomo_dev *dev) ++{ ++ int result=0; ++ printk(KERN_DEBUG "Collie MMC over SPI Driver\n"); ++ spidev=kmalloc(sizeof(struct locomospi_dev),GFP_KERNEL); ++ if(!spidev){ ++ return -ENOMEM; ++ } ++ spidev->ldev = dev; ++ spidev->card_power = 1; ++ spidev->spimode = 0; ++ ++ if(!request_mem_region((unsigned long) dev->mapbase, dev->length, LOCOMO_DRIVER_NAME(dev))) { ++ dev_err(&dev->dev, " Can't aquire access to io memory\n"); ++ return -EBUSY; ++ } ++ spidev->base=(unsigned long) dev->mapbase; ++ locomospi_reg_open(); ++ ++ locomo_gpio_set_dir(dev->dev.parent, LOCOMO_GPIO_CARD_POWER, 0); ++ locomo_gpio_set_dir(dev->dev.parent, LOCOMO_GPIO_CARD_DETECT, 1); ++ locomo_gpio_set_dir(dev->dev.parent, LOCOMO_GPIO_WRITE_PROT, 1); ++ ++ result=driver_create_file(&locomo_spi_driver.drv, &driver_attr_cardpower); ++ if(result){ ++ dev_err(&dev->dev, "error creating driver attribute\n"); ++ goto region; ++ } ++ result=driver_create_file(&locomo_spi_driver.drv, &driver_attr_carddetect); ++ if(result){ ++ dev_err(&dev->dev,"error creating driver attribute\n"); ++ goto region; ++ } ++ result=driver_create_file(&locomo_spi_driver.drv, &driver_attr_cardwriteprotect); ++ if(result){ ++ dev_err(&dev->dev, "error creating driver attribute\n"); ++ goto region; ++ } ++ result=driver_create_file(&locomo_spi_driver.drv, &driver_attr_spimd); ++ if(result){ ++ dev_err(&dev->dev, "error creating driver attribute\n"); ++ goto region; ++ } ++ result=driver_create_file(&locomo_spi_driver.drv, &driver_attr_spict); ++ if(result){ ++ dev_err(&dev->dev, "error creating driver attribute\n"); ++ goto region; ++ } ++ result=driver_create_file(&locomo_spi_driver.drv, &driver_attr_spist); ++ if(result){ ++ dev_err(&dev->dev, "error creating driver attribute\n"); ++ goto region; ++ } ++ result=driver_create_file(&locomo_spi_driver.drv, &driver_attr_spitd); ++ if(result){ ++ dev_err(&dev->dev, "error creating driver attribute\n"); ++ goto region; ++ } ++ result=driver_create_file(&locomo_spi_driver.drv, &driver_attr_spird); ++ if(result){ ++ dev_err(&dev->dev, "error creating driver attribute\n"); ++ goto region; ++ } ++ result=driver_create_file(&locomo_spi_driver.drv, &driver_attr_spits); ++ if(result){ ++ dev_err(&dev->dev, "error creating driver attribute\n"); ++ goto region; ++ } ++ result=driver_create_file(&locomo_spi_driver.drv, &driver_attr_spirs); ++ if(result){ ++ dev_err(&dev->dev, "error creating driver attribute\n"); ++ goto region; ++ } ++ result=driver_create_file(&locomo_spi_driver.drv, &driver_attr_clock); ++ if(result){ ++ dev_err(&dev->dev, "error creating driver attribute\n"); ++ goto region; ++ } ++ result=driver_create_file(&locomo_spi_driver.drv, &driver_attr_delay); ++ if(result){ ++ dev_err(&dev->dev, "error creating driver attribute\n"); ++ goto region; ++ } ++ result=driver_create_file(&locomo_spi_driver.drv, &driver_attr_reset); ++ if(result){ ++ dev_err(&dev->dev, "error creating driver attribute\n"); ++ goto region; ++ } ++ result=driver_create_file(&locomo_spi_driver.drv, &driver_attr_regs); ++ if(result){ ++ dev_err(&dev->dev, "error creating driver attribute\n"); ++ goto region; ++ } ++ INIT_WORK(&transfer_wq, locomospi_do_transfer); ++ INIT_LIST_HEAD(&spidev->message_list); ++ spin_lock_init(&spidev->message_lock); ++ init_waitqueue_head(&spidev->waitqueue); ++ spidev->master=spi_alloc_master(&dev->dev,0); ++ if(!spidev->master){ ++ result=-ENOMEM; ++ goto region; ++ } ++ spidev->master->bus_num = 0; ++ spidev->master->num_chipselect = 1; ++ spidev->master->setup = locomospi_setup; ++ spidev->master->transfer = locomospi_transfer; ++ spidev->sdev = spi_new_device(spidev->master, &board); ++ if(!spidev->sdev){ ++ dev_err(&dev->dev, "failed to register spi device\n"); ++ result = -EINVAL; ++ goto master; ++ } ++/* result=request_irq(IRQ_LOCOMO_SPI_RFR, locomospi_testisr, IRQF_SHARED, "locomo-spi", (void*) spidev); ++ if(result) { ++ dev_err(&dev->dev, "Could not get IRQ: RFR\n"); ++ goto regdev; ++ } ++ //disable_irq(IRQ_LOCOMO_SPI_RFR); ++*//* result=request_irq(IRQ_LOCOMO_SPI_RFW, locomospi_testisr, IRQF_SHARED, "locomo-spi", (void*) spidev); ++ if(result) { ++ dev_err(&dev->dev, "Could not get IRQ: RFW\n"); ++ goto irq1; ++ } ++ //disable_irq(IRQ_LOCOMO_SPI_RFW); ++*//* result=request_irq(IRQ_LOCOMO_SPI_REND, locomospi_testisr, IRQF_SHARED, "locomo-spi", (void*) spidev); ++ if(result) { ++ dev_err(&dev->dev, "Could not get IRQ: REND\n"); ++ goto irq2; ++ } ++*//* result=request_irq(IRQ_LOCOMO_SPI_TEND, locomospi_testisr, IRQF_SHARED, "locomo-spi", (void*) spidev); ++ if(result) { ++ dev_err(&dev->dev, "Could not get IRQ: TEND\n"); ++ goto irq3; ++ } ++ //disable_irq(IRQ_LOCOMO_SPI_TEND); ++*/ spidev->workqueue = create_singlethread_workqueue("locomo-spi"); ++ if(!spidev->workqueue){ ++ dev_err(&dev->dev, "failed to create workqueue\n"); ++ goto irq4; ++ } ++ result=spi_register_master(spidev->master); ++ if(result){ ++ dev_err(&dev->dev, "failed to register spimaster\n"); ++ goto wq; ++ } ++ return 0; ++wq: ++ destroy_workqueue(spidev->workqueue); ++irq4: ++// free_irq(IRQ_LOCOMO_SPI_TEND, (void*) spidev); ++irq3: ++// free_irq(IRQ_LOCOMO_SPI_REND, (void*) spidev); ++irq2: ++// free_irq(IRQ_LOCOMO_SPI_RFW, (void*) spidev); ++irq1: ++// free_irq(IRQ_LOCOMO_SPI_RFR, (void*) spidev); ++regdev: ++ spi_unregister_device(spidev->sdev); ++master: ++ spi_master_put(spidev->master); ++region: ++ release_mem_region((unsigned long) dev->mapbase, dev->length); ++ kfree(spidev); ++ return result; ++ ++} ++ ++static int locomospi_remove(struct locomo_dev *dev) ++{ ++ spi_unregister_device(spidev->sdev); ++ spi_unregister_master(spidev->master); ++ destroy_workqueue(spidev->workqueue); ++ locomospi_reg_release(); ++// free_irq(IRQ_LOCOMO_SPI_TEND, (void*) spidev); ++// free_irq(IRQ_LOCOMO_SPI_REND, (void*) spidev); ++// free_irq(IRQ_LOCOMO_SPI_RFW, (void*) spidev); ++// free_irq(IRQ_LOCOMO_SPI_RFR, (void*) spidev); ++ spi_master_put(spidev->master); ++ release_mem_region((unsigned long) dev->mapbase, dev->length); ++ kfree(spidev); ++ return 0; ++} ++ ++ ++ ++static int __init locomospi_init(void) ++{ ++ int ret = locomo_driver_register(&locomo_spi_driver); ++ if (ret) ++ return ret; ++ ++ ++ return 0; ++} ++ ++static void __exit locomospi_exit(void) ++{ ++ locomo_driver_unregister(&locomo_spi_driver); ++} ++ ++module_init(locomospi_init); ++module_exit(locomospi_exit); ++ ++MODULE_AUTHOR("Thomas Kunze thommy@tabao.de"); ++MODULE_DESCRIPTION("Collie mmc driver"); ++MODULE_LICENSE("GPL"); +diff --git a/drivers/spi/locomo_spi.h b/drivers/spi/locomo_spi.h +new file mode 100644 +index 0000000..7e1c0ce +--- /dev/null ++++ b/drivers/spi/locomo_spi.h +@@ -0,0 +1,75 @@ ++#include <asm/hardware/locomo.h> ++#ifndef __LOCOMO_SPI_H__ ++#define __LOCOMO_SPI_H__ ++ ++/* locomo-spi status register LOCOMO_SPIST */ ++#define LOCOMO_SPI_TEND (1 << 3) /* Transfer end bit */ ++#define LOCOMO_SPI_REND (1 << 2) /* Receive end bit */ ++#define LOCOMO_SPI_RFW (1 << 1) /* write buffer bit */ ++#define LOCOMO_SPI_RFR (1) /* read buffer bit */ ++ ++/* locomo-spi mode register LOCOMO_SPIMD */ ++#define LOCOMO_SPI_LOOPBACK (1 << 15) /* loopback tx to rx */ ++#define LOCOMO_SPI_MSB1ST (1 << 14) /* send MSB first */ ++#define LOCOMO_SPI_DOSTAT (1 << 13) /* transmit line is idle high */ ++#define LOCOMO_SPI_TCPOL (1 << 11) /* transmit CPOL (maybe affects CPHA too) */ ++#define LOCOMO_SPI_RCPOL (1 << 10) /* receive CPOL (maybe affects CPHA too) */ ++#define LOCOMO_SPI_TDINV (1 << 9) /* invert transmit line */ ++#define LOCOMO_SPI_RDINV (1 << 8) /* invert receive line */ ++#define LOCOMO_SPI_XON (1 << 7) /* enable spi controller clock */ ++#define LOCOMO_SPI_XEN (1 << 6) /* clock bit write enable xon must be off, wait 300 us before xon->1 */ ++#define LOCOMO_SPI_XSEL 0x0018 /* clock select */ ++#define CLOCK_18MHZ 0 /* 18,432 MHz clock */ ++#define CLOCK_22MHZ 1 /* 22,5792 MHz clock */ ++#define CLOCK_25MHZ 2 /* 24,576 MHz clock */ ++#define LOCOMO_SPI_CLKSEL 0x7 ++#define DIV_1 0 /* don't divide clock */ ++#define DIV_2 1 /* divide clock by two */ ++#define DIV_4 2 /* divide clock by four */ ++#define DIV_8 3 /* divide clock by eight*/ ++#define DIV_64 4 /* divide clock by 64 */ ++ ++/* locomo-spi control register LOCOMO_SPICT */ ++#define LOCOMO_SPI_CRC16_7_B (1 << 15) /* 0: crc16 1: crc7 */ ++#define LOCOMO_SPI_CRCRX_TX_B (1 << 14) ++#define LOCOMO_SPI_CRCRESET_B (1 << 13) ++#define LOCOMO_SPI_CEN (1 << 7) /* ?? enable */ ++#define LOCOMO_SPI_CS (1 << 6) /* chip select */ ++#define LOCOMO_SPI_UNIT16 (1 << 5) /* 0: 8 bit units, 1: 16 bit unit */ ++#define LOCOMO_SPI_ALIGNEN (1 << 2) /* align transfer enable */ ++#define LOCOMO_SPI_RXWEN (1 << 1) /* continous receive */ ++#define LOCOMO_SPI_RXUEN (1 << 0) /* aligned receive */ ++ ++#define IRQ_LOCOMO_CARDDETECT IRQ_LOCOMO_GPIO13 ++ ++ ++struct locomospi_dev { ++ struct locomo_dev *ldev; ++ struct spi_master *master; ++ struct spi_device *sdev; ++ int card_power; ++ int clock_base; ++ int clock_div; ++ int clock; ++ unsigned long base; ++ u8 spimode; ++ wait_queue_head_t waitqueue; ++ struct workqueue_struct *workqueue; ++ struct list_head message_list; ++ spinlock_t message_lock; ++}; ++ ++ ++static irqreturn_t locomospi_cardisr(int, void*); ++static int locomospi_probe(struct locomo_dev*); ++static int locomospi_remove(struct locomo_dev*); ++static int locomospi_carddetect(void); ++static void locomospi_reg_open(void); ++static void locomospi_reg_release(void); ++static int tx(const char*, int); ++static int rx(char *, int); ++static void locomospi_power(int on); ++static int locomospi_suspend(struct locomo_dev *dev, pm_message_t state); ++static int locomospi_resume(struct locomo_dev *dev); ++static void locomospi_setcs(int high); ++#endif +-- +1.5.6.5 + diff --git a/packages/linux/linux-2.6.28/collie/0003-enable-cpufreq-for-collie.patch b/packages/linux/linux-2.6.28/collie/0003-enable-cpufreq-for-collie.patch new file mode 100644 index 0000000000..4ce284d52c --- /dev/null +++ b/packages/linux/linux-2.6.28/collie/0003-enable-cpufreq-for-collie.patch @@ -0,0 +1,25 @@ +From 41eabd493ccc241ccd52b77c576211759976972d Mon Sep 17 00:00:00 2001 +From: Thomas Kunze <thommycheck@gmx.de> +Date: Mon, 20 Oct 2008 17:33:29 +0200 +Subject: [PATCH 03/23] enable cpufreq for collie + +--- + arch/arm/Kconfig | 2 +- + 1 files changed, 1 insertions(+), 1 deletions(-) + +diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig +index 9722f8b..609f0fb 100644 +--- a/arch/arm/Kconfig ++++ b/arch/arm/Kconfig +@@ -1048,7 +1048,7 @@ config CPU_FREQ_SA1100 + + config CPU_FREQ_SA1110 + bool +- depends on CPU_FREQ && (SA1100_ASSABET || SA1100_CERF || SA1100_PT_SYSTEM3) ++ depends on CPU_FREQ && (SA1100_ASSABET || SA1100_CERF || SA1100_PT_SYSTEM3 || SA1100_COLLIE) + default y + + config CPU_FREQ_INTEGRATOR +-- +1.5.6.5 + diff --git a/packages/linux/linux-2.6.28/collie/0004-fix-dma-for-SA1100.patch b/packages/linux/linux-2.6.28/collie/0004-fix-dma-for-SA1100.patch new file mode 100644 index 0000000000..6dbb856189 --- /dev/null +++ b/packages/linux/linux-2.6.28/collie/0004-fix-dma-for-SA1100.patch @@ -0,0 +1,25 @@ +From 4f4df9e1c0c82cfd9133f52089025a8ff363977c Mon Sep 17 00:00:00 2001 +From: Thomas Kunze <thommycheck@gmx.de> +Date: Mon, 20 Oct 2008 17:39:02 +0200 +Subject: [PATCH 04/23] fix dma for SA1100 + +--- + arch/arm/mach-sa1100/dma.c | 2 +- + 1 files changed, 1 insertions(+), 1 deletions(-) + +diff --git a/arch/arm/mach-sa1100/dma.c b/arch/arm/mach-sa1100/dma.c +index f990a3e..1489d64 100644 +--- a/arch/arm/mach-sa1100/dma.c ++++ b/arch/arm/mach-sa1100/dma.c +@@ -39,7 +39,7 @@ typedef struct { + + static sa1100_dma_t dma_chan[SA1100_DMA_CHANNELS]; + +-static spinlock_t dma_list_lock; ++static DEFINE_SPINLOCK(dma_list_lock); + + + static irqreturn_t dma_irq_handler(int irq, void *dev_id) +-- +1.5.6.5 + diff --git a/packages/linux/linux-2.6.28/collie/0005-fix-collie-keyboard-bug.patch b/packages/linux/linux-2.6.28/collie/0005-fix-collie-keyboard-bug.patch new file mode 100644 index 0000000000..1200038de4 --- /dev/null +++ b/packages/linux/linux-2.6.28/collie/0005-fix-collie-keyboard-bug.patch @@ -0,0 +1,24 @@ +From 71f6a1b91e92c89f3fcf0330c55ad41fd3315c33 Mon Sep 17 00:00:00 2001 +From: Thomas Kunze <thommycheck@gmx.de> +Date: Mon, 20 Oct 2008 17:40:32 +0200 +Subject: [PATCH 05/23] fix collie keyboard bug + +--- + drivers/input/keyboard/locomokbd.c | 1 + + 1 files changed, 1 insertions(+), 0 deletions(-) + +diff --git a/drivers/input/keyboard/locomokbd.c b/drivers/input/keyboard/locomokbd.c +index 9caed30..79e19bf 100644 +--- a/drivers/input/keyboard/locomokbd.c ++++ b/drivers/input/keyboard/locomokbd.c +@@ -265,6 +265,7 @@ static int __devinit locomokbd_probe(struct locomo_dev *dev) + for (i = 0; i < LOCOMOKBD_NUMKEYS; i++) + set_bit(locomokbd->keycode[i], input_dev->keybit); + clear_bit(0, input_dev->keybit); ++ locomo_writel(0, locomokbd->base + LOCOMO_KSC); + + /* attempt to get the interrupt */ + err = request_irq(dev->irq[0], locomokbd_interrupt, 0, "locomokbd", locomokbd); +-- +1.5.6.5 + diff --git a/packages/linux/linux-2.6.28/collie/0006-add-collie-flash-hack.patch b/packages/linux/linux-2.6.28/collie/0006-add-collie-flash-hack.patch new file mode 100644 index 0000000000..0b987b6851 --- /dev/null +++ b/packages/linux/linux-2.6.28/collie/0006-add-collie-flash-hack.patch @@ -0,0 +1,722 @@ +From 6b663bce31fb1e1a78dbca22190e98251628fd4f Mon Sep 17 00:00:00 2001 +From: Thomas Kunze <thommycheck@gmx.de> +Date: Mon, 20 Oct 2008 17:48:10 +0200 +Subject: [PATCH 06/23] add collie flash hack + +--- + arch/arm/mach-sa1100/collie.c | 2 +- + drivers/mtd/chips/Kconfig | 8 + + drivers/mtd/chips/Makefile | 1 + + drivers/mtd/chips/sharp.c | 645 +++++++++++++++++++++++++++++++++++++++++ + drivers/mtd/maps/Kconfig | 2 +- + 5 files changed, 656 insertions(+), 2 deletions(-) + create mode 100644 drivers/mtd/chips/sharp.c + +diff --git a/arch/arm/mach-sa1100/collie.c b/arch/arm/mach-sa1100/collie.c +index 8cf267f..ec673b8 100644 +--- a/arch/arm/mach-sa1100/collie.c ++++ b/arch/arm/mach-sa1100/collie.c +@@ -222,7 +222,7 @@ static void collie_flash_exit(void) + gpio_free(COLLIE_GPIO_VPEN); + } + static struct flash_platform_data collie_flash_data = { +- .map_name = "cfi_probe", ++ .map_name = "sharp", + .init = collie_flash_init, + .set_vpp = collie_set_vpp, + .exit = collie_flash_exit, +diff --git a/drivers/mtd/chips/Kconfig b/drivers/mtd/chips/Kconfig +index 9408099..2dcbd03 100644 +--- a/drivers/mtd/chips/Kconfig ++++ b/drivers/mtd/chips/Kconfig +@@ -241,5 +241,13 @@ config MTD_XIP + used for XIP purposes. If you're not sure what this is all about + then say N. + ++config MTD_SHARP ++ tristate "pre-CFI Sharp chip support" ++ depends on MTD ++ help ++ This option enables support for flash chips using Sharp-compatible ++ commands, including some which are not CFI-compatible and hence ++ cannot be used with the CONFIG_MTD_CFI_INTELxxx options. ++ + endmenu + +diff --git a/drivers/mtd/chips/Makefile b/drivers/mtd/chips/Makefile +index 3658241..7283c57 100644 +--- a/drivers/mtd/chips/Makefile ++++ b/drivers/mtd/chips/Makefile +@@ -12,4 +12,5 @@ obj-$(CONFIG_MTD_GEN_PROBE) += gen_probe.o + obj-$(CONFIG_MTD_JEDECPROBE) += jedec_probe.o + obj-$(CONFIG_MTD_RAM) += map_ram.o + obj-$(CONFIG_MTD_ROM) += map_rom.o ++obj-$(CONFIG_MTD_SHARP) += sharp.o + obj-$(CONFIG_MTD_ABSENT) += map_absent.o +diff --git a/drivers/mtd/chips/sharp.c b/drivers/mtd/chips/sharp.c +new file mode 100644 +index 0000000..046b964 +--- /dev/null ++++ b/drivers/mtd/chips/sharp.c +@@ -0,0 +1,645 @@ ++/* ++ * MTD chip driver for pre-CFI Sharp flash chips ++ * ++ * Copyright 2000,2001 David A. Schleef <ds@schleef.org> ++ * 2000,2001 Lineo, Inc. ++ * ++ * $Id: sharp.c,v 1.17 2005/11/29 14:28:28 gleixner Exp $ ++ * ++ * Devices supported: ++ * LH28F016SCT Symmetrical block flash memory, 2Mx8 ++ * LH28F008SCT Symmetrical block flash memory, 1Mx8 ++ * ++ * Documentation: ++ * http://www.sharpmeg.com/datasheets/memic/flashcmp/ ++ * http://www.sharpmeg.com/datasheets/memic/flashcmp/01symf/16m/016sctl9.pdf ++ * 016sctl9.pdf ++ * ++ * Limitations: ++ * This driver only supports 4x1 arrangement of chips. ++ * Not tested on anything but PowerPC. ++ */ ++ ++#include <linux/kernel.h> ++#include <linux/module.h> ++#include <linux/types.h> ++#include <linux/sched.h> ++#include <linux/errno.h> ++#include <linux/init.h> ++#include <linux/interrupt.h> ++#include <linux/mtd/map.h> ++#include <linux/mtd/mtd.h> ++#include <linux/mtd/cfi.h> ++#include <linux/delay.h> ++#include <linux/init.h> ++ ++#define CMD_RESET 0xffffffff ++#define CMD_READ_ID 0x90909090 ++#define CMD_READ_STATUS 0x70707070 ++#define CMD_CLEAR_STATUS 0x50505050 ++#define CMD_BLOCK_ERASE_1 0x20202020 ++#define CMD_BLOCK_ERASE_2 0xd0d0d0d0 ++#define CMD_BYTE_WRITE 0x40404040 ++#define CMD_SUSPEND 0xb0b0b0b0 ++#define CMD_RESUME 0xd0d0d0d0 ++#define CMD_SET_BLOCK_LOCK_1 0x60606060 ++#define CMD_SET_BLOCK_LOCK_2 0x01010101 ++#define CMD_SET_MASTER_LOCK_1 0x60606060 ++#define CMD_SET_MASTER_LOCK_2 0xf1f1f1f1 ++#define CMD_CLEAR_BLOCK_LOCKS_1 0x60606060 ++#define CMD_CLEAR_BLOCK_LOCKS_2 0xd0d0d0d0 ++ ++#define SR_READY 0x80808080 // 1 = ready ++#define SR_ERASE_SUSPEND 0x40404040 // 1 = block erase suspended ++#define SR_ERROR_ERASE 0x20202020 // 1 = error in block erase or clear lock bits ++#define SR_ERROR_WRITE 0x10101010 // 1 = error in byte write or set lock bit ++#define SR_VPP 0x08080808 // 1 = Vpp is low ++#define SR_WRITE_SUSPEND 0x04040404 // 1 = byte write suspended ++#define SR_PROTECT 0x02020202 // 1 = lock bit set ++#define SR_RESERVED 0x01010101 ++ ++#define SR_ERRORS (SR_ERROR_ERASE|SR_ERROR_WRITE|SR_VPP|SR_PROTECT) ++ ++#define BLOCK_MASK 0xfffe0000 ++ ++/* Configuration options */ ++ ++#define AUTOUNLOCK /* automatically unlocks blocks before erasing */ ++ ++static struct mtd_info *sharp_probe(struct map_info *); ++ ++static int sharp_probe_map(struct map_info *map, struct mtd_info *mtd); ++ ++static int sharp_read(struct mtd_info *mtd, loff_t from, size_t len, ++ size_t *retlen, u_char *buf); ++static int sharp_write(struct mtd_info *mtd, loff_t from, size_t len, ++ size_t *retlen, const u_char *buf); ++static int sharp_erase(struct mtd_info *mtd, struct erase_info *instr); ++static void sharp_sync(struct mtd_info *mtd); ++static int sharp_suspend(struct mtd_info *mtd); ++static void sharp_resume(struct mtd_info *mtd); ++static void sharp_destroy(struct mtd_info *mtd); ++ ++static int sharp_write_oneword(struct map_info *map, struct flchip *chip, ++ unsigned long adr, __u32 datum); ++static int sharp_erase_oneblock(struct map_info *map, struct flchip *chip, ++ unsigned long adr); ++#ifdef AUTOUNLOCK ++static inline void sharp_unlock_oneblock(struct map_info *map, struct flchip *chip, ++ unsigned long adr); ++#endif ++ ++ ++struct sharp_info{ ++ struct flchip *chip; ++ int bogus; ++ int chipshift; ++ int numchips; ++ struct flchip chips[1]; ++}; ++ ++static void sharp_destroy(struct mtd_info *mtd); ++ ++static struct mtd_chip_driver sharp_chipdrv = { ++ .probe = sharp_probe, ++ .destroy = sharp_destroy, ++ .name = "sharp", ++ .module = THIS_MODULE ++}; ++ ++static void sharp_udelay(unsigned long i) { ++ if (in_interrupt()) { ++ udelay(i); ++ } else { ++ schedule(); ++ } ++} ++ ++static struct mtd_info *sharp_probe(struct map_info *map) ++{ ++ struct mtd_info *mtd = NULL; ++ struct sharp_info *sharp = NULL; ++ int width; ++ ++ mtd = kzalloc(sizeof(*mtd), GFP_KERNEL); ++ if(!mtd) ++ return NULL; ++ ++ sharp = kzalloc(sizeof(*sharp), GFP_KERNEL); ++ if(!sharp) { ++ kfree(mtd); ++ return NULL; ++ } ++ ++ width = sharp_probe_map(map,mtd); ++ if(!width){ ++ kfree(mtd); ++ kfree(sharp); ++ return NULL; ++ } ++ ++ mtd->priv = map; ++ mtd->type = MTD_NORFLASH; ++ mtd->erase = sharp_erase; ++ mtd->read = sharp_read; ++ mtd->write = sharp_write; ++ mtd->sync = sharp_sync; ++ mtd->suspend = sharp_suspend; ++ mtd->resume = sharp_resume; ++ mtd->flags = MTD_CAP_NORFLASH; ++ mtd->writesize = 1; ++ mtd->name = map->name; ++ ++ sharp->chipshift = 24; ++ sharp->numchips = 1; ++ sharp->chips[0].start = 0; ++ sharp->chips[0].state = FL_READY; ++ sharp->chips[0].mutex = &sharp->chips[0]._spinlock; ++ sharp->chips[0].word_write_time = 0; ++ init_waitqueue_head(&sharp->chips[0].wq); ++ spin_lock_init(&sharp->chips[0]._spinlock); ++ ++ map->fldrv = &sharp_chipdrv; ++ map->fldrv_priv = sharp; ++ ++ __module_get(THIS_MODULE); ++ return mtd; ++} ++ ++static inline void sharp_send_cmd(struct map_info *map, unsigned long cmd, unsigned long adr) ++{ ++ map_word map_cmd; ++ map_cmd.x[0] = cmd; ++ map_write(map, map_cmd, adr); ++} ++ ++static int sharp_probe_map(struct map_info *map,struct mtd_info *mtd) ++{ ++ map_word tmp, read0, read4; ++ unsigned long base = 0; ++ int width = 4; ++ ++ tmp = map_read(map, base+0); ++ ++ sharp_send_cmd(map, CMD_READ_ID, base+0); ++ ++ read0 = map_read(map, base+0); ++ read4 = map_read(map, base+4); ++ if (read0.x[0] == 0x00b000b0) { ++ printk("Sharp chip, %lx, %lx, width = %d\n", read0.x[0], read4.x[0], width); ++ /* Prints b000b0, b000b0, width = 4 on collie */ ++ switch(read4.x[0]){ ++ case 0xaaaaaaaa: ++ case 0xa0a0a0a0: ++ /* aa - LH28F016SCT-L95 2Mx8, 32 64k blocks*/ ++ /* a0 - LH28F016SCT-Z4 2Mx8, 32 64k blocks*/ ++ mtd->erasesize = 0x10000 * width; ++ mtd->size = 0x200000 * width; ++ return width; ++ case 0xa6a6a6a6: ++ /* a6 - LH28F008SCT-L12 1Mx8, 16 64k blocks*/ ++ /* a6 - LH28F008SCR-L85 1Mx8, 16 64k blocks*/ ++ mtd->erasesize = 0x10000 * width; ++ mtd->size = 0x100000 * width; ++ return width; ++ case 0x00b000b0: ++ /* a6 - LH28F640BFHE 8 64k * 2 chip blocks*/ ++ mtd->erasesize = 0x10000 * width / 2; ++ mtd->size = 0x800000 * width / 2; ++ return width; ++ default: ++ printk("Sort-of looks like sharp flash, 0x%08lx 0x%08lx\n", ++ read0.x[0], read4.x[0]); ++ } ++ } else if ((map_read(map, base+0).x[0] == CMD_READ_ID)){ ++ /* RAM, probably */ ++ printk("Looks like RAM\n"); ++ map_write(map, tmp, base+0); ++ }else{ ++ printk("Doesn't look like sharp flash, 0x%08lx 0x%08lx\n", ++ read0.x[0], read4.x[0]); ++ } ++ ++ return 0; ++} ++ ++/* This function returns with the chip->mutex lock held. */ ++static int sharp_wait(struct map_info *map, struct flchip *chip) ++{ ++ map_word status; ++ unsigned long timeo = jiffies + HZ; ++ DECLARE_WAITQUEUE(wait, current); ++ int adr = 0; ++ ++retry: ++ spin_lock_bh(chip->mutex); ++ ++ switch (chip->state) { ++ case FL_READY: ++ sharp_send_cmd(map, CMD_READ_STATUS, adr); ++ chip->state = FL_STATUS; ++ case FL_STATUS: ++ status = map_read(map, adr); ++ if ((status.x[0] & SR_READY) == SR_READY) ++ break; ++ spin_unlock_bh(chip->mutex); ++ if (time_after(jiffies, timeo)) { ++ printk("Waiting for chip to be ready timed out in erase\n"); ++ return -EIO; ++ } ++ sharp_udelay(1); ++ goto retry; ++ default: ++ set_current_state(TASK_INTERRUPTIBLE); ++ add_wait_queue(&chip->wq, &wait); ++ ++ spin_unlock_bh(chip->mutex); ++ ++ sharp_udelay(1); ++ ++ set_current_state(TASK_RUNNING); ++ remove_wait_queue(&chip->wq, &wait); ++ ++ if(signal_pending(current)) ++ return -EINTR; ++ ++ timeo = jiffies + HZ; ++ ++ goto retry; ++ } ++ ++ sharp_send_cmd(map, CMD_RESET, adr); ++ ++ chip->state = FL_READY; ++ ++ return 0; ++} ++ ++static void sharp_release(struct flchip *chip) ++{ ++ wake_up(&chip->wq); ++ spin_unlock_bh(chip->mutex); ++} ++ ++static int sharp_read(struct mtd_info *mtd, loff_t from, size_t len, ++ size_t *retlen, u_char *buf) ++{ ++ struct map_info *map = mtd->priv; ++ struct sharp_info *sharp = map->fldrv_priv; ++ int chipnum; ++ int ret = 0; ++ int ofs = 0; ++ ++ chipnum = (from >> sharp->chipshift); ++ ofs = from & ((1 << sharp->chipshift)-1); ++ ++ *retlen = 0; ++ ++ while(len){ ++ unsigned long thislen; ++ ++ if(chipnum>=sharp->numchips) ++ break; ++ ++ thislen = len; ++ if(ofs+thislen >= (1<<sharp->chipshift)) ++ thislen = (1<<sharp->chipshift) - ofs; ++ ++ ret = sharp_wait(map,&sharp->chips[chipnum]); ++ if(ret<0) ++ break; ++ ++ map_copy_from(map,buf,ofs,thislen); ++ ++ sharp_release(&sharp->chips[chipnum]); ++ ++ *retlen += thislen; ++ len -= thislen; ++ buf += thislen; ++ ++ ofs = 0; ++ chipnum++; ++ } ++ return ret; ++} ++ ++static int sharp_write(struct mtd_info *mtd, loff_t to, size_t len, ++ size_t *retlen, const u_char *buf) ++{ ++ struct map_info *map = mtd->priv; ++ struct sharp_info *sharp = map->fldrv_priv; ++ int ret = 0; ++ int i,j; ++ int chipnum; ++ unsigned long ofs; ++ union { u32 l; unsigned char uc[4]; } tbuf; ++ ++ *retlen = 0; ++ ++ while(len){ ++ tbuf.l = 0xffffffff; ++ chipnum = to >> sharp->chipshift; ++ ofs = to & ((1<<sharp->chipshift)-1); ++ ++ j=0; ++ for(i=ofs&3;i<4 && len;i++){ ++ tbuf.uc[i] = *buf; ++ buf++; ++ to++; ++ len--; ++ j++; ++ } ++ sharp_write_oneword(map, &sharp->chips[chipnum], ofs&~3, tbuf.l); ++ if(ret<0) ++ return ret; ++ (*retlen)+=j; ++ } ++ ++ return 0; ++} ++ ++static int sharp_write_oneword(struct map_info *map, struct flchip *chip, ++ unsigned long adr, __u32 datum) ++{ ++ int ret; ++ int try; ++ int i; ++ map_word data, status; ++ ++ status.x[0] = 0; ++ ret = sharp_wait(map,chip); ++ if (ret < 0) ++ return ret; ++ ++ for (try=0; try<10; try++) { ++ long timeo; ++ ++ sharp_send_cmd(map, CMD_BYTE_WRITE, adr); ++ /* cpu_to_le32 -> hack to fix the writel be->le conversion */ ++ data.x[0] = cpu_to_le32(datum); ++ map_write(map, data, adr); ++ ++ chip->state = FL_WRITING; ++ timeo = jiffies + (HZ/2); ++ ++ sharp_send_cmd(map, CMD_READ_STATUS, adr); ++ for(i=0;i<100;i++){ ++ status = map_read(map, adr); ++ if((status.x[0] & SR_READY) == SR_READY) ++ break; ++ } ++#ifdef AUTOUNLOCK ++ if (status.x[0] & SR_PROTECT) { /* lock block */ ++ sharp_send_cmd(map, CMD_CLEAR_STATUS, adr); ++ sharp_unlock_oneblock(map,chip,adr); ++ sharp_send_cmd(map, CMD_CLEAR_STATUS, adr); ++ sharp_send_cmd(map, CMD_RESET, adr); ++ continue; ++ } ++#endif ++ if(i==100){ ++ printk("sharp: timed out writing\n"); ++ } ++ ++ if (!(status.x[0] & SR_ERRORS)) ++ break; ++ ++ printk("sharp: error writing byte at addr=%08lx status=%08lx\n", adr, status.x[0]); ++ ++ sharp_send_cmd(map, CMD_CLEAR_STATUS, adr); ++ } ++ sharp_send_cmd(map, CMD_RESET, adr); ++ chip->state = FL_READY; ++ ++ sharp_release(chip); ++ ++ return 0; ++} ++ ++static int sharp_erase(struct mtd_info *mtd, struct erase_info *instr) ++{ ++ struct map_info *map = mtd->priv; ++ struct sharp_info *sharp = map->fldrv_priv; ++ unsigned long adr,len; ++ int chipnum, ret=0; ++ ++ if(instr->addr & (mtd->erasesize - 1)) ++ return -EINVAL; ++ if(instr->len & (mtd->erasesize - 1)) ++ return -EINVAL; ++ if(instr->len + instr->addr > mtd->size) ++ return -EINVAL; ++ ++ chipnum = instr->addr >> sharp->chipshift; ++ adr = instr->addr & ((1<<sharp->chipshift)-1); ++ len = instr->len; ++ ++ while(len){ ++ ret = sharp_erase_oneblock(map, &sharp->chips[chipnum], adr); ++ if(ret)return ret; ++ ++ if (adr >= 0xfe0000) { ++ adr += mtd->erasesize / 8; ++ len -= mtd->erasesize / 8; ++ } else { ++ adr += mtd->erasesize; ++ len -= mtd->erasesize; ++ } ++ if(adr >> sharp->chipshift){ ++ adr = 0; ++ chipnum++; ++ if(chipnum>=sharp->numchips) ++ break; ++ } ++ } ++ ++ instr->state = MTD_ERASE_DONE; ++ mtd_erase_callback(instr); ++ ++ return 0; ++} ++ ++static inline int sharp_do_wait_for_ready(struct map_info *map, struct flchip *chip, ++ unsigned long adr) ++{ ++ int ret; ++ unsigned long timeo; ++ map_word status; ++ DECLARE_WAITQUEUE(wait, current); ++ ++ sharp_send_cmd(map, CMD_READ_STATUS, adr); ++ status = map_read(map, adr); ++ ++ timeo = jiffies + HZ * 10; ++ ++ while (time_before(jiffies, timeo)) { ++ sharp_send_cmd(map, CMD_READ_STATUS, adr); ++ status = map_read(map, adr); ++ if ((status.x[0] & SR_READY) == SR_READY) { ++ ret = 0; ++ goto out; ++ } ++ set_current_state(TASK_INTERRUPTIBLE); ++ add_wait_queue(&chip->wq, &wait); ++ ++ spin_unlock_bh(chip->mutex); ++ ++ schedule_timeout(1); ++ schedule(); ++ ++ spin_lock_bh(chip->mutex); ++ ++ remove_wait_queue(&chip->wq, &wait); ++ set_current_state(TASK_RUNNING); ++ } ++ ret = -ETIME; ++out: ++ return ret; ++} ++ ++static int sharp_erase_oneblock(struct map_info *map, struct flchip *chip, ++ unsigned long adr) ++{ ++ int ret; ++ map_word status; ++ ++ ret = sharp_wait(map,chip); ++ if (ret < 0) ++ return ret; ++ ++#ifdef AUTOUNLOCK ++ /* This seems like a good place to do an unlock */ ++ sharp_unlock_oneblock(map,chip,adr); ++#endif ++ ++ sharp_send_cmd(map, CMD_BLOCK_ERASE_1, adr); ++ sharp_send_cmd(map, CMD_BLOCK_ERASE_2, adr); ++ ++ chip->state = FL_ERASING; ++ ++ ret = sharp_do_wait_for_ready(map,chip,adr); ++ if(ret<0) { ++ spin_unlock_bh(chip->mutex); ++ return ret; ++ } ++ ++ sharp_send_cmd(map, CMD_READ_STATUS, adr); ++ status = map_read(map, adr); ++ ++ if (!(status.x[0] & SR_ERRORS)) { ++ sharp_send_cmd(map, CMD_RESET, adr); ++ chip->state = FL_READY; ++ spin_unlock_bh(chip->mutex); ++ return 0; ++ } ++ ++ printk("sharp: error erasing block at addr=%08lx status=%08lx\n", adr, status.x[0]); ++ sharp_send_cmd(map, CMD_CLEAR_STATUS, adr); ++ ++ sharp_release(chip); ++ ++ return -EIO; ++} ++ ++#ifdef AUTOUNLOCK ++static inline void sharp_unlock_oneblock(struct map_info *map, struct flchip *chip, ++ unsigned long adr) ++{ ++ map_word status; ++ ++ sharp_send_cmd(map, CMD_CLEAR_BLOCK_LOCKS_1, adr & BLOCK_MASK); ++ sharp_send_cmd(map, CMD_CLEAR_BLOCK_LOCKS_2, adr & BLOCK_MASK); ++ ++ sharp_do_wait_for_ready(map,chip,adr); ++ ++ status = map_read(map, adr); ++ ++ if (!(status.x[0] & SR_ERRORS)) { ++ sharp_send_cmd(map, CMD_RESET, adr); ++ chip->state = FL_READY; ++ return; ++ } ++ ++ printk("sharp: error unlocking block at addr=%08lx status=%08lx\n", adr, status.x[0]); ++ sharp_send_cmd(map, CMD_CLEAR_STATUS, adr); ++} ++#endif ++ ++static void sharp_sync(struct mtd_info *mtd) ++{ ++} ++ ++static int sharp_suspend(struct mtd_info *mtd) ++{ ++ struct map_info *map = mtd->priv; ++ struct sharp_info *sharp = map->fldrv_priv; ++ int i; ++ struct flchip *chip; ++ int ret = 0; ++ ++ for (i = 0; !ret && i < sharp->numchips; i++) { ++ chip = &sharp->chips[i]; ++ ret = sharp_wait(map,chip); ++ ++ if (ret) { ++ ret = -EAGAIN; ++ } else { ++ chip->state = FL_PM_SUSPENDED; ++ spin_unlock_bh(chip->mutex); ++ } ++ } ++ return ret; ++} ++ ++static void sharp_resume(struct mtd_info *mtd) ++{ ++ struct map_info *map = mtd->priv; ++ struct sharp_info *sharp = map->fldrv_priv; ++ int i; ++ struct flchip *chip; ++ ++ for (i = 0; i < sharp->numchips; i++) { ++ chip = &sharp->chips[i]; ++ ++ spin_lock_bh(chip->mutex); ++ ++ if (chip->state == FL_PM_SUSPENDED) { ++ /* We need to force it back to a known state */ ++ sharp_send_cmd(map, CMD_RESET, chip->start); ++ chip->state = FL_READY; ++ wake_up(&chip->wq); ++ } ++ ++ spin_unlock_bh(chip->mutex); ++ } ++} ++ ++static void sharp_destroy(struct mtd_info *mtd) ++{ ++ struct map_info *map = mtd->priv; ++ struct sharp_info *sharp = map->fldrv_priv; ++ ++ kfree(sharp); ++} ++ ++static int __init sharp_probe_init(void) ++{ ++ printk("MTD Sharp chip driver <ds@lineo.com>\n"); ++ ++ register_mtd_chip_driver(&sharp_chipdrv); ++ ++ return 0; ++} ++ ++static void __exit sharp_probe_exit(void) ++{ ++ unregister_mtd_chip_driver(&sharp_chipdrv); ++} ++ ++module_init(sharp_probe_init); ++module_exit(sharp_probe_exit); ++ ++ ++MODULE_LICENSE("GPL"); ++MODULE_AUTHOR("David Schleef <ds@schleef.org>"); ++MODULE_DESCRIPTION("Old MTD chip driver for pre-CFI Sharp flash chips"); +diff --git a/drivers/mtd/maps/Kconfig b/drivers/mtd/maps/Kconfig +index 5ea1693..d523464 100644 +--- a/drivers/mtd/maps/Kconfig ++++ b/drivers/mtd/maps/Kconfig +@@ -360,7 +360,7 @@ config MTD_CDB89712 + + config MTD_SA1100 + tristate "CFI Flash device mapped on StrongARM SA11x0" +- depends on MTD_CFI && ARCH_SA1100 && MTD_PARTITIONS ++ depends on (MTD_CFI || MTD_SHARP) && ARCH_SA1100 && MTD_PARTITIONS + help + This enables access to the flash chips on most platforms based on + the SA1100 and SA1110, including the Assabet and the Compaq iPAQ. +-- +1.5.6.5 + diff --git a/packages/linux/linux-2.6.28/collie/0007-hostap-workaround-for-buggy-sa1100-pcmcia-driver.patch b/packages/linux/linux-2.6.28/collie/0007-hostap-workaround-for-buggy-sa1100-pcmcia-driver.patch new file mode 100644 index 0000000000..230bd93476 --- /dev/null +++ b/packages/linux/linux-2.6.28/collie/0007-hostap-workaround-for-buggy-sa1100-pcmcia-driver.patch @@ -0,0 +1,107 @@ +From 8200a4430e1515bf4523e3651fa7c29fdebbb0fb Mon Sep 17 00:00:00 2001 +From: Thomas Kunze <thommycheck@gmx.de> +Date: Mon, 20 Oct 2008 17:50:06 +0200 +Subject: [PATCH 07/23] hostap workaround for buggy sa1100 pcmcia driver + +--- + drivers/net/wireless/hostap/hostap_cs.c | 6 ++++-- + drivers/net/wireless/hostap/hostap_hw.c | 14 ++++++++++++-- + drivers/net/wireless/hostap/hostap_pci.c | 1 + + drivers/net/wireless/hostap/hostap_plx.c | 2 +- + 4 files changed, 18 insertions(+), 5 deletions(-) + +diff --git a/drivers/net/wireless/hostap/hostap_cs.c b/drivers/net/wireless/hostap/hostap_cs.c +index 6337402..928cdf0 100644 +--- a/drivers/net/wireless/hostap/hostap_cs.c ++++ b/drivers/net/wireless/hostap/hostap_cs.c +@@ -35,7 +35,7 @@ static int ignore_cis_vcc; + module_param(ignore_cis_vcc, int, 0444); + MODULE_PARM_DESC(ignore_cis_vcc, "Ignore broken CIS VCC entry"); + +- ++int activar=0; + /* struct local_info::hw_priv */ + struct hostap_cs_priv { + dev_node_t node; +@@ -499,11 +499,13 @@ static int hostap_cs_probe(struct pcmcia_device *p_dev) + + PDEBUG(DEBUG_HW, "%s: setting Vcc=33 (constant)\n", dev_info); + p_dev->conf.IntType = INT_MEMORY_AND_IO; +- ++ ++ activar=0; + ret = prism2_config(p_dev); + if (ret) { + PDEBUG(DEBUG_EXTRA, "prism2_config() failed\n"); + } ++ activar=1; + + return ret; + } +diff --git a/drivers/net/wireless/hostap/hostap_hw.c b/drivers/net/wireless/hostap/hostap_hw.c +index 3153fe9..188eaee 100644 +--- a/drivers/net/wireless/hostap/hostap_hw.c ++++ b/drivers/net/wireless/hostap/hostap_hw.c +@@ -54,6 +54,7 @@ + #include "hostap.h" + #include "hostap_ap.h" + ++extern int activar; + + /* #define final_version */ + +@@ -1497,6 +1498,8 @@ static int prism2_hw_config(struct net_device *dev, int initial) + if (local->hw_downloading) + return 1; + ++ activar=1; ++ + if (prism2_hw_init(dev, initial)) { + return local->no_pri ? 0 : 1; + } +@@ -2628,8 +2631,15 @@ static irqreturn_t prism2_interrupt(int irq, void *dev_id) + int events = 0; + u16 ev; + +- iface = netdev_priv(dev); +- local = iface->local; ++ ++ // Todos los parametros de entrada son correctos (no son nulos). De momento esta es la unica forma que conozco de detectar el problema. ++ if (!activar) { ++ printk("hostap_hw.c: INTERRUPT BEFORE DEVICE INIT!\n"); ++ return IRQ_HANDLED; ++ } ++ ++ iface = netdev_priv(dev); ++ local = iface->local; + + prism2_io_debug_add(dev, PRISM2_IO_DEBUG_CMD_INTERRUPT, 0, 0); + +diff --git a/drivers/net/wireless/hostap/hostap_pci.c b/drivers/net/wireless/hostap/hostap_pci.c +index 3a874fc..df58aa3 100644 +--- a/drivers/net/wireless/hostap/hostap_pci.c ++++ b/drivers/net/wireless/hostap/hostap_pci.c +@@ -19,6 +19,7 @@ + + #include "hostap_wlan.h" + ++int activar=1; + + static char *dev_info = "hostap_pci"; + +diff --git a/drivers/net/wireless/hostap/hostap_plx.c b/drivers/net/wireless/hostap/hostap_plx.c +index cbf15d7..4475174 100644 +--- a/drivers/net/wireless/hostap/hostap_plx.c ++++ b/drivers/net/wireless/hostap/hostap_plx.c +@@ -21,7 +21,7 @@ + #include <asm/io.h> + + #include "hostap_wlan.h" +- ++int activar=1; + + static char *dev_info = "hostap_plx"; + +-- +1.5.6.5 + diff --git a/packages/linux/linux-2.6.28/collie/0008-fix-collie-suspend-hack.patch b/packages/linux/linux-2.6.28/collie/0008-fix-collie-suspend-hack.patch new file mode 100644 index 0000000000..19557f9e18 --- /dev/null +++ b/packages/linux/linux-2.6.28/collie/0008-fix-collie-suspend-hack.patch @@ -0,0 +1,70 @@ +From 8ebd75d9f4d7dcc74e18b46ed82070eec52deaa8 Mon Sep 17 00:00:00 2001 +From: Thomas Kunze <thommycheck@gmx.de> +Date: Mon, 20 Oct 2008 17:51:21 +0200 +Subject: [PATCH 08/23] fix collie suspend hack + +--- + drivers/pcmcia/pxa2xx_sharpsl.c | 2 +- + drivers/pcmcia/sa1100_generic.c | 19 ++++++++++--------- + 2 files changed, 11 insertions(+), 10 deletions(-) + +diff --git a/drivers/pcmcia/pxa2xx_sharpsl.c b/drivers/pcmcia/pxa2xx_sharpsl.c +index 1cd02f5..3724395 100644 +--- a/drivers/pcmcia/pxa2xx_sharpsl.c ++++ b/drivers/pcmcia/pxa2xx_sharpsl.c +@@ -222,7 +222,7 @@ static void sharpsl_pcmcia_socket_suspend(struct soc_pcmcia_socket *skt) + sharpsl_pcmcia_init_reset(skt); + } + +-static struct pcmcia_low_level sharpsl_pcmcia_ops __initdata = { ++static struct pcmcia_low_level sharpsl_pcmcia_ops = { + .owner = THIS_MODULE, + .hw_init = sharpsl_pcmcia_hw_init, + .hw_shutdown = sharpsl_pcmcia_hw_shutdown, +diff --git a/drivers/pcmcia/sa1100_generic.c b/drivers/pcmcia/sa1100_generic.c +index c5b2a44..eecbe8c 100644 +--- a/drivers/pcmcia/sa1100_generic.c ++++ b/drivers/pcmcia/sa1100_generic.c +@@ -81,13 +81,14 @@ static int sa11x0_drv_pcmcia_probe(struct device *dev) + return ret; + } + +-static struct device_driver sa11x0_pcmcia_driver = { +- .probe = sa11x0_drv_pcmcia_probe, +- .remove = soc_common_drv_pcmcia_remove, +- .name = "sa11x0-pcmcia", +- .bus = &platform_bus_type, +- .suspend = pcmcia_socket_dev_suspend, +- .resume = pcmcia_socket_dev_resume, ++static struct platform_driver sa11x0_pcmcia_driver = { ++ .driver = { ++ .name = "sa11x0-pcmcia", ++ .probe = sa11x0_drv_pcmcia_probe, ++ .remove = soc_common_drv_pcmcia_remove, ++ .suspend= pcmcia_socket_dev_suspend, ++ .resume = pcmcia_socket_dev_resume, ++ }, + }; + + /* sa11x0_pcmcia_init() +@@ -100,7 +101,7 @@ static struct device_driver sa11x0_pcmcia_driver = { + */ + static int __init sa11x0_pcmcia_init(void) + { +- return driver_register(&sa11x0_pcmcia_driver); ++ return platform_driver_register(&sa11x0_pcmcia_driver); + } + + /* sa11x0_pcmcia_exit() +@@ -110,7 +111,7 @@ static int __init sa11x0_pcmcia_init(void) + */ + static void __exit sa11x0_pcmcia_exit(void) + { +- driver_unregister(&sa11x0_pcmcia_driver); ++ platform_driver_unregister(&sa11x0_pcmcia_driver); + } + + MODULE_AUTHOR("John Dorsey <john+@cs.cmu.edu>"); +-- +1.5.6.5 + diff --git a/packages/linux/linux-2.6.28/collie/0009-add-sa1100-usb-gadget-driver-hack.patch b/packages/linux/linux-2.6.28/collie/0009-add-sa1100-usb-gadget-driver-hack.patch new file mode 100644 index 0000000000..bb8dd5cd63 --- /dev/null +++ b/packages/linux/linux-2.6.28/collie/0009-add-sa1100-usb-gadget-driver-hack.patch @@ -0,0 +1,2629 @@ +From 923ac0a48c2a064e4639b0fa53dbd0a18d87043e Mon Sep 17 00:00:00 2001 +From: Thomas Kunze <thommycheck@gmx.de> +Date: Tue, 10 Feb 2009 18:09:03 +0100 +Subject: [PATCH 09/23] add sa1100 usb gadget driver hack + +Conflicts: + + drivers/usb/gadget/Makefile +--- + arch/arm/mach-sa1100/include/mach/collie.h | 5 +- + drivers/usb/gadget/Kconfig | 14 + + drivers/usb/gadget/Makefile | 1 + + drivers/usb/gadget/sa1100_udc.c | 2447 ++++++++++++++++++++++++++++ + drivers/usb/gadget/sa1100_udc.h | 94 ++ + 5 files changed, 2558 insertions(+), 3 deletions(-) + create mode 100644 drivers/usb/gadget/sa1100_udc.c + create mode 100644 drivers/usb/gadget/sa1100_udc.h + +diff --git a/arch/arm/mach-sa1100/include/mach/collie.h b/arch/arm/mach-sa1100/include/mach/collie.h +index 9bc5349..799c930 100644 +--- a/arch/arm/mach-sa1100/include/mach/collie.h ++++ b/arch/arm/mach-sa1100/include/mach/collie.h +@@ -23,11 +23,10 @@ + #define COLLIE_SCP_5VON SCOOP_GPCR_PA16 + #define COLLIE_SCP_AMP_ON SCOOP_GPCR_PA17 + #define COLLIE_GPIO_VPEN (COLLIE_SCOOP_GPIO_BASE + 7) +-#define COLLIE_SCP_LB_VOL_CHG SCOOP_GPCR_PA19 ++#define COLLIE_GPIO_LB_VOL_CHG (COLLIE_SCOOP_GPIO_BASE + 8) + + #define COLLIE_SCOOP_IO_DIR ( COLLIE_SCP_CHARGE_ON | COLLIE_SCP_MUTE_L | COLLIE_SCP_MUTE_R | \ +- COLLIE_SCP_5VON | COLLIE_SCP_AMP_ON | \ +- COLLIE_SCP_LB_VOL_CHG ) ++ COLLIE_SCP_5VON | COLLIE_SCP_AMP_ON ) + #define COLLIE_SCOOP_IO_OUT ( COLLIE_SCP_MUTE_L | COLLIE_SCP_MUTE_R | \ + COLLIE_SCP_CHARGE_ON ) + +diff --git a/drivers/usb/gadget/Kconfig b/drivers/usb/gadget/Kconfig +index dd4cd5a..efb65ac 100644 +--- a/drivers/usb/gadget/Kconfig ++++ b/drivers/usb/gadget/Kconfig +@@ -419,6 +419,20 @@ config USB_GOKU + default USB_GADGET + select USB_GADGET_SELECTED + ++config USB_GADGET_SA1100 ++ boolean "SA1100 USB Device Port" ++ depends on ARCH_SA1100 ++ select USB_GADGET_SELECTED ++ help ++ ++ Say "y" to link the driver statically, or "m" to build a ++ dynamically linked module called "sa1100_udc" and force all ++ gadget drivers to also be dynamically linked. ++ ++config USB_SA1100 ++ tristate ++ depends on USB_GADGET_SA1100 ++ default USB_GADGET + + # + # LAST -- dummy/emulated controller +diff --git a/drivers/usb/gadget/Makefile b/drivers/usb/gadget/Makefile +index bd4041b..5cdd0ce 100644 +--- a/drivers/usb/gadget/Makefile ++++ b/drivers/usb/gadget/Makefile +@@ -19,6 +19,7 @@ obj-$(CONFIG_USB_ATMEL_USBA) += atmel_usba_udc.o + obj-$(CONFIG_USB_FSL_USB2) += fsl_usb2_udc.o + obj-$(CONFIG_USB_M66592) += m66592-udc.o + obj-$(CONFIG_USB_FSL_QE) += fsl_qe_udc.o ++obj-$(CONFIG_USB_SA1100) += sa1100_udc.o + + # + # USB gadget drivers +diff --git a/drivers/usb/gadget/sa1100_udc.c b/drivers/usb/gadget/sa1100_udc.c +new file mode 100644 +index 0000000..5e26a6d +--- /dev/null ++++ b/drivers/usb/gadget/sa1100_udc.c +@@ -0,0 +1,2447 @@ ++/* ++ * SA1100 USB Device Controller (UDC) driver. ++ * ++ * Copyright (C) Compaq Computer Corporation, 1998, 1999 ++ * Copyright (C) Extenex Corporation, 2001 ++ * Copyright (C) David Brownell, 2003 ++ * Copyright (C) Nick Bane, 2005, 2006, 2007 ++ * Many fragments from pxa2xx_udc.c and mach-sa1100 driver with various ++ * GPL Copyright authors incl Russel king and Nicolas Pitre ++ * Working port to 2.6.32-1 by N C Bane ++ * ++ * This file provides interrupt routing and overall coordination for the ++ * sa1100 USB endpoints: ep0, ep1out-bulk, ep2in-bulk, as well as device ++ * initialization and some parts of USB "Chapter 9" device behavior. ++ * ++ * It implements the "USB gadget controller" API, abstracting most hardware ++ * details so that drivers running on top of this API are mostly independent ++ * of hardware. A key exception is that ep0 logic needs to understand which ++ * endpoints a given controller has, and their capabilities. Also, hardware ++ * that doesn't fully support USB (like sa1100) may need workarounds in the ++ * protocols implemented by device functions. ++ * ++ * See linux/Documentation/arm/SA1100/SA1100_USB for more info, or the ++ * kerneldoc for the API exposed to gadget drivers. ++ * ++ */ ++//#define DEBUG 1 ++//#define VERBOSE 1 ++ ++//#define SA1100_USB_DEBUG ++#ifdef SA1100_USB_DEBUG ++static int sa1100_usb_debug=0; ++#endif ++ ++#define NCB_DMA_FIX ++#ifdef NCB_DMA_FIX ++// This is a clunky fix for dma alignemnt issues ++// It should probably be done better by someone more ++// steeped in DMA lore ++#include <linux/slab.h> ++#define SEND_BUFFER_SIZE 4096 /* this is probably a bit big */ ++#define RECEIVE_BUFFER_SIZE 256 /* 64 may be all that is necessary */ ++static char *send_buffer=NULL; ++static char *receive_buffer=NULL; ++#endif ++ ++#include <linux/module.h> ++#include <linux/kernel.h> ++#include <linux/delay.h> ++#include <linux/ioport.h> ++#include <linux/sched.h> ++#include <linux/slab.h> ++#include <linux/smp_lock.h> ++#include <linux/errno.h> ++#include <linux/init.h> ++#include <linux/timer.h> ++#include <linux/list.h> ++#include <linux/interrupt.h> ++#include <linux/version.h> ++#include <linux/device.h> ++#include <linux/platform_device.h> ++ ++#include <asm/byteorder.h> ++#include <asm/io.h> ++#include <asm/irq.h> ++#include <mach/dma.h> ++#include <asm/system.h> ++#include <asm/mach-types.h> ++#include <asm/unaligned.h> ++ ++#include <linux/usb.h> ++#include <linux/usb/ch9.h> ++#include <linux/usb/gadget.h> ++ ++#if CONFIG_PROC_FS ++#include <linux/proc_fs.h> ++#endif ++ ++#if defined(CONFIG_SA1100_BALLOON) ++#include <asm/arch/balloon2.h> ++#endif ++ ++#if defined(CONFIG_SA1100_COLLIE) ++#include <linux/gpio.h> ++#include <mach/collie.h> ++#endif ++ ++#define DRIVER_VERSION __DATE__ ++ ++#define DMA_ADDR_INVALID (~(dma_addr_t)0) ++ ++ ++static const char driver_name [] = "sa1100_udc"; ++static const char driver_desc [] = "SA-1110 USB Device Controller"; ++ ++static const char ep0name [] = "ep0"; ++ ++#ifdef DEBUG ++static char *type_string (u8 bmAttributes) ++{ ++ switch ( (bmAttributes) & USB_ENDPOINT_XFERTYPE_MASK) { ++ case USB_ENDPOINT_XFER_BULK: return "bulk"; ++ //case USB_ENDPOINT_XFER_ISOC: return "iso"; ++ case USB_ENDPOINT_XFER_INT: return "intr"; ++ }; ++ return "control"; ++} ++#endif ++ ++#include <linux/dma-mapping.h> ++struct usb_stats_t { ++ unsigned long ep0_fifo_write_failures; ++ unsigned long ep0_bytes_written; ++ unsigned long ep0_fifo_read_failures; ++ unsigned long ep0_bytes_read; ++}; ++ ++struct usb_info_t { ++ dma_regs_t *dmaregs_tx, *dmaregs_rx; ++ int state; ++ unsigned char address; ++ struct usb_stats_t stats; ++}; ++ ++enum { kError=-1, kEvSuspend=0, kEvReset=1, ++ kEvResume=2, kEvAddress=3, kEvConfig=4, kEvDeConfig=5 }; ++int usbctl_next_state_on_event( int event ) { ++ return 0; ++} ++static struct usb_info_t usbd_info; ++ ++/* receiver */ ++void ep1_reset(void); ++void ep1_stall(void); ++int sa1100_usb_recv (struct usb_request *req, void (*callback) (int,int)); ++ ++/* xmitter */ ++void ep2_reset(void); ++void ep2_stall(void); ++int sa1100_usb_send (struct usb_request *req, void (*callback) (int,int)); ++ ++/* UDC register utility functions */ ++#define UDC_write(reg, val) { \ ++ int i = 10000; \ ++ do { \ ++ (reg) = (val); \ ++ if (i-- <= 0) { \ ++ printk( "%s [%d]: write %#x to %p (%#lx) failed\n", \ ++ __FUNCTION__, __LINE__, (val), &(reg), (reg)); \ ++ break; \ ++ } \ ++ } while((reg) != (val)); \ ++} ++ ++#define UDC_set(reg, val) { \ ++ int i = 10000; \ ++ do { \ ++ (reg) |= (val); \ ++ if (i-- <= 0) { \ ++ printk( "%s [%d]: set %#x of %p (%#lx) failed\n", \ ++ __FUNCTION__, __LINE__, (val), &(reg), (reg)); \ ++ break; \ ++ } \ ++ } while(!((reg) & (val))); \ ++} ++ ++#define UDC_clear(reg, val) { \ ++ int i = 10000; \ ++ do { \ ++ (reg) &= ~(val); \ ++ if (i-- <= 0) { \ ++ printk( "%s [%d]: clear %#x of %p (%#lx) failed\n", \ ++ __FUNCTION__, __LINE__, (val), &(reg), (reg)); \ ++ break; \ ++ } \ ++ } while((reg) & (val)); \ ++} ++ ++#define UDC_flip(reg, val) { \ ++ int i = 10000; \ ++ (reg) = (val); \ ++ do { \ ++ (reg) = (val); \ ++ if (i-- <= 0) { \ ++ printk( "%s [%d]: flip %#x of %p (%#lx) failed\n", \ ++ __FUNCTION__, __LINE__, (val), &(reg), (reg)); \ ++ break; \ ++ } \ ++ } while(((reg) & (val))); \ ++} ++ ++#include "sa1100_udc.h" ++ ++static struct sa1100_udc *the_controller; ++static void nuke (struct sa1100_ep *, int status); ++static void done (struct sa1100_ep *ep, struct sa1100_request *req, int status); ++static inline void ep0_idle (struct sa1100_udc *dev) ++{ ++ dev->ep0state = EP0_IDLE; ++} ++ ++// ep0 handlers ++ ++// 1 == lots of trace noise, 0 = only "important' stuff ++#define VERBOSITY 0 ++ ++#if 1 && !defined( ASSERT ) ++# define ASSERT(expr) \ ++ if(!(expr)) { \ ++ printk( "Assertion failed! %s,%s,%s,line=%d\n",\ ++ #expr,__FILE__,__FUNCTION__,__LINE__); \ ++ } ++#else ++# define ASSERT(expr) ++#endif ++ ++#if VERBOSITY ++#define PRINTKD(fmt, args...) printk( fmt , ## args) ++#else ++#define PRINTKD(fmt, args...) ++#endif ++ ++/* other subroutines */ ++unsigned int (*wrint)(void); ++void ep0_int_hndlr( void ); ++static void ep0_queue(void *buf, unsigned int req, unsigned int act); ++static void write_fifo( void ); ++static int read_fifo( struct usb_ctrlrequest * p ); ++ ++/* some voodo helpers 01Mar01ww */ ++static void set_cs_bits( __u32 set_bits ); ++static void set_de( void ); ++static void set_ipr( void ); ++static void set_ipr_and_de( void ); ++static bool clear_opr( void ); ++ ++/*************************************************************************** ++Inline Helpers ++***************************************************************************/ ++ ++/* Data extraction from usb_request_t fields */ ++enum { kTargetDevice=0, kTargetInterface=1, kTargetEndpoint=2 }; ++static inline int request_target( __u8 b ) { return (int) ( b & 0x0F); } ++ ++static inline int windex_to_ep_num( __u16 w ) { return (int) ( w & 0x000F); } ++inline int type_code_from_request( __u8 by ) { return (( by >> 4 ) & 3); } ++ ++/* following is hook for self-powered flag in GET_STATUS. Some devices ++ .. might like to override and return real info */ ++static inline bool self_powered_hook( void ) { return true; } ++ ++#if VERBOSITY ++/* "pcs" == "print control status" */ ++static inline void pcs( void ) ++{ ++ __u32 foo = Ser0UDCCS0; ++ printk( "%8.8X: %s %s %s %s\n", ++ foo, ++ foo & UDCCS0_SE ? "SE" : "", ++ foo & UDCCS0_OPR ? "OPR" : "", ++ foo & UDCCS0_IPR ? "IPR" : "", ++ foo & UDCCS0_SST ? "SST" : "" ++ ); ++} ++static inline void preq( struct usb_ctrlrequest * pReq ) ++{ ++ static char * tnames[] = { "dev", "intf", "ep", "oth" }; ++ static char * rnames[] = { "std", "class", "vendor", "???" }; ++ char * psz; ++ switch( pReq->bRequest ) { ++ case USB_REQ_GET_STATUS: psz = "get stat"; break; ++ case USB_REQ_CLEAR_FEATURE: psz = "clr feat"; break; ++ case USB_REQ_SET_FEATURE: psz = "set feat"; break; ++ case USB_REQ_SET_ADDRESS: psz = "set addr"; break; ++ case USB_REQ_GET_DESCRIPTOR: psz = "get desc"; break; ++ case USB_REQ_SET_DESCRIPTOR: psz = "set desc"; break; ++ case USB_REQ_GET_CONFIGURATION: psz = "get cfg"; break; ++ case USB_REQ_SET_CONFIGURATION: psz = "set cfg"; break; ++ case USB_REQ_GET_INTERFACE: psz = "get intf"; break; ++ case USB_REQ_SET_INTERFACE: psz = "set intf"; break; ++ default: psz = "unknown"; break; ++ } ++ printk( "- [%s: %s req to %s. dir=%s]\n", psz, ++ rnames[ (pReq->bRequestType >> 5) & 3 ], ++ tnames[ pReq->bRequestType & 3 ], ++ ( pReq->bRequestType & 0x80 ) ? "in" : "out" ); ++} ++ ++static inline void usbctl_dump_request(const char *prefix, const struct usb_ctrlrequest *req) ++{ ++ printk("%s: bRequestType=0x%02x bRequest=0x%02x " ++ "wValue=0x%04x wIndex=0x%04x wLength=0x%04x\n", ++ prefix, req->bRequestType, req->bRequest, ++ le16_to_cpu(req->wValue), le16_to_cpu(req->wIndex), ++ le16_to_cpu(req->wLength)); ++} ++#else ++static inline void pcs( void ){} ++//static inline void preq( void ){} ++static inline void preq( void *x ){} ++static inline void usbctl_dump_request(const char *prefix, const struct usb_ctrlrequest *req) {} ++#endif ++ ++/*************************************************************************** ++Globals ++***************************************************************************/ ++static const char pszMe[] = "usbep0: "; ++ ++ ++/* global write struct to keep write ++ ..state around across interrupts */ ++static struct { ++ unsigned char *p; ++ int bytes_left; ++} wr; ++ ++/*************************************************************************** ++Public Interface ++***************************************************************************/ ++ ++/* reset received from HUB (or controller just went nuts and reset by itself!) ++ so udc core has been reset, track this state here */ ++void ep0_reset(void) ++{ ++ /* reset state machine */ ++ wr.p = NULL; ++ wr.bytes_left = 0; ++ usbd_info.address=0; ++// needed? ++ Ser0UDCAR = 0; ++} ++ ++ ++/* handle interrupt for endpoint zero */ ++ ++inline void ep0_clear_write(void) { ++ wr.p = NULL; ++ wr.bytes_left = 0; ++} ++ ++/* this is a config packet parser based on that from the updated HH 2.6 udc */ ++static void ep0_read_packet(void) ++{ ++ unsigned char status_buf[2]; /* returned in GET_STATUS */ ++ struct usb_ctrlrequest req; ++ int request_type; ++ int n; ++ __u32 address; ++ __u32 in, out; ++ ++ /* reset previous count */ ++ the_controller->ep0_req_len=-1; ++ ++ /* read the setup request */ ++ n = read_fifo( &req ); ++ usbctl_dump_request("ep0_read_packet",&req); ++ ++ if ( n != sizeof( req ) ) { ++ printk( "%ssetup begin: fifo READ ERROR wanted %d bytes got %d. " ++ " Stalling out...\n", ++ pszMe, sizeof( req ), n ); ++ /* force stall, serviced out */ ++ set_cs_bits( UDCCS0_FST | UDCCS0_SO ); ++ goto sh_sb_end; ++ } ++ ++ /* Is it a standard request? (not vendor or class request) */ ++ request_type = type_code_from_request( req.bRequestType ); ++ if ( request_type != 0 ) { ++ printk( "%ssetup begin: unsupported bRequestType: %d ignored\n", ++ pszMe, request_type ); ++ set_cs_bits( UDCCS0_DE | UDCCS0_SO ); ++ goto sh_sb_end; ++ } ++ ++ /* save requested reply size */ ++ the_controller->ep0_req_len=le16_to_cpu(req.wLength); ++ PRINTKD("%s: request length is %d\n",__FUNCTION__,the_controller->ep0_req_len); ++ ++#if VERBOSITY ++ { ++ unsigned char * pdb = (unsigned char *) &req; ++ PRINTKD( "%2.2X %2.2X %2.2X %2.2X %2.2X %2.2X %2.2X %2.2X ", ++ pdb[0], pdb[1], pdb[2], pdb[3], pdb[4], pdb[5], pdb[6], pdb[7] ++ ); ++ preq( &req ); ++ } ++#endif ++ ++ /* Handle it */ ++ switch( req.bRequest ) { ++ ++ /* This first bunch have no data phase */ ++ ++ case USB_REQ_SET_ADDRESS: ++ address = (__u32) (req.wValue & 0x7F); ++ /* when SO and DE sent, UDC will enter status phase and ack, ++ ..propagating new address to udc core. Next control transfer ++ ..will be on the new address. You can't see the change in a ++ ..read back of CAR until then. (about 250us later, on my box). ++ ..The original Intel driver sets S0 and DE and code to check ++ ..that address has propagated here. I tried this, but it ++ ..would only work sometimes! The rest of the time it would ++ ..never propagate and we'd spin forever. So now I just set ++ ..it and pray... ++ */ ++ Ser0UDCAR = address; ++ usbd_info.address = address; ++ usbctl_next_state_on_event( kEvAddress ); ++ set_cs_bits( UDCCS0_SO | UDCCS0_DE ); /* no data phase */ ++ printk( "%sI have been assigned address: %d\n", pszMe, address ); ++ break; ++ ++ ++ case USB_REQ_SET_CONFIGURATION: ++ if ( req.wValue == 1 ) { ++ /* configured */ ++ if (usbctl_next_state_on_event( kEvConfig ) != kError) { ++ /* (re)set the out and in max packet sizes */ ++ PRINTKD( "%s: calling the_controller.driver->setup with SET_CONFIGURATION\n", __FUNCTION__ ); ++ the_controller->driver->setup(&the_controller->gadget, &req); ++ in = __le16_to_cpu( the_controller->ep[1].ep.maxpacket ); ++ out = __le16_to_cpu( the_controller->ep[2].ep.maxpacket ); ++ Ser0UDCOMP = ( out - 1 ); ++ Ser0UDCIMP = ( in - 1 ); ++ // we are configured ++ usbd_info.state = USB_STATE_CONFIGURED; ++ // enable rx and tx interrupts ++ Ser0UDCCR &= ~(UDCCR_RIM | UDCCR_TIM); ++ ++ printk( "%sConfigured (OMP=%8.8X IMP=%8.8X)\n", pszMe, out, in ); ++ break; ++ } ++ } else if ( req.wValue == 0 ) { ++ /* de-configured */ ++ if (usbctl_next_state_on_event( kEvDeConfig ) != kError ) ++ printk( "%sDe-Configured\n", pszMe ); ++ usbd_info.state = 0; ++ Ser0UDCCR |= UDCCR_RIM | UDCCR_TIM; ++ ep1_reset (); ++ ep2_reset (); ++ printk("%s: de-configured. Tx and Rx interrupts disabled. ep1 and ep2 reset\n",__FUNCTION__); ++ } else { ++ printk( "%ssetup phase: Unknown " ++ "\"set configuration\" data %d\n", ++ pszMe, req.wValue ); ++ } ++ set_cs_bits( UDCCS0_SO | UDCCS0_DE ); /* no data phase */ ++ break; ++ ++ case USB_REQ_CLEAR_FEATURE: ++ /* could check data length, direction...26Jan01ww */ ++ if ( req.wValue == 0 ) { /* clearing ENDPOINT_HALT/STALL */ ++ int ep = windex_to_ep_num( req.wIndex ); ++ if ( ep == 1 ) { ++ printk( "%sclear feature \"endpoint halt\" " ++ " on receiver\n", pszMe ); ++ ep1_reset(); ++ } ++ else if ( ep == 2 ) { ++ printk( "%sclear feature \"endpoint halt\" " ++ "on xmitter\n", pszMe ); ++ ep2_reset(); ++ } else { ++ printk( "%sclear feature \"endpoint halt\" " ++ "on unsupported ep # %d\n", ++ pszMe, ep ); ++ } ++ } else { ++ printk( "%sUnsupported feature selector (%d) " ++ "in clear feature. Ignored.\n" , ++ pszMe, req.wValue ); ++ } ++ set_cs_bits( UDCCS0_SO | UDCCS0_DE ); /* no data phase */ ++ break; ++ ++ case USB_REQ_SET_FEATURE: ++ if ( req.wValue == 0 ) { /* setting ENDPOINT_HALT/STALL */ ++ int ep = windex_to_ep_num( req.wValue ); ++ if ( ep == 1 ) { ++ printk( "%set feature \"endpoint halt\" " ++ "on receiver\n", pszMe ); ++ ep1_stall(); ++ } ++ else if ( ep == 2 ) { ++ printk( "%sset feature \"endpoint halt\" " ++ " on xmitter\n", pszMe ); ++ ep2_stall(); ++ } else { ++ printk( "%sset feature \"endpoint halt\" " ++ "on unsupported ep # %d\n", ++ pszMe, ep ); ++ } ++ } ++ else { ++ printk( "%sUnsupported feature selector " ++ "(%d) in set feature\n", ++ pszMe, req.wValue ); ++ } ++ set_cs_bits( UDCCS0_SO | UDCCS0_DE ); /* no data phase */ ++ break; ++ ++ /* The rest have a data phase that writes back to the host */ ++ case USB_REQ_GET_STATUS: ++ /* return status bit flags */ ++ status_buf[0] = status_buf[1] = 0; ++ n = request_target(req.bRequestType); ++ switch( n ) { ++ case kTargetDevice: ++ if ( self_powered_hook() ) ++ status_buf[0] |= 1; ++ break; ++ case kTargetInterface: ++ break; ++ case kTargetEndpoint: ++ /* return stalled bit */ ++ n = windex_to_ep_num( req.wIndex ); ++ if ( n == 1 ) ++ status_buf[0] |= (Ser0UDCCS1 & UDCCS1_FST) >> 4; ++ else if ( n == 2 ) ++ status_buf[0] |= (Ser0UDCCS2 & UDCCS2_FST) >> 5; ++ else { ++ printk( "%sUnknown endpoint (%d) " ++ "in GET_STATUS\n", pszMe, n ); ++ } ++ break; ++ default: ++ printk( "%sUnknown target (%d) in GET_STATUS\n", ++ pszMe, n ); ++ /* fall thru */ ++ break; ++ } ++ PRINTKD("%s: GET_STATUS writing %d\n",__FUNCTION__,req.wLength); ++ ep0_queue( status_buf, req.wLength, sizeof( status_buf )); ++ break; ++ case USB_REQ_GET_DESCRIPTOR: ++ PRINTKD( "%s: calling the_controller.driver->setup with GET_DESCRIPTOR\n", __FUNCTION__ ); ++ the_controller->driver->setup(&the_controller->gadget, &req); ++ break; ++ case USB_REQ_GET_CONFIGURATION: ++ PRINTKD( "%s: calling the_controller.driver->setup with GET_CONFIGURATION\n", __FUNCTION__ ); ++ the_controller->driver->setup(&the_controller->gadget, &req); ++ break; ++ case USB_REQ_GET_INTERFACE: ++ PRINTKD( "%s: calling the_controller->driver->setup with GET_INTERFACE\n", __FUNCTION__ ); ++ the_controller->driver->setup(&the_controller->gadget, &req); ++ break; ++ case USB_REQ_SET_INTERFACE: ++ PRINTKD( "%s: calling the_controller->driver->setup with SET_INTERFACE\n", __FUNCTION__ ); ++ the_controller->driver->setup(&the_controller->gadget, &req); ++ break; ++ default : ++ printk("%sunknown request 0x%x\n", pszMe, req.bRequest); ++ break; ++ } /* switch( bRequest ) */ ++ ++sh_sb_end: ++ return; ++ ++} ++ ++void ep0_int_hndlr(void) ++{ ++ u32 cs_reg_in; ++ ++ pcs(); ++ ++ cs_reg_in = Ser0UDCCS0; ++ ++ /* ++ * If "setup end" has been set, the usb controller has terminated ++ * a setup transaction before we set DE. This happens during ++ * enumeration with some hosts. For example, the host will ask for ++ * our device descriptor and specify a return of 64 bytes. When we ++ * hand back the first 8, the host will know our max packet size ++ * and turn around and issue a new setup immediately. This causes ++ * the UDC to auto-ack the new setup and set SE. We must then ++ * "unload" (process) the new setup, which is what will happen ++ * after this preamble is finished executing. ++ */ ++ if (cs_reg_in & UDCCS0_SE) { ++ PRINTKD("UDC: early termination of setup\n"); ++ ++ /* ++ * Clear setup end ++ */ ++ set_cs_bits(UDCCS0_SSE); ++ ++ /* ++ * Clear any pending write. ++ */ ++ ep0_clear_write(); ++ } ++ ++ /* ++ * UDC sent a stall due to a protocol violation. ++ */ ++ if (cs_reg_in & UDCCS0_SST) { ++ PRINTKD("UDC: write_preamble: UDC sent stall\n"); ++ ++ /* ++ * Clear sent stall ++ */ ++ set_cs_bits(UDCCS0_SST); ++ ++ /* ++ * Clear any pending write. ++ */ ++ ep0_clear_write(); ++ } ++ ++ switch (cs_reg_in & (UDCCS0_OPR | UDCCS0_IPR)) { ++ case UDCCS0_OPR | UDCCS0_IPR: ++ PRINTKD("UDC: write_preamble: see OPR. Stopping write to " ++ "handle new SETUP\n"); ++ ++ /* ++ * very rarely, you can get OPR and ++ * leftover IPR. Try to clear ++ */ ++ UDC_clear(Ser0UDCCS0, UDCCS0_IPR); ++ ++ /* ++ * Clear any pending write. ++ */ ++ ep0_clear_write(); ++ ++ /*FALLTHROUGH*/ ++ case UDCCS0_OPR: ++ /* ++ * A new setup request is pending. Handle ++ * it. Note that we don't try to read a ++ * packet if SE was set and OPR is clear. ++ */ ++ ep0_read_packet(); ++ break; ++ ++ case 0: ++ // if data pending ... ++ if (wr.p) { ++ unsigned int cs_bits = 0; ++ if (wr.bytes_left != 0) { ++ /* ++ * More data to go ++ */ ++ write_fifo(); ++ // packet ready ++ cs_bits |= UDCCS0_IPR; ++ } ++ ++ if (wr.bytes_left == 0) { ++ /* ++ * All data sent. ++ */ ++ cs_bits |= wrint(); ++ // a null packet may be following ++ if (!wrint) ++ ep0_clear_write(); ++ } ++ set_cs_bits(cs_bits); ++ } ++ else ++ PRINTKD("%s: No data - probably an ACK\n",__FUNCTION__); ++ break; ++ ++ case UDCCS0_IPR: ++ PRINTKD("UDC: IPR set, not writing\n"); ++ break; ++ } ++ ++ pcs(); ++ PRINTKD( "-end-\n" ); ++} ++ ++static unsigned int ep0_sh_write_data(void) ++{ ++ /* ++ * If bytes left is zero, we are coming in on the ++ * interrupt after the last packet went out. And ++ * we know we don't have to empty packet this ++ * transfer so just set DE and we are done ++ */ ++ PRINTKD("UDC: normal packet ended\n"); ++ wrint=NULL; ++ return UDCCS0_DE; ++} ++ ++static unsigned int ep0_sh_write_with_empty_packet(void) ++{ ++ /* ++ * If bytes left is zero, we are coming in on the ++ * interrupt after the last packet went out. ++ * We must do short packet suff, so set DE and IPR ++ */ ++ PRINTKD("UDC: short packet sent\n"); ++ wrint=NULL; ++ return UDCCS0_IPR | UDCCS0_DE; ++} ++ ++static unsigned int ep0_sh_write_data_then_empty_packet(void) ++{ ++ PRINTKD("UDC: last packet full. Send empty packet next\n"); ++ wrint=ep0_sh_write_with_empty_packet; ++ return 0; ++} ++ ++static void ep0_queue(void *buf, unsigned int len, unsigned int req_len) ++{ ++ __u32 cs_reg_bits = UDCCS0_IPR; ++ ++ PRINTKD("a=%d r=%d\n", len, req_len); ++ ++ if (len == 0) { ++ // no output packet to wait for ++ PRINTKD("%s: zero byte packet being queued. Setting DE and OPR end exiting\n",__FUNCTION__); ++ set_cs_bits(UDCCS0_DE | UDCCS0_SO); ++ return; ++ } ++ ++ /* ++ * thou shalt not enter data phase until ++ * Out Packet Ready is clear ++ */ ++ if (!clear_opr()) { ++ printk("UDC: SO did not clear OPR\n"); ++ set_cs_bits(UDCCS0_DE | UDCCS0_SO); ++ return; ++ } ++ ++ // note data to xmit stored ++ wr.p=buf; ++ wr.bytes_left=min(len, req_len); ++ ++ // write the first block ++ write_fifo(); ++ ++ // done already? ++ if (wr.bytes_left == 0) { ++ /* ++ * out in one, so data end ++ */ ++ cs_reg_bits |= UDCCS0_DE; ++ ep0_clear_write(); ++ // rest is a shorter than expected reply? ++ } else if (len < req_len) { ++ /* ++ * we are going to short-change host ++ * so need nul to not stall ++ */ ++ if (len % 8) { ++ PRINTKD("%s: %d more to go ending in a short packet.\n",__FUNCTION__,wr.bytes_left); ++ wrint=ep0_sh_write_with_empty_packet; ++ } ++ // unless we are on a packet boundary. Then send full packet plus null packet. ++ else { ++ PRINTKD("%s: %d more to go then add empty packet.\n",__FUNCTION__,wr.bytes_left); ++ wrint=ep0_sh_write_data_then_empty_packet; ++ } ++ } else { ++ /* ++ * we have as much or more than requested ++ */ ++ PRINTKD("%s: %d more to go.\n",__FUNCTION__,wr.bytes_left); ++ wrint=ep0_sh_write_data; ++ } ++ ++ /* ++ * note: IPR was set uncondtionally at start of routine ++ */ ++ set_cs_bits(cs_reg_bits); ++} ++ ++/* ++ * write_fifo() ++ * Stick bytes in the 8 bytes endpoint zero FIFO. ++ * This version uses a variety of tricks to make sure the bytes ++ * are written correctly. 1. The count register is checked to ++ * see if the byte went in, and the write is attempted again ++ * if not. 2. An overall counter is used to break out so we ++ * don't hang in those (rare) cases where the UDC reverses ++ * direction of the FIFO underneath us without notification ++ * (in response to host aborting a setup transaction early). ++ * ++ */ ++static void write_fifo( void ) ++{ ++ int bytes_this_time = min(wr.bytes_left, 8); ++ int bytes_written = 0; ++ ++ PRINTKD( "WF=%d: ", bytes_this_time ); ++ ++ while( bytes_this_time-- ) { ++ unsigned int cwc; ++ int i; ++ PRINTKD( "%2.2X ", *wr.p ); ++ cwc = Ser0UDCWC & 15; ++ i = 10; ++ do { ++ Ser0UDCD0 = *wr.p; ++ udelay( 20 ); /* voodo 28Feb01ww */ ++ } while( (Ser0UDCWC &15) == cwc && --i ); ++ ++ if ( i == 0 ) { ++ printk( "%swrite_fifo: write failure\n", pszMe ); ++ usbd_info.stats.ep0_fifo_write_failures++; ++ } ++ ++ wr.p++; ++ bytes_written++; ++ } ++ wr.bytes_left -= bytes_written; ++ ++ /* following propagation voodo so maybe caller writing IPR in ++ ..a moment might actually get it to stick 28Feb01ww */ ++ udelay( 300 ); ++ ++ usbd_info.stats.ep0_bytes_written += bytes_written; ++ PRINTKD( "L=%d WCR=%8.8lX\n", wr.bytes_left, Ser0UDCWC ); ++} ++/* ++ * read_fifo() ++ * Read 1-8 bytes out of FIFO and put in request. ++ * Called to do the initial read of setup requests ++ * from the host. Return number of bytes read. ++ * ++ * Like write fifo above, this driver uses multiple ++ * reads checked agains the count register with an ++ * overall timeout. ++ * ++ */ ++static int ++read_fifo( struct usb_ctrlrequest * request ) ++{ ++ int bytes_read = 0; ++ int fifo_count; ++ ++ unsigned char * pOut = (unsigned char*) request; ++ ++ fifo_count = ( Ser0UDCWC & 0xFF ); ++ ++ ASSERT( fifo_count <= 8 ); ++ PRINTKD( "RF=%d ", fifo_count ); ++ ++ while( fifo_count-- ) { ++ unsigned int cwc; ++ int i; ++ ++ cwc = Ser0UDCWC & 15; ++ ++ i = 10; ++ do { ++ *pOut = (unsigned char) Ser0UDCD0; ++ udelay( 20 ); ++ } while( ( Ser0UDCWC & 15 ) == cwc && --i ); ++ ++ if ( i == 0 ) { ++ printk( "%sread_fifo(): read failure\n", pszMe ); ++ usbd_info.stats.ep0_fifo_read_failures++; ++ } ++ pOut++; ++ bytes_read++; ++ } ++ ++ PRINTKD( "fc=%d\n", bytes_read ); ++ usbd_info.stats.ep0_bytes_read++; ++ return bytes_read; ++} ++ ++/* some voodo I am adding, since the vanilla macros just aren't doing it 1Mar01ww */ ++ ++#define ABORT_BITS ( UDCCS0_SST | UDCCS0_SE ) ++#define OK_TO_WRITE (!( Ser0UDCCS0 & ABORT_BITS )) ++#define BOTH_BITS (UDCCS0_IPR | UDCCS0_DE) ++ ++static void set_cs_bits( __u32 bits ) ++{ ++ if ( bits & ( UDCCS0_SO | UDCCS0_SSE | UDCCS0_FST | UDCCS0_SST) ) ++ Ser0UDCCS0 = bits; ++ else if ( (bits & BOTH_BITS) == BOTH_BITS ) ++ set_ipr_and_de(); ++ else if ( bits & UDCCS0_IPR ) ++ set_ipr(); ++ else if ( bits & UDCCS0_DE ) ++ set_de(); ++} ++ ++static void set_de( void ) ++{ ++ int i = 1; ++ while( 1 ) { ++ if ( OK_TO_WRITE ) { ++ Ser0UDCCS0 |= UDCCS0_DE; ++ } else { ++ PRINTKD( "%sQuitting set DE because SST or SE set\n", pszMe ); ++ break; ++ } ++ if ( Ser0UDCCS0 & UDCCS0_DE ) ++ break; ++ udelay( i ); ++ if ( ++i == 50 ) { ++ printk( "%sDangnabbbit! Cannot set DE! (DE=%8.8X CCS0=%8.8lX)\n", ++ pszMe, UDCCS0_DE, Ser0UDCCS0 ); ++ break; ++ } ++ } ++} ++ ++static void set_ipr( void ) ++{ ++ int i = 1; ++ while( 1 ) { ++ if ( OK_TO_WRITE ) { ++ Ser0UDCCS0 |= UDCCS0_IPR; ++ } else { ++ PRINTKD( "%sQuitting set IPR because SST or SE set\n", pszMe ); ++ break; ++ } ++ if ( Ser0UDCCS0 & UDCCS0_IPR ) ++ break; ++ udelay( i ); ++ if ( ++i == 50 ) { ++ printk( "%sDangnabbbit! Cannot set IPR! (IPR=%8.8X CCS0=%8.8lX)\n", ++ pszMe, UDCCS0_IPR, Ser0UDCCS0 ); ++ break; ++ } ++ } ++} ++ ++static void set_ipr_and_de( void ) ++{ ++ int i = 1; ++ while( 1 ) { ++ if ( OK_TO_WRITE ) { ++ Ser0UDCCS0 |= BOTH_BITS; ++ } else { ++ PRINTKD( "%sQuitting set IPR/DE because SST or SE set\n", pszMe ); ++ break; ++ } ++ if ( (Ser0UDCCS0 & BOTH_BITS) == BOTH_BITS) ++ break; ++ udelay( i ); ++ if ( ++i == 50 ) { ++ printk( "%sDangnabbbit! Cannot set DE/IPR! (DE=%8.8X IPR=%8.8X CCS0=%8.8lX)\n", ++ pszMe, UDCCS0_DE, UDCCS0_IPR, Ser0UDCCS0 ); ++ break; ++ } ++ } ++} ++ ++static bool clear_opr( void ) ++{ ++ int i = 10000; ++ bool is_clear; ++ do { ++ Ser0UDCCS0 = UDCCS0_SO; ++ is_clear = ! ( Ser0UDCCS0 & UDCCS0_OPR ); ++ if ( i-- <= 0 ) { ++ printk( "%sclear_opr(): failed\n", pszMe ); ++ break; ++ } ++ } while( ! is_clear ); ++ return is_clear; ++} ++ ++ ++ ++// ep1 handlers ++ ++static char *ep1_buf; ++static int ep1_len; ++static void (*ep1_callback)(int flag, int size); ++static char *ep1_curdmabuf; ++static dma_addr_t ep1_curdmapos; ++static int ep1_curdmalen; ++static int ep1_remain; ++static int ep1_used; ++ ++static dma_regs_t *dmaregs_rx = NULL; ++static int rx_pktsize; ++ ++static int naking; ++ ++static void ++ep1_start(void) ++{ ++ sa1100_reset_dma(dmaregs_rx); ++ if (!ep1_curdmalen) { ++ ep1_curdmalen = rx_pktsize; ++ if (ep1_curdmalen > ep1_remain) ++ ep1_curdmalen = ep1_remain; ++ ep1_curdmapos = dma_map_single(NULL, ep1_curdmabuf, ep1_curdmalen, ++ DMA_FROM_DEVICE); ++ } ++ ++ UDC_write( Ser0UDCOMP, ep1_curdmalen-1 ); ++ ++ sa1100_start_dma(dmaregs_rx, ep1_curdmapos, ep1_curdmalen); ++ ++ if ( naking ) { ++ /* turn off NAK of OUT packets, if set */ ++ UDC_flip( Ser0UDCCS1, UDCCS1_RPC ); ++ naking = 0; ++ } ++} ++ ++static void ++ep1_done(int flag) ++{ ++ int size = ep1_len - ep1_remain; ++ ++ if (!ep1_len) ++ return; ++ if (ep1_curdmalen) ++ dma_unmap_single(NULL, ep1_curdmapos, ep1_curdmalen, ++ DMA_FROM_DEVICE); ++ ep1_len = ep1_curdmalen = 0; ++ if (ep1_callback) ++ ep1_callback(flag, size); ++} ++ ++void ++ep1_state_change_notify( int new_state ) ++{ ++ ++} ++ ++void ++ep1_stall( void ) ++{ ++ /* SET_FEATURE force stall at UDC */ ++ UDC_set( Ser0UDCCS1, UDCCS1_FST ); ++} ++ ++int ++ep1_init(dma_regs_t *dmaregs) ++{ ++ dmaregs_rx = dmaregs; ++ sa1100_reset_dma(dmaregs_rx); ++ ep1_done(-EAGAIN); ++ return 0; ++} ++ ++void ++ep1_reset(void) ++{ ++ if (dmaregs_rx) ++ sa1100_reset_dma(dmaregs_rx); ++ UDC_clear(Ser0UDCCS1, UDCCS1_FST); ++ ep1_done(-EINTR); ++} ++ ++void ep1_int_hndlr(int udcsr) ++{ ++ dma_addr_t dma_addr; ++ unsigned int len; ++ int status = Ser0UDCCS1; ++ ++ if ( naking ) printk( "%sEh? in ISR but naking = %d\n", "usbrx: ", naking ); ++ ++ if (status & UDCCS1_RPC) { ++ ++ if (!ep1_curdmalen) { ++ printk("usb_recv: RPC for non-existent buffer\n"); ++ naking=1; ++ return; ++ } ++ ++ sa1100_stop_dma(dmaregs_rx); ++ ++ if (status & UDCCS1_SST) { ++ printk("usb_recv: stall sent OMP=%ld\n", Ser0UDCOMP); ++ UDC_flip(Ser0UDCCS1, UDCCS1_SST); ++ ep1_done(-EIO); // UDC aborted current transfer, so we do ++ return; ++ } ++ ++ if (status & UDCCS1_RPE) { ++ printk("usb_recv: RPError %x\n", status); ++ UDC_flip(Ser0UDCCS1, UDCCS1_RPC); ++ ep1_done(-EIO); ++ return; ++ } ++ ++ dma_addr=sa1100_get_dma_pos(dmaregs_rx); ++ dma_unmap_single(NULL, ep1_curdmapos, ep1_curdmalen, ++ DMA_FROM_DEVICE); ++ len = dma_addr - ep1_curdmapos; ++#ifdef SA1100_USB_DEBUG ++ if (sa1100_usb_debug) { ++ int i; ++ printk("usb rx %d :\n ",len); ++ if (sa1100_usb_debug>1) { ++ for (i=0; i<len; i++) { ++ if ((i % 32)==31) ++ printk("\n "); ++ printk("%2.2x ",((char *)ep1_curdmapos)[i]); ++ } ++ } ++ printk("\n"); ++ } ++#endif ++ if (len < ep1_curdmalen) { ++ char *buf = ep1_curdmabuf + len; ++ while (Ser0UDCCS1 & UDCCS1_RNE) { ++ if (len >= ep1_curdmalen) { ++ printk("usb_recv: too much data in fifo\n"); ++ break; ++ } ++ *buf++ = Ser0UDCDR; ++ len++; ++ } ++ } else if (Ser0UDCCS1 & UDCCS1_RNE) { ++ printk("usb_recv: fifo screwed, shouldn't contain data\n"); ++ len = 0; ++ } ++ ++#if defined(NCB_DMA_FIX) ++// if (len && (ep1_buf != ep1_curdmabuf)) ++// memcpy(ep1_buf,ep1_curdmabuf,len); ++ if (len) ++ memcpy(&(((unsigned char *)ep1_buf)[ep1_used]),ep1_curdmabuf,len); ++#endif ++ ++ ep1_curdmalen = 0; /* dma unmap already done */ ++ ep1_remain -= len; ++ ep1_used += len; ++// ep1_curdmabuf += len; // use same buffer again ++ naking = 1; ++//printk("%s: received %d, %d remaining\n",__FUNCTION__,len,ep1_remain); ++ if (len && (len == rx_pktsize)) ++ ep1_start(); ++ else ++ ep1_done((len) ? 0 : -EPIPE); ++ } ++ /* else, you can get here if we are holding NAK */ ++} ++ ++int ++sa1100_usb_recv(struct usb_request *req, void (*callback)(int flag, int size)) ++{ ++ unsigned long flags; ++ char *buf=req->buf; ++ int len=req->length; ++ ++ if (ep1_len) ++ return -EBUSY; ++ ++ local_irq_save(flags); ++ ep1_buf = buf; ++ ep1_len = len; ++ ep1_callback = callback; ++ ep1_remain = len; ++ ep1_used = 0; ++#ifdef NCB_DMA_FIX ++// if (((size_t)buf)&3) ++ if (1) ++ ep1_curdmabuf = receive_buffer; ++ else ++#else ++ ep1_curdmabuf = buf; ++#endif ++ ep1_curdmalen = 0; ++ ep1_start(); ++ local_irq_restore(flags); ++ ++ return 0; ++} ++ ++// ep2 handlers ++ ++static char *ep2_buf; ++static int ep2_len; ++static void (*ep2_callback)(int status, int size); ++static dma_addr_t ep2_dma; ++static dma_addr_t ep2_curdmapos; ++static int ep2_curdmalen; ++static int ep2_remain; ++static dma_regs_t *dmaregs_tx = NULL; ++static int tx_pktsize; ++ ++/* device state is changing, async */ ++void ++ep2_state_change_notify( int new_state ) ++{ ++} ++ ++/* set feature stall executing, async */ ++void ++ep2_stall( void ) ++{ ++ UDC_set( Ser0UDCCS2, UDCCS2_FST ); /* force stall at UDC */ ++} ++ ++static void ++ep2_start(void) ++{ ++ if (!ep2_len) ++ return; ++ ++ ep2_curdmalen = tx_pktsize; ++ if (ep2_curdmalen > ep2_remain) ++ ep2_curdmalen = ep2_remain; ++ ++ /* must do this _before_ queue buffer.. */ ++ UDC_flip( Ser0UDCCS2,UDCCS2_TPC ); /* stop NAKing IN tokens */ ++ UDC_write( Ser0UDCIMP, ep2_curdmalen-1 ); ++ ++ Ser0UDCAR = usbd_info.address; // fighting stupid silicon bug ++ sa1100_start_dma(dmaregs_tx, ep2_curdmapos, ep2_curdmalen); ++} ++ ++static void ++ep2_done(int flag) ++{ ++ int size = ep2_len - ep2_remain; ++ if (ep2_len) { ++ dma_unmap_single(NULL, ep2_dma, ep2_len, DMA_TO_DEVICE); ++ ep2_len = 0; ++ if (ep2_callback) ++ ep2_callback(flag, size); ++ } ++} ++ ++int ep2_init(dma_regs_t *dmaregs) ++{ ++ dmaregs_tx = dmaregs; ++ sa1100_reset_dma(dmaregs_tx); ++ ep2_done(-EAGAIN); ++ return 0; ++} ++ ++void ep2_reset(void) ++{ ++ UDC_clear(Ser0UDCCS2, UDCCS2_FST); ++ if (dmaregs_tx) ++ sa1100_reset_dma(dmaregs_tx); ++ ep2_done(-EINTR); ++} ++ ++void ep2_int_hndlr(int udcsr) ++{ ++ int status = Ser0UDCCS2; ++ ++ if (Ser0UDCAR != usbd_info.address) // check for stupid silicon bug. ++ Ser0UDCAR = usbd_info.address; ++ ++ if (status & UDCCS2_TPC) { ++ ++ UDC_flip(Ser0UDCCS2, UDCCS2_SST); ++ ++ sa1100_reset_dma(dmaregs_tx); ++ ++ if (status & (UDCCS2_TPE | UDCCS2_TUR)) { ++ printk("usb_send: transmit error %x\n", status); ++ ep2_done(-EIO); ++ } else { ++ ep2_curdmapos += ep2_curdmalen; ++ ep2_remain -= ep2_curdmalen; ++ ++ if (ep2_remain != 0) ++ ep2_start(); ++ else ++ ep2_done(0); ++ } ++ } else { ++ printk("usb_send: Not TPC: UDCCS2 = %x\n", status); ++ } ++} ++ ++int ++sa1100_usb_send(struct usb_request *req, void (*callback)(int status, int size)) ++{ ++ char *buf=req->buf; ++ int len=req->length; ++ unsigned long flags; ++ ++ if (usbd_info.state != USB_STATE_CONFIGURED) { ++ PRINTKD("%s: return -ENODEV\n",__FUNCTION__); ++ return -ENODEV; ++ } ++ ++ if (ep2_len) { ++ PRINTKD("%s: return -EBUSY\n",__FUNCTION__); ++ return -EBUSY; ++ } ++ ++ local_irq_save(flags); ++#ifdef NCB_DMA_FIX ++ // if misaligned, copy to aligned buffer ++// if (((size_t)buf)&3) { ++ if (1) { ++ PRINTKD("%s: copying %d bytes to send_buffer\n",__FUNCTION__,len); ++ memcpy(send_buffer,buf,len); ++ ep2_buf = send_buffer; ++ } ++ else ++#endif ++ ep2_buf = buf; ++ ++ ep2_len = len; ++ ep2_dma = dma_map_single(NULL, ep2_buf, len,DMA_TO_DEVICE); ++ PRINTKD("%s: mapped dma to buffer(%p0\n",__FUNCTION__,buf); ++ ++ ep2_callback = callback; ++ ep2_remain = len; ++ ep2_curdmapos = ep2_dma; ++ ++ PRINTKD("%s: calling ep2_start\n",__FUNCTION__); ++ ep2_start(); ++ local_irq_restore(flags); ++ ++ return 0; ++} ++/*-------------------------------------------------------------------------*/ ++ ++static int ++sa1100_enable(struct usb_ep *_ep, const struct usb_endpoint_descriptor *desc) ++{ ++ struct sa1100_udc *dev; ++ struct sa1100_ep *ep; ++ u32 max; ++ int type; ++ ++ ep = container_of (_ep, struct sa1100_ep, ep); ++ if (!_ep || !desc || ep->desc || _ep->name == ep0name ++ || desc->bDescriptorType != USB_DT_ENDPOINT) { ++ PRINTKD("%s: _ep = %p, desc = %p\n",__FUNCTION__,_ep,desc); ++ if (_ep && desc) ++ PRINTKD("%s: ep->desc = %p, _ep->name = %s desc->bDescriptorType = %s\n",__FUNCTION__,ep->desc,_ep->name, ++ (desc->bDescriptorType == USB_DT_ENDPOINT) ? "USB_DT_ENDPOINT":"bad!!"); ++ return -EINVAL; ++ } ++ ++ dev = ep->dev; ++ if (!dev->driver || dev->gadget.speed == USB_SPEED_UNKNOWN) ++ return -ESHUTDOWN; ++ ++ type = desc->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK; ++ max = le16_to_cpu (desc->wMaxPacketSize); ++ switch (max) { ++ case 64: case 32: ++ /* note: maxpacket > 16 means DMA might overrun/underrun */ ++ case 16: case 8: ++ break; ++ default: ++ if (type == USB_ENDPOINT_XFER_INT && max < 64) ++ break; ++ return -EDOM; ++ } ++ ++ switch (type) { ++ case USB_ENDPOINT_XFER_BULK: ++ case USB_ENDPOINT_XFER_INT: ++ if (ep == &dev->ep[2]) { ++ if (desc->bEndpointAddress != (USB_DIR_IN|2)) { ++ PRINTKD("%s: ep[2] has invalid endpoint\n",__FUNCTION__); ++ return -EINVAL; ++ } ++ tx_pktsize = max; ++ Ser0UDCOMP = max - 1; ++ PRINTKD("%s: ep2 max packet size is %d\n",__FUNCTION__,max); ++ break; ++ } else if (ep == &dev->ep[1]) { ++ if (desc->bEndpointAddress != (USB_DIR_OUT|1)) { ++ PRINTKD("%s: ep[1] has invalid endpoint\n",__FUNCTION__); ++ return -EINVAL; ++ } ++ rx_pktsize = max; ++ Ser0UDCIMP = max - 1; ++ PRINTKD("%s: ep1 max packet size is %d\n",__FUNCTION__,max); ++ break; ++ } ++ // FALLTHROUGH ++ default: ++ PRINTKD("%s: Invalid endpoint\n",__FUNCTION__); ++ return -EINVAL; ++ } ++ ++ _ep->maxpacket = max; ++ ep->desc = desc; ++ ep->stopped = 0; ++ ++ DEBUG (dev, "enabled %s %s max %04x\n", _ep->name, ++ type_string (desc->bmAttributes), max); ++ ++ return 0; ++} ++ ++static int sa1100_disable (struct usb_ep *_ep) ++{ ++ struct sa1100_ep *ep; ++ ++ ep = container_of (_ep, struct sa1100_ep, ep); ++ if (!_ep || !ep->desc || _ep->name == ep0name) ++ return -EINVAL; ++ ++ nuke (ep, -ESHUTDOWN); ++ ++ DEBUG (ep->dev, "disabled %s\n", _ep->name); ++ ++ ep->desc = NULL; ++ ep->stopped = 1; ++ return 0; ++} ++ ++/*-------------------------------------------------------------------------*/ ++ ++static struct usb_request * ++sa1100_alloc_request (struct usb_ep *_ep, gfp_t gfp_flags) ++{ ++ struct sa1100_request *req; ++ ++ if (!_ep) ++ return 0; ++ ++ req = kzalloc(sizeof *req, gfp_flags); ++ if (!req) ++ return 0; ++ ++ memset (req, 0, sizeof *req); ++ req->req.dma = DMA_ADDR_INVALID; ++ INIT_LIST_HEAD (&req->queue); ++ return &req->req; ++} ++ ++static void sa1100_free_request(struct usb_ep *_ep, struct usb_request *_req) ++{ ++ struct sa1100_request *req; ++ ++ req = container_of (_req, struct sa1100_request, req); ++ WARN_ON (!list_empty (&req->queue)); ++ kfree(req); //NCB - see pxa2xx_udc ++} ++ ++/*-------------------------------------------------------------------------*/ ++ ++static void done(struct sa1100_ep *ep, struct sa1100_request *req, int status) ++{ ++ unsigned stopped = ep->stopped; ++ ++ list_del_init (&req->queue); ++ ++ if (likely(req->req.status == -EINPROGRESS)) ++ req->req.status = status; ++ else ++ status = req->req.status; ++ ++ if (status && status != -ESHUTDOWN) ++ VDEBUG (ep->dev, "complete %s req %p stat %d len %u/%u\n", ++ ep->ep.name, &req->req, status, ++ req->req.actual, req->req.length); ++ ++ /* don't modify queue heads during completion callback */ ++ ep->stopped = 1; ++ req->req.complete (&ep->ep, &req->req); ++ ep->stopped = stopped; ++} ++ ++/*-------------------------------------------------------------------------*/ ++ ++/* FIXME move away from the old non-queued api. ++ * - forces extra work on us ++ * - stores request state twice ++ * - doesn't let gadget driver handle dma mapping ++ * - status codes need mapping ++ */ ++ ++static int map_status(int status) ++{ ++ switch (status) { ++ case 0: ++ case -EIO: /* ep[12]_int_handler */ ++ return status; ++ case -EPIPE: /* ep1_int_handler */ ++ return 0; ++ // case -EAGAIN: /* ep[12]_init */ ++ // case -EINTR: /* ep[12]_reset */ ++ default: ++ return -ESHUTDOWN; ++ } ++} ++ ++static void tx_callback(int status, int size) ++{ ++ struct sa1100_ep *ep = &the_controller->ep[2]; ++ struct sa1100_request *req; ++ ++ if (list_empty (&ep->queue)) { ++ if (status != -EAGAIN) ++ DEBUG (ep->dev, "%s, bogus tx callback %d/%d\n", ++ ep->ep.name, status, size); ++ return; ++ } ++ req = list_entry (ep->queue.next, struct sa1100_request, queue); ++ req->req.actual = size; ++ done (ep, req, map_status (status)); ++ ++ if (ep->stopped || list_empty (&ep->queue)) ++ return; ++ req = list_entry (ep->queue.next, struct sa1100_request, queue); ++ sa1100_usb_send (&req->req, tx_callback); ++} ++ ++static void rx_callback (int status, int size) ++{ ++ struct sa1100_ep *ep = &the_controller->ep[1]; ++ struct sa1100_request *req; ++ ++ if (list_empty (&ep->queue)) { ++ if (status != -EAGAIN) ++ DEBUG (ep->dev, "%s, bogus tx callback %d/%d\n", ++ ep->ep.name, status, size); ++ return; ++ } ++ req = list_entry (ep->queue.next, struct sa1100_request, queue); ++ req->req.actual = size; ++ done (ep, req, map_status (status)); ++ ++ if (ep->stopped || list_empty (&ep->queue)) ++ return; ++ req = list_entry (ep->queue.next, struct sa1100_request, queue); ++ sa1100_usb_recv (&req->req, rx_callback); ++} ++ ++ ++static int ++sa1100_queue (struct usb_ep *_ep, struct usb_request *_req, gfp_t gfp_flags) ++{ ++ struct sa1100_request *req; ++ struct sa1100_ep *ep; ++ struct sa1100_udc *dev; ++ unsigned long flags; ++ ++ req = container_of (_req, struct sa1100_request, req); ++ if (!_req || !_req->complete || !_req->buf ++ || !list_empty (&req->queue)) ++ return -EINVAL; ++ ++ ep = container_of (_ep, struct sa1100_ep, ep); ++ if (unlikely(!_ep || (!ep->desc && _ep->name != ep0name))) ++ return -EINVAL; ++ ++ dev = ep->dev; ++ if (unlikely(!dev->driver || dev->gadget.speed == USB_SPEED_UNKNOWN)) ++ return -ESHUTDOWN; ++ ++ // handle ep0 ++ if (_ep->name == ep0name) { ++ ep0_queue( _req->buf, _req->length, dev->ep0_req_len >=0 ? dev->ep0_req_len: _req->length ); ++ return 0; ++ } ++ ++ /* sa1100 udc can't write zlps */ ++ if (ep == &dev->ep[2] && _req->length == 0) ++ return -ERANGE; ++ ++ /* the old sa1100 api doesn't use 'unsigned' for lengths */ ++ if (_req->length > INT_MAX) ++ return -ERANGE; ++ ++ VDEBUG (dev, "%s queue req %p, len %d buf %p\n", ++ _ep->name, _req, _req->length, _req->buf); ++ ++ local_irq_save (flags); ++ ++ _req->status = -EINPROGRESS; ++ _req->actual = 0; ++ ++ if (list_empty (&ep->queue) && !ep->stopped) { ++ /* FIXME this does DMA mapping wrong. caller is allowed ++ * to provide buffers that don't need mapping, but this ++ * doesn't use them. ++ */ ++ if (ep == &ep->dev->ep[2]) { ++ PRINTKD("%s: sa1100_usb_send buf %p length %d\n",__FUNCTION__,_req->buf,_req->length); ++ sa1100_usb_send (_req, tx_callback); ++ } ++ else if (ep == &ep->dev->ep[1]) { ++ PRINTKD("%s: sa1100_usb_recv buf %p length %d\n",__FUNCTION__,_req->buf,_req->length); ++ sa1100_usb_recv (_req, rx_callback); ++ } ++ /* ep0 rx/tx is handled separately */ ++ } ++ list_add_tail (&req->queue, &ep->queue); ++ ++ local_irq_restore (flags); ++ ++ return 0; ++} ++ ++/* dequeue ALL requests */ ++static void nuke (struct sa1100_ep *ep, int status) ++{ ++ struct sa1100_request *req; ++ ++ /* called with irqs blocked */ ++ while (!list_empty (&ep->queue)) { ++ req = list_entry (ep->queue.next, ++ struct sa1100_request, ++ queue); ++ done (ep, req, status); ++ } ++ if (ep == &ep->dev->ep[1]) ++ ep1_reset (); ++ else if (ep == &ep->dev->ep[2]) ++ ep2_reset (); ++} ++ ++/* dequeue JUST ONE request */ ++static int sa1100_dequeue (struct usb_ep *_ep, struct usb_request *_req) ++{ ++ struct sa1100_ep *ep; ++ struct sa1100_request *req; ++ unsigned long flags; ++ ++ ep = container_of (_ep, struct sa1100_ep, ep); ++ if (!_ep || (!ep->desc && _ep->name != ep0name) || !_req) ++ return -EINVAL; ++ ++ local_irq_save (flags); ++ ++ /* make sure it's actually queued on this endpoint */ ++ list_for_each_entry (req, &ep->queue, queue) { ++ if (&req->req == _req) ++ break; ++ } ++ if (&req->req != _req) { ++ local_irq_restore(flags); ++ return -EINVAL; ++ } ++ ++ done(ep, req, -ECONNRESET); ++ ++ local_irq_restore(flags); ++ ++ return 0; ++} ++ ++/*-------------------------------------------------------------------------*/ ++ ++static int ++sa1100_set_halt (struct usb_ep *_ep, int value) ++{ ++ struct sa1100_ep *ep; ++ ++ ep = container_of (_ep, struct sa1100_ep, ep); ++ if (unlikely(!_ep ++ || (!ep->desc && _ep->name != ep0name)) ++ || (ep->desc->bmAttributes & 0x03) == USB_ENDPOINT_XFER_ISOC) ++ return -EINVAL; ++ if (!ep->dev->driver || ep->dev->gadget.speed == USB_SPEED_UNKNOWN) ++ return -ESHUTDOWN; ++ ++ VDEBUG (ep->dev, "%s %s halt\n", _ep->name, value ? "set" : "clear"); ++ ++ /* set/clear, then synch memory views with the device */ ++ if (value) { ++ if (ep == &ep->dev->ep[1]) ++ ep1_stall (); ++ else ++ ep2_stall (); ++ } else { ++ if (ep == &ep->dev->ep[1]) ++ ep1_reset (); ++ else ++ ep2_reset (); ++ } ++ ++ return 0; ++} ++ ++static struct usb_ep_ops sa1100_ep_ops = { ++ .enable = sa1100_enable, ++ .disable = sa1100_disable, ++ ++ .alloc_request = sa1100_alloc_request, ++ .free_request = sa1100_free_request, ++ ++ .queue = sa1100_queue, ++ .dequeue = sa1100_dequeue, ++ ++ .set_halt = sa1100_set_halt, ++ // .fifo_status = sa1100_fifo_status, ++ // .fifo_flush = sa1100_fifo_flush, ++}; ++ ++/*-------------------------------------------------------------------------*/ ++ ++static int sa1100_get_frame (struct usb_gadget *_gadget) ++{ ++ return -EOPNOTSUPP; ++} ++ ++static int sa1100_wakeup (struct usb_gadget *_gadget) ++{ ++ struct sa1100_udc *dev; ++ ++ if (!_gadget) ++ return 0; ++ dev = container_of (_gadget, struct sa1100_udc, gadget); ++ ++ // FIXME ++ ++ return 0; ++} ++ ++static const struct usb_gadget_ops sa1100_ops = { ++ .get_frame = sa1100_get_frame, ++ .wakeup = sa1100_wakeup, ++ ++ // .set_selfpowered = sa1100_set_selfpowered, ++}; ++ ++/*-------------------------------------------------------------------------*/ ++ ++static inline void enable_resume_mask_suspend (void) ++{ ++ int i = 0; ++ ++ while (1) { ++ Ser0UDCCR |= UDCCR_SUSIM; // mask future suspend events ++ udelay (i); ++ if ( (Ser0UDCCR & UDCCR_SUSIM) || (Ser0UDCSR & UDCSR_RSTIR)) ++ break; ++ if (++i == 50) { ++ WARN_ (&the_controller, "%s Could not set SUSIM %8.8lX\n", ++ __FUNCTION__, Ser0UDCCR); ++ break; ++ } ++ } ++ ++ i = 0; ++ while (1) { ++ Ser0UDCCR &= ~UDCCR_RESIM; ++ udelay (i); ++ if ( (Ser0UDCCR & UDCCR_RESIM) == 0 ++ || (Ser0UDCSR & UDCSR_RSTIR)) ++ break; ++ if (++i == 50) { ++ WARN_ (&the_controller, "%s Could not clear RESIM %8.8lX\n", ++ __FUNCTION__, Ser0UDCCR); ++ break; ++ } ++ } ++} ++ ++static inline void enable_suspend_mask_resume (void) ++{ ++ int i = 0; ++ while (1) { ++ Ser0UDCCR |= UDCCR_RESIM; // mask future resume events ++ udelay (i); ++ if (Ser0UDCCR & UDCCR_RESIM || (Ser0UDCSR & UDCSR_RSTIR)) ++ break; ++ if (++i == 50) { ++ WARN_ (&the_controller, "%s could not set RESIM %8.8lX\n", ++ __FUNCTION__, Ser0UDCCR); ++ break; ++ } ++ } ++ i = 0; ++ while (1) { ++ Ser0UDCCR &= ~UDCCR_SUSIM; ++ udelay (i); ++ if ( (Ser0UDCCR & UDCCR_SUSIM) == 0 ++ || (Ser0UDCSR & UDCSR_RSTIR)) ++ break; ++ if (++i == 50) { ++ WARN_ (&the_controller, "%s Could not clear SUSIM %8.8lX\n", ++ __FUNCTION__, Ser0UDCCR); ++ break; ++ } ++ } ++} ++ ++// HACK DEBUG 3Mar01ww ++// Well, maybe not, it really seems to help! 08Mar01ww ++static void core_kicker (void) ++{ ++ u32 car = Ser0UDCAR; ++ u32 imp = Ser0UDCIMP; ++ u32 omp = Ser0UDCOMP; ++ ++ UDC_set (Ser0UDCCR, UDCCR_UDD); ++ udelay (300); ++ UDC_clear (Ser0UDCCR, UDCCR_UDD); ++ ++ Ser0UDCAR = car; ++ Ser0UDCIMP = imp; ++ Ser0UDCOMP = omp; ++} ++ ++static irqreturn_t udc_int_hndlr(int irq, void *_dev) ++{ ++ struct sa1100_udc *dev = _dev; ++ u32 status = Ser0UDCSR; ++ ++ PRINTKD("%s: status = 0x%x and control = 0x%lx\n", __FUNCTION__, ++ status, Ser0UDCCR); ++ /* ReSeT Interrupt Request - UDC has been reset */ ++ if (status & UDCSR_RSTIR) { ++ PRINTKD("%s: processing UDCSR_RSTIR\n", __FUNCTION__); ++ if (usbctl_next_state_on_event(kEvReset) != kError) { ++ /* starting 20ms or so reset sequence now... */ ++ INFO (dev, "Resetting\n"); ++ ep0_reset(); // just set state to idle ++ ep1_reset(); // flush dma, clear false stall ++ ep2_reset(); // flush dma, clear false stall ++ } ++ // mask reset ints, they flood during sequence, enable ++ // suspend and resume ++ UDC_set(Ser0UDCCR, UDCCR_REM); // mask reset ++ UDC_clear(Ser0UDCCR, (UDCCR_SUSIM | UDCCR_RESIM)); // enable suspend and resume ++ UDC_flip(Ser0UDCSR, status); // clear all pending sources ++ PRINTKD("%s: setting USB_FULL_SPEED\n",__FUNCTION__); ++ dev->gadget.speed = USB_SPEED_FULL; ++ return IRQ_HANDLED; // NCB ++ } ++ ++ /* else we have done something other than reset, ++ * so be sure reset enabled ++ */ ++ UDC_clear(Ser0UDCCR, UDCCR_REM); ++ ++ /* RESume Interrupt Request */ ++ if (status & UDCSR_RESIR) { ++ struct usb_gadget_driver *driver = dev->driver; ++ ++ PRINTKD("%s: processing UDCSR_RESIR\n",__FUNCTION__); ++ if (driver->resume) ++ driver->resume (&dev->gadget); ++ core_kicker (); ++ enable_suspend_mask_resume (); ++ } ++ ++ /* SUSpend Interrupt Request */ ++ if (status & UDCSR_SUSIR) { ++ struct usb_gadget_driver *driver = dev->driver; ++ ++ PRINTKD("%s: processing UDCSR_SUSIR\n",__FUNCTION__); ++ if (driver->suspend) ++ driver->suspend (&dev->gadget); ++ enable_resume_mask_suspend (); ++ } ++ ++ UDC_flip(Ser0UDCSR, status); // clear all pending sources ++ ++ if (status & UDCSR_EIR) ++ PRINTKD("%s: processing ep0_int_hndlr\n",__FUNCTION__); ++ ep0_int_hndlr(); ++ ++ if (status & UDCSR_RIR) { ++ PRINTKD("%s: processing ep1_int_hndlr\n",__FUNCTION__); ++ ep1_int_hndlr(status); ++ } ++ if (status & UDCSR_TIR) { ++ PRINTKD("%s: processing ep2_int_hndlr\n",__FUNCTION__); ++ ep2_int_hndlr(status); ++ } ++ ++ return IRQ_HANDLED; // NCB ++} ++ ++/* soft_connect_hook () ++ * Some devices have platform-specific circuitry to make USB ++ * not seem to be plugged in, even when it is. This allows ++ * software to control when a device 'appears' on the USB bus ++ * (after Linux has booted and this driver has loaded, for ++ * example). If you have such a circuit, control it here. ++ */ ++#ifdef CONFIG_SA1100_EXTENEX1 ++static void soft_connect_hook(int enable) ++{ ++ if (machine_is_extenex1 ()) { ++ if (enable) { ++ PPDR |= PPC_USB_SOFT_CON; ++ PPSR |= PPC_USB_SOFT_CON; ++ } else { ++ PPSR &= ~PPC_USB_SOFT_CON; ++ PPDR &= ~PPC_USB_SOFT_CON; ++ } ++ } ++} ++#elif defined(CONFIG_SA1100_BALLOON) ++static void soft_connect_hook(int enable) ++{ ++ if (machine_is_balloon()) { ++ if (enable) ++ balloon_cpld_control(BALLOON_UDC_DISCONNECT, 0); ++ else ++ balloon_cpld_control(BALLOON_UDC_DISCONNECT, 1); ++ } ++} ++#elif defined(CONFIG_SA1100_COLLIE) ++static int collie_usb_init(void) ++{ ++ int rc; ++ rc = gpio_request(COLLIE_GPIO_LB_VOL_CHG, "usb enable"); ++ if (rc) ++ return rc; ++ ++ rc = gpio_direction_output(COLLIE_GPIO_LB_VOL_CHG, 1); ++ if (rc) ++ gpio_free(COLLIE_GPIO_LB_VOL_CHG); ++ ++ return rc; ++} ++ ++static void collie_set_usb(int enable) ++{ ++ gpio_set_value(COLLIE_GPIO_LB_VOL_CHG, enable); ++} ++ ++static void collie_usb_exit(void) ++{ ++ gpio_free(COLLIE_GPIO_LB_VOL_CHG); ++} ++ ++static void soft_connect_hook(int enable) ++{ ++ collie_set_usb(enable); ++} ++#else ++#define soft_connect_hook(x) do { } while (0); ++#endif ++ ++/* "function" sysfs attribute */ ++static ssize_t ++show_function(struct device *_dev, struct device_attribute *attr, char *buf) ++{ ++ struct sa1100_udc *dev = dev_get_drvdata (_dev); ++ ++ if (!dev->driver ++ || !dev->driver->function ++ || strlen(dev->driver->function) > PAGE_SIZE) ++ return 0; ++ return scnprintf (buf, PAGE_SIZE, "%s\n", dev->driver->function); ++} ++static DEVICE_ATTR(function, S_IRUGO, show_function, NULL); ++ ++/* disable the UDC at the source */ ++static void udc_disable(struct sa1100_udc *dev) ++{ ++ soft_connect_hook(0); ++ UDC_set(Ser0UDCCR, UDCCR_UDD); ++ dev->gadget.speed = USB_SPEED_UNKNOWN; ++ ep0_idle(dev); ++} ++ ++static void udc_reinit(struct sa1100_udc *dev) ++{ ++ u32 i; ++ ++ /* Initialize the gadget controller data structure */ ++ INIT_LIST_HEAD(&dev->gadget.ep_list); ++ INIT_LIST_HEAD(&dev->gadget.ep0->ep_list); ++ ep0_idle(dev); ++ for ( i = 0 ; i < 3 ; i++) { ++ struct sa1100_ep *ep = &dev->ep[i]; ++ if (i != 0) ++ list_add_tail(&ep->ep.ep_list, &dev->gadget.ep_list); ++ ep->desc = NULL; ++ ep->stopped = 0; ++ INIT_LIST_HEAD(&ep->queue); ++ } ++} ++ ++/* enable the udc at the source */ ++static void udc_enable(struct sa1100_udc *dev) ++{ ++ UDC_clear (Ser0UDCCR, UDCCR_UDD); ++ ep0_idle(dev); ++} ++ ++static void ep0_start(struct sa1100_udc *dev) ++{ ++ udc_enable(dev); ++ udelay(100); ++ ++ /* clear stall - receiver seems to start stalled? 19Jan01ww */ ++ /* also clear other stuff just to be thurough 22Feb01ww */ ++ UDC_clear(Ser0UDCCS1, UDCCS1_FST | UDCCS1_RPE | UDCCS1_RPC ); ++ UDC_clear(Ser0UDCCS2, UDCCS2_FST | UDCCS2_TPE | UDCCS2_TPC ); ++ ++ /* mask everything */ ++ Ser0UDCCR = 0xFC; ++ ++ /* flush DMA and fire through some -EAGAINs */ ++ ep1_init(dev->ep[1].dmaregs); ++ ep2_init(dev->ep[2].dmaregs); ++ ++ /* enable any platform specific hardware */ ++ soft_connect_hook(1); ++ ++ /* clear all top-level sources */ ++ Ser0UDCSR = UDCSR_RSTIR | UDCSR_RESIR | UDCSR_EIR | ++ UDCSR_RIR | UDCSR_TIR | UDCSR_SUSIR ; ++ ++ /* EXERIMENT - a short line in the spec says toggling this ++ * bit diddles the internal state machine in the udc to ++ * expect a suspend ++ */ ++ Ser0UDCCR |= UDCCR_RESIM; ++ /* END EXPERIMENT 10Feb01ww */ ++ ++ /* enable any platform specific hardware */ ++ soft_connect_hook(1); ++ ++ /* Enable interrupts. If you are unplugged you will immediately ++ * get a suspend interrupt. If you are plugged and have a soft ++ * connect-circuit, you will get a reset. If you are plugged ++ * without a soft-connect, I think you also get suspend. In short, ++ * start with suspend masked and everything else enabled ++ */ ++ UDC_write(Ser0UDCCR, UDCCR_SUSIM); ++} ++ ++ ++/* when a driver is successfully registered, it will receive ++ * control requests including set_configuration(), which enables ++ * non-control requests. then usb traffic follows until a ++ * disconnect is reported. then a host may connect again, or ++ * the driver might get unbound. ++ */ ++int usb_gadget_register_driver(struct usb_gadget_driver *driver) ++{ ++ struct sa1100_udc *dev = the_controller; ++ int retval; ++ ++ if (!driver || !driver->bind || !driver->setup) ++ return -EINVAL; ++ if (!dev) ++ return -ENODEV; ++ if (dev->driver) ++ return -EBUSY; ++ ++ /* hook up the driver ... */ ++ dev->driver = driver; ++ dev->gadget.dev.driver = &driver->driver; ++ ++ retval = device_add(&dev->gadget.dev); ++ if (retval != 0) { ++ printk(KERN_ERR "Error in device_add() : %d\n",retval); ++ goto register_error; ++ } ++ ++ retval = driver->bind (&dev->gadget); ++ if (retval != 0) { ++ DEBUG(dev, "bind to driver %s --> %d\n", ++ driver->driver.name, retval); ++ device_del(&dev->gadget.dev); ++ goto register_error; ++ } ++ ++ retval = device_create_file(dev->dev, &dev_attr_function); ++ ++ /* ... then enable host detection and ep0; and we're ready ++ * for set_configuration as well as eventual disconnect. ++ */ ++ ep0_start(dev); ++ ++ DEBUG(dev, "%s ready\n", driver->driver.name); ++ ++ return 0; ++ ++register_error: ++ dev->driver = NULL; ++ dev->gadget.dev.driver = NULL; ++ return retval; ++} ++EXPORT_SYMBOL (usb_gadget_register_driver); ++ ++static void ++stop_activity(struct sa1100_udc *dev, struct usb_gadget_driver *driver) ++{ ++ int i; ++ ++ /* don't disconnect if it's not connected */ ++ if (dev->gadget.speed == USB_SPEED_UNKNOWN) ++ driver = NULL; ++ dev->gadget.speed = USB_SPEED_UNKNOWN; ++ ++ /* mask everything */ ++ Ser0UDCCR = 0xFC; ++ ++ /* stop hardware; prevent new request submissions; ++ * and kill any outstanding requests. ++ */ ++ for (i = 0; i < 3; i++) { ++ struct sa1100_ep *ep = &dev->ep[i]; ++ ep->stopped = 1; ++ nuke(ep, -ESHUTDOWN); ++ } ++ udc_disable (dev); ++ ++ /* report disconnect; the driver is already quiesced */ ++ if (driver) ++ driver->disconnect(&dev->gadget); ++ ++ /* re-init driver-visible data structures */ ++ udc_reinit(dev); ++} ++ ++int usb_gadget_unregister_driver(struct usb_gadget_driver *driver) ++{ ++ struct sa1100_udc *dev = the_controller; ++ ++ if (!dev) ++ return -ENODEV; ++ if (!driver || driver != dev->driver) ++ return -EINVAL; ++ ++ local_irq_disable(); ++ stop_activity (dev, driver); ++ local_irq_enable(); ++ if (driver->unbind) ++ driver->unbind(&dev->gadget); ++ dev->driver = 0; ++ ++ device_del(&dev->gadget.dev); ++ device_remove_file(dev->dev, &dev_attr_function); ++ ++ DEBUG (dev, "unregistered driver '%s'\n", driver->driver.name); ++ return 0; ++} ++EXPORT_SYMBOL (usb_gadget_unregister_driver); ++ ++ ++/*-------------------------------------------------------------------------*/ ++ ++/*-------------------------------------------------------------------------*/ ++ ++////////////////////////////////////////////////////////////////////////////// ++// Proc Filesystem Support ++////////////////////////////////////////////////////////////////////////////// ++ ++#if CONFIG_PROC_FS ++ ++#define SAY(fmt,args...) p += sprintf (p, fmt, ## args) ++#define SAYV(num) p += sprintf (p, num_fmt, "Value", num) ++#define SAYC(label,yn) p += sprintf (p, yn_fmt, label, yn) ++#define SAYS(label,v) p += sprintf (p, cnt_fmt, label, v) ++ ++static int usbctl_read_proc (char *page, char **start, off_t off, ++ int count, int *eof, void *data) ++{ ++ const char * num_fmt = "%25.25s: %8.8lX\n"; ++ const char * cnt_fmt = "%25.25s: %lu\n"; ++ const char * yn_fmt = "%25.25s: %s\n"; ++ const char * yes = "YES"; ++ const char * no = "NO"; ++ unsigned long v; ++ char * p = page; ++ int len; ++ ++ SAY ("SA1100 USB Controller Core\n"); ++ ++ SAYS ("ep0 bytes read", usbd_info.stats.ep0_bytes_read); ++ SAYS ("ep0 bytes written", usbd_info.stats.ep0_bytes_written); ++ SAYS ("ep0 FIFO read failures", usbd_info.stats.ep0_fifo_read_failures); ++ SAYS ("ep0 FIFO write failures", usbd_info.stats.ep0_fifo_write_failures); ++ ++ SAY ("\n"); ++ ++ v = Ser0UDCAR; ++ SAY ("%25.25s: 0x%8.8lX - %ld\n", "Address Register", v, v); ++ v = Ser0UDCIMP; ++ SAY ("%25.25s: %ld (%8.8lX)\n", "IN max packet size", v+1, v); ++ v = Ser0UDCOMP; ++ SAY ("%25.25s: %ld (%8.8lX)\n", "OUT max packet size", v+1, v); ++ ++ v = Ser0UDCCR; ++ SAY ("\nUDC Mask Register\n"); ++ SAYV (v); ++ SAYC ("UDC Active", (v & UDCCR_UDA) ? yes : no); ++ SAYC ("Suspend interrupts masked", (v & UDCCR_SUSIM) ? yes : no); ++ SAYC ("Resume interrupts masked", (v & UDCCR_RESIM) ? yes : no); ++ SAYC ("Reset interrupts masked", (v & UDCCR_REM) ? yes : no); ++ ++ v = Ser0UDCSR; ++ SAY ("\nUDC Interrupt Request Register\n"); ++ SAYV (v); ++ SAYC ("Reset pending", (v & UDCSR_RSTIR) ? yes : no); ++ SAYC ("Suspend pending", (v & UDCSR_SUSIR) ? yes : no); ++ SAYC ("Resume pending", (v & UDCSR_RESIR) ? yes : no); ++ SAYC ("ep0 pending", (v & UDCSR_EIR) ? yes : no); ++ SAYC ("receiver pending", (v & UDCSR_RIR) ? yes : no); ++ SAYC ("tramsitter pending", (v & UDCSR_TIR) ? yes : no); ++ ++#ifdef CONFIG_SA1100_EXTENEX1 ++ SAYC ("\nSoft connect", (PPSR & PPC_USB_SOFT_CON) ? "Visible" : "Hidden"); ++#endif ++ ++#if 1 ++ SAY ("\nDMA Tx registers\n"); ++ { ++ dma_regs_t *r=the_controller->ep[2].dmaregs; ++ SAY (" DDAR"); ++ SAYV(r->DDAR); ++ SAY (" DCSR"); ++ SAYV(r->RdDCSR); ++ SAY (" DBSA (address buf A) "); ++ SAYV(r->DBSA); ++ SAY (" DBTA (transfer count A) "); ++ SAYV(r->DBTA); ++ SAY (" DBSB (address buf B) "); ++ SAYV(r->DBSB); ++ SAY (" DBTB (transfer count B) "); ++ SAYV(r->DBTB); ++ ++ } ++ SAY ("\nDMA Rx registers\n"); ++ { ++ dma_regs_t *r=the_controller->ep[1].dmaregs; ++ SAY (" DDAR"); ++ SAYV(r->DDAR); ++ SAY (" DCSR"); ++ SAYV(r->RdDCSR); ++ SAY (" DBSA (address buf A) "); ++ SAYV(r->DBSA); ++ SAY (" DBTA (transfer count A) "); ++ SAYV(r->DBTA); ++ SAY (" DBSB (address buf B) "); ++ SAYV(r->DBSB); ++ SAY (" DBTB (transfer count B) "); ++ SAYV(r->DBTB); ++ ++ } ++#endif ++#if 1 ++ v = Ser0UDCCS0; ++ SAY ("\nUDC Endpoint Zero Status Register\n"); ++ SAYV (v); ++ SAYC ("Out Packet Ready", (v & UDCCS0_OPR) ? yes : no); ++ SAYC ("In Packet Ready", (v & UDCCS0_IPR) ? yes : no); ++ SAYC ("Sent Stall", (v & UDCCS0_SST) ? yes : no); ++ SAYC ("Force Stall", (v & UDCCS0_FST) ? yes : no); ++ SAYC ("Data End", (v & UDCCS0_DE) ? yes : no); ++ SAYC ("Data Setup End", (v & UDCCS0_SE) ? yes : no); ++ SAYC ("Serviced (SO)", (v & UDCCS0_SO) ? yes : no); ++ ++ v = Ser0UDCCS1; ++ SAY ("\nUDC Receiver Status Register\n"); ++ SAYV (v); ++ SAYC ("Receive Packet Complete", (v & UDCCS1_RPC) ? yes : no); ++ SAYC ("Sent Stall", (v & UDCCS1_SST) ? yes : no); ++ SAYC ("Force Stall", (v & UDCCS1_FST) ? yes : no); ++ SAYC ("Receive Packet Error", (v & UDCCS1_RPE) ? yes : no); ++ SAYC ("Receive FIFO not empty", (v & UDCCS1_RNE) ? yes : no); ++ ++ v = Ser0UDCCS2; ++ SAY ("\nUDC Transmitter Status Register\n"); ++ SAYV (v); ++ SAYC ("FIFO has < 8 of 16 chars", (v & UDCCS2_TFS) ? yes : no); ++ SAYC ("Transmit Packet Complete", (v & UDCCS2_TPC) ? yes : no); ++ SAYC ("Transmit FIFO underrun", (v & UDCCS2_TUR) ? yes : no); ++ SAYC ("Transmit Packet Error", (v & UDCCS2_TPE) ? yes : no); ++ SAYC ("Sent Stall", (v & UDCCS2_SST) ? yes : no); ++ SAYC ("Force Stall", (v & UDCCS2_FST) ? yes : no); ++#endif ++ ++ len = (p - page) - off; ++ if (len < 0) ++ len = 0; ++ *eof = (len <=count) ? 1 : 0; ++ *start = page + off; ++ return len; ++} ++ ++static inline void register_proc_entry (void) ++{ ++ create_proc_read_entry (driver_name, 0, NULL, ++ usbctl_read_proc, NULL); ++} ++ ++static inline void unregister_proc_entry (void) ++{ ++ remove_proc_entry (driver_name, NULL); ++} ++ ++#else ++ ++#define register_proc_entry() do {} while (0) ++#define unregister_proc_entry() do {} while (0) ++ ++#endif /* CONFIG_PROC_FS */ ++ ++/*-------------------------------------------------------------------------*/ ++ ++MODULE_DESCRIPTION ("sa1100_udc"); ++MODULE_AUTHOR ("Various"); ++MODULE_LICENSE ("GPL"); ++ ++static struct sa1100_udc memory = { ++ .gadget = { ++ .ops = &sa1100_ops, ++ .ep0 = &memory.ep[0].ep, ++ .name = driver_name, ++ .dev = { ++ .bus_id = "gadget", ++ }, ++ }, ++ ++ /* control endpoint */ ++ .ep[0] = { ++ .ep = { ++ .name = ep0name, ++ .ops = &sa1100_ep_ops, ++ .maxpacket = EP0_FIFO_SIZE, ++ }, ++ .dev = &memory, ++ }, ++ ++ /* first group of endpoints */ ++ .ep[1] = { ++ .ep = { ++ .name = "ep1out-bulk", ++ .ops = &sa1100_ep_ops, ++ .maxpacket = BULK_FIFO_SIZE, ++ }, ++ .dev = &memory, ++ }, ++ .ep[2] = { ++ .ep = { ++ .name = "ep2in-bulk", ++ .ops = &sa1100_ep_ops, ++ .maxpacket = BULK_FIFO_SIZE, ++ }, ++ .dev = &memory, ++ } ++}; ++ ++static int __init sa1100_udc_probe(struct device *_dev) ++{ ++ struct sa1100_udc *dev = &memory; ++ int retval = 0; ++ ++ /* setup dev */ ++ dev->dev = _dev; ++// dev->mach = _dev->platform_data; ++ ++ device_initialize(&dev->gadget.dev); ++ dev->gadget.dev.parent = _dev; ++ dev->gadget.dev.dma_mask = _dev->dma_mask; ++ ++ the_controller = dev; ++ dev_set_drvdata(_dev, dev); ++ ++ /* controller stays disabled until gadget driver is bound */ ++ udc_disable(dev); ++ udc_reinit(dev); ++ ++// spin_lock_init(&the_udc.lock); ++ register_proc_entry(); ++ ++#if defined(CONFIG_SA1100_COLLIE) ++ collie_usb_init(); ++#endif ++ ++ /* setup dma channels and IRQ */ ++ retval = sa1100_request_dma(DMA_Ser0UDCRd, "USB receive", ++ NULL, NULL, &dev->ep[1].dmaregs); ++ if (retval) { ++ ERROR(dev, "couldn't get rx dma, err %d\n", retval); ++ goto err_rx_dma; ++ } ++ retval = sa1100_request_dma(DMA_Ser0UDCWr, "USB transmit", ++ NULL, NULL, &dev->ep[2].dmaregs); ++ if (retval) { ++ ERROR(dev, "couldn't get tx dma, err %d\n", retval); ++ goto err_tx_dma; ++ } ++ retval = request_irq(IRQ_Ser0UDC, udc_int_hndlr, IRQF_DISABLED, ++ driver_name, dev); ++ if (retval) { ++ ERROR(dev, "couldn't get irq, err %d\n", retval); ++ goto err_irq; ++ } ++ ++ INFO(dev, "initialized, rx %p tx %p irq %d\n", ++ dev->ep[1].dmaregs, dev->ep[2].dmaregs, IRQ_Ser0UDC); ++ return 0; ++ ++err_irq: ++ sa1100_free_dma(dev->ep[2].dmaregs); ++ usbd_info.dmaregs_rx = 0; ++err_tx_dma: ++ sa1100_free_dma(dev->ep[1].dmaregs); ++ usbd_info.dmaregs_tx = 0; ++err_rx_dma: ++ return retval; ++} ++ ++static int __exit sa1100_udc_remove(struct device *_dev) ++{ ++ struct sa1100_udc *dev = dev_get_drvdata(_dev); ++ ++ udc_disable(dev); ++ unregister_proc_entry(); ++ usb_gadget_unregister_driver(dev->driver); ++ sa1100_free_dma(dev->ep[1].dmaregs); ++ sa1100_free_dma(dev->ep[2].dmaregs); ++ free_irq(IRQ_Ser0UDC, dev); ++ dev_set_drvdata(_dev,NULL); ++ the_controller = NULL; ++#if defined(CONFIG_SA1100_COLLIE) ++ collie_usb_exit(); ++#endif ++ return 0; ++} ++ ++static struct device_driver udc_driver = { ++ .name = "sa11x0-udc", ++ .bus = &platform_bus_type, ++ .probe = sa1100_udc_probe, ++ .remove = __exit_p(sa1100_udc_remove), ++// .suspend = sa1100_udc_suspend, ++// .resume = sa1100_udc_resume, ++ .owner = THIS_MODULE, ++}; ++ ++static int __init udc_init(void) ++{ ++ printk(KERN_INFO "%s: version %s\n", driver_name, DRIVER_VERSION); ++#ifdef NCB_DMA_FIX ++ send_buffer = (char*) kzalloc(SEND_BUFFER_SIZE, GFP_KERNEL | GFP_DMA ); ++ receive_buffer = (char*) kzalloc(RECEIVE_BUFFER_SIZE, GFP_KERNEL | GFP_DMA ); ++#endif ++ return driver_register(&udc_driver); ++} ++module_init(udc_init); ++ ++static void __exit udc_exit(void) ++{ ++#ifdef NCB_DMA_FIX ++ if (send_buffer) { ++ kfree(send_buffer); ++ send_buffer = NULL; ++ } ++ if (receive_buffer) { ++ kfree(receive_buffer); ++ receive_buffer = NULL; ++ } ++#endif ++ driver_unregister(&udc_driver); ++} ++module_exit(udc_exit); +diff --git a/drivers/usb/gadget/sa1100_udc.h b/drivers/usb/gadget/sa1100_udc.h +new file mode 100644 +index 0000000..86fa28d +--- /dev/null ++++ b/drivers/usb/gadget/sa1100_udc.h +@@ -0,0 +1,94 @@ ++/* ++ * internals of "new style" UDC controller ++ * <linux/usb_gadget.h> replaces ARM-specific "sa1100_usb.h". ++ */ ++ ++struct sa1100_ep { ++ struct usb_ep ep; ++ struct sa1100_udc *dev; ++ //unsigned long irqs; ++ ++ const struct usb_endpoint_descriptor *desc; ++ struct list_head queue; ++ dma_regs_t *dmaregs; ++ unsigned stopped : 1; ++}; ++ ++struct sa1100_request { ++ struct usb_request req; ++ struct list_head queue; ++// NCB unsigned mapped : 1; ++}; ++ ++enum ep0_state { ++ EP0_IDLE, ++ EP0_IN_DATA_PHASE, ++ EP0_OUT_DATA_PHASE, ++ EP0_END_XFER, ++ EP0_STALL, ++}; ++ ++#define EP0_FIFO_SIZE ((unsigned)8) ++#define BULK_FIFO_SIZE ((unsigned)64) ++//#define ISO_FIFO_SIZE ((unsigned)256) ++//#define INT_FIFO_SIZE ((unsigned)8) ++ ++struct udc_stats { ++ struct ep0stats { ++ unsigned long ops; ++ unsigned long bytes; ++ } read, write; ++ unsigned long irqs; ++}; ++ ++struct sa1100_udc { ++ struct usb_gadget gadget; ++ struct usb_gadget_driver *driver; ++ struct device *dev; ++ enum ep0_state ep0state; ++ struct udc_stats stats; ++// NCB spinlock_t lock; ++// NCB dma_regs_t *dmaregs_tx, *dmaregs_rx; ++ unsigned got_irq : 1, ++ vbus : 1, ++ pullup : 1, ++ has_cfr : 1, ++ req_pending : 1, ++ req_std : 1, ++ req_config : 1; ++ struct timer_list timer; ++ u64 dma_mask; ++ unsigned char address; ++ struct sa1100_ep ep[3]; ++ int ep0_req_len; ++}; ++ ++/*-------------------------------------------------------------------------*/ ++ ++#define xprintk(dev,level,fmt,args...) \ ++ printk(level "%s: " fmt , driver_name , ## args) ++ ++#ifdef DEBUG ++#undef DEBUG ++#define DEBUG(dev,fmt,args...) \ ++ xprintk(dev , KERN_DEBUG , fmt , ## args) ++#else ++#define DEBUG(dev,fmt,args...) \ ++ do { } while (0) ++#endif /* DEBUG */ ++ ++#ifdef VERBOSE ++#define VDEBUG DEBUG ++#else ++#define VDEBUG(dev,fmt,args...) \ ++ do { } while (0) ++#endif /* VERBOSE */ ++ ++#define ERROR(dev,fmt,args...) \ ++ xprintk(dev , KERN_ERR , fmt , ## args) ++#define WARN_(dev,fmt,args...) \ ++ xprintk(dev , KERN_WARNING , fmt , ## args) ++#define INFO(dev,fmt,args...) \ ++ xprintk(dev , KERN_INFO , fmt , ## args)
++ ++/*-------------------------------------------------------------------------*/ +-- +1.5.6.5 + diff --git a/packages/linux/linux-2.6.28/collie/0010-mmc_spi-add-suspend-and-resume-callbacks.patch b/packages/linux/linux-2.6.28/collie/0010-mmc_spi-add-suspend-and-resume-callbacks.patch new file mode 100644 index 0000000000..fbf1b4573b --- /dev/null +++ b/packages/linux/linux-2.6.28/collie/0010-mmc_spi-add-suspend-and-resume-callbacks.patch @@ -0,0 +1,59 @@ +From 53fc40876ed9b753f935361fb1027718a184c41e Mon Sep 17 00:00:00 2001 +From: Thomas Kunze <thommycheck@gmx.de> +Date: Thu, 5 Feb 2009 00:49:03 +0100 +Subject: [PATCH 10/23] mmc_spi: add suspend and resume callbacks + +--- + drivers/mmc/host/mmc_spi.c | 29 +++++++++++++++++++++++++++++ + 1 files changed, 29 insertions(+), 0 deletions(-) + +diff --git a/drivers/mmc/host/mmc_spi.c b/drivers/mmc/host/mmc_spi.c +index ad00e16..ac6719b 100644 +--- a/drivers/mmc/host/mmc_spi.c ++++ b/drivers/mmc/host/mmc_spi.c +@@ -1407,6 +1407,33 @@ static int __devexit mmc_spi_remove(struct spi_device *spi) + return 0; + } + ++#ifdef CONFIG_PM ++static int mmc_spi_suspend(struct spi_device *spi, pm_message_t state) ++{ ++ struct mmc_host *mmc = dev_get_drvdata(&spi->dev); ++ struct mmc_spi_host *host = mmc_priv(mmc); ++ int ret = 0; ++ ++ if (mmc) ++ ret = mmc_suspend_host(mmc, state); ++ return ret; ++} ++ ++static int mmc_spi_resume(struct spi_device *spi) ++{ ++ struct mmc_host *mmc = dev_get_drvdata(&spi->dev); ++ int ret = 0; ++ ++ if (mmc) ++ ret = mmc_resume_host(mmc); ++ ++ return ret; ++} ++#else ++#define mmc_spi_suspend NULL ++#define mmc_spi_resume NULL ++#endif ++ + + static struct spi_driver mmc_spi_driver = { + .driver = { +@@ -1416,6 +1443,8 @@ static struct spi_driver mmc_spi_driver = { + }, + .probe = mmc_spi_probe, + .remove = __devexit_p(mmc_spi_remove), ++ .suspend = mmc_spi_suspend, ++ .resume = mmc_spi_resume, + }; + + +-- +1.5.6.5 + diff --git a/packages/linux/linux-2.6.28/collie/0011-move-drivers-mfd-.h-to-include-linux-mfd.patch b/packages/linux/linux-2.6.28/collie/0011-move-drivers-mfd-.h-to-include-linux-mfd.patch new file mode 100644 index 0000000000..0bc3dbb713 --- /dev/null +++ b/packages/linux/linux-2.6.28/collie/0011-move-drivers-mfd-.h-to-include-linux-mfd.patch @@ -0,0 +1,803 @@ +From c69779dac8693a3b057b3708d19f7013c6973bf2 Mon Sep 17 00:00:00 2001 +From: Thomas Kunze <thommycheck@gmx.de> +Date: Tue, 10 Feb 2009 14:54:57 +0100 +Subject: [PATCH 11/23] move drivers/mfd/*.h to include/linux/mfd + +So drivers like collie_battery driver can use +those files easier. +--- + arch/arm/mach-sa1100/collie_pm.c | 2 +- + drivers/mfd/mcp-core.c | 2 +- + drivers/mfd/mcp-sa11x0.c | 2 +- + drivers/mfd/mcp.h | 66 ---------- + drivers/mfd/ucb1x00-assabet.c | 2 +- + drivers/mfd/ucb1x00-core.c | 2 +- + drivers/mfd/ucb1x00-ts.c | 2 +- + drivers/mfd/ucb1x00.h | 255 -------------------------------------- + include/linux/mfd/mcp.h | 68 ++++++++++ + include/linux/mfd/ucb1x00.h | 255 ++++++++++++++++++++++++++++++++++++++ + 10 files changed, 329 insertions(+), 327 deletions(-) + delete mode 100644 drivers/mfd/mcp.h + delete mode 100644 drivers/mfd/ucb1x00.h + create mode 100644 include/linux/mfd/mcp.h + create mode 100644 include/linux/mfd/ucb1x00.h + +diff --git a/arch/arm/mach-sa1100/collie_pm.c b/arch/arm/mach-sa1100/collie_pm.c +index b1161fc..65b8b31 100644 +--- a/arch/arm/mach-sa1100/collie_pm.c ++++ b/arch/arm/mach-sa1100/collie_pm.c +@@ -22,6 +22,7 @@ + #include <linux/interrupt.h> + #include <linux/device.h> + #include <linux/platform_device.h> ++#include <linux/mfd/ucb1x00.h> + + #include <asm/irq.h> + #include <mach/hardware.h> +@@ -31,7 +32,6 @@ + #include <asm/mach/sharpsl_param.h> + #include <asm/hardware/sharpsl_pm.h> + +-#include "../drivers/mfd/ucb1x00.h" + + static struct ucb1x00 *ucb; + static int ad_revise; +diff --git a/drivers/mfd/mcp-core.c b/drivers/mfd/mcp-core.c +index b4ed57e..64c806a 100644 +--- a/drivers/mfd/mcp-core.c ++++ b/drivers/mfd/mcp-core.c +@@ -17,11 +17,11 @@ + #include <linux/device.h> + #include <linux/slab.h> + #include <linux/string.h> ++#include <linux/mfd/mcp.h> + + #include <asm/dma.h> + #include <asm/system.h> + +-#include "mcp.h" + + #define to_mcp(d) container_of(d, struct mcp, attached_device) + #define to_mcp_driver(d) container_of(d, struct mcp_driver, drv) +diff --git a/drivers/mfd/mcp-sa11x0.c b/drivers/mfd/mcp-sa11x0.c +index 28380b2..88c81cf 100644 +--- a/drivers/mfd/mcp-sa11x0.c ++++ b/drivers/mfd/mcp-sa11x0.c +@@ -19,6 +19,7 @@ + #include <linux/spinlock.h> + #include <linux/slab.h> + #include <linux/platform_device.h> ++#include <linux/mfd/mcp.h> + + #include <asm/dma.h> + #include <mach/hardware.h> +@@ -28,7 +29,6 @@ + + #include <mach/assabet.h> + +-#include "mcp.h" + + struct mcp_sa11x0 { + u32 mccr0; +diff --git a/drivers/mfd/mcp.h b/drivers/mfd/mcp.h +deleted file mode 100644 +index c093a93..0000000 +--- a/drivers/mfd/mcp.h ++++ /dev/null +@@ -1,66 +0,0 @@ +-/* +- * linux/drivers/mfd/mcp.h +- * +- * Copyright (C) 2001 Russell King, All Rights Reserved. +- * +- * This program is free software; you can redistribute it and/or modify +- * it under the terms of the GNU General Public License as published by +- * the Free Software Foundation; either version 2 of the License. +- */ +-#ifndef MCP_H +-#define MCP_H +- +-struct mcp_ops; +- +-struct mcp { +- struct module *owner; +- struct mcp_ops *ops; +- spinlock_t lock; +- int use_count; +- unsigned int sclk_rate; +- unsigned int rw_timeout; +- dma_device_t dma_audio_rd; +- dma_device_t dma_audio_wr; +- dma_device_t dma_telco_rd; +- dma_device_t dma_telco_wr; +- struct device attached_device; +-}; +- +-struct mcp_ops { +- void (*set_telecom_divisor)(struct mcp *, unsigned int); +- void (*set_audio_divisor)(struct mcp *, unsigned int); +- void (*reg_write)(struct mcp *, unsigned int, unsigned int); +- unsigned int (*reg_read)(struct mcp *, unsigned int); +- void (*enable)(struct mcp *); +- void (*disable)(struct mcp *); +-}; +- +-void mcp_set_telecom_divisor(struct mcp *, unsigned int); +-void mcp_set_audio_divisor(struct mcp *, unsigned int); +-void mcp_reg_write(struct mcp *, unsigned int, unsigned int); +-unsigned int mcp_reg_read(struct mcp *, unsigned int); +-void mcp_enable(struct mcp *); +-void mcp_disable(struct mcp *); +-#define mcp_get_sclk_rate(mcp) ((mcp)->sclk_rate) +- +-struct mcp *mcp_host_alloc(struct device *, size_t); +-int mcp_host_register(struct mcp *); +-void mcp_host_unregister(struct mcp *); +- +-struct mcp_driver { +- struct device_driver drv; +- int (*probe)(struct mcp *); +- void (*remove)(struct mcp *); +- int (*suspend)(struct mcp *, pm_message_t); +- int (*resume)(struct mcp *); +-}; +- +-int mcp_driver_register(struct mcp_driver *); +-void mcp_driver_unregister(struct mcp_driver *); +- +-#define mcp_get_drvdata(mcp) dev_get_drvdata(&(mcp)->attached_device) +-#define mcp_set_drvdata(mcp,d) dev_set_drvdata(&(mcp)->attached_device, d) +- +-#define mcp_priv(mcp) ((void *)((mcp)+1)) +- +-#endif +diff --git a/drivers/mfd/ucb1x00-assabet.c b/drivers/mfd/ucb1x00-assabet.c +index 61aeaf7..0f6f46d 100644 +--- a/drivers/mfd/ucb1x00-assabet.c ++++ b/drivers/mfd/ucb1x00-assabet.c +@@ -14,10 +14,10 @@ + #include <linux/fs.h> + #include <linux/proc_fs.h> + #include <linux/device.h> ++#include <linux/mfd/ucb1x00.h> + + #include <asm/dma.h> + +-#include "ucb1x00.h" + + #define UCB1X00_ATTR(name,input)\ + static ssize_t name##_show(struct device *dev, struct device_attribute *attr, \ +diff --git a/drivers/mfd/ucb1x00-core.c b/drivers/mfd/ucb1x00-core.c +index a316f1b..bc2c1ba 100644 +--- a/drivers/mfd/ucb1x00-core.c ++++ b/drivers/mfd/ucb1x00-core.c +@@ -24,11 +24,11 @@ + #include <linux/interrupt.h> + #include <linux/device.h> + #include <linux/mutex.h> ++#include <linux/mfd/ucb1x00.h> + + #include <asm/dma.h> + #include <mach/hardware.h> + +-#include "ucb1x00.h" + + static DEFINE_MUTEX(ucb1x00_mutex); + static LIST_HEAD(ucb1x00_drivers); +diff --git a/drivers/mfd/ucb1x00-ts.c b/drivers/mfd/ucb1x00-ts.c +index 44762ca..b5feae9 100644 +--- a/drivers/mfd/ucb1x00-ts.c ++++ b/drivers/mfd/ucb1x00-ts.c +@@ -30,12 +30,12 @@ + #include <linux/freezer.h> + #include <linux/slab.h> + #include <linux/kthread.h> ++#include <linux/mfd/ucb1x00.h> + + #include <asm/dma.h> + #include <mach/collie.h> + #include <asm/mach-types.h> + +-#include "ucb1x00.h" + + + struct ucb1x00_ts { +diff --git a/drivers/mfd/ucb1x00.h b/drivers/mfd/ucb1x00.h +deleted file mode 100644 +index a8ad8a0..0000000 +--- a/drivers/mfd/ucb1x00.h ++++ /dev/null +@@ -1,255 +0,0 @@ +-/* +- * linux/drivers/mfd/ucb1x00.h +- * +- * Copyright (C) 2001 Russell King, All Rights Reserved. +- * +- * This program is free software; you can redistribute it and/or modify +- * it under the terms of the GNU General Public License as published by +- * the Free Software Foundation; either version 2 of the License. +- */ +-#ifndef UCB1200_H +-#define UCB1200_H +- +-#define UCB_IO_DATA 0x00 +-#define UCB_IO_DIR 0x01 +- +-#define UCB_IO_0 (1 << 0) +-#define UCB_IO_1 (1 << 1) +-#define UCB_IO_2 (1 << 2) +-#define UCB_IO_3 (1 << 3) +-#define UCB_IO_4 (1 << 4) +-#define UCB_IO_5 (1 << 5) +-#define UCB_IO_6 (1 << 6) +-#define UCB_IO_7 (1 << 7) +-#define UCB_IO_8 (1 << 8) +-#define UCB_IO_9 (1 << 9) +- +-#define UCB_IE_RIS 0x02 +-#define UCB_IE_FAL 0x03 +-#define UCB_IE_STATUS 0x04 +-#define UCB_IE_CLEAR 0x04 +-#define UCB_IE_ADC (1 << 11) +-#define UCB_IE_TSPX (1 << 12) +-#define UCB_IE_TSMX (1 << 13) +-#define UCB_IE_TCLIP (1 << 14) +-#define UCB_IE_ACLIP (1 << 15) +- +-#define UCB_IRQ_TSPX 12 +- +-#define UCB_TC_A 0x05 +-#define UCB_TC_A_LOOP (1 << 7) /* UCB1200 */ +-#define UCB_TC_A_AMPL (1 << 7) /* UCB1300 */ +- +-#define UCB_TC_B 0x06 +-#define UCB_TC_B_VOICE_ENA (1 << 3) +-#define UCB_TC_B_CLIP (1 << 4) +-#define UCB_TC_B_ATT (1 << 6) +-#define UCB_TC_B_SIDE_ENA (1 << 11) +-#define UCB_TC_B_MUTE (1 << 13) +-#define UCB_TC_B_IN_ENA (1 << 14) +-#define UCB_TC_B_OUT_ENA (1 << 15) +- +-#define UCB_AC_A 0x07 +-#define UCB_AC_B 0x08 +-#define UCB_AC_B_LOOP (1 << 8) +-#define UCB_AC_B_MUTE (1 << 13) +-#define UCB_AC_B_IN_ENA (1 << 14) +-#define UCB_AC_B_OUT_ENA (1 << 15) +- +-#define UCB_TS_CR 0x09 +-#define UCB_TS_CR_TSMX_POW (1 << 0) +-#define UCB_TS_CR_TSPX_POW (1 << 1) +-#define UCB_TS_CR_TSMY_POW (1 << 2) +-#define UCB_TS_CR_TSPY_POW (1 << 3) +-#define UCB_TS_CR_TSMX_GND (1 << 4) +-#define UCB_TS_CR_TSPX_GND (1 << 5) +-#define UCB_TS_CR_TSMY_GND (1 << 6) +-#define UCB_TS_CR_TSPY_GND (1 << 7) +-#define UCB_TS_CR_MODE_INT (0 << 8) +-#define UCB_TS_CR_MODE_PRES (1 << 8) +-#define UCB_TS_CR_MODE_POS (2 << 8) +-#define UCB_TS_CR_BIAS_ENA (1 << 11) +-#define UCB_TS_CR_TSPX_LOW (1 << 12) +-#define UCB_TS_CR_TSMX_LOW (1 << 13) +- +-#define UCB_ADC_CR 0x0a +-#define UCB_ADC_SYNC_ENA (1 << 0) +-#define UCB_ADC_VREFBYP_CON (1 << 1) +-#define UCB_ADC_INP_TSPX (0 << 2) +-#define UCB_ADC_INP_TSMX (1 << 2) +-#define UCB_ADC_INP_TSPY (2 << 2) +-#define UCB_ADC_INP_TSMY (3 << 2) +-#define UCB_ADC_INP_AD0 (4 << 2) +-#define UCB_ADC_INP_AD1 (5 << 2) +-#define UCB_ADC_INP_AD2 (6 << 2) +-#define UCB_ADC_INP_AD3 (7 << 2) +-#define UCB_ADC_EXT_REF (1 << 5) +-#define UCB_ADC_START (1 << 7) +-#define UCB_ADC_ENA (1 << 15) +- +-#define UCB_ADC_DATA 0x0b +-#define UCB_ADC_DAT_VAL (1 << 15) +-#define UCB_ADC_DAT(x) (((x) & 0x7fe0) >> 5) +- +-#define UCB_ID 0x0c +-#define UCB_ID_1200 0x1004 +-#define UCB_ID_1300 0x1005 +-#define UCB_ID_TC35143 0x9712 +- +-#define UCB_MODE 0x0d +-#define UCB_MODE_DYN_VFLAG_ENA (1 << 12) +-#define UCB_MODE_AUD_OFF_CAN (1 << 13) +- +-#include "mcp.h" +- +-struct ucb1x00_irq { +- void *devid; +- void (*fn)(int, void *); +-}; +- +-struct ucb1x00 { +- spinlock_t lock; +- struct mcp *mcp; +- unsigned int irq; +- struct semaphore adc_sem; +- spinlock_t io_lock; +- u16 id; +- u16 io_dir; +- u16 io_out; +- u16 adc_cr; +- u16 irq_fal_enbl; +- u16 irq_ris_enbl; +- struct ucb1x00_irq irq_handler[16]; +- struct device dev; +- struct list_head node; +- struct list_head devs; +-}; +- +-struct ucb1x00_driver; +- +-struct ucb1x00_dev { +- struct list_head dev_node; +- struct list_head drv_node; +- struct ucb1x00 *ucb; +- struct ucb1x00_driver *drv; +- void *priv; +-}; +- +-struct ucb1x00_driver { +- struct list_head node; +- struct list_head devs; +- int (*add)(struct ucb1x00_dev *dev); +- void (*remove)(struct ucb1x00_dev *dev); +- int (*suspend)(struct ucb1x00_dev *dev, pm_message_t state); +- int (*resume)(struct ucb1x00_dev *dev); +-}; +- +-#define classdev_to_ucb1x00(cd) container_of(cd, struct ucb1x00, dev) +- +-int ucb1x00_register_driver(struct ucb1x00_driver *); +-void ucb1x00_unregister_driver(struct ucb1x00_driver *); +- +-/** +- * ucb1x00_clkrate - return the UCB1x00 SIB clock rate +- * @ucb: UCB1x00 structure describing chip +- * +- * Return the SIB clock rate in Hz. +- */ +-static inline unsigned int ucb1x00_clkrate(struct ucb1x00 *ucb) +-{ +- return mcp_get_sclk_rate(ucb->mcp); +-} +- +-/** +- * ucb1x00_enable - enable the UCB1x00 SIB clock +- * @ucb: UCB1x00 structure describing chip +- * +- * Enable the SIB clock. This can be called multiple times. +- */ +-static inline void ucb1x00_enable(struct ucb1x00 *ucb) +-{ +- mcp_enable(ucb->mcp); +-} +- +-/** +- * ucb1x00_disable - disable the UCB1x00 SIB clock +- * @ucb: UCB1x00 structure describing chip +- * +- * Disable the SIB clock. The SIB clock will only be disabled +- * when the number of ucb1x00_enable calls match the number of +- * ucb1x00_disable calls. +- */ +-static inline void ucb1x00_disable(struct ucb1x00 *ucb) +-{ +- mcp_disable(ucb->mcp); +-} +- +-/** +- * ucb1x00_reg_write - write a UCB1x00 register +- * @ucb: UCB1x00 structure describing chip +- * @reg: UCB1x00 4-bit register index to write +- * @val: UCB1x00 16-bit value to write +- * +- * Write the UCB1x00 register @reg with value @val. The SIB +- * clock must be running for this function to return. +- */ +-static inline void ucb1x00_reg_write(struct ucb1x00 *ucb, unsigned int reg, unsigned int val) +-{ +- mcp_reg_write(ucb->mcp, reg, val); +-} +- +-/** +- * ucb1x00_reg_read - read a UCB1x00 register +- * @ucb: UCB1x00 structure describing chip +- * @reg: UCB1x00 4-bit register index to write +- * +- * Read the UCB1x00 register @reg and return its value. The SIB +- * clock must be running for this function to return. +- */ +-static inline unsigned int ucb1x00_reg_read(struct ucb1x00 *ucb, unsigned int reg) +-{ +- return mcp_reg_read(ucb->mcp, reg); +-} +-/** +- * ucb1x00_set_audio_divisor - +- * @ucb: UCB1x00 structure describing chip +- * @div: SIB clock divisor +- */ +-static inline void ucb1x00_set_audio_divisor(struct ucb1x00 *ucb, unsigned int div) +-{ +- mcp_set_audio_divisor(ucb->mcp, div); +-} +- +-/** +- * ucb1x00_set_telecom_divisor - +- * @ucb: UCB1x00 structure describing chip +- * @div: SIB clock divisor +- */ +-static inline void ucb1x00_set_telecom_divisor(struct ucb1x00 *ucb, unsigned int div) +-{ +- mcp_set_telecom_divisor(ucb->mcp, div); +-} +- +-void ucb1x00_io_set_dir(struct ucb1x00 *ucb, unsigned int, unsigned int); +-void ucb1x00_io_write(struct ucb1x00 *ucb, unsigned int, unsigned int); +-unsigned int ucb1x00_io_read(struct ucb1x00 *ucb); +- +-#define UCB_NOSYNC (0) +-#define UCB_SYNC (1) +- +-unsigned int ucb1x00_adc_read(struct ucb1x00 *ucb, int adc_channel, int sync); +-void ucb1x00_adc_enable(struct ucb1x00 *ucb); +-void ucb1x00_adc_disable(struct ucb1x00 *ucb); +- +-/* +- * Which edges of the IRQ do you want to control today? +- */ +-#define UCB_RISING (1 << 0) +-#define UCB_FALLING (1 << 1) +- +-int ucb1x00_hook_irq(struct ucb1x00 *ucb, unsigned int idx, void (*fn)(int, void *), void *devid); +-void ucb1x00_enable_irq(struct ucb1x00 *ucb, unsigned int idx, int edges); +-void ucb1x00_disable_irq(struct ucb1x00 *ucb, unsigned int idx, int edges); +-int ucb1x00_free_irq(struct ucb1x00 *ucb, unsigned int idx, void *devid); +- +-#endif +diff --git a/include/linux/mfd/mcp.h b/include/linux/mfd/mcp.h +new file mode 100644 +index 0000000..be95e09 +--- /dev/null ++++ b/include/linux/mfd/mcp.h +@@ -0,0 +1,68 @@ ++/* ++ * linux/drivers/mfd/mcp.h ++ * ++ * Copyright (C) 2001 Russell King, All Rights Reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License. ++ */ ++#ifndef MCP_H ++#define MCP_H ++ ++#include <mach/dma.h> ++ ++struct mcp_ops; ++ ++struct mcp { ++ struct module *owner; ++ struct mcp_ops *ops; ++ spinlock_t lock; ++ int use_count; ++ unsigned int sclk_rate; ++ unsigned int rw_timeout; ++ dma_device_t dma_audio_rd; ++ dma_device_t dma_audio_wr; ++ dma_device_t dma_telco_rd; ++ dma_device_t dma_telco_wr; ++ struct device attached_device; ++}; ++ ++struct mcp_ops { ++ void (*set_telecom_divisor)(struct mcp *, unsigned int); ++ void (*set_audio_divisor)(struct mcp *, unsigned int); ++ void (*reg_write)(struct mcp *, unsigned int, unsigned int); ++ unsigned int (*reg_read)(struct mcp *, unsigned int); ++ void (*enable)(struct mcp *); ++ void (*disable)(struct mcp *); ++}; ++ ++void mcp_set_telecom_divisor(struct mcp *, unsigned int); ++void mcp_set_audio_divisor(struct mcp *, unsigned int); ++void mcp_reg_write(struct mcp *, unsigned int, unsigned int); ++unsigned int mcp_reg_read(struct mcp *, unsigned int); ++void mcp_enable(struct mcp *); ++void mcp_disable(struct mcp *); ++#define mcp_get_sclk_rate(mcp) ((mcp)->sclk_rate) ++ ++struct mcp *mcp_host_alloc(struct device *, size_t); ++int mcp_host_register(struct mcp *); ++void mcp_host_unregister(struct mcp *); ++ ++struct mcp_driver { ++ struct device_driver drv; ++ int (*probe)(struct mcp *); ++ void (*remove)(struct mcp *); ++ int (*suspend)(struct mcp *, pm_message_t); ++ int (*resume)(struct mcp *); ++}; ++ ++int mcp_driver_register(struct mcp_driver *); ++void mcp_driver_unregister(struct mcp_driver *); ++ ++#define mcp_get_drvdata(mcp) dev_get_drvdata(&(mcp)->attached_device) ++#define mcp_set_drvdata(mcp,d) dev_set_drvdata(&(mcp)->attached_device, d) ++ ++#define mcp_priv(mcp) ((void *)((mcp)+1)) ++ ++#endif +diff --git a/include/linux/mfd/ucb1x00.h b/include/linux/mfd/ucb1x00.h +new file mode 100644 +index 0000000..eac3463 +--- /dev/null ++++ b/include/linux/mfd/ucb1x00.h +@@ -0,0 +1,255 @@ ++/* ++ * linux/include/mfd/ucb1x00.h ++ * ++ * Copyright (C) 2001 Russell King, All Rights Reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License. ++ */ ++#ifndef UCB1200_H ++#define UCB1200_H ++ ++#include <linux/mfd/mcp.h> ++#define UCB_IO_DATA 0x00 ++#define UCB_IO_DIR 0x01 ++ ++#define UCB_IO_0 (1 << 0) ++#define UCB_IO_1 (1 << 1) ++#define UCB_IO_2 (1 << 2) ++#define UCB_IO_3 (1 << 3) ++#define UCB_IO_4 (1 << 4) ++#define UCB_IO_5 (1 << 5) ++#define UCB_IO_6 (1 << 6) ++#define UCB_IO_7 (1 << 7) ++#define UCB_IO_8 (1 << 8) ++#define UCB_IO_9 (1 << 9) ++ ++#define UCB_IE_RIS 0x02 ++#define UCB_IE_FAL 0x03 ++#define UCB_IE_STATUS 0x04 ++#define UCB_IE_CLEAR 0x04 ++#define UCB_IE_ADC (1 << 11) ++#define UCB_IE_TSPX (1 << 12) ++#define UCB_IE_TSMX (1 << 13) ++#define UCB_IE_TCLIP (1 << 14) ++#define UCB_IE_ACLIP (1 << 15) ++ ++#define UCB_IRQ_TSPX 12 ++ ++#define UCB_TC_A 0x05 ++#define UCB_TC_A_LOOP (1 << 7) /* UCB1200 */ ++#define UCB_TC_A_AMPL (1 << 7) /* UCB1300 */ ++ ++#define UCB_TC_B 0x06 ++#define UCB_TC_B_VOICE_ENA (1 << 3) ++#define UCB_TC_B_CLIP (1 << 4) ++#define UCB_TC_B_ATT (1 << 6) ++#define UCB_TC_B_SIDE_ENA (1 << 11) ++#define UCB_TC_B_MUTE (1 << 13) ++#define UCB_TC_B_IN_ENA (1 << 14) ++#define UCB_TC_B_OUT_ENA (1 << 15) ++ ++#define UCB_AC_A 0x07 ++#define UCB_AC_B 0x08 ++#define UCB_AC_B_LOOP (1 << 8) ++#define UCB_AC_B_MUTE (1 << 13) ++#define UCB_AC_B_IN_ENA (1 << 14) ++#define UCB_AC_B_OUT_ENA (1 << 15) ++ ++#define UCB_TS_CR 0x09 ++#define UCB_TS_CR_TSMX_POW (1 << 0) ++#define UCB_TS_CR_TSPX_POW (1 << 1) ++#define UCB_TS_CR_TSMY_POW (1 << 2) ++#define UCB_TS_CR_TSPY_POW (1 << 3) ++#define UCB_TS_CR_TSMX_GND (1 << 4) ++#define UCB_TS_CR_TSPX_GND (1 << 5) ++#define UCB_TS_CR_TSMY_GND (1 << 6) ++#define UCB_TS_CR_TSPY_GND (1 << 7) ++#define UCB_TS_CR_MODE_INT (0 << 8) ++#define UCB_TS_CR_MODE_PRES (1 << 8) ++#define UCB_TS_CR_MODE_POS (2 << 8) ++#define UCB_TS_CR_BIAS_ENA (1 << 11) ++#define UCB_TS_CR_TSPX_LOW (1 << 12) ++#define UCB_TS_CR_TSMX_LOW (1 << 13) ++ ++#define UCB_ADC_CR 0x0a ++#define UCB_ADC_SYNC_ENA (1 << 0) ++#define UCB_ADC_VREFBYP_CON (1 << 1) ++#define UCB_ADC_INP_TSPX (0 << 2) ++#define UCB_ADC_INP_TSMX (1 << 2) ++#define UCB_ADC_INP_TSPY (2 << 2) ++#define UCB_ADC_INP_TSMY (3 << 2) ++#define UCB_ADC_INP_AD0 (4 << 2) ++#define UCB_ADC_INP_AD1 (5 << 2) ++#define UCB_ADC_INP_AD2 (6 << 2) ++#define UCB_ADC_INP_AD3 (7 << 2) ++#define UCB_ADC_EXT_REF (1 << 5) ++#define UCB_ADC_START (1 << 7) ++#define UCB_ADC_ENA (1 << 15) ++ ++#define UCB_ADC_DATA 0x0b ++#define UCB_ADC_DAT_VAL (1 << 15) ++#define UCB_ADC_DAT(x) (((x) & 0x7fe0) >> 5) ++ ++#define UCB_ID 0x0c ++#define UCB_ID_1200 0x1004 ++#define UCB_ID_1300 0x1005 ++#define UCB_ID_TC35143 0x9712 ++ ++#define UCB_MODE 0x0d ++#define UCB_MODE_DYN_VFLAG_ENA (1 << 12) ++#define UCB_MODE_AUD_OFF_CAN (1 << 13) ++ ++ ++struct ucb1x00_irq { ++ void *devid; ++ void (*fn)(int, void *); ++}; ++ ++struct ucb1x00 { ++ spinlock_t lock; ++ struct mcp *mcp; ++ unsigned int irq; ++ struct semaphore adc_sem; ++ spinlock_t io_lock; ++ u16 id; ++ u16 io_dir; ++ u16 io_out; ++ u16 adc_cr; ++ u16 irq_fal_enbl; ++ u16 irq_ris_enbl; ++ struct ucb1x00_irq irq_handler[16]; ++ struct device dev; ++ struct list_head node; ++ struct list_head devs; ++}; ++ ++struct ucb1x00_driver; ++ ++struct ucb1x00_dev { ++ struct list_head dev_node; ++ struct list_head drv_node; ++ struct ucb1x00 *ucb; ++ struct ucb1x00_driver *drv; ++ void *priv; ++}; ++ ++struct ucb1x00_driver { ++ struct list_head node; ++ struct list_head devs; ++ int (*add)(struct ucb1x00_dev *dev); ++ void (*remove)(struct ucb1x00_dev *dev); ++ int (*suspend)(struct ucb1x00_dev *dev, pm_message_t state); ++ int (*resume)(struct ucb1x00_dev *dev); ++}; ++ ++#define classdev_to_ucb1x00(cd) container_of(cd, struct ucb1x00, dev) ++ ++int ucb1x00_register_driver(struct ucb1x00_driver *); ++void ucb1x00_unregister_driver(struct ucb1x00_driver *); ++ ++/** ++ * ucb1x00_clkrate - return the UCB1x00 SIB clock rate ++ * @ucb: UCB1x00 structure describing chip ++ * ++ * Return the SIB clock rate in Hz. ++ */ ++static inline unsigned int ucb1x00_clkrate(struct ucb1x00 *ucb) ++{ ++ return mcp_get_sclk_rate(ucb->mcp); ++} ++ ++/** ++ * ucb1x00_enable - enable the UCB1x00 SIB clock ++ * @ucb: UCB1x00 structure describing chip ++ * ++ * Enable the SIB clock. This can be called multiple times. ++ */ ++static inline void ucb1x00_enable(struct ucb1x00 *ucb) ++{ ++ mcp_enable(ucb->mcp); ++} ++ ++/** ++ * ucb1x00_disable - disable the UCB1x00 SIB clock ++ * @ucb: UCB1x00 structure describing chip ++ * ++ * Disable the SIB clock. The SIB clock will only be disabled ++ * when the number of ucb1x00_enable calls match the number of ++ * ucb1x00_disable calls. ++ */ ++static inline void ucb1x00_disable(struct ucb1x00 *ucb) ++{ ++ mcp_disable(ucb->mcp); ++} ++ ++/** ++ * ucb1x00_reg_write - write a UCB1x00 register ++ * @ucb: UCB1x00 structure describing chip ++ * @reg: UCB1x00 4-bit register index to write ++ * @val: UCB1x00 16-bit value to write ++ * ++ * Write the UCB1x00 register @reg with value @val. The SIB ++ * clock must be running for this function to return. ++ */ ++static inline void ucb1x00_reg_write(struct ucb1x00 *ucb, unsigned int reg, unsigned int val) ++{ ++ mcp_reg_write(ucb->mcp, reg, val); ++} ++ ++/** ++ * ucb1x00_reg_read - read a UCB1x00 register ++ * @ucb: UCB1x00 structure describing chip ++ * @reg: UCB1x00 4-bit register index to write ++ * ++ * Read the UCB1x00 register @reg and return its value. The SIB ++ * clock must be running for this function to return. ++ */ ++static inline unsigned int ucb1x00_reg_read(struct ucb1x00 *ucb, unsigned int reg) ++{ ++ return mcp_reg_read(ucb->mcp, reg); ++} ++/** ++ * ucb1x00_set_audio_divisor - ++ * @ucb: UCB1x00 structure describing chip ++ * @div: SIB clock divisor ++ */ ++static inline void ucb1x00_set_audio_divisor(struct ucb1x00 *ucb, unsigned int div) ++{ ++ mcp_set_audio_divisor(ucb->mcp, div); ++} ++ ++/** ++ * ucb1x00_set_telecom_divisor - ++ * @ucb: UCB1x00 structure describing chip ++ * @div: SIB clock divisor ++ */ ++static inline void ucb1x00_set_telecom_divisor(struct ucb1x00 *ucb, unsigned int div) ++{ ++ mcp_set_telecom_divisor(ucb->mcp, div); ++} ++ ++void ucb1x00_io_set_dir(struct ucb1x00 *ucb, unsigned int, unsigned int); ++void ucb1x00_io_write(struct ucb1x00 *ucb, unsigned int, unsigned int); ++unsigned int ucb1x00_io_read(struct ucb1x00 *ucb); ++ ++#define UCB_NOSYNC (0) ++#define UCB_SYNC (1) ++ ++unsigned int ucb1x00_adc_read(struct ucb1x00 *ucb, int adc_channel, int sync); ++void ucb1x00_adc_enable(struct ucb1x00 *ucb); ++void ucb1x00_adc_disable(struct ucb1x00 *ucb); ++ ++/* ++ * Which edges of the IRQ do you want to control today? ++ */ ++#define UCB_RISING (1 << 0) ++#define UCB_FALLING (1 << 1) ++ ++int ucb1x00_hook_irq(struct ucb1x00 *ucb, unsigned int idx, void (*fn)(int, void *), void *devid); ++void ucb1x00_enable_irq(struct ucb1x00 *ucb, unsigned int idx, int edges); ++void ucb1x00_disable_irq(struct ucb1x00 *ucb, unsigned int idx, int edges); ++int ucb1x00_free_irq(struct ucb1x00 *ucb, unsigned int idx, void *devid); ++ ++#endif +-- +1.5.6.5 + diff --git a/packages/linux/linux-2.6.28/collie/0012-move-ucb1200-ts-driver.patch b/packages/linux/linux-2.6.28/collie/0012-move-ucb1200-ts-driver.patch new file mode 100644 index 0000000000..c1aafef5e2 --- /dev/null +++ b/packages/linux/linux-2.6.28/collie/0012-move-ucb1200-ts-driver.patch @@ -0,0 +1,981 @@ +From 9e0d71c4a6247d88d3b772f6b05bcaa39711a937 Mon Sep 17 00:00:00 2001 +From: Thomas Kunze <thommycheck@gmx.de> +Date: Tue, 10 Feb 2009 19:31:25 +0100 +Subject: [PATCH 12/23] move ucb1200-ts driver + +Move the touchscreen driver to drivers/input/touchscreen +where touchscreen drivers belong. + +Conflicts: + + drivers/input/touchscreen/Makefile + drivers/mfd/Kconfig + drivers/mfd/Makefile + +Conflicts: + + drivers/mfd/Kconfig + drivers/mfd/Makefile +--- + drivers/input/touchscreen/Kconfig | 7 + + drivers/input/touchscreen/Makefile | 1 + + drivers/input/touchscreen/ucb1x00-ts.c | 438 ++++++++++++++++++++++++++++++++ + drivers/mfd/Kconfig | 3 - + drivers/mfd/Makefile | 3 +- + drivers/mfd/ucb1x00-ts.c | 438 -------------------------------- + 6 files changed, 447 insertions(+), 443 deletions(-) + create mode 100644 drivers/input/touchscreen/ucb1x00-ts.c + delete mode 100644 drivers/mfd/ucb1x00-ts.c + +diff --git a/drivers/input/touchscreen/Kconfig b/drivers/input/touchscreen/Kconfig +index 3d1ab8f..3ac8cd6 100644 +--- a/drivers/input/touchscreen/Kconfig ++++ b/drivers/input/touchscreen/Kconfig +@@ -221,6 +221,13 @@ config TOUCHSCREEN_ATMEL_TSADCC + To compile this driver as a module, choose M here: the + module will be called atmel_tsadcc. + ++config TOUCHSCREEN_UCB1200_TS ++ tristate "Philips UCB1200 touchscreen" ++ depends on MCP_UCB1200 ++ help ++ This enabled support for the Pilips UCB1200 touchscreen interface ++ and compatible. ++ + config TOUCHSCREEN_UCB1400 + tristate "Philips UCB1400 touchscreen" + depends on AC97_BUS +diff --git a/drivers/input/touchscreen/Makefile b/drivers/input/touchscreen/Makefile +index 15cf290..77ba930 100644 +--- a/drivers/input/touchscreen/Makefile ++++ b/drivers/input/touchscreen/Makefile +@@ -25,6 +25,7 @@ obj-$(CONFIG_TOUCHSCREEN_PENMOUNT) += penmount.o + obj-$(CONFIG_TOUCHSCREEN_TOUCHIT213) += touchit213.o + obj-$(CONFIG_TOUCHSCREEN_TOUCHRIGHT) += touchright.o + obj-$(CONFIG_TOUCHSCREEN_TOUCHWIN) += touchwin.o ++obj-$(CONFIG_TOUCHSCREEN_UCB1200_TS) += ucb1x00-ts.o + obj-$(CONFIG_TOUCHSCREEN_UCB1400) += ucb1400_ts.o + obj-$(CONFIG_TOUCHSCREEN_WM97XX) += wm97xx-ts.o + wm97xx-ts-$(CONFIG_TOUCHSCREEN_WM9705) += wm9705.o +diff --git a/drivers/input/touchscreen/ucb1x00-ts.c b/drivers/input/touchscreen/ucb1x00-ts.c +new file mode 100644 +index 0000000..b5feae9 +--- /dev/null ++++ b/drivers/input/touchscreen/ucb1x00-ts.c +@@ -0,0 +1,438 @@ ++/* ++ * Touchscreen driver for UCB1x00-based touchscreens ++ * ++ * Copyright (C) 2001 Russell King, All Rights Reserved. ++ * Copyright (C) 2005 Pavel Machek ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ * ++ * 21-Jan-2002 <jco@ict.es> : ++ * ++ * Added support for synchronous A/D mode. This mode is useful to ++ * avoid noise induced in the touchpanel by the LCD, provided that ++ * the UCB1x00 has a valid LCD sync signal routed to its ADCSYNC pin. ++ * It is important to note that the signal connected to the ADCSYNC ++ * pin should provide pulses even when the LCD is blanked, otherwise ++ * a pen touch needed to unblank the LCD will never be read. ++ */ ++#include <linux/module.h> ++#include <linux/moduleparam.h> ++#include <linux/init.h> ++#include <linux/smp.h> ++#include <linux/sched.h> ++#include <linux/completion.h> ++#include <linux/delay.h> ++#include <linux/string.h> ++#include <linux/input.h> ++#include <linux/device.h> ++#include <linux/freezer.h> ++#include <linux/slab.h> ++#include <linux/kthread.h> ++#include <linux/mfd/ucb1x00.h> ++ ++#include <asm/dma.h> ++#include <mach/collie.h> ++#include <asm/mach-types.h> ++ ++ ++ ++struct ucb1x00_ts { ++ struct input_dev *idev; ++ struct ucb1x00 *ucb; ++ ++ wait_queue_head_t irq_wait; ++ struct task_struct *rtask; ++ u16 x_res; ++ u16 y_res; ++ ++ unsigned int restart:1; ++ unsigned int adcsync:1; ++}; ++ ++static int adcsync; ++ ++static inline void ucb1x00_ts_evt_add(struct ucb1x00_ts *ts, u16 pressure, u16 x, u16 y) ++{ ++ struct input_dev *idev = ts->idev; ++ ++ input_report_abs(idev, ABS_X, x); ++ input_report_abs(idev, ABS_Y, y); ++ input_report_abs(idev, ABS_PRESSURE, pressure); ++ input_sync(idev); ++} ++ ++static inline void ucb1x00_ts_event_release(struct ucb1x00_ts *ts) ++{ ++ struct input_dev *idev = ts->idev; ++ ++ input_report_abs(idev, ABS_PRESSURE, 0); ++ input_sync(idev); ++} ++ ++/* ++ * Switch to interrupt mode. ++ */ ++static inline void ucb1x00_ts_mode_int(struct ucb1x00_ts *ts) ++{ ++ ucb1x00_reg_write(ts->ucb, UCB_TS_CR, ++ UCB_TS_CR_TSMX_POW | UCB_TS_CR_TSPX_POW | ++ UCB_TS_CR_TSMY_GND | UCB_TS_CR_TSPY_GND | ++ UCB_TS_CR_MODE_INT); ++} ++ ++/* ++ * Switch to pressure mode, and read pressure. We don't need to wait ++ * here, since both plates are being driven. ++ */ ++static inline unsigned int ucb1x00_ts_read_pressure(struct ucb1x00_ts *ts) ++{ ++ if (machine_is_collie()) { ++ ucb1x00_io_write(ts->ucb, COLLIE_TC35143_GPIO_TBL_CHK, 0); ++ ucb1x00_reg_write(ts->ucb, UCB_TS_CR, ++ UCB_TS_CR_TSPX_POW | UCB_TS_CR_TSMX_POW | ++ UCB_TS_CR_MODE_POS | UCB_TS_CR_BIAS_ENA); ++ ++ udelay(55); ++ ++ return ucb1x00_adc_read(ts->ucb, UCB_ADC_INP_AD2, ts->adcsync); ++ } else { ++ ucb1x00_reg_write(ts->ucb, UCB_TS_CR, ++ UCB_TS_CR_TSMX_POW | UCB_TS_CR_TSPX_POW | ++ UCB_TS_CR_TSMY_GND | UCB_TS_CR_TSPY_GND | ++ UCB_TS_CR_MODE_PRES | UCB_TS_CR_BIAS_ENA); ++ ++ return ucb1x00_adc_read(ts->ucb, UCB_ADC_INP_TSPY, ts->adcsync); ++ } ++} ++ ++/* ++ * Switch to X position mode and measure Y plate. We switch the plate ++ * configuration in pressure mode, then switch to position mode. This ++ * gives a faster response time. Even so, we need to wait about 55us ++ * for things to stabilise. ++ */ ++static inline unsigned int ucb1x00_ts_read_xpos(struct ucb1x00_ts *ts) ++{ ++ if (machine_is_collie()) ++ ucb1x00_io_write(ts->ucb, 0, COLLIE_TC35143_GPIO_TBL_CHK); ++ else { ++ ucb1x00_reg_write(ts->ucb, UCB_TS_CR, ++ UCB_TS_CR_TSMX_GND | UCB_TS_CR_TSPX_POW | ++ UCB_TS_CR_MODE_PRES | UCB_TS_CR_BIAS_ENA); ++ ucb1x00_reg_write(ts->ucb, UCB_TS_CR, ++ UCB_TS_CR_TSMX_GND | UCB_TS_CR_TSPX_POW | ++ UCB_TS_CR_MODE_PRES | UCB_TS_CR_BIAS_ENA); ++ } ++ ucb1x00_reg_write(ts->ucb, UCB_TS_CR, ++ UCB_TS_CR_TSMX_GND | UCB_TS_CR_TSPX_POW | ++ UCB_TS_CR_MODE_POS | UCB_TS_CR_BIAS_ENA); ++ ++ udelay(55); ++ ++ return ucb1x00_adc_read(ts->ucb, UCB_ADC_INP_TSPY, ts->adcsync); ++} ++ ++/* ++ * Switch to Y position mode and measure X plate. We switch the plate ++ * configuration in pressure mode, then switch to position mode. This ++ * gives a faster response time. Even so, we need to wait about 55us ++ * for things to stabilise. ++ */ ++static inline unsigned int ucb1x00_ts_read_ypos(struct ucb1x00_ts *ts) ++{ ++ if (machine_is_collie()) ++ ucb1x00_io_write(ts->ucb, 0, COLLIE_TC35143_GPIO_TBL_CHK); ++ else { ++ ucb1x00_reg_write(ts->ucb, UCB_TS_CR, ++ UCB_TS_CR_TSMY_GND | UCB_TS_CR_TSPY_POW | ++ UCB_TS_CR_MODE_PRES | UCB_TS_CR_BIAS_ENA); ++ ucb1x00_reg_write(ts->ucb, UCB_TS_CR, ++ UCB_TS_CR_TSMY_GND | UCB_TS_CR_TSPY_POW | ++ UCB_TS_CR_MODE_PRES | UCB_TS_CR_BIAS_ENA); ++ } ++ ++ ucb1x00_reg_write(ts->ucb, UCB_TS_CR, ++ UCB_TS_CR_TSMY_GND | UCB_TS_CR_TSPY_POW | ++ UCB_TS_CR_MODE_POS | UCB_TS_CR_BIAS_ENA); ++ ++ udelay(55); ++ ++ return ucb1x00_adc_read(ts->ucb, UCB_ADC_INP_TSPX, ts->adcsync); ++} ++ ++/* ++ * Switch to X plate resistance mode. Set MX to ground, PX to ++ * supply. Measure current. ++ */ ++static inline unsigned int ucb1x00_ts_read_xres(struct ucb1x00_ts *ts) ++{ ++ ucb1x00_reg_write(ts->ucb, UCB_TS_CR, ++ UCB_TS_CR_TSMX_GND | UCB_TS_CR_TSPX_POW | ++ UCB_TS_CR_MODE_PRES | UCB_TS_CR_BIAS_ENA); ++ return ucb1x00_adc_read(ts->ucb, 0, ts->adcsync); ++} ++ ++/* ++ * Switch to Y plate resistance mode. Set MY to ground, PY to ++ * supply. Measure current. ++ */ ++static inline unsigned int ucb1x00_ts_read_yres(struct ucb1x00_ts *ts) ++{ ++ ucb1x00_reg_write(ts->ucb, UCB_TS_CR, ++ UCB_TS_CR_TSMY_GND | UCB_TS_CR_TSPY_POW | ++ UCB_TS_CR_MODE_PRES | UCB_TS_CR_BIAS_ENA); ++ return ucb1x00_adc_read(ts->ucb, 0, ts->adcsync); ++} ++ ++static inline int ucb1x00_ts_pen_down(struct ucb1x00_ts *ts) ++{ ++ unsigned int val = ucb1x00_reg_read(ts->ucb, UCB_TS_CR); ++ ++ if (machine_is_collie()) ++ return (!(val & (UCB_TS_CR_TSPX_LOW))); ++ else ++ return (val & (UCB_TS_CR_TSPX_LOW | UCB_TS_CR_TSMX_LOW)); ++} ++ ++/* ++ * This is a RT kernel thread that handles the ADC accesses ++ * (mainly so we can use semaphores in the UCB1200 core code ++ * to serialise accesses to the ADC). ++ */ ++static int ucb1x00_thread(void *_ts) ++{ ++ struct ucb1x00_ts *ts = _ts; ++ DECLARE_WAITQUEUE(wait, current); ++ int valid = 0; ++ ++ set_freezable(); ++ add_wait_queue(&ts->irq_wait, &wait); ++ while (!kthread_should_stop()) { ++ unsigned int x, y, p; ++ signed long timeout; ++ ++ ts->restart = 0; ++ ++ ucb1x00_adc_enable(ts->ucb); ++ ++ x = ucb1x00_ts_read_xpos(ts); ++ y = ucb1x00_ts_read_ypos(ts); ++ p = ucb1x00_ts_read_pressure(ts); ++ ++ /* ++ * Switch back to interrupt mode. ++ */ ++ ucb1x00_ts_mode_int(ts); ++ ucb1x00_adc_disable(ts->ucb); ++ ++ msleep(10); ++ ++ ucb1x00_enable(ts->ucb); ++ ++ ++ if (ucb1x00_ts_pen_down(ts)) { ++ set_current_state(TASK_INTERRUPTIBLE); ++ ++ ucb1x00_enable_irq(ts->ucb, UCB_IRQ_TSPX, machine_is_collie() ? UCB_RISING : UCB_FALLING); ++ ucb1x00_disable(ts->ucb); ++ ++ /* ++ * If we spat out a valid sample set last time, ++ * spit out a "pen off" sample here. ++ */ ++ if (valid) { ++ ucb1x00_ts_event_release(ts); ++ valid = 0; ++ } ++ ++ timeout = MAX_SCHEDULE_TIMEOUT; ++ } else { ++ ucb1x00_disable(ts->ucb); ++ ++ /* ++ * Filtering is policy. Policy belongs in user ++ * space. We therefore leave it to user space ++ * to do any filtering they please. ++ */ ++ if (!ts->restart) { ++ ucb1x00_ts_evt_add(ts, p, x, y); ++ valid = 1; ++ } ++ ++ set_current_state(TASK_INTERRUPTIBLE); ++ timeout = HZ / 100; ++ } ++ ++ try_to_freeze(); ++ ++ schedule_timeout(timeout); ++ } ++ ++ remove_wait_queue(&ts->irq_wait, &wait); ++ ++ ts->rtask = NULL; ++ return 0; ++} ++ ++/* ++ * We only detect touch screen _touches_ with this interrupt ++ * handler, and even then we just schedule our task. ++ */ ++static void ucb1x00_ts_irq(int idx, void *id) ++{ ++ struct ucb1x00_ts *ts = id; ++ ++ ucb1x00_disable_irq(ts->ucb, UCB_IRQ_TSPX, UCB_FALLING); ++ wake_up(&ts->irq_wait); ++} ++ ++static int ucb1x00_ts_open(struct input_dev *idev) ++{ ++ struct ucb1x00_ts *ts = input_get_drvdata(idev); ++ int ret = 0; ++ ++ BUG_ON(ts->rtask); ++ ++ init_waitqueue_head(&ts->irq_wait); ++ ret = ucb1x00_hook_irq(ts->ucb, UCB_IRQ_TSPX, ucb1x00_ts_irq, ts); ++ if (ret < 0) ++ goto out; ++ ++ /* ++ * If we do this at all, we should allow the user to ++ * measure and read the X and Y resistance at any time. ++ */ ++ ucb1x00_adc_enable(ts->ucb); ++ ts->x_res = ucb1x00_ts_read_xres(ts); ++ ts->y_res = ucb1x00_ts_read_yres(ts); ++ ucb1x00_adc_disable(ts->ucb); ++ ++ ts->rtask = kthread_run(ucb1x00_thread, ts, "ktsd"); ++ if (!IS_ERR(ts->rtask)) { ++ ret = 0; ++ } else { ++ ucb1x00_free_irq(ts->ucb, UCB_IRQ_TSPX, ts); ++ ts->rtask = NULL; ++ ret = -EFAULT; ++ } ++ ++ out: ++ return ret; ++} ++ ++/* ++ * Release touchscreen resources. Disable IRQs. ++ */ ++static void ucb1x00_ts_close(struct input_dev *idev) ++{ ++ struct ucb1x00_ts *ts = input_get_drvdata(idev); ++ ++ if (ts->rtask) ++ kthread_stop(ts->rtask); ++ ++ ucb1x00_enable(ts->ucb); ++ ucb1x00_free_irq(ts->ucb, UCB_IRQ_TSPX, ts); ++ ucb1x00_reg_write(ts->ucb, UCB_TS_CR, 0); ++ ucb1x00_disable(ts->ucb); ++} ++ ++#ifdef CONFIG_PM ++static int ucb1x00_ts_resume(struct ucb1x00_dev *dev) ++{ ++ struct ucb1x00_ts *ts = dev->priv; ++ ++ if (ts->rtask != NULL) { ++ /* ++ * Restart the TS thread to ensure the ++ * TS interrupt mode is set up again ++ * after sleep. ++ */ ++ ts->restart = 1; ++ wake_up(&ts->irq_wait); ++ } ++ return 0; ++} ++#else ++#define ucb1x00_ts_resume NULL ++#endif ++ ++ ++/* ++ * Initialisation. ++ */ ++static int ucb1x00_ts_add(struct ucb1x00_dev *dev) ++{ ++ struct ucb1x00_ts *ts; ++ struct input_dev *idev; ++ int err; ++ ++ ts = kzalloc(sizeof(struct ucb1x00_ts), GFP_KERNEL); ++ idev = input_allocate_device(); ++ if (!ts || !idev) { ++ err = -ENOMEM; ++ goto fail; ++ } ++ ++ ts->ucb = dev->ucb; ++ ts->idev = idev; ++ ts->adcsync = adcsync ? UCB_SYNC : UCB_NOSYNC; ++ ++ idev->name = "Touchscreen panel"; ++ idev->id.product = ts->ucb->id; ++ idev->open = ucb1x00_ts_open; ++ idev->close = ucb1x00_ts_close; ++ ++ __set_bit(EV_ABS, idev->evbit); ++ __set_bit(ABS_X, idev->absbit); ++ __set_bit(ABS_Y, idev->absbit); ++ __set_bit(ABS_PRESSURE, idev->absbit); ++ ++ input_set_drvdata(idev, ts); ++ ++ err = input_register_device(idev); ++ if (err) ++ goto fail; ++ ++ dev->priv = ts; ++ ++ return 0; ++ ++ fail: ++ input_free_device(idev); ++ kfree(ts); ++ return err; ++} ++ ++static void ucb1x00_ts_remove(struct ucb1x00_dev *dev) ++{ ++ struct ucb1x00_ts *ts = dev->priv; ++ ++ input_unregister_device(ts->idev); ++ kfree(ts); ++} ++ ++static struct ucb1x00_driver ucb1x00_ts_driver = { ++ .add = ucb1x00_ts_add, ++ .remove = ucb1x00_ts_remove, ++ .resume = ucb1x00_ts_resume, ++}; ++ ++static int __init ucb1x00_ts_init(void) ++{ ++ return ucb1x00_register_driver(&ucb1x00_ts_driver); ++} ++ ++static void __exit ucb1x00_ts_exit(void) ++{ ++ ucb1x00_unregister_driver(&ucb1x00_ts_driver); ++} ++ ++module_param(adcsync, int, 0444); ++module_init(ucb1x00_ts_init); ++module_exit(ucb1x00_ts_exit); ++ ++MODULE_AUTHOR("Russell King <rmk@arm.linux.org.uk>"); ++MODULE_DESCRIPTION("UCB1x00 touchscreen driver"); ++MODULE_LICENSE("GPL"); +diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig +index 2572773..bbc137d 100644 +--- a/drivers/mfd/Kconfig ++++ b/drivers/mfd/Kconfig +@@ -172,8 +172,5 @@ config MCP_UCB1200 + tristate "Support for UCB1200 / UCB1300" + depends on MCP + +-config MCP_UCB1200_TS +- tristate "Touchscreen interface support" +- depends on MCP_UCB1200 && INPUT + + endmenu +diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile +index 9a5ad8a..4981aff 100644 +--- a/drivers/mfd/Makefile ++++ b/drivers/mfd/Makefile +@@ -24,11 +24,10 @@ obj-$(CONFIG_MFD_CORE) += mfd-core.o + obj-$(CONFIG_MCP) += mcp-core.o + obj-$(CONFIG_MCP_SA11X0) += mcp-sa11x0.o + obj-$(CONFIG_MCP_UCB1200) += ucb1x00-core.o +-obj-$(CONFIG_MCP_UCB1200_TS) += ucb1x00-ts.o + + ifeq ($(CONFIG_SA1100_ASSABET),y) + obj-$(CONFIG_MCP_UCB1200) += ucb1x00-assabet.o + endif + obj-$(CONFIG_UCB1400_CORE) += ucb1400_core.o + +-obj-$(CONFIG_PMIC_DA903X) += da903x.o +\ No newline at end of file ++obj-$(CONFIG_PMIC_DA903X) += da903x.o +diff --git a/drivers/mfd/ucb1x00-ts.c b/drivers/mfd/ucb1x00-ts.c +deleted file mode 100644 +index b5feae9..0000000 +--- a/drivers/mfd/ucb1x00-ts.c ++++ /dev/null +@@ -1,438 +0,0 @@ +-/* +- * Touchscreen driver for UCB1x00-based touchscreens +- * +- * Copyright (C) 2001 Russell King, All Rights Reserved. +- * Copyright (C) 2005 Pavel Machek +- * +- * This program is free software; you can redistribute it and/or modify +- * it under the terms of the GNU General Public License version 2 as +- * published by the Free Software Foundation. +- * +- * 21-Jan-2002 <jco@ict.es> : +- * +- * Added support for synchronous A/D mode. This mode is useful to +- * avoid noise induced in the touchpanel by the LCD, provided that +- * the UCB1x00 has a valid LCD sync signal routed to its ADCSYNC pin. +- * It is important to note that the signal connected to the ADCSYNC +- * pin should provide pulses even when the LCD is blanked, otherwise +- * a pen touch needed to unblank the LCD will never be read. +- */ +-#include <linux/module.h> +-#include <linux/moduleparam.h> +-#include <linux/init.h> +-#include <linux/smp.h> +-#include <linux/sched.h> +-#include <linux/completion.h> +-#include <linux/delay.h> +-#include <linux/string.h> +-#include <linux/input.h> +-#include <linux/device.h> +-#include <linux/freezer.h> +-#include <linux/slab.h> +-#include <linux/kthread.h> +-#include <linux/mfd/ucb1x00.h> +- +-#include <asm/dma.h> +-#include <mach/collie.h> +-#include <asm/mach-types.h> +- +- +- +-struct ucb1x00_ts { +- struct input_dev *idev; +- struct ucb1x00 *ucb; +- +- wait_queue_head_t irq_wait; +- struct task_struct *rtask; +- u16 x_res; +- u16 y_res; +- +- unsigned int restart:1; +- unsigned int adcsync:1; +-}; +- +-static int adcsync; +- +-static inline void ucb1x00_ts_evt_add(struct ucb1x00_ts *ts, u16 pressure, u16 x, u16 y) +-{ +- struct input_dev *idev = ts->idev; +- +- input_report_abs(idev, ABS_X, x); +- input_report_abs(idev, ABS_Y, y); +- input_report_abs(idev, ABS_PRESSURE, pressure); +- input_sync(idev); +-} +- +-static inline void ucb1x00_ts_event_release(struct ucb1x00_ts *ts) +-{ +- struct input_dev *idev = ts->idev; +- +- input_report_abs(idev, ABS_PRESSURE, 0); +- input_sync(idev); +-} +- +-/* +- * Switch to interrupt mode. +- */ +-static inline void ucb1x00_ts_mode_int(struct ucb1x00_ts *ts) +-{ +- ucb1x00_reg_write(ts->ucb, UCB_TS_CR, +- UCB_TS_CR_TSMX_POW | UCB_TS_CR_TSPX_POW | +- UCB_TS_CR_TSMY_GND | UCB_TS_CR_TSPY_GND | +- UCB_TS_CR_MODE_INT); +-} +- +-/* +- * Switch to pressure mode, and read pressure. We don't need to wait +- * here, since both plates are being driven. +- */ +-static inline unsigned int ucb1x00_ts_read_pressure(struct ucb1x00_ts *ts) +-{ +- if (machine_is_collie()) { +- ucb1x00_io_write(ts->ucb, COLLIE_TC35143_GPIO_TBL_CHK, 0); +- ucb1x00_reg_write(ts->ucb, UCB_TS_CR, +- UCB_TS_CR_TSPX_POW | UCB_TS_CR_TSMX_POW | +- UCB_TS_CR_MODE_POS | UCB_TS_CR_BIAS_ENA); +- +- udelay(55); +- +- return ucb1x00_adc_read(ts->ucb, UCB_ADC_INP_AD2, ts->adcsync); +- } else { +- ucb1x00_reg_write(ts->ucb, UCB_TS_CR, +- UCB_TS_CR_TSMX_POW | UCB_TS_CR_TSPX_POW | +- UCB_TS_CR_TSMY_GND | UCB_TS_CR_TSPY_GND | +- UCB_TS_CR_MODE_PRES | UCB_TS_CR_BIAS_ENA); +- +- return ucb1x00_adc_read(ts->ucb, UCB_ADC_INP_TSPY, ts->adcsync); +- } +-} +- +-/* +- * Switch to X position mode and measure Y plate. We switch the plate +- * configuration in pressure mode, then switch to position mode. This +- * gives a faster response time. Even so, we need to wait about 55us +- * for things to stabilise. +- */ +-static inline unsigned int ucb1x00_ts_read_xpos(struct ucb1x00_ts *ts) +-{ +- if (machine_is_collie()) +- ucb1x00_io_write(ts->ucb, 0, COLLIE_TC35143_GPIO_TBL_CHK); +- else { +- ucb1x00_reg_write(ts->ucb, UCB_TS_CR, +- UCB_TS_CR_TSMX_GND | UCB_TS_CR_TSPX_POW | +- UCB_TS_CR_MODE_PRES | UCB_TS_CR_BIAS_ENA); +- ucb1x00_reg_write(ts->ucb, UCB_TS_CR, +- UCB_TS_CR_TSMX_GND | UCB_TS_CR_TSPX_POW | +- UCB_TS_CR_MODE_PRES | UCB_TS_CR_BIAS_ENA); +- } +- ucb1x00_reg_write(ts->ucb, UCB_TS_CR, +- UCB_TS_CR_TSMX_GND | UCB_TS_CR_TSPX_POW | +- UCB_TS_CR_MODE_POS | UCB_TS_CR_BIAS_ENA); +- +- udelay(55); +- +- return ucb1x00_adc_read(ts->ucb, UCB_ADC_INP_TSPY, ts->adcsync); +-} +- +-/* +- * Switch to Y position mode and measure X plate. We switch the plate +- * configuration in pressure mode, then switch to position mode. This +- * gives a faster response time. Even so, we need to wait about 55us +- * for things to stabilise. +- */ +-static inline unsigned int ucb1x00_ts_read_ypos(struct ucb1x00_ts *ts) +-{ +- if (machine_is_collie()) +- ucb1x00_io_write(ts->ucb, 0, COLLIE_TC35143_GPIO_TBL_CHK); +- else { +- ucb1x00_reg_write(ts->ucb, UCB_TS_CR, +- UCB_TS_CR_TSMY_GND | UCB_TS_CR_TSPY_POW | +- UCB_TS_CR_MODE_PRES | UCB_TS_CR_BIAS_ENA); +- ucb1x00_reg_write(ts->ucb, UCB_TS_CR, +- UCB_TS_CR_TSMY_GND | UCB_TS_CR_TSPY_POW | +- UCB_TS_CR_MODE_PRES | UCB_TS_CR_BIAS_ENA); +- } +- +- ucb1x00_reg_write(ts->ucb, UCB_TS_CR, +- UCB_TS_CR_TSMY_GND | UCB_TS_CR_TSPY_POW | +- UCB_TS_CR_MODE_POS | UCB_TS_CR_BIAS_ENA); +- +- udelay(55); +- +- return ucb1x00_adc_read(ts->ucb, UCB_ADC_INP_TSPX, ts->adcsync); +-} +- +-/* +- * Switch to X plate resistance mode. Set MX to ground, PX to +- * supply. Measure current. +- */ +-static inline unsigned int ucb1x00_ts_read_xres(struct ucb1x00_ts *ts) +-{ +- ucb1x00_reg_write(ts->ucb, UCB_TS_CR, +- UCB_TS_CR_TSMX_GND | UCB_TS_CR_TSPX_POW | +- UCB_TS_CR_MODE_PRES | UCB_TS_CR_BIAS_ENA); +- return ucb1x00_adc_read(ts->ucb, 0, ts->adcsync); +-} +- +-/* +- * Switch to Y plate resistance mode. Set MY to ground, PY to +- * supply. Measure current. +- */ +-static inline unsigned int ucb1x00_ts_read_yres(struct ucb1x00_ts *ts) +-{ +- ucb1x00_reg_write(ts->ucb, UCB_TS_CR, +- UCB_TS_CR_TSMY_GND | UCB_TS_CR_TSPY_POW | +- UCB_TS_CR_MODE_PRES | UCB_TS_CR_BIAS_ENA); +- return ucb1x00_adc_read(ts->ucb, 0, ts->adcsync); +-} +- +-static inline int ucb1x00_ts_pen_down(struct ucb1x00_ts *ts) +-{ +- unsigned int val = ucb1x00_reg_read(ts->ucb, UCB_TS_CR); +- +- if (machine_is_collie()) +- return (!(val & (UCB_TS_CR_TSPX_LOW))); +- else +- return (val & (UCB_TS_CR_TSPX_LOW | UCB_TS_CR_TSMX_LOW)); +-} +- +-/* +- * This is a RT kernel thread that handles the ADC accesses +- * (mainly so we can use semaphores in the UCB1200 core code +- * to serialise accesses to the ADC). +- */ +-static int ucb1x00_thread(void *_ts) +-{ +- struct ucb1x00_ts *ts = _ts; +- DECLARE_WAITQUEUE(wait, current); +- int valid = 0; +- +- set_freezable(); +- add_wait_queue(&ts->irq_wait, &wait); +- while (!kthread_should_stop()) { +- unsigned int x, y, p; +- signed long timeout; +- +- ts->restart = 0; +- +- ucb1x00_adc_enable(ts->ucb); +- +- x = ucb1x00_ts_read_xpos(ts); +- y = ucb1x00_ts_read_ypos(ts); +- p = ucb1x00_ts_read_pressure(ts); +- +- /* +- * Switch back to interrupt mode. +- */ +- ucb1x00_ts_mode_int(ts); +- ucb1x00_adc_disable(ts->ucb); +- +- msleep(10); +- +- ucb1x00_enable(ts->ucb); +- +- +- if (ucb1x00_ts_pen_down(ts)) { +- set_current_state(TASK_INTERRUPTIBLE); +- +- ucb1x00_enable_irq(ts->ucb, UCB_IRQ_TSPX, machine_is_collie() ? UCB_RISING : UCB_FALLING); +- ucb1x00_disable(ts->ucb); +- +- /* +- * If we spat out a valid sample set last time, +- * spit out a "pen off" sample here. +- */ +- if (valid) { +- ucb1x00_ts_event_release(ts); +- valid = 0; +- } +- +- timeout = MAX_SCHEDULE_TIMEOUT; +- } else { +- ucb1x00_disable(ts->ucb); +- +- /* +- * Filtering is policy. Policy belongs in user +- * space. We therefore leave it to user space +- * to do any filtering they please. +- */ +- if (!ts->restart) { +- ucb1x00_ts_evt_add(ts, p, x, y); +- valid = 1; +- } +- +- set_current_state(TASK_INTERRUPTIBLE); +- timeout = HZ / 100; +- } +- +- try_to_freeze(); +- +- schedule_timeout(timeout); +- } +- +- remove_wait_queue(&ts->irq_wait, &wait); +- +- ts->rtask = NULL; +- return 0; +-} +- +-/* +- * We only detect touch screen _touches_ with this interrupt +- * handler, and even then we just schedule our task. +- */ +-static void ucb1x00_ts_irq(int idx, void *id) +-{ +- struct ucb1x00_ts *ts = id; +- +- ucb1x00_disable_irq(ts->ucb, UCB_IRQ_TSPX, UCB_FALLING); +- wake_up(&ts->irq_wait); +-} +- +-static int ucb1x00_ts_open(struct input_dev *idev) +-{ +- struct ucb1x00_ts *ts = input_get_drvdata(idev); +- int ret = 0; +- +- BUG_ON(ts->rtask); +- +- init_waitqueue_head(&ts->irq_wait); +- ret = ucb1x00_hook_irq(ts->ucb, UCB_IRQ_TSPX, ucb1x00_ts_irq, ts); +- if (ret < 0) +- goto out; +- +- /* +- * If we do this at all, we should allow the user to +- * measure and read the X and Y resistance at any time. +- */ +- ucb1x00_adc_enable(ts->ucb); +- ts->x_res = ucb1x00_ts_read_xres(ts); +- ts->y_res = ucb1x00_ts_read_yres(ts); +- ucb1x00_adc_disable(ts->ucb); +- +- ts->rtask = kthread_run(ucb1x00_thread, ts, "ktsd"); +- if (!IS_ERR(ts->rtask)) { +- ret = 0; +- } else { +- ucb1x00_free_irq(ts->ucb, UCB_IRQ_TSPX, ts); +- ts->rtask = NULL; +- ret = -EFAULT; +- } +- +- out: +- return ret; +-} +- +-/* +- * Release touchscreen resources. Disable IRQs. +- */ +-static void ucb1x00_ts_close(struct input_dev *idev) +-{ +- struct ucb1x00_ts *ts = input_get_drvdata(idev); +- +- if (ts->rtask) +- kthread_stop(ts->rtask); +- +- ucb1x00_enable(ts->ucb); +- ucb1x00_free_irq(ts->ucb, UCB_IRQ_TSPX, ts); +- ucb1x00_reg_write(ts->ucb, UCB_TS_CR, 0); +- ucb1x00_disable(ts->ucb); +-} +- +-#ifdef CONFIG_PM +-static int ucb1x00_ts_resume(struct ucb1x00_dev *dev) +-{ +- struct ucb1x00_ts *ts = dev->priv; +- +- if (ts->rtask != NULL) { +- /* +- * Restart the TS thread to ensure the +- * TS interrupt mode is set up again +- * after sleep. +- */ +- ts->restart = 1; +- wake_up(&ts->irq_wait); +- } +- return 0; +-} +-#else +-#define ucb1x00_ts_resume NULL +-#endif +- +- +-/* +- * Initialisation. +- */ +-static int ucb1x00_ts_add(struct ucb1x00_dev *dev) +-{ +- struct ucb1x00_ts *ts; +- struct input_dev *idev; +- int err; +- +- ts = kzalloc(sizeof(struct ucb1x00_ts), GFP_KERNEL); +- idev = input_allocate_device(); +- if (!ts || !idev) { +- err = -ENOMEM; +- goto fail; +- } +- +- ts->ucb = dev->ucb; +- ts->idev = idev; +- ts->adcsync = adcsync ? UCB_SYNC : UCB_NOSYNC; +- +- idev->name = "Touchscreen panel"; +- idev->id.product = ts->ucb->id; +- idev->open = ucb1x00_ts_open; +- idev->close = ucb1x00_ts_close; +- +- __set_bit(EV_ABS, idev->evbit); +- __set_bit(ABS_X, idev->absbit); +- __set_bit(ABS_Y, idev->absbit); +- __set_bit(ABS_PRESSURE, idev->absbit); +- +- input_set_drvdata(idev, ts); +- +- err = input_register_device(idev); +- if (err) +- goto fail; +- +- dev->priv = ts; +- +- return 0; +- +- fail: +- input_free_device(idev); +- kfree(ts); +- return err; +-} +- +-static void ucb1x00_ts_remove(struct ucb1x00_dev *dev) +-{ +- struct ucb1x00_ts *ts = dev->priv; +- +- input_unregister_device(ts->idev); +- kfree(ts); +-} +- +-static struct ucb1x00_driver ucb1x00_ts_driver = { +- .add = ucb1x00_ts_add, +- .remove = ucb1x00_ts_remove, +- .resume = ucb1x00_ts_resume, +-}; +- +-static int __init ucb1x00_ts_init(void) +-{ +- return ucb1x00_register_driver(&ucb1x00_ts_driver); +-} +- +-static void __exit ucb1x00_ts_exit(void) +-{ +- ucb1x00_unregister_driver(&ucb1x00_ts_driver); +-} +- +-module_param(adcsync, int, 0444); +-module_init(ucb1x00_ts_init); +-module_exit(ucb1x00_ts_exit); +- +-MODULE_AUTHOR("Russell King <rmk@arm.linux.org.uk>"); +-MODULE_DESCRIPTION("UCB1x00 touchscreen driver"); +-MODULE_LICENSE("GPL"); +-- +1.5.6.5 + diff --git a/packages/linux/linux-2.6.28/collie/0013-add-collie-touchscreen-driver.patch b/packages/linux/linux-2.6.28/collie/0013-add-collie-touchscreen-driver.patch new file mode 100644 index 0000000000..92159d5649 --- /dev/null +++ b/packages/linux/linux-2.6.28/collie/0013-add-collie-touchscreen-driver.patch @@ -0,0 +1,528 @@ +From 40787f3e48d1cc1e63dc5dd6aeda720f688fc05e Mon Sep 17 00:00:00 2001 +From: Thomas Kunze <thommycheck@gmx.de> +Date: Mon, 20 Oct 2008 17:44:23 +0200 +Subject: [PATCH 13/23] add collie touchscreen driver + +--- + drivers/input/touchscreen/Kconfig | 6 + + drivers/input/touchscreen/Makefile | 1 + + drivers/input/touchscreen/collie-ts.c | 449 +++++++++++++++++++++++++++++++++ + drivers/mfd/Makefile | 1 - + include/linux/mfd/ucb1x00.h | 3 + + 5 files changed, 459 insertions(+), 1 deletions(-) + create mode 100644 drivers/input/touchscreen/collie-ts.c + +diff --git a/drivers/input/touchscreen/Kconfig b/drivers/input/touchscreen/Kconfig +index 3ac8cd6..a9f89ed 100644 +--- a/drivers/input/touchscreen/Kconfig ++++ b/drivers/input/touchscreen/Kconfig +@@ -228,6 +228,12 @@ config TOUCHSCREEN_UCB1200_TS + This enabled support for the Pilips UCB1200 touchscreen interface + and compatible. + ++config TOUCHSCREEN_COLLIE_TS ++ tristate "Touchscreen collie support" ++ depends on MCP_UCB1200 && INPUT && !MCP_UCB1200_TS ++ help ++ Driver for touchscreen on collie - sharp sl-5500. ++ + config TOUCHSCREEN_UCB1400 + tristate "Philips UCB1400 touchscreen" + depends on AC97_BUS +diff --git a/drivers/input/touchscreen/Makefile b/drivers/input/touchscreen/Makefile +index 77ba930..77715cd 100644 +--- a/drivers/input/touchscreen/Makefile ++++ b/drivers/input/touchscreen/Makefile +@@ -26,6 +26,7 @@ obj-$(CONFIG_TOUCHSCREEN_TOUCHIT213) += touchit213.o + obj-$(CONFIG_TOUCHSCREEN_TOUCHRIGHT) += touchright.o + obj-$(CONFIG_TOUCHSCREEN_TOUCHWIN) += touchwin.o + obj-$(CONFIG_TOUCHSCREEN_UCB1200_TS) += ucb1x00-ts.o ++obj-$(CONFIG_TOUCHSCREEN_COLLIE_TS) += collie-ts.o + obj-$(CONFIG_TOUCHSCREEN_UCB1400) += ucb1400_ts.o + obj-$(CONFIG_TOUCHSCREEN_WM97XX) += wm97xx-ts.o + wm97xx-ts-$(CONFIG_TOUCHSCREEN_WM9705) += wm9705.o +diff --git a/drivers/input/touchscreen/collie-ts.c b/drivers/input/touchscreen/collie-ts.c +new file mode 100644 +index 0000000..c7c0272 +--- /dev/null ++++ b/drivers/input/touchscreen/collie-ts.c +@@ -0,0 +1,449 @@ ++/* ++ * Touchscreen driver for UCB1x00-based touchscreens ++ * ++ * Copyright (C) 2001 Russell King, All Rights Reserved. ++ * Copyright (C) 2005 Pavel Machek ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ * ++ * 21-Jan-2002 <jco@ict.es> : ++ * ++ * Added support for synchronous A/D mode. This mode is useful to ++ * avoid noise induced in the touchpanel by the LCD, provided that ++ * the UCB1x00 has a valid LCD sync signal routed to its ADCSYNC pin. ++ * It is important to note that the signal connected to the ADCSYNC ++ * pin should provide pulses even when the LCD is blanked, otherwise ++ * a pen touch needed to unblank the LCD will never be read. ++ */ ++#include <linux/module.h> ++#include <linux/moduleparam.h> ++#include <linux/init.h> ++#include <linux/smp.h> ++#include <linux/smp_lock.h> ++#include <linux/sched.h> ++#include <linux/completion.h> ++#include <linux/delay.h> ++#include <linux/string.h> ++#include <linux/input.h> ++#include <linux/device.h> ++#include <linux/freezer.h> ++#include <linux/slab.h> ++#include <linux/kthread.h> ++#include <linux/semaphore.h> ++ ++#include <mach/dma.h> ++#include <mach/collie.h> ++#include <asm/mach-types.h> ++ ++#include <linux/mfd/ucb1x00.h> ++ ++struct ucb1x00_ts { ++ struct input_dev *idev; ++ struct ucb1x00 *ucb; ++ ++ wait_queue_head_t irq_wait; ++ struct task_struct *rtask; ++ u16 x_res; ++ u16 y_res; ++ ++ unsigned int adcsync:1; ++}; ++ ++static int adcsync; ++ ++/********************************** ++ ++ ................ ++ . . = 340 ++ . . ++ . ^. ++ . ^. ++ . ^. ++ . ^. ++ . . ++ . X. = 10 ++ . <<<<<<<< Y . ++ ................ ++ . Sharp =200 ++ . . ++ . - O - . ++ . . ++ ................ ++ ++**********************************/ ++ ++ ++static inline void ucb1x00_ts_evt_add(struct ucb1x00_ts *ts, u16 pressure, u16 x, u16 y) ++{ ++ struct input_dev *idev = ts->idev; ++ ++ input_report_abs(idev, ABS_X, x); ++ input_report_abs(idev, ABS_Y, y); ++ input_report_abs(idev, ABS_PRESSURE, pressure); ++ input_report_key(idev, BTN_TOUCH, 1); ++ input_sync(idev); ++} ++ ++static inline void ucb1x00_ts_event_release(struct ucb1x00_ts *ts) ++{ ++ struct input_dev *idev = ts->idev; ++ ++ input_report_abs(idev, ABS_PRESSURE, 0); ++ input_report_key(idev, BTN_TOUCH, 0); ++ input_sync(idev); ++} ++ ++/* ++ * Switch to interrupt mode. This set touchscreen to interrupt ++ * mode, so that chip is able to send interrupt. ++ */ ++static inline void ucb1x00_ts_mode_int(struct ucb1x00_ts *ts) ++{ ++ ucb1x00_reg_write(ts->ucb, UCB_TS_CR, ++ UCB_TS_CR_TSMX_POW | UCB_TS_CR_TSPX_POW | ++ UCB_TS_CR_TSMY_GND | UCB_TS_CR_TSPY_GND | ++ UCB_TS_CR_MODE_INT); ++} ++ ++/* ++ * Switch to pressure mode, and read pressure. We don't need to wait ++ * here, since both plates are being driven. ++ * ++ * set_read_pressure() in sharp code ++ */ ++static inline void ucb1x00_ts_read_pressure(struct ucb1x00_ts *ts) ++{ ++ ucb1x00_io_write(ts->ucb, COLLIE_TC35143_GPIO_TBL_CHK, 0); ++ ucb1x00_reg_write(ts->ucb, UCB_TS_CR, ++ UCB_TS_CR_TSPX_POW | UCB_TS_CR_TSMX_POW | ++ UCB_TS_CR_MODE_POS | UCB_TS_CR_BIAS_ENA); ++ ++ ucb1x00_reg_write(ts->ucb, UCB_ADC_CR, ts->ucb->adc_cr | ++ UCB_ADC_INP_AD2 | ++ UCB_ADC_SYNC_ENA); ++ udelay(100); ++ ucb1x00_reg_write(ts->ucb, UCB_ADC_CR, ts->ucb->adc_cr | ++ UCB_ADC_INP_AD2 | ++ UCB_ADC_SYNC_ENA | UCB_ADC_START); ++} ++ ++/* ++ * Switch to X position mode and measure Y plate. We switch the plate ++ * configuration in pressure mode, then switch to position mode. This ++ * gives a faster response time. Even so, we need to wait about 55us ++ * for things to stabilise. ++ */ ++static inline void ucb1x00_ts_read_xpos(struct ucb1x00_ts *ts) ++{ ++ ucb1x00_io_write(ts->ucb, 0, COLLIE_TC35143_GPIO_TBL_CHK); ++ ucb1x00_reg_write(ts->ucb, UCB_TS_CR, ++ UCB_TS_CR_TSMX_GND | UCB_TS_CR_TSPX_POW | ++ UCB_TS_CR_MODE_POS | UCB_TS_CR_BIAS_ENA); ++ ++ ++ ucb1x00_reg_write(ts->ucb, UCB_ADC_CR, ts->ucb->adc_cr | ++ UCB_ADC_INP_TSPY | UCB_ADC_SYNC_ENA); ++ udelay(100); ++ ucb1x00_reg_write(ts->ucb, UCB_ADC_CR, ts->ucb->adc_cr | ++ UCB_ADC_INP_TSPY | UCB_ADC_SYNC_ENA | ++ UCB_ADC_START); ++} ++ ++/* ++ * Switch to Y position mode and measure X plate. We switch the plate ++ * configuration in pressure mode, then switch to position mode. This ++ * gives a faster response time. Even so, we need to wait about 55us ++ * for things to stabilise. ++ */ ++static inline void ucb1x00_ts_read_ypos(struct ucb1x00_ts *ts) ++{ ++ ucb1x00_io_write(ts->ucb, 0, COLLIE_TC35143_GPIO_TBL_CHK); ++ ++ ucb1x00_reg_write(ts->ucb, UCB_TS_CR, ++ UCB_TS_CR_TSMY_GND | UCB_TS_CR_TSPY_POW | ++ UCB_TS_CR_MODE_POS | UCB_TS_CR_BIAS_ENA); ++ ++ ++ ucb1x00_reg_write(ts->ucb, UCB_ADC_CR, ts->ucb->adc_cr | ++ UCB_ADC_INP_TSPX | UCB_ADC_SYNC_ENA); ++ udelay(100); ++ ucb1x00_reg_write(ts->ucb, UCB_ADC_CR, ts->ucb->adc_cr | ++ UCB_ADC_INP_TSPX | UCB_ADC_SYNC_ENA | ++ UCB_ADC_START); ++} ++ ++/* ++ * Switch to X plate resistance mode. Set MX to ground, PX to ++ * supply. Measure current. ++ */ ++static inline unsigned int ucb1x00_ts_read_xres(struct ucb1x00_ts *ts) ++{ ++ ucb1x00_reg_write(ts->ucb, UCB_TS_CR, ++ UCB_TS_CR_TSMX_GND | UCB_TS_CR_TSPX_POW | ++ UCB_TS_CR_MODE_PRES | UCB_TS_CR_BIAS_ENA); ++ return ucb1x00_adc_read(ts->ucb, 0, ts->adcsync); ++} ++ ++/* ++ * Switch to Y plate resistance mode. Set MY to ground, PY to ++ * supply. Measure current. ++ */ ++static inline unsigned int ucb1x00_ts_read_yres(struct ucb1x00_ts *ts) ++{ ++ ucb1x00_reg_write(ts->ucb, UCB_TS_CR, ++ UCB_TS_CR_TSMY_GND | UCB_TS_CR_TSPY_POW | ++ UCB_TS_CR_MODE_PRES | UCB_TS_CR_BIAS_ENA); ++ return ucb1x00_adc_read(ts->ucb, 0, ts->adcsync); ++} ++ ++/* ++ * This is a RT kernel thread that handles the ADC accesses ++ * (mainly so we can use semaphores in the UCB1200 core code ++ * to serialise accesses to the ADC). ++ */ ++static int ucb1x00_thread(void *_ts) ++{ ++ struct ucb1x00_ts *ts = _ts; ++ struct task_struct *tsk = current; ++ DECLARE_WAITQUEUE(wait, tsk); ++ int state; ++ ++ /* ++ * We could run as a real-time thread. However, thus far ++ * this doesn't seem to be necessary. ++ */ ++ ++ add_wait_queue(&ts->irq_wait, &wait); ++ ++ while (!kthread_should_stop()) { ++ unsigned int data[3]; ++ ++ for (state=0; state<3; state++) { ++ ++ ucb1x00_adc_enable(ts->ucb); ++ ucb1x00_enable_irq(ts->ucb, UCB_IRQ_ADC, UCB_FALLING); ++ switch (state) { ++ /* Order matters here; last measurement seems to be more noisy then the ++ rest, and we care about pressure least */ ++ case 2: ucb1x00_ts_read_pressure(ts); ++ break; ++ case 0: ucb1x00_ts_read_ypos(ts); ++ break; ++ case 1: ucb1x00_ts_read_xpos(ts); ++ break; ++ } ++ /* wait for adc */ ++ try_to_freeze(); ++ schedule_timeout(1000 * HZ); ++ ucb1x00_disable_irq(ts->ucb, UCB_IRQ_ADC, UCB_FALLING); ++ data[state] = UCB_ADC_DAT(ucb1x00_reg_read(ts->ucb, UCB_ADC_DATA)); ++ ucb1x00_adc_disable(ts->ucb); ++ } ++ ++ /* If not pressed any more, try to sleep! */ ++ if (data[2] < 300) { ++ set_task_state(tsk, TASK_INTERRUPTIBLE); ++ ucb1x00_enable_irq(ts->ucb, UCB_IRQ_TSPX, UCB_RISING); ++ ucb1x00_ts_mode_int(ts); ++ ucb1x00_disable(ts->ucb); ++ ucb1x00_ts_event_release(ts); ++ try_to_freeze(); ++ schedule_timeout(1000 * HZ); ++ ucb1x00_disable_irq(ts->ucb, UCB_IRQ_TSPX, UCB_RISING); ++ ucb1x00_enable(ts->ucb); ++ } else { ++ ucb1x00_ts_evt_add(ts, data[2], data[1], data[0]); ++ } ++ ucb1x00_disable(ts->ucb); ++ msleep(20); ++ ucb1x00_enable(ts->ucb); ++ } ++ ++ remove_wait_queue(&ts->irq_wait, &wait); ++ ++ ts->rtask = NULL; ++ return 0; ++} ++ ++/* ++ * We only detect touch screen _touches_ with this interrupt ++ * handler, and even then we just schedule our task. ++ */ ++static void ucb1x00_ts_irq(int idx, void *id) ++{ ++ struct ucb1x00_ts *ts = id; ++ wake_up(&ts->irq_wait); ++} ++ ++static void ucb1x00_adc_irq(int idx, void *id) ++{ ++ struct ucb1x00_ts *ts = id; ++ wake_up(&ts->irq_wait); ++} ++ ++static int ucb1x00_ts_open(struct input_dev *idev) ++{ ++ struct ucb1x00_ts *ts = input_get_drvdata(idev); ++ int ret = 0; ++ ++ BUG_ON(ts->rtask); ++ ++ init_waitqueue_head(&ts->irq_wait); ++ ++ ret = ucb1x00_hook_irq(ts->ucb, UCB_IRQ_TSPX, ucb1x00_ts_irq, ts); ++ if (ret < 0) ++ return ret; ++ ++ ret = ucb1x00_hook_irq(ts->ucb, UCB_IRQ_ADC, ucb1x00_adc_irq, ts); ++ if (ret < 0) { ++ ucb1x00_free_irq(ts->ucb, UCB_IRQ_TSPX, ts); ++ return ret; ++ } ++ ++ ucb1x00_enable_irq(ts->ucb, UCB_IRQ_TSPX, UCB_RISING); ++ ++ /* ++ * If we do this at all, we should allow the user to ++ * measure and read the X and Y resistance at any time. ++ */ ++ ucb1x00_adc_enable(ts->ucb); ++ ts->x_res = ucb1x00_ts_read_xres(ts); ++ ts->y_res = ucb1x00_ts_read_yres(ts); ++ ucb1x00_adc_disable(ts->ucb); ++ ++ if (machine_is_collie()) { ++ ucb1x00_io_set_dir(ts->ucb, 0, COLLIE_TC35143_GPIO_TBL_CHK); ++ } ++ ++ ts->rtask = kthread_run(ucb1x00_thread, ts, "ktsd"); ++ if (!IS_ERR(ts->rtask)) { ++ ret = 0; ++ } else { ++ ucb1x00_free_irq(ts->ucb, UCB_IRQ_TSPX, ts); ++ ts->rtask = NULL; ++ ret = -EFAULT; ++ } ++ ++ return ret; ++} ++ ++/* ++ * Release touchscreen resources. Disable IRQs. ++ */ ++static void ucb1x00_ts_close(struct input_dev *idev) ++{ ++ struct ucb1x00_ts *ts = input_get_drvdata(idev); ++ ++ if (ts->rtask) ++ kthread_stop(ts->rtask); ++ ++ ucb1x00_enable(ts->ucb); ++ ucb1x00_free_irq(ts->ucb, UCB_IRQ_TSPX, ts); ++ ucb1x00_free_irq(ts->ucb, UCB_IRQ_ADC, ts); ++ ucb1x00_reg_write(ts->ucb, UCB_TS_CR, 0); ++ ucb1x00_disable(ts->ucb); ++} ++ ++#ifdef CONFIG_PM ++static int ucb1x00_ts_resume(struct ucb1x00_dev *dev) ++{ ++ struct ucb1x00_ts *ts = dev->priv; ++ ++ if (ts->rtask != NULL) { ++ /* ++ * Restart the TS thread to ensure the ++ * TS interrupt mode is set up again ++ * after sleep. ++ */ ++ wake_up(&ts->irq_wait); ++ } ++ return 0; ++} ++#else ++#define ucb1x00_ts_resume NULL ++#endif ++ ++ ++/* ++ * Initialisation. ++ */ ++static int ucb1x00_ts_add(struct ucb1x00_dev *dev) ++{ ++ struct ucb1x00_ts *ts; ++ struct input_dev *idev; ++ int err; ++ ++ ts = kzalloc(sizeof(struct ucb1x00_ts), GFP_KERNEL); ++ idev = input_allocate_device(); ++ if (!ts || !idev) { ++ err = -ENOMEM; ++ goto fail; ++ } ++ ++ ts->ucb = dev->ucb; ++ ts->idev = idev; ++ ts->adcsync = adcsync ? UCB_SYNC : UCB_NOSYNC; ++ ++ input_set_drvdata(idev, ts); ++ idev->name = "Touchscreen panel"; ++ idev->id.product = ts->ucb->id; ++ idev->open = ucb1x00_ts_open; ++ idev->close = ucb1x00_ts_close; ++ ++ __set_bit(EV_ABS, idev->evbit); ++ __set_bit(ABS_X, idev->absbit); ++ __set_bit(ABS_Y, idev->absbit); ++ __set_bit(ABS_PRESSURE, idev->absbit); ++ ++ input_set_abs_params(ts->idev, ABS_X, 0, 450, 0, 0); ++ input_set_abs_params(ts->idev, ABS_Y, 200, 800, 0, 0); ++ input_set_abs_params(ts->idev, ABS_PRESSURE, 400, 800, 0, 0); ++ ++ ++ err = input_register_device(idev); ++ if (err) ++ goto fail; ++ ++ dev->priv = ts; ++ ++ return 0; ++ ++ fail: ++ input_free_device(idev); ++ kfree(ts); ++ return err; ++} ++ ++static void ucb1x00_ts_remove(struct ucb1x00_dev *dev) ++{ ++ struct ucb1x00_ts *ts = dev->priv; ++ ++ input_unregister_device(ts->idev); ++ kfree(ts); ++} ++ ++static struct ucb1x00_driver ucb1x00_ts_driver = { ++ .add = ucb1x00_ts_add, ++ .remove = ucb1x00_ts_remove, ++ .resume = ucb1x00_ts_resume, ++}; ++ ++static int __init ucb1x00_ts_init(void) ++{ ++ return ucb1x00_register_driver(&ucb1x00_ts_driver); ++} ++ ++static void __exit ucb1x00_ts_exit(void) ++{ ++ ucb1x00_unregister_driver(&ucb1x00_ts_driver); ++} ++ ++module_param(adcsync, int, 0444); ++module_init(ucb1x00_ts_init); ++module_exit(ucb1x00_ts_exit); ++ ++MODULE_AUTHOR("Russell King <rmk@arm.linux.org.uk>"); ++MODULE_DESCRIPTION("UCB1x00 touchscreen driver"); ++MODULE_LICENSE("GPL"); +diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile +index 4981aff..7bbba6e 100644 +--- a/drivers/mfd/Makefile ++++ b/drivers/mfd/Makefile +@@ -24,7 +24,6 @@ obj-$(CONFIG_MFD_CORE) += mfd-core.o + obj-$(CONFIG_MCP) += mcp-core.o + obj-$(CONFIG_MCP_SA11X0) += mcp-sa11x0.o + obj-$(CONFIG_MCP_UCB1200) += ucb1x00-core.o +- + ifeq ($(CONFIG_SA1100_ASSABET),y) + obj-$(CONFIG_MCP_UCB1200) += ucb1x00-assabet.o + endif +diff --git a/include/linux/mfd/ucb1x00.h b/include/linux/mfd/ucb1x00.h +index eac3463..70eb763 100644 +--- a/include/linux/mfd/ucb1x00.h ++++ b/include/linux/mfd/ucb1x00.h +@@ -35,7 +35,10 @@ + #define UCB_IE_TCLIP (1 << 14) + #define UCB_IE_ACLIP (1 << 15) + ++/* UCB1200 irqs */ ++#define UCB_IRQ_ADC 11 + #define UCB_IRQ_TSPX 12 ++#define UCB_IRQ_TSMX 13 + + #define UCB_TC_A 0x05 + #define UCB_TC_A_LOOP (1 << 7) /* UCB1200 */ +-- +1.5.6.5 + diff --git a/packages/linux/linux-2.6.28/collie/0014-collie-locomo-led-change-default-trigger.patch b/packages/linux/linux-2.6.28/collie/0014-collie-locomo-led-change-default-trigger.patch new file mode 100644 index 0000000000..4d2828e53a --- /dev/null +++ b/packages/linux/linux-2.6.28/collie/0014-collie-locomo-led-change-default-trigger.patch @@ -0,0 +1,27 @@ +From 047e4432e024fbec1e308e3c496822f52ce63ecb Mon Sep 17 00:00:00 2001 +From: Thomas Kunze <thommycheck@gmx.de> +Date: Tue, 10 Feb 2009 13:21:42 +0100 +Subject: [PATCH 14/23] collie: locomo-led change default trigger + +Collie uses now the powersupply framework. Change the +default led-trigger of locomo-led to reflect that. +--- + drivers/leds/leds-locomo.c | 2 +- + 1 files changed, 1 insertions(+), 1 deletions(-) + +diff --git a/drivers/leds/leds-locomo.c b/drivers/leds/leds-locomo.c +index 5d91362..1f7c10f 100644 +--- a/drivers/leds/leds-locomo.c ++++ b/drivers/leds/leds-locomo.c +@@ -44,7 +44,7 @@ static void locomoled_brightness_set1(struct led_classdev *led_cdev, + + static struct led_classdev locomo_led0 = { + .name = "locomo:amber:charge", +- .default_trigger = "sharpsl-charge", ++ .default_trigger = "main-battery-charging", + .brightness_set = locomoled_brightness_set0, + }; + +-- +1.5.6.5 + diff --git a/packages/linux/linux-2.6.28/collie/0015-SA1100-make-gpio_to_irq-and-reverse-a-macro.patch b/packages/linux/linux-2.6.28/collie/0015-SA1100-make-gpio_to_irq-and-reverse-a-macro.patch new file mode 100644 index 0000000000..99d0314a46 --- /dev/null +++ b/packages/linux/linux-2.6.28/collie/0015-SA1100-make-gpio_to_irq-and-reverse-a-macro.patch @@ -0,0 +1,43 @@ +From 87e4ecb2702d0d1a800da0ba81cd867b0f150410 Mon Sep 17 00:00:00 2001 +From: Thomas Kunze <thommycheck@gmx.de> +Date: Mon, 9 Feb 2009 23:14:44 +0100 +Subject: [PATCH 15/23] SA1100: make gpio_to_irq and reverse a macro + +The function can't be used for static initialisations so +convert them to macros. +--- + arch/arm/mach-sa1100/include/mach/gpio.h | 19 ++++--------------- + 1 files changed, 4 insertions(+), 15 deletions(-) + +diff --git a/arch/arm/mach-sa1100/include/mach/gpio.h b/arch/arm/mach-sa1100/include/mach/gpio.h +index 582a0c9..7befc10 100644 +--- a/arch/arm/mach-sa1100/include/mach/gpio.h ++++ b/arch/arm/mach-sa1100/include/mach/gpio.h +@@ -49,20 +49,9 @@ static inline void gpio_set_value(unsigned gpio, int value) + + #define gpio_cansleep __gpio_cansleep + +-static inline unsigned gpio_to_irq(unsigned gpio) +-{ +- if (gpio < 11) +- return IRQ_GPIO0 + gpio; +- else +- return IRQ_GPIO11 - 11 + gpio; +-} +- +-static inline unsigned irq_to_gpio(unsigned irq) +-{ +- if (irq < IRQ_GPIO11_27) +- return irq - IRQ_GPIO0; +- else +- return irq - IRQ_GPIO11 + 11; +-} ++#define gpio_to_irq(gpio) ((gpio < 11) ? (IRQ_GPIO0 + gpio) : \ ++ (IRQ_GPIO11 - 11 + gpio)) ++#define irq_to_gpio(irq) ((irq < IRQ_GPIO11_27) ? (irq - IRQ_GPIO0) : \ ++ (irq - IRQ_GPIO11 + 11)) + + #endif +-- +1.5.6.5 + diff --git a/packages/linux/linux-2.6.28/collie/0016-add-gpiolib-support-to-ucb1x00.patch b/packages/linux/linux-2.6.28/collie/0016-add-gpiolib-support-to-ucb1x00.patch new file mode 100644 index 0000000000..aab08a66c9 --- /dev/null +++ b/packages/linux/linux-2.6.28/collie/0016-add-gpiolib-support-to-ucb1x00.patch @@ -0,0 +1,242 @@ +From 1de1b5c2860d889a9422f187ad90d8e38b2431fd Mon Sep 17 00:00:00 2001 +From: Thomas Kunze <thommycheck@gmx.de> +Date: Tue, 10 Feb 2009 14:50:56 +0100 +Subject: [PATCH 16/23] add gpiolib support to ucb1x00 + +The old access methods to the gpios will be removed when +all users has been converted. (mainly ucb1x00-ts) +--- + arch/arm/mach-sa1100/include/mach/mcp.h | 1 + + drivers/mfd/mcp-sa11x0.c | 1 + + drivers/mfd/ucb1x00-core.c | 87 ++++++++++++++++++++++++++++++- + include/linux/mfd/mcp.h | 1 + + include/linux/mfd/ucb1x00.h | 3 + + 5 files changed, 91 insertions(+), 2 deletions(-) + +diff --git a/arch/arm/mach-sa1100/include/mach/mcp.h b/arch/arm/mach-sa1100/include/mach/mcp.h +index fb8b09a..ed1a331 100644 +--- a/arch/arm/mach-sa1100/include/mach/mcp.h ++++ b/arch/arm/mach-sa1100/include/mach/mcp.h +@@ -16,6 +16,7 @@ struct mcp_plat_data { + u32 mccr0; + u32 mccr1; + unsigned int sclk_rate; ++ int gpio_base; + }; + + #endif +diff --git a/drivers/mfd/mcp-sa11x0.c b/drivers/mfd/mcp-sa11x0.c +index 88c81cf..dfa59eb 100644 +--- a/drivers/mfd/mcp-sa11x0.c ++++ b/drivers/mfd/mcp-sa11x0.c +@@ -163,6 +163,7 @@ static int mcp_sa11x0_probe(struct platform_device *pdev) + mcp->dma_audio_wr = DMA_Ser4MCP0Wr; + mcp->dma_telco_rd = DMA_Ser4MCP1Rd; + mcp->dma_telco_wr = DMA_Ser4MCP1Wr; ++ mcp->gpio_base = data->gpio_base; + + platform_set_drvdata(pdev, mcp); + +diff --git a/drivers/mfd/ucb1x00-core.c b/drivers/mfd/ucb1x00-core.c +index bc2c1ba..b9c3f3d 100644 +--- a/drivers/mfd/ucb1x00-core.c ++++ b/drivers/mfd/ucb1x00-core.c +@@ -25,11 +25,11 @@ + #include <linux/device.h> + #include <linux/mutex.h> + #include <linux/mfd/ucb1x00.h> ++#include <linux/gpio.h> + + #include <asm/dma.h> + #include <mach/hardware.h> + +- + static DEFINE_MUTEX(ucb1x00_mutex); + static LIST_HEAD(ucb1x00_drivers); + static LIST_HEAD(ucb1x00_devices); +@@ -107,6 +107,60 @@ unsigned int ucb1x00_io_read(struct ucb1x00 *ucb) + return ucb1x00_reg_read(ucb, UCB_IO_DATA); + } + ++static void ucb1x00_gpio_set(struct gpio_chip *chip, unsigned offset, int value) ++{ ++ struct ucb1x00 *ucb = container_of(chip, struct ucb1x00, gpio); ++ unsigned long flags; ++ ++ spin_lock_irqsave(&ucb->io_lock, flags); ++ if (value) ++ ucb->io_out |= 1 << offset; ++ else ++ ucb->io_out &= ~(1 << offset); ++ ++ ucb1x00_reg_write(ucb, UCB_IO_DATA, ucb->io_out); ++ spin_unlock_irqrestore(&ucb->io_lock, flags); ++} ++ ++static int ucb1x00_gpio_get(struct gpio_chip *chip, unsigned offset) ++{ ++ struct ucb1x00 *ucb = container_of(chip, struct ucb1x00, gpio); ++ return ucb1x00_reg_read(ucb, UCB_IO_DATA) & (1 << offset); ++} ++ ++static int ucb1x00_gpio_direction_input(struct gpio_chip *chip, unsigned offset) ++{ ++ struct ucb1x00 *ucb = container_of(chip, struct ucb1x00, gpio); ++ unsigned long flags; ++ ++ spin_lock_irqsave(&ucb->io_lock, flags); ++ ucb->io_dir &= ~(1 << offset); ++ ucb1x00_reg_write(ucb, UCB_IO_DIR, ucb->io_dir); ++ spin_unlock_irqrestore(&ucb->io_lock, flags); ++ ++ return 0; ++} ++ ++static int ucb1x00_gpio_direction_output(struct gpio_chip *chip, unsigned offset ++ , int value) ++{ ++ struct ucb1x00 *ucb = container_of(chip, struct ucb1x00, gpio); ++ unsigned long flags; ++ ++ spin_lock_irqsave(&ucb->io_lock, flags); ++ ucb->io_dir |= (1 << offset); ++ ucb1x00_reg_write(ucb, UCB_IO_DIR, ucb->io_dir); ++ ++ if (value) ++ ucb->io_out |= 1 << offset; ++ else ++ ucb->io_out &= ~(1 << offset); ++ ucb1x00_reg_write(ucb, UCB_IO_DATA, ucb->io_out); ++ spin_unlock_irqrestore(&ucb->io_lock, flags); ++ ++ return 0; ++} ++ + /* + * UCB1300 data sheet says we must: + * 1. enable ADC => 5us (including reference startup time) +@@ -475,6 +529,7 @@ static int ucb1x00_probe(struct mcp *mcp) + struct ucb1x00_driver *drv; + unsigned int id; + int ret = -ENODEV; ++ int temp; + + mcp_enable(mcp); + id = mcp_reg_read(mcp, UCB_ID); +@@ -507,12 +562,27 @@ static int ucb1x00_probe(struct mcp *mcp) + goto err_free; + } + ++ ucb->gpio.base = -1; ++ if (mcp->gpio_base != 0) { ++ ucb->gpio.label = dev_name(&ucb->dev); ++ ucb->gpio.base = mcp->gpio_base; ++ ucb->gpio.ngpio = 10; ++ ucb->gpio.set = ucb1x00_gpio_set; ++ ucb->gpio.get = ucb1x00_gpio_get; ++ ucb->gpio.direction_input = ucb1x00_gpio_direction_input; ++ ucb->gpio.direction_output = ucb1x00_gpio_direction_output; ++ ret = gpiochip_add(&ucb->gpio); ++ if (ret) ++ goto err_free; ++ } else ++ dev_info(&ucb->dev, "gpio_base not set so no gpiolib support"); ++ + ret = request_irq(ucb->irq, ucb1x00_irq, IRQF_TRIGGER_RISING, + "UCB1x00", ucb); + if (ret) { + printk(KERN_ERR "ucb1x00: unable to grab irq%d: %d\n", + ucb->irq, ret); +- goto err_free; ++ goto err_gpio; + } + + mcp_set_drvdata(mcp, ucb); +@@ -521,6 +591,7 @@ static int ucb1x00_probe(struct mcp *mcp) + if (ret) + goto err_irq; + ++ + INIT_LIST_HEAD(&ucb->devs); + mutex_lock(&ucb1x00_mutex); + list_add(&ucb->node, &ucb1x00_devices); +@@ -528,10 +599,14 @@ static int ucb1x00_probe(struct mcp *mcp) + ucb1x00_add_dev(ucb, drv); + } + mutex_unlock(&ucb1x00_mutex); ++ + goto out; + + err_irq: + free_irq(ucb->irq, ucb); ++ err_gpio: ++ if (ucb->gpio.base != -1) ++ temp = gpiochip_remove(&ucb->gpio); + err_free: + kfree(ucb); + err_disable: +@@ -544,6 +619,7 @@ static void ucb1x00_remove(struct mcp *mcp) + { + struct ucb1x00 *ucb = mcp_get_drvdata(mcp); + struct list_head *l, *n; ++ int ret; + + mutex_lock(&ucb1x00_mutex); + list_del(&ucb->node); +@@ -553,6 +629,12 @@ static void ucb1x00_remove(struct mcp *mcp) + } + mutex_unlock(&ucb1x00_mutex); + ++ if (ucb->gpio.base != -1) { ++ ret = gpiochip_remove(&ucb->gpio); ++ if (ret) ++ dev_err(&ucb->dev, "Can't remove gpio chip: %d\n", ret); ++ } ++ + free_irq(ucb->irq, ucb); + device_unregister(&ucb->dev); + } +@@ -603,6 +685,7 @@ static int ucb1x00_resume(struct mcp *mcp) + struct ucb1x00 *ucb = mcp_get_drvdata(mcp); + struct ucb1x00_dev *dev; + ++ ucb1x00_reg_write(ucb, UCB_IO_DIR, ucb->io_dir); + mutex_lock(&ucb1x00_mutex); + list_for_each_entry(dev, &ucb->devs, dev_node) { + if (dev->drv->resume) +diff --git a/include/linux/mfd/mcp.h b/include/linux/mfd/mcp.h +index be95e09..ee49670 100644 +--- a/include/linux/mfd/mcp.h ++++ b/include/linux/mfd/mcp.h +@@ -26,6 +26,7 @@ struct mcp { + dma_device_t dma_telco_rd; + dma_device_t dma_telco_wr; + struct device attached_device; ++ int gpio_base; + }; + + struct mcp_ops { +diff --git a/include/linux/mfd/ucb1x00.h b/include/linux/mfd/ucb1x00.h +index 70eb763..b13171e 100644 +--- a/include/linux/mfd/ucb1x00.h ++++ b/include/linux/mfd/ucb1x00.h +@@ -11,6 +11,8 @@ + #define UCB1200_H + + #include <linux/mfd/mcp.h> ++#include <linux/gpio.h> ++ + #define UCB_IO_DATA 0x00 + #define UCB_IO_DIR 0x01 + +@@ -126,6 +128,7 @@ struct ucb1x00 { + struct device dev; + struct list_head node; + struct list_head devs; ++ struct gpio_chip gpio; + }; + + struct ucb1x00_driver; +-- +1.5.6.5 + diff --git a/packages/linux/linux-2.6.28/collie/0017-collie-convert-to-gpiolib-for-ucb1x00.patch b/packages/linux/linux-2.6.28/collie/0017-collie-convert-to-gpiolib-for-ucb1x00.patch new file mode 100644 index 0000000000..c08c21a977 --- /dev/null +++ b/packages/linux/linux-2.6.28/collie/0017-collie-convert-to-gpiolib-for-ucb1x00.patch @@ -0,0 +1,137 @@ +From c1bf0dcce68a5e01213e18c9ca1fd49efad4ddff Mon Sep 17 00:00:00 2001 +From: Thomas Kunze <thommycheck@gmx.de> +Date: Tue, 10 Feb 2009 18:15:34 +0100 +Subject: [PATCH 17/23] collie: convert to gpiolib for ucb1x00 + +Only the parts used for collie_battery are converted. +The rest will be cleaned up later. + +Conflicts: + + arch/arm/mach-sa1100/collie.c + arch/arm/mach-sa1100/include/mach/collie.h +--- + arch/arm/mach-sa1100/collie.c | 3 +- + arch/arm/mach-sa1100/include/mach/collie.h | 68 ++++++++++++++------------- + 2 files changed, 37 insertions(+), 34 deletions(-) + +diff --git a/arch/arm/mach-sa1100/collie.c b/arch/arm/mach-sa1100/collie.c +index ec673b8..4b52f30 100644 +--- a/arch/arm/mach-sa1100/collie.c ++++ b/arch/arm/mach-sa1100/collie.c +@@ -87,6 +87,7 @@ static struct scoop_pcmcia_config collie_pcmcia_config = { + static struct mcp_plat_data collie_mcp_data = { + .mccr0 = MCCR0_ADM | MCCR0_ExtClk, + .sclk_rate = 9216000, ++ .gpio_base = COLLIE_TC35143_GPIO_BASE, + }; + + #ifdef CONFIG_SHARP_LOCOMO +@@ -256,7 +257,7 @@ static void __init collie_init(void) + PPC_LDD6 | PPC_LDD7 | PPC_L_PCLK | PPC_L_LCLK | PPC_L_FCLK | PPC_L_BIAS | + PPC_TXD1 | PPC_TXD2 | PPC_TXD3 | PPC_TXD4 | PPC_SCLK | PPC_SFRM; + +- PWER = COLLIE_GPIO_AC_IN | COLLIE_GPIO_CO | COLLIE_GPIO_ON_KEY | ++ PWER = COLLIE_GPIO_AC_IN_ | COLLIE_GPIO_CO_ | COLLIE_GPIO_ON_KEY | + COLLIE_GPIO_WAKEUP | COLLIE_GPIO_nREMOCON_INT | PWER_RTC; + + PGSR = COLLIE_GPIO_nREMOCON_ON; +diff --git a/arch/arm/mach-sa1100/include/mach/collie.h b/arch/arm/mach-sa1100/include/mach/collie.h +index 799c930..bba8978 100644 +--- a/arch/arm/mach-sa1100/include/mach/collie.h ++++ b/arch/arm/mach-sa1100/include/mach/collie.h +@@ -15,7 +15,7 @@ + + + #define COLLIE_SCOOP_GPIO_BASE (GPIO_MAX + 1) +-#define COLLIE_SCP_CHARGE_ON SCOOP_GPCR_PA11 ++#define COLLIE_GPIO_CHARGE_ON (COLLIE_SCOOP_GPIO_BASE) + #define COLLIE_SCP_DIAG_BOOT1 SCOOP_GPCR_PA12 + #define COLLIE_SCP_DIAG_BOOT2 SCOOP_GPCR_PA13 + #define COLLIE_SCP_MUTE_L SCOOP_GPCR_PA14 +@@ -25,28 +25,29 @@ + #define COLLIE_GPIO_VPEN (COLLIE_SCOOP_GPIO_BASE + 7) + #define COLLIE_GPIO_LB_VOL_CHG (COLLIE_SCOOP_GPIO_BASE + 8) + +-#define COLLIE_SCOOP_IO_DIR ( COLLIE_SCP_CHARGE_ON | COLLIE_SCP_MUTE_L | COLLIE_SCP_MUTE_R | \ ++#define COLLIE_SCOOP_IO_DIR (COLLIE_SCP_MUTE_L | COLLIE_SCP_MUTE_R | \ + COLLIE_SCP_5VON | COLLIE_SCP_AMP_ON ) +-#define COLLIE_SCOOP_IO_OUT ( COLLIE_SCP_MUTE_L | COLLIE_SCP_MUTE_R | \ +- COLLIE_SCP_CHARGE_ON ) ++#define COLLIE_SCOOP_IO_OUT (COLLIE_SCP_MUTE_L | COLLIE_SCP_MUTE_R) + + /* GPIOs for which the generic definition doesn't say much */ + +-#define COLLIE_GPIO_ON_KEY GPIO_GPIO (0) +-#define COLLIE_GPIO_AC_IN GPIO_GPIO (1) +-#define COLLIE_GPIO_SDIO_INT GPIO_GPIO (11) +-#define COLLIE_GPIO_CF_IRQ GPIO_GPIO (14) +-#define COLLIE_GPIO_nREMOCON_INT GPIO_GPIO (15) +-#define COLLIE_GPIO_UCB1x00_RESET GPIO_GPIO (16) +-#define COLLIE_GPIO_nMIC_ON GPIO_GPIO (17) +-#define COLLIE_GPIO_nREMOCON_ON GPIO_GPIO (18) +-#define COLLIE_GPIO_CO GPIO_GPIO (20) +-#define COLLIE_GPIO_MCP_CLK GPIO_GPIO (21) +-#define COLLIE_GPIO_CF_CD GPIO_GPIO (22) +-#define COLLIE_GPIO_UCB1x00_IRQ GPIO_GPIO (23) +-#define COLLIE_GPIO_WAKEUP GPIO_GPIO (24) +-#define COLLIE_GPIO_GA_INT GPIO_GPIO (25) +-#define COLLIE_GPIO_MAIN_BAT_LOW GPIO_GPIO (26) ++#define COLLIE_GPIO_ON_KEY GPIO_GPIO(0) ++#define COLLIE_GPIO_AC_IN (1) ++#define COLLIE_GPIO_AC_IN_ GPIO_GPIO(1) ++#define COLLIE_GPIO_SDIO_INT GPIO_GPIO(11) ++#define COLLIE_GPIO_CF_IRQ GPIO_GPIO(14) ++#define COLLIE_GPIO_nREMOCON_INT GPIO_GPIO(15) ++#define COLLIE_GPIO_UCB1x00_RESET GPIO_GPIO(16) ++#define COLLIE_GPIO_nMIC_ON GPIO_GPIO(17) ++#define COLLIE_GPIO_nREMOCON_ON GPIO_GPIO(18) ++#define COLLIE_GPIO_CO (20) ++#define COLLIE_GPIO_CO_ GPIO_GPIO(20) ++#define COLLIE_GPIO_MCP_CLK GPIO_GPIO(21) ++#define COLLIE_GPIO_CF_CD GPIO_GPIO(22) ++#define COLLIE_GPIO_UCB1x00_IRQ GPIO_GPIO(23) ++#define COLLIE_GPIO_WAKEUP GPIO_GPIO(24) ++#define COLLIE_GPIO_GA_INT GPIO_GPIO(25) ++#define COLLIE_GPIO_MAIN_BAT_LOW (26) + + /* Interrupts */ + +@@ -70,19 +71,20 @@ + #define COLLIE_LCM_IRQ_GPIO_nSD_WP IRQ_LOCOMO_GPIO14 + + /* GPIO's on the TC35143AF (Toshiba Analog Frontend) */ +-#define COLLIE_TC35143_GPIO_VERSION0 UCB_IO_0 /* GPIO0=Version */ +-#define COLLIE_TC35143_GPIO_TBL_CHK UCB_IO_1 /* GPIO1=TBL_CHK */ +-#define COLLIE_TC35143_GPIO_VPEN_ON UCB_IO_2 /* GPIO2=VPNE_ON */ +-#define COLLIE_TC35143_GPIO_IR_ON UCB_IO_3 /* GPIO3=IR_ON */ +-#define COLLIE_TC35143_GPIO_AMP_ON UCB_IO_4 /* GPIO4=AMP_ON */ +-#define COLLIE_TC35143_GPIO_VERSION1 UCB_IO_5 /* GPIO5=Version */ +-#define COLLIE_TC35143_GPIO_FS8KLPF UCB_IO_5 /* GPIO5=fs 8k LPF */ +-#define COLLIE_TC35143_GPIO_BUZZER_BIAS UCB_IO_6 /* GPIO6=BUZZER BIAS */ +-#define COLLIE_TC35143_GPIO_MBAT_ON UCB_IO_7 /* GPIO7=MBAT_ON */ +-#define COLLIE_TC35143_GPIO_BBAT_ON UCB_IO_8 /* GPIO8=BBAT_ON */ +-#define COLLIE_TC35143_GPIO_TMP_ON UCB_IO_9 /* GPIO9=TMP_ON */ +-#define COLLIE_TC35143_GPIO_IN ( UCB_IO_0 | UCB_IO_2 | UCB_IO_5 ) +-#define COLLIE_TC35143_GPIO_OUT ( UCB_IO_1 | UCB_IO_3 | UCB_IO_4 | UCB_IO_6 | \ +- UCB_IO_7 | UCB_IO_8 | UCB_IO_9 ) ++#define COLLIE_TC35143_GPIO_BASE (GPIO_MAX + 13) ++#define COLLIE_TC35143_GPIO_VERSION0 UCB_IO_0 ++#define COLLIE_TC35143_GPIO_TBL_CHK UCB_IO_1 ++#define COLLIE_TC35143_GPIO_VPEN_ON UCB_IO_2 ++#define COLLIE_TC35143_GPIO_IR_ON UCB_IO_3 ++#define COLLIE_TC35143_GPIO_AMP_ON UCB_IO_4 ++#define COLLIE_TC35143_GPIO_VERSION1 UCB_IO_5 ++#define COLLIE_TC35143_GPIO_FS8KLPF UCB_IO_5 ++#define COLLIE_TC35143_GPIO_BUZZER_BIAS UCB_IO_6 ++#define COLLIE_GPIO_MBAT_ON (COLLIE_TC35143_GPIO_BASE + 7) ++#define COLLIE_GPIO_BBAT_ON (COLLIE_TC35143_GPIO_BASE + 8) ++#define COLLIE_GPIO_TMP_ON (COLLIE_TC35143_GPIO_BASE + 9) ++#define COLLIE_TC35143_GPIO_IN (UCB_IO_0 | UCB_IO_2 | UCB_IO_5) ++#define COLLIE_TC35143_GPIO_OUT (UCB_IO_1 | UCB_IO_3 | UCB_IO_4 \ ++ | UCB_IO_6) + + #endif +-- +1.5.6.5 + diff --git a/packages/linux/linux-2.6.28/collie/0018-collie-add-battery-driver.patch b/packages/linux/linux-2.6.28/collie/0018-collie-add-battery-driver.patch new file mode 100644 index 0000000000..b28db63d87 --- /dev/null +++ b/packages/linux/linux-2.6.28/collie/0018-collie-add-battery-driver.patch @@ -0,0 +1,473 @@ +From a2cf77eaf64b201a00b9682c25596ef0bcda8dc4 Mon Sep 17 00:00:00 2001 +From: Thomas Kunze <thommycheck@gmx.de> +Date: Tue, 10 Feb 2009 18:16:03 +0100 +Subject: [PATCH 18/23] collie: add battery driver + +This driver is based on tosa_battery.c. + +Conflicts: + + drivers/power/Makefile +--- + drivers/power/Kconfig | 7 + + drivers/power/Makefile | 1 + + drivers/power/collie_battery.c | 418 ++++++++++++++++++++++++++++++++++++++++ + 3 files changed, 426 insertions(+), 0 deletions(-) + create mode 100644 drivers/power/collie_battery.c + +diff --git a/drivers/power/Kconfig b/drivers/power/Kconfig +index 8e0c2b4..a945046 100644 +--- a/drivers/power/Kconfig ++++ b/drivers/power/Kconfig +@@ -56,6 +56,13 @@ config BATTERY_TOSA + Say Y to enable support for the battery on the Sharp Zaurus + SL-6000 (tosa) models. + ++config BATTERY_COLLIE ++ tristate "Sharp SL-5500 (collie) battery" ++ depends on SA1100_COLLIE && MCP_UCB1200 ++ help ++ Say Y to enable support for the battery on the Sharp Zaurus ++ SL-5500 (collie) models. ++ + config BATTERY_WM97XX + bool "WM97xx generic battery driver" + depends on TOUCHSCREEN_WM97XX=y +diff --git a/drivers/power/Makefile b/drivers/power/Makefile +index e8f1ece..51a7263 100644 +--- a/drivers/power/Makefile ++++ b/drivers/power/Makefile +@@ -21,5 +21,6 @@ obj-$(CONFIG_BATTERY_DS2760) += ds2760_battery.o + obj-$(CONFIG_BATTERY_PMU) += pmu_battery.o + obj-$(CONFIG_BATTERY_OLPC) += olpc_battery.o + obj-$(CONFIG_BATTERY_TOSA) += tosa_battery.o ++obj-$(CONFIG_BATTERY_COLLIE) += collie_battery.o + obj-$(CONFIG_BATTERY_WM97XX) += wm97xx_battery.o + obj-$(CONFIG_BATTERY_BQ27x00) += bq27x00_battery.o +diff --git a/drivers/power/collie_battery.c b/drivers/power/collie_battery.c +new file mode 100644 +index 0000000..039f41a +--- /dev/null ++++ b/drivers/power/collie_battery.c +@@ -0,0 +1,418 @@ ++/* ++ * Battery and Power Management code for the Sharp SL-5x00 ++ * ++ * Copyright (C) 2009 Thomas Kunze ++ * ++ * based on tosa_battery.c ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ * ++ */ ++#include <linux/kernel.h> ++#include <linux/module.h> ++#include <linux/power_supply.h> ++#include <linux/delay.h> ++#include <linux/spinlock.h> ++#include <linux/interrupt.h> ++#include <linux/gpio.h> ++#include <linux/mfd/ucb1x00.h> ++ ++#include <asm/mach/sharpsl_param.h> ++#include <asm/mach-types.h> ++#include <mach/collie.h> ++ ++static DEFINE_MUTEX(bat_lock); /* protects gpio pins */ ++static struct work_struct bat_work; ++static struct ucb1x00 *ucb; ++ ++struct collie_bat { ++ int status; ++ struct power_supply psy; ++ int full_chrg; ++ ++ struct mutex work_lock; /* protects data */ ++ ++ bool (*is_present)(struct collie_bat *bat); ++ int gpio_full; ++ int gpio_charge_on; ++ ++ int technology; ++ ++ int gpio_bat; ++ int adc_bat; ++ int adc_bat_divider; ++ int bat_max; ++ int bat_min; ++ ++ int gpio_temp; ++ int adc_temp; ++ int adc_temp_divider; ++}; ++ ++static struct collie_bat collie_bat_main; ++ ++static unsigned long collie_read_bat(struct collie_bat *bat) ++{ ++ unsigned long value = 0; ++ ++ if (bat->gpio_bat < 0 || bat->adc_bat < 0) ++ return 0; ++ mutex_lock(&bat_lock); ++ gpio_set_value(bat->gpio_bat, 1); ++ msleep(5); ++ ucb1x00_adc_enable(ucb); ++ value = ucb1x00_adc_read(ucb, bat->adc_bat, UCB_SYNC); ++ ucb1x00_adc_disable(ucb); ++ gpio_set_value(bat->gpio_bat, 0); ++ mutex_unlock(&bat_lock); ++ value = value * 1000000 / bat->adc_bat_divider; ++ ++ return value; ++} ++ ++static unsigned long collie_read_temp(struct collie_bat *bat) ++{ ++ unsigned long value = 0; ++ if (bat->gpio_temp < 0 || bat->adc_temp < 0) ++ return 0; ++ ++ mutex_lock(&bat_lock); ++ gpio_set_value(bat->gpio_temp, 1); ++ msleep(5); ++ ucb1x00_adc_enable(ucb); ++ value = ucb1x00_adc_read(ucb, bat->adc_temp, UCB_SYNC); ++ ucb1x00_adc_disable(ucb); ++ gpio_set_value(bat->gpio_temp, 0); ++ mutex_unlock(&bat_lock); ++ ++ value = value * 10000 / bat->adc_temp_divider; ++ ++ return value; ++} ++ ++static int collie_bat_get_property(struct power_supply *psy, ++ enum power_supply_property psp, ++ union power_supply_propval *val) ++{ ++ int ret = 0; ++ struct collie_bat *bat = container_of(psy, struct collie_bat, psy); ++ ++ if (bat->is_present && !bat->is_present(bat) ++ && psp != POWER_SUPPLY_PROP_PRESENT) { ++ return -ENODEV; ++ } ++ ++ switch (psp) { ++ case POWER_SUPPLY_PROP_STATUS: ++ val->intval = bat->status; ++ break; ++ case POWER_SUPPLY_PROP_TECHNOLOGY: ++ val->intval = bat->technology; ++ break; ++ case POWER_SUPPLY_PROP_VOLTAGE_NOW: ++ val->intval = collie_read_bat(bat); ++ break; ++ case POWER_SUPPLY_PROP_VOLTAGE_MAX: ++ if (bat->full_chrg == -1) ++ val->intval = bat->bat_max; ++ else ++ val->intval = bat->full_chrg; ++ break; ++ case POWER_SUPPLY_PROP_VOLTAGE_MAX_DESIGN: ++ val->intval = bat->bat_max; ++ break; ++ case POWER_SUPPLY_PROP_VOLTAGE_MIN_DESIGN: ++ val->intval = bat->bat_min; ++ break; ++ case POWER_SUPPLY_PROP_TEMP: ++ val->intval = collie_read_temp(bat); ++ break; ++ case POWER_SUPPLY_PROP_PRESENT: ++ val->intval = bat->is_present ? bat->is_present(bat) : 1; ++ break; ++ default: ++ ret = -EINVAL; ++ break; ++ } ++ return ret; ++} ++ ++static void collie_bat_external_power_changed(struct power_supply *psy) ++{ ++ schedule_work(&bat_work); ++} ++ ++static irqreturn_t collie_bat_gpio_isr(int irq, void *data) ++{ ++ pr_info("collie_bat_gpio irq: %d\n", gpio_get_value(irq_to_gpio(irq))); ++ schedule_work(&bat_work); ++ return IRQ_HANDLED; ++} ++ ++static void collie_bat_update(struct collie_bat *bat) ++{ ++ int old; ++ struct power_supply *psy = &bat->psy; ++ ++ mutex_lock(&bat->work_lock); ++ ++ old = bat->status; ++ ++ if (bat->is_present && !bat->is_present(bat)) { ++ printk(KERN_NOTICE "%s not present\n", psy->name); ++ bat->status = POWER_SUPPLY_STATUS_UNKNOWN; ++ bat->full_chrg = -1; ++ } else if (power_supply_am_i_supplied(psy)) { ++ if (bat->status == POWER_SUPPLY_STATUS_DISCHARGING) { ++ gpio_set_value(bat->gpio_charge_on, 1); ++ mdelay(15); ++ } ++ ++ if (gpio_get_value(bat->gpio_full)) { ++ if (old == POWER_SUPPLY_STATUS_CHARGING || ++ bat->full_chrg == -1) ++ bat->full_chrg = collie_read_bat(bat); ++ ++ gpio_set_value(bat->gpio_charge_on, 0); ++ bat->status = POWER_SUPPLY_STATUS_FULL; ++ } else { ++ gpio_set_value(bat->gpio_charge_on, 1); ++ bat->status = POWER_SUPPLY_STATUS_CHARGING; ++ } ++ } else { ++ gpio_set_value(bat->gpio_charge_on, 0); ++ bat->status = POWER_SUPPLY_STATUS_DISCHARGING; ++ } ++ ++ if (old != bat->status) ++ power_supply_changed(psy); ++ ++ mutex_unlock(&bat->work_lock); ++} ++ ++static void collie_bat_work(struct work_struct *work) ++{ ++ collie_bat_update(&collie_bat_main); ++} ++ ++ ++static enum power_supply_property collie_bat_main_props[] = { ++ POWER_SUPPLY_PROP_STATUS, ++ POWER_SUPPLY_PROP_TECHNOLOGY, ++ POWER_SUPPLY_PROP_VOLTAGE_MIN_DESIGN, ++ POWER_SUPPLY_PROP_VOLTAGE_NOW, ++ POWER_SUPPLY_PROP_VOLTAGE_MAX_DESIGN, ++ POWER_SUPPLY_PROP_VOLTAGE_MAX, ++ POWER_SUPPLY_PROP_PRESENT, ++ POWER_SUPPLY_PROP_TEMP, ++}; ++ ++static enum power_supply_property collie_bat_bu_props[] = { ++ POWER_SUPPLY_PROP_STATUS, ++ POWER_SUPPLY_PROP_TECHNOLOGY, ++ POWER_SUPPLY_PROP_VOLTAGE_MIN_DESIGN, ++ POWER_SUPPLY_PROP_VOLTAGE_NOW, ++ POWER_SUPPLY_PROP_VOLTAGE_MAX_DESIGN, ++ POWER_SUPPLY_PROP_VOLTAGE_MAX, ++ POWER_SUPPLY_PROP_PRESENT, ++}; ++ ++static struct collie_bat collie_bat_main = { ++ .status = POWER_SUPPLY_STATUS_DISCHARGING, ++ .full_chrg = -1, ++ .psy = { ++ .name = "main-battery", ++ .type = POWER_SUPPLY_TYPE_BATTERY, ++ .properties = collie_bat_main_props, ++ .num_properties = ARRAY_SIZE(collie_bat_main_props), ++ .get_property = collie_bat_get_property, ++ .external_power_changed = collie_bat_external_power_changed, ++ .use_for_apm = 1, ++ }, ++ ++ .gpio_full = COLLIE_GPIO_CO, ++ .gpio_charge_on = COLLIE_GPIO_CHARGE_ON, ++ ++ .technology = POWER_SUPPLY_TECHNOLOGY_LIPO, ++ ++ .gpio_bat = COLLIE_GPIO_MBAT_ON, ++ .adc_bat = UCB_ADC_INP_AD1, ++ .adc_bat_divider = 155, ++ .bat_max = 4310000, ++ .bat_min = 1551 * 1000000 / 414, ++ ++ .gpio_temp = COLLIE_GPIO_TMP_ON, ++ .adc_temp = UCB_ADC_INP_AD0, ++ .adc_temp_divider = 10000, ++}; ++ ++static struct collie_bat collie_bat_bu = { ++ .status = POWER_SUPPLY_STATUS_UNKNOWN, ++ .full_chrg = -1, ++ ++ .psy = { ++ .name = "backup-battery", ++ .type = POWER_SUPPLY_TYPE_BATTERY, ++ .properties = collie_bat_bu_props, ++ .num_properties = ARRAY_SIZE(collie_bat_bu_props), ++ .get_property = collie_bat_get_property, ++ .external_power_changed = collie_bat_external_power_changed, ++ }, ++ ++ .gpio_full = -1, ++ .gpio_charge_on = -1, ++ ++ .technology = POWER_SUPPLY_TECHNOLOGY_LiMn, ++ ++ .gpio_bat = COLLIE_GPIO_BBAT_ON, ++ .adc_bat = UCB_ADC_INP_AD1, ++ .adc_bat_divider = 155, ++ .bat_max = 3000000, ++ .bat_min = 1900000, ++ ++ .gpio_temp = -1, ++ .adc_temp = -1, ++ .adc_temp_divider = -1, ++}; ++ ++static struct { ++ int gpio; ++ char *name; ++ bool output; ++ int value; ++} gpios[] = { ++ { COLLIE_GPIO_CO, "main battery full", 0, 0 }, ++ { COLLIE_GPIO_MAIN_BAT_LOW, "main battery low", 0, 0 }, ++ { COLLIE_GPIO_CHARGE_ON, "main charge on", 1, 0 }, ++ { COLLIE_GPIO_MBAT_ON, "main battery", 1, 0 }, ++ { COLLIE_GPIO_TMP_ON, "main battery temp", 1, 0 }, ++ { COLLIE_GPIO_BBAT_ON, "backup battery", 1, 0 }, ++}; ++ ++#ifdef CONFIG_PM ++static int collie_bat_suspend(struct ucb1x00_dev *dev, pm_message_t state) ++{ ++ /* flush all pending status updates */ ++ flush_scheduled_work(); ++ return 0; ++} ++ ++static int collie_bat_resume(struct ucb1x00_dev *dev) ++{ ++ /* things may have changed while we were away */ ++ schedule_work(&bat_work); ++ return 0; ++} ++#else ++#define collie_bat_suspend NULL ++#define collie_bat_resume NULL ++#endif ++ ++static int __devinit collie_bat_probe(struct ucb1x00_dev *dev) ++{ ++ int ret; ++ int i; ++ ++ if (!machine_is_collie()) ++ return -ENODEV; ++ ++ ucb = dev->ucb; ++ ++ for (i = 0; i < ARRAY_SIZE(gpios); i++) { ++ ret = gpio_request(gpios[i].gpio, gpios[i].name); ++ if (ret) { ++ i--; ++ goto err_gpio; ++ } ++ ++ if (gpios[i].output) ++ ret = gpio_direction_output(gpios[i].gpio, ++ gpios[i].value); ++ else ++ ret = gpio_direction_input(gpios[i].gpio); ++ ++ if (ret) ++ goto err_gpio; ++ } ++ ++ mutex_init(&collie_bat_main.work_lock); ++ ++ INIT_WORK(&bat_work, collie_bat_work); ++ ++ ret = power_supply_register(&dev->ucb->dev, &collie_bat_main.psy); ++ if (ret) ++ goto err_psy_reg_main; ++ ret = power_supply_register(&dev->ucb->dev, &collie_bat_bu.psy); ++ if (ret) ++ goto err_psy_reg_bu; ++ ++ ret = request_irq(gpio_to_irq(COLLIE_GPIO_CO), ++ collie_bat_gpio_isr, ++ IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING, ++ "main full", &collie_bat_main); ++ if (!ret) { ++ schedule_work(&bat_work); ++ return 0; ++ } ++ power_supply_unregister(&collie_bat_bu.psy); ++err_psy_reg_bu: ++ power_supply_unregister(&collie_bat_main.psy); ++err_psy_reg_main: ++ ++ /* see comment in collie_bat_remove */ ++ flush_scheduled_work(); ++ ++ i--; ++err_gpio: ++ for (; i >= 0; i--) ++ gpio_free(gpios[i].gpio); ++ ++ return ret; ++} ++ ++static void __devexit collie_bat_remove(struct ucb1x00_dev *dev) ++{ ++ int i; ++ ++ free_irq(gpio_to_irq(COLLIE_GPIO_CO), &collie_bat_main); ++ ++ power_supply_unregister(&collie_bat_bu.psy); ++ power_supply_unregister(&collie_bat_main.psy); ++ ++ /* ++ * now flush all pending work. ++ * we won't get any more schedules, since all ++ * sources (isr and external_power_changed) ++ * are unregistered now. ++ */ ++ flush_scheduled_work(); ++ ++ for (i = ARRAY_SIZE(gpios) - 1; i >= 0; i--) ++ gpio_free(gpios[i].gpio); ++} ++ ++static struct ucb1x00_driver collie_bat_driver = { ++ .add = collie_bat_probe, ++ .remove = __devexit_p(collie_bat_remove), ++ .suspend = collie_bat_suspend, ++ .resume = collie_bat_resume, ++}; ++ ++static int __init collie_bat_init(void) ++{ ++ return ucb1x00_register_driver(&collie_bat_driver); ++} ++ ++static void __exit collie_bat_exit(void) ++{ ++ ucb1x00_unregister_driver(&collie_bat_driver); ++} ++ ++module_init(collie_bat_init); ++module_exit(collie_bat_exit); ++ ++MODULE_LICENSE("GPL"); ++MODULE_AUTHOR("Thomas Kunze"); ++MODULE_DESCRIPTION("Collie battery driver"); +-- +1.5.6.5 + diff --git a/packages/linux/linux-2.6.28/collie/0019-collie-support-pda_power-driver.patch b/packages/linux/linux-2.6.28/collie/0019-collie-support-pda_power-driver.patch new file mode 100644 index 0000000000..7d74cb72af --- /dev/null +++ b/packages/linux/linux-2.6.28/collie/0019-collie-support-pda_power-driver.patch @@ -0,0 +1,103 @@ +From c1a769bcd789ef7284ee4ece4324274278ee6401 Mon Sep 17 00:00:00 2001 +From: Thomas Kunze <thommycheck@gmx.de> +Date: Tue, 10 Feb 2009 13:48:32 +0100 +Subject: [PATCH 19/23] collie: support pda_power driver + +This add the pda-power platform device to collie. +--- + arch/arm/mach-sa1100/collie.c | 65 +++++++++++++++++++++++++++++++++++++++++ + 1 files changed, 65 insertions(+), 0 deletions(-) + +diff --git a/arch/arm/mach-sa1100/collie.c b/arch/arm/mach-sa1100/collie.c +index 4b52f30..7da2f28 100644 +--- a/arch/arm/mach-sa1100/collie.c ++++ b/arch/arm/mach-sa1100/collie.c +@@ -26,6 +26,7 @@ + #include <linux/mtd/partitions.h> + #include <linux/timer.h> + #include <linux/gpio.h> ++#include <linux/pda_power.h> + + #include <mach/hardware.h> + #include <asm/mach-types.h> +@@ -90,6 +91,69 @@ static struct mcp_plat_data collie_mcp_data = { + .gpio_base = COLLIE_TC35143_GPIO_BASE, + }; + ++/* ++ * Collie AC IN ++ */ ++static int collie_power_init(struct device *dev) ++{ ++ int ret = gpio_request(COLLIE_GPIO_AC_IN, "ac in"); ++ if (ret) ++ goto err_gpio_req; ++ ++ ret = gpio_direction_input(COLLIE_GPIO_AC_IN); ++ if (ret) ++ goto err_gpio_in; ++ ++ return 0; ++ ++err_gpio_in: ++ gpio_free(COLLIE_GPIO_AC_IN); ++err_gpio_req: ++ return ret; ++} ++ ++static void collie_power_exit(struct device *dev) ++{ ++ gpio_free(COLLIE_GPIO_AC_IN); ++} ++ ++static int collie_power_ac_online(void) ++{ ++ return gpio_get_value(COLLIE_GPIO_AC_IN) == 2; ++} ++ ++static char *collie_ac_supplied_to[] = { ++ "main-battery", ++ "backup-battery", ++}; ++ ++static struct pda_power_pdata collie_power_data = { ++ .init = collie_power_init, ++ .is_ac_online = collie_power_ac_online, ++ .exit = collie_power_exit, ++ .supplied_to = collie_ac_supplied_to, ++ .num_supplicants = ARRAY_SIZE(collie_ac_supplied_to), ++}; ++ ++static struct resource collie_power_resource[] = { ++ { ++ .name = "ac", ++ .start = gpio_to_irq(COLLIE_GPIO_AC_IN), ++ .end = gpio_to_irq(COLLIE_GPIO_AC_IN), ++ .flags = IORESOURCE_IRQ | ++ IORESOURCE_IRQ_HIGHEDGE | ++ IORESOURCE_IRQ_LOWEDGE, ++ }, ++}; ++ ++static struct platform_device collie_power_device = { ++ .name = "pda-power", ++ .id = -1, ++ .dev.platform_data = &collie_power_data, ++ .resource = collie_power_resource, ++ .num_resources = ARRAY_SIZE(collie_power_resource), ++}; ++ + #ifdef CONFIG_SHARP_LOCOMO + /* + * low-level UART features. +@@ -180,6 +244,7 @@ struct platform_device collie_locomo_device = { + static struct platform_device *devices[] __initdata = { + &collie_locomo_device, + &colliescoop_device, ++ &collie_power_device, + }; + + static struct mtd_partition collie_partitions[] = { +-- +1.5.6.5 + diff --git a/packages/linux/linux-2.6.28/collie/0020-remove-collie_pm.c.patch b/packages/linux/linux-2.6.28/collie/0020-remove-collie_pm.c.patch new file mode 100644 index 0000000000..490e333976 --- /dev/null +++ b/packages/linux/linux-2.6.28/collie/0020-remove-collie_pm.c.patch @@ -0,0 +1,323 @@ +From 702663223fdc1e3f73e9adbcb1415713b2c92652 Mon Sep 17 00:00:00 2001 +From: Thomas Kunze <thommycheck@gmx.de> +Date: Tue, 10 Feb 2009 18:16:57 +0100 +Subject: [PATCH 20/23] remove collie_pm.c + +This file was unused. The new battery driver makes it +obsolete. So remove it + +Conflicts: + + arch/arm/mach-sa1100/collie_pm.c +--- + arch/arm/mach-sa1100/collie_pm.c | 298 -------------------------------------- + 1 files changed, 0 insertions(+), 298 deletions(-) + delete mode 100644 arch/arm/mach-sa1100/collie_pm.c + +diff --git a/arch/arm/mach-sa1100/collie_pm.c b/arch/arm/mach-sa1100/collie_pm.c +deleted file mode 100644 +index 65b8b31..0000000 +--- a/arch/arm/mach-sa1100/collie_pm.c ++++ /dev/null +@@ -1,298 +0,0 @@ +-/* +- * Based on spitz_pm.c and sharp code. +- * +- * Copyright (C) 2001 SHARP +- * Copyright 2005 Pavel Machek <pavel@suse.cz> +- * +- * Distribute under GPLv2. +- * +- * Li-ion batteries are angry beasts, and they like to explode. This driver is not finished, +- * and sometimes charges them when it should not. If it makes angry lithium to come your way... +- * ...well, you have been warned. +- * +- * Actually, this should be quite safe, it seems sharp leaves charger enabled by default, +- * and my collie did not explode (yet). +- */ +- +-#include <linux/module.h> +-#include <linux/stat.h> +-#include <linux/init.h> +-#include <linux/kernel.h> +-#include <linux/delay.h> +-#include <linux/interrupt.h> +-#include <linux/device.h> +-#include <linux/platform_device.h> +-#include <linux/mfd/ucb1x00.h> +- +-#include <asm/irq.h> +-#include <mach/hardware.h> +-#include <asm/hardware/scoop.h> +-#include <asm/dma.h> +-#include <mach/collie.h> +-#include <asm/mach/sharpsl_param.h> +-#include <asm/hardware/sharpsl_pm.h> +- +- +-static struct ucb1x00 *ucb; +-static int ad_revise; +- +-#define ADCtoPower(x) ((330 * x * 2) / 1024) +- +-static void collie_charger_init(void) +-{ +- int err; +- +- if (sharpsl_param.adadj != -1) +- ad_revise = sharpsl_param.adadj; +- +- /* Register interrupt handler. */ +- if ((err = request_irq(COLLIE_IRQ_GPIO_AC_IN, sharpsl_ac_isr, IRQF_DISABLED, +- "ACIN", sharpsl_ac_isr))) { +- printk("Could not get irq %d.\n", COLLIE_IRQ_GPIO_AC_IN); +- return; +- } +- if ((err = request_irq(COLLIE_IRQ_GPIO_CO, sharpsl_chrg_full_isr, IRQF_DISABLED, +- "CO", sharpsl_chrg_full_isr))) { +- free_irq(COLLIE_IRQ_GPIO_AC_IN, sharpsl_ac_isr); +- printk("Could not get irq %d.\n", COLLIE_IRQ_GPIO_CO); +- return; +- } +- +- ucb1x00_io_set_dir(ucb, 0, COLLIE_TC35143_GPIO_MBAT_ON | COLLIE_TC35143_GPIO_TMP_ON | +- COLLIE_TC35143_GPIO_BBAT_ON); +- return; +-} +- +-static void collie_measure_temp(int on) +-{ +- if (on) +- ucb1x00_io_write(ucb, COLLIE_TC35143_GPIO_TMP_ON, 0); +- else +- ucb1x00_io_write(ucb, 0, COLLIE_TC35143_GPIO_TMP_ON); +-} +- +-static void collie_charge(int on) +-{ +- extern struct platform_device colliescoop_device; +- +- /* Zaurus seems to contain LTC1731; it should know when to +- * stop charging itself, so setting charge on should be +- * relatively harmless (as long as it is not done too often). +- */ +- if (on) { +- set_scoop_gpio(&colliescoop_device.dev, COLLIE_SCP_CHARGE_ON); +- } else { +- reset_scoop_gpio(&colliescoop_device.dev, COLLIE_SCP_CHARGE_ON); +- } +-} +- +-static void collie_discharge(int on) +-{ +-} +- +-static void collie_discharge1(int on) +-{ +-} +- +-static void collie_presuspend(void) +-{ +-} +- +-static void collie_postsuspend(void) +-{ +-} +- +-static int collie_should_wakeup(unsigned int resume_on_alarm) +-{ +- return 0; +-} +- +-static unsigned long collie_charger_wakeup(void) +-{ +- return 0; +-} +- +-int collie_read_backup_battery(void) +-{ +- int voltage; +- +- ucb1x00_adc_enable(ucb); +- +- ucb1x00_io_write(ucb, COLLIE_TC35143_GPIO_BBAT_ON, 0); +- voltage = ucb1x00_adc_read(ucb, UCB_ADC_INP_AD1, UCB_SYNC); +- +- ucb1x00_io_write(ucb, 0, COLLIE_TC35143_GPIO_BBAT_ON); +- ucb1x00_adc_disable(ucb); +- +- printk("Backup battery = %d(%d)\n", ADCtoPower(voltage), voltage); +- +- return ADCtoPower(voltage); +-} +- +-int collie_read_main_battery(void) +-{ +- int voltage, voltage_rev, voltage_volts; +- +- ucb1x00_adc_enable(ucb); +- ucb1x00_io_write(ucb, 0, COLLIE_TC35143_GPIO_BBAT_ON); +- ucb1x00_io_write(ucb, COLLIE_TC35143_GPIO_MBAT_ON, 0); +- +- mdelay(1); +- voltage = ucb1x00_adc_read(ucb, UCB_ADC_INP_AD1, UCB_SYNC); +- +- ucb1x00_io_write(ucb, 0, COLLIE_TC35143_GPIO_MBAT_ON); +- ucb1x00_adc_disable(ucb); +- +- voltage_rev = voltage + ((ad_revise * voltage) / 652); +- voltage_volts = ADCtoPower(voltage_rev); +- +- printk("Main battery = %d(%d)\n", voltage_volts, voltage); +- +- if (voltage != -1) +- return voltage_volts; +- else +- return voltage; +-} +- +-int collie_read_temp(void) +-{ +- int voltage; +- +- /* According to Sharp, temp must be > 973, main battery must be < 465, +- FIXME: sharpsl_pm.c has both conditions negated? FIXME: values +- are way out of range? */ +- +- ucb1x00_adc_enable(ucb); +- ucb1x00_io_write(ucb, COLLIE_TC35143_GPIO_TMP_ON, 0); +- /* >1010 = battery removed, 460 = 22C ?, higher = lower temp ? */ +- voltage = ucb1x00_adc_read(ucb, UCB_ADC_INP_AD0, UCB_SYNC); +- ucb1x00_io_write(ucb, 0, COLLIE_TC35143_GPIO_TMP_ON); +- ucb1x00_adc_disable(ucb); +- +- printk("Battery temp = %d\n", voltage); +- return voltage; +-} +- +-static unsigned long read_devdata(int which) +-{ +- switch (which) { +- case SHARPSL_BATT_VOLT: +- return collie_read_main_battery(); +- case SHARPSL_BATT_TEMP: +- return collie_read_temp(); +- case SHARPSL_ACIN_VOLT: +- return 500; +- case SHARPSL_STATUS_ACIN: { +- int ret = GPLR & COLLIE_GPIO_AC_IN; +- printk("AC status = %d\n", ret); +- return ret; +- } +- case SHARPSL_STATUS_FATAL: { +- int ret = GPLR & COLLIE_GPIO_MAIN_BAT_LOW; +- printk("Fatal bat = %d\n", ret); +- return ret; +- } +- default: +- return ~0; +- } +-} +- +-struct battery_thresh collie_battery_levels_acin[] = { +- { 420, 100}, +- { 417, 95}, +- { 415, 90}, +- { 413, 80}, +- { 411, 75}, +- { 408, 70}, +- { 406, 60}, +- { 403, 50}, +- { 398, 40}, +- { 391, 25}, +- { 10, 5}, +- { 0, 0}, +-}; +- +-struct battery_thresh collie_battery_levels[] = { +- { 394, 100}, +- { 390, 95}, +- { 380, 90}, +- { 370, 80}, +- { 368, 75}, /* From sharp code: battery high with frontlight */ +- { 366, 70}, /* 60..90 -- fake values invented by me for testing */ +- { 364, 60}, +- { 362, 50}, +- { 360, 40}, +- { 358, 25}, /* From sharp code: battery low with frontlight */ +- { 356, 5}, /* From sharp code: battery verylow with frontlight */ +- { 0, 0}, +-}; +- +-struct sharpsl_charger_machinfo collie_pm_machinfo = { +- .init = collie_charger_init, +- .read_devdata = read_devdata, +- .discharge = collie_discharge, +- .discharge1 = collie_discharge1, +- .charge = collie_charge, +- .measure_temp = collie_measure_temp, +- .presuspend = collie_presuspend, +- .postsuspend = collie_postsuspend, +- .charger_wakeup = collie_charger_wakeup, +- .should_wakeup = collie_should_wakeup, +- .bat_levels = 12, +- .bat_levels_noac = collie_battery_levels, +- .bat_levels_acin = collie_battery_levels_acin, +- .status_high_acin = 368, +- .status_low_acin = 358, +- .status_high_noac = 368, +- .status_low_noac = 358, +- .charge_on_volt = 350, /* spitz uses 2.90V, but lets play it safe. */ +- .charge_on_temp = 550, +- .charge_acin_high = 550, /* collie does not seem to have sensor for this, anyway */ +- .charge_acin_low = 450, /* ignored, too */ +- .fatal_acin_volt = 356, +- .fatal_noacin_volt = 356, +- +- .batfull_irq = 1, /* We do not want periodical charge restarts */ +-}; +- +-static int __init collie_pm_ucb_add(struct ucb1x00_dev *pdev) +-{ +- sharpsl_pm.machinfo = &collie_pm_machinfo; +- ucb = pdev->ucb; +- return 0; +-} +- +-static struct ucb1x00_driver collie_pm_ucb_driver = { +- .add = collie_pm_ucb_add, +-}; +- +-static struct platform_device *collie_pm_device; +- +-static int __init collie_pm_init(void) +-{ +- int ret; +- +- collie_pm_device = platform_device_alloc("sharpsl-pm", -1); +- if (!collie_pm_device) +- return -ENOMEM; +- +- collie_pm_device->dev.platform_data = &collie_pm_machinfo; +- ret = platform_device_add(collie_pm_device); +- +- if (ret) +- platform_device_put(collie_pm_device); +- +- if (!ret) +- ret = ucb1x00_register_driver(&collie_pm_ucb_driver); +- +- return ret; +-} +- +-static void __exit collie_pm_exit(void) +-{ +- ucb1x00_unregister_driver(&collie_pm_ucb_driver); +- platform_device_unregister(collie_pm_device); +-} +- +-module_init(collie_pm_init); +-module_exit(collie_pm_exit); +-- +1.5.6.5 + diff --git a/packages/linux/linux-2.6.28/collie/0021-mmc-trivial-annotation-of-blocks.patch b/packages/linux/linux-2.6.28/collie/0021-mmc-trivial-annotation-of-blocks.patch new file mode 100644 index 0000000000..c40be53d9b --- /dev/null +++ b/packages/linux/linux-2.6.28/collie/0021-mmc-trivial-annotation-of-blocks.patch @@ -0,0 +1,40 @@ +From 0057c3469772d6cddcaa486abe46a2957bc62a2c Mon Sep 17 00:00:00 2001 +From: Harvey Harrison <harvey.harrison@gmail.com> +Date: Wed, 22 Oct 2008 17:09:00 -0700 +Subject: [PATCH 21/23] mmc: trivial annotation of 'blocks' + +sg_init_one is reading a be32, annotate as such. + +Signed-off-by: Harvey Harrison <harvey.harrison@gmail.com> +Signed-off-by: Pierre Ossman <drzeus@drzeus.cx> +--- + drivers/mmc/card/block.c | 6 ++---- + 1 files changed, 2 insertions(+), 4 deletions(-) + +diff --git a/drivers/mmc/card/block.c b/drivers/mmc/card/block.c +index 3d067c3..903c8aa 100644 +--- a/drivers/mmc/card/block.c ++++ b/drivers/mmc/card/block.c +@@ -145,7 +145,7 @@ struct mmc_blk_request { + static u32 mmc_sd_num_wr_blocks(struct mmc_card *card) + { + int err; +- u32 blocks; ++ __be32 blocks; + + struct mmc_request mrq; + struct mmc_command cmd; +@@ -204,9 +204,7 @@ static u32 mmc_sd_num_wr_blocks(struct mmc_card *card) + if (cmd.error || data.error) + return (u32)-1; + +- blocks = ntohl(blocks); +- +- return blocks; ++ return ntohl(blocks); + } + + static int mmc_blk_issue_rq(struct mmc_queue *mq, struct request *req) +-- +1.5.6.5 + diff --git a/packages/linux/linux-2.6.28/collie/0022-mmc_block-print-better-error-messages.patch b/packages/linux/linux-2.6.28/collie/0022-mmc_block-print-better-error-messages.patch new file mode 100644 index 0000000000..b6cef07c19 --- /dev/null +++ b/packages/linux/linux-2.6.28/collie/0022-mmc_block-print-better-error-messages.patch @@ -0,0 +1,93 @@ +From d71af40a7a15a2ee7040fa0d5c8ac1bc19873c7d Mon Sep 17 00:00:00 2001 +From: Adrian Hunter <ext-adrian.hunter@nokia.com> +Date: Thu, 16 Oct 2008 12:55:25 +0300 +Subject: [PATCH 22/23] mmc_block: print better error messages + +Add command response and card status to error +messages. + +Signed-off-by: Adrian Hunter <ext-adrian.hunter@nokia.com> +Signed-off-by: Pierre Ossman <drzeus@drzeus.cx> +--- + drivers/mmc/card/block.c | 44 +++++++++++++++++++++++++++++++++++++------- + 1 files changed, 37 insertions(+), 7 deletions(-) + +diff --git a/drivers/mmc/card/block.c b/drivers/mmc/card/block.c +index 903c8aa..cc9b3ab 100644 +--- a/drivers/mmc/card/block.c ++++ b/drivers/mmc/card/block.c +@@ -207,6 +207,23 @@ static u32 mmc_sd_num_wr_blocks(struct mmc_card *card) + return ntohl(blocks); + } + ++static u32 get_card_status(struct mmc_card *card, struct request *req) ++{ ++ struct mmc_command cmd; ++ int err; ++ ++ memset(&cmd, 0, sizeof(struct mmc_command)); ++ cmd.opcode = MMC_SEND_STATUS; ++ if (!mmc_host_is_spi(card->host)) ++ cmd.arg = card->rca << 16; ++ cmd.flags = MMC_RSP_SPI_R2 | MMC_RSP_R1 | MMC_CMD_AC; ++ err = mmc_wait_for_cmd(card->host, &cmd, 0); ++ if (err) ++ printk(KERN_ERR "%s: error %d sending status comand", ++ req->rq_disk->disk_name, err); ++ return cmd.resp[0]; ++} ++ + static int mmc_blk_issue_rq(struct mmc_queue *mq, struct request *req) + { + struct mmc_blk_data *md = mq->data; +@@ -218,7 +235,7 @@ static int mmc_blk_issue_rq(struct mmc_queue *mq, struct request *req) + + do { + struct mmc_command cmd; +- u32 readcmd, writecmd; ++ u32 readcmd, writecmd, status = 0; + + memset(&brq, 0, sizeof(struct mmc_blk_request)); + brq.mrq.cmd = &brq.cmd; +@@ -273,19 +290,32 @@ static int mmc_blk_issue_rq(struct mmc_queue *mq, struct request *req) + * until later as we need to wait for the card to leave + * programming mode even when things go wrong. + */ ++ if (brq.cmd.error || brq.data.error || brq.stop.error) ++ status = get_card_status(card, req); ++ + if (brq.cmd.error) { +- printk(KERN_ERR "%s: error %d sending read/write command\n", +- req->rq_disk->disk_name, brq.cmd.error); ++ printk(KERN_ERR "%s: error %d sending read/write " ++ "command, response %#x, card status %#x\n", ++ req->rq_disk->disk_name, brq.cmd.error, ++ brq.cmd.resp[0], status); + } + + if (brq.data.error) { +- printk(KERN_ERR "%s: error %d transferring data\n", +- req->rq_disk->disk_name, brq.data.error); ++ if (brq.data.error == -ETIMEDOUT && brq.mrq.stop) ++ /* 'Stop' response contains card status */ ++ status = brq.mrq.stop->resp[0]; ++ printk(KERN_ERR "%s: error %d transferring data," ++ " sector %u, nr %u, card status %#x\n", ++ req->rq_disk->disk_name, brq.data.error, ++ (unsigned)req->sector, ++ (unsigned)req->nr_sectors, status); + } + + if (brq.stop.error) { +- printk(KERN_ERR "%s: error %d sending stop command\n", +- req->rq_disk->disk_name, brq.stop.error); ++ printk(KERN_ERR "%s: error %d sending stop command, " ++ "response %#x, card status %#x\n", ++ req->rq_disk->disk_name, brq.stop.error, ++ brq.stop.resp[0], status); + } + + if (!mmc_host_is_spi(card->host) && rq_data_dir(req) != READ) { +-- +1.5.6.5 + diff --git a/packages/linux/linux-2.6.28/collie/0023-mmc_block-ensure-all-sectors-that-do-not-have-error.patch b/packages/linux/linux-2.6.28/collie/0023-mmc_block-ensure-all-sectors-that-do-not-have-error.patch new file mode 100644 index 0000000000..3ff32b0a94 --- /dev/null +++ b/packages/linux/linux-2.6.28/collie/0023-mmc_block-ensure-all-sectors-that-do-not-have-error.patch @@ -0,0 +1,148 @@ +From fba35a4bb8f9cabcd374e19a2a34ee5496d971d2 Mon Sep 17 00:00:00 2001 +From: Adrian Hunter <ext-adrian.hunter@nokia.com> +Date: Wed, 31 Dec 2008 18:21:17 +0100 +Subject: [PATCH 23/23] mmc_block: ensure all sectors that do not have errors are read + +If a card encounters an ECC error while reading a sector it will +timeout. Instead of reporting the entire I/O request as having +an error, redo the I/O one sector at a time so that all readable +sectors are provided to the upper layers. + +Signed-off-by: Adrian Hunter <ext-adrian.hunter@nokia.com> +Signed-off-by: Pierre Ossman <drzeus@drzeus.cx> +--- + drivers/mmc/card/block.c | 76 +++++++++++++++++++++++++++++++++++---------- + 1 files changed, 59 insertions(+), 17 deletions(-) + +diff --git a/drivers/mmc/card/block.c b/drivers/mmc/card/block.c +index cc9b3ab..45b1f43 100644 +--- a/drivers/mmc/card/block.c ++++ b/drivers/mmc/card/block.c +@@ -229,7 +229,7 @@ static int mmc_blk_issue_rq(struct mmc_queue *mq, struct request *req) + struct mmc_blk_data *md = mq->data; + struct mmc_card *card = md->queue.card; + struct mmc_blk_request brq; +- int ret = 1; ++ int ret = 1, disable_multi = 0; + + mmc_claim_host(card->host); + +@@ -251,6 +251,14 @@ static int mmc_blk_issue_rq(struct mmc_queue *mq, struct request *req) + brq.stop.flags = MMC_RSP_SPI_R1B | MMC_RSP_R1B | MMC_CMD_AC; + brq.data.blocks = req->nr_sectors; + ++ /* ++ * After a read error, we redo the request one sector at a time ++ * in order to accurately determine which sectors can be read ++ * successfully. ++ */ ++ if (disable_multi && brq.data.blocks > 1) ++ brq.data.blocks = 1; ++ + if (brq.data.blocks > 1) { + /* SPI multiblock writes terminate using a special + * token, not a STOP_TRANSMISSION request. +@@ -279,6 +287,25 @@ static int mmc_blk_issue_rq(struct mmc_queue *mq, struct request *req) + brq.data.sg = mq->sg; + brq.data.sg_len = mmc_queue_map_sg(mq); + ++ /* ++ * Adjust the sg list so it is the same size as the ++ * request. ++ */ ++ if (brq.data.blocks != req->nr_sectors) { ++ int i, data_size = brq.data.blocks << 9; ++ struct scatterlist *sg; ++ ++ for_each_sg(brq.data.sg, sg, brq.data.sg_len, i) { ++ data_size -= sg->length; ++ if (data_size <= 0) { ++ sg->length += data_size; ++ i++; ++ break; ++ } ++ } ++ brq.data.sg_len = i; ++ } ++ + mmc_queue_bounce_pre(mq); + + mmc_wait_for_req(card->host, &brq.mrq); +@@ -290,8 +317,16 @@ static int mmc_blk_issue_rq(struct mmc_queue *mq, struct request *req) + * until later as we need to wait for the card to leave + * programming mode even when things go wrong. + */ +- if (brq.cmd.error || brq.data.error || brq.stop.error) ++ if (brq.cmd.error || brq.data.error || brq.stop.error) { ++ if (brq.data.blocks > 1 && rq_data_dir(req) == READ) { ++ /* Redo read one sector at a time */ ++ printk(KERN_WARNING "%s: retrying using single " ++ "block read\n", req->rq_disk->disk_name); ++ disable_multi = 1; ++ continue; ++ } + status = get_card_status(card, req); ++ } + + if (brq.cmd.error) { + printk(KERN_ERR "%s: error %d sending read/write " +@@ -348,8 +383,20 @@ static int mmc_blk_issue_rq(struct mmc_queue *mq, struct request *req) + #endif + } + +- if (brq.cmd.error || brq.data.error || brq.stop.error) ++ if (brq.cmd.error || brq.stop.error || brq.data.error) { ++ if (rq_data_dir(req) == READ) { ++ /* ++ * After an error, we redo I/O one sector at a ++ * time, so we only reach here after trying to ++ * read a single sector. ++ */ ++ spin_lock_irq(&md->lock); ++ ret = __blk_end_request(req, -EIO, brq.data.blksz); ++ spin_unlock_irq(&md->lock); ++ continue; ++ } + goto cmd_err; ++ } + + /* + * A block was successfully transferred. +@@ -371,25 +418,20 @@ static int mmc_blk_issue_rq(struct mmc_queue *mq, struct request *req) + * If the card is not SD, we can still ok written sectors + * as reported by the controller (which might be less than + * the real number of written sectors, but never more). +- * +- * For reads we just fail the entire chunk as that should +- * be safe in all cases. + */ +- if (rq_data_dir(req) != READ) { +- if (mmc_card_sd(card)) { +- u32 blocks; ++ if (mmc_card_sd(card)) { ++ u32 blocks; + +- blocks = mmc_sd_num_wr_blocks(card); +- if (blocks != (u32)-1) { +- spin_lock_irq(&md->lock); +- ret = __blk_end_request(req, 0, blocks << 9); +- spin_unlock_irq(&md->lock); +- } +- } else { ++ blocks = mmc_sd_num_wr_blocks(card); ++ if (blocks != (u32)-1) { + spin_lock_irq(&md->lock); +- ret = __blk_end_request(req, 0, brq.data.bytes_xfered); ++ ret = __blk_end_request(req, 0, blocks << 9); + spin_unlock_irq(&md->lock); + } ++ } else { ++ spin_lock_irq(&md->lock); ++ ret = __blk_end_request(req, 0, brq.data.bytes_xfered); ++ spin_unlock_irq(&md->lock); + } + + mmc_release_host(card->host); +-- +1.5.6.5 + diff --git a/packages/linux/linux-2.6.28/collie/defconfig b/packages/linux/linux-2.6.28/collie/defconfig new file mode 100644 index 0000000000..e815c97e42 --- /dev/null +++ b/packages/linux/linux-2.6.28/collie/defconfig @@ -0,0 +1,1677 @@ +# +# Automatically generated make config: don't edit +# Linux kernel version: 2.6.28 +# Fri Feb 13 10:42:04 2009 +# +CONFIG_ARM=y +CONFIG_SYS_SUPPORTS_APM_EMULATION=y +CONFIG_GENERIC_GPIO=y +CONFIG_GENERIC_TIME=y +CONFIG_GENERIC_CLOCKEVENTS=y +CONFIG_MMU=y +# CONFIG_NO_IOPORT is not set +CONFIG_GENERIC_HARDIRQS=y +CONFIG_STACKTRACE_SUPPORT=y +CONFIG_HAVE_LATENCYTOP_SUPPORT=y +CONFIG_LOCKDEP_SUPPORT=y +CONFIG_TRACE_IRQFLAGS_SUPPORT=y +CONFIG_HARDIRQS_SW_RESEND=y +CONFIG_GENERIC_IRQ_PROBE=y +CONFIG_RWSEM_GENERIC_SPINLOCK=y +# CONFIG_ARCH_HAS_ILOG2_U32 is not set +# CONFIG_ARCH_HAS_ILOG2_U64 is not set +CONFIG_GENERIC_HWEIGHT=y +CONFIG_GENERIC_CALIBRATE_DELAY=y +CONFIG_ARCH_MTD_XIP=y +CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y +CONFIG_VECTORS_BASE=0xffff0000 +CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" + +# +# General setup +# +CONFIG_EXPERIMENTAL=y +CONFIG_BROKEN_ON_SMP=y +CONFIG_LOCK_KERNEL=y +CONFIG_INIT_ENV_ARG_LIMIT=32 +CONFIG_LOCALVERSION="" +# CONFIG_LOCALVERSION_AUTO is not set +CONFIG_SWAP=y +CONFIG_SYSVIPC=y +CONFIG_SYSVIPC_SYSCTL=y +# CONFIG_POSIX_MQUEUE is not set +CONFIG_BSD_PROCESS_ACCT=y +CONFIG_BSD_PROCESS_ACCT_V3=y +# CONFIG_TASKSTATS is not set +# CONFIG_AUDIT is not set +# CONFIG_IKCONFIG is not set +CONFIG_LOG_BUF_SHIFT=14 +# CONFIG_CGROUPS is not set +# CONFIG_GROUP_SCHED is not set +# CONFIG_USER_SCHED is not set +# CONFIG_CGROUP_SCHED is not set +CONFIG_SYSFS_DEPRECATED=y +CONFIG_SYSFS_DEPRECATED_V2=y +# CONFIG_RELAY is not set +# CONFIG_NAMESPACES is not set +# CONFIG_BLK_DEV_INITRD is not set +CONFIG_CC_OPTIMIZE_FOR_SIZE=y +CONFIG_SYSCTL=y +CONFIG_EMBEDDED=y +CONFIG_UID16=y +CONFIG_SYSCTL_SYSCALL=y +CONFIG_KALLSYMS=y +# CONFIG_KALLSYMS_ALL is not set +# CONFIG_KALLSYMS_EXTRA_PASS is not set +CONFIG_HOTPLUG=y +CONFIG_PRINTK=y +CONFIG_BUG=y +CONFIG_ELF_CORE=y +CONFIG_COMPAT_BRK=y +CONFIG_BASE_FULL=y +CONFIG_FUTEX=y +CONFIG_ANON_INODES=y +CONFIG_EPOLL=y +CONFIG_SIGNALFD=y +CONFIG_TIMERFD=y +CONFIG_EVENTFD=y +CONFIG_SHMEM=y +CONFIG_AIO=y +CONFIG_VM_EVENT_COUNTERS=y +CONFIG_SLAB=y +# CONFIG_SLUB is not set +# CONFIG_SLOB is not set +CONFIG_PROFILING=y +# CONFIG_MARKERS is not set +CONFIG_OPROFILE=m +CONFIG_HAVE_OPROFILE=y +# CONFIG_KPROBES is not set +CONFIG_HAVE_KPROBES=y +CONFIG_HAVE_KRETPROBES=y +CONFIG_HAVE_CLK=y +CONFIG_HAVE_GENERIC_DMA_COHERENT=y +CONFIG_SLABINFO=y +CONFIG_RT_MUTEXES=y +# CONFIG_TINY_SHMEM is not set +CONFIG_BASE_SMALL=0 +CONFIG_MODULES=y +# CONFIG_MODULE_FORCE_LOAD is not set +CONFIG_MODULE_UNLOAD=y +CONFIG_MODULE_FORCE_UNLOAD=y +# CONFIG_MODVERSIONS is not set +# CONFIG_MODULE_SRCVERSION_ALL is not set +CONFIG_KMOD=y +CONFIG_BLOCK=y +# CONFIG_LBD is not set +# CONFIG_BLK_DEV_IO_TRACE is not set +# CONFIG_LSF is not set +# CONFIG_BLK_DEV_BSG is not set +# CONFIG_BLK_DEV_INTEGRITY is not set + +# +# IO Schedulers +# +CONFIG_IOSCHED_NOOP=y +CONFIG_IOSCHED_AS=y +CONFIG_IOSCHED_DEADLINE=m +CONFIG_IOSCHED_CFQ=m +CONFIG_DEFAULT_AS=y +# CONFIG_DEFAULT_DEADLINE is not set +# CONFIG_DEFAULT_CFQ is not set +# CONFIG_DEFAULT_NOOP is not set +CONFIG_DEFAULT_IOSCHED="anticipatory" +CONFIG_CLASSIC_RCU=y +CONFIG_FREEZER=y + +# +# System Type +# +# CONFIG_ARCH_AAEC2000 is not set +# CONFIG_ARCH_INTEGRATOR is not set +# CONFIG_ARCH_REALVIEW is not set +# CONFIG_ARCH_VERSATILE is not set +# CONFIG_ARCH_AT91 is not set +# CONFIG_ARCH_CLPS7500 is not set +# CONFIG_ARCH_CLPS711X is not set +# CONFIG_ARCH_EBSA110 is not set +# CONFIG_ARCH_EP93XX is not set +# CONFIG_ARCH_FOOTBRIDGE is not set +# CONFIG_ARCH_NETX is not set +# CONFIG_ARCH_H720X is not set +# CONFIG_ARCH_IMX is not set +# CONFIG_ARCH_IOP13XX is not set +# CONFIG_ARCH_IOP32X is not set +# CONFIG_ARCH_IOP33X is not set +# CONFIG_ARCH_IXP23XX is not set +# CONFIG_ARCH_IXP2000 is not set +# CONFIG_ARCH_IXP4XX is not set +# CONFIG_ARCH_L7200 is not set +# CONFIG_ARCH_KIRKWOOD is not set +# CONFIG_ARCH_KS8695 is not set +# CONFIG_ARCH_NS9XXX is not set +# CONFIG_ARCH_LOKI is not set +# CONFIG_ARCH_MV78XX0 is not set +# CONFIG_ARCH_MXC is not set +# CONFIG_ARCH_ORION5X is not set +# CONFIG_ARCH_PNX4008 is not set +# CONFIG_ARCH_PXA is not set +# CONFIG_ARCH_RPC is not set +CONFIG_ARCH_SA1100=y +# CONFIG_ARCH_S3C2410 is not set +# CONFIG_ARCH_SHARK is not set +# CONFIG_ARCH_LH7A40X is not set +# CONFIG_ARCH_DAVINCI is not set +# CONFIG_ARCH_OMAP is not set +# CONFIG_ARCH_MSM is not set + +# +# SA11x0 Implementations +# +# CONFIG_SA1100_ASSABET is not set +# CONFIG_SA1100_CERF is not set +CONFIG_SA1100_COLLIE=y +# CONFIG_SA1100_H3100 is not set +# CONFIG_SA1100_H3600 is not set +# CONFIG_SA1100_H3800 is not set +# CONFIG_SA1100_BADGE4 is not set +# CONFIG_SA1100_JORNADA720 is not set +# CONFIG_SA1100_HACKKIT is not set +# CONFIG_SA1100_LART is not set +# CONFIG_SA1100_PLEB is not set +# CONFIG_SA1100_SHANNON is not set +# CONFIG_SA1100_SIMPAD is not set +# CONFIG_SA1100_SSP is not set + +# +# Boot options +# + +# +# Power management +# + +# +# Processor Type +# +CONFIG_CPU_32=y +CONFIG_CPU_SA1100=y +CONFIG_CPU_32v4=y +CONFIG_CPU_ABRT_EV4=y +CONFIG_CPU_PABRT_NOIFAR=y +CONFIG_CPU_CACHE_V4WB=y +CONFIG_CPU_CACHE_VIVT=y +CONFIG_CPU_TLB_V4WB=y +CONFIG_CPU_CP15=y +CONFIG_CPU_CP15_MMU=y + +# +# Processor Features +# +# CONFIG_CPU_ICACHE_DISABLE is not set +# CONFIG_CPU_DCACHE_DISABLE is not set +# CONFIG_OUTER_CACHE is not set +CONFIG_SHARP_LOCOMO=y +CONFIG_SHARP_PARAM=y +CONFIG_SHARP_SCOOP=y + +# +# Bus support +# +CONFIG_ISA=y +# CONFIG_PCI_SYSCALL is not set +# CONFIG_ARCH_SUPPORTS_MSI is not set +CONFIG_PCCARD=y +# CONFIG_PCMCIA_DEBUG is not set +CONFIG_PCMCIA=y +CONFIG_PCMCIA_LOAD_CIS=y +CONFIG_PCMCIA_IOCTL=y + +# +# PC-card bridges +# +# CONFIG_I82365 is not set +# CONFIG_TCIC is not set +CONFIG_PCMCIA_SA1100=y + +# +# Kernel Features +# +CONFIG_TICK_ONESHOT=y +CONFIG_NO_HZ=y +CONFIG_HIGH_RES_TIMERS=y +CONFIG_GENERIC_CLOCKEVENTS_BUILD=y +CONFIG_VMSPLIT_3G=y +# CONFIG_VMSPLIT_2G is not set +# CONFIG_VMSPLIT_1G is not set +CONFIG_PAGE_OFFSET=0xC0000000 +CONFIG_PREEMPT=y +CONFIG_HZ=100 +# CONFIG_AEABI is not set +CONFIG_ARCH_SPARSEMEM_ENABLE=y +CONFIG_ARCH_SPARSEMEM_DEFAULT=y +# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set +CONFIG_SELECT_MEMORY_MODEL=y +# CONFIG_FLATMEM_MANUAL is not set +# CONFIG_DISCONTIGMEM_MANUAL is not set +CONFIG_SPARSEMEM_MANUAL=y +CONFIG_SPARSEMEM=y +CONFIG_HAVE_MEMORY_PRESENT=y +CONFIG_SPARSEMEM_EXTREME=y +CONFIG_PAGEFLAGS_EXTENDED=y +CONFIG_SPLIT_PTLOCK_CPUS=4096 +# CONFIG_RESOURCES_64BIT is not set +# CONFIG_PHYS_ADDR_T_64BIT is not set +CONFIG_ZONE_DMA_FLAG=0 +CONFIG_VIRT_TO_BUS=y +CONFIG_UNEVICTABLE_LRU=y +# CONFIG_LEDS is not set +CONFIG_ALIGNMENT_TRAP=y + +# +# Boot options +# +CONFIG_ZBOOT_ROM_TEXT=0x0 +CONFIG_ZBOOT_ROM_BSS=0x0 +CONFIG_CMDLINE="console=ttySA0,115200n8 console=tty1 root=/dev/mmcblk0p1 rootfstype=ext2 rootdelay=3 mem=64M fbcon=rotate:1 debug" +# CONFIG_XIP_KERNEL is not set +CONFIG_KEXEC=y +CONFIG_ATAGS_PROC=y + +# +# CPU Power Management +# +# CONFIG_CPU_FREQ is not set +# CONFIG_CPU_IDLE is not set + +# +# Floating point emulation +# + +# +# At least one emulation must be selected +# +CONFIG_FPE_NWFPE=y +# CONFIG_FPE_NWFPE_XP is not set +# CONFIG_FPE_FASTFPE is not set + +# +# Userspace binary formats +# +CONFIG_BINFMT_ELF=y +# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set +CONFIG_HAVE_AOUT=y +CONFIG_BINFMT_AOUT=m +CONFIG_BINFMT_MISC=m +# CONFIG_ARTHUR is not set + +# +# Power management options +# +CONFIG_PM=y +# CONFIG_PM_DEBUG is not set +CONFIG_PM_SLEEP=y +CONFIG_SUSPEND=y +CONFIG_SUSPEND_FREEZER=y +CONFIG_APM_EMULATION=y +CONFIG_ARCH_SUSPEND_POSSIBLE=y +CONFIG_NET=y + +# +# Networking options +# +CONFIG_PACKET=y +CONFIG_PACKET_MMAP=y +CONFIG_UNIX=y +CONFIG_XFRM=y +CONFIG_XFRM_USER=m +# CONFIG_XFRM_SUB_POLICY is not set +# CONFIG_XFRM_MIGRATE is not set +# CONFIG_XFRM_STATISTICS is not set +CONFIG_XFRM_IPCOMP=m +# CONFIG_NET_KEY is not set +CONFIG_INET=y +# CONFIG_IP_MULTICAST is not set +# CONFIG_IP_ADVANCED_ROUTER is not set +# CONFIG_ASK_IP_FIB_HASH is not set +# CONFIG_IP_FIB_TRIE is not set +CONFIG_IP_FIB_HASH=y +# CONFIG_IP_PNP is not set +# CONFIG_NET_IPIP is not set +# CONFIG_NET_IPGRE is not set +# CONFIG_ARPD is not set +CONFIG_SYN_COOKIES=y +# CONFIG_INET_AH is not set +# CONFIG_INET_ESP is not set +# CONFIG_INET_IPCOMP is not set +# CONFIG_INET_XFRM_TUNNEL is not set +CONFIG_INET_TUNNEL=m +CONFIG_INET_XFRM_MODE_TRANSPORT=m +CONFIG_INET_XFRM_MODE_TUNNEL=m +CONFIG_INET_XFRM_MODE_BEET=m +# CONFIG_INET_LRO is not set +CONFIG_INET_DIAG=m +CONFIG_INET_TCP_DIAG=m +# CONFIG_TCP_CONG_ADVANCED is not set +CONFIG_TCP_CONG_CUBIC=y +# CONFIG_DEFAULT_BIC is not set +# CONFIG_DEFAULT_CUBIC is not set +# CONFIG_DEFAULT_HTCP is not set +# CONFIG_DEFAULT_VEGAS is not set +# CONFIG_DEFAULT_WESTWOOD is not set +# CONFIG_DEFAULT_RENO is not set +CONFIG_DEFAULT_TCP_CONG="cubic" +# CONFIG_TCP_MD5SIG is not set +CONFIG_IPV6=m +# CONFIG_IPV6_PRIVACY is not set +# CONFIG_IPV6_ROUTER_PREF is not set +# CONFIG_IPV6_OPTIMISTIC_DAD is not set +CONFIG_INET6_AH=m +CONFIG_INET6_ESP=m +CONFIG_INET6_IPCOMP=m +# CONFIG_IPV6_MIP6 is not set +CONFIG_INET6_XFRM_TUNNEL=m +CONFIG_INET6_TUNNEL=m +CONFIG_INET6_XFRM_MODE_TRANSPORT=m +CONFIG_INET6_XFRM_MODE_TUNNEL=m +CONFIG_INET6_XFRM_MODE_BEET=m +# CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set +CONFIG_IPV6_SIT=m +CONFIG_IPV6_NDISC_NODETYPE=y +CONFIG_IPV6_TUNNEL=m +# CONFIG_IPV6_MULTIPLE_TABLES is not set +# CONFIG_IPV6_MROUTE is not set +# CONFIG_NETWORK_SECMARK is not set +CONFIG_NETFILTER=y +# CONFIG_NETFILTER_DEBUG is not set +CONFIG_NETFILTER_ADVANCED=y + +# +# Core Netfilter Configuration +# +# CONFIG_NETFILTER_NETLINK_QUEUE is not set +# CONFIG_NETFILTER_NETLINK_LOG is not set +# CONFIG_NF_CONNTRACK is not set +CONFIG_NETFILTER_XTABLES=m +# CONFIG_NETFILTER_XT_TARGET_CLASSIFY is not set +# CONFIG_NETFILTER_XT_TARGET_DSCP is not set +# CONFIG_NETFILTER_XT_TARGET_MARK is not set +# CONFIG_NETFILTER_XT_TARGET_NFLOG is not set +# CONFIG_NETFILTER_XT_TARGET_NFQUEUE is not set +# CONFIG_NETFILTER_XT_TARGET_RATEEST is not set +# CONFIG_NETFILTER_XT_TARGET_TRACE is not set +# CONFIG_NETFILTER_XT_TARGET_TCPMSS is not set +# CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP is not set +# CONFIG_NETFILTER_XT_MATCH_COMMENT is not set +# CONFIG_NETFILTER_XT_MATCH_DCCP is not set +# CONFIG_NETFILTER_XT_MATCH_DSCP is not set +# CONFIG_NETFILTER_XT_MATCH_ESP is not set +# CONFIG_NETFILTER_XT_MATCH_HASHLIMIT is not set +# CONFIG_NETFILTER_XT_MATCH_IPRANGE is not set +# CONFIG_NETFILTER_XT_MATCH_LENGTH is not set +# CONFIG_NETFILTER_XT_MATCH_LIMIT is not set +# CONFIG_NETFILTER_XT_MATCH_MAC is not set +# CONFIG_NETFILTER_XT_MATCH_MARK is not set +# CONFIG_NETFILTER_XT_MATCH_MULTIPORT is not set +# CONFIG_NETFILTER_XT_MATCH_OWNER is not set +# CONFIG_NETFILTER_XT_MATCH_POLICY is not set +# CONFIG_NETFILTER_XT_MATCH_PKTTYPE is not set +# CONFIG_NETFILTER_XT_MATCH_QUOTA is not set +# CONFIG_NETFILTER_XT_MATCH_RATEEST is not set +# CONFIG_NETFILTER_XT_MATCH_REALM is not set +# CONFIG_NETFILTER_XT_MATCH_RECENT is not set +# CONFIG_NETFILTER_XT_MATCH_SCTP is not set +# CONFIG_NETFILTER_XT_MATCH_STATISTIC is not set +# CONFIG_NETFILTER_XT_MATCH_STRING is not set +# CONFIG_NETFILTER_XT_MATCH_TCPMSS is not set +# CONFIG_NETFILTER_XT_MATCH_TIME is not set +# CONFIG_NETFILTER_XT_MATCH_U32 is not set +# CONFIG_IP_VS is not set + +# +# IP: Netfilter Configuration +# +# CONFIG_NF_DEFRAG_IPV4 is not set +CONFIG_IP_NF_QUEUE=m +CONFIG_IP_NF_IPTABLES=m +CONFIG_IP_NF_MATCH_ADDRTYPE=m +CONFIG_IP_NF_MATCH_AH=m +CONFIG_IP_NF_MATCH_ECN=m +CONFIG_IP_NF_MATCH_TTL=m +CONFIG_IP_NF_FILTER=m +CONFIG_IP_NF_TARGET_REJECT=m +CONFIG_IP_NF_TARGET_LOG=m +CONFIG_IP_NF_TARGET_ULOG=m +CONFIG_IP_NF_MANGLE=m +CONFIG_IP_NF_TARGET_ECN=m +CONFIG_IP_NF_TARGET_TTL=m +CONFIG_IP_NF_RAW=m +CONFIG_IP_NF_ARPTABLES=m +CONFIG_IP_NF_ARPFILTER=m +CONFIG_IP_NF_ARP_MANGLE=m + +# +# IPv6: Netfilter Configuration +# +# CONFIG_IP6_NF_QUEUE is not set +# CONFIG_IP6_NF_IPTABLES is not set +# CONFIG_IP_DCCP is not set +# CONFIG_IP_SCTP is not set +# CONFIG_SCTP_HMAC_NONE is not set +# CONFIG_SCTP_HMAC_SHA1 is not set +# CONFIG_SCTP_HMAC_MD5 is not set +# CONFIG_TIPC is not set +# CONFIG_ATM is not set +# CONFIG_BRIDGE is not set +# CONFIG_NET_DSA is not set +# CONFIG_VLAN_8021Q is not set +# CONFIG_DECNET is not set +# CONFIG_LLC2 is not set +# CONFIG_IPX is not set +# CONFIG_ATALK is not set +# CONFIG_X25 is not set +# CONFIG_LAPB is not set +# CONFIG_ECONET is not set +# CONFIG_WAN_ROUTER is not set +# CONFIG_NET_SCHED is not set + +# +# Network testing +# +# CONFIG_NET_PKTGEN is not set +# CONFIG_HAMRADIO is not set +# CONFIG_CAN is not set +CONFIG_IRDA=m + +# +# IrDA protocols +# +CONFIG_IRLAN=m +CONFIG_IRNET=m +CONFIG_IRCOMM=m +# CONFIG_IRDA_ULTRA is not set + +# +# IrDA options +# +# CONFIG_IRDA_CACHE_LAST_LSAP is not set +# CONFIG_IRDA_FAST_RR is not set +# CONFIG_IRDA_DEBUG is not set + +# +# Infrared-port device drivers +# + +# +# SIR device drivers +# +# CONFIG_IRTTY_SIR is not set + +# +# Dongle support +# + +# +# FIR device drivers +# +# CONFIG_SA1100_FIR is not set +CONFIG_BT=m +CONFIG_BT_L2CAP=m +CONFIG_BT_SCO=m +CONFIG_BT_RFCOMM=m +CONFIG_BT_RFCOMM_TTY=y +CONFIG_BT_BNEP=m +CONFIG_BT_BNEP_MC_FILTER=y +CONFIG_BT_BNEP_PROTO_FILTER=y +CONFIG_BT_HIDP=m + +# +# Bluetooth device drivers +# +# CONFIG_BT_HCIBTSDIO is not set +CONFIG_BT_HCIUART=m +CONFIG_BT_HCIUART_H4=y +CONFIG_BT_HCIUART_BCSP=y +# CONFIG_BT_HCIUART_LL is not set +# CONFIG_BT_HCIDTL1 is not set +# CONFIG_BT_HCIBT3C is not set +# CONFIG_BT_HCIBLUECARD is not set +# CONFIG_BT_HCIBTUART is not set +CONFIG_BT_HCIVHCI=m +# CONFIG_AF_RXRPC is not set +# CONFIG_PHONET is not set +CONFIG_WIRELESS=y +CONFIG_CFG80211=y +CONFIG_NL80211=y +CONFIG_WIRELESS_OLD_REGULATORY=y +CONFIG_WIRELESS_EXT=y +CONFIG_WIRELESS_EXT_SYSFS=y +CONFIG_MAC80211=y + +# +# Rate control algorithm selection +# +# CONFIG_MAC80211_RC_PID is not set +CONFIG_MAC80211_RC_MINSTREL=y +# CONFIG_MAC80211_RC_DEFAULT_PID is not set +CONFIG_MAC80211_RC_DEFAULT_MINSTREL=y +CONFIG_MAC80211_RC_DEFAULT="minstrel" +# CONFIG_MAC80211_MESH is not set +# CONFIG_MAC80211_LEDS is not set +# CONFIG_MAC80211_DEBUGFS is not set +# CONFIG_MAC80211_DEBUG_MENU is not set +CONFIG_IEEE80211=y +# CONFIG_IEEE80211_DEBUG is not set +CONFIG_IEEE80211_CRYPT_WEP=y +CONFIG_IEEE80211_CRYPT_CCMP=y +CONFIG_IEEE80211_CRYPT_TKIP=y +# CONFIG_RFKILL is not set +# CONFIG_NET_9P is not set + +# +# Device Drivers +# + +# +# Generic Driver Options +# +CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" +CONFIG_STANDALONE=y +CONFIG_PREVENT_FIRMWARE_BUILD=y +CONFIG_FW_LOADER=y +CONFIG_FIRMWARE_IN_KERNEL=y +CONFIG_EXTRA_FIRMWARE="" +# CONFIG_DEBUG_DRIVER is not set +# CONFIG_DEBUG_DEVRES is not set +# CONFIG_SYS_HYPERVISOR is not set +# CONFIG_CONNECTOR is not set +CONFIG_MTD=y +CONFIG_MTD_DEBUG=y +CONFIG_MTD_DEBUG_VERBOSE=0 +# CONFIG_MTD_CONCAT is not set +CONFIG_MTD_PARTITIONS=y +# CONFIG_MTD_REDBOOT_PARTS is not set +# CONFIG_MTD_CMDLINE_PARTS is not set +# CONFIG_MTD_AFS_PARTS is not set +# CONFIG_MTD_AR7_PARTS is not set + +# +# User Modules And Translation Layers +# +CONFIG_MTD_CHAR=y +CONFIG_MTD_BLKDEVS=y +CONFIG_MTD_BLOCK=y +# CONFIG_FTL is not set +# CONFIG_NFTL is not set +# CONFIG_INFTL is not set +# CONFIG_RFD_FTL is not set +# CONFIG_SSFDC is not set +# CONFIG_MTD_OOPS is not set + +# +# RAM/ROM/Flash chip drivers +# +# CONFIG_MTD_CFI is not set +# CONFIG_MTD_JEDECPROBE is not set +CONFIG_MTD_MAP_BANK_WIDTH_1=y +CONFIG_MTD_MAP_BANK_WIDTH_2=y +CONFIG_MTD_MAP_BANK_WIDTH_4=y +# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set +CONFIG_MTD_CFI_I1=y +CONFIG_MTD_CFI_I2=y +# CONFIG_MTD_CFI_I4 is not set +# CONFIG_MTD_CFI_I8 is not set +# CONFIG_MTD_RAM is not set +# CONFIG_MTD_ROM is not set +# CONFIG_MTD_ABSENT is not set +CONFIG_MTD_SHARP=y + +# +# Mapping drivers for chip access +# +CONFIG_MTD_COMPLEX_MAPPINGS=y +CONFIG_MTD_SA1100=y +# CONFIG_MTD_PLATRAM is not set + +# +# Self-contained MTD device drivers +# +# CONFIG_MTD_DATAFLASH is not set +# CONFIG_MTD_M25P80 is not set +# CONFIG_MTD_SLRAM is not set +# CONFIG_MTD_PHRAM is not set +# CONFIG_MTD_MTDRAM is not set +# CONFIG_MTD_BLOCK2MTD is not set + +# +# Disk-On-Chip Device Drivers +# +# CONFIG_MTD_DOC2000 is not set +# CONFIG_MTD_DOC2001 is not set +# CONFIG_MTD_DOC2001PLUS is not set +# CONFIG_MTD_NAND is not set +# CONFIG_MTD_ONENAND is not set + +# +# UBI - Unsorted block images +# +CONFIG_MTD_UBI=m +CONFIG_MTD_UBI_WL_THRESHOLD=4096 +CONFIG_MTD_UBI_BEB_RESERVE=1 +# CONFIG_MTD_UBI_GLUEBI is not set + +# +# UBI debugging options +# +# CONFIG_MTD_UBI_DEBUG is not set +# CONFIG_PARPORT is not set +# CONFIG_PNP is not set +CONFIG_BLK_DEV=y +# CONFIG_BLK_DEV_COW_COMMON is not set +CONFIG_BLK_DEV_LOOP=y +CONFIG_BLK_DEV_CRYPTOLOOP=m +CONFIG_BLK_DEV_NBD=m +CONFIG_BLK_DEV_RAM=m +CONFIG_BLK_DEV_RAM_COUNT=16 +CONFIG_BLK_DEV_RAM_SIZE=4096 +# CONFIG_BLK_DEV_XIP is not set +CONFIG_CDROM_PKTCDVD=m +CONFIG_CDROM_PKTCDVD_BUFFERS=8 +# CONFIG_CDROM_PKTCDVD_WCACHE is not set +CONFIG_ATA_OVER_ETH=m +# CONFIG_MISC_DEVICES is not set +CONFIG_HAVE_IDE=y +CONFIG_IDE=y + +# +# Please see Documentation/ide/ide.txt for help/info on IDE drives +# +# CONFIG_BLK_DEV_IDE_SATA is not set +CONFIG_IDE_GD=y +CONFIG_IDE_GD_ATA=y +# CONFIG_IDE_GD_ATAPI is not set +CONFIG_BLK_DEV_IDECS=y +# CONFIG_BLK_DEV_IDECD is not set +# CONFIG_BLK_DEV_IDETAPE is not set +# CONFIG_BLK_DEV_IDESCSI is not set +# CONFIG_IDE_TASK_IOCTL is not set +CONFIG_IDE_PROC_FS=y + +# +# IDE chipset support/bugfixes +# +# CONFIG_BLK_DEV_PLATFORM is not set +# CONFIG_BLK_DEV_IDEDMA is not set + +# +# SCSI device support +# +# CONFIG_RAID_ATTRS is not set +CONFIG_SCSI=m +CONFIG_SCSI_DMA=y +# CONFIG_SCSI_TGT is not set +# CONFIG_SCSI_NETLINK is not set +CONFIG_SCSI_PROC_FS=y + +# +# SCSI support type (disk, tape, CD-ROM) +# +CONFIG_BLK_DEV_SD=m +CONFIG_CHR_DEV_ST=m +CONFIG_CHR_DEV_OSST=m +CONFIG_BLK_DEV_SR=m +# CONFIG_BLK_DEV_SR_VENDOR is not set +CONFIG_CHR_DEV_SG=m +# CONFIG_CHR_DEV_SCH is not set + +# +# Some SCSI devices (e.g. CD jukebox) support multiple LUNs +# +CONFIG_SCSI_MULTI_LUN=y +# CONFIG_SCSI_CONSTANTS is not set +# CONFIG_SCSI_LOGGING is not set +# CONFIG_SCSI_SCAN_ASYNC is not set +CONFIG_SCSI_WAIT_SCAN=m + +# +# SCSI Transports +# +# CONFIG_SCSI_SPI_ATTRS is not set +# CONFIG_SCSI_FC_ATTRS is not set +# CONFIG_SCSI_ISCSI_ATTRS is not set +# CONFIG_SCSI_SAS_LIBSAS is not set +# CONFIG_SCSI_SRP_ATTRS is not set +CONFIG_SCSI_LOWLEVEL=y +# CONFIG_ISCSI_TCP is not set +# CONFIG_SCSI_AHA152X is not set +# CONFIG_SCSI_AIC7XXX_OLD is not set +# CONFIG_SCSI_ADVANSYS is not set +# CONFIG_SCSI_IN2000 is not set +# CONFIG_SCSI_DTC3280 is not set +# CONFIG_SCSI_FUTURE_DOMAIN is not set +# CONFIG_SCSI_GENERIC_NCR5380 is not set +# CONFIG_SCSI_GENERIC_NCR5380_MMIO is not set +# CONFIG_SCSI_NCR53C406A is not set +# CONFIG_SCSI_PAS16 is not set +# CONFIG_SCSI_QLOGIC_FAS is not set +# CONFIG_SCSI_SYM53C416 is not set +# CONFIG_SCSI_T128 is not set +# CONFIG_SCSI_DEBUG is not set +# CONFIG_SCSI_LOWLEVEL_PCMCIA is not set +# CONFIG_SCSI_DH is not set +# CONFIG_ATA is not set +CONFIG_MD=y +# CONFIG_BLK_DEV_MD is not set +CONFIG_BLK_DEV_DM=m +# CONFIG_DM_DEBUG is not set +CONFIG_DM_CRYPT=m +CONFIG_DM_SNAPSHOT=m +CONFIG_DM_MIRROR=m +CONFIG_DM_ZERO=m +CONFIG_DM_MULTIPATH=m +# CONFIG_DM_DELAY is not set +# CONFIG_DM_UEVENT is not set +CONFIG_NETDEVICES=y +# CONFIG_DUMMY is not set +# CONFIG_BONDING is not set +# CONFIG_MACVLAN is not set +# CONFIG_EQUALIZER is not set +CONFIG_TUN=m +# CONFIG_VETH is not set +# CONFIG_ARCNET is not set +# CONFIG_NET_ETHERNET is not set +CONFIG_MII=m +# CONFIG_NETDEV_1000 is not set +# CONFIG_NETDEV_10000 is not set +# CONFIG_TR is not set + +# +# Wireless LAN +# +# CONFIG_WLAN_PRE80211 is not set +CONFIG_WLAN_80211=y +CONFIG_PCMCIA_RAYCS=m +CONFIG_LIBERTAS=m +CONFIG_LIBERTAS_CS=m +CONFIG_LIBERTAS_SDIO=m +# CONFIG_LIBERTAS_DEBUG is not set +CONFIG_LIBERTAS_THINFIRM=m +CONFIG_HERMES=m +CONFIG_PCMCIA_HERMES=m +CONFIG_PCMCIA_SPECTRUM=m +CONFIG_ATMEL=m +CONFIG_PCMCIA_ATMEL=m +CONFIG_AIRO_CS=m +CONFIG_PCMCIA_WL3501=m +CONFIG_MAC80211_HWSIM=m +CONFIG_P54_COMMON=m +# CONFIG_IWLWIFI_LEDS is not set +CONFIG_HOSTAP=m +CONFIG_HOSTAP_FIRMWARE=y +# CONFIG_HOSTAP_FIRMWARE_NVRAM is not set +CONFIG_HOSTAP_CS=m +CONFIG_B43=m +# CONFIG_B43_PCMCIA is not set +# CONFIG_B43_DEBUG is not set +CONFIG_B43LEGACY=m +# CONFIG_B43LEGACY_DEBUG is not set +CONFIG_B43LEGACY_DMA=y +CONFIG_B43LEGACY_PIO=y +CONFIG_B43LEGACY_DMA_AND_PIO_MODE=y +# CONFIG_B43LEGACY_DMA_MODE is not set +# CONFIG_B43LEGACY_PIO_MODE is not set +CONFIG_RT2X00=m +CONFIG_NET_PCMCIA=y +CONFIG_PCMCIA_3C589=m +CONFIG_PCMCIA_3C574=m +CONFIG_PCMCIA_FMVJ18X=m +CONFIG_PCMCIA_PCNET=m +CONFIG_PCMCIA_NMCLAN=m +CONFIG_PCMCIA_SMC91C92=m +CONFIG_PCMCIA_XIRC2PS=m +CONFIG_PCMCIA_AXNET=m +# CONFIG_WAN is not set +CONFIG_PPP=m +# CONFIG_PPP_MULTILINK is not set +# CONFIG_PPP_FILTER is not set +CONFIG_PPP_ASYNC=m +# CONFIG_PPP_SYNC_TTY is not set +CONFIG_PPP_DEFLATE=m +CONFIG_PPP_BSDCOMP=m +# CONFIG_PPP_MPPE is not set +# CONFIG_PPPOE is not set +# CONFIG_PPPOL2TP is not set +# CONFIG_SLIP is not set +CONFIG_SLHC=m +# CONFIG_NETCONSOLE is not set +# CONFIG_NETPOLL is not set +# CONFIG_NET_POLL_CONTROLLER is not set +# CONFIG_ISDN is not set + +# +# Input device support +# +CONFIG_INPUT=y +# CONFIG_INPUT_FF_MEMLESS is not set +# CONFIG_INPUT_POLLDEV is not set + +# +# Userland interfaces +# +CONFIG_INPUT_MOUSEDEV=m +# CONFIG_INPUT_MOUSEDEV_PSAUX is not set +CONFIG_INPUT_MOUSEDEV_SCREEN_X=640 +CONFIG_INPUT_MOUSEDEV_SCREEN_Y=480 +# CONFIG_INPUT_JOYDEV is not set +CONFIG_INPUT_EVDEV=y +# CONFIG_INPUT_EVBUG is not set +CONFIG_INPUT_APMPOWER=y + +# +# Input Device Drivers +# +CONFIG_INPUT_KEYBOARD=y +# CONFIG_KEYBOARD_ATKBD is not set +# CONFIG_KEYBOARD_SUNKBD is not set +# CONFIG_KEYBOARD_LKKBD is not set +CONFIG_KEYBOARD_LOCOMO=y +# CONFIG_KEYBOARD_XTKBD is not set +# CONFIG_KEYBOARD_NEWTON is not set +# CONFIG_KEYBOARD_STOWAWAY is not set +# CONFIG_KEYBOARD_GPIO is not set +# CONFIG_INPUT_MOUSE is not set +# CONFIG_INPUT_JOYSTICK is not set +# CONFIG_INPUT_TABLET is not set +CONFIG_INPUT_TOUCHSCREEN=y +# CONFIG_TOUCHSCREEN_ADS7846 is not set +# CONFIG_TOUCHSCREEN_FUJITSU is not set +# CONFIG_TOUCHSCREEN_GUNZE is not set +# CONFIG_TOUCHSCREEN_ELO is not set +# CONFIG_TOUCHSCREEN_MTOUCH is not set +# CONFIG_TOUCHSCREEN_INEXIO is not set +# CONFIG_TOUCHSCREEN_MK712 is not set +# CONFIG_TOUCHSCREEN_HTCPEN is not set +# CONFIG_TOUCHSCREEN_PENMOUNT is not set +# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set +# CONFIG_TOUCHSCREEN_TOUCHWIN is not set +# CONFIG_TOUCHSCREEN_UCB1200_TS is not set +CONFIG_TOUCHSCREEN_COLLIE_TS=y +# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set +# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set +CONFIG_INPUT_MISC=y +# CONFIG_INPUT_ATI_REMOTE is not set +# CONFIG_INPUT_ATI_REMOTE2 is not set +# CONFIG_INPUT_KEYSPAN_REMOTE is not set +# CONFIG_INPUT_POWERMATE is not set +# CONFIG_INPUT_YEALINK is not set +# CONFIG_INPUT_CM109 is not set +CONFIG_INPUT_UINPUT=m + +# +# Hardware I/O ports +# +# CONFIG_SERIO is not set +# CONFIG_GAMEPORT is not set + +# +# Character devices +# +CONFIG_VT=y +CONFIG_CONSOLE_TRANSLATIONS=y +CONFIG_VT_CONSOLE=y +CONFIG_HW_CONSOLE=y +# CONFIG_VT_HW_CONSOLE_BINDING is not set +CONFIG_DEVKMEM=y +# CONFIG_SERIAL_NONSTANDARD is not set + +# +# Serial drivers +# +CONFIG_SERIAL_8250=m +# CONFIG_SERIAL_8250_CS is not set +CONFIG_SERIAL_8250_NR_UARTS=4 +CONFIG_SERIAL_8250_RUNTIME_UARTS=4 +# CONFIG_SERIAL_8250_EXTENDED is not set + +# +# Non-8250 serial port support +# +CONFIG_SERIAL_SA1100=y +CONFIG_SERIAL_SA1100_CONSOLE=y +CONFIG_SERIAL_CORE=y +CONFIG_SERIAL_CORE_CONSOLE=y +CONFIG_UNIX98_PTYS=y +# CONFIG_LEGACY_PTYS is not set +# CONFIG_IPMI_HANDLER is not set +CONFIG_HW_RANDOM=m +# CONFIG_NVRAM is not set +# CONFIG_DTLK is not set +# CONFIG_R3964 is not set + +# +# PCMCIA character devices +# +# CONFIG_SYNCLINK_CS is not set +# CONFIG_CARDMAN_4000 is not set +# CONFIG_CARDMAN_4040 is not set +# CONFIG_IPWIRELESS is not set +# CONFIG_RAW_DRIVER is not set +# CONFIG_TCG_TPM is not set +CONFIG_DEVPORT=y +# CONFIG_I2C is not set +CONFIG_SPI=y +# CONFIG_SPI_DEBUG is not set +CONFIG_SPI_MASTER=y + +# +# SPI Master Controller Drivers +# +# CONFIG_SPI_BITBANG is not set +CONFIG_SPI_LOCOMO=y + +# +# SPI Protocol Masters +# +# CONFIG_SPI_AT25 is not set +# CONFIG_SPI_SPIDEV is not set +# CONFIG_SPI_TLE62X0 is not set +CONFIG_ARCH_REQUIRE_GPIOLIB=y +CONFIG_GPIOLIB=y +# CONFIG_DEBUG_GPIO is not set +# CONFIG_GPIO_SYSFS is not set + +# +# Memory mapped GPIO expanders: +# + +# +# I2C GPIO expanders: +# + +# +# PCI GPIO expanders: +# + +# +# SPI GPIO expanders: +# +# CONFIG_GPIO_MAX7301 is not set +# CONFIG_GPIO_MCP23S08 is not set +# CONFIG_W1 is not set +CONFIG_POWER_SUPPLY=y +# CONFIG_POWER_SUPPLY_DEBUG is not set +CONFIG_PDA_POWER=y +CONFIG_APM_POWER=y +# CONFIG_BATTERY_DS2760 is not set +CONFIG_BATTERY_COLLIE=y +# CONFIG_HWMON is not set +# CONFIG_THERMAL is not set +# CONFIG_THERMAL_HWMON is not set +CONFIG_WATCHDOG=y +# CONFIG_WATCHDOG_NOWAYOUT is not set + +# +# Watchdog Device Drivers +# +# CONFIG_SOFT_WATCHDOG is not set +CONFIG_SA1100_WATCHDOG=m + +# +# ISA-based Watchdog Cards +# +# CONFIG_PCWATCHDOG is not set +# CONFIG_MIXCOMWD is not set +# CONFIG_WDT is not set +CONFIG_SSB_POSSIBLE=y + +# +# Sonics Silicon Backplane +# +CONFIG_SSB=m +CONFIG_SSB_PCMCIAHOST_POSSIBLE=y +# CONFIG_SSB_PCMCIAHOST is not set +# CONFIG_SSB_SILENT is not set +# CONFIG_SSB_DEBUG is not set + +# +# Multifunction device drivers +# +# CONFIG_MFD_CORE is not set +# CONFIG_MFD_SM501 is not set +# CONFIG_MFD_ASIC3 is not set +# CONFIG_HTC_EGPIO is not set +# CONFIG_HTC_PASIC3 is not set +# CONFIG_MFD_TMIO is not set +# CONFIG_MFD_T7L66XB is not set +# CONFIG_MFD_TC6387XB is not set +# CONFIG_MFD_TC6393XB is not set + +# +# Multimedia Capabilities Port drivers +# +CONFIG_MCP=y +CONFIG_MCP_SA11X0=y +CONFIG_MCP_UCB1200=y + +# +# Multimedia devices +# + +# +# Multimedia core support +# +# CONFIG_VIDEO_DEV is not set +# CONFIG_DVB_CORE is not set +# CONFIG_VIDEO_MEDIA is not set + +# +# Multimedia drivers +# +# CONFIG_DAB is not set + +# +# Graphics support +# +# CONFIG_VGASTATE is not set +# CONFIG_VIDEO_OUTPUT_CONTROL is not set +CONFIG_FB=y +# CONFIG_FIRMWARE_EDID is not set +# CONFIG_FB_DDC is not set +# CONFIG_FB_BOOT_VESA_SUPPORT is not set +CONFIG_FB_CFB_FILLRECT=y +CONFIG_FB_CFB_COPYAREA=y +CONFIG_FB_CFB_IMAGEBLIT=y +# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set +# CONFIG_FB_SYS_FILLRECT is not set +# CONFIG_FB_SYS_COPYAREA is not set +# CONFIG_FB_SYS_IMAGEBLIT is not set +# CONFIG_FB_FOREIGN_ENDIAN is not set +# CONFIG_FB_SYS_FOPS is not set +# CONFIG_FB_SVGALIB is not set +# CONFIG_FB_MACMODES is not set +# CONFIG_FB_BACKLIGHT is not set +# CONFIG_FB_MODE_HELPERS is not set +# CONFIG_FB_TILEBLITTING is not set + +# +# Frame buffer hardware drivers +# +CONFIG_FB_SA1100=y +# CONFIG_FB_S1D13XXX is not set +# CONFIG_FB_VIRTUAL is not set +# CONFIG_FB_METRONOME is not set +# CONFIG_FB_MB862XX is not set +CONFIG_BACKLIGHT_LCD_SUPPORT=y +# CONFIG_LCD_CLASS_DEVICE is not set +CONFIG_BACKLIGHT_CLASS_DEVICE=y +# CONFIG_BACKLIGHT_CORGI is not set +CONFIG_BACKLIGHT_LOCOMO=y + +# +# Display device support +# +# CONFIG_DISPLAY_SUPPORT is not set + +# +# Console display driver support +# +# CONFIG_VGA_CONSOLE is not set +# CONFIG_MDA_CONSOLE is not set +CONFIG_DUMMY_CONSOLE=y +CONFIG_FRAMEBUFFER_CONSOLE=y +# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set +CONFIG_FRAMEBUFFER_CONSOLE_ROTATION=y +CONFIG_FONTS=y +CONFIG_FONT_8x8=y +# CONFIG_FONT_8x16 is not set +# CONFIG_FONT_6x11 is not set +# CONFIG_FONT_7x14 is not set +# CONFIG_FONT_PEARL_8x8 is not set +# CONFIG_FONT_ACORN_8x8 is not set +# CONFIG_FONT_MINI_4x6 is not set +# CONFIG_FONT_SUN8x16 is not set +# CONFIG_FONT_SUN12x22 is not set +# CONFIG_FONT_10x18 is not set +CONFIG_LOGO=y +# CONFIG_LOGO_LINUX_MONO is not set +# CONFIG_LOGO_LINUX_VGA16 is not set +CONFIG_LOGO_LINUX_CLUT224=y +# CONFIG_SOUND is not set +# CONFIG_HID_SUPPORT is not set +CONFIG_HID=m +CONFIG_USB_SUPPORT=y +CONFIG_USB_ARCH_HAS_HCD=y +# CONFIG_USB_ARCH_HAS_OHCI is not set +# CONFIG_USB_ARCH_HAS_EHCI is not set +# CONFIG_USB is not set +# CONFIG_USB_OTG_WHITELIST is not set +# CONFIG_USB_OTG_BLACKLIST_HUB is not set +# CONFIG_USB_MUSB_HDRC is not set +# CONFIG_USB_GADGET_MUSB_HDRC is not set + +# +# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may also be needed; +# +CONFIG_USB_GADGET=y +# CONFIG_USB_GADGET_DEBUG is not set +# CONFIG_USB_GADGET_DEBUG_FILES is not set +# CONFIG_USB_GADGET_DEBUG_FS is not set +CONFIG_USB_GADGET_VBUS_DRAW=500 +CONFIG_USB_GADGET_SELECTED=y +# CONFIG_USB_GADGET_AT91 is not set +# CONFIG_USB_GADGET_ATMEL_USBA is not set +# CONFIG_USB_GADGET_FSL_USB2 is not set +# CONFIG_USB_GADGET_LH7A40X is not set +# CONFIG_USB_GADGET_OMAP is not set +# CONFIG_USB_GADGET_PXA25X is not set +# CONFIG_USB_GADGET_PXA27X is not set +# CONFIG_USB_GADGET_S3C2410 is not set +# CONFIG_USB_GADGET_M66592 is not set +# CONFIG_USB_GADGET_AMD5536UDC is not set +# CONFIG_USB_GADGET_FSL_QE is not set +# CONFIG_USB_GADGET_NET2280 is not set +# CONFIG_USB_GADGET_GOKU is not set +CONFIG_USB_GADGET_SA1100=y +CONFIG_USB_SA1100=y +# CONFIG_USB_GADGET_DUMMY_HCD is not set +# CONFIG_USB_GADGET_DUALSPEED is not set +CONFIG_USB_ZERO=m +CONFIG_USB_ETH=m +# CONFIG_USB_ETH_RNDIS is not set +CONFIG_USB_GADGETFS=m +CONFIG_USB_FILE_STORAGE=m +# CONFIG_USB_FILE_STORAGE_TEST is not set +CONFIG_USB_G_SERIAL=m +# CONFIG_USB_MIDI_GADGET is not set +CONFIG_USB_G_PRINTER=m +CONFIG_USB_CDC_COMPOSITE=m +CONFIG_MMC=y +# CONFIG_MMC_DEBUG is not set +CONFIG_MMC_UNSAFE_RESUME=y + +# +# MMC/SD/SDIO Card Drivers +# +CONFIG_MMC_BLOCK=y +# CONFIG_MMC_BLOCK_BOUNCE is not set +CONFIG_SDIO_UART=m +CONFIG_MMC_TEST=m + +# +# MMC/SD/SDIO Host Controller Drivers +# +CONFIG_MMC_SDHCI=y +CONFIG_MMC_SPI=y +# CONFIG_MEMSTICK is not set +# CONFIG_ACCESSIBILITY is not set +CONFIG_NEW_LEDS=y +CONFIG_LEDS_CLASS=y + +# +# LED drivers +# +CONFIG_LEDS_LOCOMO=y +# CONFIG_LEDS_GPIO is not set + +# +# LED Triggers +# +CONFIG_LEDS_TRIGGERS=y +CONFIG_LEDS_TRIGGER_TIMER=m +CONFIG_LEDS_TRIGGER_IDE_DISK=y +CONFIG_LEDS_TRIGGER_HEARTBEAT=m +CONFIG_LEDS_TRIGGER_BACKLIGHT=m +CONFIG_LEDS_TRIGGER_DEFAULT_ON=m +CONFIG_RTC_LIB=y +CONFIG_RTC_CLASS=y +CONFIG_RTC_HCTOSYS=y +CONFIG_RTC_HCTOSYS_DEVICE="rtc0" +# CONFIG_RTC_DEBUG is not set + +# +# RTC interfaces +# +CONFIG_RTC_INTF_SYSFS=y +CONFIG_RTC_INTF_PROC=y +CONFIG_RTC_INTF_DEV=y +# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set +# CONFIG_RTC_DRV_TEST is not set + +# +# SPI RTC drivers +# +# CONFIG_RTC_DRV_M41T94 is not set +# CONFIG_RTC_DRV_DS1305 is not set +# CONFIG_RTC_DRV_DS1390 is not set +# CONFIG_RTC_DRV_MAX6902 is not set +# CONFIG_RTC_DRV_R9701 is not set +# CONFIG_RTC_DRV_RS5C348 is not set +# CONFIG_RTC_DRV_DS3234 is not set + +# +# Platform RTC drivers +# +# CONFIG_RTC_DRV_CMOS is not set +# CONFIG_RTC_DRV_DS1286 is not set +# CONFIG_RTC_DRV_DS1511 is not set +# CONFIG_RTC_DRV_DS1553 is not set +# CONFIG_RTC_DRV_DS1742 is not set +# CONFIG_RTC_DRV_STK17TA8 is not set +# CONFIG_RTC_DRV_M48T86 is not set +# CONFIG_RTC_DRV_M48T35 is not set +# CONFIG_RTC_DRV_M48T59 is not set +# CONFIG_RTC_DRV_BQ4802 is not set +# CONFIG_RTC_DRV_V3020 is not set + +# +# on-CPU RTC drivers +# +# CONFIG_RTC_DRV_SA1100 is not set +# CONFIG_DMADEVICES is not set +# CONFIG_REGULATOR is not set +CONFIG_UIO=m +CONFIG_UIO_PDRV=m +CONFIG_UIO_PDRV_GENIRQ=m +CONFIG_UIO_SMX=m +CONFIG_UIO_SERCOS3=m + +# +# File systems +# +CONFIG_EXT2_FS=y +# CONFIG_EXT2_FS_XATTR is not set +# CONFIG_EXT2_FS_XIP is not set +CONFIG_EXT3_FS=y +# CONFIG_EXT3_FS_XATTR is not set +CONFIG_EXT4_FS=m +# CONFIG_EXT4DEV_COMPAT is not set +CONFIG_EXT4_FS_XATTR=y +# CONFIG_EXT4_FS_POSIX_ACL is not set +# CONFIG_EXT4_FS_SECURITY is not set +CONFIG_JBD=y +# CONFIG_JBD_DEBUG is not set +CONFIG_JBD2=m +# CONFIG_JBD2_DEBUG is not set +CONFIG_FS_MBCACHE=m +CONFIG_REISERFS_FS=m +# CONFIG_REISERFS_CHECK is not set +# CONFIG_REISERFS_PROC_INFO is not set +# CONFIG_REISERFS_FS_XATTR is not set +CONFIG_JFS_FS=m +# CONFIG_JFS_POSIX_ACL is not set +# CONFIG_JFS_SECURITY is not set +# CONFIG_JFS_DEBUG is not set +# CONFIG_JFS_STATISTICS is not set +CONFIG_FS_POSIX_ACL=y +CONFIG_FILE_LOCKING=y +CONFIG_XFS_FS=m +# CONFIG_XFS_QUOTA is not set +# CONFIG_XFS_POSIX_ACL is not set +# CONFIG_XFS_RT is not set +# CONFIG_XFS_DEBUG is not set +CONFIG_OCFS2_FS=m +CONFIG_OCFS2_FS_O2CB=m +CONFIG_OCFS2_FS_STATS=y +CONFIG_OCFS2_DEBUG_MASKLOG=y +# CONFIG_OCFS2_DEBUG_FS is not set +# CONFIG_OCFS2_COMPAT_JBD is not set +CONFIG_DNOTIFY=y +CONFIG_INOTIFY=y +CONFIG_INOTIFY_USER=y +# CONFIG_QUOTA is not set +# CONFIG_AUTOFS_FS is not set +# CONFIG_AUTOFS4_FS is not set +CONFIG_FUSE_FS=m + +# +# CD-ROM/DVD Filesystems +# +CONFIG_ISO9660_FS=m +# CONFIG_JOLIET is not set +# CONFIG_ZISOFS is not set +CONFIG_UDF_FS=m +CONFIG_UDF_NLS=y + +# +# DOS/FAT/NT Filesystems +# +CONFIG_FAT_FS=y +CONFIG_MSDOS_FS=m +CONFIG_VFAT_FS=y +CONFIG_FAT_DEFAULT_CODEPAGE=437 +CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" +CONFIG_NTFS_FS=m +# CONFIG_NTFS_DEBUG is not set +# CONFIG_NTFS_RW is not set + +# +# Pseudo filesystems +# +CONFIG_PROC_FS=y +CONFIG_PROC_SYSCTL=y +CONFIG_PROC_PAGE_MONITOR=y +CONFIG_SYSFS=y +CONFIG_TMPFS=y +# CONFIG_TMPFS_POSIX_ACL is not set +# CONFIG_HUGETLB_PAGE is not set +CONFIG_CONFIGFS_FS=m + +# +# Miscellaneous filesystems +# +# CONFIG_ADFS_FS is not set +# CONFIG_AFFS_FS is not set +# CONFIG_HFS_FS is not set +# CONFIG_HFSPLUS_FS is not set +# CONFIG_BEFS_FS is not set +# CONFIG_BFS_FS is not set +# CONFIG_EFS_FS is not set +CONFIG_JFFS2_FS=y +CONFIG_JFFS2_FS_DEBUG=0 +CONFIG_JFFS2_FS_WRITEBUFFER=y +# CONFIG_JFFS2_FS_WBUF_VERIFY is not set +# CONFIG_JFFS2_SUMMARY is not set +# CONFIG_JFFS2_FS_XATTR is not set +CONFIG_JFFS2_COMPRESSION_OPTIONS=y +CONFIG_JFFS2_ZLIB=y +CONFIG_JFFS2_LZO=y +CONFIG_JFFS2_RTIME=y +CONFIG_JFFS2_RUBIN=y +# CONFIG_JFFS2_CMODE_NONE is not set +CONFIG_JFFS2_CMODE_PRIORITY=y +# CONFIG_JFFS2_CMODE_SIZE is not set +# CONFIG_JFFS2_CMODE_FAVOURLZO is not set +# CONFIG_UBIFS_FS is not set +CONFIG_CRAMFS=m +# CONFIG_VXFS_FS is not set +# CONFIG_MINIX_FS is not set +# CONFIG_OMFS_FS is not set +# CONFIG_HPFS_FS is not set +# CONFIG_QNX4FS_FS is not set +# CONFIG_ROMFS_FS is not set +# CONFIG_SYSV_FS is not set +# CONFIG_UFS_FS is not set +CONFIG_NETWORK_FILESYSTEMS=y +CONFIG_NFS_FS=y +CONFIG_NFS_V3=y +# CONFIG_NFS_V3_ACL is not set +CONFIG_NFS_V4=y +CONFIG_NFSD=m +CONFIG_NFSD_V3=y +# CONFIG_NFSD_V3_ACL is not set +CONFIG_NFSD_V4=y +CONFIG_LOCKD=y +CONFIG_LOCKD_V4=y +CONFIG_EXPORTFS=m +CONFIG_NFS_COMMON=y +CONFIG_SUNRPC=y +CONFIG_SUNRPC_GSS=y +# CONFIG_SUNRPC_REGISTER_V4 is not set +CONFIG_RPCSEC_GSS_KRB5=y +# CONFIG_RPCSEC_GSS_SPKM3 is not set +CONFIG_SMB_FS=m +CONFIG_SMB_NLS_DEFAULT=y +CONFIG_SMB_NLS_REMOTE="cp437" +CONFIG_CIFS=m +# CONFIG_CIFS_STATS is not set +# CONFIG_CIFS_WEAK_PW_HASH is not set +# CONFIG_CIFS_XATTR is not set +# CONFIG_CIFS_DEBUG2 is not set +# CONFIG_CIFS_EXPERIMENTAL is not set +# CONFIG_NCP_FS is not set +# CONFIG_CODA_FS is not set +# CONFIG_AFS_FS is not set + +# +# Partition Types +# +CONFIG_PARTITION_ADVANCED=y +# CONFIG_ACORN_PARTITION is not set +# CONFIG_OSF_PARTITION is not set +# CONFIG_AMIGA_PARTITION is not set +# CONFIG_ATARI_PARTITION is not set +# CONFIG_MAC_PARTITION is not set +CONFIG_MSDOS_PARTITION=y +# CONFIG_BSD_DISKLABEL is not set +# CONFIG_MINIX_SUBPARTITION is not set +# CONFIG_SOLARIS_X86_PARTITION is not set +# CONFIG_UNIXWARE_DISKLABEL is not set +# CONFIG_LDM_PARTITION is not set +# CONFIG_SGI_PARTITION is not set +# CONFIG_ULTRIX_PARTITION is not set +# CONFIG_SUN_PARTITION is not set +# CONFIG_KARMA_PARTITION is not set +# CONFIG_EFI_PARTITION is not set +# CONFIG_SYSV68_PARTITION is not set +CONFIG_NLS=y +CONFIG_NLS_DEFAULT="cp437" +CONFIG_NLS_CODEPAGE_437=y +CONFIG_NLS_CODEPAGE_737=m +CONFIG_NLS_CODEPAGE_775=m +CONFIG_NLS_CODEPAGE_850=m +CONFIG_NLS_CODEPAGE_852=m +CONFIG_NLS_CODEPAGE_855=m +CONFIG_NLS_CODEPAGE_857=m +CONFIG_NLS_CODEPAGE_860=m +CONFIG_NLS_CODEPAGE_861=m +CONFIG_NLS_CODEPAGE_862=m +CONFIG_NLS_CODEPAGE_863=m +CONFIG_NLS_CODEPAGE_864=m +CONFIG_NLS_CODEPAGE_865=m +CONFIG_NLS_CODEPAGE_866=m +CONFIG_NLS_CODEPAGE_869=m +CONFIG_NLS_CODEPAGE_936=m +CONFIG_NLS_CODEPAGE_950=m +CONFIG_NLS_CODEPAGE_932=m +CONFIG_NLS_CODEPAGE_949=m +CONFIG_NLS_CODEPAGE_874=m +CONFIG_NLS_ISO8859_8=m +CONFIG_NLS_CODEPAGE_1250=m +CONFIG_NLS_CODEPAGE_1251=m +CONFIG_NLS_ASCII=m +CONFIG_NLS_ISO8859_1=y +CONFIG_NLS_ISO8859_2=m +CONFIG_NLS_ISO8859_3=m +CONFIG_NLS_ISO8859_4=m +CONFIG_NLS_ISO8859_5=m +CONFIG_NLS_ISO8859_6=m +CONFIG_NLS_ISO8859_7=m +CONFIG_NLS_ISO8859_9=m +CONFIG_NLS_ISO8859_13=m +CONFIG_NLS_ISO8859_14=m +CONFIG_NLS_ISO8859_15=m +CONFIG_NLS_KOI8_R=m +CONFIG_NLS_KOI8_U=m +CONFIG_NLS_UTF8=y +# CONFIG_DLM is not set + +# +# Kernel hacking +# +# CONFIG_PRINTK_TIME is not set +CONFIG_ENABLE_WARN_DEPRECATED=y +CONFIG_ENABLE_MUST_CHECK=y +CONFIG_FRAME_WARN=1024 +CONFIG_MAGIC_SYSRQ=y +# CONFIG_UNUSED_SYMBOLS is not set +CONFIG_DEBUG_FS=y +# CONFIG_HEADERS_CHECK is not set +CONFIG_DEBUG_KERNEL=y +# CONFIG_DEBUG_SHIRQ is not set +# CONFIG_DETECT_SOFTLOCKUP is not set +# CONFIG_SCHED_DEBUG is not set +# CONFIG_SCHEDSTATS is not set +CONFIG_TIMER_STATS=y +# CONFIG_DEBUG_OBJECTS is not set +# CONFIG_DEBUG_SLAB is not set +# CONFIG_DEBUG_PREEMPT is not set +# CONFIG_DEBUG_RT_MUTEXES is not set +# CONFIG_RT_MUTEX_TESTER is not set +# CONFIG_DEBUG_SPINLOCK is not set +# CONFIG_DEBUG_MUTEXES is not set +# CONFIG_DEBUG_LOCK_ALLOC is not set +# CONFIG_PROVE_LOCKING is not set +# CONFIG_LOCK_STAT is not set +# CONFIG_DEBUG_SPINLOCK_SLEEP is not set +# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set +# CONFIG_DEBUG_KOBJECT is not set +CONFIG_DEBUG_BUGVERBOSE=y +# CONFIG_DEBUG_INFO is not set +# CONFIG_DEBUG_VM is not set +# CONFIG_DEBUG_WRITECOUNT is not set +# CONFIG_DEBUG_MEMORY_INIT is not set +# CONFIG_DEBUG_LIST is not set +# CONFIG_DEBUG_SG is not set +CONFIG_FRAME_POINTER=y +# CONFIG_BOOT_PRINTK_DELAY is not set +# CONFIG_RCU_TORTURE_TEST is not set +# CONFIG_RCU_CPU_STALL_DETECTOR is not set +# CONFIG_BACKTRACE_SELF_TEST is not set +# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set +# CONFIG_FAULT_INJECTION is not set +# CONFIG_LATENCYTOP is not set +CONFIG_SYSCTL_SYSCALL_CHECK=y +CONFIG_HAVE_FUNCTION_TRACER=y + +# +# Tracers +# +# CONFIG_FUNCTION_TRACER is not set +# CONFIG_IRQSOFF_TRACER is not set +# CONFIG_PREEMPT_TRACER is not set +# CONFIG_SCHED_TRACER is not set +# CONFIG_CONTEXT_SWITCH_TRACER is not set +# CONFIG_BOOT_TRACER is not set +# CONFIG_STACK_TRACER is not set +# CONFIG_DYNAMIC_PRINTK_DEBUG is not set +# CONFIG_SAMPLES is not set +CONFIG_HAVE_ARCH_KGDB=y +# CONFIG_KGDB is not set +# CONFIG_DEBUG_USER is not set +CONFIG_DEBUG_ERRORS=y +# CONFIG_DEBUG_STACK_USAGE is not set +# CONFIG_DEBUG_LL is not set + +# +# Security options +# +# CONFIG_KEYS is not set +# CONFIG_SECURITY is not set +# CONFIG_SECURITYFS is not set +# CONFIG_SECURITY_FILE_CAPABILITIES is not set +CONFIG_CRYPTO=y + +# +# Crypto core or helper +# +# CONFIG_CRYPTO_FIPS is not set +CONFIG_CRYPTO_ALGAPI=y +CONFIG_CRYPTO_ALGAPI2=y +CONFIG_CRYPTO_AEAD=m +CONFIG_CRYPTO_AEAD2=y +CONFIG_CRYPTO_BLKCIPHER=y +CONFIG_CRYPTO_BLKCIPHER2=y +CONFIG_CRYPTO_HASH=m +CONFIG_CRYPTO_HASH2=y +CONFIG_CRYPTO_RNG2=y +CONFIG_CRYPTO_MANAGER=y +CONFIG_CRYPTO_MANAGER2=y +# CONFIG_CRYPTO_GF128MUL is not set +CONFIG_CRYPTO_NULL=m +# CONFIG_CRYPTO_CRYPTD is not set +CONFIG_CRYPTO_AUTHENC=m +CONFIG_CRYPTO_TEST=m + +# +# Authenticated Encryption with Associated Data +# +# CONFIG_CRYPTO_CCM is not set +# CONFIG_CRYPTO_GCM is not set +# CONFIG_CRYPTO_SEQIV is not set + +# +# Block modes +# +CONFIG_CRYPTO_CBC=y +# CONFIG_CRYPTO_CTR is not set +# CONFIG_CRYPTO_CTS is not set +CONFIG_CRYPTO_ECB=y +# CONFIG_CRYPTO_LRW is not set +CONFIG_CRYPTO_PCBC=m +# CONFIG_CRYPTO_XTS is not set + +# +# Hash modes +# +CONFIG_CRYPTO_HMAC=m +# CONFIG_CRYPTO_XCBC is not set + +# +# Digest +# +CONFIG_CRYPTO_CRC32C=m +CONFIG_CRYPTO_MD4=m +CONFIG_CRYPTO_MD5=y +CONFIG_CRYPTO_MICHAEL_MIC=y +# CONFIG_CRYPTO_RMD128 is not set +# CONFIG_CRYPTO_RMD160 is not set +# CONFIG_CRYPTO_RMD256 is not set +# CONFIG_CRYPTO_RMD320 is not set +CONFIG_CRYPTO_SHA1=m +CONFIG_CRYPTO_SHA256=m +CONFIG_CRYPTO_SHA512=m +# CONFIG_CRYPTO_TGR192 is not set +CONFIG_CRYPTO_WP512=m + +# +# Ciphers +# +CONFIG_CRYPTO_AES=y +CONFIG_CRYPTO_ANUBIS=m +CONFIG_CRYPTO_ARC4=y +CONFIG_CRYPTO_BLOWFISH=m +CONFIG_CRYPTO_CAMELLIA=m +CONFIG_CRYPTO_CAST5=m +CONFIG_CRYPTO_CAST6=m +CONFIG_CRYPTO_DES=y +# CONFIG_CRYPTO_FCRYPT is not set +CONFIG_CRYPTO_KHAZAD=m +# CONFIG_CRYPTO_SALSA20 is not set +# CONFIG_CRYPTO_SEED is not set +CONFIG_CRYPTO_SERPENT=m +CONFIG_CRYPTO_TEA=m +CONFIG_CRYPTO_TWOFISH=m +CONFIG_CRYPTO_TWOFISH_COMMON=m + +# +# Compression +# +CONFIG_CRYPTO_DEFLATE=m +CONFIG_CRYPTO_LZO=m + +# +# Random Number Generation +# +# CONFIG_CRYPTO_ANSI_CPRNG is not set +# CONFIG_CRYPTO_HW is not set + +# +# Library routines +# +CONFIG_BITREVERSE=y +CONFIG_CRC_CCITT=y +CONFIG_CRC16=m +# CONFIG_CRC_T10DIF is not set +CONFIG_CRC_ITU_T=y +CONFIG_CRC32=y +CONFIG_CRC7=y +CONFIG_LIBCRC32C=m +CONFIG_ZLIB_INFLATE=y +CONFIG_ZLIB_DEFLATE=y +CONFIG_LZO_COMPRESS=y +CONFIG_LZO_DECOMPRESS=y +CONFIG_PLIST=y +CONFIG_HAS_IOMEM=y +CONFIG_HAS_IOPORT=y +CONFIG_HAS_DMA=y diff --git a/packages/linux/linux-2.6.28/at91sam9263ek/linux-2.6.28-at91.patch.bz2 b/packages/linux/linux-2.6.28/linux-2.6.28-at91.patch.bz2 Binary files differindex 7069c54dd4..7069c54dd4 100644 --- a/packages/linux/linux-2.6.28/at91sam9263ek/linux-2.6.28-at91.patch.bz2 +++ b/packages/linux/linux-2.6.28/linux-2.6.28-at91.patch.bz2 diff --git a/packages/linux/linux-2.6.28/at91sam9263ek/linux-2.6.28-exp.patch.bz2 b/packages/linux/linux-2.6.28/linux-2.6.28-exp.patch.bz2 Binary files differindex 9417b3aab6..9417b3aab6 100644 --- a/packages/linux/linux-2.6.28/at91sam9263ek/linux-2.6.28-exp.patch.bz2 +++ b/packages/linux/linux-2.6.28/linux-2.6.28-exp.patch.bz2 diff --git a/packages/linux/linux-2.6.28/ronetix-pm9263/defconfig b/packages/linux/linux-2.6.28/ronetix-pm9263/defconfig new file mode 100644 index 0000000000..ec5bf7a39a --- /dev/null +++ b/packages/linux/linux-2.6.28/ronetix-pm9263/defconfig @@ -0,0 +1,1438 @@ +# +# Automatically generated make config: don't edit +# Linux kernel version: 2.6.28 +# Tue Dec 30 15:28:55 2008 +# +CONFIG_ARM=y +CONFIG_SYS_SUPPORTS_APM_EMULATION=y +CONFIG_GENERIC_GPIO=y +CONFIG_GENERIC_TIME=y +CONFIG_GENERIC_CLOCKEVENTS=y +CONFIG_MMU=y +# CONFIG_NO_IOPORT is not set +CONFIG_GENERIC_HARDIRQS=y +CONFIG_STACKTRACE_SUPPORT=y +CONFIG_HAVE_LATENCYTOP_SUPPORT=y +CONFIG_LOCKDEP_SUPPORT=y +CONFIG_TRACE_IRQFLAGS_SUPPORT=y +CONFIG_HARDIRQS_SW_RESEND=y +CONFIG_GENERIC_IRQ_PROBE=y +CONFIG_RWSEM_GENERIC_SPINLOCK=y +# CONFIG_ARCH_HAS_ILOG2_U32 is not set +# CONFIG_ARCH_HAS_ILOG2_U64 is not set +CONFIG_GENERIC_HWEIGHT=y +CONFIG_GENERIC_CALIBRATE_DELAY=y +CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y +CONFIG_VECTORS_BASE=0xffff0000 +CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" + +# +# General setup +# +CONFIG_EXPERIMENTAL=y +CONFIG_BROKEN_ON_SMP=y +CONFIG_INIT_ENV_ARG_LIMIT=32 +CONFIG_LOCALVERSION="-pm9263" +# CONFIG_LOCALVERSION_AUTO is not set +# CONFIG_SWAP is not set +CONFIG_SYSVIPC=y +CONFIG_SYSVIPC_SYSCTL=y +# CONFIG_POSIX_MQUEUE is not set +# CONFIG_BSD_PROCESS_ACCT is not set +# CONFIG_TASKSTATS is not set +# CONFIG_AUDIT is not set +# CONFIG_IKCONFIG is not set +CONFIG_LOG_BUF_SHIFT=14 +# CONFIG_CGROUPS is not set +# CONFIG_GROUP_SCHED is not set +CONFIG_SYSFS_DEPRECATED=y +CONFIG_SYSFS_DEPRECATED_V2=y +# CONFIG_RELAY is not set +CONFIG_NAMESPACES=y +# CONFIG_UTS_NS is not set +# CONFIG_IPC_NS is not set +# CONFIG_USER_NS is not set +# CONFIG_PID_NS is not set +CONFIG_BLK_DEV_INITRD=y +CONFIG_INITRAMFS_SOURCE="" +CONFIG_CC_OPTIMIZE_FOR_SIZE=y +CONFIG_SYSCTL=y +# CONFIG_EMBEDDED is not set +CONFIG_UID16=y +CONFIG_SYSCTL_SYSCALL=y +CONFIG_KALLSYMS=y +# CONFIG_KALLSYMS_ALL is not set +# CONFIG_KALLSYMS_EXTRA_PASS is not set +CONFIG_HOTPLUG=y +CONFIG_PRINTK=y +CONFIG_BUG=y +CONFIG_ELF_CORE=y +CONFIG_COMPAT_BRK=y +CONFIG_BASE_FULL=y +CONFIG_FUTEX=y +CONFIG_ANON_INODES=y +CONFIG_EPOLL=y +CONFIG_SIGNALFD=y +CONFIG_TIMERFD=y +CONFIG_EVENTFD=y +CONFIG_SHMEM=y +CONFIG_AIO=y +CONFIG_VM_EVENT_COUNTERS=y +CONFIG_SLAB=y +# CONFIG_SLUB is not set +# CONFIG_SLOB is not set +# CONFIG_PROFILING is not set +# CONFIG_MARKERS is not set +CONFIG_HAVE_OPROFILE=y +# CONFIG_KPROBES is not set +CONFIG_HAVE_KPROBES=y +CONFIG_HAVE_KRETPROBES=y +CONFIG_HAVE_CLK=y +CONFIG_HAVE_GENERIC_DMA_COHERENT=y +CONFIG_SLABINFO=y +CONFIG_RT_MUTEXES=y +# CONFIG_TINY_SHMEM is not set +CONFIG_BASE_SMALL=0 +CONFIG_MODULES=y +# CONFIG_MODULE_FORCE_LOAD is not set +CONFIG_MODULE_UNLOAD=y +# CONFIG_MODULE_FORCE_UNLOAD is not set +# CONFIG_MODVERSIONS is not set +# CONFIG_MODULE_SRCVERSION_ALL is not set +CONFIG_KMOD=y +CONFIG_BLOCK=y +# CONFIG_LBD is not set +# CONFIG_BLK_DEV_IO_TRACE is not set +# CONFIG_LSF is not set +# CONFIG_BLK_DEV_BSG is not set +# CONFIG_BLK_DEV_INTEGRITY is not set + +# +# IO Schedulers +# +CONFIG_IOSCHED_NOOP=y +CONFIG_IOSCHED_AS=y +# CONFIG_IOSCHED_DEADLINE is not set +# CONFIG_IOSCHED_CFQ is not set +CONFIG_DEFAULT_AS=y +# CONFIG_DEFAULT_DEADLINE is not set +# CONFIG_DEFAULT_CFQ is not set +# CONFIG_DEFAULT_NOOP is not set +CONFIG_DEFAULT_IOSCHED="anticipatory" +CONFIG_CLASSIC_RCU=y +# CONFIG_FREEZER is not set + +# +# System Type +# +# CONFIG_ARCH_AAEC2000 is not set +# CONFIG_ARCH_INTEGRATOR is not set +# CONFIG_ARCH_REALVIEW is not set +# CONFIG_ARCH_VERSATILE is not set +CONFIG_ARCH_AT91=y +# CONFIG_ARCH_CLPS7500 is not set +# CONFIG_ARCH_CLPS711X is not set +# CONFIG_ARCH_EBSA110 is not set +# CONFIG_ARCH_EP93XX is not set +# CONFIG_ARCH_FOOTBRIDGE is not set +# CONFIG_ARCH_NETX is not set +# CONFIG_ARCH_H720X is not set +# CONFIG_ARCH_IMX is not set +# CONFIG_ARCH_IOP13XX is not set +# CONFIG_ARCH_IOP32X is not set +# CONFIG_ARCH_IOP33X is not set +# CONFIG_ARCH_IXP23XX is not set +# CONFIG_ARCH_IXP2000 is not set +# CONFIG_ARCH_IXP4XX is not set +# CONFIG_ARCH_L7200 is not set +# CONFIG_ARCH_KIRKWOOD is not set +# CONFIG_ARCH_KS8695 is not set +# CONFIG_ARCH_NS9XXX is not set +# CONFIG_ARCH_LOKI is not set +# CONFIG_ARCH_MV78XX0 is not set +# CONFIG_ARCH_MXC is not set +# CONFIG_ARCH_ORION5X is not set +# CONFIG_ARCH_PNX4008 is not set +# CONFIG_ARCH_PXA is not set +# CONFIG_ARCH_RPC is not set +# CONFIG_ARCH_SA1100 is not set +# CONFIG_ARCH_S3C2410 is not set +# CONFIG_ARCH_SHARK is not set +# CONFIG_ARCH_LH7A40X is not set +# CONFIG_ARCH_DAVINCI is not set +# CONFIG_ARCH_OMAP is not set +# CONFIG_ARCH_MSM is not set + +# +# Boot options +# + +# +# Power management +# + +# +# Atmel AT91 System-on-Chip +# +# CONFIG_ARCH_AT91RM9200 is not set +# CONFIG_ARCH_AT91SAM9260 is not set +# CONFIG_ARCH_AT91SAM9261 is not set +CONFIG_ARCH_AT91SAM9263=y +# CONFIG_ARCH_AT91SAM9RL is not set +# CONFIG_ARCH_AT91SAM9G20 is not set +# CONFIG_ARCH_AT91CAP9 is not set +# CONFIG_ARCH_AT91X40 is not set +CONFIG_AT91_PMC_UNIT=y + +# +# AT91SAM9263 Board Type +# +# CONFIG_MACH_AT91SAM9263EK is not set +# CONFIG_MACH_USB_A9263 is not set +# CONFIG_MACH_CSB737 is not set +# CONFIG_MACH_TOTEMNOVA is not set +# CONFIG_MACH_NEOCORE926 is not set +CONFIG_MACH_PM9263=y + +# +# AT91 Board Options +# +CONFIG_MTD_AT91_DATAFLASH_CARD=y +# CONFIG_MTD_NAND_ATMEL_BUSWIDTH_16 is not set + +# +# AT91 Feature Selections +# +# CONFIG_AT91_PROGRAMMABLE_CLOCKS is not set +CONFIG_AT91_TIMER_HZ=100 +CONFIG_AT91_EARLY_DBGU=y +# CONFIG_AT91_EARLY_USART0 is not set +# CONFIG_AT91_EARLY_USART1 is not set +# CONFIG_AT91_EARLY_USART2 is not set +# CONFIG_AT91_EARLY_USART3 is not set +# CONFIG_AT91_EARLY_USART4 is not set +# CONFIG_AT91_EARLY_USART5 is not set + +# +# Processor Type +# +CONFIG_CPU_32=y +CONFIG_CPU_ARM926T=y +CONFIG_CPU_32v5=y +CONFIG_CPU_ABRT_EV5TJ=y +CONFIG_CPU_PABRT_NOIFAR=y +CONFIG_CPU_CACHE_VIVT=y +CONFIG_CPU_COPY_V4WB=y +CONFIG_CPU_TLB_V4WBI=y +CONFIG_CPU_CP15=y +CONFIG_CPU_CP15_MMU=y + +# +# Processor Features +# +# CONFIG_ARM_THUMB is not set +# CONFIG_CPU_ICACHE_DISABLE is not set +# CONFIG_CPU_DCACHE_DISABLE is not set +# CONFIG_CPU_DCACHE_WRITETHROUGH is not set +# CONFIG_CPU_CACHE_ROUND_ROBIN is not set +# CONFIG_OUTER_CACHE is not set + +# +# Bus support +# +# CONFIG_PCI_SYSCALL is not set +# CONFIG_ARCH_SUPPORTS_MSI is not set +CONFIG_PCCARD=y +# CONFIG_PCMCIA_DEBUG is not set +CONFIG_PCMCIA=y +CONFIG_PCMCIA_LOAD_CIS=y +CONFIG_PCMCIA_IOCTL=y + +# +# PC-card bridges +# +CONFIG_AT91_CF=y + +# +# Kernel Features +# +# CONFIG_NO_HZ is not set +# CONFIG_HIGH_RES_TIMERS is not set +CONFIG_GENERIC_CLOCKEVENTS_BUILD=y +CONFIG_VMSPLIT_3G=y +# CONFIG_VMSPLIT_2G is not set +# CONFIG_VMSPLIT_1G is not set +CONFIG_PAGE_OFFSET=0xC0000000 +# CONFIG_PREEMPT is not set +CONFIG_HZ=100 +# CONFIG_AEABI is not set +CONFIG_ARCH_FLATMEM_HAS_HOLES=y +# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set +# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set +CONFIG_SELECT_MEMORY_MODEL=y +CONFIG_FLATMEM_MANUAL=y +# CONFIG_DISCONTIGMEM_MANUAL is not set +# CONFIG_SPARSEMEM_MANUAL is not set +CONFIG_FLATMEM=y +CONFIG_FLAT_NODE_MEM_MAP=y +CONFIG_PAGEFLAGS_EXTENDED=y +CONFIG_SPLIT_PTLOCK_CPUS=4096 +# CONFIG_RESOURCES_64BIT is not set +# CONFIG_PHYS_ADDR_T_64BIT is not set +CONFIG_ZONE_DMA_FLAG=0 +CONFIG_VIRT_TO_BUS=y +CONFIG_UNEVICTABLE_LRU=y +# CONFIG_LEDS is not set +CONFIG_ALIGNMENT_TRAP=y + +# +# Boot options +# +CONFIG_ZBOOT_ROM_TEXT=0x0 +CONFIG_ZBOOT_ROM_BSS=0x0 +CONFIG_CMDLINE="mem=64M console=ttyS0,115200 initrd=0x21100000,3145728 root=/dev/ram0 rw" +# CONFIG_XIP_KERNEL is not set +# CONFIG_KEXEC is not set + +# +# CPU Power Management +# +# CONFIG_CPU_IDLE is not set + +# +# Floating point emulation +# + +# +# At least one emulation must be selected +# +CONFIG_FPE_NWFPE=y +# CONFIG_FPE_NWFPE_XP is not set +# CONFIG_FPE_FASTFPE is not set +# CONFIG_VFP is not set + +# +# Userspace binary formats +# +CONFIG_BINFMT_ELF=y +# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set +CONFIG_HAVE_AOUT=y +# CONFIG_BINFMT_AOUT is not set +# CONFIG_BINFMT_MISC is not set +# CONFIG_ARTHUR is not set + +# +# Power management options +# +# CONFIG_PM is not set +CONFIG_ARCH_SUSPEND_POSSIBLE=y +CONFIG_NET=y + +# +# Networking options +# +CONFIG_PACKET=y +# CONFIG_PACKET_MMAP is not set +CONFIG_UNIX=y +# CONFIG_NET_KEY is not set +CONFIG_INET=y +# CONFIG_IP_MULTICAST is not set +# CONFIG_IP_ADVANCED_ROUTER is not set +CONFIG_IP_FIB_HASH=y +CONFIG_IP_PNP=y +# CONFIG_IP_PNP_DHCP is not set +CONFIG_IP_PNP_BOOTP=y +CONFIG_IP_PNP_RARP=y +# CONFIG_NET_IPIP is not set +# CONFIG_NET_IPGRE is not set +# CONFIG_ARPD is not set +# CONFIG_SYN_COOKIES is not set +# CONFIG_INET_AH is not set +# CONFIG_INET_ESP is not set +# CONFIG_INET_IPCOMP is not set +# CONFIG_INET_XFRM_TUNNEL is not set +# CONFIG_INET_TUNNEL is not set +# CONFIG_INET_XFRM_MODE_TRANSPORT is not set +# CONFIG_INET_XFRM_MODE_TUNNEL is not set +# CONFIG_INET_XFRM_MODE_BEET is not set +# CONFIG_INET_LRO is not set +# CONFIG_INET_DIAG is not set +# CONFIG_TCP_CONG_ADVANCED is not set +CONFIG_TCP_CONG_CUBIC=y +CONFIG_DEFAULT_TCP_CONG="cubic" +# CONFIG_TCP_MD5SIG is not set +# CONFIG_IPV6 is not set +# CONFIG_NETWORK_SECMARK is not set +# CONFIG_NETFILTER is not set +# CONFIG_IP_DCCP is not set +# CONFIG_IP_SCTP is not set +# CONFIG_TIPC is not set +# CONFIG_ATM is not set +# CONFIG_BRIDGE is not set +# CONFIG_NET_DSA is not set +# CONFIG_VLAN_8021Q is not set +# CONFIG_DECNET is not set +# CONFIG_LLC2 is not set +# CONFIG_IPX is not set +# CONFIG_ATALK is not set +# CONFIG_X25 is not set +# CONFIG_LAPB is not set +# CONFIG_ECONET is not set +# CONFIG_WAN_ROUTER is not set +# CONFIG_NET_SCHED is not set + +# +# Network testing +# +# CONFIG_NET_PKTGEN is not set +# CONFIG_HAMRADIO is not set +# CONFIG_CAN is not set +# CONFIG_IRDA is not set +# CONFIG_BT is not set +# CONFIG_AF_RXRPC is not set +# CONFIG_PHONET is not set +CONFIG_WIRELESS=y +# CONFIG_CFG80211 is not set +CONFIG_WIRELESS_OLD_REGULATORY=y +# CONFIG_WIRELESS_EXT is not set +# CONFIG_MAC80211 is not set +# CONFIG_IEEE80211 is not set +# CONFIG_RFKILL is not set +# CONFIG_NET_9P is not set + +# +# Device Drivers +# + +# +# Generic Driver Options +# +CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" +CONFIG_STANDALONE=y +CONFIG_PREVENT_FIRMWARE_BUILD=y +CONFIG_FW_LOADER=y +CONFIG_FIRMWARE_IN_KERNEL=y +CONFIG_EXTRA_FIRMWARE="" +# CONFIG_DEBUG_DRIVER is not set +# CONFIG_DEBUG_DEVRES is not set +# CONFIG_SYS_HYPERVISOR is not set +# CONFIG_CONNECTOR is not set +CONFIG_MTD=y +# CONFIG_MTD_DEBUG is not set +# CONFIG_MTD_CONCAT is not set +CONFIG_MTD_PARTITIONS=y +# CONFIG_MTD_REDBOOT_PARTS is not set +CONFIG_MTD_CMDLINE_PARTS=y +# CONFIG_MTD_AFS_PARTS is not set +# CONFIG_MTD_AR7_PARTS is not set + +# +# User Modules And Translation Layers +# +CONFIG_MTD_CHAR=y +CONFIG_MTD_BLKDEVS=y +CONFIG_MTD_BLOCK=y +# CONFIG_FTL is not set +# CONFIG_NFTL is not set +# CONFIG_INFTL is not set +# CONFIG_RFD_FTL is not set +# CONFIG_SSFDC is not set +# CONFIG_MTD_OOPS is not set + +# +# RAM/ROM/Flash chip drivers +# +CONFIG_MTD_CFI=y +CONFIG_MTD_JEDECPROBE=y +CONFIG_MTD_GEN_PROBE=y +# CONFIG_MTD_CFI_ADV_OPTIONS is not set +CONFIG_MTD_MAP_BANK_WIDTH_1=y +CONFIG_MTD_MAP_BANK_WIDTH_2=y +CONFIG_MTD_MAP_BANK_WIDTH_4=y +# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set +CONFIG_MTD_CFI_I1=y +CONFIG_MTD_CFI_I2=y +# CONFIG_MTD_CFI_I4 is not set +# CONFIG_MTD_CFI_I8 is not set +CONFIG_MTD_CFI_INTELEXT=y +CONFIG_MTD_CFI_AMDSTD=y +CONFIG_MTD_CFI_STAA=y +CONFIG_MTD_CFI_UTIL=y +CONFIG_MTD_RAM=y +CONFIG_MTD_ROM=y +CONFIG_MTD_ABSENT=y + +# +# Mapping drivers for chip access +# +CONFIG_MTD_COMPLEX_MAPPINGS=y +CONFIG_MTD_PHYSMAP=y +CONFIG_MTD_PHYSMAP_START=0x10000000 +CONFIG_MTD_PHYSMAP_LEN=0x400000 +CONFIG_MTD_PHYSMAP_BANKWIDTH=2 +# CONFIG_MTD_ARM_INTEGRATOR is not set +# CONFIG_MTD_IMPA7 is not set +# CONFIG_MTD_PLATRAM is not set + +# +# Self-contained MTD device drivers +# +CONFIG_MTD_DATAFLASH=y +# CONFIG_MTD_DATAFLASH_WRITE_VERIFY is not set +# CONFIG_MTD_DATAFLASH_OTP is not set +# CONFIG_MTD_M25P80 is not set +# CONFIG_MTD_SLRAM is not set +# CONFIG_MTD_PHRAM is not set +# CONFIG_MTD_MTDRAM is not set +# CONFIG_MTD_BLOCK2MTD is not set + +# +# Disk-On-Chip Device Drivers +# +# CONFIG_MTD_DOC2000 is not set +# CONFIG_MTD_DOC2001 is not set +# CONFIG_MTD_DOC2001PLUS is not set +CONFIG_MTD_NAND=y +CONFIG_MTD_NAND_VERIFY_WRITE=y +# CONFIG_MTD_NAND_ECC_SMC is not set +# CONFIG_MTD_NAND_MUSEUM_IDS is not set +# CONFIG_MTD_NAND_GPIO is not set +CONFIG_MTD_NAND_IDS=y +# CONFIG_MTD_NAND_DISKONCHIP is not set +CONFIG_MTD_NAND_ATMEL=y +# CONFIG_MTD_NAND_ATMEL_ECC_HW is not set +CONFIG_MTD_NAND_ATMEL_ECC_SOFT=y +# CONFIG_MTD_NAND_ATMEL_ECC_NONE is not set +# CONFIG_MTD_NAND_NANDSIM is not set +# CONFIG_MTD_NAND_PLATFORM is not set +# CONFIG_MTD_ALAUDA is not set +# CONFIG_MTD_ONENAND is not set + +# +# UBI - Unsorted block images +# +# CONFIG_MTD_UBI is not set +# CONFIG_PARPORT is not set +CONFIG_BLK_DEV=y +# CONFIG_BLK_DEV_COW_COMMON is not set +CONFIG_BLK_DEV_LOOP=y +# CONFIG_BLK_DEV_CRYPTOLOOP is not set +# CONFIG_BLK_DEV_NBD is not set +# CONFIG_BLK_DEV_UB is not set +CONFIG_BLK_DEV_RAM=y +CONFIG_BLK_DEV_RAM_COUNT=16 +CONFIG_BLK_DEV_RAM_SIZE=8192 +# CONFIG_BLK_DEV_XIP is not set +# CONFIG_CDROM_PKTCDVD is not set +# CONFIG_ATA_OVER_ETH is not set +CONFIG_MISC_DEVICES=y +CONFIG_ATMEL_PWM=y +# CONFIG_ATMEL_TCLIB is not set +# CONFIG_EEPROM_93CX6 is not set +CONFIG_ATMEL_SSC=y +# CONFIG_ENCLOSURE_SERVICES is not set +# CONFIG_C2PORT is not set +CONFIG_HAVE_IDE=y +CONFIG_IDE=y + +# +# Please see Documentation/ide/ide.txt for help/info on IDE drives +# +# CONFIG_BLK_DEV_IDE_SATA is not set +CONFIG_IDE_GD=y +CONFIG_IDE_GD_ATA=y +# CONFIG_IDE_GD_ATAPI is not set +CONFIG_BLK_DEV_IDECS=y +# CONFIG_BLK_DEV_IDECD is not set +# CONFIG_BLK_DEV_IDETAPE is not set +# CONFIG_BLK_DEV_IDESCSI is not set +# CONFIG_IDE_TASK_IOCTL is not set +CONFIG_IDE_PROC_FS=y + +# +# IDE chipset support/bugfixes +# +# CONFIG_BLK_DEV_PLATFORM is not set +# CONFIG_BLK_DEV_IDEDMA is not set + +# +# SCSI device support +# +# CONFIG_RAID_ATTRS is not set +CONFIG_SCSI=y +CONFIG_SCSI_DMA=y +# CONFIG_SCSI_TGT is not set +# CONFIG_SCSI_NETLINK is not set +CONFIG_SCSI_PROC_FS=y + +# +# SCSI support type (disk, tape, CD-ROM) +# +CONFIG_BLK_DEV_SD=y +# CONFIG_CHR_DEV_ST is not set +# CONFIG_CHR_DEV_OSST is not set +CONFIG_BLK_DEV_SR=y +# CONFIG_BLK_DEV_SR_VENDOR is not set +# CONFIG_CHR_DEV_SG is not set +# CONFIG_CHR_DEV_SCH is not set + +# +# Some SCSI devices (e.g. CD jukebox) support multiple LUNs +# +CONFIG_SCSI_MULTI_LUN=y +# CONFIG_SCSI_CONSTANTS is not set +# CONFIG_SCSI_LOGGING is not set +# CONFIG_SCSI_SCAN_ASYNC is not set +CONFIG_SCSI_WAIT_SCAN=m + +# +# SCSI Transports +# +# CONFIG_SCSI_SPI_ATTRS is not set +# CONFIG_SCSI_FC_ATTRS is not set +# CONFIG_SCSI_ISCSI_ATTRS is not set +# CONFIG_SCSI_SAS_LIBSAS is not set +# CONFIG_SCSI_SRP_ATTRS is not set +CONFIG_SCSI_LOWLEVEL=y +# CONFIG_ISCSI_TCP is not set +# CONFIG_SCSI_DEBUG is not set +# CONFIG_SCSI_LOWLEVEL_PCMCIA is not set +# CONFIG_SCSI_DH is not set +# CONFIG_ATA is not set +# CONFIG_MD is not set +CONFIG_NETDEVICES=y +# CONFIG_DUMMY is not set +# CONFIG_BONDING is not set +# CONFIG_MACVLAN is not set +# CONFIG_EQUALIZER is not set +# CONFIG_TUN is not set +# CONFIG_VETH is not set +CONFIG_PHYLIB=y + +# +# MII PHY device drivers +# +# CONFIG_MARVELL_PHY is not set +# CONFIG_DAVICOM_PHY is not set +# CONFIG_QSEMI_PHY is not set +# CONFIG_LXT_PHY is not set +# CONFIG_CICADA_PHY is not set +# CONFIG_VITESSE_PHY is not set +# CONFIG_SMSC_PHY is not set +# CONFIG_BROADCOM_PHY is not set +# CONFIG_ICPLUS_PHY is not set +# CONFIG_REALTEK_PHY is not set +# CONFIG_FIXED_PHY is not set +# CONFIG_MDIO_BITBANG is not set +CONFIG_NET_ETHERNET=y +CONFIG_MII=y +CONFIG_MACB=y +# CONFIG_AX88796 is not set +# CONFIG_SMC91X is not set +# CONFIG_DM9000 is not set +# CONFIG_ENC28J60 is not set +# CONFIG_SMC911X is not set +# CONFIG_IBM_NEW_EMAC_ZMII is not set +# CONFIG_IBM_NEW_EMAC_RGMII is not set +# CONFIG_IBM_NEW_EMAC_TAH is not set +# CONFIG_IBM_NEW_EMAC_EMAC4 is not set +# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set +# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set +# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set +# CONFIG_B44 is not set +# CONFIG_NETDEV_1000 is not set +# CONFIG_NETDEV_10000 is not set + +# +# Wireless LAN +# +# CONFIG_WLAN_PRE80211 is not set +# CONFIG_WLAN_80211 is not set +# CONFIG_IWLWIFI_LEDS is not set + +# +# USB Network Adapters +# +# CONFIG_USB_CATC is not set +# CONFIG_USB_KAWETH is not set +# CONFIG_USB_PEGASUS is not set +# CONFIG_USB_RTL8150 is not set +# CONFIG_USB_USBNET is not set +# CONFIG_NET_PCMCIA is not set +# CONFIG_WAN is not set +# CONFIG_PPP is not set +# CONFIG_SLIP is not set +# CONFIG_NETCONSOLE is not set +# CONFIG_NETPOLL is not set +# CONFIG_NET_POLL_CONTROLLER is not set +# CONFIG_ISDN is not set + +# +# Input device support +# +CONFIG_INPUT=y +# CONFIG_INPUT_FF_MEMLESS is not set +# CONFIG_INPUT_POLLDEV is not set + +# +# Userland interfaces +# +CONFIG_INPUT_MOUSEDEV=y +# CONFIG_INPUT_MOUSEDEV_PSAUX is not set +CONFIG_INPUT_MOUSEDEV_SCREEN_X=320 +CONFIG_INPUT_MOUSEDEV_SCREEN_Y=240 +# CONFIG_INPUT_JOYDEV is not set +CONFIG_INPUT_EVDEV=y +# CONFIG_INPUT_EVBUG is not set + +# +# Input Device Drivers +# +CONFIG_INPUT_KEYBOARD=y +# CONFIG_KEYBOARD_ATKBD is not set +# CONFIG_KEYBOARD_SUNKBD is not set +# CONFIG_KEYBOARD_LKKBD is not set +# CONFIG_KEYBOARD_XTKBD is not set +# CONFIG_KEYBOARD_NEWTON is not set +# CONFIG_KEYBOARD_STOWAWAY is not set +CONFIG_KEYBOARD_GPIO=y +# CONFIG_INPUT_MOUSE is not set +# CONFIG_INPUT_JOYSTICK is not set +# CONFIG_INPUT_TABLET is not set +CONFIG_INPUT_TOUCHSCREEN=y +CONFIG_TOUCHSCREEN_ADS7846=y +# CONFIG_TOUCHSCREEN_FUJITSU is not set +# CONFIG_TOUCHSCREEN_GUNZE is not set +# CONFIG_TOUCHSCREEN_ELO is not set +# CONFIG_TOUCHSCREEN_MTOUCH is not set +# CONFIG_TOUCHSCREEN_INEXIO is not set +# CONFIG_TOUCHSCREEN_MK712 is not set +# CONFIG_TOUCHSCREEN_PENMOUNT is not set +# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set +# CONFIG_TOUCHSCREEN_TOUCHWIN is not set +# CONFIG_TOUCHSCREEN_WM97XX is not set +# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set +# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set +# CONFIG_INPUT_MISC is not set + +# +# Hardware I/O ports +# +# CONFIG_SERIO is not set +# CONFIG_GAMEPORT is not set + +# +# Character devices +# +CONFIG_VT=y +CONFIG_CONSOLE_TRANSLATIONS=y +CONFIG_VT_CONSOLE=y +CONFIG_HW_CONSOLE=y +# CONFIG_VT_HW_CONSOLE_BINDING is not set +CONFIG_DEVKMEM=y +# CONFIG_SERIAL_NONSTANDARD is not set + +# +# Serial drivers +# +# CONFIG_SERIAL_8250 is not set + +# +# Non-8250 serial port support +# +CONFIG_SERIAL_ATMEL=y +CONFIG_SERIAL_ATMEL_CONSOLE=y +CONFIG_SERIAL_ATMEL_PDC=y +# CONFIG_SERIAL_ATMEL_TTYAT is not set +CONFIG_SERIAL_CORE=y +CONFIG_SERIAL_CORE_CONSOLE=y +CONFIG_UNIX98_PTYS=y +CONFIG_LEGACY_PTYS=y +CONFIG_LEGACY_PTY_COUNT=256 +# CONFIG_IPMI_HANDLER is not set +CONFIG_HW_RANDOM=y +# CONFIG_NVRAM is not set +# CONFIG_R3964 is not set + +# +# PCMCIA character devices +# +# CONFIG_SYNCLINK_CS is not set +# CONFIG_CARDMAN_4000 is not set +# CONFIG_CARDMAN_4040 is not set +# CONFIG_IPWIRELESS is not set +# CONFIG_RAW_DRIVER is not set +# CONFIG_TCG_TPM is not set +# CONFIG_I2C is not set +CONFIG_SPI=y +# CONFIG_SPI_DEBUG is not set +CONFIG_SPI_MASTER=y + +# +# SPI Master Controller Drivers +# +CONFIG_SPI_ATMEL=y +# CONFIG_SPI_BITBANG is not set + +# +# SPI Protocol Masters +# +# CONFIG_SPI_AT25 is not set +# CONFIG_SPI_SPIDEV is not set +# CONFIG_SPI_TLE62X0 is not set +CONFIG_W1=y + +# +# 1-wire Bus Masters +# +# CONFIG_W1_MASTER_DS2490 is not set +# CONFIG_W1_MASTER_DS1WM is not set +CONFIG_W1_MASTER_GPIO=y + +# +# 1-wire Slaves +# +# CONFIG_W1_SLAVE_THERM is not set +CONFIG_W1_SLAVE_SMEM=y +# CONFIG_W1_SLAVE_DS2433 is not set +# CONFIG_W1_SLAVE_DS2760 is not set +# CONFIG_W1_SLAVE_BQ27000 is not set +# CONFIG_POWER_SUPPLY is not set +# CONFIG_HWMON is not set +# CONFIG_THERMAL is not set +# CONFIG_THERMAL_HWMON is not set +CONFIG_WATCHDOG=y +CONFIG_WATCHDOG_NOWAYOUT=y + +# +# Watchdog Device Drivers +# +# CONFIG_SOFT_WATCHDOG is not set +CONFIG_AT91SAM9X_WATCHDOG=y + +# +# USB-based Watchdog Cards +# +# CONFIG_USBPCWATCHDOG is not set +CONFIG_SSB_POSSIBLE=y + +# +# Sonics Silicon Backplane +# +# CONFIG_SSB is not set + +# +# Multifunction device drivers +# +# CONFIG_MFD_CORE is not set +# CONFIG_MFD_SM501 is not set +# CONFIG_HTC_PASIC3 is not set +# CONFIG_MFD_TMIO is not set +# CONFIG_MFD_T7L66XB is not set +# CONFIG_MFD_TC6387XB is not set + +# +# Multimedia devices +# + +# +# Multimedia core support +# +# CONFIG_VIDEO_DEV is not set +# CONFIG_DVB_CORE is not set +# CONFIG_VIDEO_MEDIA is not set + +# +# Multimedia drivers +# +# CONFIG_DAB is not set + +# +# Graphics support +# +# CONFIG_VGASTATE is not set +# CONFIG_VIDEO_OUTPUT_CONTROL is not set +CONFIG_FB=y +# CONFIG_FIRMWARE_EDID is not set +# CONFIG_FB_DDC is not set +# CONFIG_FB_BOOT_VESA_SUPPORT is not set +CONFIG_FB_CFB_FILLRECT=y +CONFIG_FB_CFB_COPYAREA=y +CONFIG_FB_CFB_IMAGEBLIT=y +# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set +# CONFIG_FB_SYS_FILLRECT is not set +# CONFIG_FB_SYS_COPYAREA is not set +# CONFIG_FB_SYS_IMAGEBLIT is not set +# CONFIG_FB_FOREIGN_ENDIAN is not set +# CONFIG_FB_SYS_FOPS is not set +# CONFIG_FB_SVGALIB is not set +# CONFIG_FB_MACMODES is not set +# CONFIG_FB_BACKLIGHT is not set +# CONFIG_FB_MODE_HELPERS is not set +# CONFIG_FB_TILEBLITTING is not set + +# +# Frame buffer hardware drivers +# +# CONFIG_FB_S1D15605 is not set +# CONFIG_FB_S1D13XXX is not set +CONFIG_FB_ATMEL=y +# CONFIG_FB_VIRTUAL is not set +# CONFIG_FB_METRONOME is not set +# CONFIG_FB_MB862XX is not set +# CONFIG_BACKLIGHT_LCD_SUPPORT is not set + +# +# Display device support +# +# CONFIG_DISPLAY_SUPPORT is not set + +# +# Console display driver support +# +# CONFIG_VGA_CONSOLE is not set +CONFIG_DUMMY_CONSOLE=y +CONFIG_FRAMEBUFFER_CONSOLE=y +# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set +CONFIG_FRAMEBUFFER_CONSOLE_ROTATION=y +# CONFIG_FONTS is not set +CONFIG_FONT_8x8=y +CONFIG_FONT_8x16=y +CONFIG_LOGO=y +CONFIG_LOGO_LINUX_MONO=y +CONFIG_LOGO_LINUX_VGA16=y +CONFIG_LOGO_LINUX_CLUT224=y +CONFIG_SOUND=y +CONFIG_SOUND_OSS_CORE=y +CONFIG_SND=y +CONFIG_SND_TIMER=y +CONFIG_SND_PCM=y +# CONFIG_SND_SEQUENCER is not set +CONFIG_SND_OSSEMUL=y +CONFIG_SND_MIXER_OSS=y +CONFIG_SND_PCM_OSS=y +CONFIG_SND_PCM_OSS_PLUGINS=y +# CONFIG_SND_DYNAMIC_MINORS is not set +CONFIG_SND_SUPPORT_OLD_API=y +CONFIG_SND_VERBOSE_PROCFS=y +# CONFIG_SND_VERBOSE_PRINTK is not set +# CONFIG_SND_DEBUG is not set +CONFIG_SND_VMASTER=y +CONFIG_SND_AC97_CODEC=y +CONFIG_SND_DRIVERS=y +# CONFIG_SND_DUMMY is not set +# CONFIG_SND_MTPAV is not set +# CONFIG_SND_SERIAL_U16550 is not set +# CONFIG_SND_MPU401 is not set +# CONFIG_SND_AC97_POWER_SAVE is not set +CONFIG_SND_ARM=y +CONFIG_SND_AT91_AC97=y +CONFIG_SND_SPI=y +# CONFIG_SND_AT73C213 is not set +CONFIG_SND_USB=y +# CONFIG_SND_USB_AUDIO is not set +# CONFIG_SND_USB_CAIAQ is not set +CONFIG_SND_PCMCIA=y +# CONFIG_SND_VXPOCKET is not set +# CONFIG_SND_PDAUDIOCF is not set +# CONFIG_SND_SOC is not set +# CONFIG_SOUND_PRIME is not set +CONFIG_AC97_BUS=y +CONFIG_HID_SUPPORT=y +CONFIG_HID=y +# CONFIG_HID_DEBUG is not set +# CONFIG_HIDRAW is not set + +# +# USB Input Devices +# +CONFIG_USB_HID=y +# CONFIG_HID_PID is not set +# CONFIG_USB_HIDDEV is not set + +# +# Special HID drivers +# +CONFIG_HID_COMPAT=y +CONFIG_HID_A4TECH=y +CONFIG_HID_APPLE=y +CONFIG_HID_BELKIN=y +CONFIG_HID_BRIGHT=y +CONFIG_HID_CHERRY=y +CONFIG_HID_CHICONY=y +CONFIG_HID_CYPRESS=y +CONFIG_HID_DELL=y +CONFIG_HID_EZKEY=y +CONFIG_HID_GYRATION=y +CONFIG_HID_LOGITECH=y +# CONFIG_LOGITECH_FF is not set +# CONFIG_LOGIRUMBLEPAD2_FF is not set +CONFIG_HID_MICROSOFT=y +CONFIG_HID_MONTEREY=y +CONFIG_HID_PANTHERLORD=y +# CONFIG_PANTHERLORD_FF is not set +CONFIG_HID_PETALYNX=y +CONFIG_HID_SAMSUNG=y +CONFIG_HID_SONY=y +CONFIG_HID_SUNPLUS=y +# CONFIG_THRUSTMASTER_FF is not set +# CONFIG_ZEROPLUS_FF is not set +CONFIG_USB_SUPPORT=y +CONFIG_USB_ARCH_HAS_HCD=y +CONFIG_USB_ARCH_HAS_OHCI=y +# CONFIG_USB_ARCH_HAS_EHCI is not set +CONFIG_USB=y +# CONFIG_USB_DEBUG is not set +# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set + +# +# Miscellaneous USB options +# +CONFIG_USB_DEVICEFS=y +CONFIG_USB_DEVICE_CLASS=y +# CONFIG_USB_DYNAMIC_MINORS is not set +# CONFIG_USB_OTG is not set +CONFIG_USB_MON=y +# CONFIG_USB_WUSB is not set +# CONFIG_USB_WUSB_CBAF is not set + +# +# USB Host Controller Drivers +# +# CONFIG_USB_C67X00_HCD is not set +# CONFIG_USB_ISP116X_HCD is not set +CONFIG_USB_OHCI_HCD=y +# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set +# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set +CONFIG_USB_OHCI_LITTLE_ENDIAN=y +# CONFIG_USB_SL811_HCD is not set +# CONFIG_USB_R8A66597_HCD is not set +# CONFIG_USB_HWA_HCD is not set +# CONFIG_USB_MUSB_HDRC is not set +# CONFIG_USB_GADGET_MUSB_HDRC is not set + +# +# USB Device Class drivers +# +# CONFIG_USB_ACM is not set +# CONFIG_USB_PRINTER is not set +# CONFIG_USB_WDM is not set +# CONFIG_USB_TMC is not set + +# +# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may also be needed; +# + +# +# see USB_STORAGE Help for more information +# +CONFIG_USB_STORAGE=y +# CONFIG_USB_STORAGE_DEBUG is not set +# CONFIG_USB_STORAGE_DATAFAB is not set +# CONFIG_USB_STORAGE_FREECOM is not set +# CONFIG_USB_STORAGE_ISD200 is not set +# CONFIG_USB_STORAGE_DPCM is not set +# CONFIG_USB_STORAGE_USBAT is not set +# CONFIG_USB_STORAGE_SDDR09 is not set +# CONFIG_USB_STORAGE_SDDR55 is not set +# CONFIG_USB_STORAGE_JUMPSHOT is not set +# CONFIG_USB_STORAGE_ALAUDA is not set +# CONFIG_USB_STORAGE_ONETOUCH is not set +# CONFIG_USB_STORAGE_KARMA is not set +# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set +CONFIG_USB_LIBUSUAL=y + +# +# USB Imaging devices +# +# CONFIG_USB_MDC800 is not set +# CONFIG_USB_MICROTEK is not set + +# +# USB port drivers +# +# CONFIG_USB_SERIAL is not set + +# +# USB Miscellaneous drivers +# +# CONFIG_USB_EMI62 is not set +# CONFIG_USB_EMI26 is not set +# CONFIG_USB_ADUTUX is not set +# CONFIG_USB_SEVSEG is not set +# CONFIG_USB_RIO500 is not set +# CONFIG_USB_LEGOTOWER is not set +# CONFIG_USB_LCD is not set +# CONFIG_USB_BERRY_CHARGE is not set +# CONFIG_USB_LED is not set +# CONFIG_USB_CYPRESS_CY7C63 is not set +# CONFIG_USB_CYTHERM is not set +# CONFIG_USB_PHIDGET is not set +# CONFIG_USB_IDMOUSE is not set +# CONFIG_USB_FTDI_ELAN is not set +# CONFIG_USB_APPLEDISPLAY is not set +# CONFIG_USB_LD is not set +# CONFIG_USB_TRANCEVIBRATOR is not set +# CONFIG_USB_IOWARRIOR is not set +# CONFIG_USB_TEST is not set +# CONFIG_USB_ISIGHTFW is not set +# CONFIG_USB_VST is not set +CONFIG_USB_GADGET=y +# CONFIG_USB_GADGET_DEBUG is not set +# CONFIG_USB_GADGET_DEBUG_FILES is not set +CONFIG_USB_GADGET_VBUS_DRAW=2 +CONFIG_USB_GADGET_SELECTED=y +CONFIG_USB_GADGET_AT91=y +CONFIG_USB_AT91=y +# CONFIG_USB_GADGET_ATMEL_USBA is not set +# CONFIG_USB_GADGET_FSL_USB2 is not set +# CONFIG_USB_GADGET_LH7A40X is not set +# CONFIG_USB_GADGET_OMAP is not set +# CONFIG_USB_GADGET_PXA25X is not set +# CONFIG_USB_GADGET_PXA27X is not set +# CONFIG_USB_GADGET_S3C2410 is not set +# CONFIG_USB_GADGET_M66592 is not set +# CONFIG_USB_GADGET_AMD5536UDC is not set +# CONFIG_USB_GADGET_FSL_QE is not set +# CONFIG_USB_GADGET_NET2280 is not set +# CONFIG_USB_GADGET_GOKU is not set +# CONFIG_USB_GADGET_DUMMY_HCD is not set +# CONFIG_USB_GADGET_DUALSPEED is not set +CONFIG_USB_ZERO=m +CONFIG_USB_ETH=m +CONFIG_USB_ETH_RNDIS=y +CONFIG_USB_GADGETFS=m +CONFIG_USB_FILE_STORAGE=m +# CONFIG_USB_FILE_STORAGE_TEST is not set +CONFIG_USB_G_SERIAL=m +# CONFIG_USB_MIDI_GADGET is not set +# CONFIG_USB_G_PRINTER is not set +CONFIG_USB_CDC_COMPOSITE=m +CONFIG_MMC=y +# CONFIG_MMC_DEBUG is not set +# CONFIG_MMC_UNSAFE_RESUME is not set + +# +# MMC/SD/SDIO Card Drivers +# +CONFIG_MMC_BLOCK=y +CONFIG_MMC_BLOCK_BOUNCE=y +# CONFIG_SDIO_UART is not set +# CONFIG_MMC_TEST is not set + +# +# MMC/SD/SDIO Host Controller Drivers +# +# CONFIG_MMC_SDHCI is not set +CONFIG_MMC_AT91=y +# CONFIG_MMC_SPI is not set +# CONFIG_MEMSTICK is not set +# CONFIG_ACCESSIBILITY is not set +CONFIG_NEW_LEDS=y +CONFIG_LEDS_CLASS=y + +# +# LED drivers +# +CONFIG_LEDS_ATMEL_PWM=y +CONFIG_LEDS_GPIO=y + +# +# LED Triggers +# +CONFIG_LEDS_TRIGGERS=y +CONFIG_LEDS_TRIGGER_TIMER=y +CONFIG_LEDS_TRIGGER_IDE_DISK=y +CONFIG_LEDS_TRIGGER_HEARTBEAT=y +CONFIG_LEDS_TRIGGER_BACKLIGHT=y +CONFIG_LEDS_TRIGGER_DEFAULT_ON=y +CONFIG_RTC_LIB=y +CONFIG_RTC_CLASS=y +CONFIG_RTC_HCTOSYS=y +CONFIG_RTC_HCTOSYS_DEVICE="rtc0" +# CONFIG_RTC_DEBUG is not set + +# +# RTC interfaces +# +CONFIG_RTC_INTF_SYSFS=y +CONFIG_RTC_INTF_PROC=y +CONFIG_RTC_INTF_DEV=y +# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set +# CONFIG_RTC_DRV_TEST is not set + +# +# SPI RTC drivers +# +# CONFIG_RTC_DRV_M41T94 is not set +# CONFIG_RTC_DRV_DS1305 is not set +# CONFIG_RTC_DRV_DS1390 is not set +# CONFIG_RTC_DRV_MAX6902 is not set +# CONFIG_RTC_DRV_R9701 is not set +# CONFIG_RTC_DRV_RS5C348 is not set +# CONFIG_RTC_DRV_DS3234 is not set + +# +# Platform RTC drivers +# +# CONFIG_RTC_DRV_CMOS is not set +# CONFIG_RTC_DRV_DS1286 is not set +# CONFIG_RTC_DRV_DS1511 is not set +# CONFIG_RTC_DRV_DS1553 is not set +# CONFIG_RTC_DRV_DS1742 is not set +# CONFIG_RTC_DRV_STK17TA8 is not set +# CONFIG_RTC_DRV_M48T86 is not set +# CONFIG_RTC_DRV_M48T35 is not set +# CONFIG_RTC_DRV_M48T59 is not set +# CONFIG_RTC_DRV_BQ4802 is not set +# CONFIG_RTC_DRV_V3020 is not set + +# +# on-CPU RTC drivers +# +CONFIG_RTC_DRV_AT91SAM9=y +CONFIG_RTC_DRV_AT91SAM9_RTT=0 +CONFIG_RTC_DRV_AT91SAM9_GPBR=0 +# CONFIG_DMADEVICES is not set +# CONFIG_REGULATOR is not set +# CONFIG_UIO is not set + +# +# File systems +# +# CONFIG_EXT2_FS is not set +# CONFIG_EXT3_FS is not set +# CONFIG_EXT4_FS is not set +# CONFIG_REISERFS_FS is not set +# CONFIG_JFS_FS is not set +# CONFIG_FS_POSIX_ACL is not set +CONFIG_FILE_LOCKING=y +# CONFIG_XFS_FS is not set +# CONFIG_OCFS2_FS is not set +CONFIG_DNOTIFY=y +CONFIG_INOTIFY=y +CONFIG_INOTIFY_USER=y +# CONFIG_QUOTA is not set +# CONFIG_AUTOFS_FS is not set +# CONFIG_AUTOFS4_FS is not set +# CONFIG_FUSE_FS is not set + +# +# CD-ROM/DVD Filesystems +# +# CONFIG_ISO9660_FS is not set +# CONFIG_UDF_FS is not set + +# +# DOS/FAT/NT Filesystems +# +CONFIG_FAT_FS=y +# CONFIG_MSDOS_FS is not set +CONFIG_VFAT_FS=y +CONFIG_FAT_DEFAULT_CODEPAGE=437 +CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" +# CONFIG_NTFS_FS is not set + +# +# Pseudo filesystems +# +CONFIG_PROC_FS=y +CONFIG_PROC_SYSCTL=y +CONFIG_PROC_PAGE_MONITOR=y +CONFIG_SYSFS=y +CONFIG_TMPFS=y +# CONFIG_TMPFS_POSIX_ACL is not set +# CONFIG_HUGETLB_PAGE is not set +# CONFIG_CONFIGFS_FS is not set + +# +# Miscellaneous filesystems +# +# CONFIG_ADFS_FS is not set +# CONFIG_AFFS_FS is not set +# CONFIG_HFS_FS is not set +# CONFIG_HFSPLUS_FS is not set +# CONFIG_BEFS_FS is not set +# CONFIG_BFS_FS is not set +# CONFIG_EFS_FS is not set +CONFIG_JFFS2_FS=y +CONFIG_JFFS2_FS_DEBUG=0 +CONFIG_JFFS2_FS_WRITEBUFFER=y +# CONFIG_JFFS2_FS_WBUF_VERIFY is not set +# CONFIG_JFFS2_SUMMARY is not set +# CONFIG_JFFS2_FS_XATTR is not set +# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set +CONFIG_JFFS2_ZLIB=y +# CONFIG_JFFS2_LZO is not set +CONFIG_JFFS2_RTIME=y +# CONFIG_JFFS2_RUBIN is not set +CONFIG_CRAMFS=y +# CONFIG_VXFS_FS is not set +# CONFIG_MINIX_FS is not set +# CONFIG_OMFS_FS is not set +# CONFIG_HPFS_FS is not set +# CONFIG_QNX4FS_FS is not set +# CONFIG_ROMFS_FS is not set +# CONFIG_SYSV_FS is not set +# CONFIG_UFS_FS is not set +CONFIG_NETWORK_FILESYSTEMS=y +CONFIG_NFS_FS=y +# CONFIG_NFS_V3 is not set +# CONFIG_NFS_V4 is not set +CONFIG_ROOT_NFS=y +# CONFIG_NFSD is not set +CONFIG_LOCKD=y +CONFIG_NFS_COMMON=y +CONFIG_SUNRPC=y +# CONFIG_SUNRPC_REGISTER_V4 is not set +# CONFIG_RPCSEC_GSS_KRB5 is not set +# CONFIG_RPCSEC_GSS_SPKM3 is not set +# CONFIG_SMB_FS is not set +# CONFIG_CIFS is not set +# CONFIG_NCP_FS is not set +# CONFIG_CODA_FS is not set +# CONFIG_AFS_FS is not set + +# +# Partition Types +# +# CONFIG_PARTITION_ADVANCED is not set +CONFIG_MSDOS_PARTITION=y +CONFIG_NLS=y +CONFIG_NLS_DEFAULT="iso8859-1" +CONFIG_NLS_CODEPAGE_437=y +# CONFIG_NLS_CODEPAGE_737 is not set +# CONFIG_NLS_CODEPAGE_775 is not set +CONFIG_NLS_CODEPAGE_850=y +# CONFIG_NLS_CODEPAGE_852 is not set +# CONFIG_NLS_CODEPAGE_855 is not set +# CONFIG_NLS_CODEPAGE_857 is not set +# CONFIG_NLS_CODEPAGE_860 is not set +# CONFIG_NLS_CODEPAGE_861 is not set +# CONFIG_NLS_CODEPAGE_862 is not set +# CONFIG_NLS_CODEPAGE_863 is not set +# CONFIG_NLS_CODEPAGE_864 is not set +# CONFIG_NLS_CODEPAGE_865 is not set +# CONFIG_NLS_CODEPAGE_866 is not set +# CONFIG_NLS_CODEPAGE_869 is not set +# CONFIG_NLS_CODEPAGE_936 is not set +# CONFIG_NLS_CODEPAGE_950 is not set +# CONFIG_NLS_CODEPAGE_932 is not set +# CONFIG_NLS_CODEPAGE_949 is not set +# CONFIG_NLS_CODEPAGE_874 is not set +# CONFIG_NLS_ISO8859_8 is not set +# CONFIG_NLS_CODEPAGE_1250 is not set +# CONFIG_NLS_CODEPAGE_1251 is not set +# CONFIG_NLS_ASCII is not set +CONFIG_NLS_ISO8859_1=y +# CONFIG_NLS_ISO8859_2 is not set +# CONFIG_NLS_ISO8859_3 is not set +# CONFIG_NLS_ISO8859_4 is not set +# CONFIG_NLS_ISO8859_5 is not set +# CONFIG_NLS_ISO8859_6 is not set +# CONFIG_NLS_ISO8859_7 is not set +# CONFIG_NLS_ISO8859_9 is not set +# CONFIG_NLS_ISO8859_13 is not set +# CONFIG_NLS_ISO8859_14 is not set +# CONFIG_NLS_ISO8859_15 is not set +# CONFIG_NLS_KOI8_R is not set +# CONFIG_NLS_KOI8_U is not set +# CONFIG_NLS_UTF8 is not set +# CONFIG_DLM is not set + +# +# Kernel hacking +# +# CONFIG_PRINTK_TIME is not set +CONFIG_ENABLE_WARN_DEPRECATED=y +CONFIG_ENABLE_MUST_CHECK=y +CONFIG_FRAME_WARN=1024 +# CONFIG_MAGIC_SYSRQ is not set +# CONFIG_UNUSED_SYMBOLS is not set +# CONFIG_DEBUG_FS is not set +# CONFIG_HEADERS_CHECK is not set +CONFIG_DEBUG_KERNEL=y +# CONFIG_DEBUG_SHIRQ is not set +CONFIG_DETECT_SOFTLOCKUP=y +# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set +CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0 +CONFIG_SCHED_DEBUG=y +# CONFIG_SCHEDSTATS is not set +# CONFIG_TIMER_STATS is not set +# CONFIG_DEBUG_OBJECTS is not set +# CONFIG_DEBUG_SLAB is not set +# CONFIG_DEBUG_RT_MUTEXES is not set +# CONFIG_RT_MUTEX_TESTER is not set +# CONFIG_DEBUG_SPINLOCK is not set +# CONFIG_DEBUG_MUTEXES is not set +# CONFIG_DEBUG_LOCK_ALLOC is not set +# CONFIG_PROVE_LOCKING is not set +# CONFIG_LOCK_STAT is not set +# CONFIG_DEBUG_SPINLOCK_SLEEP is not set +# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set +# CONFIG_DEBUG_KOBJECT is not set +CONFIG_DEBUG_BUGVERBOSE=y +# CONFIG_DEBUG_INFO is not set +# CONFIG_DEBUG_VM is not set +# CONFIG_DEBUG_WRITECOUNT is not set +CONFIG_DEBUG_MEMORY_INIT=y +# CONFIG_DEBUG_LIST is not set +# CONFIG_DEBUG_SG is not set +CONFIG_FRAME_POINTER=y +# CONFIG_BOOT_PRINTK_DELAY is not set +# CONFIG_RCU_TORTURE_TEST is not set +# CONFIG_RCU_CPU_STALL_DETECTOR is not set +# CONFIG_BACKTRACE_SELF_TEST is not set +# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set +# CONFIG_FAULT_INJECTION is not set +# CONFIG_LATENCYTOP is not set +# CONFIG_SYSCTL_SYSCALL_CHECK is not set +CONFIG_HAVE_FUNCTION_TRACER=y + +# +# Tracers +# +# CONFIG_FUNCTION_TRACER is not set +# CONFIG_IRQSOFF_TRACER is not set +# CONFIG_SCHED_TRACER is not set +# CONFIG_CONTEXT_SWITCH_TRACER is not set +# CONFIG_BOOT_TRACER is not set +# CONFIG_STACK_TRACER is not set +# CONFIG_DYNAMIC_PRINTK_DEBUG is not set +# CONFIG_SAMPLES is not set +CONFIG_HAVE_ARCH_KGDB=y +# CONFIG_KGDB is not set +CONFIG_DEBUG_USER=y +# CONFIG_DEBUG_ERRORS is not set +# CONFIG_DEBUG_STACK_USAGE is not set +CONFIG_DEBUG_LL=y +# CONFIG_DEBUG_ICEDCC is not set + +# +# Security options +# +# CONFIG_KEYS is not set +# CONFIG_SECURITY is not set +# CONFIG_SECURITYFS is not set +# CONFIG_SECURITY_FILE_CAPABILITIES is not set +# CONFIG_CRYPTO is not set + +# +# Library routines +# +CONFIG_BITREVERSE=y +# CONFIG_CRC_CCITT is not set +# CONFIG_CRC16 is not set +# CONFIG_CRC_T10DIF is not set +# CONFIG_CRC_ITU_T is not set +CONFIG_CRC32=y +# CONFIG_CRC7 is not set +# CONFIG_LIBCRC32C is not set +CONFIG_ZLIB_INFLATE=y +CONFIG_ZLIB_DEFLATE=y +CONFIG_PLIST=y +CONFIG_HAS_IOMEM=y +CONFIG_HAS_IOPORT=y +CONFIG_HAS_DMA=y diff --git a/packages/linux/linux-2.6.28/ronetix-pm9263/linux-2.6.28-at91-ronetix-12012009.patch b/packages/linux/linux-2.6.28/ronetix-pm9263/linux-2.6.28-at91-ronetix-12012009.patch new file mode 100644 index 0000000000..fbd0c90a23 --- /dev/null +++ b/packages/linux/linux-2.6.28/ronetix-pm9263/linux-2.6.28-at91-ronetix-12012009.patch @@ -0,0 +1,1751 @@ +diff -urNp linux-2.6.28-at91/arch/arm/mach-at91/at91sam9263_devices.c.rej linux-2.6.28-at91-ronetix/arch/arm/mach-at91/at91sam9263_devices.c.rej +--- linux-2.6.28-at91/arch/arm/mach-at91/at91sam9263_devices.c.rej 1970-01-01 01:00:00.000000000 +0100 ++++ linux-2.6.28-at91-ronetix/arch/arm/mach-at91/at91sam9263_devices.c.rej 2009-01-12 16:00:42.000000000 +0100 +@@ -0,0 +1,17 @@ ++*************** ++*** 645,651 **** ++ if (data->reset_pin) ++ at91_set_gpio_output(data->reset_pin, 0); ++ ++- ac97_data = *ek_data; ++ platform_device_register(&at91sam9263_ac97_device); ++ } ++ #else ++--- 645,651 ---- ++ if (data->reset_pin) ++ at91_set_gpio_output(data->reset_pin, 0); ++ +++ ac97_data = *data; ++ platform_device_register(&at91sam9263_ac97_device); ++ } ++ #else +diff -urNp linux-2.6.28-at91/arch/arm/mach-at91/board-pm9263.c linux-2.6.28-at91-ronetix/arch/arm/mach-at91/board-pm9263.c +--- linux-2.6.28-at91/arch/arm/mach-at91/board-pm9263.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-2.6.28-at91-ronetix/arch/arm/mach-at91/board-pm9263.c 2009-01-12 16:00:42.000000000 +0100 +@@ -0,0 +1,528 @@ ++/* ++ * linux/arch/arm/mach-at91/board-pm9263.c ++ * ++ * Copyright (C) 2008 Ronetix ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA ++ */ ++ ++#include <linux/types.h> ++#include <linux/init.h> ++#include <linux/mm.h> ++#include <linux/module.h> ++#include <linux/platform_device.h> ++#include <linux/spi/spi.h> ++#include <linux/spi/ads7846.h> ++#include <linux/i2c/at24.h> ++#include <linux/fb.h> ++#include <linux/gpio_keys.h> ++#include <linux/input.h> ++#include <linux/leds.h> ++#include <linux/w1-gpio.h> ++ ++#include <video/atmel_lcdc.h> ++ ++#include <asm/setup.h> ++#include <asm/mach-types.h> ++#include <asm/irq.h> ++ ++#include <asm/mach/arch.h> ++#include <asm/mach/map.h> ++#include <asm/mach/irq.h> ++ ++#include <mach/hardware.h> ++#include <mach/board.h> ++#include <mach/gpio.h> ++#include <mach/at91sam9_smc.h> ++#include <mach/at91_shdwc.h> ++#include <mach/at91sam9263_matrix.h> ++ ++#include "sam9_smc.h" ++#include "generic.h" ++ ++ ++static void __init pm9263_map_io(void) ++{ ++ /* Initialize processor: 18.432 MHz crystal */ ++ at91sam9263_initialize(18432000); ++ ++ /* DGBU on ttyS0. (Rx & Tx only) */ ++ at91_register_uart(0, 0, 0); ++ ++ /* USART0 on ttyS1. (Rx, Tx, RTS, CTS) */ ++ at91_register_uart(AT91SAM9263_ID_US0, 1, ATMEL_UART_CTS | ATMEL_UART_RTS); ++ ++ /* set serial console to ttyS0 (ie, DBGU) */ ++ at91_set_serial_console(0); ++} ++ ++static void __init pm9263_init_irq(void) ++{ ++ at91sam9263_init_interrupts(NULL); ++} ++ ++ ++/* ++ * USB Host port ++ */ ++static struct at91_usbh_data __initdata pm9263_usbh_data = { ++ .ports = 2, ++ .vbus_pin = { 0, 0 }, ++}; ++ ++/* ++ * USB Device port ++ */ ++static struct at91_udc_data __initdata pm9263_udc_data = { ++ .vbus_pin = AT91_PIN_PA25, ++ .pullup_pin = 0, /* pull-up driven by UDC */ ++}; ++ ++ ++/* ++ * ADS7846 Touchscreen ++ */ ++#if defined(CONFIG_TOUCHSCREEN_ADS7846) || defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE) ++static int ads7843_pendown_state(void) ++{ ++ return !at91_get_gpio_value(AT91_PIN_PA15); /* Touchscreen PENIRQ */ ++} ++ ++static struct ads7846_platform_data ads_info = { ++ .model = 7843, ++ .x_min = 150, ++ .x_max = 3830, ++ .y_min = 190, ++ .y_max = 3830, ++ .vref_delay_usecs = 100, ++ .x_plate_ohms = 450, ++ .y_plate_ohms = 250, ++ .pressure_max = 15000, ++ .debounce_max = 1, ++ .debounce_rep = 0, ++ .debounce_tol = (~0), ++ .get_pendown_state = ads7843_pendown_state, ++}; ++ ++static void __init pm9263_add_device_ts(void) ++{ ++ at91_set_B_periph(AT91_PIN_PA15, 1); /* External IRQ1, with pullup */ ++ at91_set_gpio_input(AT91_PIN_PA31, 1); /* Touchscreen BUSY signal */ ++} ++#else ++static void __init pm9263_add_device_ts(void) {} ++#endif ++ ++/* ++ * SPI devices. ++ */ ++static struct spi_board_info pm9263_spi_devices[] = { ++#if defined(CONFIG_MTD_AT91_DATAFLASH_CARD) ++ { /* DataFlash card */ ++ .modalias = "mtd_dataflash", ++ .chip_select = 0, ++ .max_speed_hz = 15 * 1000 * 1000, ++ .bus_num = 0, ++ }, ++#endif ++#if defined(CONFIG_TOUCHSCREEN_ADS7846) || defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE) ++ { ++ .modalias = "ads7846", ++ .chip_select = 0, ++ .max_speed_hz = 125000 * 16, /* max sample rate * clocks per sample */ ++ .bus_num = 1, ++ .platform_data = &ads_info, ++ .irq = AT91SAM9263_ID_IRQ1, ++ }, ++#endif ++}; ++ ++ ++/* ++ * MCI (SD/MMC) ++ */ ++static struct at91_mmc_data __initdata pm9263_mmc_data = { ++ .wire4 = 1, ++ .det_pin = AT91_PIN_PA21, ++ .wp_pin = AT91_PIN_PA16, ++// .vcc_pin = ... not connected ++}; ++ ++ ++/* ++ * MACB Ethernet device ++ */ ++static struct at91_eth_data __initdata pm9263_macb_data = { ++ .phy_irq_pin = AT91_PIN_PE31, ++ .is_rmii = 1, ++}; ++ ++ ++/* ++ * NAND flash ++ */ ++static struct mtd_partition __initdata pm9263_nand_partition[] = { ++ { ++ .name = "Partition 1", ++ .offset = 0, ++ .size = MTDPART_SIZ_FULL, ++ }, ++}; ++ ++static struct mtd_partition * __init nand_partitions(int size, int *num_partitions) ++{ ++ *num_partitions = ARRAY_SIZE(pm9263_nand_partition); ++ return pm9263_nand_partition; ++} ++ ++static struct atmel_nand_data __initdata pm9263_nand_data = { ++ .ale = 21, ++ .cle = 22, ++// .det_pin = ... not connected ++ .rdy_pin = AT91_PIN_PB30, ++ .enable_pin = AT91_PIN_PD15, ++ .partition_info = nand_partitions, ++#if defined(CONFIG_MTD_NAND_ATMEL_BUSWIDTH_16) ++ .bus_width_16 = 1, ++#else ++ .bus_width_16 = 0, ++#endif ++}; ++ ++static struct sam9_smc_config __initdata pm9263_nand_smc_config = { ++ .ncs_read_setup = 0, ++ .nrd_setup = 1, ++ .ncs_write_setup = 0, ++ .nwe_setup = 1, ++ ++ .ncs_read_pulse = 3, ++ .nrd_pulse = 3, ++ .ncs_write_pulse = 3, ++ .nwe_pulse = 3, ++ ++ .read_cycle = 5, ++ .write_cycle = 5, ++ ++ .mode = AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE, ++ .tdf_cycles = 2, ++}; ++ ++static void __init pm9263_add_device_nand(void) ++{ ++ /* setup bus-width (8 or 16) */ ++ if (pm9263_nand_data.bus_width_16) ++ pm9263_nand_smc_config.mode |= AT91_SMC_DBW_16; ++ else ++ pm9263_nand_smc_config.mode |= AT91_SMC_DBW_8; ++ ++ /* configure chip-select 3 (NAND) */ ++ sam9_smc_configure(3, &pm9263_nand_smc_config); ++ ++ at91_add_device_nand(&pm9263_nand_data); ++} ++ ++ ++/* ++ * LCD Controller ++ */ ++#if defined(CONFIG_FB_ATMEL) || defined(CONFIG_FB_ATMEL_MODULE) ++static struct fb_videomode at91_tft_vga_modes[] = { ++ { ++ .name = "TX09D50VM1CCA @ 60", ++ .refresh = 60, ++ .xres = 240, .yres = 320, ++ .pixclock = KHZ2PICOS(4965), ++ ++ .left_margin = 1, .right_margin = 33, ++ .upper_margin = 1, .lower_margin = 0, ++ .hsync_len = 5, .vsync_len = 1, ++ ++ .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, ++ .vmode = FB_VMODE_NONINTERLACED, ++ }, ++}; ++ ++static struct fb_monspecs at91fb_default_monspecs = { ++ .manufacturer = "HIT", ++ .monitor = "TX09D70VM1CCA", ++ ++ .modedb = at91_tft_vga_modes, ++ .modedb_len = ARRAY_SIZE(at91_tft_vga_modes), ++ .hfmin = 15000, ++ .hfmax = 64000, ++ .vfmin = 50, ++ .vfmax = 150, ++}; ++ ++#define AT91SAM9263_DEFAULT_LCDCON2 (ATMEL_LCDC_MEMOR_LITTLE \ ++ | ATMEL_LCDC_DISTYPE_TFT \ ++ | ATMEL_LCDC_CLKMOD_ALWAYSACTIVE) ++ ++static void at91_lcdc_power_control(int on) ++{ ++ at91_set_gpio_value(AT91_PIN_PA22, on); ++} ++ ++/* Driver datas */ ++static struct atmel_lcdfb_info __initdata pm9263_lcdc_data = { ++ .lcdcon_is_backlight = true, ++ .default_bpp = 16, ++ .default_dmacon = ATMEL_LCDC_DMAEN, ++ .default_lcdcon2 = AT91SAM9263_DEFAULT_LCDCON2, ++ .default_monspecs = &at91fb_default_monspecs, ++ .atmel_lcdfb_power_control = at91_lcdc_power_control, ++ .guard_time = 1, ++}; ++ ++#else ++static struct atmel_lcdfb_info __initdata pm9263_lcdc_data; ++#endif ++ ++ ++/* ++ * GPIO Buttons ++ */ ++#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE) ++static struct gpio_keys_button pm9263_buttons[] = { ++ { /* SW3 */ ++ .code = BTN_LEFT, ++ .gpio = AT91_PIN_PC5, ++ .active_low = 1, ++ .desc = "SW3", ++ .wakeup = 1, ++ }, ++ { /* SW4 */ ++ .code = BTN_RIGHT, ++ .gpio = AT91_PIN_PC4, ++ .active_low = 1, ++ .desc = "SW4", ++ .wakeup = 1, ++ } ++}; ++ ++static struct gpio_keys_platform_data pm9263_button_data = { ++ .buttons = pm9263_buttons, ++ .nbuttons = ARRAY_SIZE(pm9263_buttons), ++}; ++ ++static struct platform_device pm9263_button_device = { ++ .name = "gpio-keys", ++ .id = -1, ++ .num_resources = 0, ++ .dev = { ++ .platform_data = &pm9263_button_data, ++ } ++}; ++ ++static void __init pm9263_add_device_buttons(void) ++{ ++ int i; ++ ++ for (i = 0; i < pm9263_button_data.nbuttons; i ++) { ++ at91_set_gpio_input(pm9263_buttons[i].gpio, 1); ++ at91_set_deglitch(pm9263_buttons[i].gpio, 1); ++ } ++ ++// platform_device_register(&pm9263_button_device); ++} ++#else ++static void __init pm9263_add_device_buttons(void) {} ++#endif ++ ++ ++/* ++ * AC97 ++ */ ++static struct atmel_ac97_data pm9263_ac97_data = { ++ .reset_pin = 0, ++}; ++ ++ ++/* ++ * LEDs ... these could all be PWM-driven, for variable brightness ++ */ ++static struct gpio_led pm9263_leds[] = { ++ { /* "right" led, green, userled2 (could be driven by pwm2) */ ++ .name = "led0", ++ .gpio = AT91_PIN_PB7, ++ .active_low = 1, ++ .default_trigger = "nand-disk", ++ }, ++ { /* "power" led, yellow (could be driven by pwm0) */ ++ .name = "led1", ++ .gpio = AT91_PIN_PB8, ++ .active_low = 1, ++ .default_trigger = "heartbeat", ++ } ++}; ++ ++#if defined(CONFIG_W1_MASTER_GPIO) || defined(CONFIG_W1_MASTER_GPIO_MODULE) ++struct w1_gpio_platform_data pm926x_w1_platdata = { ++ .pin = AT91_PIN_PB31, ++ .is_open_drain = 0, ++}; ++ ++static struct platform_device pm926x_w1_device = { ++ .name = "w1-gpio", ++ .id = 0, ++ .dev = { ++ .platform_data = &pm926x_w1_platdata, ++ }, ++}; ++#endif ++ ++#if defined(CONFIG_AT91_CF) || defined(CONFIG_AT91_CF_MODULE) ++static struct at91_cf_data pm9263_cf_data = { ++ .det_pin = AT91_PIN_PA30, ++ .rst_pin = AT91_PIN_PA23, ++ .irq_pin = AT91_PIN_PA24, ++ // .vcc_pin = ... always powered ++ .chipselect = 4, ++}; ++ ++static struct resource pm9263_cf_resources[] = { ++ [0] = { ++ .start = AT91_CHIPSELECT_4, ++ .end = AT91_CHIPSELECT_4 + (0x10000000 - 1), ++ .flags = IORESOURCE_MEM | IORESOURCE_MEM_8AND16BIT, ++ }, ++}; ++ ++static struct platform_device pm9263_cf_device = { ++ .name = "at91_cf", ++ .id = -1, ++ .dev = { ++ .platform_data = &pm9263_cf_data, ++ }, ++ .resource = pm9263_cf_resources, ++ .num_resources = ARRAY_SIZE(pm9263_cf_resources), ++}; ++ ++#define CF_NWE_SETUP (9 << 0) ++#define CF_NCS_WR_SETUP (2 << 8) ++#define CF_NRD_SETUP (9 << 16) ++#define CF_NCS_RD_SETUP (2 << 24) ++ ++#define CF_NWE_PULSE (17 << 0) ++#define CF_NCS_WR_PULSE (27 << 8) ++#define CF_NRD_PULSE (17 << 16) ++#define CF_NCS_RD_PULSE (27 << 24) ++ ++#define CF_NWE_CYCLE (40 << 0) ++#define CF_NRD_CYCLE (40 << 16) ++ ++#define CF_TDF (1 << 16) ++ ++static void __init pm9263_add_device_cf(void) { ++struct at91_cf_data *data = & pm9263_cf_data; ++unsigned int csa; ++ ++ // Setup Compact flash, first enable the address range of ++ // CS4 in HMATRIX user interface ++ csa = at91_sys_read(AT91_MATRIX_EBI0CSA); ++ at91_sys_write(AT91_MATRIX_EBI0CSA, csa | AT91_MATRIX_EBI0_CS4A_SMC_CF1); ++ ++ /* Configure SMC CS4 */ ++ at91_sys_write(AT91_SMC_SETUP(4), ++ (CF_NWE_SETUP | ++ CF_NCS_WR_SETUP | ++ CF_NRD_SETUP | ++ CF_NCS_RD_SETUP)); ++ ++ at91_sys_write(AT91_SMC_PULSE(4), (CF_NWE_PULSE | ++ CF_NCS_WR_PULSE | ++ CF_NRD_PULSE | ++ CF_NCS_RD_PULSE)); ++ at91_sys_write(AT91_SMC_CYCLE(4), (CF_NWE_CYCLE | CF_NRD_CYCLE)); ++ // 16 bit ++ at91_sys_write (AT91_SMC_MODE(4), (AT91_SMC_READMODE | ++ AT91_SMC_WRITEMODE | ++ AT91_SMC_EXNWMODE_DISABLE | ++ AT91_SMC_DBW_16 | ++ CF_TDF)); ++ ++ /* input/irq */ ++ if (data->irq_pin) { ++ at91_set_gpio_input(data->irq_pin, 0); ++ at91_set_deglitch(data->irq_pin, 1); ++ } ++ at91_set_gpio_input(data->det_pin, 0); ++ at91_set_deglitch(data->det_pin, 1); ++ ++ /* outputs, initially off */ ++ if (data->vcc_pin) ++ at91_set_gpio_output(data->vcc_pin, 0); ++ if (data->rst_pin) ++ at91_set_gpio_output(data->rst_pin, 0); ++ ++ /* force poweron defaults for these pins ... */ ++ at91_set_A_periph(AT91_PIN_PD5, 0); /* PD5/CF_NWAIT */ ++ at91_set_A_periph(AT91_PIN_PD14, 0); /* A25/CFRNW */ ++ at91_set_A_periph(AT91_PIN_PD6, 0); /* NCS4/CFCS0 */ ++ at91_set_A_periph(AT91_PIN_PD8, 0); /* PD8/CFCE1 */ ++ at91_set_A_periph(AT91_PIN_PD9, 0); /* PD9/CFCE2 */ ++ ++ platform_device_register(&pm9263_cf_device); ++} ++#else ++void __init pm9263_add_device_cf(void) {} ++#endif ++ ++static void __init pm9263_board_init(void) ++{ ++ /* Serial */ ++ at91_add_device_serial(); ++ /* USB Host */ ++ at91_add_device_usbh(&pm9263_usbh_data); ++ /* USB Device */ ++ at91_add_device_udc(&pm9263_udc_data); ++ /* SPI */ ++ at91_add_device_spi(pm9263_spi_devices, ARRAY_SIZE(pm9263_spi_devices)); ++ /* Touchscreen */ ++ pm9263_add_device_ts(); ++ /* MMC */ ++ at91_add_device_mmc(1, &pm9263_mmc_data); ++ /* Ethernet */ ++ at91_add_device_eth(&pm9263_macb_data); ++ /* NAND */ ++ pm9263_add_device_nand(); ++ /* LCD Controller */ ++ at91_add_device_lcdc(&pm9263_lcdc_data); ++ /* Push Buttons */ ++ pm9263_add_device_buttons(); ++ /* AC97 */ ++ at91_add_device_ac97(&pm9263_ac97_data); ++#if defined(CONFIG_W1_MASTER_GPIO) || defined(CONFIG_W1_MASTER_GPIO_MODULE) ++ platform_device_register(&pm926x_w1_device); ++#endif ++ /* Compact flash */ ++ pm9263_add_device_cf(); ++ /* LEDs */ ++ at91_gpio_leds(pm9263_leds, ARRAY_SIZE(pm9263_leds)); ++ /* shutdown controller, wakeup button (5 msec low) */ ++ at91_sys_write(AT91_SHDW_MR, AT91_SHDW_CPTWK0_(10) | AT91_SHDW_WKMODE0_LOW ++ | AT91_SHDW_RTTWKEN); ++} ++ ++MACHINE_START(PM9263, "Ronetix PM9263/BB9263") ++ /* Maintainer: Atmel */ ++ .phys_io = AT91_BASE_SYS, ++ .io_pg_offst = (AT91_VA_BASE_SYS >> 18) & 0xfffc, ++ .boot_params = AT91_SDRAM_BASE + 0x100, ++ .timer = &at91sam926x_timer, ++ .map_io = pm9263_map_io, ++ .init_irq = pm9263_init_irq, ++ .init_machine = pm9263_board_init, ++MACHINE_END +diff -urNp linux-2.6.28-at91/arch/arm/mach-at91/include/mach/at91_ac97c.h linux-2.6.28-at91-ronetix/arch/arm/mach-at91/include/mach/at91_ac97c.h +--- linux-2.6.28-at91/arch/arm/mach-at91/include/mach/at91_ac97c.h 1970-01-01 01:00:00.000000000 +0100 ++++ linux-2.6.28-at91-ronetix/arch/arm/mach-at91/include/mach/at91_ac97c.h 2009-01-12 16:00:42.000000000 +0100 +@@ -0,0 +1,282 @@ ++/* linux/include/asm-arm/arch-at91rm9200/ac97c.h ++ * ++ * Hardware definition for the ac97c peripheral in the ATMEL at91sam926x processor ++ * ++ * Generated 12/09/2005 (11:54:20) AT91 SW Application Group from AC97C_XXXX V1.3 ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License as published by the ++ * Free Software Foundation; either version 2 of the License, or (at your ++ * option) any later version. ++ * ++ * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR ++ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF ++ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE ++ * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, ++ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT ++ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, ++ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF ++ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING ++ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, ++ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ++ * ++ * You should have received a copy of the GNU General Public License along ++ * with this program; if not, write to the Free Software Foundation, Inc., ++ * 675 Mass Ave, Cambridge, MA 02139, USA. ++ */ ++ ++ ++#ifndef __AC97C_H ++#define __AC97C_H ++ ++/* -------------------------------------------------------- */ ++/* AC97C ID definitions for AT91SAM926x */ ++/* -------------------------------------------------------- */ ++#ifndef AT91C_ID_AC97C ++#define AT91C_ID_AC97C 18 /**< AC97 Controller id */ ++#endif /* AT91C_ID_AC97C */ ++ ++/* -------------------------------------------------------- */ ++/* AC97C Base Address definitions for AT91SAM926x */ ++/* -------------------------------------------------------- */ ++#define AT91C_BASE_AC97C 0xFFFA0000 /**< AC97C base address */ ++ ++/* -------------------------------------------------------- */ ++/* PIO definition for AC97C hardware peripheral */ ++/* -------------------------------------------------------- */ ++#define AT91C_PB1_AC97CK (1 << 1) /**< */ ++#define AT91C_PB0_AC97FS (1 << 0) /**< */ ++#define AT91C_PB3_AC97RX (1 << 3) /**< */ ++#define AT91C_PB2_AC97TX (1 << 2) /**< */ ++ ++ ++/* -------------------------------------------------------- */ ++/* Register offset definition for AC97C hardware peripheral */ ++/* -------------------------------------------------------- */ ++#define AC97C_MR (0x0008) /**< Mode Register */ ++#define AC97C_ICA (0x0010) /**< Input Channel AssignementRegister */ ++#define AC97C_OCA (0x0014) /**< Output Channel Assignement Register */ ++#define AC97C_CARHR (0x0020) /**< Channel A Receive Holding Register */ ++#define AC97C_CATHR (0x0024) /**< Channel A Transmit Holding Register */ ++#define AC97C_CASR (0x0028) /**< Channel A Status Register */ ++#define AC97C_CAMR (0x002C) /**< Channel A Mode Register */ ++#define AC97C_CBRHR (0x0030) /**< Channel B Receive Holding Register (optional) */ ++#define AC97C_CBTHR (0x0034) /**< Channel B Transmit Holding Register (optional) */ ++#define AC97C_CBSR (0x0038) /**< Channel B Status Register */ ++#define AC97C_CBMR (0x003C) /**< Channel B Mode Register */ ++#define AC97C_CORHR (0x0040) /**< COdec Transmit Holding Register */ ++#define AC97C_COTHR (0x0044) /**< COdec Transmit Holding Register */ ++#define AC97C_COSR (0x0048) /**< CODEC Status Register */ ++#define AC97C_COMR (0x004C) /**< CODEC Mask Status Register */ ++#define AC97C_SR (0x0050) /**< Status Register */ ++#define AC97C_IER (0x0054) /**< Interrupt Enable Register */ ++#define AC97C_IDR (0x0058) /**< Interrupt Disable Register */ ++#define AC97C_IMR (0x005C) /**< Interrupt Mask Register */ ++#define AC97C_VERSION (0x00FC) /**< Version Register */ ++ ++/* -------------------------------------------------------- */ ++/* Bitfields definition for AC97C hardware peripheral */ ++/* -------------------------------------------------------- */ ++/* --- Register AC97C_MR */ ++#define AT91C_AC97C_ENA (0x1 << 0 ) /**< (AC97C) AC97 Controller Global Enable */ ++#define AT91C_AC97C_WRST (0x1 << 1 ) /**< (AC97C) Warm Reset */ ++#define AT91C_AC97C_VRA (0x1 << 2 ) /**< (AC97C) Variable RAte (for Data Slots) */ ++/* --- Register AC97C_ICA */ ++#define AT91C_AC97C_CHID3 (0x7 << 0 ) /**< (AC97C) Channel Id for the input slot 3 */ ++#define AT91C_AC97C_CHID3_NONE 0x0 /**< (AC97C) No data will be transmitted during this slot */ ++#define AT91C_AC97C_CHID3_CA 0x1 /**< (AC97C) Channel A data will be transmitted during this slot */ ++#define AT91C_AC97C_CHID3_CB 0x2 /**< (AC97C) Channel B data will be transmitted during this slot */ ++#define AT91C_AC97C_CHID3_CC 0x3 /**< (AC97C) Channel C data will be transmitted during this slot */ ++#define AT91C_AC97C_CHID4 (0x7 << 3 ) /**< (AC97C) Channel Id for the input slot 4 */ ++#define AT91C_AC97C_CHID4_NONE (0x0 << 3) /**< (AC97C) No data will be transmitted during this slot */ ++#define AT91C_AC97C_CHID4_CA (0x1 << 3) /**< (AC97C) Channel A data will be transmitted during this slot */ ++#define AT91C_AC97C_CHID4_CB (0x2 << 3) /**< (AC97C) Channel B data will be transmitted during this slot */ ++#define AT91C_AC97C_CHID4_CC (0x3 << 3) /**< (AC97C) Channel C data will be transmitted during this slot */ ++#define AT91C_AC97C_CHID5 (0x7 << 6 ) /**< (AC97C) Channel Id for the input slot 5 */ ++#define AT91C_AC97C_CHID5_NONE (0x0 << 6) /**< (AC97C) No data will be transmitted during this slot */ ++#define AT91C_AC97C_CHID5_CA (0x1 << 6) /**< (AC97C) Channel A data will be transmitted during this slot */ ++#define AT91C_AC97C_CHID5_CB (0x2 << 6) /**< (AC97C) Channel B data will be transmitted during this slot */ ++#define AT91C_AC97C_CHID5_CC (0x3 << 6) /**< (AC97C) Channel C data will be transmitted during this slot */ ++#define AT91C_AC97C_CHID6 (0x7 << 9 ) /**< (AC97C) Channel Id for the input slot 6 */ ++#define AT91C_AC97C_CHID6_NONE (0x0 << 9) /**< (AC97C) No data will be transmitted during this slot */ ++#define AT91C_AC97C_CHID6_CA (0x1 << 9) /**< (AC97C) Channel A data will be transmitted during this slot */ ++#define AT91C_AC97C_CHID6_CB (0x2 << 9) /**< (AC97C) Channel B data will be transmitted during this slot */ ++#define AT91C_AC97C_CHID6_CC (0x3 << 9) /**< (AC97C) Channel C data will be transmitted during this slot */ ++#define AT91C_AC97C_CHID7 (0x7 << 12) /**< (AC97C) Channel Id for the input slot 7 */ ++#define AT91C_AC97C_CHID7_NONE (0x0 << 12) /**< (AC97C) No data will be transmitted during this slot */ ++#define AT91C_AC97C_CHID7_CA (0x1 << 12) /**< (AC97C) Channel A data will be transmitted during this slot */ ++#define AT91C_AC97C_CHID7_CB (0x2 << 12) /**< (AC97C) Channel B data will be transmitted during this slot */ ++#define AT91C_AC97C_CHID7_CC (0x3 << 12) /**< (AC97C) Channel C data will be transmitted during this slot */ ++#define AT91C_AC97C_CHID8 (0x7 << 15) /**< (AC97C) Channel Id for the input slot 8 */ ++#define AT91C_AC97C_CHID8_NONE (0x0 << 15) /**< (AC97C) No data will be transmitted during this slot */ ++#define AT91C_AC97C_CHID8_CA (0x1 << 15) /**< (AC97C) Channel A data will be transmitted during this slot */ ++#define AT91C_AC97C_CHID8_CB (0x2 << 15) /**< (AC97C) Channel B data will be transmitted during this slot */ ++#define AT91C_AC97C_CHID8_CC (0x3 << 15) /**< (AC97C) Channel C data will be transmitted during this slot */ ++#define AT91C_AC97C_CHID9 (0x7 << 18) /**< (AC97C) Channel Id for the input slot 9 */ ++#define AT91C_AC97C_CHID9_NONE (0x0 << 18) /**< (AC97C) No data will be transmitted during this slot */ ++#define AT91C_AC97C_CHID9_CA (0x1 << 18) /**< (AC97C) Channel A data will be transmitted during this slot */ ++#define AT91C_AC97C_CHID9_CB (0x2 << 18) /**< (AC97C) Channel B data will be transmitted during this slot */ ++#define AT91C_AC97C_CHID9_CC (0x3 << 18) /**< (AC97C) Channel C data will be transmitted during this slot */ ++#define AT91C_AC97C_CHID10 (0x7 << 21) /**< (AC97C) Channel Id for the input slot 10 */ ++#define AT91C_AC97C_CHID10_NONE (0x0 << 21) /**< (AC97C) No data will be transmitted during this slot */ ++#define AT91C_AC97C_CHID10_CA (0x1 << 21) /**< (AC97C) Channel A data will be transmitted during this slot */ ++#define AT91C_AC97C_CHID10_CB (0x2 << 21) /**< (AC97C) Channel B data will be transmitted during this slot */ ++#define AT91C_AC97C_CHID10_CC (0x3 << 21) /**< (AC97C) Channel C data will be transmitted during this slot */ ++#define AT91C_AC97C_CHID11 (0x7 << 24) /**< (AC97C) Channel Id for the input slot 11 */ ++#define AT91C_AC97C_CHID11_NONE (0x0 << 24) /**< (AC97C) No data will be transmitted during this slot */ ++#define AT91C_AC97C_CHID11_CA (0x1 << 24) /**< (AC97C) Channel A data will be transmitted during this slot */ ++#define AT91C_AC97C_CHID11_CB (0x2 << 24) /**< (AC97C) Channel B data will be transmitted during this slot */ ++#define AT91C_AC97C_CHID11_CC (0x3 << 24) /**< (AC97C) Channel C data will be transmitted during this slot */ ++#define AT91C_AC97C_CHID12 (0x7 << 27) /**< (AC97C) Channel Id for the input slot 12 */ ++#define AT91C_AC97C_CHID12_NONE (0x0 << 27) /**< (AC97C) No data will be transmitted during this slot */ ++#define AT91C_AC97C_CHID12_CA (0x1 << 27) /**< (AC97C) Channel A data will be transmitted during this slot */ ++#define AT91C_AC97C_CHID12_CB (0x2 << 27) /**< (AC97C) Channel B data will be transmitted during this slot */ ++#define AT91C_AC97C_CHID12_CC (0x3 << 27) /**< (AC97C) Channel C data will be transmitted during this slot */ ++/* --- Register AC97C_OCA */ ++#define AT91C_AC97C_CHID3 (0x7 << 0 ) /**< (AC97C) Channel Id for the input slot 3 */ ++#define AT91C_AC97C_CHID3_NONE 0x0 /**< (AC97C) No data will be transmitted during this slot */ ++#define AT91C_AC97C_CHID3_CA 0x1 /**< (AC97C) Channel A data will be transmitted during this slot */ ++#define AT91C_AC97C_CHID3_CB 0x2 /**< (AC97C) Channel B data will be transmitted during this slot */ ++#define AT91C_AC97C_CHID3_CC 0x3 /**< (AC97C) Channel C data will be transmitted during this slot */ ++#define AT91C_AC97C_CHID4 (0x7 << 3 ) /**< (AC97C) Channel Id for the input slot 4 */ ++#define AT91C_AC97C_CHID4_NONE (0x0 << 3) /**< (AC97C) No data will be transmitted during this slot */ ++#define AT91C_AC97C_CHID4_CA (0x1 << 3) /**< (AC97C) Channel A data will be transmitted during this slot */ ++#define AT91C_AC97C_CHID4_CB (0x2 << 3) /**< (AC97C) Channel B data will be transmitted during this slot */ ++#define AT91C_AC97C_CHID4_CC (0x3 << 3) /**< (AC97C) Channel C data will be transmitted during this slot */ ++#define AT91C_AC97C_CHID5 (0x7 << 6 ) /**< (AC97C) Channel Id for the input slot 5 */ ++#define AT91C_AC97C_CHID5_NONE (0x0 << 6) /**< (AC97C) No data will be transmitted during this slot */ ++#define AT91C_AC97C_CHID5_CA (0x1 << 6) /**< (AC97C) Channel A data will be transmitted during this slot */ ++#define AT91C_AC97C_CHID5_CB (0x2 << 6) /**< (AC97C) Channel B data will be transmitted during this slot */ ++#define AT91C_AC97C_CHID5_CC (0x3 << 6) /**< (AC97C) Channel C data will be transmitted during this slot */ ++#define AT91C_AC97C_CHID6 (0x7 << 9 ) /**< (AC97C) Channel Id for the input slot 6 */ ++#define AT91C_AC97C_CHID6_NONE (0x0 << 9) /**< (AC97C) No data will be transmitted during this slot */ ++#define AT91C_AC97C_CHID6_CA (0x1 << 9) /**< (AC97C) Channel A data will be transmitted during this slot */ ++#define AT91C_AC97C_CHID6_CB (0x2 << 9) /**< (AC97C) Channel B data will be transmitted during this slot */ ++#define AT91C_AC97C_CHID6_CC (0x3 << 9) /**< (AC97C) Channel C data will be transmitted during this slot */ ++#define AT91C_AC97C_CHID7 (0x7 << 12) /**< (AC97C) Channel Id for the input slot 7 */ ++#define AT91C_AC97C_CHID7_NONE (0x0 << 12) /**< (AC97C) No data will be transmitted during this slot */ ++#define AT91C_AC97C_CHID7_CA (0x1 << 12) /**< (AC97C) Channel A data will be transmitted during this slot */ ++#define AT91C_AC97C_CHID7_CB (0x2 << 12) /**< (AC97C) Channel B data will be transmitted during this slot */ ++#define AT91C_AC97C_CHID7_CC (0x3 << 12) /**< (AC97C) Channel C data will be transmitted during this slot */ ++#define AT91C_AC97C_CHID8 (0x7 << 15) /**< (AC97C) Channel Id for the input slot 8 */ ++#define AT91C_AC97C_CHID8_NONE (0x0 << 15) /**< (AC97C) No data will be transmitted during this slot */ ++#define AT91C_AC97C_CHID8_CA (0x1 << 15) /**< (AC97C) Channel A data will be transmitted during this slot */ ++#define AT91C_AC97C_CHID8_CB (0x2 << 15) /**< (AC97C) Channel B data will be transmitted during this slot */ ++#define AT91C_AC97C_CHID8_CC (0x3 << 15) /**< (AC97C) Channel C data will be transmitted during this slot */ ++#define AT91C_AC97C_CHID9 (0x7 << 18) /**< (AC97C) Channel Id for the input slot 9 */ ++#define AT91C_AC97C_CHID9_NONE (0x0 << 18) /**< (AC97C) No data will be transmitted during this slot */ ++#define AT91C_AC97C_CHID9_CA (0x1 << 18) /**< (AC97C) Channel A data will be transmitted during this slot */ ++#define AT91C_AC97C_CHID9_CB (0x2 << 18) /**< (AC97C) Channel B data will be transmitted during this slot */ ++#define AT91C_AC97C_CHID9_CC (0x3 << 18) /**< (AC97C) Channel C data will be transmitted during this slot */ ++#define AT91C_AC97C_CHID10 (0x7 << 21) /**< (AC97C) Channel Id for the input slot 10 */ ++#define AT91C_AC97C_CHID10_NONE (0x0 << 21) /**< (AC97C) No data will be transmitted during this slot */ ++#define AT91C_AC97C_CHID10_CA (0x1 << 21) /**< (AC97C) Channel A data will be transmitted during this slot */ ++#define AT91C_AC97C_CHID10_CB (0x2 << 21) /**< (AC97C) Channel B data will be transmitted during this slot */ ++#define AT91C_AC97C_CHID10_CC (0x3 << 21) /**< (AC97C) Channel C data will be transmitted during this slot */ ++#define AT91C_AC97C_CHID11 (0x7 << 24) /**< (AC97C) Channel Id for the input slot 11 */ ++#define AT91C_AC97C_CHID11_NONE (0x0 << 24) /**< (AC97C) No data will be transmitted during this slot */ ++#define AT91C_AC97C_CHID11_CA (0x1 << 24) /**< (AC97C) Channel A data will be transmitted during this slot */ ++#define AT91C_AC97C_CHID11_CB (0x2 << 24) /**< (AC97C) Channel B data will be transmitted during this slot */ ++#define AT91C_AC97C_CHID11_CC (0x3 << 24) /**< (AC97C) Channel C data will be transmitted during this slot */ ++#define AT91C_AC97C_CHID12 (0x7 << 27) /**< (AC97C) Channel Id for the input slot 12 */ ++#define AT91C_AC97C_CHID12_NONE (0x0 << 27) /**< (AC97C) No data will be transmitted during this slot */ ++#define AT91C_AC97C_CHID12_CA (0x1 << 27) /**< (AC97C) Channel A data will be transmitted during this slot */ ++#define AT91C_AC97C_CHID12_CB (0x2 << 27) /**< (AC97C) Channel B data will be transmitted during this slot */ ++#define AT91C_AC97C_CHID12_CC (0x3 << 27) /**< (AC97C) Channel C data will be transmitted during this slot */ ++/* --- Register AC97C_CARHR */ ++#define AT91C_AC97C_RDATA (0xFFFFF << 0 ) /**< (AC97C) Receive data */ ++/* --- Register AC97C_CATHR */ ++#define AT91C_AC97C_TDATA (0xFFFFF << 0 ) /**< (AC97C) Transmit data */ ++/* --- Register AC97C_CASR */ ++#define AT91C_AC97C_TXRDY (0x1 << 0 ) /**< (AC97C) */ ++#define AT91C_AC97C_TXEMPTY (0x1 << 1 ) /**< (AC97C) */ ++#define AT91C_AC97C_UNRUN (0x1 << 2 ) /**< (AC97C) */ ++#define AT91C_AC97C_RXRDY (0x1 << 4 ) /**< (AC97C) */ ++#define AT91C_AC97C_OVRUN (0x1 << 5 ) /**< (AC97C) */ ++#define AT91C_AC97C_ENDTX (0x1 << 10) /**< (AC97C) */ ++#define AT91C_AC97C_TXBUFE (0x1 << 11) /**< (AC97C) */ ++#define AT91C_AC97C_ENDRX (0x1 << 14) /**< (AC97C) */ ++#define AT91C_AC97C_RXBUFF (0x1 << 15) /**< (AC97C) */ ++/* --- Register AC97C_CAMR */ ++#define AT91C_AC97C_TXRDY (0x1 << 0 ) /**< (AC97C) */ ++#define AT91C_AC97C_TXEMPTY (0x1 << 1 ) /**< (AC97C) */ ++#define AT91C_AC97C_UNRUN (0x1 << 2 ) /**< (AC97C) */ ++#define AT91C_AC97C_RXRDY (0x1 << 4 ) /**< (AC97C) */ ++#define AT91C_AC97C_OVRUN (0x1 << 5 ) /**< (AC97C) */ ++#define AT91C_AC97C_ENDTX (0x1 << 10) /**< (AC97C) */ ++#define AT91C_AC97C_TXBUFE (0x1 << 11) /**< (AC97C) */ ++#define AT91C_AC97C_ENDRX (0x1 << 14) /**< (AC97C) */ ++#define AT91C_AC97C_RXBUFF (0x1 << 15) /**< (AC97C) */ ++#define AT91C_AC97C_SIZE (0x3 << 16) /**< (AC97C) */ ++#define AT91C_AC97C_SIZE_20_BITS (0x0 << 16) /**< (AC97C) Data size is 20 bits */ ++#define AT91C_AC97C_SIZE_18_BITS (0x1 << 16) /**< (AC97C) Data size is 18 bits */ ++#define AT91C_AC97C_SIZE_16_BITS (0x2 << 16) /**< (AC97C) Data size is 16 bits */ ++#define AT91C_AC97C_SIZE_10_BITS (0x3 << 16) /**< (AC97C) Data size is 10 bits */ ++#define AT91C_AC97C_CEM (0x1 << 18) /**< (AC97C) */ ++#define AT91C_AC97C_CEN (0x1 << 21) /**< (AC97C) */ ++#define AT91C_AC97C_PDCEN (0x1 << 22) /**< (AC97C) */ ++/* --- Register AC97C_CBRHR */ ++#define AT91C_AC97C_RDATA (0xFFFFF << 0 ) /**< (AC97C) Receive data */ ++/* --- Register AC97C_CBTHR */ ++#define AT91C_AC97C_TDATA (0xFFFFF << 0 ) /**< (AC97C) Transmit data */ ++/* --- Register AC97C_CBSR */ ++#define AT91C_AC97C_TXRDY (0x1 << 0 ) /**< (AC97C) */ ++#define AT91C_AC97C_TXEMPTY (0x1 << 1 ) /**< (AC97C) */ ++#define AT91C_AC97C_UNRUN (0x1 << 2 ) /**< (AC97C) */ ++#define AT91C_AC97C_RXRDY (0x1 << 4 ) /**< (AC97C) */ ++#define AT91C_AC97C_OVRUN (0x1 << 5 ) /**< (AC97C) */ ++/* --- Register AC97C_CBMR */ ++#define AT91C_AC97C_TXRDY (0x1 << 0 ) /**< (AC97C) */ ++#define AT91C_AC97C_TXEMPTY (0x1 << 1 ) /**< (AC97C) */ ++#define AT91C_AC97C_UNRUN (0x1 << 2 ) /**< (AC97C) */ ++#define AT91C_AC97C_RXRDY (0x1 << 4 ) /**< (AC97C) */ ++#define AT91C_AC97C_OVRUN (0x1 << 5 ) /**< (AC97C) */ ++#define AT91C_AC97C_SIZE (0x3 << 16) /**< (AC97C) */ ++#define AT91C_AC97C_SIZE_20_BITS (0x0 << 16) /**< (AC97C) Data size is 20 bits */ ++#define AT91C_AC97C_SIZE_18_BITS (0x1 << 16) /**< (AC97C) Data size is 18 bits */ ++#define AT91C_AC97C_SIZE_16_BITS (0x2 << 16) /**< (AC97C) Data size is 16 bits */ ++#define AT91C_AC97C_SIZE_10_BITS (0x3 << 16) /**< (AC97C) Data size is 10 bits */ ++#define AT91C_AC97C_CEM (0x1 << 18) /**< (AC97C) */ ++#define AT91C_AC97C_CEN (0x1 << 21) /**< (AC97C) */ ++/* --- Register AC97C_CORHR */ ++#define AT91C_AC97C_SDATA (0xFFFF << 0 ) /**< (AC97C) Status Data */ ++/* --- Register AC97C_COTHR */ ++#define AT91C_AC97C_CDATA (0xFFFF << 0 ) /**< (AC97C) Command Data */ ++#define AT91C_AC97C_CADDR (0x7F << 16) /**< (AC97C) COdec control register index */ ++#define AT91C_AC97C_READ (0x1 << 23) /**< (AC97C) Read/Write command */ ++/* --- Register AC97C_COSR */ ++#define AT91C_AC97C_TXRDY (0x1 << 0 ) /**< (AC97C) */ ++#define AT91C_AC97C_TXEMPTY (0x1 << 1 ) /**< (AC97C) */ ++#define AT91C_AC97C_UNRUN (0x1 << 2 ) /**< (AC97C) */ ++#define AT91C_AC97C_RXRDY (0x1 << 4 ) /**< (AC97C) */ ++/* --- Register AC97C_COMR */ ++#define AT91C_AC97C_TXRDY (0x1 << 0 ) /**< (AC97C) */ ++#define AT91C_AC97C_TXEMPTY (0x1 << 1 ) /**< (AC97C) */ ++#define AT91C_AC97C_UNRUN (0x1 << 2 ) /**< (AC97C) */ ++#define AT91C_AC97C_RXRDY (0x1 << 4 ) /**< (AC97C) */ ++/* --- Register AC97C_SR */ ++#define AT91C_AC97C_SOF (0x1 << 0 ) /**< (AC97C) */ ++#define AT91C_AC97C_WKUP (0x1 << 1 ) /**< (AC97C) */ ++#define AT91C_AC97C_COEVT (0x1 << 2 ) /**< (AC97C) */ ++#define AT91C_AC97C_CAEVT (0x1 << 3 ) /**< (AC97C) */ ++#define AT91C_AC97C_CBEVT (0x1 << 4 ) /**< (AC97C) */ ++/* --- Register AC97C_IER */ ++#define AT91C_AC97C_SOF (0x1 << 0 ) /**< (AC97C) */ ++#define AT91C_AC97C_WKUP (0x1 << 1 ) /**< (AC97C) */ ++#define AT91C_AC97C_COEVT (0x1 << 2 ) /**< (AC97C) */ ++#define AT91C_AC97C_CAEVT (0x1 << 3 ) /**< (AC97C) */ ++#define AT91C_AC97C_CBEVT (0x1 << 4 ) /**< (AC97C) */ ++/* --- Register AC97C_IDR */ ++#define AT91C_AC97C_SOF (0x1 << 0 ) /**< (AC97C) */ ++#define AT91C_AC97C_WKUP (0x1 << 1 ) /**< (AC97C) */ ++#define AT91C_AC97C_COEVT (0x1 << 2 ) /**< (AC97C) */ ++#define AT91C_AC97C_CAEVT (0x1 << 3 ) /**< (AC97C) */ ++#define AT91C_AC97C_CBEVT (0x1 << 4 ) /**< (AC97C) */ ++/* --- Register AC97C_IMR */ ++#define AT91C_AC97C_SOF (0x1 << 0 ) /**< (AC97C) */ ++#define AT91C_AC97C_WKUP (0x1 << 1 ) /**< (AC97C) */ ++#define AT91C_AC97C_COEVT (0x1 << 2 ) /**< (AC97C) */ ++#define AT91C_AC97C_CAEVT (0x1 << 3 ) /**< (AC97C) */ ++#define AT91C_AC97C_CBEVT (0x1 << 4 ) /**< (AC97C) */ ++ ++#endif /* __AC97C_H */ +diff -urNp linux-2.6.28-at91/arch/arm/mach-at91/Kconfig linux-2.6.28-at91-ronetix/arch/arm/mach-at91/Kconfig +--- linux-2.6.28-at91/arch/arm/mach-at91/Kconfig 2009-01-12 15:59:27.000000000 +0100 ++++ linux-2.6.28-at91-ronetix/arch/arm/mach-at91/Kconfig 2009-01-12 16:00:41.000000000 +0100 +@@ -280,6 +280,13 @@ config MACH_NEOCORE926 + help + Select this if you are using the Adeneo Neocore 926 board. + ++config MACH_PM9263 ++ bool "Ronetix PM9263 Evaluation Kit" ++ depends on ARCH_AT91SAM9263 ++ help ++ Select this if you are using Ronetix's PM9263 board. ++ <http://ronetix.at/starter_kit_9263.html> ++ + endif + + # ---------------------------------------------------------- +@@ -347,13 +354,13 @@ comment "AT91 Board Options" + + config MTD_AT91_DATAFLASH_CARD + bool "Enable DataFlash Card support" +- depends on (ARCH_AT91RM9200DK || MACH_AT91RM9200EK || MACH_AT91SAM9260EK || MACH_AT91SAM9261EK || MACH_AT91SAM9263EK || MACH_AT91SAM9G20EK || MACH_ECBAT91 || MACH_SAM9_L9260 || MACH_AT91CAP9ADK || MACH_TOTEMNOVA || MACH_NEOCORE926) ++ depends on (ARCH_AT91RM9200DK || MACH_AT91RM9200EK || MACH_AT91SAM9260EK || MACH_AT91SAM9261EK || MACH_AT91SAM9263EK || MACH_AT91SAM9G20EK || MACH_ECBAT91 || MACH_SAM9_L9260 || MACH_AT91CAP9ADK || MACH_TOTEMNOVA || MACH_NEOCORE926 || MACH_PM9263) + help + Enable support for the DataFlash card. + + config MTD_NAND_ATMEL_BUSWIDTH_16 + bool "Enable 16-bit data bus interface to NAND flash" +- depends on (MACH_AT91SAM9260EK || MACH_AT91SAM9261EK || MACH_AT91SAM9263EK || MACH_AT91SAM9G20EK || MACH_AT91CAP9ADK) ++ depends on (MACH_AT91SAM9260EK || MACH_AT91SAM9261EK || MACH_AT91SAM9263EK || MACH_AT91SAM9G20EK || MACH_AT91CAP9ADK || MACH_PM9263) + help + On AT91SAM926x boards both types of NAND flash can be present + (8 and 16 bit data bus width). +diff -urNp linux-2.6.28-at91/arch/arm/mach-at91/Makefile linux-2.6.28-at91-ronetix/arch/arm/mach-at91/Makefile +--- linux-2.6.28-at91/arch/arm/mach-at91/Makefile 2009-01-12 15:59:27.000000000 +0100 ++++ linux-2.6.28-at91-ronetix/arch/arm/mach-at91/Makefile 2009-01-12 16:00:41.000000000 +0100 +@@ -54,6 +54,7 @@ obj-$(CONFIG_MACH_USB_A9263) += board-us + obj-$(CONFIG_MACH_CSB737) += board-csb737.o + obj-$(CONFIG_MACH_TOTEMNOVA) += board-totemnova.o + obj-$(CONFIG_MACH_NEOCORE926) += board-neocore926.o ++obj-$(CONFIG_MACH_PM9263) += board-pm9263.o + + # AT91SAM9RL board-specific support + obj-$(CONFIG_MACH_AT91SAM9RLEK) += board-sam9rlek.o +diff -urNp linux-2.6.28-at91/drivers/pcmcia/at91_cf.c linux-2.6.28-at91-ronetix/drivers/pcmcia/at91_cf.c +--- linux-2.6.28-at91/drivers/pcmcia/at91_cf.c 2009-01-12 15:59:27.000000000 +0100 ++++ linux-2.6.28-at91-ronetix/drivers/pcmcia/at91_cf.c 2009-01-12 16:00:42.000000000 +0100 +@@ -27,7 +27,7 @@ + + #if defined(CONFIG_ARCH_AT91RM9200) + #include <mach/at91rm9200_mc.h> +-#elif defined(CONFIG_ARCH_AT91SAM9260) ++#elif defined(CONFIG_ARCH_AT91SAM9260) || defined(CONFIG_ARCH_AT91SAM9263) + #include <mach/at91sam9_smc.h> + #else + #error "Unsupported AT91 processor" +@@ -138,7 +138,8 @@ at91_cf_set_socket(struct pcmcia_socket + } + + /* toggle reset if needed */ +- gpio_set_value(cf->board->rst_pin, s->flags & SS_RESET); ++ if (cf->board->rst_pin) ++ gpio_set_value(cf->board->rst_pin, s->flags & SS_RESET); + + pr_debug("%s: Vcc %d, io_irq %d, flags %04x csc %04x\n", + driver_name, s->Vcc, s->io_irq, s->flags, s->csc_mask); +diff -urNp linux-2.6.28-at91/drivers/pcmcia/Kconfig linux-2.6.28-at91-ronetix/drivers/pcmcia/Kconfig +--- linux-2.6.28-at91/drivers/pcmcia/Kconfig 2009-01-12 15:59:27.000000000 +0100 ++++ linux-2.6.28-at91-ronetix/drivers/pcmcia/Kconfig 2009-01-12 16:00:42.000000000 +0100 +@@ -270,7 +270,7 @@ config BFIN_CFPCMCIA + + config AT91_CF + tristate "AT91 CompactFlash Controller" +- depends on PCMCIA && (ARCH_AT91RM9200 || ARCH_AT91SAM9260) ++ depends on PCMCIA && (ARCH_AT91RM9200 || ARCH_AT91SAM9260 || ARCH_AT91SAM9263) + help + Say Y here to support the CompactFlash controller on AT91 chips. + Or choose M to compile the driver as a module named "at91_cf". +diff -urNp linux-2.6.28-at91/sound/arm/at91-ac97.c.rej linux-2.6.28-at91-ronetix/sound/arm/at91-ac97.c.rej +--- linux-2.6.28-at91/sound/arm/at91-ac97.c.rej 1970-01-01 01:00:00.000000000 +0100 ++++ linux-2.6.28-at91-ronetix/sound/arm/at91-ac97.c.rej 2009-01-12 16:00:43.000000000 +0100 +@@ -0,0 +1,702 @@ ++*************** ++*** 0 **** ++--- 1,699 ---- +++ /* drivers/sound/arm/at91-ac97c.c +++ * +++ * Driver for the Atmel AC97 Controller +++ * +++ * Copyright (C) 2005 Atmel Norway +++ */ +++ +++ #define CAPTURE 0 +++ +++ #define EXTRA_DEBUG 0 +++ +++ #undef DEBUG +++ #include <linux/platform_device.h> +++ #include <linux/module.h> +++ #include <linux/init.h> +++ #include <linux/interrupt.h> +++ #include <linux/delay.h> +++ #include <linux/clk.h> +++ #include <linux/atmel_pdc.h> +++ +++ //#include <sound/driver.h> +++ #include <sound/core.h> +++ #include <sound/initval.h> +++ #include <sound/pcm.h> +++ #include <sound/ac97_codec.h> +++ +++ #include <asm/io.h> +++ #include <mach/hardware.h> +++ #include <asm/cacheflush.h> +++ +++ #include <mach/gpio.h> +++ #include <mach/at91_ac97c.h> +++ #include <mach/board.h> +++ +++ #define platform_num_resources(dev) ((dev)->num_resources) +++ #define platform_resource_start(dev, i) ((dev)->resource[(i)].start) +++ #define platform_resource_end(dev, i) ((dev)->resource[(i)].end) +++ #define platform_resource_flags(dev, i) ((dev)->resource[(i)].flags) +++ #define platform_resource_len(dev, i) \ +++ (platform_resource_end((dev), (i)) - \ +++ platform_resource_start((dev), (i)) + 1) +++ +++ +++ /* module parameters */ +++ static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; +++ static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; +++ static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; +++ +++ module_param_array(index, int, NULL, 0444); +++ MODULE_PARM_DESC(index, "Index value for AC97 controller"); +++ module_param_array(id, charp, NULL, 0444); +++ MODULE_PARM_DESC(id, "ID string for AC97 controller"); +++ module_param_array(enable, bool, NULL, 0444); +++ MODULE_PARM_DESC(enable, "Enable AC97 controller"); +++ +++ typedef struct at91_ac97 { +++ spinlock_t lock; +++ void *regs; +++ int period; +++ struct clk *ac97_clk; +++ struct snd_pcm_substream *playback_substream; +++ struct snd_card *card; +++ struct snd_pcm *pcm; +++ struct snd_ac97 *ac97; +++ struct snd_ac97_bus *ac97_bus; +++ int irq; +++ struct platform_device *pdev; +++ u8 reset_pin; +++ } at91_ac97_t; +++ +++ #define get_chip(card) ((at91_ac97_t *)(card)->private_data) +++ +++ #define ac97c_writel(chip, reg, val) \ +++ writel((val), (chip)->regs + AC97C_##reg) +++ +++ #define ac97c_readl(chip, reg) \ +++ readl((chip)->regs + AC97C_##reg) +++ +++ // PIO management functions +++ void at91_ac97c_drive_reset(at91_ac97_t *chip, unsigned int value) +++ { +++ if (chip->reset_pin) +++ at91_set_gpio_value(chip->reset_pin, value); +++ } +++ +++ +++ static const char driver_name[] = "at91-ac97"; +++ +++ /* PCM part */ +++ +++ static struct snd_pcm_hardware snd_at91_ac97_hw = { +++ .info = (SNDRV_PCM_INFO_INTERLEAVED +++ | SNDRV_PCM_INFO_MMAP +++ | SNDRV_PCM_INFO_MMAP_VALID +++ | SNDRV_PCM_INFO_BLOCK_TRANSFER), +++ .formats = SNDRV_PCM_FMTBIT_S16_LE, +++ .rates = SNDRV_PCM_RATE_CONTINUOUS, +++ .rate_min = 8000, +++ .rate_max = 48000, +++ .channels_min = 2, +++ .channels_max = 2, +++ .buffer_bytes_max = 256*1024, +++ .period_bytes_min = 1024, +++ .period_bytes_max = 4*1024, +++ .periods_min = 1, +++ .periods_max = 64, +++ }; +++ +++ static int snd_at91_ac97_playback_open(struct snd_pcm_substream *substream) +++ { +++ at91_ac97_t *chip = snd_pcm_substream_chip(substream); +++ struct snd_pcm_runtime *runtime = substream->runtime; +++ +++ runtime->hw = snd_at91_ac97_hw; +++ chip->playback_substream = substream; +++ chip->period = 0; +++ +++ snd_printd(KERN_DEBUG "%s : snd_at91_ac97_playback_open\n\r", driver_name); +++ +++ return 0; +++ } +++ +++ static int snd_at91_ac97_playback_close(struct snd_pcm_substream *substream) +++ { +++ at91_ac97_t *chip = snd_pcm_substream_chip(substream); +++ +++ chip->playback_substream = NULL; +++ return 0; +++ } +++ +++ static int snd_at91_ac97_hw_params(struct snd_pcm_substream *substream, +++ struct snd_pcm_hw_params *hw_params) +++ { +++ int err; +++ +++ err = snd_pcm_lib_malloc_pages(substream, +++ params_buffer_bytes(hw_params)); +++ return err; +++ } +++ +++ static int snd_at91_ac97_hw_free(struct snd_pcm_substream *substream) +++ { +++ +++ snd_pcm_lib_free_pages(substream); +++ +++ return 0; +++ } +++ +++ static int snd_at91_ac97_playback_prepare(struct snd_pcm_substream *substream) +++ { +++ at91_ac97_t *chip = snd_pcm_substream_chip(substream); +++ struct snd_pcm_runtime *runtime = substream->runtime; +++ int block_size = frames_to_bytes(runtime, runtime->period_size); +++ unsigned long word = 0; +++ +++ //clean_dcache_region(runtime->dma_area, block_size * 2); +++ snd_printd(KERN_DEBUG "%s : block_size = %d\n\r", driver_name, block_size); +++ +++ /* Assign slots to channels */ +++ switch (substream->runtime->channels) { +++ /* TODO: Support more than two channels */ +++ case 1: +++ word |= AT91C_AC97C_CHID3_CA; +++ break; +++ case 2: +++ default: +++ /* Assign Left and Right slots (3,4) to Channel A */ +++ word |= AT91C_AC97C_CHID3_CA | AT91C_AC97C_CHID4_CA; +++ break; +++ } +++ +++ ac97c_writel(chip, OCA, word); +++ +++ /* +++ * Configure sample format and size. +++ * FIXME: Avoid conflicts with capture channel. +++ */ +++ word = AT91C_AC97C_PDCEN | AT91C_AC97C_SIZE_16_BITS; +++ +++ switch (runtime->format){ +++ case SNDRV_PCM_FORMAT_S16_BE: +++ word |= AT91C_AC97C_CEM; +++ break; +++ case SNDRV_PCM_FORMAT_S16_LE: +++ default: +++ break; +++ } +++ +++ ac97c_writel(chip, CAMR, word); +++ +++ /* Set variable rate if needed */ +++ if ( runtime->rate != 48000 ){ +++ word = ac97c_readl(chip, MR); +++ word |= AT91C_AC97C_VRA; +++ ac97c_writel(chip, MR, word); +++ } else { +++ /* Clear Variable Rate Bit */ +++ word = ac97c_readl(chip, MR); +++ word &= ~AT91C_AC97C_VRA; +++ ac97c_writel(chip, MR, word); +++ } +++ +++ /* Set rate */ +++ snd_ac97_set_rate(chip->ac97, AC97_PCM_FRONT_DAC_RATE, runtime->rate); +++ +++ snd_printd(KERN_DEBUG +++ "%s : dma_addr = %x\n\r" +++ " : dma_area = %p\n\r" +++ " : dma_bytes = %d\n\r", +++ driver_name, runtime->dma_addr, +++ runtime->dma_area, runtime->dma_bytes); +++ +++ /* Initialize and start the PDC */ +++ writel(runtime->dma_addr, chip->regs + ATMEL_PDC_TPR); +++ writel(block_size / 2, chip->regs + ATMEL_PDC_TCR); +++ writel(runtime->dma_addr + block_size, chip->regs + ATMEL_PDC_TNPR); +++ writel(block_size / 2, chip->regs + ATMEL_PDC_TNCR); +++ +++ /* Enable Channel A interrupts */ +++ ac97c_writel(chip, IER, AT91C_AC97C_CAEVT); +++ +++ snd_printd(KERN_DEBUG "%s : snd_at91_ac97_playback_prepare\n\r", driver_name); +++ +++ return 0; +++ } +++ +++ static int at91_ac97_trigger(struct snd_pcm_substream *substream, int cmd) +++ { +++ at91_ac97_t *chip = snd_pcm_substream_chip(substream); +++ unsigned long camr, ptcr = 0, flags; +++ int err = 0; +++ +++ spin_lock_irqsave(&chip->lock, flags); +++ camr = ac97c_readl(chip, CAMR); +++ +++ switch (cmd) { +++ case SNDRV_PCM_TRIGGER_START: +++ camr |= (AT91C_AC97C_CEN | AT91C_AC97C_ENDTX); +++ ptcr = ATMEL_PDC_TXTEN; +++ break; +++ case SNDRV_PCM_TRIGGER_STOP: +++ camr &= ~(AT91C_AC97C_CEN | AT91C_AC97C_ENDTX); +++ ptcr = ATMEL_PDC_TXTDIS; +++ break; +++ default: +++ err = -EINVAL; +++ break; +++ } +++ +++ ac97c_writel(chip, CAMR, camr); +++ writel(ptcr, chip->regs + ATMEL_PDC_PTCR); +++ +++ spin_unlock_irqrestore(&chip->lock, flags); +++ +++ snd_printd(KERN_DEBUG "%s : snd_at91_ac97_trigger\n\r", driver_name); +++ +++ return err; +++ } +++ +++ static snd_pcm_uframes_t snd_at91_ac97_pointer(struct snd_pcm_substream *substream) +++ { +++ at91_ac97_t *chip = snd_pcm_substream_chip(substream); +++ struct snd_pcm_runtime *runtime = substream->runtime; +++ snd_pcm_uframes_t pos; +++ unsigned long bytes; +++ +++ bytes = readl(chip->regs + ATMEL_PDC_TPR) - runtime->dma_addr; +++ +++ pos = bytes_to_frames(runtime, bytes); +++ if (pos >= runtime->buffer_size) +++ pos -= runtime->buffer_size; +++ +++ snd_printd(KERN_DEBUG "%s : snd_at91_ac97_pointer\n\r", driver_name); +++ +++ return pos; +++ } +++ +++ static struct snd_pcm_ops at91_ac97_playback_ops = { +++ .open = snd_at91_ac97_playback_open, +++ .close = snd_at91_ac97_playback_close, +++ .ioctl = snd_pcm_lib_ioctl, +++ .hw_params = snd_at91_ac97_hw_params, +++ .hw_free = snd_at91_ac97_hw_free, +++ .prepare = snd_at91_ac97_playback_prepare, +++ .trigger = at91_ac97_trigger, +++ .pointer = snd_at91_ac97_pointer, +++ }; +++ +++ #if CAPTURE +++ static struct snd_pcm_ops at91_ac97_capture_ops = { +++ .open = snd_at91_ac97_playback_open, +++ .close = snd_at91_ac97_playback_close, +++ .ioctl = snd_pcm_lib_ioctl, +++ .hw_params = snd_at91_ac97_hw_params, +++ .hw_free = snd_at91_ac97_hw_free, +++ .prepare = snd_at91_ac97_playback_prepare, +++ .trigger = at91_ac97_trigger, +++ .pointer = snd_at91_ac97_pointer, +++ }; +++ #endif +++ +++ static struct ac97_pcm at91_ac97_pcm_defs[] __devinitdata = { +++ /* Playback */ +++ { +++ .exclusive = 1, +++ .r = { { +++ .slots = ((1 << AC97_SLOT_PCM_LEFT) +++ | (1 << AC97_SLOT_PCM_RIGHT)), +++ } }, +++ }, +++ #if CAPTURE +++ { /* Mic in */ +++ .stream = 1, +++ .exclusive = 1, +++ .r = { +++ [0] = { +++ .slots = (1 << AC97_SLOT_MIC), +++ }, +++ }, +++ } +++ #endif +++ }; +++ +++ static int __devinit snd_at91_ac97_pcm_new(at91_ac97_t *chip) +++ { +++ struct snd_pcm *pcm; +++ int err; +++ +++ err = snd_ac97_pcm_assign(chip->ac97_bus, 1, at91_ac97_pcm_defs); +++ if (err) +++ return err; +++ +++ err = snd_pcm_new(chip->card, "Atmel AC97", 0, 1, 0, &pcm); +++ if (err) +++ return err; +++ +++ snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV, +++ &chip->pdev->dev, +++ 128 * 1024, 256 * 1024); +++ +++ snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &at91_ac97_playback_ops); +++ #if CAPTURE +++ snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &at91_ac97_capture_ops); +++ #endif +++ pcm->private_data = chip; +++ pcm->info_flags = 0; +++ strcpy(pcm->name, "Atmel AC97"); +++ chip->pcm = pcm; +++ +++ return 0; +++ } +++ +++ /* Mixer part */ +++ static int snd_at91_ac97_mixer_new(at91_ac97_t *chip) +++ { +++ int err; +++ struct snd_ac97_template template; +++ +++ memset(&template, 0, sizeof(template)); +++ template.private_data = chip; +++ template.num = 0; +++ template.addr = 0; +++ err = snd_ac97_mixer(chip->ac97_bus, &template, &chip->ac97); +++ +++ return err; +++ } +++ +++ +++ static irqreturn_t snd_at91_ac97_interrupt(int irq, void *dev_id) +++ { +++ at91_ac97_t *chip = dev_id; +++ unsigned long status; +++ unsigned long dummy; +++ +++ status = ac97c_readl(chip, SR); +++ +++ if (status & AT91C_AC97C_CAEVT) { +++ struct snd_pcm_runtime *runtime; +++ int offset, next_period, block_size; +++ unsigned long casr; +++ +++ runtime = chip->playback_substream->runtime; +++ block_size = frames_to_bytes(runtime, runtime->period_size); +++ +++ casr = ac97c_readl(chip, CASR); +++ +++ if (casr & AT91C_AC97C_ENDTX) { +++ chip->period++; +++ if (chip->period == runtime->periods) +++ chip->period = 0; +++ next_period = chip->period + 1; +++ if (next_period == runtime->periods) +++ next_period = 0; +++ +++ offset = block_size * next_period; +++ +++ writel(runtime->dma_addr + offset, chip->regs + ATMEL_PDC_TNPR); +++ writel(block_size / 2, chip->regs + ATMEL_PDC_TNCR); +++ +++ snd_pcm_period_elapsed(chip->playback_substream); +++ } else { +++ printk(KERN_WARNING +++ "Spurious AC97A interrupt, status = 0x%08lx\n", +++ (unsigned long)casr); +++ } +++ } else { +++ printk(KERN_WARNING +++ "Spurious AC97 interrupt, status = 0x%08lx\n", +++ status); +++ } +++ +++ dummy = ac97c_readl(chip, SR); +++ +++ return IRQ_HANDLED; +++ } +++ +++ +++ /* CODEC part */ +++ +++ static void snd_at91_ac97_hard_reset(at91_ac97_t *chip) +++ { +++ // Enable AC97 Controller. +++ // Perform a cold (hard) reset of the AC97 codec. +++ ac97c_writel(chip, MR, 0); +++ ac97c_writel(chip, MR, AT91C_AC97C_ENA); +++ +++ at91_ac97c_drive_reset(chip, 0); +++ udelay(1); +++ at91_ac97c_drive_reset(chip, 1); +++ udelay(1); +++ } +++ +++ +++ static void snd_at91_ac97_write(struct snd_ac97 *ac97, unsigned short reg, +++ unsigned short val) +++ { +++ at91_ac97_t *chip = ac97->private_data; +++ unsigned long word; +++ int timeout = 0x100; +++ +++ snd_printd(KERN_DEBUG "%s : Writing codec register 0x%x = 0x%x\n\r", driver_name, reg, val); +++ +++ word = (reg & 0x7f) << 16 | val; +++ +++ do { +++ if (ac97c_readl(chip, COSR) & AT91C_AC97C_TXRDY) { +++ ac97c_writel(chip, COTHR, word); +++ return; +++ } +++ udelay(1); +++ } while (--timeout); +++ +++ snd_printk(KERN_WARNING "at91-ac97: codec write timeout\n\r"); +++ } +++ +++ static unsigned short snd_at91_ac97_read(struct snd_ac97 *ac97, +++ unsigned short reg) +++ { +++ at91_ac97_t *chip = ac97->private_data; +++ unsigned long word; +++ int timeout = 0x100; +++ +++ +++ word = (0x80 | (reg & 0x7f)) << 16; +++ +++ do { +++ if (ac97c_readl(chip, COSR) & AT91C_AC97C_TXRDY){ +++ ac97c_writel(chip, COTHR, word); +++ break; +++ } +++ udelay(1); +++ } while (--timeout); +++ +++ if (!timeout) +++ goto timed_out; +++ +++ timeout = 0x100; +++ +++ do { +++ if (ac97c_readl(chip, COSR) & AT91C_AC97C_RXRDY){ +++ unsigned short val = (unsigned short) ac97c_readl(chip, CORHR); +++ return val; +++ } +++ udelay(1); +++ } while (--timeout); +++ +++ if (!timeout) +++ goto timed_out1; +++ +++ timed_out: +++ snd_printk(KERN_WARNING "at91-ac97: codec read timeout\n\r"); +++ return 0xffff; +++ +++ timed_out1: +++ #if EXTRA_DEBUG +++ snd_printk(KERN_WARNING "at91-ac97: codec read timeout 1\n\r"); +++ #endif +++ return 0xffff; +++ } +++ +++ static void snd_at91_ac97_warm_reset(struct snd_ac97 *ac97) +++ { +++ at91_ac97_t *chip = ac97->private_data; +++ volatile unsigned int mr = ac97c_readl(chip, MR); +++ +++ mr |= AT91C_AC97C_WRST; +++ +++ ac97c_writel(chip, MR, mr); +++ udelay(1); +++ +++ mr &= ~AT91C_AC97C_WRST; +++ ac97c_writel(chip, MR, mr); +++ } +++ +++ static void snd_at91_ac97_destroy(struct snd_card *card) +++ { +++ at91_ac97_t *chip = get_chip(card); +++ +++ #if 0 +++ // Disable AC97 Controller +++ ac97c_writel(chip, MR, 0); +++ +++ // Disable AC97 Controller clock +++ if (chip->ac97_clk) clk_disable(chip->ac97_clk); +++ #endif +++ if (chip->irq != -1) { +++ free_irq(chip->irq, chip); +++ chip->irq = -1; +++ } +++ if (chip->regs) { +++ iounmap(chip->regs); +++ chip->regs = NULL; +++ } +++ } +++ +++ static int __devinit snd_at91_ac97_create(struct snd_card *card, +++ struct platform_device *pdev) +++ { +++ static struct snd_ac97_bus_ops ops = { +++ .write = snd_at91_ac97_write, +++ .read = snd_at91_ac97_read, +++ .reset = snd_at91_ac97_warm_reset, +++ }; +++ +++ at91_ac97_t *chip = get_chip(card); +++ int irq, err = 0; +++ +++ card->private_free = snd_at91_ac97_destroy; +++ +++ spin_lock_init(&chip->lock); +++ chip->card = card; +++ chip->pdev = pdev; +++ chip->irq = -1; +++ +++ if (!(platform_resource_flags(pdev, 0) & IORESOURCE_MEM) +++ || !(platform_resource_flags(pdev, 1) & IORESOURCE_IRQ)) +++ return -ENODEV; +++ +++ irq = platform_resource_start(pdev, 1); +++ +++ err = request_irq(irq, snd_at91_ac97_interrupt, 0, "ac97", chip); +++ if (err) { +++ snd_printk(KERN_WARNING "unable to request IRQ%d\n", irq); +++ return err; +++ } +++ +++ chip->irq = irq; +++ #if EXTRA_DEBUG +++ snd_printk(KERN_INFO "AC97C regs = %08X \n", platform_resource_start(pdev, 0)); +++ snd_printk(KERN_INFO "AC97C irq = %d \n",irq); +++ #endif +++ +++ chip->regs = ioremap(platform_resource_start(pdev, 0), +++ platform_resource_len(pdev, 0)); +++ if (!chip->regs) { +++ snd_printk(KERN_WARNING "unable to remap AC97C io memory\n"); +++ return -ENOMEM; +++ } +++ +++ snd_card_set_dev(card, &pdev->dev); +++ +++ err = snd_ac97_bus(card, 0, &ops, chip, &chip->ac97_bus); +++ +++ return err; +++ } +++ +++ static int __devinit snd_at91_ac97_probe(struct platform_device *pdev) +++ { +++ static int dev; +++ struct atmel_ac97_data *pdata = pdev->dev.platform_data; +++ struct snd_card *card; +++ at91_ac97_t *chip; +++ int err; +++ +++ if (dev >= SNDRV_CARDS) +++ return -ENODEV; +++ if (!enable[dev]) { +++ dev++; +++ return -ENOENT; +++ } +++ card = snd_card_new(index[dev], id[dev], THIS_MODULE, +++ sizeof(at91_ac97_t)); +++ if (!card) +++ return -ENOMEM; +++ chip = get_chip(card); +++ +++ err = snd_at91_ac97_create(card, pdev); +++ if (err) +++ goto out_free_card; +++ +++ // Enable AC97 Controller clock +++ chip->reset_pin = pdata->reset_pin; +++ chip->ac97_clk = clk_get(NULL, "ac97_clk"); +++ if(!chip->ac97_clk) +++ goto out_free_card; +++ +++ clk_enable(chip->ac97_clk); +++ +++ // Perform a codec hard reset. +++ // This also enables the AC97 Controller. +++ snd_at91_ac97_hard_reset(chip); +++ +++ err = snd_at91_ac97_mixer_new(chip); +++ if (err) +++ goto out_free_card; +++ +++ err = snd_at91_ac97_pcm_new(chip); +++ if (err) +++ goto out_free_card; +++ +++ +++ strcpy(card->driver, "ac97c"); +++ strcpy(card->shortname, "Atmel AC97"); +++ sprintf(card->longname, "Atmel AC97 Controller at %#lx, irq %i", +++ (unsigned long) platform_resource_start(pdev, 0), (int) chip->irq); +++ +++ err = snd_card_register(card); +++ if (err) +++ goto out_free_card; +++ +++ dev_set_drvdata(&pdev->dev, card); +++ dev++; +++ return 0; +++ +++ out_free_card: +++ snd_card_free(card); +++ return err; +++ } +++ +++ static int __devexit snd_at91_ac97_remove(struct platform_device *pdev) +++ { +++ struct snd_card *card = dev_get_drvdata(&pdev->dev); +++ at91_ac97_t *chip; +++ +++ +++ if (! card) return 0; +++ +++ chip = get_chip(card); +++ +++ snd_card_free(card); +++ +++ // Disable AC97 Controller +++ ac97c_writel(chip, MR, 0); +++ +++ // Disable AC97 Controller clock +++ clk_disable(chip->ac97_clk); +++ +++ dev_set_drvdata(&pdev->dev, NULL); +++ +++ return 0; +++ } +++ +++ static struct platform_driver at91_ac97_driver = +++ { +++ .probe = snd_at91_ac97_probe, +++ .remove = __devexit_p(snd_at91_ac97_remove), +++ .driver = +++ { +++ .name = "ac97c", +++ } +++ , +++ }; +++ +++ static int __init at91_ac97_init(void) +++ { +++ return platform_driver_register(&at91_ac97_driver); +++ } +++ +++ static void __exit at91_ac97_exit(void) +++ { +++ platform_driver_unregister(&at91_ac97_driver); +++ } +++ +++ module_init(at91_ac97_init); +++ module_exit(at91_ac97_exit); +++ +++ MODULE_LICENSE("GPL"); +++ MODULE_DESCRIPTION("Driver for Atmel AC97 Controller"); +++ MODULE_AUTHOR("Atmel"); +diff -urNp linux-2.6.28-at91/sound/arm/Kconfig linux-2.6.28-at91-ronetix/sound/arm/Kconfig +--- linux-2.6.28-at91/sound/arm/Kconfig 2009-01-12 15:59:32.000000000 +0100 ++++ linux-2.6.28-at91-ronetix/sound/arm/Kconfig 2009-01-12 16:00:42.000000000 +0100 +@@ -59,5 +59,14 @@ config SND_AT91_AC97 + Say Y or M if you want to support any AC97 codec attached to + the SAM926X AC97 Controller. + ++config SND_AT91_AC97 ++ tristate "AC97 Controller driver for SAM926X familly from ATMEL" ++ depends on SND && ARCH_AT91SAM9263 ++ select SND_PCM ++ select SND_AC97_CODEC ++ help ++ Say Y or M if you want to support any AC97 codec attached to ++ the SAM926X AC97 Controller. ++ + endif # SND_ARM + +diff -urNp linux-2.6.28-at91/sound/arm/Kconfig.orig linux-2.6.28-at91-ronetix/sound/arm/Kconfig.orig +--- linux-2.6.28-at91/sound/arm/Kconfig.orig 1970-01-01 01:00:00.000000000 +0100 ++++ linux-2.6.28-at91-ronetix/sound/arm/Kconfig.orig 2009-01-12 16:00:31.000000000 +0100 +@@ -0,0 +1,63 @@ ++# ALSA ARM drivers ++ ++menuconfig SND_ARM ++ bool "ARM sound devices" ++ depends on ARM ++ default y ++ help ++ Support for sound devices specific to ARM architectures. ++ Drivers that are implemented on ASoC can be found in ++ "ALSA for SoC audio support" section. ++ ++if SND_ARM ++ ++config SND_SA11XX_UDA1341 ++ tristate "SA11xx UDA1341TS driver (iPaq H3600)" ++ depends on ARCH_SA1100 && L3 ++ select SND_PCM ++ help ++ Say Y here if you have a Compaq iPaq H3x00 handheld computer ++ and want to use its Philips UDA 1341 audio chip. ++ ++ To compile this driver as a module, choose M here: the module ++ will be called snd-sa11xx-uda1341. ++ ++config SND_ARMAACI ++ tristate "ARM PrimeCell PL041 AC Link support" ++ depends on ARM_AMBA ++ select SND_PCM ++ select SND_AC97_CODEC ++ ++config SND_PXA2XX_PCM ++ tristate ++ select SND_PCM ++ ++config SND_PXA2XX_LIB ++ tristate ++ select SND_AC97_CODEC if SND_PXA2XX_LIB_AC97 ++ ++config SND_PXA2XX_LIB_AC97 ++ bool ++ ++config SND_PXA2XX_AC97 ++ tristate "AC97 driver for the Intel PXA2xx chip" ++ depends on ARCH_PXA ++ select SND_PXA2XX_PCM ++ select SND_AC97_CODEC ++ select SND_PXA2XX_LIB ++ select SND_PXA2XX_LIB_AC97 ++ help ++ Say Y or M if you want to support any AC97 codec attached to ++ the PXA2xx AC97 interface. ++ ++config SND_AT91_AC97 ++ tristate "AC97 Controller driver for SAM926X familly from ATMEL" ++ depends on SND && ARCH_AT91 ++ select SND_PCM ++ select SND_AC97_CODEC ++ help ++ Say Y or M if you want to support any AC97 codec attached to ++ the SAM926X AC97 Controller. ++ ++endif # SND_ARM ++ +diff -urNp linux-2.6.28-at91/sound/arm/Makefile.orig linux-2.6.28-at91-ronetix/sound/arm/Makefile.orig +--- linux-2.6.28-at91/sound/arm/Makefile.orig 1970-01-01 01:00:00.000000000 +0100 ++++ linux-2.6.28-at91-ronetix/sound/arm/Makefile.orig 2009-01-12 16:00:31.000000000 +0100 +@@ -0,0 +1,23 @@ ++# ++# Makefile for ALSA ++# ++ ++obj-$(CONFIG_SND_SA11XX_UDA1341) += snd-sa11xx-uda1341.o ++snd-sa11xx-uda1341-objs := sa11xx-uda1341.o ++ ++obj-$(CONFIG_SND_ARMAACI) += snd-aaci.o ++snd-aaci-objs := aaci.o devdma.o ++ ++obj-$(CONFIG_SND_PXA2XX_PCM) += snd-pxa2xx-pcm.o ++snd-pxa2xx-pcm-objs := pxa2xx-pcm.o ++ ++obj-$(CONFIG_SND_PXA2XX_LIB) += snd-pxa2xx-lib.o ++snd-pxa2xx-lib-y := pxa2xx-pcm-lib.o ++snd-pxa2xx-lib-$(CONFIG_SND_PXA2XX_LIB_AC97) += pxa2xx-ac97-lib.o ++ ++obj-$(CONFIG_SND_PXA2XX_AC97) += snd-pxa2xx-ac97.o ++snd-pxa2xx-ac97-objs := pxa2xx-ac97.o ++ ++obj-$(CONFIG_SND_AT91_AC97) += snd-at91-ac97.o ++snd-at91-ac97-objs := at91-ac97.o ++ +diff -urNp linux-2.6.28-at91/sound/arm/Makefile.rej linux-2.6.28-at91-ronetix/sound/arm/Makefile.rej +--- linux-2.6.28-at91/sound/arm/Makefile.rej 1970-01-01 01:00:00.000000000 +0100 ++++ linux-2.6.28-at91-ronetix/sound/arm/Makefile.rej 2009-01-12 16:00:42.000000000 +0100 +@@ -0,0 +1,12 @@ ++*************** ++*** 17,19 **** ++ ++ obj-$(CONFIG_SND_PXA2XX_AC97) += snd-pxa2xx-ac97.o ++ snd-pxa2xx-ac97-objs := pxa2xx-ac97.o ++--- 17,22 ---- ++ ++ obj-$(CONFIG_SND_PXA2XX_AC97) += snd-pxa2xx-ac97.o ++ snd-pxa2xx-ac97-objs := pxa2xx-ac97.o +++ +++ obj-$(CONFIG_SND_AT91_AC97) += snd-at91-ac97.o +++ snd-at91-ac97-objs := at91-ac97.o diff --git a/packages/linux/linux-linkstationppc/defconfig b/packages/linux/linux-linkstationppc/defconfig index 5f0dd18e8d..4d700a2882 100644 --- a/packages/linux/linux-linkstationppc/defconfig +++ b/packages/linux/linux-linkstationppc/defconfig @@ -1,7 +1,7 @@ # # Automatically generated make config: don't edit -# Linux kernel version: 2.6.27.9 -# Sun Dec 14 21:26:49 2008 +# Linux kernel version: 2.6.27.10 +# Wed Feb 11 00:10:13 2009 # # CONFIG_PPC64 is not set @@ -1158,14 +1158,99 @@ CONFIG_SSB_POSSIBLE=y # # Multimedia core support # -# CONFIG_VIDEO_DEV is not set +CONFIG_VIDEO_DEV=m +CONFIG_VIDEO_V4L2_COMMON=m +CONFIG_VIDEO_ALLOW_V4L1=y +CONFIG_VIDEO_V4L1_COMPAT=y # CONFIG_DVB_CORE is not set -# CONFIG_VIDEO_MEDIA is not set +CONFIG_VIDEO_MEDIA=m # # Multimedia drivers # -# CONFIG_DAB is not set +# CONFIG_MEDIA_ATTACH is not set +CONFIG_MEDIA_TUNER=m +# CONFIG_MEDIA_TUNER_CUSTOMIZE is not set +CONFIG_MEDIA_TUNER_SIMPLE=m +CONFIG_MEDIA_TUNER_TDA8290=m +CONFIG_MEDIA_TUNER_TDA9887=m +CONFIG_MEDIA_TUNER_TEA5761=m +CONFIG_MEDIA_TUNER_TEA5767=m +CONFIG_MEDIA_TUNER_MT20XX=m +CONFIG_MEDIA_TUNER_XC2028=m +CONFIG_MEDIA_TUNER_XC5000=m +CONFIG_VIDEO_V4L2=m +CONFIG_VIDEO_V4L1=m +CONFIG_VIDEOBUF_GEN=m +CONFIG_VIDEOBUF_VMALLOC=m +CONFIG_VIDEO_IR=m +CONFIG_VIDEO_TVEEPROM=m +CONFIG_VIDEO_TUNER=m +CONFIG_VIDEO_CAPTURE_DRIVERS=y +# CONFIG_VIDEO_ADV_DEBUG is not set +CONFIG_VIDEO_HELPER_CHIPS_AUTO=y +CONFIG_VIDEO_IR_I2C=m +CONFIG_VIDEO_MSP3400=m +CONFIG_VIDEO_CS53L32A=m +CONFIG_VIDEO_WM8775=m +CONFIG_VIDEO_SAA711X=m +CONFIG_VIDEO_TVP5150=m +CONFIG_VIDEO_CX25840=m +CONFIG_VIDEO_CX2341X=m +# CONFIG_VIDEO_VIVI is not set +# CONFIG_VIDEO_BT848 is not set +# CONFIG_VIDEO_CPIA is not set +# CONFIG_VIDEO_CPIA2 is not set +# CONFIG_VIDEO_SAA5246A is not set +# CONFIG_VIDEO_SAA5249 is not set +# CONFIG_TUNER_3036 is not set +# CONFIG_VIDEO_STRADIS is not set +# CONFIG_VIDEO_SAA7134 is not set +# CONFIG_VIDEO_MXB is not set +# CONFIG_VIDEO_DPC is not set +# CONFIG_VIDEO_HEXIUM_ORION is not set +# CONFIG_VIDEO_HEXIUM_GEMINI is not set +# CONFIG_VIDEO_CX88 is not set +# CONFIG_VIDEO_IVTV is not set +# CONFIG_VIDEO_CAFE_CCIC is not set +CONFIG_V4L_USB_DRIVERS=y +CONFIG_USB_VIDEO_CLASS=m +CONFIG_USB_VIDEO_CLASS_INPUT_EVDEV=y +CONFIG_USB_GSPCA=m +CONFIG_VIDEO_PVRUSB2=m +CONFIG_VIDEO_PVRUSB2_SYSFS=y +# CONFIG_VIDEO_PVRUSB2_DEBUGIFC is not set +CONFIG_VIDEO_EM28XX=m +CONFIG_VIDEO_EM28XX_ALSA=m +CONFIG_VIDEO_USBVISION=m +CONFIG_VIDEO_USBVIDEO=m +CONFIG_USB_VICAM=m +CONFIG_USB_IBMCAM=m +CONFIG_USB_KONICAWC=m +CONFIG_USB_QUICKCAM_MESSENGER=m +CONFIG_USB_ET61X251=m +CONFIG_VIDEO_OVCAMCHIP=m +CONFIG_USB_W9968CF=m +CONFIG_USB_OV511=m +CONFIG_USB_SE401=m +CONFIG_USB_SN9C102=m +CONFIG_USB_STV680=m +CONFIG_USB_ZC0301=m +CONFIG_USB_PWC=m +# CONFIG_USB_PWC_DEBUG is not set +CONFIG_USB_ZR364XX=m +CONFIG_USB_STKWEBCAM=m +CONFIG_USB_S2255=m +# CONFIG_SOC_CAMERA is not set +# CONFIG_VIDEO_SH_MOBILE_CEU is not set +CONFIG_RADIO_ADAPTERS=y +# CONFIG_RADIO_GEMTEK_PCI is not set +# CONFIG_RADIO_MAXIRADIO is not set +# CONFIG_RADIO_MAESTRO is not set +CONFIG_USB_DSBR=m +# CONFIG_USB_SI470X is not set +CONFIG_DAB=y +CONFIG_USB_DABUSB=m # # Graphics support diff --git a/packages/linux/linux-linkstationppc/fw-and-powerpc-install.patch b/packages/linux/linux-linkstationppc/fw-and-powerpc-install.patch new file mode 100644 index 0000000000..9f1eda7ef5 --- /dev/null +++ b/packages/linux/linux-linkstationppc/fw-and-powerpc-install.patch @@ -0,0 +1,36 @@ +diff -urN linux-2.6.27.7.old//arch/powerpc/boot/Makefile linux-2.6.27.7//arch/powerpc/boot/Makefile +--- linux-2.6.27.7.old//arch/powerpc/boot/Makefile 2008-11-20 23:02:37.000000000 +0000 ++++ linux-2.6.27.7//arch/powerpc/boot/Makefile 2008-11-22 21:02:13.456791583 +0000 +@@ -376,16 +376,16 @@ + cmd_mkdir = mkdir -p $@ + + quiet_cmd_install = INSTALL $(patsubst $(DESTDIR)$(WRAPPER_OBJDIR)/%,%,$@) +- cmd_install = $(INSTALL) -m0644 $(patsubst $(DESTDIR)$(WRAPPER_OBJDIR)/%,$(obj)/%,$@) $@ ++ cmd_install = $(INSTALL) -m 0644 $(patsubst $(DESTDIR)$(WRAPPER_OBJDIR)/%,$(obj)/%,$@) $@ + + quiet_cmd_install_dts = INSTALL $(patsubst $(DESTDIR)$(WRAPPER_DTSDIR)/%,dts/%,$@) +- cmd_install_dts = $(INSTALL) -m0644 $(patsubst $(DESTDIR)$(WRAPPER_DTSDIR)/%,$(srctree)/$(obj)/dts/%,$@) $@ ++ cmd_install_dts = $(INSTALL) -m 0644 $(patsubst $(DESTDIR)$(WRAPPER_DTSDIR)/%,$(srctree)/$(obj)/dts/%,$@) $@ + + quiet_cmd_install_exe = INSTALL $(patsubst $(DESTDIR)$(WRAPPER_BINDIR)/%,%,$@) +- cmd_install_exe = $(INSTALL) -m0755 $(patsubst $(DESTDIR)$(WRAPPER_BINDIR)/%,$(obj)/%,$@) $@ ++ cmd_install_exe = $(INSTALL) -m 0755 $(patsubst $(DESTDIR)$(WRAPPER_BINDIR)/%,$(obj)/%,$@) $@ + + quiet_cmd_install_wrapper = INSTALL $(patsubst $(DESTDIR)$(WRAPPER_BINDIR)/%,%,$@) +- cmd_install_wrapper = $(INSTALL) -m0755 $(patsubst $(DESTDIR)$(WRAPPER_BINDIR)/%,$(srctree)/$(obj)/%,$@) $@ ;\ ++ cmd_install_wrapper = $(INSTALL) -m 0755 $(patsubst $(DESTDIR)$(WRAPPER_BINDIR)/%,$(srctree)/$(obj)/%,$@) $@ ;\ + sed -i $@ -e 's%^object=.*%object=$(WRAPPER_OBJDIR)%' \ + -e 's%^objbin=.*%objbin=$(WRAPPER_BINDIR)%' \ + +diff -urN linux-2.6.27.7.old//scripts/Makefile.fwinst linux-2.6.27.7//scripts/Makefile.fwinst +--- linux-2.6.27.7.old//scripts/Makefile.fwinst 2008-11-20 23:02:37.000000000 +0000 ++++ linux-2.6.27.7//scripts/Makefile.fwinst 2008-11-22 21:01:50.870504646 +0000 +@@ -37,7 +37,7 @@ + @true + + quiet_cmd_install = INSTALL $(subst $(srctree)/,,$@) +- cmd_install = $(INSTALL) -m0644 $< $@ ++ cmd_install = $(INSTALL) -m 0644 $< $@ + + $(installed-fw-dirs): + $(call cmd,mkdir) diff --git a/packages/linux/linux-linkstationppc_2.6.27.10.bb b/packages/linux/linux-linkstationppc_2.6.28.4.bb index 2f6308cd27..3c15d78e42 100644 --- a/packages/linux/linux-linkstationppc_2.6.27.10.bb +++ b/packages/linux/linux-linkstationppc_2.6.28.4.bb @@ -1,16 +1,17 @@ DESCRIPTION = "Linux Kernel for the Buffalo Linkstation HD/HG" SECTION = "kernel" LICENSE = "GPL" -PR = "r3" +PR = "r0" DEPENDS = "dtc-native u-boot-mkimage-native" COMPATIBLE_MACHINE = "(lsppchd|lsppchg)" -SRC_URI = "${KERNELORG_MIRROR}/pub/linux/kernel/v2.6/linux-2.6.27.tar.bz2 \ +SRC_URI = "${KERNELORG_MIRROR}/pub/linux/kernel/v2.6/linux-2.6.28.tar.bz2 \ ${KERNELORG_MIRROR}/pub/linux/kernel/v2.6/patch-${PV}.gz;patch=1 \ + file://fw-and-powerpc-install.patch;patch=1 \ file://defconfig \ " -S = "${WORKDIR}/linux-2.6.27" +S = "${WORKDIR}/linux-2.6.28" require linux.inc diff --git a/packages/linux/linux-n1200/defconfig b/packages/linux/linux-n1200/defconfig index f37ff8b640..6b5d5b5dfd 100644 --- a/packages/linux/linux-n1200/defconfig +++ b/packages/linux/linux-n1200/defconfig @@ -1,7 +1,7 @@ # # Automatically generated make config: don't edit # Linux kernel version: 2.6.27-rc9 -# Sun Jan 11 02:29:21 2009 +# Tue Feb 10 21:33:38 2009 # # CONFIG_PPC64 is not set @@ -1214,13 +1214,97 @@ CONFIG_SSB_POSSIBLE=y # # Multimedia core support # -# CONFIG_VIDEO_DEV is not set +CONFIG_VIDEO_DEV=m +CONFIG_VIDEO_V4L2_COMMON=m +CONFIG_VIDEO_ALLOW_V4L1=y +CONFIG_VIDEO_V4L1_COMPAT=y # CONFIG_DVB_CORE is not set -# CONFIG_VIDEO_MEDIA is not set +CONFIG_VIDEO_MEDIA=m # # Multimedia drivers # +# CONFIG_MEDIA_ATTACH is not set +CONFIG_MEDIA_TUNER=m +# CONFIG_MEDIA_TUNER_CUSTOMIZE is not set +CONFIG_MEDIA_TUNER_SIMPLE=m +CONFIG_MEDIA_TUNER_TDA8290=m +CONFIG_MEDIA_TUNER_TDA9887=m +CONFIG_MEDIA_TUNER_TEA5761=m +CONFIG_MEDIA_TUNER_TEA5767=m +CONFIG_MEDIA_TUNER_MT20XX=m +CONFIG_MEDIA_TUNER_XC2028=m +CONFIG_MEDIA_TUNER_XC5000=m +CONFIG_VIDEO_V4L2=m +CONFIG_VIDEO_V4L1=m +CONFIG_VIDEOBUF_GEN=m +CONFIG_VIDEOBUF_VMALLOC=m +CONFIG_VIDEO_IR=m +CONFIG_VIDEO_TVEEPROM=m +CONFIG_VIDEO_TUNER=m +CONFIG_VIDEO_CAPTURE_DRIVERS=y +# CONFIG_VIDEO_ADV_DEBUG is not set +CONFIG_VIDEO_HELPER_CHIPS_AUTO=y +CONFIG_VIDEO_IR_I2C=m +CONFIG_VIDEO_MSP3400=m +CONFIG_VIDEO_CS53L32A=m +CONFIG_VIDEO_WM8775=m +CONFIG_VIDEO_SAA711X=m +CONFIG_VIDEO_TVP5150=m +CONFIG_VIDEO_CX25840=m +CONFIG_VIDEO_CX2341X=m +# CONFIG_VIDEO_VIVI is not set +# CONFIG_VIDEO_BT848 is not set +# CONFIG_VIDEO_CPIA is not set +# CONFIG_VIDEO_CPIA2 is not set +# CONFIG_VIDEO_SAA5246A is not set +# CONFIG_VIDEO_SAA5249 is not set +# CONFIG_TUNER_3036 is not set +# CONFIG_VIDEO_STRADIS is not set +# CONFIG_VIDEO_SAA7134 is not set +# CONFIG_VIDEO_MXB is not set +# CONFIG_VIDEO_DPC is not set +# CONFIG_VIDEO_HEXIUM_ORION is not set +# CONFIG_VIDEO_HEXIUM_GEMINI is not set +# CONFIG_VIDEO_CX88 is not set +# CONFIG_VIDEO_IVTV is not set +# CONFIG_VIDEO_CAFE_CCIC is not set +CONFIG_V4L_USB_DRIVERS=y +CONFIG_USB_VIDEO_CLASS=m +CONFIG_USB_VIDEO_CLASS_INPUT_EVDEV=y +CONFIG_USB_GSPCA=m +CONFIG_VIDEO_PVRUSB2=m +CONFIG_VIDEO_PVRUSB2_SYSFS=y +# CONFIG_VIDEO_PVRUSB2_DEBUGIFC is not set +CONFIG_VIDEO_EM28XX=m +CONFIG_VIDEO_EM28XX_ALSA=m +CONFIG_VIDEO_USBVISION=m +CONFIG_VIDEO_USBVIDEO=m +CONFIG_USB_VICAM=m +CONFIG_USB_IBMCAM=m +CONFIG_USB_KONICAWC=m +CONFIG_USB_QUICKCAM_MESSENGER=m +CONFIG_USB_ET61X251=m +CONFIG_VIDEO_OVCAMCHIP=m +CONFIG_USB_W9968CF=m +CONFIG_USB_OV511=m +CONFIG_USB_SE401=m +CONFIG_USB_SN9C102=m +CONFIG_USB_STV680=m +CONFIG_USB_ZC0301=m +CONFIG_USB_PWC=m +# CONFIG_USB_PWC_DEBUG is not set +CONFIG_USB_ZR364XX=m +CONFIG_USB_STKWEBCAM=m +CONFIG_USB_S2255=m +# CONFIG_SOC_CAMERA is not set +# CONFIG_VIDEO_SH_MOBILE_CEU is not set +CONFIG_RADIO_ADAPTERS=y +# CONFIG_RADIO_GEMTEK_PCI is not set +# CONFIG_RADIO_MAXIRADIO is not set +# CONFIG_RADIO_MAESTRO is not set +CONFIG_USB_DSBR=m +# CONFIG_USB_SI470X is not set CONFIG_DAB=y CONFIG_USB_DABUSB=m diff --git a/packages/linux/linux-n1200_2.6.27-rc9+git.bb b/packages/linux/linux-n1200_2.6.27-rc9+git.bb index 04062679ca..7674379a6b 100644 --- a/packages/linux/linux-n1200_2.6.27-rc9+git.bb +++ b/packages/linux/linux-n1200_2.6.27-rc9+git.bb @@ -1,7 +1,7 @@ DESCRIPTION = "Linux Kernel for the Thecus n1200" SECTION = "kernel" LICENSE = "GPL" -PR = "r2" +PR = "r3" DEPENDS = "u-boot-mkimage-native" COMPATIBLE_MACHINE = "n1200" diff --git a/packages/linux/linux-omap-2.6.28/add-resizer-driver.patch b/packages/linux/linux-omap-2.6.28/add-resizer-driver.patch new file mode 100644 index 0000000000..9457bec576 --- /dev/null +++ b/packages/linux/linux-omap-2.6.28/add-resizer-driver.patch @@ -0,0 +1,19823 @@ +Index: git/drivers/media/video/isp/bluegamma_table.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ git/drivers/media/video/isp/bluegamma_table.h 2009-02-12 10:29:26.000000000 -0600 +@@ -0,0 +1,1040 @@ ++/* ++ * drivers/media/video/omap/isp/redgamma_table.h ++ * ++ * Gamma Table values for Red for TI's OMAP3430 Camera ISP ++ * ++ * Copyright (C) 2007 Texas Instruments, Inc. ++ * ++ * This package is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ * ++ * THIS PACKAGE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR ++ * IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED ++ * WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE. ++ */ ++ ++0, ++0, ++1, ++2, ++3, ++3, ++4, ++5, ++6, ++8, ++10, ++12, ++14, ++16, ++18, ++20, ++22, ++23, ++25, ++26, ++28, ++29, ++31, ++32, ++34, ++35, ++36, ++37, ++39, ++40, ++41, ++42, ++43, ++44, ++45, ++46, ++47, ++48, ++49, ++50, ++51, ++52, ++52, ++53, ++54, ++55, ++56, ++57, ++58, ++59, ++60, ++61, ++62, ++63, ++63, ++64, ++65, ++66, ++66, ++67, ++68, ++69, ++69, ++70, ++71, ++72, ++72, ++73, ++74, ++75, ++75, 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++252, ++252, ++252, ++253, ++253, ++253, ++253, ++253, ++253, ++253, ++253, ++253, ++253, ++253, ++253, ++253, ++253, ++253, ++253, ++253, ++253, ++253, ++253, ++253, ++253, ++253, ++253, ++253, ++253, ++253, ++253, ++253, ++253, ++253, ++253, ++253, ++253, ++253, ++253, ++253, ++253, ++253, ++253, ++253, ++253, ++253, ++253, ++253, ++253, ++253, ++253, ++253, ++253, ++253, ++253, ++253, ++253, ++253, ++253, ++253, ++254, ++254, ++254, ++254, ++255, ++255, ++255, ++255, ++255, ++255, ++255, ++255, ++255, ++255, ++255, ++255, ++255, ++255, ++255, ++255, ++255, ++255, ++255, ++255, ++255, ++255, ++255, ++255, ++255, ++255, ++255 +Index: git/drivers/media/video/isp/cfa_coef_table.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ git/drivers/media/video/isp/cfa_coef_table.h 2009-02-12 10:29:26.000000000 -0600 +@@ -0,0 +1,592 @@ ++/* ++ * drivers/media/video/omap/isp/cfa_coef_table.h ++ * ++ * CFA Coefficient Table values for TI's OMAP3430 Camera ISP ++ * ++ * Copyright (C) 2007 Texas Instruments, Inc. ++ * ++ * This package is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ * ++ * THIS PACKAGE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR ++ * IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED ++ * WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE. ++ */ ++ ++0, ++247, ++0, ++244, ++247, ++36, ++27, ++12, ++0, ++27, ++0, ++250, ++244, ++12, ++250, ++4, ++0, ++0, ++0, ++248, ++0, ++0, ++40, ++0, ++4, ++250, ++12, ++244, ++250, ++0, ++27, ++0, ++12, ++27, ++36, ++247, ++244, ++0, ++247, ++0, ++0, ++40, ++0, ++0, ++248, ++0, ++0, ++0, ++0, ++247, ++0, ++244, ++247, ++36, ++27, ++12, ++0, ++27, ++0, ++250, ++244, ++12, ++250, ++4, ++0, ++0, ++0, ++248, ++0, ++0, ++40, ++0, ++4, ++250, ++12, ++244, ++250, ++0, ++27, ++0, ++12, ++27, ++36, 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++12, ++244, ++248, ++0, ++0, ++0, ++0, ++40, ++0, ++0, ++244, ++12, ++250, ++4, ++0, ++27, ++0, ++250, ++247, ++36, ++27, ++12, ++0, ++247, ++0, ++244, ++0, ++0, ++40, ++0, ++0, ++0, ++0, ++248, ++244, ++12, ++250, ++4, ++0, ++27, ++0, ++250, ++247, ++36, ++27, ++12, ++0, ++247, ++0, ++244, ++248, ++0, ++0, ++0, ++0, ++40, ++0, ++0, ++244, ++0, ++247, ++0, ++12, ++27, ++36, ++247, ++250, ++0, ++27, ++0, ++4, ++250, ++12, ++244, ++0, ++0, ++40, ++0, ++0, ++0, ++0, ++248, ++244, ++12, ++250, ++4, ++0, ++27, ++0, ++250, ++247, ++36, ++27, ++12, ++0, ++247, ++0, ++244, ++248, ++0, ++0, ++0, ++0, ++40, ++0, ++0, ++244, ++0, ++247, ++0, ++12, ++27, ++36, ++247, ++250, ++0, ++27, ++0, ++4, ++250, ++12, ++244, ++0, ++0, ++40, ++0, ++0, ++0, ++0, ++248, ++244, ++12, ++250, ++4, ++0, ++27, ++0, ++250, ++247, ++36, ++27, ++12, ++0, ++247, ++0, ++244, ++248, ++0, ++0, ++0, ++0, ++40, ++0, ++0, ++244, ++0, ++247, ++0, ++12, ++27, ++36, ++247, ++250, ++0, ++27, ++0, ++4, ++250, ++12, ++244, ++0, ++0, ++40, ++0, ++0, ++0, ++0, ++248, ++4, ++250, ++12, ++244, ++250, ++0, ++27, ++0, ++12, ++27, ++36, ++247, ++244, ++0, ++247, ++0, ++0, ++0, ++0, ++248, ++0, ++0, ++40, ++0, ++0, ++247, ++0, ++244, ++247, ++36, ++27, ++12, ++0, ++27, ++0, ++250, ++244, ++12, ++250, ++4, ++0, ++40, ++0, ++0, ++248, ++0, ++0, ++0, ++4, ++250, ++12, ++244, ++250, ++0, ++27, ++0, ++12, ++27, ++36, ++247, ++244, ++0, ++247, ++0, ++0, ++0, ++0, ++248, ++0, ++0, ++40, ++0, ++0, ++247, ++0, ++244, ++247, ++36, ++27, ++12, ++0, ++27, ++0, ++250, ++244, ++12, ++250, ++4, ++0, ++40, ++0, ++0, ++248, ++0, ++0, ++0, ++4, ++250, ++12, ++244, ++250, ++0, ++27, ++0, ++12, ++27, ++36, ++247, ++244, ++0, ++247, ++0, ++0, ++0, ++0, ++248, ++0, ++0, ++40, ++0, ++0, ++247, ++0, ++244, ++247, ++36, ++27, ++12, ++0, ++27, ++0, ++250, ++244, ++12, ++250, ++4, ++0, ++40, ++0, ++0, ++248, ++0, ++0, ++0 +Index: git/drivers/media/video/isp/greengamma_table.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ git/drivers/media/video/isp/greengamma_table.h 2009-02-12 10:29:26.000000000 -0600 +@@ -0,0 +1,1040 @@ ++/* ++ * drivers/media/video/omap/isp/redgamma_table.h ++ * ++ * Gamma Table values for Red for TI's OMAP3430 Camera ISP ++ * ++ * Copyright (C) 2007 Texas Instruments, Inc. ++ * ++ * This package is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ * ++ * THIS PACKAGE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR ++ * IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED ++ * WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE. ++ */ ++ ++0, ++0, ++1, ++2, ++3, ++3, ++4, ++5, ++6, ++8, ++10, ++12, ++14, ++16, ++18, ++20, ++22, ++23, ++25, ++26, ++28, ++29, ++31, ++32, ++34, ++35, ++36, ++37, ++39, ++40, ++41, ++42, ++43, ++44, ++45, ++46, ++47, ++48, ++49, ++50, ++51, ++52, ++52, ++53, ++54, ++55, ++56, ++57, ++58, ++59, ++60, ++61, ++62, ++63, ++63, ++64, ++65, ++66, ++66, ++67, ++68, ++69, ++69, ++70, ++71, ++72, ++72, ++73, ++74, ++75, ++75, ++76, ++77, ++78, ++78, ++79, ++80, ++81, ++81, ++82, ++83, ++84, ++84, ++85, ++86, ++87, ++88, ++88, ++89, ++90, ++91, ++91, ++92, ++93, ++94, ++94, ++95, ++96, ++97, ++97, ++98, ++98, ++99, ++99, ++100, ++100, ++101, ++101, ++102, ++103, ++104, ++104, ++105, ++106, ++107, ++108, ++108, ++109, ++110, ++111, ++111, ++112, ++113, ++114, ++114, ++115, ++116, ++117, ++117, ++118, ++119, ++119, ++120, ++120, ++121, ++121, ++122, ++122, ++123, ++123, ++124, ++124, ++125, ++125, ++126, ++126, ++127, ++127, ++128, ++128, ++129, ++129, ++130, ++130, ++131, ++131, ++132, ++132, ++133, ++133, ++134, ++134, ++135, ++135, ++136, ++136, ++137, ++137, ++138, ++138, ++139, ++139, ++140, ++140, ++141, ++141, ++142, ++142, ++143, ++143, ++144, ++144, ++145, ++145, ++146, ++146, ++147, ++147, ++148, ++148, ++149, ++149, ++150, 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++246, ++246, ++246, ++246, ++246, ++246, ++246, ++246, ++246, ++246, ++246, ++246, ++246, ++246, ++246, ++246, ++246, ++246, ++246, ++246, ++246, ++246, ++246, ++246, ++246, ++246, ++247, ++247, ++247, ++247, ++248, ++248, ++248, ++248, ++248, ++248, ++248, ++248, ++248, ++248, ++248, ++248, ++248, ++248, ++248, ++248, ++248, ++248, ++248, ++248, ++248, ++248, ++248, ++248, ++248, ++248, ++248, ++249, ++249, ++249, ++249, ++250, ++250, ++250, ++250, ++250, ++250, ++250, ++250, ++250, ++250, ++250, ++250, ++250, ++250, ++250, ++250, ++250, ++250, ++250, ++250, ++250, ++250, ++250, ++250, ++250, ++250, ++250, ++250, ++250, ++250, ++250, ++250, ++250, ++250, ++250, ++250, ++250, ++250, ++250, ++250, ++250, ++250, ++251, ++251, ++251, ++251, ++252, ++252, ++252, ++252, ++252, ++252, ++252, ++252, ++252, ++252, ++252, ++252, ++252, ++252, ++252, ++252, ++252, ++252, ++252, ++252, ++252, ++252, ++252, ++252, ++252, ++252, ++252, ++252, ++252, ++252, ++252, ++252, ++252, ++252, ++252, ++252, ++252, ++252, ++252, ++252, ++252, ++252, ++252, ++252, ++252, ++252, ++252, ++252, ++252, ++252, ++252, ++252, ++252, ++252, ++252, ++252, ++252, ++252, ++252, ++252, ++252, ++252, ++252, ++252, ++253, ++253, ++253, ++253, ++253, ++253, ++253, ++253, ++253, ++253, ++253, ++253, ++253, ++253, ++253, ++253, ++253, ++253, ++253, ++253, ++253, ++253, ++253, ++253, ++253, ++253, ++253, ++253, ++253, ++253, ++253, ++253, ++253, ++253, ++253, ++253, ++253, ++253, ++253, ++253, ++253, ++253, ++253, ++253, ++253, ++253, ++253, ++253, ++253, ++253, ++253, ++253, ++253, ++253, ++253, ++253, ++253, ++254, ++254, ++254, ++254, ++255, ++255, ++255, ++255, ++255, ++255, ++255, ++255, ++255, ++255, ++255, ++255, ++255, ++255, ++255, ++255, ++255, ++255, ++255, ++255, ++255, ++255, ++255, ++255, ++255, ++255, ++255 +Index: git/drivers/media/video/isp/isp.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ git/drivers/media/video/isp/isp.c 2009-02-12 15:21:14.000000000 -0600 +@@ -0,0 +1,2301 @@ ++/* ++ * drivers/media/video/isp/isp.c ++ * ++ * Driver Library for ISP Control module in TI's OMAP3430 Camera ISP ++ * ISP interface and IRQ related APIs are defined here. ++ * ++ * Copyright (C) 2008 Texas Instruments. ++ * ++ * This package is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ * ++ * THIS PACKAGE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR ++ * IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED ++ * WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE. ++ */ ++ ++#include <linux/module.h> ++#include <linux/errno.h> ++#include <linux/sched.h> ++#include <linux/delay.h> ++#include <linux/err.h> ++#include <linux/interrupt.h> ++#include <linux/clk.h> ++#include <asm/irq.h> ++#include <asm/scatterlist.h> ++#include <asm/mach-types.h> ++#include <linux/device.h> ++#include <linux/autoconf.h> ++#include <asm/io.h> ++ ++#include "isp.h" ++#include "ispreg.h" ++#include "ispccdc.h" ++#include "isppreview.h" ++#include "ispresizer.h" ++#include "ispmmu.h" ++#include "isph3a.h" ++#include "isp_af.h" ++#include "isphist.h" ++ ++#define ISP_XCLKA_DEFAULT 0x12 ++ ++#ifdef CONFIG_VIDEO_OMAP34XX_ISP_PREVIEWER ++#define USE_ISP_PREVIEW ++#endif ++ ++#ifdef CONFIG_VIDEO_OMAP34XX_ISP_RESIZER ++#define USE_ISP_RESZ ++#endif ++/* list of image formats supported via OMAP ISP */ ++const static struct v4l2_fmtdesc isp_formats[] = { ++ { ++#ifndef ENABLE_BT_656_CAPTURE ++ .description = "UYVY, packed", ++#else ++ .description = "UYVY (YUV 4:2:2), packed", ++#endif ++ .pixelformat = V4L2_PIX_FMT_UYVY, ++ }, ++ { ++ .description = "YUYV (YUV 4:2:2), packed", ++ .pixelformat = V4L2_PIX_FMT_YUYV, ++ }, ++ { ++ .description = "Bayer10 (GrR/BGb)", ++ .pixelformat = V4L2_PIX_FMT_SGRBG10, ++ }, ++}; ++ ++#define NUM_ISP_CAPTURE_FORMATS (sizeof(isp_formats)/sizeof(isp_formats[0])) ++ ++ ++/* ISP Crop capabilities */ ++static struct v4l2_rect ispcroprect; ++static struct v4l2_rect cur_rect; ++ ++/* Video controls */ ++static struct vcontrol { ++ struct v4l2_queryctrl qc; ++ int current_value; ++} video_control[] = { ++ { ++ { ++ .id = V4L2_CID_BRIGHTNESS, ++ .type = V4L2_CTRL_TYPE_INTEGER, ++ .name = "Brightness", ++ .minimum = ISPPRV_BRIGHT_LOW, ++ .maximum = ISPPRV_BRIGHT_HIGH, ++ .step = ISPPRV_BRIGHT_STEP, ++ .default_value = ISPPRV_BRIGHT_DEF, ++ }, ++ .current_value = ISPPRV_BRIGHT_DEF, ++ }, ++ { ++ { ++ .id = V4L2_CID_CONTRAST, ++ .type = V4L2_CTRL_TYPE_INTEGER, ++ .name = "Contrast", ++ .minimum = ISPPRV_CONTRAST_LOW, ++ .maximum = ISPPRV_CONTRAST_HIGH, ++ .step = ISPPRV_CONTRAST_STEP, ++ .default_value = ISPPRV_CONTRAST_DEF, ++ }, ++ .current_value = ISPPRV_CONTRAST_DEF, ++ }, ++ { ++ { ++ .id = V4L2_CID_PRIVATE_ISP_COLOR_FX, ++ .type = V4L2_CTRL_TYPE_INTEGER, ++ .name = "Color Effects", ++ .minimum = PREV_DEFAULT_COLOR, ++ .maximum = PREV_SEPIA_COLOR, ++ .step = 1, ++ .default_value = PREV_DEFAULT_COLOR, ++ }, ++ .current_value = PREV_DEFAULT_COLOR, ++ }, ++ { ++ { ++ .id = V4L2_CID_PRIVATE_ISP_CCDC_CFG, ++ .type = V4L2_CTRL_TYPE_INTEGER, ++ .name = "CCDC", ++ .minimum = 0, ++ .maximum = 1, ++ .step = 1, ++ .default_value = 0, ++ }, ++ .current_value = 0, ++ }, ++ { ++ { ++ .id = V4L2_CID_PRIVATE_ISP_PRV_CFG, ++ .type = V4L2_CTRL_TYPE_INTEGER, ++ .name = "Previewer", ++ .minimum = 0, ++ .maximum = 1, ++ .step = 1, ++ .default_value = 0, ++ }, ++ .current_value = 0, ++ }, ++ { ++ { ++ .id = V4L2_CID_PRIVATE_ISP_LSC_UPDATE, ++ .type = V4L2_CTRL_TYPE_INTEGER, ++ .name = "Tables", ++ .minimum = 0, ++ .maximum = 1, ++ .step = 1, ++ .default_value = 0, ++ }, ++ .current_value = 0, ++ }, ++ { ++ { ++ .id = V4L2_CID_PRIVATE_ISP_AEWB_CFG, ++ .type = V4L2_CTRL_TYPE_INTEGER, ++ .name = "Auto Exposure, Auto WB Config", ++ .minimum = 0, ++ .maximum = 1, ++ .step = 1, ++ .default_value = 0, ++ }, ++ .current_value = 0, ++ }, ++ { ++ { ++ .id = V4L2_CID_PRIVATE_ISP_AEWB_REQ, ++ .type = V4L2_CTRL_TYPE_INTEGER, ++ .name = "AEWB Request Statistics", ++ .minimum = 0, ++ .maximum = 1, ++ .step = 1, ++ .default_value = 0, ++ }, ++ .current_value = 0, ++ }, ++ { ++ { ++ .id = V4L2_CID_PRIVATE_ISP_AF_CFG, ++ .type = V4L2_CTRL_TYPE_INTEGER, ++ .name = "Auto Focus Config", ++ .minimum = 0, ++ .maximum = 1, ++ .step = 1, ++ .default_value = 0, ++ }, ++ .current_value = 0, ++ }, ++ { ++ { ++ .id = V4L2_CID_PRIVATE_ISP_AF_REQ, ++ .type = V4L2_CTRL_TYPE_INTEGER, ++ .name = "AF Request Statistics", ++ .minimum = 0, ++ .maximum = 1, ++ .step = 1, ++ .default_value = 0, ++ }, ++ .current_value = 0, ++ } ++}; ++ ++/*Structure for IRQ related info */ ++static struct ispirq { ++ isp_callback_t isp_callbk[10]; ++ isp_vbq_callback_ptr isp_callbk_arg1[10]; ++ void *isp_callbk_arg2[10]; ++} ispirq_obj; ++ ++/* Structure for storing ISP Control module information*/ ++static struct isp { ++ spinlock_t lock; /* spinlock to sync b/w isr and processes */ ++ spinlock_t isp_temp_buf_lock; ++ struct mutex isp_mutex; ++ u8 if_status; ++ u8 interfacetype; ++ int ref_count; ++ struct clk *cam_ick; ++ struct clk *cam_fck; ++} isp_obj; ++ ++struct isp_sgdma ispsg; ++ ++/* Structure for storing ISP sub-module information - CCDC,PRV,RSZ */ ++struct ispmodule { ++ /* Bit mask for sub-modules enabled within the ISP */ ++ unsigned int isp_pipeline; ++ int isp_temp_state; ++ int applyCrop; ++ struct v4l2_pix_format pix; ++ /* tried ISP output sizes for video mode */ ++ unsigned int ccdc_input_width; ++ unsigned int ccdc_input_height; ++ unsigned int ccdc_output_width; ++ unsigned int ccdc_output_height; ++ unsigned int preview_input_width; ++ unsigned int preview_input_height; ++ unsigned int preview_output_width; ++ unsigned int preview_output_height; ++ unsigned int resizer_input_width; ++ unsigned int resizer_input_height; ++ unsigned int resizer_output_width; ++ unsigned int resizer_output_height; ++#ifdef ENABLE_BT_656_CAPTURE ++ /* Flag to indicate whether capture is interlaced or progressive */ ++ int capture_type; ++ int current_field; ++ __u32 input_pixelformat; ++#endif ++}; ++ ++#ifdef ENABLE_BT_656_CAPTURE ++#define ISP_SD_STD_PARAMS \ ++ {"NTSC", 858, 525, 720, 480, 720 * 2, 30, V4L2_PIX_FMT_UYVY, \ ++ V4L2_FIELD_INTERLACED, 720 * 2, 720 * 2 * 480, \ ++ V4L2_COLORSPACE_SMPTE170M}, \ ++ {"PAL", 864, 625, 720, 576, 720 * 2, 25, V4L2_PIX_FMT_UYVY, \ ++ V4L2_FIELD_INTERLACED, 720 * 2, 720 * 2 * 480, \ ++ V4L2_COLORSPACE_SMPTE170M} ++ ++struct isp_std_config_params { ++ char name[30]; ++ unsigned int num_pixels; ++ unsigned int num_lines; ++ unsigned int active_pixels; ++ unsigned int active_lines; ++ unsigned int pitch; ++ unsigned int fps; ++ __u32 pixelformat; ++ enum v4l2_field field; ++ __u32 bytesperline; ++ __u32 sizeimage; ++ enum v4l2_colorspace colorspace; ++}; ++ ++static struct isp_std_config_params std_params[] = { ++ ISP_SD_STD_PARAMS ++}; ++#endif ++ ++static struct ispmodule ispmodule_obj = { ++ .isp_pipeline = OMAP_ISP_CCDC, ++ .isp_temp_state = ISP_BUF_INIT, ++ .applyCrop = 0, ++ .pix = { ++ .width = 176, ++ .height = 144, ++ .pixelformat = V4L2_PIX_FMT_UYVY, ++ .field = V4L2_FIELD_NONE, ++ .bytesperline = 176*2, ++ .colorspace = V4L2_COLORSPACE_JPEG, ++ .priv = 0, ++ }, ++#ifdef ENABLE_BT_656_CAPTURE ++ .capture_type = 0, ++ .current_field = 0, ++ .input_pixelformat = V4L2_PIX_FMT_UYVY, ++#endif ++}; ++ ++/* Structure for saving/restoring ISP module registers*/ ++ ++static struct isp_reg isp_reg_list[] = { ++ {ISP_SYSCONFIG, 0x0000}, ++ {ISP_IRQ0ENABLE, 0x0000}, ++ {ISP_IRQ1ENABLE, 0x0000}, ++ {ISP_TCTRL_GRESET_LENGTH, 0x0000}, ++ {ISP_TCTRL_PSTRB_REPLAY, 0x0000}, ++ {ISP_CTRL, 0x0000}, ++ {ISP_TCTRL_CTRL, 0x0000}, ++ {ISP_TCTRL_FRAME, 0x0000}, ++ {ISP_TCTRL_PSTRB_DELAY, 0x0000}, ++ {ISP_TCTRL_STRB_DELAY, 0x0000}, ++ {ISP_TCTRL_SHUT_DELAY, 0x0000}, ++ {ISP_TCTRL_PSTRB_LENGTH, 0x0000}, ++ {ISP_TCTRL_STRB_LENGTH, 0x0000}, ++ {ISP_TCTRL_SHUT_LENGTH, 0x0000}, ++ {ISP_CBUFF_SYSCONFIG, 0x0000}, ++ {ISP_CBUFF_IRQENABLE, 0x0000}, ++ {ISP_CBUFF0_CTRL, 0x0000}, ++ {ISP_CBUFF1_CTRL, 0x0000}, ++ {ISP_CBUFF0_START, 0x0000}, ++ {ISP_CBUFF1_START, 0x0000}, ++ {ISP_CBUFF0_END, 0x0000}, ++ {ISP_CBUFF1_END, 0x0000}, ++ {ISP_CBUFF0_WINDOWSIZE, 0x0000}, ++ {ISP_CBUFF1_WINDOWSIZE, 0x0000}, ++ {ISP_CBUFF0_THRESHOLD, 0x0000}, ++ {ISP_CBUFF1_THRESHOLD, 0x0000}, ++ {ISP_TOK_TERM, 0x0000} ++}; ++ ++/* ++ * ++ * V4L2 Handling ++ * ++ */ ++ ++/* Returns the index of the requested ID from the control structure array */ ++static int ++find_vctrl(int id) ++{ ++ int i; ++ ++ if (id < V4L2_CID_BASE) ++ return -EDOM; ++ ++ for (i = (ARRAY_SIZE(video_control) - 1); i >= 0; i--) ++ if (video_control[i].qc.id == id) ++ break; ++ if (i < 0) ++ i = -EINVAL; ++ return i; ++} ++ ++void isp_open(void) ++{ ++ ispccdc_request(); ++ isppreview_request(); ++ ispresizer_request(); ++ return; ++} ++EXPORT_SYMBOL(isp_open); ++ ++void isp_close(void) ++{ ++ ispccdc_free(); ++ isppreview_free(); ++ ispresizer_free(); ++ memset(&ispcroprect, 0, sizeof(ispcroprect)); ++ memset(&cur_rect, 0, sizeof(cur_rect)); ++ return; ++} ++EXPORT_SYMBOL(isp_close); ++ ++/* flag to check first time of isp_get */ ++static int off_mode; ++ ++int isp_set_sgdma_callback(struct isp_sgdma_state *sgdma_state, ++ isp_vbq_callback_ptr func_ptr) ++{ ++#ifdef USE_ISP_RESZ ++ if (ispmodule_obj.isp_pipeline & OMAP_ISP_RESIZER) { ++ isp_set_callback(CBK_RESZ_DONE, sgdma_state->callback, ++ func_ptr, sgdma_state->arg); ++ } ++#endif ++ ++#ifdef USE_ISP_PREVIEW ++ if (ispmodule_obj.isp_pipeline & OMAP_ISP_PREVIEW) { ++ isp_set_callback(CBK_PREV_DONE, sgdma_state->callback, ++ func_ptr, sgdma_state->arg); ++ } ++#endif ++ if (ispmodule_obj.isp_pipeline & OMAP_ISP_CCDC) { ++ isp_set_callback(CBK_CCDC_VD0, sgdma_state->callback, func_ptr, ++ sgdma_state->arg); ++ isp_set_callback(CBK_CCDC_VD1, sgdma_state->callback, func_ptr, ++ sgdma_state->arg); ++#ifndef ENABLE_BT_656_CAPTURE ++ isp_set_callback(CBK_LSC_ISR, NULL, NULL, NULL); ++#endif ++ } ++ isp_set_callback(CBK_HS_VS, sgdma_state->callback, func_ptr, ++ sgdma_state->arg); ++ return 0; ++} ++ ++/* ++ *Sets the callback for the ISP module done events. ++ * type : Type of the event for which callback is requested. ++ * callback : Method to be called as callback in the ISR context. ++ * arg1 : Argument to be passed when callback is called in ISR. ++ * arg2 : Argument to be passed when callback is called in ISR. ++ */ ++int isp_set_callback(enum isp_callback_type type, isp_callback_t callback, ++ isp_vbq_callback_ptr arg1, ++ void *arg2) ++{ ++ unsigned long irqflags = 0; ++ ++ if (callback == NULL) { ++ DPRINTK_ISPCTRL("ISP_ERR : Null Callback\n"); ++ return -EINVAL; ++ } ++ ++ spin_lock_irqsave(&isp_obj.lock, irqflags); ++ ispirq_obj.isp_callbk[type] = callback; ++ ispirq_obj.isp_callbk_arg1[type] = arg1; ++ ispirq_obj.isp_callbk_arg2[type] = arg2; ++ spin_unlock_irqrestore(&isp_obj.lock, irqflags); ++ ++ switch (type) { ++ case CBK_HS_VS: ++ omap_writel(IRQ0ENABLE_HS_VS_IRQ, ISP_IRQ0STATUS); ++ omap_writel(omap_readl(ISP_IRQ0ENABLE) | IRQ0ENABLE_HS_VS_IRQ, ++ ISP_IRQ0ENABLE); ++ break; ++ case CBK_PREV_DONE: ++ omap_writel(IRQ0ENABLE_PRV_DONE_IRQ, ISP_IRQ0STATUS); ++ omap_writel(omap_readl(ISP_IRQ0ENABLE) | ++ IRQ0ENABLE_PRV_DONE_IRQ, ++ ISP_IRQ0ENABLE); ++ break; ++ case CBK_RESZ_DONE: ++ omap_writel(IRQ0ENABLE_RSZ_DONE_IRQ, ISP_IRQ0STATUS); ++ omap_writel(omap_readl(ISP_IRQ0ENABLE) | ++ IRQ0ENABLE_RSZ_DONE_IRQ, ++ ISP_IRQ0ENABLE); ++ break; ++ case CBK_MMU_ERR: ++ omap_writel(omap_readl(ISP_IRQ0ENABLE) | ++ IRQ0ENABLE_MMU_ERR_IRQ, ++ ISP_IRQ0ENABLE); ++ ++ omap_writel(omap_readl(ISPMMU_IRQENABLE) | ++ IRQENABLE_MULTIHITFAULT | ++ IRQENABLE_TWFAULT | ++ IRQENABLE_EMUMISS | ++ IRQENABLE_TRANSLNFAULT | ++ IRQENABLE_TLBMISS, ++ ISPMMU_IRQENABLE); ++ break; ++ case CBK_H3A_AWB_DONE: ++ omap_writel(IRQ0ENABLE_H3A_AWB_DONE_IRQ, ISP_IRQ0STATUS); ++ omap_writel(omap_readl(ISP_IRQ0ENABLE) | ++ IRQ0ENABLE_H3A_AWB_DONE_IRQ, ++ ISP_IRQ0ENABLE); ++ break; ++ case CBK_H3A_AF_DONE: ++ omap_writel(IRQ0ENABLE_H3A_AF_DONE_IRQ, ISP_IRQ0STATUS); ++ omap_writel(omap_readl(ISP_IRQ0ENABLE)| ++ IRQ0ENABLE_H3A_AF_DONE_IRQ, ++ ISP_IRQ0ENABLE); ++ break; ++ case CBK_HIST_DONE: ++ omap_writel(IRQ0ENABLE_HIST_DONE_IRQ, ISP_IRQ0STATUS); ++ omap_writel(omap_readl(ISP_IRQ0ENABLE) | ++ IRQ0ENABLE_HIST_DONE_IRQ, ++ ISP_IRQ0ENABLE); ++ break; ++ case CBK_LSC_ISR: ++ omap_writel(IRQ0ENABLE_CCDC_LSC_DONE_IRQ | ++ IRQ0ENABLE_CCDC_LSC_PREF_COMP_IRQ | ++ IRQ0ENABLE_CCDC_LSC_PREF_ERR_IRQ, ++ ISP_IRQ0STATUS); ++ omap_writel(omap_readl(ISP_IRQ0ENABLE) | ++ IRQ0ENABLE_CCDC_LSC_DONE_IRQ | ++ IRQ0ENABLE_CCDC_LSC_PREF_COMP_IRQ | ++ IRQ0ENABLE_CCDC_LSC_PREF_ERR_IRQ, ++ ISP_IRQ0ENABLE); ++ break; ++ default: ++ break; ++ }; ++ ++ return 0; ++} ++EXPORT_SYMBOL(isp_set_callback); ++ ++/** ++ * isp_unset_callback - Clears the callback for the ISP module done events. ++ * @type: Type of the event for which callback to be cleared. ++ * ++ * This function clears a callback function for a done event in the ISP ++ * module, and disables the corresponding interrupt. ++ **/ ++int isp_unset_callback(enum isp_callback_type type) ++{ ++ unsigned long irqflags = 0; ++ ++ spin_lock_irqsave(&isp_obj.lock, irqflags); ++ ispirq_obj.isp_callbk[type] = NULL; ++ ispirq_obj.isp_callbk_arg1[type] = NULL; ++ ispirq_obj.isp_callbk_arg2[type] = NULL; ++ spin_unlock_irqrestore(&isp_obj.lock, irqflags); ++ ++ switch (type) { ++ case CBK_CCDC_VD0: ++ omap_writel((omap_readl(ISP_IRQ0ENABLE)) & ++ ~IRQ0ENABLE_CCDC_VD0_IRQ, ++ ISP_IRQ0ENABLE); ++ break; ++ case CBK_CCDC_VD1: ++ omap_writel((omap_readl(ISP_IRQ0ENABLE)) & ++ ~IRQ0ENABLE_CCDC_VD1_IRQ, ++ ISP_IRQ0ENABLE); ++ break; ++ case CBK_PREV_DONE: ++ omap_writel((omap_readl(ISP_IRQ0ENABLE)) & ++ ~IRQ0ENABLE_PRV_DONE_IRQ, ++ ISP_IRQ0ENABLE); ++ break; ++ case CBK_RESZ_DONE: ++ omap_writel((omap_readl(ISP_IRQ0ENABLE)) & ++ ~IRQ0ENABLE_RSZ_DONE_IRQ, ++ ISP_IRQ0ENABLE); ++ break; ++ case CBK_MMU_ERR: ++ omap_writel(omap_readl(ISPMMU_IRQENABLE) & ++ ~(IRQENABLE_MULTIHITFAULT | ++ IRQENABLE_TWFAULT | ++ IRQENABLE_EMUMISS | ++ IRQENABLE_TRANSLNFAULT | ++ IRQENABLE_TLBMISS), ++ ISPMMU_IRQENABLE); ++ break; ++ case CBK_H3A_AWB_DONE: ++ omap_writel((omap_readl(ISP_IRQ0ENABLE)) & ++ ~IRQ0ENABLE_H3A_AWB_DONE_IRQ, ++ ISP_IRQ0ENABLE); ++ break; ++ case CBK_H3A_AF_DONE: ++ omap_writel((omap_readl(ISP_IRQ0ENABLE))& ++ (~IRQ0ENABLE_H3A_AF_DONE_IRQ),ISP_IRQ0ENABLE); ++ break; ++ case CBK_HIST_DONE: ++ omap_writel((omap_readl(ISP_IRQ0ENABLE)) & ++ ~IRQ0ENABLE_HIST_DONE_IRQ, ++ ISP_IRQ0ENABLE); ++ break; ++ case CBK_HS_VS: ++ omap_writel((omap_readl(ISP_IRQ0ENABLE)) & ++ ~IRQ0ENABLE_HS_VS_IRQ, ++ ISP_IRQ0ENABLE); ++ break; ++ case CBK_LSC_ISR: ++ omap_writel(omap_readl(ISP_IRQ0ENABLE) & ++ ~(IRQ0ENABLE_CCDC_LSC_DONE_IRQ | ++ IRQ0ENABLE_CCDC_LSC_PREF_COMP_IRQ | ++ IRQ0ENABLE_CCDC_LSC_PREF_ERR_IRQ), ++ ISP_IRQ0ENABLE); ++ break; ++ default: ++ break; ++ }; ++ return 0; ++} ++EXPORT_SYMBOL(isp_unset_callback); ++ ++/** ++ * isp_request_interface - Requests an ISP interface type (parallel or serial). ++ * @if_t: Type of requested ISP interface (parallel or serial). ++ * ++ * This function requests for allocation of an ISP interface type. ++ **/ ++int isp_request_interface(enum isp_interface_type if_t) ++{ ++ if (isp_obj.if_status & if_t) { ++ DPRINTK_ISPCTRL("ISP_ERR : Requested Interface already \ ++ allocated\n"); ++ goto err_ebusy; ++ } ++ if ((isp_obj.if_status == (ISP_PARLL | ISP_CSIA)) ++ || isp_obj.if_status == (ISP_CSIA | ISP_CSIB)) { ++ DPRINTK_ISPCTRL("ISP_ERR : No Free interface now\n"); ++ goto err_ebusy; ++ } ++ ++ if (((isp_obj.if_status == ISP_PARLL) && (if_t == ISP_CSIA)) || ++ ((isp_obj.if_status == ISP_CSIA) && ++ (if_t == ISP_PARLL)) || ++ ((isp_obj.if_status == ISP_CSIA) && ++ (if_t == ISP_CSIB)) || ++ ((isp_obj.if_status == ISP_CSIB) && ++ (if_t == ISP_CSIA)) || ++ (isp_obj.if_status == 0)) { ++ isp_obj.if_status |= if_t; ++ return 0; ++ } else { ++ DPRINTK_ISPCTRL("ISP_ERR : Invalid Combination Serial- \ ++ Parallel interface\n"); ++ return -EINVAL; ++ } ++ ++err_ebusy: ++ return -EBUSY; ++} ++EXPORT_SYMBOL(isp_request_interface); ++ ++/** ++ * isp_free_interface - Frees an ISP interface type (parallel or serial). ++ * @if_t: Type of ISP interface to be freed (parallel or serial). ++ * ++ * This function frees the allocation of an ISP interface type. ++ **/ ++int isp_free_interface(enum isp_interface_type if_t) ++{ ++ isp_obj.if_status &= ~if_t; ++ return 0; ++} ++EXPORT_SYMBOL(isp_free_interface); ++ ++/** ++ * isp_set_xclk - Configures the specified cam_xclk to the desired frequency. ++ * @xclk: Desired frequency of the clock in Hz. ++ * @xclksel: XCLK to configure (0 = A, 1 = B). ++ * ++ * Configures the specified MCLK divisor in the ISP timing control register ++ * (TCTRL_CTRL) to generate the desired xclk clock value. ++ * ++ * Divisor = CM_CAM_MCLK_HZ / xclk ++ * ++ * Returns the final frequency that is actually being generated ++ **/ ++u32 isp_set_xclk(u32 xclk, u8 xclksel) ++{ ++ u32 divisor; ++ u32 currentxclk; ++ ++ if (xclk == CM_CAM_MCLK_HZ) { ++ divisor = (xclksel == 0) ? ISPTCTRL_CTRL_DIVA_Bypass : ++ ISPTCTRL_CTRL_DIVB_Bypass; ++ currentxclk = CM_CAM_MCLK_HZ; ++ } else { ++ if (xclk >= 2) { ++ divisor = CM_CAM_MCLK_HZ / xclk; ++ divisor &= (xclksel == 0) ? ISPTCTRL_CTRL_DIVA_Bypass : ++ ISPTCTRL_CTRL_DIVB_Bypass; ++ currentxclk = CM_CAM_MCLK_HZ / divisor; ++ } else { ++ divisor = xclk; ++ currentxclk = 0; ++ } ++ } ++ ++ switch (xclksel) { ++ case 0: ++ omap_writel((omap_readl(ISP_TCTRL_CTRL) & ++ ~ISPTCTRL_CTRL_DIVA_Bypass) | ++ (divisor << ISPTCTRL_CTRL_DIVA_SHIFT), ++ ISP_TCTRL_CTRL); ++ DPRINTK_ISPCTRL("isp_set_xclk(): cam_xclka set to %x Hz\n", ++ currentxclk); ++ break; ++ case 1: ++ omap_writel((omap_readl(ISP_TCTRL_CTRL) & ++ ~ISPTCTRL_CTRL_DIVB_Bypass) | ++ (divisor << ISPTCTRL_CTRL_DIVB_SHIFT), ++ ISP_TCTRL_CTRL); ++ DPRINTK_ISPCTRL("isp_set_xclk(): cam_xclkb set to %x Hz\n", ++ currentxclk); ++ break; ++ default: ++ DPRINTK_ISPCTRL("ISP_ERR: isp_set_xclk(): Invalid requested " ++ "xclk. Must be 0 (A) or 1 (B)." ++ "\n"); ++ return -EINVAL; ++ } ++ ++ return currentxclk; ++} ++EXPORT_SYMBOL(isp_set_xclk); ++ ++/** ++ * isp_get_xclk - Returns the frequency in Hz of the desired cam_xclk. ++ * @xclksel: XCLK to retrieve (0 = A, 1 = B). ++ * ++ * This function returns the External Clock (XCLKA or XCLKB) value generated ++ * by the ISP. ++ **/ ++u32 isp_get_xclk(u8 xclksel) ++{ ++ u32 xclkdiv; ++ u32 xclk; ++ ++ switch (xclksel) { ++ case 0: ++ xclkdiv = omap_readl(ISP_TCTRL_CTRL) & ISPTCTRL_CTRL_DIVA_MASK; ++ xclkdiv = xclkdiv >> ISPTCTRL_CTRL_DIVA_SHIFT; ++ break; ++ case 1: ++ xclkdiv = omap_readl(ISP_TCTRL_CTRL) & ISPTCTRL_CTRL_DIVB_MASK; ++ xclkdiv = xclkdiv >> ISPTCTRL_CTRL_DIVB_SHIFT; ++ break; ++ default: ++ DPRINTK_ISPCTRL("ISP_ERR: isp_get_xclk(): Invalid requested " ++ "xclk. Must be 0 (A) or 1 (B)." ++ "\n"); ++ return -EINVAL; ++ } ++ ++ switch (xclkdiv) { ++ case 0: ++ case 1: ++ xclk = 0; ++ break; ++ case 0x1f: ++ xclk = CM_CAM_MCLK_HZ; ++ break; ++ default: ++ xclk = CM_CAM_MCLK_HZ / xclkdiv; ++ } ++ ++ return xclk; ++} ++EXPORT_SYMBOL(isp_get_xclk); ++ ++/** ++ * isp_power_settings - Sysconfig settings, for Power Management. ++ * @isp_sysconfig: Structure containing the power settings for ISP to configure ++ * ++ * Sets the power settings for the ISP, and SBL bus. ++ **/ ++void isp_power_settings(struct isp_sysc isp_sysconfig) ++{ ++ if (isp_sysconfig.idle_mode) { ++ omap_writel(ISP_SYSCONFIG_AUTOIDLE | ++ (ISP_SYSCONFIG_MIdleMode_SmartStandBy << ++ ISP_SYSCONFIG_MIdleMode_SHIFT), ++ ISP_SYSCONFIG); ++ ++ omap_writel(ISPMMU_AUTOIDLE | (ISPMMU_SIdlemode_Smartidle << ++ ISPMMU_SIdlemode_Shift), ++ ISPMMU_SYSCONFIG); ++/// if (is_sil_rev_equal_to(OMAP3430_REV_ES1_0)) { ++ omap_writel(ISPCSI1_AUTOIDLE | ++ (ISPCSI1_MIdleMode_SmartStandBy << ++ ISPCSI1_MIdleMode_Shift), ++ ISP_CSIA_SYSCONFIG); ++ omap_writel(ISPCSI1_AUTOIDLE | ++ (ISPCSI1_MIdleMode_SmartStandBy << ++ ISPCSI1_MIdleMode_Shift), ++ ISP_CSIB_SYSCONFIG); ++/// } ++ omap_writel(ISPCTRL_SBL_AutoIdle, ISP_CTRL); ++ ++ } else { ++ omap_writel(ISP_SYSCONFIG_AUTOIDLE | ++ (ISP_SYSCONFIG_MIdleMode_ForceStandBy << ++ ISP_SYSCONFIG_MIdleMode_SHIFT), ISP_SYSCONFIG); ++ ++ omap_writel(ISPMMU_AUTOIDLE | ++ (ISPMMU_SIdlemode_Noidle << ISPMMU_SIdlemode_Shift), ++ ISPMMU_SYSCONFIG); ++/// if (is_sil_rev_equal_to(OMAP3430_REV_ES1_0)) { ++ omap_writel(ISPCSI1_AUTOIDLE | ++ (ISPCSI1_MIdleMode_ForceStandBy << ++ ISPCSI1_MIdleMode_Shift), ISP_CSIA_SYSCONFIG); ++ ++ omap_writel(ISPCSI1_AUTOIDLE | ++ (ISPCSI1_MIdleMode_ForceStandBy << ++ ISPCSI1_MIdleMode_Shift), ISP_CSIB_SYSCONFIG); ++/// } ++ ++ omap_writel(ISPCTRL_SBL_AutoIdle, ISP_CTRL); ++ ++ } ++ ++ ++} ++EXPORT_SYMBOL(isp_power_settings); ++ ++/** ++ * isp_configure_interface - Configures ISP Control I/F related parameters. ++ * @config: Structure containing the desired configuration for the ISP. ++ * ++ * Configures ISP control register (ISP_CTRL) with the values specified inside ++ * the config structure. Controls: ++ * - Selection of parallel or serial input to the preview hardware. ++ * - Data lane shifter. ++ * - Pixel clock polarity. ++ * - 8 to 16-bit bridge at the input of CCDC module. ++ * - HS or VS synchronization signal detection ++ **/ ++int isp_configure_interface(struct isp_interface_config *config) ++{ ++ u32 ispctrl_val = omap_readl(ISP_CTRL); ++ u32 ispccdc_vdint_val; ++ ++ ispctrl_val &= (ISPCTRL_PAR_SER_CLK_SEL_MASK); ++ ispctrl_val |= config->ccdc_par_ser; ++ ispctrl_val &= ISPCTRL_SHIFT_MASK; ++ ispctrl_val |= (config->dataline_shift << ISPCTRL_SHIFT_SHIFT); ++ ispctrl_val &= ~ISPCTRL_PAR_CLK_POL_INV; ++ ispctrl_val |= (config->para_clk_pol << ISPCTRL_PAR_CLK_POL_SHIFT); ++ ispctrl_val &= ~ISPCTRL_PAR_BRIDGE_BENDIAN; ++ ispctrl_val |= (config->par_bridge << ISPCTRL_PAR_BRIDGE_SHIFT); ++ ispctrl_val &= ~(ISPCTRL_SYNC_DETECT_VSRISE); ++ ispctrl_val |= (config->hsvs_syncdetect << ISPCTRL_SYNC_DETECT_SHIFT); ++ ++ omap_writel(ispctrl_val, ISP_CTRL); ++ ++ ispccdc_vdint_val = omap_readl(ISPCCDC_VDINT); ++ ispccdc_vdint_val &= ~(ISPCCDC_VDINT_0_MASK << ISPCCDC_VDINT_0_SHIFT); ++ ispccdc_vdint_val &= ~(ISPCCDC_VDINT_1_MASK << ISPCCDC_VDINT_1_SHIFT); ++ omap_writel((config->vdint0_timing << ISPCCDC_VDINT_0_SHIFT) | ++ (config->vdint1_timing << ++ ISPCCDC_VDINT_1_SHIFT), ++ ISPCCDC_VDINT); ++ return 0; ++} ++EXPORT_SYMBOL(isp_configure_interface); ++ ++/** ++ * isp_CCDC_VD01_enable - Enables VD0 and VD1 IRQs. ++ * ++ * Sets VD0 and VD1 bits in IRQ0STATUS to reset the flag, and sets them in ++ * IRQ0ENABLE to enable the corresponding IRQs. ++ **/ ++void isp_CCDC_VD01_enable(void) ++{ ++ omap_writel(IRQ0STATUS_CCDC_VD0_IRQ | IRQ0STATUS_CCDC_VD1_IRQ, ++ ISP_IRQ0STATUS); ++ omap_writel(omap_readl(ISP_IRQ0ENABLE) | IRQ0ENABLE_CCDC_VD0_IRQ | ++ IRQ0ENABLE_CCDC_VD1_IRQ, ISP_IRQ0ENABLE); ++} ++ ++/** ++ * isp_CCDC_VD01_disable - Disables VD0 and VD1 IRQs. ++ * ++ * Clears VD0 and VD1 bits in IRQ0ENABLE register. ++ **/ ++void isp_CCDC_VD01_disable(void) ++{ ++ omap_writel(omap_readl(ISP_IRQ0ENABLE) & ++ ~(IRQ0ENABLE_CCDC_VD0_IRQ | IRQ0ENABLE_CCDC_VD1_IRQ), ++ ISP_IRQ0ENABLE); ++} ++ ++/** ++ * omap34xx_isp_isr - Interrupt Service Routine for Camera ISP module. ++ * @irq: Not used currently. ++ * @ispirq_disp: The object that is passed while request_irq is called. ++ * This is the ispirq_obj object containing info on the callback. ++ * ++ * Handles the corresponding callback if plugged in. ++ **/ ++static irqreturn_t omap34xx_isp_isr(int irq, void *ispirq_disp) ++{ ++ struct ispirq *irqdis = (struct ispirq *) ispirq_disp; ++ u32 irqstatus = 0; ++ unsigned long irqflags = 0; ++ u8 is_irqhandled = 0; ++ ++ irqstatus = omap_readl(ISP_IRQ0STATUS); ++ ++ spin_lock_irqsave(&isp_obj.lock, irqflags); ++ ++ if ((irqstatus & MMU_ERR) == MMU_ERR) { ++ if (irqdis->isp_callbk[CBK_MMU_ERR]) ++ irqdis->isp_callbk[CBK_MMU_ERR](irqstatus, ++ irqdis->isp_callbk_arg1[CBK_MMU_ERR], ++ irqdis->isp_callbk_arg2[CBK_MMU_ERR]); ++ is_irqhandled = 1; ++ goto out; ++ } ++ ++ if ((irqstatus & CCDC_VD1) == CCDC_VD1) { ++ if (irqdis->isp_callbk[CBK_CCDC_VD1]) ++ irqdis->isp_callbk[CBK_CCDC_VD1](CCDC_VD1, ++ irqdis->isp_callbk_arg1[CBK_CCDC_VD1], ++ irqdis->isp_callbk_arg2[CBK_CCDC_VD1]); ++ is_irqhandled = 1; ++ } ++ ++ if ((irqstatus & CCDC_VD0) == CCDC_VD0) { ++ if (irqdis->isp_callbk[CBK_CCDC_VD0]) ++ irqdis->isp_callbk[CBK_CCDC_VD0](CCDC_VD0, ++ irqdis->isp_callbk_arg1[CBK_CCDC_VD0], ++ irqdis->isp_callbk_arg2[CBK_CCDC_VD0]); ++ is_irqhandled = 1; ++ } ++ ++ if ((irqstatus & PREV_DONE) == PREV_DONE) { ++ if (irqdis->isp_callbk[CBK_PREV_DONE]) ++ irqdis->isp_callbk[CBK_PREV_DONE](PREV_DONE, ++ irqdis->isp_callbk_arg1[CBK_PREV_DONE], ++ irqdis->isp_callbk_arg2[CBK_PREV_DONE]); ++ is_irqhandled = 1; ++ } ++ ++ if ((irqstatus & RESZ_DONE) == RESZ_DONE) { ++ if (irqdis->isp_callbk[CBK_RESZ_DONE]) ++ irqdis->isp_callbk[CBK_RESZ_DONE](RESZ_DONE, ++ irqdis->isp_callbk_arg1[CBK_RESZ_DONE], ++ irqdis->isp_callbk_arg2[CBK_RESZ_DONE]); ++ is_irqhandled = 1; ++ } ++ ++ if ((irqstatus & H3A_AWB_DONE) == H3A_AWB_DONE) { ++ if (irqdis->isp_callbk[CBK_H3A_AWB_DONE]) ++ irqdis->isp_callbk[CBK_H3A_AWB_DONE](H3A_AWB_DONE, ++ irqdis->isp_callbk_arg1[CBK_H3A_AWB_DONE], ++ irqdis->isp_callbk_arg2[CBK_H3A_AWB_DONE]); ++ is_irqhandled = 1; ++ } ++ ++ if ((irqstatus & HIST_DONE) == HIST_DONE) { ++ if (irqdis->isp_callbk[CBK_HIST_DONE]) ++ irqdis->isp_callbk[CBK_HIST_DONE](HIST_DONE, ++ irqdis->isp_callbk_arg1[CBK_HIST_DONE], ++ irqdis->isp_callbk_arg2[CBK_HIST_DONE]); ++ is_irqhandled = 1; ++ } ++ ++ if ((irqstatus & HS_VS) == HS_VS) { ++ if (irqdis->isp_callbk[CBK_HS_VS]) ++ irqdis->isp_callbk[CBK_HS_VS](HS_VS, ++ irqdis->isp_callbk_arg1[CBK_HS_VS], ++ irqdis->isp_callbk_arg2[CBK_HS_VS]); ++ is_irqhandled = 1; ++ } ++ ++ if ((irqstatus & H3A_AF_DONE) == H3A_AF_DONE){ ++ if (irqdis->isp_callbk[CBK_H3A_AF_DONE]) ++ irqdis->isp_callbk[CBK_H3A_AF_DONE](H3A_AF_DONE, ++ irqdis->isp_callbk_arg1[CBK_H3A_AF_DONE], ++ irqdis->isp_callbk_arg2[CBK_H3A_AF_DONE]); ++ is_irqhandled = 1; ++ } ++ ++ if (irqstatus & LSC_PRE_ERR) { ++ DPRINTK_ISPCTRL("isp_sr: LSC_PRE_ERR \n"); ++ omap_writel(irqstatus, ISP_IRQ0STATUS); ++ ispccdc_enable_lsc(0); ++ ispccdc_enable_lsc(1); ++ spin_unlock_irqrestore(&isp_obj.lock, irqflags); ++ return IRQ_HANDLED; ++ } ++out: ++ omap_writel(irqstatus, ISP_IRQ0STATUS); ++ spin_unlock_irqrestore(&isp_obj.lock, irqflags); ++ ++ if (is_irqhandled) ++ return IRQ_HANDLED; ++ else ++ return IRQ_NONE; ++} ++#ifdef CONFIG_TRACK_RESOURCES ++/* device name needed for resource tracking layer */ ++struct device_driver camera_drv = { ++ .name = "camera" ++}; ++ ++struct device camera_dev = { ++ .driver = &camera_drv, ++}; ++#endif ++ ++void isp_set_pipeline(int soc_type) ++{ ++ ispmodule_obj.isp_pipeline |= OMAP_ISP_CCDC; ++ ++ /* 1- Smart sensor, 0 - Raw sensor */ ++ if (!soc_type) ++ ispmodule_obj.isp_pipeline |= (OMAP_ISP_PREVIEW | ++ OMAP_ISP_RESIZER); ++ ++ return; ++} ++ ++void ++omapisp_unset_callback() ++{ ++ isp_unset_callback(CBK_HS_VS); ++#ifdef USE_ISP_RESZ ++ /* This has to occur before the vysnc of the intended frame comes */ ++ if (ispmodule_obj.isp_pipeline & OMAP_ISP_RESIZER) ++ isp_unset_callback(CBK_RESZ_DONE); ++#endif ++#ifdef USE_ISP_PREVIEW ++ if (ispmodule_obj.isp_pipeline & OMAP_ISP_PREVIEW) ++ isp_unset_callback(CBK_PREV_DONE); ++#endif ++ if (ispmodule_obj.isp_pipeline & OMAP_ISP_CCDC) { ++ isp_unset_callback(CBK_CCDC_VD0); ++ isp_unset_callback(CBK_CCDC_VD1); ++ isp_unset_callback(CBK_LSC_ISR); ++ } ++ omap_writel(omap_readl(ISP_IRQ0STATUS) | ISP_INT_CLR, ISP_IRQ0STATUS); ++} ++ ++void isp_start(void) ++{ ++ /* start the needed isp components assuming these components ++ * are configured correctly. ++ */ ++#ifdef USE_ISP_PREVIEW ++ if (ispmodule_obj.isp_pipeline & OMAP_ISP_PREVIEW) ++ isppreview_enable(1); ++#endif ++ return ; ++} ++EXPORT_SYMBOL(isp_start); ++ ++void isp_stop() ++{ ++ int timeout; ++ ++ spin_lock(&isp_obj.isp_temp_buf_lock); ++ ispmodule_obj.isp_temp_state = ISP_FREE_RUNNING; ++ spin_unlock(&isp_obj.isp_temp_buf_lock); ++ omapisp_unset_callback(); ++ ++#ifdef USE_ISP_RESZ ++ if (ispmodule_obj.isp_pipeline & OMAP_ISP_RESIZER) { ++ ispresizer_enable(0); ++ timeout = 0; ++ while (ispresizer_busy() && (timeout < 20)) { ++ timeout++; ++ schedule(); ++ } ++ } ++#endif ++#ifdef USE_ISP_PREVIEW ++ if (ispmodule_obj.isp_pipeline & OMAP_ISP_PREVIEW) { ++ isppreview_enable(0); ++ timeout = 0; ++ while (isppreview_busy() && (timeout < 20)) { ++ timeout++; ++ schedule(); ++ } ++ } ++#endif ++ if (ispmodule_obj.isp_pipeline & OMAP_ISP_CCDC) { ++ ispccdc_enable(0); ++ timeout = 0; ++ while (ispccdc_busy() && (timeout < 20)) { ++ timeout++; ++ schedule(); ++ } ++ } ++ if (ispccdc_busy() || isppreview_busy() || ispresizer_busy()) { ++ isp_save_ctx(); ++ omap_writel(omap_readl(ISP_SYSCONFIG) | ++ ISP_SYSCONFIG_SOFTRESET, ISP_SYSCONFIG); ++ timeout = 0; ++ while ((!(omap_readl(ISP_SYSSTATUS) & 0x1)) && timeout < 40) { ++ timeout++; ++ mdelay(1); ++ } ++ isp_restore_ctx(); ++ } ++} ++EXPORT_SYMBOL(isp_stop); ++ ++void isp_set_buf(struct isp_sgdma_state *sgdma_state) ++{ ++#ifdef USE_ISP_RESZ ++ /* This has to occur before the vysnc of the intended frame comes */ ++ if (ispmodule_obj.isp_pipeline & OMAP_ISP_RESIZER) { ++ ispresizer_set_outaddr(sgdma_state->isp_addr); ++ } else ++#endif ++#ifdef USE_ISP_PREVIEW ++ if (ispmodule_obj.isp_pipeline & OMAP_ISP_PREVIEW) { ++ isppreview_set_outaddr(sgdma_state->isp_addr); ++ } else ++#endif ++ if (ispmodule_obj.isp_pipeline & OMAP_ISP_CCDC) { ++ ispccdc_set_outaddr(sgdma_state->isp_addr); ++ } ++} ++ ++void isp_calc_pipeline(struct v4l2_pix_format *pix_input, ++ struct v4l2_pix_format *pix_output) ++{ ++ ++ ispmodule_obj.isp_pipeline = OMAP_ISP_CCDC; ++ ++#ifdef ENABLE_BT_656_CAPTURE ++ if (pix_input->field == V4L2_FIELD_NONE) ++ ispmodule_obj.capture_type = 0; /* Progressive */ ++ else ++ ispmodule_obj.capture_type = 1; /* Interlaced */ ++ ++ ispmodule_obj.input_pixelformat = pix_input->pixelformat; ++#endif ++ ++ if ((pix_input->pixelformat == V4L2_PIX_FMT_SGRBG10) && ++ (pix_output->pixelformat != V4L2_PIX_FMT_SGRBG10)) { ++ ispmodule_obj.isp_pipeline |= (OMAP_ISP_PREVIEW | ++ OMAP_ISP_RESIZER); ++ ispccdc_config_datapath(CCDC_RAW, CCDC_OTHERS_VP); ++ isppreview_config_datapath(PRV_RAW_CCDC, ++ PREVIEW_RSZ); ++ ispresizer_config_datapath(RSZ_OTFLY_YUV); ++ } else { ++ if (pix_input->pixelformat == V4L2_PIX_FMT_SGRBG10) ++ ispccdc_config_datapath(CCDC_RAW, CCDC_OTHERS_MEM); ++ else ++#ifndef ENABLE_BT_656_CAPTURE ++ ispccdc_config_datapath(CCDC_YUV_SYNC, CCDC_OTHERS_MEM); ++#else ++ ispccdc_config_datapath(CCDC_YUV_BT, CCDC_OTHERS_MEM); ++#endif ++ } ++ return; ++} ++ ++ ++void isp_config_pipeline(struct v4l2_pix_format *pix_input, ++ struct v4l2_pix_format *pix_output) ++{ ++ ispccdc_config_size(ispmodule_obj.ccdc_input_width, ++ ispmodule_obj.ccdc_input_height, ++ ispmodule_obj.ccdc_output_width, ++ ispmodule_obj.ccdc_output_height); ++ ++ if (ispmodule_obj.isp_pipeline & OMAP_ISP_PREVIEW) ++ isppreview_config_size(ispmodule_obj.preview_input_width, ++ ispmodule_obj.preview_input_height, ++ ispmodule_obj.preview_output_width, ++ ispmodule_obj.preview_output_height); ++ ++ if (ispmodule_obj.isp_pipeline & OMAP_ISP_RESIZER) ++ ispresizer_config_size(ispmodule_obj.resizer_input_width, ++ ispmodule_obj.resizer_input_height, ++ ispmodule_obj.resizer_output_width, ++ ispmodule_obj.resizer_output_height); ++ ++#ifdef ENABLE_BT_656_CAPTURE ++ if (pix_input->pixelformat == V4L2_PIX_FMT_UYVY) ++ ispccdc_config_y8pos(Y8POS_ODD); ++ else if (pix_input->pixelformat == V4L2_PIX_FMT_YUYV) ++ ispccdc_config_y8pos(Y8POS_EVEN); ++ ++ if (((pix_input->pixelformat == V4L2_PIX_FMT_UYVY) && ++ (pix_output->pixelformat == V4L2_PIX_FMT_UYVY)) || ++ ((pix_input->pixelformat == V4L2_PIX_FMT_YUYV) && ++ (pix_output->pixelformat == V4L2_PIX_FMT_YUYV))) ++ /* input and output formats are in same order */ ++ ispccdc_config_byteswap(0); ++ else if (((pix_input->pixelformat == V4L2_PIX_FMT_YUYV) && ++ (pix_output->pixelformat == V4L2_PIX_FMT_UYVY)) || ++ ((pix_input->pixelformat == V4L2_PIX_FMT_UYVY) && ++ (pix_output->pixelformat == V4L2_PIX_FMT_YUYV))) ++ /* input and output formats are in reverse order */ ++ ispccdc_config_byteswap(1); ++ ++ /* Configure Pitch */ ++ ispccdc_config_outlineoffset(ispmodule_obj.pix.bytesperline, 0, 0); ++#endif ++ ++ if (pix_output->pixelformat == V4L2_PIX_FMT_UYVY) { ++ isppreview_config_ycpos(YCPOS_YCrYCb); ++#ifdef USE_ISP_RESZ ++ ispresizer_config_ycpos(0); ++#endif ++ } else { ++ isppreview_config_ycpos(YCPOS_CrYCbY); ++#ifdef USE_ISP_RESZ ++ ispresizer_config_ycpos(1); ++#endif ++ } ++ ++ return; ++} ++ ++/* Callback for interrupt completion*/ ++void isp_vbq_done(unsigned long status, isp_vbq_callback_ptr arg1, void *arg2) ++{ ++ struct videobuf_buffer *vb = (struct videobuf_buffer *) arg2; ++ int notify = 0; ++ int rval = 0; ++ unsigned long flags; ++#ifdef ENABLE_BT_656_CAPTURE ++ unsigned long fld_stat = (omap_readl(ISPCCDC_SYN_MODE) >> 15) & 0x1; ++#endif ++ switch (status) { ++ case CCDC_VD0: ++#ifdef ENABLE_BT_656_CAPTURE ++ if (ispmodule_obj.capture_type) { ++ spin_lock(&isp_obj.isp_temp_buf_lock); ++ if (ispmodule_obj.current_field != fld_stat) { ++ if (fld_stat == 0) ++ ispmodule_obj.current_field = fld_stat; ++ ++ spin_unlock(&isp_obj.isp_temp_buf_lock); ++ return; ++ } ++ spin_unlock(&isp_obj.isp_temp_buf_lock); ++ ++ if (fld_stat == 0) { /* Skip even fields */ ++ return; ++ } ++ } ++#endif ++ ++ ispccdc_config_shadow_registers(); ++ if ((ispmodule_obj.isp_pipeline & OMAP_ISP_RESIZER) || ++ (ispmodule_obj.isp_pipeline & OMAP_ISP_PREVIEW)) ++ return; ++ else { ++ spin_lock(&isp_obj.isp_temp_buf_lock); ++ if (ispmodule_obj.isp_temp_state != ISP_BUF_INIT) { ++ spin_unlock(&isp_obj.isp_temp_buf_lock); ++ return; ++ ++ } else { ++ spin_unlock(&isp_obj.isp_temp_buf_lock); ++ break; ++ } ++ } ++ break; ++ case CCDC_VD1: ++#ifdef ENABLE_BT_656_CAPTURE ++ if (ispmodule_obj.capture_type) { ++ spin_lock(&isp_obj.isp_temp_buf_lock); ++ if (ispmodule_obj.current_field != fld_stat) { ++ if (fld_stat == 0) ++ ispmodule_obj.current_field = fld_stat; ++ ++ spin_unlock(&isp_obj.isp_temp_buf_lock); ++ return; ++ } ++ ++ if (fld_stat == 0) { /* Skip even fields */ ++ return; ++ } ++ ++ spin_unlock(&isp_obj.isp_temp_buf_lock); ++ } ++#endif ++ ++ if ((ispmodule_obj.isp_pipeline & OMAP_ISP_RESIZER) || ++ (ispmodule_obj.isp_pipeline & OMAP_ISP_PREVIEW)) ++ return; ++ spin_lock(&isp_obj.isp_temp_buf_lock); ++ if (ispmodule_obj.isp_temp_state == ISP_BUF_INIT) { ++ spin_unlock(&isp_obj.isp_temp_buf_lock); ++ ispccdc_enable(0); ++ return; ++ } ++ spin_unlock(&isp_obj.isp_temp_buf_lock); ++ return; ++ break; ++ ++#ifdef USE_ISP_PREVIEW ++ case PREV_DONE: ++ if (ispmodule_obj.isp_pipeline & OMAP_ISP_RESIZER) { ++ if (!ispmodule_obj.applyCrop && ++ (ispmodule_obj.isp_temp_state == ++ ISP_BUF_INIT)) ++ ispresizer_enable(1); ++ if (ispmodule_obj.applyCrop && !ispresizer_busy()) { ++ ispresizer_enable(0); ++ ispresizer_applycrop(); ++ ispmodule_obj.applyCrop = 0; ++ } ++ } ++ isppreview_config_shadow_registers(); ++ isph3a_update_wb(); ++ if (ispmodule_obj.isp_pipeline & OMAP_ISP_RESIZER) ++ return; ++ break; ++#endif ++ ++#ifdef USE_ISP_RESZ ++ case RESZ_DONE: ++ ispresizer_config_shadow_registers(); ++ spin_lock(&isp_obj.isp_temp_buf_lock); ++ if (ispmodule_obj.isp_temp_state != ISP_BUF_INIT) { ++ spin_unlock(&isp_obj.isp_temp_buf_lock); ++ return; ++ } ++ spin_unlock(&isp_obj.isp_temp_buf_lock); ++ break; ++#endif ++ ++ case HS_VS: ++#ifndef ENABLE_BT_656_CAPTURE ++ spin_lock(&isp_obj.isp_temp_buf_lock); ++ if (ispmodule_obj.isp_temp_state == ISP_BUF_TRAN) { ++ isp_CCDC_VD01_enable(); ++ ispmodule_obj.isp_temp_state = ISP_BUF_INIT; ++ } ++ spin_unlock(&isp_obj.isp_temp_buf_lock); ++ return; ++#else ++ if (ispmodule_obj.capture_type) { ++ ispmodule_obj.current_field ^= 1; ++ spin_lock(&isp_obj.isp_temp_buf_lock); ++ if ((ispmodule_obj.isp_temp_state == ISP_BUF_TRAN) && ++ (fld_stat == 1)) { ++ isp_CCDC_VD01_enable(); ++ ispmodule_obj.current_field = fld_stat; ++ ispmodule_obj.isp_temp_state = ISP_BUF_INIT; ++ } ++ spin_unlock(&isp_obj.isp_temp_buf_lock); ++ return; ++ } else { ++ spin_lock(&isp_obj.isp_temp_buf_lock); ++ if (ispmodule_obj.isp_temp_state == ISP_BUF_TRAN) { ++ isp_CCDC_VD01_enable(); ++ ispmodule_obj.isp_temp_state = ISP_BUF_INIT; ++ } ++ spin_unlock(&isp_obj.isp_temp_buf_lock); ++ return; ++ } ++#endif ++ ++ default: ++ break; ++ } ++ ++ spin_lock_irqsave(&ispsg.lock, flags); ++ ispsg.free_sgdma++; ++ if (ispsg.free_sgdma > NUM_SG_DMA) ++ ispsg.free_sgdma = NUM_SG_DMA; ++ spin_unlock_irqrestore(&ispsg.lock, flags); ++ ++ rval = arg1(vb); ++ ++ if (rval) ++ isp_sgdma_process(&ispsg, 1, ¬ify, arg1); ++ ++ return; ++} ++ ++void ++isp_sgdma_init() ++{ ++ int sg; ++ ++ ispsg.free_sgdma = NUM_SG_DMA; ++ ispsg.next_sgdma = 0; ++ for (sg = 0; sg < NUM_SG_DMA; sg++) { ++ ispsg.sg_state[sg].status = 0; ++ ispsg.sg_state[sg].callback = NULL; ++ ispsg.sg_state[sg].arg = NULL; ++ } ++} ++EXPORT_SYMBOL(isp_sgdma_init); ++ ++void isp_sgdma_process(struct isp_sgdma *sgdma, int irq, int *dma_notify, ++ isp_vbq_callback_ptr func_ptr) ++{ ++ struct isp_sgdma_state *sgdma_state; ++ unsigned long flags; ++ spin_lock_irqsave(&sgdma->lock, flags); ++ ++ /* we can at most start or queue one sgdma */ ++ if ((NUM_SG_DMA - sgdma->free_sgdma) > 0) { ++ /* get the next sgdma */ ++ sgdma_state = sgdma->sg_state + ++ (sgdma->next_sgdma + sgdma->free_sgdma) % NUM_SG_DMA; ++ if (!irq) { ++ if (*dma_notify) { ++ /* case 1: queue & start. */ ++ isp_set_sgdma_callback(sgdma_state, func_ptr); ++ isp_set_buf(sgdma_state); ++ ispccdc_enable(1); ++ isp_start(); ++ *dma_notify = 0; ++ ispmodule_obj.isp_temp_state = ISP_BUF_TRAN; ++ } else { ++ /* ++ * case 3: only need to queue ++ * (update buf ptr). ++ */ ++ if (ispmodule_obj.isp_temp_state == ++ ISP_FREE_RUNNING) { ++ isp_set_sgdma_callback(sgdma_state, ++ func_ptr); ++ isp_set_buf(sgdma_state); ++ /* Non startup case */ ++ ispccdc_enable(1); ++ ispmodule_obj.isp_temp_state = ++ ISP_BUF_TRAN; ++ } ++ } ++ } else { ++ /* case 3:only need to queue (update buf ptr). */ ++ isp_set_sgdma_callback(sgdma_state, func_ptr); ++ isp_set_buf(sgdma_state); ++ /* Non startup case */ ++ ispccdc_enable(1); ++ ispmodule_obj.isp_temp_state = ISP_BUF_INIT; ++ /* TODO: clear irq. old interrupt can come first. ++ * OK for preview. ++ */ ++ if (*dma_notify) { ++ isp_start(); ++ *dma_notify = 0; ++ } ++ } ++ } else { ++ spin_lock(&isp_obj.isp_temp_buf_lock); ++ /* Disable VD0 and CCDC here before next VSYNC */ ++ isp_CCDC_VD01_disable(); ++ ispmodule_obj.isp_temp_state = ISP_FREE_RUNNING; ++ spin_unlock(&isp_obj.isp_temp_buf_lock); ++ } ++ spin_unlock_irqrestore(&sgdma->lock, flags); ++ return; ++} ++ ++int isp_sgdma_queue(struct videobuf_dmabuf *vdma, struct videobuf_buffer *vb, ++ int irq, int *dma_notify, ++ isp_vbq_callback_ptr func_ptr) ++{ ++ unsigned long flags; ++ struct isp_sgdma_state *sg_state; ++ const struct scatterlist *sglist = vdma->sglist; ++ int sglen = vdma->sglen; ++ ++ if ((sglen < 0) || ((sglen > 0) & !sglist)) ++ return -EINVAL; ++ ++ spin_lock_irqsave(&ispsg.lock, flags); ++ ++ if (!ispsg.free_sgdma) { ++ spin_unlock_irqrestore(&ispsg.lock, flags); ++ return -EBUSY; ++ } ++ ++ sg_state = ispsg.sg_state + ispsg.next_sgdma; ++ sg_state->isp_addr = ispsg.isp_addr_capture[vb->i]; ++ sg_state->status = 0; ++ sg_state->callback = isp_vbq_done; ++ sg_state->arg = vb; ++ ++ ispsg.next_sgdma = (ispsg.next_sgdma + 1) % NUM_SG_DMA; ++ ispsg.free_sgdma--; ++ ++ spin_unlock_irqrestore(&ispsg.lock, flags); ++ ++ isp_sgdma_process(&ispsg, irq, dma_notify, func_ptr); ++ ++ return 0; ++} ++EXPORT_SYMBOL(isp_sgdma_queue); ++ ++int isp_vbq_prepare(struct videobuf_queue *vbq, struct videobuf_buffer *vb, ++ enum v4l2_field field) ++{ ++ unsigned int isp_addr; ++ struct videobuf_dmabuf *vdma; ++ ++ int err = 0; ++ ++ vdma = videobuf_to_dma(vb); ++ ++ /* Map the address to ISP MMU */ ++ isp_addr = ispmmu_map_sg(vdma->sglist, vdma->sglen); ++ ++ if (!isp_addr) ++ err = -EIO; ++ else ++ ispsg.isp_addr_capture[vb->i] = isp_addr; ++ ++ return err; ++} ++EXPORT_SYMBOL(isp_vbq_prepare); ++ ++void isp_vbq_release(struct videobuf_queue *vbq, struct videobuf_buffer *vb) ++{ ++ /* Un-Map the address in ISP MMU */ ++ ispmmu_unmap(ispsg.isp_addr_capture[vb->i]); ++ ispsg.isp_addr_capture[vb->i] = (dma_addr_t) NULL; ++ vb->state = VIDEOBUF_NEEDS_INIT; ++ return; ++} ++EXPORT_SYMBOL(isp_vbq_release); ++ ++int isp_queryctrl(struct v4l2_queryctrl *a) ++{ ++ int i; ++ ++ i = find_vctrl(a->id); ++ if (i == -EINVAL) ++ a->flags = V4L2_CTRL_FLAG_DISABLED; ++ ++ if (i < 0) ++ return -EINVAL; ++ ++ *a = video_control[i].qc; ++ return 0; ++} ++EXPORT_SYMBOL(isp_queryctrl); ++ ++int isp_g_ctrl(struct v4l2_control *a) ++{ ++ u8 current_value; ++ int rval = 0; ++ ++ switch (a->id) { ++ case V4L2_CID_BRIGHTNESS: ++ isppreview_query_brightness(¤t_value); ++ a->value = current_value / ISPPRV_BRIGHT_UNITS; ++ break; ++ case V4L2_CID_CONTRAST: ++ isppreview_query_contrast(¤t_value); ++ a->value = current_value / ISPPRV_CONTRAST_UNITS; ++ break; ++ case V4L2_CID_PRIVATE_ISP_COLOR_FX: ++ isppreview_get_color(¤t_value); ++ a->value = current_value; ++ break; ++ case V4L2_CID_PRIVATE_ISP_CCDC_CFG: ++ a->value = 0; ++ break; ++ case V4L2_CID_PRIVATE_ISP_PRV_CFG: ++ a->value = 0; ++ break; ++ case V4L2_CID_PRIVATE_ISP_LSC_UPDATE: ++ a->value = 0; ++ break; ++ case V4L2_CID_PRIVATE_ISP_AEWB_CFG: ++ a->value = 0; ++ break; ++ case V4L2_CID_PRIVATE_ISP_AEWB_REQ: ++ a->value = 0; ++ break; ++ case V4L2_CID_PRIVATE_ISP_AF_CFG: ++ a->value = 0; ++ break; ++ case V4L2_CID_PRIVATE_ISP_AF_REQ: ++ a->value = 0; ++ break; ++ default: ++ rval = -EINVAL; ++ break; ++ } ++ return rval; ++} ++EXPORT_SYMBOL(isp_g_ctrl); ++ ++int isp_s_ctrl(struct v4l2_control *a) ++{ ++ int rval = 0; ++ u8 new_value = a->value; ++ ++ switch (a->id) { ++ case V4L2_CID_BRIGHTNESS: ++ if (new_value > ISPPRV_BRIGHT_HIGH) ++ rval = -EINVAL; ++ else ++ isppreview_update_brightness(&new_value); ++ break; ++ case V4L2_CID_CONTRAST: ++ if (new_value > ISPPRV_CONTRAST_HIGH) ++ rval = -EINVAL; ++ else ++ isppreview_update_contrast(&new_value); ++ break; ++ case V4L2_CID_PRIVATE_ISP_COLOR_FX: ++ if (new_value > PREV_SEPIA_COLOR) ++ rval = -EINVAL; ++ else ++ isppreview_set_color(&new_value); ++ break; ++ case V4L2_CID_PRIVATE_ISP_CCDC_CFG: ++ omap34xx_isp_ccdc_config((void *)a->value); ++ break; ++ case V4L2_CID_PRIVATE_ISP_PRV_CFG: ++ omap34xx_isp_preview_config((void *)a->value); ++ break; ++ case V4L2_CID_PRIVATE_ISP_LSC_UPDATE: ++ omap34xx_isp_tables_update((void *)a->value); ++ omap34xx_isp_lsc_update((void *)a->value); ++ break; ++ case V4L2_CID_PRIVATE_ISP_AEWB_CFG: ++ if (!a->value) ++ rval = -EFAULT; ++ else { ++ struct isph3a_aewb_config params; ++ if (copy_from_user(¶ms, (void *)a->value, ++ sizeof(params))) { ++ rval = -EFAULT; ++ printk(KERN_ERR "Failed copy_from_user\n"); ++ } else ++ rval = isph3a_aewb_configure(¶ms); ++ } ++ break; ++ case V4L2_CID_PRIVATE_ISP_AEWB_REQ: ++ if (!a->value) ++ rval = -EFAULT; ++ else { ++ struct isph3a_aewb_data data; ++ if (copy_from_user(&data, (void *)a->value, ++ sizeof(data))) { ++ rval = -EFAULT; ++ printk(KERN_ERR "Failed copy_from_user\n"); ++ break; ++ } ++ rval = isph3a_aewb_request_statistics(&data); ++ if (!rval) ++ if (copy_to_user((void *)a->value, &data, ++ sizeof(data))) { ++ rval = -EFAULT; ++ printk(KERN_ERR ++ "Failed copy_to_user\n"); ++ } ++ } ++ break; ++ case V4L2_CID_PRIVATE_ISP_AF_CFG: ++ if (!a->value) ++ rval = -EFAULT; ++ else { ++ struct af_configuration params; ++ ++ if (copy_from_user(¶ms, (struct af_configuration *)a->value, ++ sizeof(struct af_configuration))) { ++ rval = -EFAULT; ++ printk(KERN_ERR "Failed copy_from_user\n"); ++ } else ++ rval = isp_af_configure(¶ms); ++ } ++ break; ++ case V4L2_CID_PRIVATE_ISP_AF_REQ: ++ if (!a->value) ++ rval = -EFAULT; ++ else { ++ struct isp_af_data data; ++ if (copy_from_user(&data, (void *) (a->value), ++ sizeof(data))) { ++ printk(KERN_ERR "Failed copy_from_user\n"); ++ return -EFAULT; ++ } ++ ++ if(data.update & LENS_CURRENT_POSITION){ ++#if 0 ++ if(dw9710_af_getfocus(&data.lens_current_position)) ++#endif ++ return -EFAULT; ++ ++ if (copy_to_user((void *)a->value, &data, ++ sizeof(data))) { ++ rval = -EFAULT; ++ printk(KERN_ERR ++ "Failed copy_to_user\n"); ++ } ++ } ++ if(data.update & LENS_DESIRED_POSITION) ++#if 0 ++ if(dw9710_af_setfocus(data.desired_lens_direction)) ++#endif ++ return -EFAULT; ++ ++ rval = isp_af_request_statistics(&data); ++ if (!rval) ++ if (copy_to_user((void *)a->value, &data, ++ sizeof(data))) { ++ rval = -EFAULT; ++ printk(KERN_ERR ++ "Failed copy_to_user\n"); ++ } ++ } ++ ++ break; ++ case V4L2_CID_PRIVATE_ISP_HIST_CFG: ++ if (!a->value) ++ rval = -EFAULT; ++ else { ++ struct isp_hist_config params; ++ if (copy_from_user(¶ms, (struct isp_hist_config *)a->value, ++ sizeof(struct isp_hist_config))) { ++ rval = -EFAULT; ++ printk(KERN_ERR "Failed copy_from_user\n"); ++ } else ++ rval = isp_hist_configure(¶ms); ++ } ++ break; ++ ++ case V4L2_CID_PRIVATE_ISP_HIST_REQ: ++ if (!a->value) ++ rval = -EFAULT; ++ else { ++ struct isp_hist_data data; ++ ++ if (copy_from_user(&data, (struct isp_hist_data *)a->value, ++ sizeof(struct isp_hist_data))) { ++ rval = -EFAULT; ++ printk(KERN_ERR "Failed copy_from_user\n"); ++ } else ++ rval = isp_hist_request_statistics(&data); ++ } ++ break; ++ default: ++ rval = -EINVAL; ++ break; ++ } ++ return rval; ++} ++EXPORT_SYMBOL(isp_s_ctrl); ++ ++int isp_enum_fmt_cap(struct v4l2_fmtdesc *f) ++{ ++ int index = f->index; ++ enum v4l2_buf_type type = f->type; ++ int rval = -EINVAL; ++#ifdef ENABLE_BT_656_CAPTURE ++ int num_formats = NUM_ISP_CAPTURE_FORMATS; ++ ++ if (ispmodule_obj.input_pixelformat != V4L2_PIX_FMT_SGRBG10) ++ num_formats--; ++#endif ++ ++#ifndef ENABLE_BT_656_CAPTURE ++ if (index >= NUM_ISP_CAPTURE_FORMATS) ++ goto err; ++#else ++ if (index >= num_formats) ++ goto err; ++#endif ++ ++ memset(f, 0, sizeof(*f)); ++ f->index = index; ++ f->type = type; ++ ++ switch (f->type) { ++ case V4L2_BUF_TYPE_VIDEO_CAPTURE: ++ rval = 0; ++ break; ++ default: ++ goto err; ++ } ++ ++ f->flags = isp_formats[index].flags; ++ strncpy(f->description, isp_formats[index].description, ++ sizeof(f->description)); ++ f->pixelformat = isp_formats[index].pixelformat; ++err: ++ return rval; ++} ++EXPORT_SYMBOL(isp_enum_fmt_cap); ++ ++void isp_g_fmt_cap(struct v4l2_format *f) ++{ ++ f->fmt.pix = ispmodule_obj.pix; ++ return; ++} ++EXPORT_SYMBOL(isp_g_fmt_cap); ++ ++int isp_s_fmt_cap(struct v4l2_pix_format *pix_input, ++ struct v4l2_pix_format *pix_output) ++{ ++ int crop_scaling_w = 0; ++ int crop_scaling_h = 0; ++ int rval; ++ ++ /* Call Try Size for the ISP */ ++ isp_calc_pipeline(pix_input, pix_output); ++ rval = isp_try_size(pix_input, pix_output); ++ ++ if (rval) ++ goto out; ++ ++ rval = isp_try_fmt(pix_input, pix_output); ++ if (rval) ++ goto out; ++ ++ /* Reset crop settings if needed as image size might have changed */ ++ if (ispcroprect.width == pix_output->width) { ++ crop_scaling_w = 0; ++ } else { ++ if (ispcroprect.width != 0) ++ crop_scaling_w = 1; ++ ispcroprect.left = 0; ++ ispcroprect.width = pix_output->width; ++ } ++ ++ if (ispcroprect.height == pix_output->height) { ++ crop_scaling_h = 0; ++ } else { ++ if (ispcroprect.height != 0) ++ crop_scaling_h = 1; ++ ispcroprect.top = 0; ++ ispcroprect.height = pix_output->height; ++ } ++ ++ /* Configure the ISP */ ++ isp_config_pipeline(pix_input, pix_output); ++ /* Reapply resizer settings in case a crop is set. */ ++ if (crop_scaling_h || crop_scaling_w) ++ isp_config_crop(pix_output); ++out: ++ return rval; ++} ++EXPORT_SYMBOL(isp_s_fmt_cap); ++ ++void isp_config_crop(struct v4l2_pix_format *croppix) ++{ ++ u8 crop_scaling_w; ++ u8 crop_scaling_h; ++ struct v4l2_pix_format *pix = croppix; ++ ++ crop_scaling_w = (ispmodule_obj.preview_output_width * 10) / ++ pix->width; ++ crop_scaling_h = (ispmodule_obj.preview_output_height * 10) / ++ pix->height; ++ ++ cur_rect.left = (ispcroprect.left * crop_scaling_w) / 10; ++ cur_rect.top = (ispcroprect.top * crop_scaling_h) / 10; ++ cur_rect.width = (ispcroprect.width * crop_scaling_w) / 10; ++ cur_rect.height = (ispcroprect.height * crop_scaling_h) / 10; ++ ++ ispresizer_trycrop(cur_rect.left, cur_rect.top, cur_rect.width, ++ cur_rect.height, ++ ispmodule_obj.resizer_output_width, ++ ispmodule_obj.resizer_output_height); ++ return; ++} ++ ++int isp_g_crop(struct v4l2_crop *a) ++{ ++ struct v4l2_crop *crop = a; ++ ++ crop->c = ispcroprect; ++ return 0; ++} ++EXPORT_SYMBOL(isp_g_crop); ++ ++int isp_s_crop(struct v4l2_crop *a, struct v4l2_pix_format *pix) ++{ ++ struct v4l2_crop *crop = a; ++ int rval = 0; ++ ++ if ((crop->c.left + crop->c.width) > pix->width) { ++ rval = -EINVAL; ++ goto out; ++ } ++ ++ if ((crop->c.top + crop->c.height) > pix->height) { ++ rval = -EINVAL; ++ goto out; ++ } ++ ++ ispcroprect.left = crop->c.left; ++ ispcroprect.top = crop->c.top; ++ ispcroprect.width = crop->c.width; ++ ispcroprect.height = crop->c.height; ++ ++ isp_config_crop(pix); ++ ++ ispmodule_obj.applyCrop = 1; ++out: ++ return rval; ++} ++EXPORT_SYMBOL(isp_s_crop); ++ ++int isp_try_fmt_cap(struct v4l2_pix_format *pix_input, ++ struct v4l2_pix_format *pix_output) ++{ ++ int rval = 0; ++ ++ isp_calc_pipeline(pix_input, pix_output); ++ rval = isp_try_size(pix_input, pix_output); ++ ++ if (rval) ++ goto out; ++ ++ rval = isp_try_fmt(pix_input, pix_output); ++ ++ if (rval) ++ goto out; ++ ++out: ++ return rval; ++} ++EXPORT_SYMBOL(isp_try_fmt_cap); ++ ++int isp_try_size(struct v4l2_pix_format *pix_input, ++ struct v4l2_pix_format *pix_output) ++{ ++ int rval = 0; ++ /* ++ * First initialize local ISP struct ++ */ ++ ispmodule_obj.ccdc_input_width = pix_input->width; ++ ispmodule_obj.ccdc_input_height = pix_input->height; ++ ispmodule_obj.resizer_output_width = pix_output->width; ++ ispmodule_obj.resizer_output_height = pix_output->height; ++ ++ /* Try size for CCDC Module if enabled */ ++ if (ispmodule_obj.isp_pipeline & OMAP_ISP_CCDC) { ++ rval = ispccdc_try_size(ispmodule_obj.ccdc_input_width, ++ ispmodule_obj.ccdc_input_height, ++ &ispmodule_obj.ccdc_output_width, ++ &ispmodule_obj.ccdc_output_height); ++ pix_output->width = ispmodule_obj.ccdc_output_width; ++ pix_output->height = ispmodule_obj.ccdc_output_height; ++ } ++ ++ if (ispmodule_obj.isp_pipeline & OMAP_ISP_PREVIEW) { ++ ispmodule_obj.preview_input_width = ++ ispmodule_obj.ccdc_output_width; ++ ispmodule_obj.preview_input_height = ++ ispmodule_obj.ccdc_output_height; ++ rval = isppreview_try_size(ispmodule_obj.preview_input_width, ++ ispmodule_obj.preview_input_height, ++ &ispmodule_obj.preview_output_width, ++ &ispmodule_obj.preview_output_height); ++ pix_output->width = ispmodule_obj.preview_output_width; ++ pix_output->height = ispmodule_obj.preview_output_height; ++ } ++ ++ if (ispmodule_obj.isp_pipeline & OMAP_ISP_RESIZER) { ++ ispmodule_obj.resizer_input_width = ++ ispmodule_obj.preview_output_width; ++ ispmodule_obj.resizer_input_height = ++ ispmodule_obj.preview_output_height; ++ rval = ispresizer_try_size(&ispmodule_obj.resizer_input_width, ++ &ispmodule_obj.resizer_input_height, ++ &ispmodule_obj.resizer_output_width, ++ &ispmodule_obj.resizer_output_height); ++ pix_output->width = ispmodule_obj.resizer_output_width; ++ pix_output->height = ispmodule_obj.resizer_output_height; ++ } ++ return rval; ++} ++EXPORT_SYMBOL(isp_try_size); ++ ++int isp_try_fmt(struct v4l2_pix_format *pix_input, ++ struct v4l2_pix_format *pix_output) ++{ ++ int ifmt; ++ ++ /* done with size negotiation, now fill other info */ ++ for (ifmt = 0; ifmt < NUM_ISP_CAPTURE_FORMATS; ifmt++) { ++ if (pix_output->pixelformat == isp_formats[ifmt].pixelformat) ++ break; ++ } ++ if (ifmt == NUM_ISP_CAPTURE_FORMATS) ++ ifmt = 1; ++ pix_output->pixelformat = isp_formats[ifmt].pixelformat; ++ ++#ifndef ENABLE_BT_656_CAPTURE ++ pix_output->field = V4L2_FIELD_NONE; ++ pix_output->bytesperline = pix_output->width * 2; ++#else ++ pix_output->field = pix_input->field; ++#endif ++ ++ pix_output->sizeimage = pix_output->bytesperline * pix_output->height; ++ pix_output->priv = 0; ++ switch (pix_output->pixelformat) { ++ case V4L2_PIX_FMT_YUYV: ++ case V4L2_PIX_FMT_UYVY: ++#ifndef ENABLE_BT_656_CAPTURE ++ pix_output->colorspace = V4L2_COLORSPACE_JPEG; ++#else ++ pix_output->colorspace = pix_input->colorspace; ++#endif ++ break; ++ default: ++ pix_output->colorspace = V4L2_COLORSPACE_SRGB; ++ break; ++ } ++ ++ ispmodule_obj.pix.pixelformat = pix_output->pixelformat; ++ ispmodule_obj.pix.width = pix_output->width; ++ ispmodule_obj.pix.height = pix_output->height; ++ ispmodule_obj.pix.field = pix_output->field; ++ ispmodule_obj.pix.bytesperline = pix_output->bytesperline; ++ ispmodule_obj.pix.sizeimage = pix_output->sizeimage; ++ ispmodule_obj.pix.priv = pix_output->priv; ++ ispmodule_obj.pix.colorspace = pix_output->colorspace; ++ return 0; ++} ++ ++#ifdef ENABLE_BT_656_CAPTURE ++/* Configure ISP depending on standard */ ++int isp_configure_std(v4l2_std_id std) ++{ ++ struct isp_std_config_params *params; ++ int rval = 0; ++ struct v4l2_pix_format pix_input, pix_output; ++ ++ if (std & V4L2_STD_NTSC) { ++ params = &std_params[0]; ++ } else if (std & V4L2_STD_PAL) { ++ params = &std_params[1]; ++ } else ++ return -EINVAL; ++ ++ ispmodule_obj.pix.pixelformat = params->pixelformat; ++ ispmodule_obj.pix.width = params->active_pixels; ++ ispmodule_obj.pix.height = params->active_lines; ++ ispmodule_obj.pix.field = params->field; ++ ispmodule_obj.pix.bytesperline = params->bytesperline; ++ ispmodule_obj.pix.sizeimage = params->sizeimage; ++ ispmodule_obj.pix.colorspace = params->colorspace; ++ ++ if ((std & V4L2_STD_NTSC) || (std & V4L2_STD_PAL)) { ++ pix_input = ispmodule_obj.pix; ++ pix_output = ispmodule_obj.pix; ++ } else ++ return -EINVAL; ++ ++ rval = isp_s_fmt_cap(&pix_input, &pix_output); ++ ++ return rval; ++} ++EXPORT_SYMBOL(isp_configure_std); ++ ++/* Checks for proper pixel parameters */ ++int isp_check_format(struct v4l2_pix_format *pixfmt) ++{ ++ u32 hpitch, vpitch; ++ ++ if (pixfmt->bytesperline <= 0) { ++ DPRINTK_ISPCTRL("Invalid pitch\n"); ++ return -EINVAL; ++ } ++ ++ hpitch = pixfmt->bytesperline; ++ vpitch = pixfmt->sizeimage / hpitch; ++ ++ /* Check for valid value of pitch */ ++ if ((hpitch < ispmodule_obj.pix.width * 2) || ++ (vpitch < ispmodule_obj.pix.height)) { ++ DPRINTK_ISPCTRL("Invalid pitch\n"); ++ return -EINVAL; ++ } ++ /* Check for 32 byte alignment */ ++ if (hpitch != (hpitch & ~0x1F)) { ++ DPRINTK_ISPCTRL("Invalid pitch alignment\n"); ++ return -EINVAL; ++ } ++ pixfmt->width = ispmodule_obj.pix.width; ++ pixfmt->height = ispmodule_obj.pix.height; ++ return 0; ++} ++EXPORT_SYMBOL(isp_check_format); ++#endif ++ ++/** ++ * isp_save_ctx - Saves ISP, CCDC, HIST, H3A, PREV, RESZ & MMU context. ++ * ++ * Routine for saving the context of each module in the ISP. ++ * CCDC, HIST, H3A, PREV, RESZ and MMU. ++ **/ ++void isp_save_ctx(void) ++{ ++ isp_save_context(isp_reg_list); ++ ispccdc_save_context(); ++ isphist_save_context(); ++ isph3a_save_context(); ++ isppreview_save_context(); ++ ispresizer_save_context(); ++ ispmmu_save_context(); ++} ++EXPORT_SYMBOL(isp_save_ctx); ++ ++/** ++ * isp_restore_ctx - Restores ISP, CCDC, HIST, H3A, PREV, RESZ & MMU context. ++ * ++ * Routine for restoring the context of each module in the ISP. ++ * CCDC, HIST, H3A, PREV, RESZ and MMU. ++ **/ ++void isp_restore_ctx(void) ++{ ++ isp_restore_context(isp_reg_list); ++ ispccdc_restore_context(); ++ isphist_restore_context(); ++ isph3a_restore_context(); ++ isppreview_restore_context(); ++ ispresizer_restore_context(); ++ ispmmu_restore_context(); ++} ++EXPORT_SYMBOL(isp_restore_ctx); ++ ++/** ++ * isp_get - Adquires the ISP resource. ++ * ++ * Initializes the clocks for the first acquire. ++ **/ ++int isp_get(void) ++{ ++ int ret_err = 0; ++ DPRINTK_ISPCTRL("isp_get: old %d\n", isp_obj.ref_count); ++ mutex_lock(&(isp_obj.isp_mutex)); ++ if (isp_obj.ref_count == 0) { ++#ifdef CONFIG_TRACK_RESOURCES ++ isp_obj.cam_ick = clk_get(&camera_dev, "cam_ick"); ++#else ++ isp_obj.cam_ick = clk_get(NULL, "cam_ick"); ++#endif ++ if (IS_ERR(isp_obj.cam_ick)) { ++ mutex_unlock(&(isp_obj.isp_mutex)); ++ DPRINTK_ISPCTRL("ISP_ERR: clk_get for ick failed\n"); ++ return PTR_ERR(isp_obj.cam_ick); ++ } ++#ifndef ENABLE_BT_656_CAPTURE ++#ifdef CONFIG_TRACK_RESOURCES ++ isp_obj.cam_fck = clk_get(&camera_dev, "cam_mclk"); ++#else ++ isp_obj.cam_fck = clk_get(NULL, "cam_mclk"); ++#endif ++#else ++#ifdef CONFIG_TRACK_RESOURCES ++ isp_obj.cam_fck = clk_get(&camera_dev, "cam_fck"); ++#else ++ isp_obj.cam_fck = clk_get(NULL, "cam_fck"); ++#endif ++#endif ++ if (IS_ERR(isp_obj.cam_fck)) { ++ mutex_unlock(&(isp_obj.isp_mutex)); ++ DPRINTK_ISPCTRL("ISP_ERR: clk_get for fck failed\n"); ++ return PTR_ERR(isp_obj.cam_fck); ++ } ++ /* Cam IF Clk */ ++ ret_err = clk_enable(isp_obj.cam_ick); ++ if (ret_err) { ++ mutex_unlock(&(isp_obj.isp_mutex)); ++ clk_put(isp_obj.cam_ick); ++ clk_put(isp_obj.cam_fck); ++ DPRINTK_ISPCTRL("ISP_ERR: clk_en for ick failed\n"); ++ return ret_err; ++ } ++ /* Cam Func Clk */ ++ ret_err = clk_enable(isp_obj.cam_fck); ++ if (ret_err) { ++ mutex_unlock(&(isp_obj.isp_mutex)); ++ clk_put(isp_obj.cam_ick); ++ clk_put(isp_obj.cam_fck); ++ DPRINTK_ISPCTRL("ISP_ERR: clk_en for fck failed\n"); ++ return ret_err; ++ } ++ /* Context restore */ ++ if (off_mode == 1) ++ isp_restore_ctx(); ++ } ++ isp_obj.ref_count++; ++ mutex_unlock(&(isp_obj.isp_mutex)); ++ ++ ++ DPRINTK_ISPCTRL("isp_get: new %d\n", isp_obj.ref_count); ++ return isp_obj.ref_count; ++} ++EXPORT_SYMBOL(isp_get); ++ ++/** ++ * isp_put - Releases the ISP resource. ++ * ++ * Releases the clocks also for the last release. ++ **/ ++int isp_put(void) ++{ ++ DPRINTK_ISPCTRL("isp_put: old %d\n", isp_obj.ref_count); ++ mutex_lock(&(isp_obj.isp_mutex)); ++ if (isp_obj.ref_count) ++ if (--isp_obj.ref_count == 0) { ++ isp_save_ctx(); ++ off_mode = 1; ++ ++ /* Disable all interrupts */ ++ /* shut down ISP clocks */ ++ clk_disable(isp_obj.cam_ick); ++ clk_disable(isp_obj.cam_fck); ++ clk_put(isp_obj.cam_ick); ++ clk_put(isp_obj.cam_fck); ++ } ++ mutex_unlock(&(isp_obj.isp_mutex)); ++ DPRINTK_ISPCTRL("isp_put: new %d\n", isp_obj.ref_count); ++ return isp_obj.ref_count; ++} ++EXPORT_SYMBOL(isp_put); ++ ++/** ++ * isp_save_context - Saves the values of the ISP module registers. ++ * @reg_list: Structure containing pairs of register address and value to ++ * modify on OMAP. ++ **/ ++void isp_save_context(struct isp_reg *reg_list) ++{ ++ struct isp_reg *next = reg_list; ++ ++ for (; next->reg != ISP_TOK_TERM; next++) ++ next->val = omap_readl(next->reg); ++} ++EXPORT_SYMBOL(isp_save_context); ++ ++/** ++ * isp_restore_context - Restores the values of the ISP module registers. ++ * @reg_list: Structure containing pairs of register address and value to ++ * modify on OMAP. ++ **/ ++void isp_restore_context(struct isp_reg *reg_list) ++{ ++ struct isp_reg *next = reg_list; ++ ++ for (; next->reg != ISP_TOK_TERM; next++) ++ omap_writel(next->val, next->reg); ++} ++EXPORT_SYMBOL(isp_restore_context); ++ ++/** ++ * isp_init - ISP module initialization. ++ **/ ++static int __init isp_init(void) ++{ ++ DPRINTK_ISPCTRL("+isp_init for Omap 3430 Camera ISP\n"); ++ isp_obj.ref_count = 0; ++ ++ mutex_init(&(isp_obj.isp_mutex)); ++ spin_lock_init(&isp_obj.isp_temp_buf_lock); ++ ++ if (request_irq(INT_34XX_CAM_IRQ, omap34xx_isp_isr, IRQF_SHARED, ++ "Omap 34xx Camera ISP", &ispirq_obj)) { ++ DPRINTK_ISPCTRL("Could not install ISR\n"); ++ return -EINVAL; ++ } else { ++ spin_lock_init(&isp_obj.lock); ++ DPRINTK_ISPCTRL("-isp_init for Omap 3430 Camera ISP\n"); ++ return 0; ++ } ++} ++ ++/** ++ * isp_cleanup - ISP module cleanup. ++ **/ ++static void __exit isp_cleanup(void) ++{ ++ free_irq(INT_34XX_CAM_IRQ, &ispirq_obj); ++} ++ ++/** ++ * isp_print_status - Prints the values of the ISP Control Module registers ++ * ++ * Also prints other debug information stored in the ISP module structure. ++ **/ ++void isp_print_status(void) ++{ ++#ifdef OMAP_ISPCTRL_DEBUG ++ DPRINTK_ISPCTRL("###CM_FCLKEN_CAM=0x%x\n", ++ omap_readl(CM_FCLKEN_CAM)); ++ DPRINTK_ISPCTRL("###CM_ICLKEN_CAM=0x%x\n", ++ omap_readl(CM_ICLKEN_CAM)); ++ DPRINTK_ISPCTRL("###CM_CLKSEL_CAM=0x%x\n", ++ omap_readl(CM_CLKSEL_CAM)); ++ DPRINTK_ISPCTRL("###CM_AUTOIDLE_CAM=0x%x\n", ++ omap_readl(CM_AUTOIDLE_CAM)); ++ DPRINTK_ISPCTRL("###CM_CLKEN_PLL[18:16] \ ++ should be 0x7, = 0x%x\n", ++ omap_readl(CM_CLKEN_PLL)); ++ DPRINTK_ISPCTRL("###CM_CLKSEL2_PLL[18:8] should be 0x2D,\ ++ [6:0] should be 1 = 0x%x\n", ++ omap_readl(CM_CLKSEL2_PLL)); ++ DPRINTK_ISPCTRL("###CTRL_PADCONF_CAM_HS=0x%x\n", ++ omap_readl(CTRL_PADCONF_CAM_HS)); ++ DPRINTK_ISPCTRL("###CTRL_PADCONF_CAM_XCLKA=0x%x\n", ++ omap_readl(CTRL_PADCONF_CAM_XCLKA)); ++ DPRINTK_ISPCTRL("###CTRL_PADCONF_CAM_D1=0x%x\n", ++ omap_readl(CTRL_PADCONF_CAM_D1)); ++ DPRINTK_ISPCTRL("###CTRL_PADCONF_CAM_D3=0x%x\n", ++ omap_readl(CTRL_PADCONF_CAM_D3)); ++ DPRINTK_ISPCTRL("###CTRL_PADCONF_CAM_D5=0x%x\n", ++ omap_readl(CTRL_PADCONF_CAM_D5)); ++ DPRINTK_ISPCTRL("###CTRL_PADCONF_CAM_D7=0x%x\n", ++ omap_readl(CTRL_PADCONF_CAM_D7)); ++ DPRINTK_ISPCTRL("###CTRL_PADCONF_CAM_D9=0x%x\n", ++ omap_readl(CTRL_PADCONF_CAM_D9)); ++ DPRINTK_ISPCTRL("###CTRL_PADCONF_CAM_D11=0x%x\n", ++ omap_readl(CTRL_PADCONF_CAM_D11)); ++#endif ++} ++EXPORT_SYMBOL(isp_print_status); ++ ++module_init(isp_init); ++module_exit(isp_cleanup); ++ ++MODULE_AUTHOR("Texas Instruments"); ++MODULE_DESCRIPTION("ISP Control Module Library"); ++MODULE_LICENSE("GPL"); +Index: git/drivers/media/video/isp/isp.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ git/drivers/media/video/isp/isp.h 2009-02-12 10:29:26.000000000 -0600 +@@ -0,0 +1,275 @@ ++/* ++ * drivers/media/video/isp/isp.h ++ * ++ * Top level public header file for ISP Control module in ++ * TI's OMAP3430 Camera ISP ++ * ++ * Copyright (C) 2008 Texas Instruments. ++ * ++ * This package is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ * ++ * THIS PACKAGE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR ++ * IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED ++ * WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE. ++ */ ++ ++#ifndef OMAP_ISP_TOP_H ++#define OMAP_ISP_TOP_H ++#include <media/videobuf-dma-sg.h> ++#include <linux/videodev2.h> ++#define OMAP_ISP_CCDC (1 << 0) ++#define OMAP_ISP_PREVIEW (1 << 1) ++#define OMAP_ISP_RESIZER (1 << 2) ++#define OMAP_ISP_AEWB (1 << 3) ++#define OMAP_ISP_AF (1 << 4) ++#define OMAP_ISP_HIST (1 << 5) ++ ++/* Define this macro to enable BT.656 capture support. Comment this out when ++ BT.656 capture support is not needed */ ++#define ENABLE_BT_656_CAPTURE ++ ++/* Our ISP specific controls */ ++#define V4L2_CID_PRIVATE_ISP_COLOR_FX (V4L2_CID_PRIVATE_BASE + 0) ++#define V4L2_CID_PRIVATE_ISP_CCDC_CFG (V4L2_CID_PRIVATE_BASE + 1) ++#define V4L2_CID_PRIVATE_ISP_PRV_CFG (V4L2_CID_PRIVATE_BASE + 2) ++#define V4L2_CID_PRIVATE_ISP_LSC_UPDATE (V4L2_CID_PRIVATE_BASE + 3) ++#define V4L2_CID_PRIVATE_ISP_AEWB_CFG (V4L2_CID_PRIVATE_BASE + 4) ++#define V4L2_CID_PRIVATE_ISP_AEWB_REQ (V4L2_CID_PRIVATE_BASE + 5) ++#define V4L2_CID_PRIVATE_ISP_AF_CFG (V4L2_CID_PRIVATE_BASE + 6) ++#define V4L2_CID_PRIVATE_ISP_AF_REQ (V4L2_CID_PRIVATE_BASE + 7) ++#define V4L2_CID_PRIVATE_ISP_HIST_CFG (V4L2_CID_PRIVATE_BASE + 8) ++#define V4L2_CID_PRIVATE_ISP_HIST_REQ (V4L2_CID_PRIVATE_BASE + 9) ++ ++typedef int (*isp_vbq_callback_ptr) (struct videobuf_buffer *vb); ++typedef void (*isp_callback_t) (unsigned long status, ++ isp_vbq_callback_ptr arg1, void *arg2); ++ ++enum isp_interface_type{ ++ ISP_PARLL = 1, ++ ISP_CSIA = 2, ++ ISP_CSIB = 4 ++}; ++enum isp_irqevents{ ++ CCDC_VD0 = 0x100, ++ CCDC_VD1 = 0x200, ++ CCDC_VD2 = 0x400, ++ CCDC_ERR = 0x800, ++ H3A_AWB_DONE = 0x2000, ++ H3A_AF_DONE = 0x1000, ++ HIST_DONE = 0x10000, ++ PREV_DONE = 0x100000, ++ LSC_DONE = 0x20000, ++ LSC_PRE_COMP = 0x40000, ++ LSC_PRE_ERR = 0x80000, ++ RESZ_DONE = 0x1000000, ++ SBL_OVF = 0x2000000, ++ MMU_ERR = 0x10000000, ++ OCP_ERR = 0x20000000, ++ HS_VS = 0x80000000 ++}; ++ ++enum isp_callback_type{ ++ CBK_CCDC_VD0, ++ CBK_CCDC_VD1, ++ CBK_PREV_DONE, ++ CBK_RESZ_DONE, ++ CBK_MMU_ERR, ++ CBK_H3A_AWB_DONE, ++ CBK_HIST_DONE, ++ CBK_HS_VS, ++ CBK_LSC_ISR, ++ CBK_H3A_AF_DONE ++}; ++ ++#define ISP_TOK_TERM 0xFFFFFFFF /* terminating token for ISP modules ++ * reg list ++ */ ++#define NUM_SG_DMA (VIDEO_MAX_FRAME+2) ++ ++#define ISP_BUF_INIT 0 ++#define ISP_FREE_RUNNING 1 ++#define ISP_BUF_TRAN 2 ++/* defines a structure for isp registers values */ ++struct isp_reg { ++ u32 reg; /* 32-bit address */ ++ u32 val; /* 32-bit value */ ++}; ++ ++/* sgdma state for each of the possible videobuf_buffers + 2 overlays */ ++struct isp_sgdma_state { ++ /* mapped ISP mmu addrs */ ++ dma_addr_t isp_addr; /* ISP space addr */ ++ u32 status; /* DMA return code */ ++ isp_callback_t callback; ++ void *arg; ++}; ++ ++struct isp_sgdma { ++ dma_addr_t isp_addr_capture[VIDEO_MAX_FRAME]; ++ /* scatter-gather DMA management */ ++ spinlock_t lock; ++ int free_sgdma; /* number of free sg dma slots */ ++ int next_sgdma; /* index of next sg dma slot to use */ ++ struct isp_sgdma_state sg_state[NUM_SG_DMA]; ++}; ++ ++void isp_open(void); ++ ++void isp_close(void); ++ ++void isp_start(void); ++ ++void isp_stop(void); ++ ++void isp_sgdma_init(void); ++ ++void isp_vbq_done(unsigned long status, isp_vbq_callback_ptr arg1, void *arg2); ++ ++void isp_sgdma_process(struct isp_sgdma *sgdma, int irq, int *dma_notify, ++ isp_vbq_callback_ptr func_ptr); ++ ++int isp_sgdma_queue(struct videobuf_dmabuf *vdma, struct videobuf_buffer *vb, ++ int irq, int *dma_notify, ++ isp_vbq_callback_ptr func_ptr); ++ ++int isp_vbq_prepare(struct videobuf_queue *vbq, struct videobuf_buffer *vb, ++ enum v4l2_field field); ++ ++void isp_vbq_release(struct videobuf_queue *vbq, struct videobuf_buffer *vb); ++/* ++ *Sets the callback for the ISP module done events.*/ ++int isp_set_callback(enum isp_callback_type type, isp_callback_t callback, ++ isp_vbq_callback_ptr arg1, void *arg2); ++ ++void omapisp_unset_callback(void); ++ ++/*Clears the callback for the ISP module done events. */ ++int isp_unset_callback(enum isp_callback_type type); ++ ++u32 isp_set_xclk(u32 xclk, u8 xclksel); ++ ++u32 isp_get_xclk(u8 xclksel); ++ ++int isp_request_interface(enum isp_interface_type if_t); ++ ++/* Frees the parallel or serial interface that is passed.*/ ++int isp_free_interface(enum isp_interface_type if_t); ++ ++struct isp_interface_config { ++ /*0 - Parallell 1- CSIA, 2-CSIB to CCDC */ ++ enum isp_interface_type ccdc_par_ser; ++ /*0- Disable, 1 - Enable, first byte->cam_d[7:0],*/ ++ /*2 - Enable, first byte -> cam_d[15:8]*/ ++ u8 par_bridge; ++ /* 0 - Non Inverted, 1- Inverted*/ ++ u8 para_clk_pol; ++ /* 0 - No Shift, 1 -CAMEXT[11:2]->CAM[8:0]*/ ++ /* 2 - [11:4]->[7:0]*/ ++ u8 dataline_shift; ++ /* 0 - HS Falling, 1-HS rising, 2 - VS falling, 3 - VS rising*/ ++ u8 hsvs_syncdetect; ++ /* VD0 Interrupt timing */ ++ u16 vdint0_timing; ++ /* VD1 Interrupt timing */ ++ u16 vdint1_timing; ++ /* Strobe related parameter*/ ++ int strobe; ++ /* PreStrobe related parameter*/ ++ int prestrobe; ++ /* Shutter related parameter*/ ++ int shutter; ++}; ++ ++struct isp_sysc { ++ char reset; ++ char idle_mode; ++}; ++ ++/* sysconfig settings */ ++void isp_power_settings(struct isp_sysc); ++ ++/* Configures the ISP Control interace related parameters.*/ ++int isp_configure_interface(struct isp_interface_config *config); ++ ++void isp_CCDC_VD01_disable(void); ++void isp_CCDC_VD01_enable(void); ++ ++/* Acquires the ISP resource. Initialises the clocks for the first aquire.*/ ++int isp_get(void); ++ ++/* Releases the ISP resource. Releases the clocks also for the last release.*/ ++int isp_put(void); ++ ++/* Set up ISP pipeline */ ++void isp_set_pipeline(int soc_type); ++ ++/* Config ISP pipeline */ ++void isp_config_pipeline(struct v4l2_pix_format *pix_input, ++ struct v4l2_pix_format *pix_output); ++ ++/* Query Control */ ++int isp_queryctrl(struct v4l2_queryctrl *a); ++ ++/* Get Control */ ++int isp_g_ctrl(struct v4l2_control *a); ++ ++/* Set Control */ ++int isp_s_ctrl(struct v4l2_control *a); ++/* Enum format capture for ISP */ ++int isp_enum_fmt_cap(struct v4l2_fmtdesc *f); ++ ++/* try Format capture for ISP */ ++int isp_try_fmt_cap(struct v4l2_pix_format *pix_input, ++ struct v4l2_pix_format *pix_output); ++ ++/* Get format for ISP sub-modules */ ++void isp_g_fmt_cap(struct v4l2_format *f); ++/* Set format for ISP sub-modules */ ++int isp_s_fmt_cap(struct v4l2_pix_format *pix_input, ++ struct v4l2_pix_format *pix_output); ++ ++/* Get Crop capabilities */ ++int isp_g_crop(struct v4l2_crop *a); ++ ++/* Set Crop capabilities */ ++int isp_s_crop(struct v4l2_crop *a, struct v4l2_pix_format *pix); ++ ++/* Config crop */ ++void isp_config_crop(struct v4l2_pix_format *pix); ++ ++/* Try Size for ISP sub-modules */ ++int isp_try_size(struct v4l2_pix_format *pix_input, ++ struct v4l2_pix_format *pix_output); ++ ++/* Try Format for ISP */ ++int isp_try_fmt(struct v4l2_pix_format *pix_input, ++ struct v4l2_pix_format *pix_output); ++ ++#ifdef ENABLE_BT_656_CAPTURE ++/* Configure ISP depending on standard */ ++int isp_configure_std(v4l2_std_id std); ++ ++/* Checks for proper pixel parameters */ ++int isp_check_format(struct v4l2_pix_format *pixfmt); ++#endif ++ ++/*Saves ISP context*/ ++void isp_save_context(struct isp_reg *); ++ ++/*Restores ISP context*/ ++void isp_restore_context(struct isp_reg *); ++ ++/*Saves ISP context*/ ++void isp_save_ctx(void); ++ ++/*Restores ISP context*/ ++void isp_restore_ctx(void); ++ ++ ++void isp_print_status(void); ++ ++ ++ ++#endif /* OMAP_ISP_TOP_H */ +Index: git/drivers/media/video/isp/isp_af.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ git/drivers/media/video/isp/isp_af.c 2009-02-12 10:29:18.000000000 -0600 +@@ -0,0 +1,829 @@ ++/* ++ * drivers/media/video/isp/isp_af.c ++ * ++ * AF module for TI's OMAP3430 Camera ISP ++ * ++ * Copyright (C) 2008 Texas Instruments. ++ * ++ * This package is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ * ++ * THIS PACKAGE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR ++ * IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED ++ * WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE. ++ */ ++ ++/* Linux specific include files */ ++#include <linux/cdev.h> ++#include <linux/device.h> ++#include <linux/delay.h> ++#include <linux/fs.h> ++#include <linux/mm.h> ++#include <linux/module.h> ++#include <linux/platform_device.h> ++#include <asm/cacheflush.h> ++#include <asm/uaccess.h> ++#include <asm/io.h> ++/*#include <asm/arch/io.h>*/ ++ ++/*#include <linux/mm.h>*/ ++#include <linux/mman.h> ++#include <linux/syscalls.h> ++/*#include <linux/module.h>*/ ++#include <linux/errno.h> ++#include <linux/types.h> ++#include <linux/dma-mapping.h> ++/*#include <asm/io.h>*/ ++/*#include <asm/cacheflush.h>*/ ++/*#include <asm/uaccess.h>*/ ++ ++#include "isp.h" ++#include "ispreg.h" ++#include "isph3a.h" ++#include "isp_af.h" ++#include "ispmmu.h" ++#include "../dw9710.h" ++ ++/** ++ * struct isp_af_buffer - AF frame stats buffer. ++ * @virt_addr: Virtual address to mmap the buffer. ++ * @phy_addr: Physical address of the buffer. ++ * @addr_align: Virtual Address 32 bytes aligned. ++ * @ispmmu_addr: Address of the buffer mapped by the ISPMMU. ++ * @mmap_addr: Mapped memory area of buffer. For userspace access. ++ * @locked: 1 - Buffer locked from write. 0 - Buffer can be overwritten. ++ * @frame_num: Frame number from which the statistics are taken. ++ * @lens_position: Lens position currently set in the DW9710 Coil motor driver. ++ * @next: Pointer to link next buffer. ++ */ ++struct isp_af_buffer { ++ unsigned long virt_addr; ++ unsigned long phy_addr; ++ unsigned long addr_align; ++ unsigned long ispmmu_addr; ++ unsigned long mmap_addr; ++ ++ u8 locked; ++ u16 frame_num; ++ struct isp_af_xtrastats xtrastats; ++ struct isp_af_buffer *next; ++}; ++ ++/** ++ * struct isp_af_status - AF status. ++ * @initialized: 1 - Buffers initialized. ++ * @update: 1 - Update registers. ++ * @stats_req: 1 - Future stats requested. ++ * @stats_done: 1 - Stats ready for user. ++ * @frame_req: Number of frame requested for statistics. ++ * @af_buff: Array of statistics buffers to access. ++ * @stats_buf_size: Statistics buffer size. ++ * @min_buf_size: Minimum statisitics buffer size. ++ * @frame_count: Frame Count. ++ * @stats_wait: Wait primitive for locking/unlocking the stats request. ++ * @buffer_lock: Spinlock for statistics buffers access. ++ */ ++static struct isp_af_status { ++ u8 initialized; ++ u8 update; ++ u8 stats_req; ++ u8 stats_done; ++ u16 frame_req; ++ ++ struct isp_af_buffer af_buff[H3A_MAX_BUFF]; ++ unsigned int stats_buf_size; ++ unsigned int min_buf_size; ++ ++ u32 frame_count; ++ wait_queue_head_t stats_wait; ++ spinlock_t buffer_lock; ++} afstat; ++ ++struct af_device *af_dev_configptr; ++static struct isp_af_buffer *active_buff; ++static int af_major = -1; ++static int camnotify; ++ ++ ++/** ++ * isp_af_setxtrastats - Receives extra statistics from prior frames. ++ * @xtrastats: Pointer to structure containing extra statistics fields like ++ * field count and timestamp of frame. ++ * ++ * Called from update_vbq in camera driver ++ **/ ++void isp_af_setxtrastats(struct isp_af_xtrastats *xtrastats, u8 updateflag) ++{ ++ int i, past_i; ++ ++ if (active_buff == NULL) ++ return; ++ ++ for (i = 0; i < H3A_MAX_BUFF; i++) { ++ if (afstat.af_buff[i].frame_num == active_buff->frame_num) ++ break; ++ } ++ ++ if (i == H3A_MAX_BUFF) ++ return; ++ ++ if (i == 0) { ++ if (afstat.af_buff[H3A_MAX_BUFF - 1].locked == 0) ++ past_i = H3A_MAX_BUFF - 1; ++ else ++ past_i = H3A_MAX_BUFF - 2; ++ } else if (i == 1) { ++ if (afstat.af_buff[0].locked == 0) ++ past_i = 0; ++ else ++ past_i = H3A_MAX_BUFF - 1; ++ } else { ++ if (afstat.af_buff[i - 1].locked == 0) ++ past_i = i - 1; ++ else ++ past_i = i - 2; ++ } ++ ++ if (updateflag & AF_UPDATEXS_TS) ++ afstat.af_buff[past_i].xtrastats.ts = xtrastats->ts; ++ ++ if (updateflag & AF_UPDATEXS_FIELDCOUNT) ++ afstat.af_buff[past_i].xtrastats.field_count = ++ xtrastats->field_count; ++} ++EXPORT_SYMBOL(isp_af_setxtrastats); ++ ++/* ++ * Helper function to update buffer cache pages ++ */ ++static void isp_af_update_req_buffer(struct isp_af_buffer *buffer) ++{ ++ int size = afstat.stats_buf_size; ++ ++ size = PAGE_ALIGN(size); ++ /* Update the kernel pages of the requested buffer */ ++ dmac_inv_range((void *)buffer->addr_align, (void *)buffer->addr_align + ++ size); ++} ++ ++/* Function to check paxel parameters */ ++int isp_af_check_paxel(void) ++{ ++ /* Check horizontal Count */ ++ if ((af_dev_configptr->config->paxel_config.hz_cnt ++ < AF_PAXEL_HORIZONTAL_COUNT_MIN) ++ || (af_dev_configptr->config->paxel_config.hz_cnt ++ > AF_PAXEL_HORIZONTAL_COUNT_MAX)) { ++ DPRINTK_ISPH3A("Error : Horizontal Count is incorrect"); ++ return -AF_ERR_HZ_COUNT; ++ } ++ ++ /*Check Vertical Count */ ++ if ((af_dev_configptr->config->paxel_config.vt_cnt ++ < AF_PAXEL_VERTICAL_COUNT_MIN) ++ || (af_dev_configptr->config->paxel_config.vt_cnt ++ > AF_PAXEL_VERTICAL_COUNT_MAX)) { ++ DPRINTK_ISPH3A("Error : Vertical Count is incorrect"); ++ return -AF_ERR_VT_COUNT; ++ } ++ ++ /*Check Height */ ++ if ((af_dev_configptr->config->paxel_config.height ++ < AF_PAXEL_HEIGHT_MIN) ++ || (af_dev_configptr->config->paxel_config.height ++ > AF_PAXEL_HEIGHT_MAX)) { ++ DPRINTK_ISPH3A("Error : Height is incorrect"); ++ return -AF_ERR_HEIGHT; ++ } ++ ++ /*Check width */ ++ if ((af_dev_configptr->config->paxel_config.width < AF_PAXEL_WIDTH_MIN) ++ || (af_dev_configptr->config->paxel_config.width ++ > AF_PAXEL_WIDTH_MAX)) { ++ DPRINTK_ISPH3A("Error : Width is incorrect"); ++ return -AF_ERR_WIDTH; ++ } ++ ++ /*Check Line Increment */ ++ if ((af_dev_configptr->config->paxel_config.line_incr ++ < AF_PAXEL_INCREMENT_MIN) ++ || (af_dev_configptr->config->paxel_config.line_incr ++ > AF_PAXEL_INCREMENT_MAX)) { ++ DPRINTK_ISPH3A("Error : Line Increment is incorrect"); ++ return -AF_ERR_INCR; ++ } ++ ++ /*Check Horizontal Start */ ++ if ((af_dev_configptr->config->paxel_config.hz_start % 2 != 0) ++ || (af_dev_configptr->config->paxel_config.hz_start ++ < (af_dev_configptr->config->iir_config.hz_start_pos + 2)) ++ || (af_dev_configptr->config->paxel_config.hz_start ++ > AF_PAXEL_HZSTART_MAX) ++ || (af_dev_configptr->config->paxel_config.hz_start ++ < AF_PAXEL_HZSTART_MIN)) { ++ DPRINTK_ISPH3A("Error : Horizontal Start is incorrect"); ++ return -AF_ERR_HZ_START; ++ } ++ ++ /*Check Vertical Start */ ++ if ((af_dev_configptr->config->paxel_config.vt_start ++ < AF_PAXEL_VTSTART_MIN) ++ || (af_dev_configptr->config->paxel_config.vt_start ++ > AF_PAXEL_VTSTART_MAX)) { ++ DPRINTK_ISPH3A("Error : Vertical Start is incorrect"); ++ return -AF_ERR_VT_START; ++ } ++ return 0; /*Success */ ++} ++ ++/** ++ * isp_af_check_iir - Function to check IIR Coefficient. ++ **/ ++int isp_af_check_iir(void) ++{ ++ int index; ++ ++ for (index = 0; index < AF_NUMBER_OF_COEF; index++) { ++ if ((af_dev_configptr->config->iir_config.coeff_set0[index]) ++ > AF_COEF_MAX) { ++ DPRINTK_ISPH3A( ++ "Error : Coefficient for set 0 is incorrect"); ++ return -AF_ERR_IIR_COEF; ++ } ++ ++ if ((af_dev_configptr->config->iir_config.coeff_set1[index]) ++ > AF_COEF_MAX) { ++ DPRINTK_ISPH3A( ++ "Error : Coefficient for set 1 is incorrect"); ++ return -AF_ERR_IIR_COEF; ++ } ++ } ++ ++ if ((af_dev_configptr->config->iir_config.hz_start_pos < AF_IIRSH_MIN) ++ || (af_dev_configptr->config->iir_config.hz_start_pos > ++ AF_IIRSH_MAX)) { ++ DPRINTK_ISPH3A("Error : IIRSH is incorrect"); ++ return -AF_ERR_IIRSH; ++ } ++ ++ return 0; ++} ++/** ++ * isp_af_unlock_buffers - Helper function to unlock all buffers. ++ **/ ++static void isp_af_unlock_buffers(void) ++{ ++ int i; ++ unsigned long irqflags; ++ ++ spin_lock_irqsave(&afstat.buffer_lock, irqflags); ++ for (i = 0; i < H3A_MAX_BUFF; i++) ++ afstat.af_buff[i].locked = 0; ++ ++ spin_unlock_irqrestore(&afstat.buffer_lock, irqflags); ++} ++ ++/* ++ * Helper function to link allocated buffers ++ */ ++static void isp_af_link_buffers(void) ++{ ++ int i; ++ ++ for (i = 0; i < H3A_MAX_BUFF; i++) { ++ if ((i + 1) < H3A_MAX_BUFF) ++ afstat.af_buff[i].next = &afstat.af_buff[i + 1]; ++ else ++ afstat.af_buff[i].next = &afstat.af_buff[0]; ++ } ++} ++ ++/* ++ * Helper function to munmap kernel buffers from user space. ++ */ ++static int isp_af_munmap(struct isp_af_buffer *buffer) ++{ ++ /* TO DO: munmap succesfully the kernel buffers, so they can be ++ remmaped again */ ++ buffer->mmap_addr = 0; ++ return 0; ++} ++ ++/* ++ * Helper function to mmap buffers to user space. ++ * buffer passed need to already have a valid physical address: buffer->phy_addr ++ * It returns user pointer as unsigned long in buffer->mmap_addr ++ */ ++static int isp_af_mmap_buffers(struct isp_af_buffer *buffer) ++{ ++ struct vm_area_struct vma; ++ struct mm_struct *mm = current->mm; ++ int size = afstat.stats_buf_size; ++ unsigned long addr = 0; ++ unsigned long pgoff = 0, flags = MAP_SHARED | MAP_ANONYMOUS; ++ unsigned long prot = PROT_READ | PROT_WRITE; ++ void *pos = (void *)buffer->addr_align; ++ ++ size = PAGE_ALIGN(size); ++ ++ addr = get_unmapped_area(NULL, addr, size, pgoff, flags); ++ vma.vm_mm = mm; ++ vma.vm_start = addr; ++ vma.vm_end = addr + size; ++ vma.vm_flags = calc_vm_prot_bits(prot) | calc_vm_flag_bits(flags); ++ vma.vm_pgoff = pgoff; ++ vma.vm_file = NULL; ++ vma.vm_page_prot = protection_map[vma.vm_flags]; ++ ++ while (size > 0) { ++ if (vm_insert_page(&vma, addr, vmalloc_to_page(pos))) ++ return -EAGAIN; ++ addr += PAGE_SIZE; ++ pos += PAGE_SIZE; ++ size -= PAGE_SIZE; ++ } ++ ++ buffer->mmap_addr = vma.vm_start; ++ return 0; ++} ++ ++/* Function to perform hardware set up */ ++int isp_af_configure(struct af_configuration *afconfig) ++{ ++ int result; ++ int buff_size, i; ++ unsigned int busyaf; ++ ++ if (NULL == afconfig) { ++ printk(KERN_ERR "Null argument in configuration. \n"); ++ return -EINVAL; ++ } ++ ++ af_dev_configptr->config = afconfig; ++ /* Get the value of PCR register */ ++ busyaf = omap_readl(ISPH3A_PCR); ++ ++ if ((busyaf & AF_BUSYAF) == AF_BUSYAF) { ++ DPRINTK_ISPH3A("AF_register_setup_ERROR : Engine Busy"); ++ DPRINTK_ISPH3A("\n Configuration cannot be done "); ++ return -AF_ERR_ENGINE_BUSY; ++ } ++ ++ /*Check IIR Coefficient and start Values */ ++ result = isp_af_check_iir(); ++ if (result < 0) ++ return result; ++ ++ /*Check Paxel Values */ ++ result = isp_af_check_paxel(); ++ if (result < 0) ++ return result; ++ ++ /*Check HMF Threshold Values */ ++ if (af_dev_configptr->config->hmf_config.threshold > AF_THRESHOLD_MAX) { ++ DPRINTK_ISPH3A("Error : HMF Threshold is incorrect"); ++ return -AF_ERR_THRESHOLD; ++ } ++ ++ /* Compute buffer size */ ++ buff_size = ++ (af_dev_configptr->config->paxel_config.hz_cnt + 1) * ++ (af_dev_configptr->config->paxel_config.vt_cnt + 1) * AF_PAXEL_SIZE; ++ ++ /*Deallocate the previous buffers */ ++ if (afstat.stats_buf_size && (buff_size > afstat.stats_buf_size)) { ++ isp_af_enable(0); ++ for (i = 0; i < H3A_MAX_BUFF; i++) { ++ isp_af_munmap(&afstat.af_buff[i]); ++ ispmmu_unmap(afstat.af_buff[i].ispmmu_addr); ++ dma_free_coherent(NULL, ++ afstat.min_buf_size + 64, ++ (void *)afstat.af_buff[i].virt_addr, ++ (dma_addr_t)afstat.af_buff[i].phy_addr); ++ afstat.af_buff[i].virt_addr = 0; ++ } ++ afstat.stats_buf_size = 0; ++ } ++ ++ if (!afstat.af_buff[0].virt_addr) { ++ afstat.stats_buf_size = buff_size; ++ afstat.min_buf_size = PAGE_ALIGN(afstat.stats_buf_size); ++ ++ for (i = 0; i < H3A_MAX_BUFF; i++) { ++ afstat.af_buff[i].virt_addr = ++ (unsigned long)dma_alloc_coherent(NULL, ++ afstat.min_buf_size, ++ (dma_addr_t *) ++ &afstat.af_buff[i].phy_addr, ++ GFP_KERNEL | GFP_DMA); ++ if (afstat.af_buff[i].virt_addr == 0) { ++ printk(KERN_ERR "Can't acquire memory for " ++ "buffer[%d]\n", i); ++ return -ENOMEM; ++ } ++ afstat.af_buff[i].addr_align = ++ afstat.af_buff[i].virt_addr; ++ while ((afstat.af_buff[i].addr_align & 0xFFFFFFC0) != ++ afstat.af_buff[i].addr_align) ++ afstat.af_buff[i].addr_align++; ++ afstat.af_buff[i].ispmmu_addr = ++ ispmmu_map(afstat.af_buff[i].phy_addr, ++ afstat.min_buf_size); ++ } ++ isp_af_unlock_buffers(); ++ isp_af_link_buffers(); ++ ++ /* First active buffer */ ++ if (active_buff == NULL) ++ active_buff = &afstat.af_buff[0]; ++ isp_af_set_address(active_buff->ispmmu_addr); ++ } ++ /* Always remap when calling Configure */ ++ for (i = 0; i < H3A_MAX_BUFF; i++) { ++ if (afstat.af_buff[i].mmap_addr) ++ isp_af_munmap(&afstat.af_buff[i]); ++ isp_af_mmap_buffers(&afstat.af_buff[i]); ++ } ++ ++ result = isp_af_register_setup(af_dev_configptr); ++ if (result < 0) ++ return result; ++ af_dev_configptr->size_paxel = buff_size; ++ afstat.initialized = 1; ++ /*Set configuration flag to indicate HW setup done */ ++ if (af_dev_configptr->config->af_config) ++ isp_af_enable(1); ++ else ++ isp_af_enable(0); ++ ++ /*Success */ ++ return 0; ++} ++EXPORT_SYMBOL(isp_af_configure); ++ ++int isp_af_register_setup(struct af_device *af_dev) ++{ ++ unsigned int pcr = 0, pax1 = 0, pax2 = 0, paxstart = 0; ++ unsigned int coef = 0; ++ unsigned int base_coef_set0 = 0; ++ unsigned int base_coef_set1 = 0; ++ int index; ++ ++ ++ /* Configure Hardware Registers */ ++ /* Set PCR Register */ ++ pcr = omap_readl(ISPH3A_PCR); /* Read PCR Register */ ++ ++ /*Set Accumulator Mode */ ++ if (af_dev->config->mode == ACCUMULATOR_PEAK) ++ pcr |= FVMODE; ++ else ++ pcr &= ~FVMODE; ++ ++ /*Set A-law */ ++ if (af_dev->config->alaw_enable == H3A_AF_ALAW_ENABLE) ++ pcr |= AF_ALAW_EN; ++ else ++ pcr &= ~AF_ALAW_EN; ++ ++ /*Set RGB Position */ ++ pcr &= ~RGBPOS; ++ pcr |= (af_dev->config->rgb_pos) << AF_RGBPOS_SHIFT; ++ ++ /*HMF Configurations */ ++ if (af_dev->config->hmf_config.enable == H3A_AF_HMF_ENABLE) { ++ pcr &= ~AF_MED_EN; ++ /* Enable HMF */ ++ pcr |= AF_MED_EN; ++ ++ /* Set Median Threshold */ ++ pcr &= ~MED_TH; ++ pcr |= ++ (af_dev->config->hmf_config.threshold) << AF_MED_TH_SHIFT; ++ } else ++ pcr &= ~AF_MED_EN; ++ ++ omap_writel(pcr, ISPH3A_PCR); ++ ++ pax1 &= ~PAXW; ++ pax1 |= (af_dev->config->paxel_config.width) << AF_PAXW_SHIFT; ++ ++ /* Set height in AFPAX1 */ ++ pax1 &= ~PAXH; ++ pax1 |= af_dev->config->paxel_config.height; ++ ++ omap_writel(pax1, ISPH3A_AFPAX1); ++ ++ /* Configure AFPAX2 Register */ ++ /* Set Line Increment in AFPAX2 Register */ ++ pax2 &= ~AFINCV; ++ pax2 |= (af_dev->config->paxel_config.line_incr) << AF_LINE_INCR_SHIFT; ++ /* Set Vertical Count */ ++ pax2 &= ~PAXVC; ++ pax2 |= (af_dev->config->paxel_config.vt_cnt) << AF_VT_COUNT_SHIFT; ++ /* Set Horizontal Count */ ++ pax2 &= ~PAXHC; ++ pax2 |= af_dev->config->paxel_config.hz_cnt; ++ omap_writel(pax2, ISPH3A_AFPAX2); ++ ++ /* Configure PAXSTART Register */ ++ /*Configure Horizontal Start */ ++ paxstart &= ~PAXSH; ++ paxstart |= ++ (af_dev->config->paxel_config.hz_start) << AF_HZ_START_SHIFT; ++ /* Configure Vertical Start */ ++ paxstart &= ~PAXSV; ++ paxstart |= af_dev->config->paxel_config.vt_start; ++ omap_writel(paxstart, ISPH3A_AFPAXSTART); ++ ++ /*SetIIRSH Register */ ++ omap_writel(af_dev->config->iir_config.hz_start_pos, ISPH3A_AFIIRSH); ++ ++ /*Set IIR Filter0 Coefficients */ ++ base_coef_set0 = ISPH3A_AFCOEF010; ++ for (index = 0; index <= 8; index += 2) { ++ coef &= ~COEF_MASK0; ++ coef |= af_dev->config->iir_config.coeff_set0[index]; ++ coef &= ~COEF_MASK1; ++ coef |= ++ (af_dev->config->iir_config. ++ coeff_set0[index + 1]) << AF_COEF_SHIFT; ++ omap_writel(coef, base_coef_set0); ++ ++ base_coef_set0 = base_coef_set0 + AFCOEF_OFFSET; ++ } ++ ++ /* set AFCOEF0010 Register */ ++ omap_writel(af_dev->config->iir_config.coeff_set0[10], ++ ISPH3A_AFCOEF010); ++ ++ /*Set IIR Filter1 Coefficients */ ++ ++ base_coef_set1 = ISPH3A_AFCOEF110; ++ for (index = 0; index <= 8; index += 2) { ++ coef &= ~COEF_MASK0; ++ coef |= af_dev->config->iir_config.coeff_set1[index]; ++ coef &= ~COEF_MASK1; ++ coef |= ++ (af_dev->config->iir_config. ++ coeff_set1[index + 1]) << AF_COEF_SHIFT; ++ omap_writel(coef, base_coef_set1); ++ ++ base_coef_set1 = base_coef_set1 + AFCOEF_OFFSET; ++ } ++ omap_writel(af_dev->config->iir_config.coeff_set1[10], ++ ISPH3A_AFCOEF1010); ++ ++ return 0; ++} ++ ++/* Function to set address */ ++void isp_af_set_address(unsigned long address) ++{ ++ omap_writel(address, ISPH3A_AFBUFST); ++} ++ ++static int isp_af_stats_available(struct isp_af_data *afdata) ++{ ++ int i; ++ unsigned long irqflags; ++ ++ spin_lock_irqsave(&afstat.buffer_lock, irqflags); ++ for (i = 0; i < H3A_MAX_BUFF; i++) { ++ if ((afdata->frame_number == afstat.af_buff[i].frame_num) ++ && (afstat.af_buff[i].frame_num != ++ active_buff->frame_num)) { ++ afstat.af_buff[i].locked = 1; ++ spin_unlock_irqrestore(&afstat.buffer_lock, irqflags); ++ isp_af_update_req_buffer(&afstat.af_buff[i]); ++ afstat.af_buff[i].frame_num = 0; ++ afdata->af_statistics_buf = (void *) ++ afstat.af_buff[i].mmap_addr; ++ afdata->xtrastats.ts = afstat.af_buff[i].xtrastats.ts; ++ afdata->xtrastats.field_count = ++ afstat.af_buff[i].xtrastats.field_count; ++ afdata->xtrastats.lens_position = ++ afstat.af_buff[i].xtrastats.lens_position; ++ return 0; ++ } ++ } ++ spin_unlock_irqrestore(&afstat.buffer_lock, irqflags); ++ /* Stats unavailable */ ++ ++ afdata->af_statistics_buf = NULL; ++ return -1; ++} ++ ++void isp_af_notify(int notify) ++{ ++ camnotify = notify; ++ if (camnotify && afstat.initialized) { ++ printk(KERN_DEBUG "Warning Camera Off \n"); ++ afstat.stats_req = 0; ++ afstat.stats_done = 1; ++ wake_up_interruptible(&afstat.stats_wait); ++ } ++} ++EXPORT_SYMBOL(isp_af_notify); ++/* ++ * This API allows the user to update White Balance gains, as well as ++ * exposure time and analog gain. It is also used to request frame ++ * statistics. ++ */ ++int isp_af_request_statistics(struct isp_af_data *afdata) ++{ ++ int ret = 0; ++ u16 frame_diff = 0; ++ u16 frame_cnt = afstat.frame_count; ++ wait_queue_t wqt; ++ ++ if (!af_dev_configptr->config->af_config) { ++ printk(KERN_ERR "AF engine not enabled\n"); ++ return -EINVAL; ++ } ++ afdata->af_statistics_buf = NULL; ++ ++ if (afdata->update != 0) { ++ if (afdata->update & REQUEST_STATISTICS) { ++ isp_af_unlock_buffers(); ++ /* Stats available? */ ++ DPRINTK_ISPH3A("Stats available?\n"); ++ ret = isp_af_stats_available(afdata); ++ if (!ret) ++ goto out; ++ ++ /* Stats in near future? */ ++ DPRINTK_ISPH3A("Stats in near future?\n"); ++ if (afdata->frame_number > frame_cnt) { ++ frame_diff = afdata->frame_number - frame_cnt; ++ } else if (afdata->frame_number < frame_cnt) { ++ if ((frame_cnt > ++ (MAX_FRAME_COUNT - MAX_FUTURE_FRAMES)) ++ && (afdata->frame_number ++ < MAX_FRAME_COUNT)) ++ frame_diff = afdata->frame_number ++ + MAX_FRAME_COUNT ++ - frame_cnt; ++ else { ++ /* Frame unavailable */ ++ frame_diff = MAX_FUTURE_FRAMES + 1; ++ afdata->af_statistics_buf = NULL; ++ } ++ } ++ ++ if (frame_diff > MAX_FUTURE_FRAMES) { ++ printk(KERN_ERR "Invalid frame requested\n"); ++ } else if (!camnotify) { ++ /* Block until frame in near future completes */ ++ afstat.frame_req = afdata->frame_number; ++ afstat.stats_req = 1; ++ afstat.stats_done = 0; ++ init_waitqueue_entry(&wqt, current); ++ ret = ++ wait_event_interruptible(afstat.stats_wait, ++ afstat.stats_done == 1); ++ if (ret < 0) ++ return ret; ++ DPRINTK_ISPH3A("ISP AF request status" ++ " interrupt raised\n"); ++ ++ /* Stats now available */ ++ ret = isp_af_stats_available(afdata); ++ if (ret) { ++ printk(KERN_ERR "After waiting for" ++ " stats, stats not available!!" ++ "\n"); ++ } ++ } ++ } ++ } ++ ++out: ++ afdata->curr_frame = afstat.frame_count; ++ ++ return 0; ++} ++EXPORT_SYMBOL(isp_af_request_statistics); ++ ++/* This function will handle the H3A interrupt. */ ++static void isp_af_isr(unsigned long status, isp_vbq_callback_ptr arg1, ++ void *arg2) ++{ ++ u16 frame_align; ++ ++ if ((H3A_AF_DONE & status) != H3A_AF_DONE) ++ return; ++ ++ /* Exchange buffers */ ++ active_buff = active_buff->next; ++ if (active_buff->locked == 1) ++ active_buff = active_buff->next; ++ isp_af_set_address(active_buff->ispmmu_addr); ++ ++ /* Update frame counter */ ++ afstat.frame_count++; ++ frame_align = afstat.frame_count; ++ if (afstat.frame_count > MAX_FRAME_COUNT) { ++ afstat.frame_count = 1; ++ frame_align++; ++ } ++ active_buff->frame_num = afstat.frame_count; ++ ++ dw9710_af_getfocus_cached(&active_buff->xtrastats.lens_position); ++ /* Future Stats requested? */ ++ if (afstat.stats_req) { ++ /* Is the frame we want already done? */ ++ if (frame_align >= (afstat.frame_req + 1)) { ++ afstat.stats_req = 0; ++ afstat.stats_done = 1; ++ wake_up_interruptible(&afstat.stats_wait); ++ } ++ } ++} ++ ++/* Function to Enable/Disable AF Engine */ ++int isp_af_enable(int enable) ++{ ++ unsigned int pcr; ++ ++ pcr = omap_readl(ISPH3A_PCR); ++ ++ /* Set AF_EN bit in PCR Register */ ++ if (enable) { ++ if (isp_set_callback(CBK_H3A_AF_DONE, isp_af_isr, ++ (void *)NULL, (void *)NULL)) { ++ printk(KERN_ERR "No callback for AF\n"); ++ return -EINVAL; ++ } ++ ++ pcr |= AF_EN; ++ } else { ++ isp_unset_callback(CBK_H3A_AF_DONE); ++ pcr &= ~AF_EN; ++ } ++ mdelay(100); ++ omap_writel(pcr, ISPH3A_PCR); ++ return 0; ++} ++ ++/* Function to register the AF character device driver. */ ++int __init isp_af_init(void) ++{ ++ /*allocate memory for device structure and initialize it with 0 */ ++ af_dev_configptr = kzalloc(sizeof(struct af_device), GFP_KERNEL); ++ if (!af_dev_configptr) ++ goto err_nomem1; ++ ++ active_buff = NULL; ++ ++ af_dev_configptr->config = (struct af_configuration *) ++ kzalloc(sizeof(struct af_configuration), GFP_KERNEL); ++ ++ if (af_dev_configptr->config == NULL) ++ goto err_nomem2; ++ ++ printk(KERN_DEBUG "isp_af_init\n"); ++ memset(&afstat, 0, sizeof(afstat)); ++ ++ init_waitqueue_head(&afstat.stats_wait); ++ spin_lock_init(&afstat.buffer_lock); ++ ++ return 0; ++ ++err_nomem2: ++ kfree(af_dev_configptr); ++err_nomem1: ++ printk(KERN_ERR "Error: kmalloc fail"); ++ return -ENOMEM; ++} ++ ++void __exit isp_af_exit(void) ++{ ++ int i; ++ ++ if (afstat.af_buff) { ++ /* Free buffers */ ++ for (i = 0; i < H3A_MAX_BUFF; i++) { ++ ispmmu_unmap(afstat.af_buff[i].ispmmu_addr); ++ dma_free_coherent(NULL, ++ afstat.min_buf_size + 64, ++ (void *)afstat.af_buff[i].virt_addr, ++ (dma_addr_t)afstat.af_buff[i].phy_addr); ++ } ++ } ++ kfree(af_dev_configptr->config); ++ kfree(af_dev_configptr); ++ ++ memset(&afstat, 0, sizeof(afstat)); ++ ++ af_major = -1; ++ isp_af_enable(0); ++} ++ ++module_init(isp_af_init) ++module_exit(isp_af_exit) ++ ++MODULE_AUTHOR("Texas Instruments"); ++MODULE_DESCRIPTION("AF ISP Module"); ++MODULE_LICENSE("GPL"); +Index: git/drivers/media/video/isp/isp_af.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ git/drivers/media/video/isp/isp_af.h 2009-02-12 16:32:13.000000000 -0600 +@@ -0,0 +1,258 @@ ++/* ++ * drivers/media/video/isp/isp_af.h ++ * ++ * Include file for AF module in TI's OMAP3430 Camera ISP ++ * ++ * Copyright (C) 2008 Texas Instruments, Inc. ++ * ++ * This package is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ * ++ * THIS PACKAGE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR ++ * IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED ++ * WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE. ++ */ ++ ++/* Device Constants */ ++#ifndef OMAP_ISP_AF_H ++#define OMAP_ISP_AF_H ++ ++#define AF_MAJOR_NUMBER 0 ++#define ISPAF_NAME "OMAPISP_AF" ++#define AF_NR_DEVS 1 ++#define AF_TIMEOUT (300 * HZ) / 1000 ++ ++ ++/* Range Constants */ ++#define AF_IIRSH_MIN 0 ++#define AF_IIRSH_MAX 4094 ++#define AF_PAXEL_HORIZONTAL_COUNT_MIN 0 ++#define AF_PAXEL_HORIZONTAL_COUNT_MAX 35 ++#define AF_PAXEL_VERTICAL_COUNT_MIN 0 ++#define AF_PAXEL_VERTICAL_COUNT_MAX 127 ++#define AF_PAXEL_INCREMENT_MIN 0 ++#define AF_PAXEL_INCREMENT_MAX 14 ++#define AF_PAXEL_HEIGHT_MIN 0 ++#define AF_PAXEL_HEIGHT_MAX 127 ++#define AF_PAXEL_WIDTH_MIN 0 ++#define AF_PAXEL_WIDTH_MAX 127 ++#define AF_PAXEL_HZSTART_MIN 2 ++#define AF_PAXEL_HZSTART_MAX 4094 ++ ++#define AF_PAXEL_VTSTART_MIN 0 ++#define AF_PAXEL_VTSTART_MAX 4095 ++#define AF_THRESHOLD_MAX 255 ++#define AF_COEF_MAX 4095 ++#define AF_PAXEL_SIZE 48 ++ ++/* Print Macros */ ++/*list of error code */ ++#define AF_ERR_HZ_COUNT 800 /* Invalid Horizontal Count */ ++#define AF_ERR_VT_COUNT 801 /* Invalid Vertical Count */ ++#define AF_ERR_HEIGHT 802 /* Invalid Height */ ++#define AF_ERR_WIDTH 803 /* Invalid width */ ++#define AF_ERR_INCR 804 /* Invalid Increment */ ++#define AF_ERR_HZ_START 805 /* Invalid horizontal Start */ ++#define AF_ERR_VT_START 806 /* Invalud vertical Start */ ++#define AF_ERR_IIRSH 807 /* Invalid IIRSH value */ ++#define AF_ERR_IIR_COEF 808 /* Invalid Coefficient */ ++#define AF_ERR_SETUP 809 /* Setup not done */ ++#define AF_ERR_THRESHOLD 810 /* Invalid Threshold */ ++#define AF_ERR_ENGINE_BUSY 811 /* Engine is busy */ ++#define AF_NUMBER_OF_COEF 11 ++/* list of ioctls */ ++#pragma pack(1) ++ ++#pragma pack() ++#define AFPID 0x0 /* Peripheral Revision ++ * and Class Information ++ */ ++ ++#define AFCOEF_OFFSET 0x00000004 /* COEFFICIENT BASE ++ * ADDRESS ++ */ ++ ++/* ++ * PCR fields ++ */ ++#define AF_BUSYAF (1 << 15) ++#define FVMODE (1 << 14) ++#define RGBPOS (0x7 << 11) ++#define MED_TH (0xFF << 3) ++#define AF_MED_EN (1 << 2) ++#define AF_ALAW_EN (1 << 1) ++#define AF_EN (1 << 0) ++ ++/* ++ * AFPAX1 fields ++ */ ++#define PAXW (0x7F << 16) ++#define PAXH 0x7F ++ ++/* ++ * AFPAX2 fields ++ */ ++#define AFINCV (0xF << 13) ++#define PAXVC (0x7F << 6) ++#define PAXHC 0x3F ++ ++/* ++ * AFPAXSTART fields ++ */ ++#define PAXSH (0xFFF<<16) ++#define PAXSV 0xFFF ++ ++/* ++ * COEFFICIENT MASK ++ */ ++ ++#define COEF_MASK0 0xFFF ++#define COEF_MASK1 (0xFFF<<16) ++ ++/* BIT SHIFTS */ ++#define AF_RGBPOS_SHIFT 11 ++#define AF_MED_TH_SHIFT 3 ++#define AF_PAXW_SHIFT 16 ++#define AF_LINE_INCR_SHIFT 13 ++#define AF_VT_COUNT_SHIFT 6 ++#define AF_HZ_START_SHIFT 16 ++#define AF_COEF_SHIFT 16 ++ ++/* Flags for update field */ ++#define REQUEST_STATISTICS (1 << 0) ++#define LENS_DESIRED_POSITION (1 << 1) ++#define LENS_CURRENT_POSITION (1 << 2) ++ ++#define AF_UPDATEXS_TS (1 << 0) ++#define AF_UPDATEXS_FIELDCOUNT (1 << 1) ++#define AF_UPDATEXS_LENSPOS (1 << 2) ++ ++/** ++ * struct isp_af_xtrastats - Extra statistics related to AF generated stats. ++ * @ts: Timestamp when the frame gets delivered to the user. ++ * @field_count: Field count of the frame delivered to the user. ++ * @lens_position: Lens position when the stats are being generated. ++ */ ++struct isp_af_xtrastats { ++ struct timeval ts; ++ unsigned long field_count; ++ u16 lens_position; ++}; ++ ++/** ++ * struct isp_af_data - AF statistics data to transfer between driver and user. ++ * @af_statistics_buf: Pointer to pass to user. ++ * @lens_current_position: Read value of lens absolute position. ++ * @desired_lens_direction: Lens desired location. ++ * @update: Bitwise flags to update parameters. ++ * @frame_number: Data for which frame is desired/given. ++ * @curr_frame: Current frame number being processed by AF module. ++ * @xtrastats: Extra statistics structure. ++ */ ++struct isp_af_data { ++ void *af_statistics_buf; ++ u16 lens_current_position; ++ u16 desired_lens_direction; ++ u16 update; ++ u16 frame_number; ++ u16 curr_frame; ++ struct isp_af_xtrastats xtrastats; ++}; ++ ++/* enum used for status of specific feature */ ++enum af_alaw_enable { ++ H3A_AF_ALAW_DISABLE = 0, ++ H3A_AF_ALAW_ENABLE = 1 ++}; ++ ++enum af_hmf_enable { ++ H3A_AF_HMF_DISABLE = 0, ++ H3A_AF_HMF_ENABLE = 1 ++}; ++ ++enum af_config_flag { ++ H3A_AF_CFG_DISABLE = 0, ++ H3A_AF_CFG_ENABLE = 1 ++}; ++ ++enum af_mode { ++ ACCUMULATOR_SUMMED = 0, ++ ACCUMULATOR_PEAK = 1 ++}; ++ ++/* Red, Green, and blue pixel location in the AF windows */ ++enum rgbpos { ++ GR_GB_BAYER = 0, /* GR and GB as Bayer pattern */ ++ RG_GB_BAYER = 1, /* RG and GB as Bayer pattern */ ++ GR_BG_BAYER = 2, /* GR and BG as Bayer pattern */ ++ RG_BG_BAYER = 3, /* RG and BG as Bayer pattern */ ++ GG_RB_CUSTOM = 4, /* GG and RB as custom pattern */ ++ RB_GG_CUSTOM = 5 /* RB and GG as custom pattern */ ++}; ++ ++/* Contains the information regarding the Horizontal Median Filter */ ++struct af_hmf { ++ enum af_hmf_enable enable; /* Status of Horizontal Median Filter */ ++ unsigned int threshold; /* Threshhold Value for Horizontal Median ++ * Filter ++ */ ++}; ++ ++/* Contains the information regarding the IIR Filters */ ++struct af_iir { ++ unsigned int hz_start_pos; /* IIR Start Register Value */ ++ int coeff_set0[AF_NUMBER_OF_COEF]; /* ++ * IIR Filter Coefficient for ++ * Set 0 ++ */ ++ int coeff_set1[AF_NUMBER_OF_COEF]; /* ++ * IIR Filter Coefficient for ++ * Set 1 ++ */ ++}; ++ ++/* Contains the information regarding the Paxels Structure in AF Engine */ ++struct af_paxel { ++ unsigned int width; /* Width of the Paxel */ ++ unsigned int height; /* Height of the Paxel */ ++ unsigned int hz_start; /* Horizontal Start Position */ ++ unsigned int vt_start; /* Vertical Start Position */ ++ unsigned int hz_cnt; /* Horizontal Count */ ++ unsigned int vt_cnt; /* vertical Count */ ++ unsigned int line_incr; /* Line Increment */ ++}; ++/* Contains the parameters required for hardware set up of AF Engine */ ++struct af_configuration { ++ enum af_alaw_enable alaw_enable; /*ALWAW status */ ++ struct af_hmf hmf_config; /*HMF configurations */ ++ enum rgbpos rgb_pos; /*RGB Positions */ ++ struct af_iir iir_config; /*IIR filter configurations */ ++ struct af_paxel paxel_config; /*Paxel parameters */ ++ enum af_mode mode; /*Accumulator mode */ ++ enum af_config_flag af_config; /*Flag indicates Engine is configured */ ++}; ++ ++/* Structure for device of AF Engine */ ++struct af_device { ++ struct af_configuration *config; /*Device configuration structure */ ++ int size_paxel; /*Paxel size in bytes */ ++}; ++ ++int isp_af_check_paxel(void); ++int isp_af_check_iir(void); ++int isp_af_register_setup(struct af_device *af_dev); ++int isp_af_enable(int); ++void isp_af_notify(int notify); ++ ++#include <linux/autoconf.h> ++#ifdef CONFIG_VIDEO_OMAP34XX_ISP_PREVIEWER ++int isp_af_request_statistics(struct isp_af_data *afdata); ++int isp_af_configure(struct af_configuration *afconfig); ++#else ++static inline int isp_af_request_statistics(struct isp_af_data *afdata){return 0;} ++static inline int isp_af_configure(struct af_configuration *afconfig){return 0;} ++#endif ++void isp_af_set_address(unsigned long); ++void isp_af_setxtrastats(struct isp_af_xtrastats *xtrastats, u8 updateflag); ++#endif /* OMAP_ISP_AF_H */ +Index: git/drivers/media/video/isp/ispccdc.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ git/drivers/media/video/isp/ispccdc.c 2009-02-12 11:39:19.000000000 -0600 +@@ -0,0 +1,1631 @@ ++/* ++ * drivers/media/video/isp/ispccdc.c ++ * ++ * Driver Library for CCDC module in TI's OMAP3430 Camera ISP ++ * ++ * Copyright (C) 2008 Texas Instruments, Inc. ++ * ++ * This package is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ * ++ * THIS PACKAGE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR ++ * IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED ++ * WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE. ++ */ ++ ++#include <linux/module.h> ++#include <linux/errno.h> ++#include <linux/sched.h> ++#include <linux/delay.h> ++#include <linux/types.h> ++#include <asm/mach-types.h> ++#include <asm/io.h> ++#include <asm/scatterlist.h> ++#include <asm/uaccess.h> ++ ++#include "isp.h" ++#include "ispreg.h" ++#include "ispccdc.h" ++#ifndef CONFIG_ARCH_OMAP3410 ++#include "isppreview.h" ++#endif ++#include "ispmmu.h" ++ ++#ifndef CONFIG_ARCH_OMAP3410 ++#define USE_ISP_LSC ++#else ++#undef USE_ISP_LSC ++#endif ++ ++static u32 *fpc_table_add; ++static unsigned long fpc_table_add_m; ++ ++/* ++ * Structure for the CCDC module to store its own information. ++ */ ++static struct isp_ccdc { ++ u8 ccdc_inuse; ++ u32 ccdcout_w; ++ u32 ccdcout_h; ++ u32 ccdcin_w; ++ u32 ccdcin_h; ++ u32 ccdcin_woffset; ++ u32 ccdcin_hoffset; ++ u32 crop_w; ++ u32 crop_h; ++ u8 ccdc_inpfmt; ++ u8 ccdc_outfmt; ++ u8 vpout_en; ++ u8 wen; ++ u8 exwen; ++ u8 refmt_en; ++ u8 ccdcslave; ++ u8 syncif_ipmod; ++ u8 obclamp_en; ++ u8 lsc_en; ++ struct semaphore semlock; ++} ispccdc_obj; ++ ++#ifdef USE_ISP_LSC ++ static struct ispccdc_lsc_config lsc_config; ++ static u8 *lsc_gain_table; ++ static unsigned long lsc_ispmmu_addr; ++ static int lsc_initialized; ++ static int size_mismatch; ++ static u8 ccdc_use_lsc; ++ static u8 ispccdc_lsc_tbl[] = { ++ #include "ispccd_lsc.dat" ++ }; ++#endif ++ ++/* Structure for saving/restoring CCDC module registers*/ ++static struct isp_reg ispccdc_reg_list[] = { ++ {ISPCCDC_SYN_MODE, 0x0000}, ++ {ISPCCDC_HD_VD_WID, 0x0000}, ++ {ISPCCDC_PIX_LINES, 0x0000}, ++ {ISPCCDC_HORZ_INFO, 0x0000}, ++ {ISPCCDC_VERT_START, 0x0000}, ++ {ISPCCDC_VERT_LINES, 0x0000}, ++ {ISPCCDC_CULLING, 0x0000}, ++ {ISPCCDC_HSIZE_OFF, 0x0000}, ++ {ISPCCDC_SDOFST, 0x0000}, ++ {ISPCCDC_SDR_ADDR, 0x0000}, ++ {ISPCCDC_CLAMP, 0x0000}, ++ {ISPCCDC_DCSUB, 0x0000}, ++ {ISPCCDC_COLPTN, 0x0000}, ++ {ISPCCDC_BLKCMP, 0x0000}, ++ {ISPCCDC_FPC, 0x0000}, ++ {ISPCCDC_FPC_ADDR, 0x0000}, ++ {ISPCCDC_VDINT, 0x0000}, ++ {ISPCCDC_ALAW, 0x0000}, ++ {ISPCCDC_REC656IF, 0x0000}, ++ {ISPCCDC_CFG, 0x0000}, ++ {ISPCCDC_FMTCFG, 0x0000}, ++ {ISPCCDC_FMT_HORZ, 0x0000}, ++ {ISPCCDC_FMT_VERT, 0x0000}, ++ {ISPCCDC_FMT_ADDR0, 0x0000}, ++ {ISPCCDC_FMT_ADDR1, 0x0000}, ++ {ISPCCDC_FMT_ADDR2, 0x0000}, ++ {ISPCCDC_FMT_ADDR3, 0x0000}, ++ {ISPCCDC_FMT_ADDR4, 0x0000}, ++ {ISPCCDC_FMT_ADDR5, 0x0000}, ++ {ISPCCDC_FMT_ADDR6, 0x0000}, ++ {ISPCCDC_FMT_ADDR7, 0x0000}, ++ {ISPCCDC_PRGEVEN0, 0x0000}, ++ {ISPCCDC_PRGEVEN1, 0x0000}, ++ {ISPCCDC_PRGODD0, 0x0000}, ++ {ISPCCDC_PRGODD1, 0x0000}, ++ {ISPCCDC_VP_OUT, 0x0000}, ++ {ISPCCDC_LSC_CONFIG, 0x0000}, ++ {ISPCCDC_LSC_INITIAL, 0x0000}, ++ {ISPCCDC_LSC_TABLE_BASE, 0x0000}, ++ {ISPCCDC_LSC_TABLE_OFFSET, 0x0000}, ++ {ISP_TOK_TERM, 0x0000} ++}; ++ ++/* ++ * Abstraction layer CCDC Module configuration. ++ */ ++int omap34xx_isp_ccdc_config(void *userspace_add) ++{ ++ struct ispccdc_bclamp bclamp_t; ++ struct ispccdc_blcomp blcomp_t; ++ struct ispccdc_fpc fpc_t; ++ struct ispccdc_culling cull_t; ++ struct ispccdc_update_config ccdc_struct; ++ u32 old_size; ++ ++ if (userspace_add == NULL) ++ return -EINVAL; ++ ++ if (copy_from_user(&ccdc_struct, ++ (struct ispccdc_update_config *)(userspace_add), ++ sizeof(struct ispccdc_update_config))) ++ goto copy_from_user_err; ++ ++ if ((ISP_ABS_CCDC_ALAW & ccdc_struct.flag) == ++ ISP_ABS_CCDC_ALAW) { ++ if ((ISP_ABS_CCDC_ALAW & ccdc_struct.update) == ++ ISP_ABS_CCDC_ALAW) { ++ ispccdc_config_alaw(ccdc_struct.alawip); ++ ispccdc_enable_alaw(1); ++ } else ++ ispccdc_enable_alaw(1); ++ } else { ++ if ((ISP_ABS_CCDC_ALAW & ccdc_struct.update) == ++ ISP_ABS_CCDC_ALAW) ++ ispccdc_enable_alaw(0); ++ } ++ ++ if ((ISP_ABS_CCDC_LPF & ccdc_struct.flag) == ISP_ABS_CCDC_LPF) ++ ispccdc_enable_lpf(1); ++ else ++ ispccdc_enable_lpf(0); ++ ++ if ((ISP_ABS_CCDC_BLCLAMP & ccdc_struct.flag) == ++ ISP_ABS_CCDC_BLCLAMP) { ++ if ((ISP_ABS_CCDC_BLCLAMP & ccdc_struct.update) == ++ ISP_ABS_CCDC_BLCLAMP) { ++ if (copy_from_user(&bclamp_t, ++ (struct ispccdc_bclamp *) ++ (ccdc_struct.bclamp), ++ sizeof(struct ispccdc_bclamp))) ++ goto copy_from_user_err; ++ ++ ispccdc_config_black_clamp(bclamp_t); ++ ispccdc_enable_black_clamp(1); ++ } else ++ ispccdc_enable_black_clamp(1); ++ } else { ++ if ((ISP_ABS_CCDC_BLCLAMP & ccdc_struct.update) == ++ ISP_ABS_CCDC_BLCLAMP) ++ ispccdc_enable_black_clamp(0); ++ } ++ ++ if ((ISP_ABS_CCDC_BCOMP & ccdc_struct.update) == ISP_ABS_CCDC_BCOMP) { ++ if (copy_from_user(&blcomp_t, ++ (struct ispccdc_blcomp *)(ccdc_struct.blcomp), ++ sizeof(blcomp_t))) ++ goto copy_from_user_err; ++ ++ ispccdc_config_black_comp(blcomp_t); ++ } ++ ++ if ((ISP_ABS_CCDC_FPC & ccdc_struct.flag) == ISP_ABS_CCDC_FPC) { ++ if ((ISP_ABS_CCDC_FPC & ccdc_struct.update) == ++ ISP_ABS_CCDC_FPC) { ++ if (copy_from_user(&fpc_t, ++ (struct ispccdc_fpc *)(ccdc_struct.fpc), ++ sizeof(fpc_t))) ++ goto copy_from_user_err; ++ fpc_table_add = (u32 *) ++ kmalloc((64 + ((fpc_t.fpnum) * 4)), ++ GFP_KERNEL|GFP_DMA); ++ if (fpc_table_add == NULL) { ++ printk(KERN_ERR "Cannot allocate memory for FPC table"); ++ return -ENOMEM; ++ } ++ ++ while (((int)fpc_table_add & 0xFFFFFFC0) != (int)fpc_table_add) ++ fpc_table_add++; ++ ++ fpc_table_add_m = ispmmu_map(virt_to_phys(fpc_table_add), ++ (fpc_t.fpnum)*4); ++ ++ if (copy_from_user(fpc_table_add, (void *)fpc_t.fpcaddr, ++ fpc_t.fpnum * 4)) ++ goto copy_from_user_err; ++ ++ fpc_t.fpcaddr = fpc_table_add_m; ++ ispccdc_config_fpc(fpc_t); ++ ispccdc_enable_fpc(1); ++ } else ++ ispccdc_enable_fpc(1); ++ } else { ++ if ((ISP_ABS_CCDC_FPC & ccdc_struct.update) == ++ ISP_ABS_CCDC_FPC) ++ ispccdc_enable_fpc(0); ++ } ++ ++ if ((ISP_ABS_CCDC_CULL & ccdc_struct.update) == ISP_ABS_CCDC_CULL) { ++ if (copy_from_user(&cull_t, ++ (struct ispccdc_culling *)(ccdc_struct.cull), ++ sizeof(cull_t))) ++ goto copy_from_user_err; ++ ispccdc_config_culling(cull_t); ++ } ++#ifdef USE_ISP_LSC ++ if ((ISP_ABS_CCDC_CONFIG_LSC & ccdc_struct.flag) == ++ ISP_ABS_CCDC_CONFIG_LSC) { ++ if ((ISP_ABS_CCDC_CONFIG_LSC & ccdc_struct.update) == ++ ISP_ABS_CCDC_CONFIG_LSC) { ++ old_size = lsc_config.size; ++ if (copy_from_user(&lsc_config, ++ (struct ispccdc_lsc_config *) ++ (ccdc_struct.lsc_cfg), ++ sizeof(struct ispccdc_lsc_config))) ++ goto copy_from_user_err; ++ ++ lsc_initialized = 0; ++ ++ if (lsc_config.size <= old_size) ++ size_mismatch = 0; ++ else ++ size_mismatch = 1; ++ ++ ispccdc_config_lsc(&lsc_config); ++ } ++ } ++ ++ if ((ISP_ABS_CCDC_CONFIG_LSC & ccdc_struct.flag) == ++ ISP_ABS_CCDC_CONFIG_LSC) ++ ccdc_use_lsc = 1; ++ else { ++ ispccdc_enable_lsc(0); ++ ccdc_use_lsc = 0; ++ } ++#endif ++ if ((ISP_ABS_CCDC_COLPTN & ccdc_struct.update) == ++ ISP_ABS_CCDC_COLPTN) ++ ispccdc_config_imgattr(ccdc_struct.colptn); ++ ++ return 0; ++ ++copy_from_user_err: ++ printk(KERN_ERR "CCDC Config:Copy From User Error"); ++ return -EINVAL ; ++} ++EXPORT_SYMBOL(omap34xx_isp_ccdc_config); ++ ++/* ++ * Reserve the CCDC module. ++ * Only one user at a time. ++ */ ++int ispccdc_request(void) ++{ ++ down(&(ispccdc_obj.semlock)); ++ if (!(ispccdc_obj.ccdc_inuse)) { ++ ispccdc_obj.ccdc_inuse = 1; ++ up(&(ispccdc_obj.semlock)); ++ /* Turn on CCDC module Clocks. */ ++ omap_writel((omap_readl(ISP_CTRL)) | ISPCTRL_CCDC_RAM_EN | ++ ISPCTRL_CCDC_CLK_EN | ++ ISPCTRL_SBL_WR1_RAM_EN, ++ ISP_CTRL); ++ /* VDLC = 1 is a must if CCDC to be used */ ++ omap_writel((omap_readl(ISPCCDC_CFG)) | ISPCCDC_CFG_VDLC ++ , ISPCCDC_CFG); ++ return 0; ++ } else{ ++ up(&(ispccdc_obj.semlock)); ++ DPRINTK_ISPCCDC("ISP_ERR : CCDC Module Busy"); ++ return -EBUSY; ++ } ++} ++EXPORT_SYMBOL(ispccdc_request); ++ ++/* ++ * Marks CCDC module free. ++ */ ++int ispccdc_free(void) ++{ ++ down(&(ispccdc_obj.semlock)); ++ if (ispccdc_obj.ccdc_inuse) { ++ ispccdc_obj.ccdc_inuse = 0; ++ up(&(ispccdc_obj.semlock)); ++ /* Turn off CCDC module Clocks. */ ++ omap_writel((omap_readl(ISP_CTRL)) & ~(ISPCTRL_CCDC_CLK_EN ++ | ISPCTRL_CCDC_RAM_EN ++ | ISPCTRL_SBL_WR1_RAM_EN), ISP_CTRL); ++ return 0; ++ } else { ++ up(&(ispccdc_obj.semlock)); ++ DPRINTK_ISPCCDC("ISP_ERR : CCDC Module already freed"); ++ return -EINVAL; ++ } ++} ++EXPORT_SYMBOL(ispccdc_free); ++ ++#ifdef USE_ISP_LSC ++/* ++ * Load lens shading table ++ */ ++int ispccdc_load_lsc(u32 table_size) ++{ ++ if (table_size == 0) ++ return -EINVAL; ++ ++ if (lsc_initialized) ++ return 0; ++ ++ /* Disable LSC module*/ ++ ispccdc_enable_lsc(0); ++ lsc_gain_table = kmalloc(table_size, GFP_KERNEL | GFP_DMA); ++ ++ if (lsc_gain_table == NULL) { ++ printk(KERN_ERR "Cannot allocate memory for gain tables\n"); ++ return -ENOMEM; ++ } ++ ++ memcpy(lsc_gain_table, ispccdc_lsc_tbl, table_size); ++ lsc_ispmmu_addr = ispmmu_map(virt_to_phys(lsc_gain_table), table_size); ++ ++ omap_writel(lsc_ispmmu_addr , ISPCCDC_LSC_TABLE_BASE); ++ lsc_initialized = 1; ++ ++ return 0; ++} ++EXPORT_SYMBOL(ispccdc_load_lsc); ++ ++/* ++ * Configures the lens shading compensation module ++ * lsc_cfg : LSC configuration structure ++ */ ++void ispccdc_config_lsc(struct ispccdc_lsc_config *lsc_cfg) ++{ ++ int reg; ++ ++ /* Disable LSC module*/ ++ ispccdc_enable_lsc(0); ++ ++ omap_writel(lsc_cfg->offset, ISPCCDC_LSC_TABLE_OFFSET); ++ ++ reg = 0x0000; ++ reg |= (lsc_cfg->gain_mode_n << ISPCCDC_LSC_GAIN_MODE_N_SHIFT); ++ reg |= (lsc_cfg->gain_mode_m << ISPCCDC_LSC_GAIN_MODE_M_SHIFT); ++ reg |= (lsc_cfg->gain_format << ISPCCDC_LSC_GAIN_FORMAT_SHIFT); ++ omap_writel(reg , ISPCCDC_LSC_CONFIG); ++ ++ reg = 0x0000; ++ reg &= ~ISPCCDC_LSC_INITIAL_X_MASK; ++ reg |= (lsc_cfg->initial_x << ISPCCDC_LSC_INITIAL_X_SHIFT); ++ reg &= ~ISPCCDC_LSC_INITIAL_Y_MASK; ++ reg |= (lsc_cfg->initial_y << ISPCCDC_LSC_INITIAL_Y_SHIFT); ++ omap_writel(reg , ISPCCDC_LSC_INITIAL); ++} ++EXPORT_SYMBOL(ispccdc_config_lsc); ++ ++/* ++ * Enables lens shading compensation module ++ * enable :0 - Disable LSC : 1- Enables LSC ++ */ ++void ispccdc_enable_lsc(u8 enable) ++{ ++ if (enable & ccdc_use_lsc) { ++ omap_writel(omap_readl(ISP_CTRL) | ISPCTRL_SBL_SHARED_RPORTB | ++ ISPCTRL_SBL_RD_RAM_EN, ISP_CTRL); ++ omap_writel(omap_readl(ISPCCDC_LSC_CONFIG) | 0x01, ++ ISPCCDC_LSC_CONFIG); ++ ispccdc_obj.lsc_en = 1; ++ } else { ++ omap_writel(omap_readl(ISPCCDC_LSC_CONFIG) & 0xFFFE, ++ ISPCCDC_LSC_CONFIG); ++ ispccdc_obj.lsc_en = 0; ++ } ++} ++EXPORT_SYMBOL(ispccdc_enable_lsc); ++ ++/* ++* Abstraction layer LSC Updates ++*/ ++int omap34xx_isp_lsc_update(void *userspace_add) ++{ ++ struct isptables_update isptables_struct; ++ ++ if (userspace_add == NULL) ++ return -EINVAL; ++ ++ if (copy_from_user(&isptables_struct, (void *)userspace_add, ++ sizeof(struct isptables_update))) ++ goto copy_from_user_err; ++ ++ if ((ISP_ABS_TBL_LSC & isptables_struct.flag) == ISP_ABS_TBL_LSC) { ++ if ((ISP_ABS_TBL_LSC & isptables_struct.update) == ++ ISP_ABS_TBL_LSC) { ++ ispccdc_enable_lsc(0); ++ if (size_mismatch) { ++ ispmmu_unmap(lsc_ispmmu_addr); ++ kfree(lsc_gain_table); ++ lsc_gain_table = kmalloc(lsc_config.size, ++ GFP_KERNEL | GFP_DMA); ++ if (!lsc_gain_table) { ++ printk(KERN_ERR "Cannot allocate " ++ "memory for gain tables \n"); ++ return -ENOMEM; ++ } ++ ++ lsc_ispmmu_addr = ispmmu_map( ++ virt_to_phys(lsc_gain_table), ++ lsc_config.size); ++ omap_writel(lsc_ispmmu_addr, ++ ISPCCDC_LSC_TABLE_BASE); ++ lsc_initialized = 1; ++ size_mismatch = 0; ++ } ++ ++ if (copy_from_user(lsc_gain_table, isptables_struct.lsc, ++ lsc_config.size)) ++ goto copy_from_user_err; ++ } ++ ++ ccdc_use_lsc = 1; ++ } else { ++ if ((ISP_ABS_TBL_LSC & isptables_struct.update) == ++ ISP_ABS_TBL_LSC) ++ ispccdc_enable_lsc(0); ++ ccdc_use_lsc = 0; ++ } ++ ++ return 0; ++ ++copy_from_user_err: ++ printk(KERN_ERR "LSC Update:Copy From User Error"); ++ return -EINVAL; ++} ++#else ++void ispccdc_enable_lsc(u8 enable) {} ++#endif ++EXPORT_SYMBOL(omap34xx_isp_lsc_update); ++ ++void ispccdc_config_crop(u32 left, u32 top, u32 height, u32 width) ++{ ++/* The following restrictions are applied for the crop settings. If incoming ++ * values do not follow these restrictions then we map the settings to the ++ * closest acceptable crop value. ++ * 1) Left offset is always odd. This can be avoided if we enable byte swap ++ * option for incoming data into CCDC. ++ * 2) Height offset is always even. ++ * 3) Crop width is always a multiple of 16 pixels ++ * 4) Crop height is always even. ++ */ ++ ++ ispccdc_obj.ccdcin_woffset = left + ((left+1)%2); ++ ispccdc_obj.ccdcin_hoffset = top + (top % 2); ++ ++ ispccdc_obj.crop_w = width - (width % 16); ++ ispccdc_obj.crop_h = height + (height % 2); ++ ++ DPRINTK_ISPCCDC("\n\tOffsets L %d T %d W %d H %d\n", ++ ispccdc_obj.ccdcin_woffset, ++ ispccdc_obj.ccdcin_hoffset, ++ ispccdc_obj.crop_w, ++ ispccdc_obj.crop_h); ++ ++} ++/* Sets up the default CCDC configuration according to the arguments. ++ * input : Indicates the module that gives the image to CCDC ++ * output : Indicates the module to which the CCDC outputs to. ++ */ ++int ispccdc_config_datapath(enum ccdc_input input, ++ enum ccdc_output output) ++{ ++ u32 syn_mode = 0; ++ struct ispccdc_vp vpcfg; ++ struct ispccdc_syncif syncif; ++ struct ispccdc_bclamp blkcfg; ++ /* Color pattern is ++ Gr R Gr R Gr R ... ++ B Gb . B Gb B Gb..... ++ Gr R Gr R Gr R ... ++ B Gb . B Gb B Gb..... ++ */ ++ u32 colptn = ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP0PLC0_SHIFT ++ | ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP0PLC1_SHIFT ++ | ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP0PLC2_SHIFT ++ | ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP0PLC3_SHIFT ++ | ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP1PLC0_SHIFT ++ | ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP1PLC1_SHIFT ++ | ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP1PLC2_SHIFT ++ | ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP1PLC3_SHIFT ++ | ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP2PLC0_SHIFT ++ | ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP2PLC1_SHIFT ++ | ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP2PLC2_SHIFT ++ | ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP2PLC3_SHIFT ++ | ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP3PLC0_SHIFT ++ | ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP3PLC1_SHIFT ++ | ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP3PLC2_SHIFT ++ | ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP3PLC3_SHIFT; ++ ++ /* CCDC does not convert the image format */ ++ if (((input == CCDC_RAW) || (input == CCDC_OTHERS)) ++ && (output == CCDC_YUV_RSZ)) { ++ DPRINTK_ISPCCDC("ISP_ERR : Wrong CCDC i/p,o/p Combination"); ++ return -EINVAL; ++ } ++ ++ syn_mode = omap_readl(ISPCCDC_SYN_MODE); ++ ++ switch (output) { ++ case CCDC_YUV_RSZ: ++ syn_mode |= ISPCCDC_SYN_MODE_SDR2RSZ; ++ syn_mode &= ~ISPCCDC_SYN_MODE_WEN; ++ break; ++ ++ case CCDC_YUV_MEM_RSZ: ++ syn_mode |= ISPCCDC_SYN_MODE_SDR2RSZ; ++ ispccdc_obj.wen = 1; ++ syn_mode |= ISPCCDC_SYN_MODE_WEN; ++ break; ++ ++ case CCDC_OTHERS_VP: ++ syn_mode &= ~ISPCCDC_SYN_MODE_VP2SDR; ++ syn_mode &= ~ISPCCDC_SYN_MODE_SDR2RSZ; ++ syn_mode &= ~ISPCCDC_SYN_MODE_WEN; ++ /* Video Port Configuration */ ++ vpcfg.bitshift_sel = BIT9_0; ++ vpcfg.freq_sel = PIXCLKBY2; ++ ispccdc_config_vp(vpcfg); ++ ispccdc_enable_vp(1); ++ break; ++ ++ case CCDC_OTHERS_MEM: ++ syn_mode &= ~ISPCCDC_SYN_MODE_VP2SDR; ++ syn_mode &= ~ISPCCDC_SYN_MODE_SDR2RSZ; ++ syn_mode |= ISPCCDC_SYN_MODE_WEN; ++ /* Generally cam_wen is used with cam_hs, vs signals */ ++#ifndef ENABLE_BT_656_CAPTURE ++ syn_mode |= ISPCCDC_SYN_MODE_EXWEN; ++ omap_writel((omap_readl(ISPCCDC_CFG)) ++ | ISPCCDC_CFG_WENLOG, ISPCCDC_CFG); ++#else ++ syn_mode &= ~ISPCCDC_SYN_MODE_EXWEN; ++#endif ++ break; ++ ++ case CCDC_OTHERS_VP_MEM: ++ syn_mode |= ISPCCDC_SYN_MODE_VP2SDR; ++ syn_mode |= ISPCCDC_SYN_MODE_WEN; ++ /* Generally cam_wen is used with cam_hs, vs signals */ ++ syn_mode |= ISPCCDC_SYN_MODE_EXWEN; ++ omap_writel((omap_readl(ISPCCDC_CFG)) ++ | ISPCCDC_CFG_WENLOG, ISPCCDC_CFG); ++ /* Video Port Configuration */ ++ vpcfg.bitshift_sel = BIT9_0; ++ vpcfg.freq_sel = PIXCLKBY2; ++ ispccdc_config_vp(vpcfg); ++ ispccdc_enable_vp(1); ++ break; ++ default: ++ DPRINTK_ISPCCDC("ISP_ERR : Wrong CCDC Input"); ++ return -EINVAL; ++ }; ++ ++#ifdef USE_ISP_LSC ++ if (input == CCDC_RAW) { ++ lsc_config.initial_x = 0; ++ lsc_config.initial_y = 0; ++ lsc_config.gain_mode_n = 0x06; ++ lsc_config.gain_mode_m = 0x06; ++ lsc_config.gain_format = 0x04; ++ lsc_config.offset = 0x60; ++ ispccdc_config_lsc(&lsc_config); ++ ispccdc_load_lsc(lsc_config.size); ++ /* mdelay(100); ++ ispccdc_enable_lsc(1); */ ++ } ++#endif ++ ++ omap_writel(syn_mode, ISPCCDC_SYN_MODE); ++ ++ switch (input) { ++ case CCDC_RAW: ++ /* Slave mode */ ++ syncif.ccdc_mastermode = 0; ++ /* Normal */ ++ syncif.datapol = 0; ++ syncif.datsz = DAT10; ++ /* Progressive Mode */ ++ syncif.fldmode = 0; ++ /* Input */ ++ syncif.fldout = 0; ++ /* Positive */ ++ syncif.fldpol = 0; ++ /* Odd Field */ ++ syncif.fldstat = 0; ++ /*Positive */ ++ syncif.hdpol = 0; ++ syncif.ipmod = RAW; ++ /* Positive */ ++ syncif.vdpol = 0; ++ ispccdc_config_sync_if(syncif); ++ ispccdc_config_imgattr(colptn); ++ blkcfg.dcsubval = 42; ++ ispccdc_config_black_clamp(blkcfg); ++ break; ++ case CCDC_YUV_SYNC: ++ /* Slave mode */ ++ syncif.ccdc_mastermode = 0; ++ /* Normal */ ++ syncif.datapol = 0; ++ syncif.datsz = DAT8; ++ /* Progressive Mode */ ++ syncif.fldmode = 0; ++ /* Input */ ++ syncif.fldout = 0; ++ /* Positive */ ++ syncif.fldpol = 0; ++ /* Odd Field */ ++ syncif.fldstat = 0; ++ /*Positive */ ++ syncif.hdpol = 0; ++ syncif.ipmod = YUV16; ++ /*Positive */ ++ syncif.vdpol = 0; ++#ifdef ENABLE_BT_656_CAPTURE ++ syncif.bt_r656_en = 0; ++#endif ++ ispccdc_config_imgattr(0); ++ ispccdc_config_sync_if(syncif); ++ blkcfg.dcsubval = 0; ++ ispccdc_config_black_clamp(blkcfg); ++ break; ++ case CCDC_YUV_BT: ++#ifdef ENABLE_BT_656_CAPTURE ++ /* Slave mode */ ++ syncif.ccdc_mastermode = 0; ++ /* Normal */ ++ syncif.datapol = 0; ++ syncif.datsz = DAT8; ++ /* Progressive Mode */ ++ syncif.fldmode = 1; ++ /* Input */ ++ syncif.fldout = 0; ++ /* Positive */ ++ syncif.fldpol = 0; ++ /* Odd Field */ ++ syncif.fldstat = 0; ++ /*Positive */ ++ syncif.hdpol = 0; ++ syncif.ipmod = YUV8; ++ /*Positive */ ++ syncif.vdpol = 1; ++ syncif.bt_r656_en = 1; ++ ispccdc_config_imgattr(0); ++ ispccdc_config_sync_if(syncif); ++ blkcfg.dcsubval = 0; ++ ispccdc_config_black_clamp(blkcfg); ++#endif ++ break; ++ case CCDC_OTHERS: ++ break; ++ default: ++ DPRINTK_ISPCCDC("ISP_ERR : Wrong CCDC Input"); ++ return -EINVAL; ++ } ++ ++ ispccdc_obj.ccdc_inpfmt = input; ++ ispccdc_obj.ccdc_outfmt = output; ++ ispccdc_print_status(); ++ isp_print_status(); ++ return 0; ++} ++EXPORT_SYMBOL(ispccdc_config_datapath); ++ ++/* ++ * Configures the sync interface parameters between the sensor and the CCDC. ++ * syncif : Structure containing the sync parameters like ++ * field state, ++ * CCDC in master/slave mode, raw/yuv data, polarity of data, ++ * field, hs, vs signals. ++ */ ++void ispccdc_config_sync_if(struct ispccdc_syncif syncif) ++{ ++ u32 syn_mode = omap_readl(ISPCCDC_SYN_MODE); ++ ++ syn_mode |= ISPCCDC_SYN_MODE_VDHDEN; ++ ++ if (syncif.fldstat) ++ syn_mode |= ISPCCDC_SYN_MODE_FLDSTAT; ++ else ++ syn_mode &= ~ISPCCDC_SYN_MODE_FLDSTAT; ++ ++ syn_mode &= ISPCCDC_SYN_MODE_INPMOD_MASK; ++ ispccdc_obj.syncif_ipmod = syncif.ipmod; ++ ++ switch (syncif.ipmod) { ++ case RAW: ++ break; ++ case YUV16: ++ syn_mode |= ISPCCDC_SYN_MODE_INPMOD_YCBCR16; ++ break; ++ case YUV8: ++ syn_mode |= ISPCCDC_SYN_MODE_INPMOD_YCBCR8; ++#ifdef ENABLE_BT_656_CAPTURE ++ syn_mode |= ISPCCDC_SYN_MODE_PACK8; ++#endif ++ break; ++ }; ++ ++ syn_mode &= ISPCCDC_SYN_MODE_DATSIZ_MASK; ++ switch (syncif.datsz) { ++ case DAT8: ++ syn_mode |= ISPCCDC_SYN_MODE_DATSIZ_8; ++ break; ++ case DAT10: ++ syn_mode |= ISPCCDC_SYN_MODE_DATSIZ_10; ++ break; ++ case DAT11: ++ syn_mode |= ISPCCDC_SYN_MODE_DATSIZ_11; ++ break; ++ case DAT12: ++ syn_mode |= ISPCCDC_SYN_MODE_DATSIZ_12; ++ break; ++ }; ++ ++ if (syncif.fldmode) ++ /*Interlaced mode*/ ++ syn_mode |= ISPCCDC_SYN_MODE_FLDMODE; ++ else ++ /*Progressive mode */ ++ syn_mode &= ~ISPCCDC_SYN_MODE_FLDMODE; ++ ++ if (syncif.datapol) ++ /*One's complement */ ++ syn_mode |= ISPCCDC_SYN_MODE_DATAPOL; ++ else ++ /*Normal */ ++ syn_mode &= ~ISPCCDC_SYN_MODE_DATAPOL; ++ ++ if (syncif.fldpol) ++ /*Negative */ ++ syn_mode |= ISPCCDC_SYN_MODE_FLDPOL; ++ else ++ /*Positive */ ++ syn_mode &= ~ISPCCDC_SYN_MODE_FLDPOL; ++ ++ if (syncif.hdpol) ++ /*Negative */ ++ syn_mode |= ISPCCDC_SYN_MODE_HDPOL; ++ else ++ /*Positive */ ++ syn_mode &= ~ISPCCDC_SYN_MODE_HDPOL; ++ ++ if (syncif.vdpol) ++ /*Negative */ ++ syn_mode |= ISPCCDC_SYN_MODE_VDPOL; ++ else ++ /*Positive */ ++ syn_mode &= ~ISPCCDC_SYN_MODE_VDPOL; ++ ++ if (syncif.ccdc_mastermode) { ++ /*fld, hd, vd are output signals in master mode */ ++ syn_mode |= ISPCCDC_SYN_MODE_FLDOUT ++ | ISPCCDC_SYN_MODE_VDHDOUT; ++ omap_writel(syncif.hs_width << ISPCCDC_HD_VD_WID_HDW_SHIFT ++ | syncif.vs_width << ISPCCDC_HD_VD_WID_VDW_SHIFT, ++ ISPCCDC_HD_VD_WID); ++ ++ /*Pixel per line, half line per frame are used ++ * along with HS/VS as output ++ */ ++ omap_writel(syncif.ppln << ISPCCDC_PIX_LINES_PPLN_SHIFT ++ | syncif.hlprf << ISPCCDC_PIX_LINES_HLPRF_SHIFT, ++ ISPCCDC_PIX_LINES); ++ } else ++ /*fld, hd,vd input signals in slave mode */ ++ syn_mode &= ~(ISPCCDC_SYN_MODE_FLDOUT ++ | ISPCCDC_SYN_MODE_VDHDOUT); ++ ++ omap_writel(syn_mode, ISPCCDC_SYN_MODE); ++ ++ if (!(syncif.bt_r656_en)) ++ omap_writel((omap_readl(ISPCCDC_REC656IF)) ++ & (~ISPCCDC_REC656IF_R656ON), ISPCCDC_REC656IF); ++#ifdef ENABLE_BT_656_CAPTURE ++ else ++ omap_writel((omap_readl(ISPCCDC_REC656IF)) ++ | (ISPCCDC_REC656IF_R656ON | ISPCCDC_REC656IF_ECCFVH), ISPCCDC_REC656IF); ++#endif ++} ++EXPORT_SYMBOL(ispccdc_config_sync_if); ++ ++/* ++ * Configures the optical/digital black clamp parameters in CCDC. ++ * bclamp : Structure containing the optical black average gain, ++ * optical black sample length, sample lines, and the start pixel ++ * position of the samples w.r.t the HS pulse . ++ */ ++int ispccdc_config_black_clamp(struct ispccdc_bclamp bclamp) ++{ ++ u32 bclamp_val = 0; ++ if (ispccdc_obj.obclamp_en) { ++ bclamp_val |= bclamp.obgain << ISPCCDC_CLAMP_OBGAIN_SHIFT; ++ bclamp_val |= bclamp.oblen << ISPCCDC_CLAMP_OBSLEN_SHIFT; ++ bclamp_val |= bclamp.oblines << ISPCCDC_CLAMP_OBSLN_SHIFT; ++ bclamp_val |= bclamp.obstpixel << ISPCCDC_CLAMP_OBST_SHIFT; ++ omap_writel(bclamp_val, ISPCCDC_CLAMP); ++ } else { ++ /* ++ * HW Errata 1.39. Camera ISP: DC substract not supported for ++ * YUV 8bit and ITU656 ++ */ ++#if 0 ++ if (is_sil_rev_less_than(OMAP3430_REV_ES2_0)) ++ if ((ispccdc_obj.syncif_ipmod == YUV16) || ++ (ispccdc_obj.syncif_ipmod == YUV8) || ++ ((omap_readl(ISPCCDC_REC656IF) ++ & ISPCCDC_REC656IF_R656ON) ++ == ISPCCDC_REC656IF_R656ON)) ++ bclamp.dcsubval = 0; ++ omap_writel(bclamp.dcsubval, ISPCCDC_DCSUB); ++#endif ++ } ++ return 0; ++} ++EXPORT_SYMBOL(ispccdc_config_black_clamp); ++ ++/* ++ * Enables the optical or Digital black clamp. ++ * enable : : 1- Enables Optical Black clamp ++ * 0 - Enables Digital Black clamp. ++ */ ++void ispccdc_enable_black_clamp(u8 enable) ++{ ++ if (enable) { ++ omap_writel((omap_readl(ISPCCDC_CLAMP)) | ISPCCDC_CLAMP_CLAMPEN, ++ ISPCCDC_CLAMP); ++ ispccdc_obj.obclamp_en = 1; ++ } else { ++ omap_writel((omap_readl(ISPCCDC_CLAMP)) ++ & (~ISPCCDC_CLAMP_CLAMPEN), ISPCCDC_CLAMP); ++ ispccdc_obj.obclamp_en = 0; ++ } ++} ++EXPORT_SYMBOL(ispccdc_enable_black_clamp); ++ ++/* ++ * Configures the Faulty Pixel Correction parameters. ++ * fpc : Structure containing the number of faulty pixels corrected ++ * in the frame, address of the FPC table. ++ */ ++int ispccdc_config_fpc(struct ispccdc_fpc fpc) ++{ ++ u32 fpc_val = 0; ++ ++ fpc_val = omap_readl(ISPCCDC_FPC); ++ ++ if ((fpc.fpcaddr & 0xFFFFFFC0) == fpc.fpcaddr) { ++ /*Make sure that FPC is disabled*/ ++ omap_writel(fpc_val&(~ISPCCDC_FPC_FPCEN), ISPCCDC_FPC); ++ omap_writel(fpc.fpcaddr, ISPCCDC_FPC_ADDR); ++ } else { ++ DPRINTK_ISPCCDC("FPC Address should be on 64byte boundary\n"); ++ return -EINVAL; ++ } ++ /*Retain the FPC Enable bit along with the configuration*/ ++ omap_writel(fpc_val|(fpc.fpnum<<ISPCCDC_FPC_FPNUM_SHIFT) ++ , ISPCCDC_FPC); ++ return 0; ++} ++EXPORT_SYMBOL(ispccdc_config_fpc); ++ ++/* ++ * Enables the Faulty Pixel Correction. ++ * enable : : 1- Enables FPC ++ */ ++void ispccdc_enable_fpc(u8 enable) ++{ ++ if (enable) ++ omap_writel((omap_readl(ISPCCDC_FPC))|ISPCCDC_FPC_FPCEN ++ , ISPCCDC_FPC); ++ else ++ omap_writel((omap_readl(ISPCCDC_FPC)) ++ & (~ISPCCDC_FPC_FPCEN), ISPCCDC_FPC); ++} ++EXPORT_SYMBOL(ispccdc_enable_fpc); ++ ++/* ++ * Configures the Black Level Compensation parameters. ++ * blcomp : Structure containing the black level compensation value ++ * for RGrGbB pixels. in 2's complement. ++ */ ++void ispccdc_config_black_comp(struct ispccdc_blcomp blcomp) ++{ ++ u32 blcomp_val = 0; ++ blcomp_val |= blcomp.b_mg << ISPCCDC_BLKCMP_B_MG_SHIFT; ++ blcomp_val |= blcomp.gb_g << ISPCCDC_BLKCMP_GB_G_SHIFT; ++ blcomp_val |= blcomp.gr_cy << ISPCCDC_BLKCMP_GR_CY_SHIFT; ++ blcomp_val |= blcomp.r_ye << ISPCCDC_BLKCMP_R_YE_SHIFT; ++ ++ omap_writel(blcomp_val, ISPCCDC_BLKCMP); ++} ++EXPORT_SYMBOL(ispccdc_config_black_comp); ++ ++/* ++ * Configures the Video Port Configuration parameters. ++ * vpcfg : Structure containing the Video Port input frequency, ++ * and the 10 bit format. ++ */ ++void ispccdc_config_vp(struct ispccdc_vp vpcfg) ++{ ++ u32 fmtcfg_vp = omap_readl(ISPCCDC_FMTCFG); ++ ++ /*Clear the existing values */ ++ fmtcfg_vp &= ISPCCDC_FMTCFG_VPIN_MASK & ++ ISPCCDC_FMTCF_VPIF_FRQ_MASK; ++ ++ switch (vpcfg.bitshift_sel) { ++ case BIT9_0: ++ fmtcfg_vp |= ISPCCDC_FMTCFG_VPIN_9_0; ++ break; ++ case BIT10_1: ++ fmtcfg_vp |= ISPCCDC_FMTCFG_VPIN_10_1; ++ break; ++ case BIT11_2: ++ fmtcfg_vp |= ISPCCDC_FMTCFG_VPIN_11_2; ++ break; ++ case BIT12_3: ++ fmtcfg_vp |= ISPCCDC_FMTCFG_VPIN_12_3; ++ break; ++ }; ++ switch (vpcfg.freq_sel) { ++ case PIXCLKBY2: ++ fmtcfg_vp |= ISPCCDC_FMTCF_VPIF_FRQ_BY2; ++ break; ++ case PIXCLKBY3_5: ++ fmtcfg_vp |= ISPCCDC_FMTCF_VPIF_FRQ_BY3; ++ break; ++ case PIXCLKBY4_5: ++ fmtcfg_vp |= ISPCCDC_FMTCF_VPIF_FRQ_BY4; ++ break; ++ case PIXCLKBY5_5: ++ fmtcfg_vp |= ISPCCDC_FMTCF_VPIF_FRQ_BY5; ++ break; ++ case PIXCLKBY6_5: ++ fmtcfg_vp |= ISPCCDC_FMTCF_VPIF_FRQ_BY6; ++ break; ++ }; ++ omap_writel(fmtcfg_vp, ISPCCDC_FMTCFG); ++} ++EXPORT_SYMBOL(ispccdc_config_vp); ++ ++/* ++ * Enables the Video Port. ++ * enable : : 1- Enables VP ++ */ ++void ispccdc_enable_vp(u8 enable) ++{ ++ if (enable) ++ omap_writel((omap_readl(ISPCCDC_FMTCFG)) ++ | ISPCCDC_FMTCFG_VPEN, ISPCCDC_FMTCFG); ++ else ++ omap_writel((omap_readl(ISPCCDC_FMTCFG)) ++ & (~ISPCCDC_FMTCFG_VPEN), ISPCCDC_FMTCFG); ++} ++EXPORT_SYMBOL(ispccdc_enable_vp); ++ ++/* ++ * Configures the Reformatter register values if line alternating is disabled. ++ * else just enabling the line alternating is enough. ++ * refmt : : Structure containing the memory address to format and ++ * the bit fields for the reformatter registers. ++ */ ++void ispccdc_config_reformatter(struct ispccdc_refmt refmt) ++{ ++ u32 fmtcfg_val = 0; ++ ++ fmtcfg_val = omap_readl(ISPCCDC_FMTCFG); ++ ++ if (refmt.lnalt) ++ fmtcfg_val |= ISPCCDC_FMTCFG_LNALT; ++ else{ ++ fmtcfg_val &= ~ISPCCDC_FMTCFG_LNALT; ++ /*Clear fields of lnum plen_even/odd*/ ++ fmtcfg_val &= 0xFFFFF003; ++ fmtcfg_val |= refmt.lnum << ISPCCDC_FMTCFG_LNUM_SHIFT; ++ fmtcfg_val |= refmt.plen_even << ++ ISPCCDC_FMTCFG_PLEN_EVEN_SHIFT; ++ fmtcfg_val |= refmt.plen_odd << ISPCCDC_FMTCFG_PLEN_ODD_SHIFT; ++ ++ /*The arguments have the proper caluclated addresses ++ * and bit fields for the reformatter configuration*/ ++ omap_writel(refmt.prgeven0, ISPCCDC_PRGEVEN0); ++ omap_writel(refmt.prgeven1, ISPCCDC_PRGEVEN1); ++ omap_writel(refmt.prgodd0, ISPCCDC_PRGODD0); ++ omap_writel(refmt.prgodd1, ISPCCDC_PRGODD1); ++ omap_writel(refmt.fmtaddr0, ISPCCDC_FMT_ADDR0); ++ omap_writel(refmt.fmtaddr1, ISPCCDC_FMT_ADDR1); ++ omap_writel(refmt.fmtaddr2, ISPCCDC_FMT_ADDR2); ++ omap_writel(refmt.fmtaddr3, ISPCCDC_FMT_ADDR3); ++ omap_writel(refmt.fmtaddr4, ISPCCDC_FMT_ADDR4); ++ omap_writel(refmt.fmtaddr5, ISPCCDC_FMT_ADDR5); ++ omap_writel(refmt.fmtaddr6, ISPCCDC_FMT_ADDR6); ++ omap_writel(refmt.fmtaddr7, ISPCCDC_FMT_ADDR7); ++ } ++ omap_writel(fmtcfg_val, ISPCCDC_FMTCFG); ++} ++EXPORT_SYMBOL(ispccdc_config_reformatter); ++ ++/* ++ * Enables the Reformatter ++ * enable : : 1- Enables Data Reformatter ++ */ ++void ispccdc_enable_reformatter(u8 enable) ++{ ++ if (enable) { ++ omap_writel((omap_readl(ISPCCDC_FMTCFG)) ++ | ISPCCDC_FMTCFG_FMTEN, ISPCCDC_FMTCFG); ++ ispccdc_obj.refmt_en = 1; ++ } else { ++ omap_writel((omap_readl(ISPCCDC_FMTCFG)) ++ & ~ISPCCDC_FMTCFG_FMTEN, ISPCCDC_FMTCFG); ++ ispccdc_obj.refmt_en = 0; ++ } ++} ++EXPORT_SYMBOL(ispccdc_enable_reformatter); ++ ++/* ++ * Configures the Culling parameters. ++ * cull : : Structure containing the vertical culling pattern, ++ * and horizontal culling pattern for odd and even lines. ++ */ ++void ispccdc_config_culling(struct ispccdc_culling cull) ++{ ++ u32 culling_val = 0; ++ ++ culling_val |= cull.v_pattern<<ISPCCDC_CULLING_CULV_SHIFT; ++ culling_val |= cull.h_even << ISPCCDC_CULLING_CULHEVN_SHIFT; ++ culling_val |= cull.h_odd << ISPCCDC_CULLING_CULHODD_SHIFT; ++ ++ omap_writel(culling_val, ISPCCDC_CULLING); ++} ++EXPORT_SYMBOL(ispccdc_config_culling); ++ ++/* ++ * Enables the Low pass Filter ++ * enable : : 1- Enables LPF ++ */ ++void ispccdc_enable_lpf(u8 enable) ++{ ++ if (enable) ++ omap_writel((omap_readl(ISPCCDC_SYN_MODE)) ++ | ISPCCDC_SYN_MODE_LPF, ISPCCDC_SYN_MODE); ++ else ++ omap_writel((omap_readl(ISPCCDC_SYN_MODE)) ++ & (~ISPCCDC_SYN_MODE_LPF), ISPCCDC_SYN_MODE); ++} ++EXPORT_SYMBOL(ispccdc_enable_lpf); ++ ++/* ++ * Configures the input width for A-law. ++ * ipwidth : Input width for ALaw ++ */ ++void ispccdc_config_alaw(enum alaw_ipwidth ipwidth) ++{ ++ omap_writel(ipwidth << ISPCCDC_ALAW_GWDI_SHIFT, ISPCCDC_ALAW); ++} ++EXPORT_SYMBOL(ispccdc_config_alaw); ++ ++/* ++ * Enables the A-law compression ++ * enable : : 1- Enables A-Law ++ */ ++void ispccdc_enable_alaw(u8 enable) ++{ ++ if (enable) ++ omap_writel((omap_readl(ISPCCDC_ALAW)) ++ | ISPCCDC_ALAW_CCDTBL, ISPCCDC_ALAW); ++ else ++ omap_writel((omap_readl(ISPCCDC_ALAW)) ++ & ~ISPCCDC_ALAW_CCDTBL, ISPCCDC_ALAW); ++} ++EXPORT_SYMBOL(ispccdc_enable_alaw); ++ ++/* ++ * Configures the sensor image specific attribute. ++ * colptn : Color pattern of the sensor. ++ */ ++void ispccdc_config_imgattr(u32 colptn) ++{ ++ omap_writel(colptn, ISPCCDC_COLPTN); ++} ++EXPORT_SYMBOL(ispccdc_config_imgattr); ++ ++/* ++ * Programs the shadow registers associated with CCDC. ++ */ ++void ispccdc_config_shadow_registers(void) ++{ ++ if (ccdc_use_lsc && !ispccdc_obj.lsc_en && ++ (ispccdc_obj.ccdc_inpfmt == CCDC_RAW)) ++ ispccdc_enable_lsc(1); ++ return; ++} ++EXPORT_SYMBOL(ispccdc_config_shadow_registers); ++ ++/* ++ * Calculates the number of pixels cropped if the reformater is disabled, ++ * Fills up the output widht height variables in the isp_ccdc structure . ++ * input_w : input width for the CCDC in number of pixels per line ++ * input_h : input height for the CCDC in number of lines ++ * output_w : output width from the CCDC in number of pixels per line ++ * output_h : output height for the CCDC in number of lines ++*/ ++int ispccdc_try_size(u32 input_w, u32 input_h, u32 *output_w, ++ u32 *output_h) ++{ ++/* ++ * CCDC cannot handle less than 2 pixels for input. ++ */ ++ if (input_w < 2) { ++ DPRINTK_ISPCCDC("ISP_ERR: CCDC cannot handle input width less" ++ " than 2 pixels\n"); ++ return -EINVAL; ++ } ++ ++/* ++ * If crop settings are issued then output size from CCDC ++ * will be equal to the crop window specified. ++ */ ++ ++ if (ispccdc_obj.crop_w) ++ *output_w = ispccdc_obj.crop_w; ++ else ++ *output_w = input_w; ++ ++ if (ispccdc_obj.crop_h) ++ *output_h = ispccdc_obj.crop_h; ++ else ++ *output_h = input_h; ++ ++ if ((!ispccdc_obj.refmt_en) && (ispccdc_obj.ccdc_outfmt != ++ CCDC_OTHERS_MEM)) ++ *output_h -= 1; ++ ++ if ((ispccdc_obj.ccdc_outfmt == CCDC_OTHERS_MEM) || ++ (ispccdc_obj.ccdc_outfmt == CCDC_OTHERS_VP_MEM)) { ++ if (*output_w % 16) { ++ *output_w -= (*output_w % 16); ++ *output_w += 16; ++ } ++ } ++ ++ ispccdc_obj.ccdcout_w = *output_w; ++ ispccdc_obj.ccdcout_h = *output_h; ++ ispccdc_obj.ccdcin_w = input_w; ++ ispccdc_obj.ccdcin_h = input_h; ++ ++ DPRINTK_ISPCCDC("try size: ccdcin_w=%u,ccdcin_h=%u,ccdcout_w=%u," ++ " ccdcout_h=%u\n", ++ ispccdc_obj.ccdcin_w, ++ ispccdc_obj.ccdcin_h, ++ ispccdc_obj.ccdcout_w, ++ ispccdc_obj.ccdcout_h); ++ ++ return 0; ++} ++EXPORT_SYMBOL(ispccdc_try_size); ++ ++/* ++ * Configures the appropriate values stored in the isp_ccdc structure to ++ * HORZ/VERT_INFO registers and the VP_OUT depending on whether the image ++ * is stored in memory or given to the another module in the ISP pipeline. ++ * input_w : input width for the CCDC in number of pixels per line ++ * input_h : input height for the CCDC in number of lines ++ * output_w : output width from the CCDC in number of pixels per line ++ * output_h : output height for the CCDC in number of lines ++ */ ++int ispccdc_config_size(u32 input_w, u32 input_h, u32 output_w, u32 output_h) ++{ ++ DPRINTK_ISPCCDC("config size: input_w=%u,input_h=%u,output_w=%u," ++ "output_h=%u\n", input_w, input_h, output_w, output_h); ++ ++ if ((output_w != ispccdc_obj.ccdcout_w) ++ || (output_h != ispccdc_obj.ccdcout_h)) { ++ DPRINTK_ISPCCDC("ISP_ERR : ispccdc_try_size should " ++ "be called before config size\n"); ++ return -EINVAL; ++ } ++ ++ if (ispccdc_obj.ccdc_outfmt == CCDC_OTHERS_VP) { ++ /* Start with 1 pixel apart */ ++ omap_writel((ispccdc_obj.ccdcin_woffset ++ << ISPCCDC_FMT_HORZ_FMTSPH_SHIFT) ++ | (ispccdc_obj.ccdcin_w ++ << ISPCCDC_FMT_HORZ_FMTLNH_SHIFT), ++ ISPCCDC_FMT_HORZ); ++ ++ omap_writel((ispccdc_obj.ccdcin_hoffset ++ << ISPCCDC_FMT_VERT_FMTSLV_SHIFT) ++ | ((ispccdc_obj.ccdcin_h) ++ << ISPCCDC_FMT_VERT_FMTLNV_SHIFT), ++ ISPCCDC_FMT_VERT); ++ ++ omap_writel((ispccdc_obj.ccdcout_w ++ << ISPCCDC_VP_OUT_HORZ_NUM_SHIFT) ++ | (ispccdc_obj.ccdcout_h ++ << ISPCCDC_VP_OUT_VERT_NUM_SHIFT), ++ ISPCCDC_VP_OUT); ++ omap_writel((((ispccdc_obj.ccdcout_h - 25) ++ & ISPCCDC_VDINT_0_MASK) ++ << ISPCCDC_VDINT_0_SHIFT) ++ | (((50) & ISPCCDC_VDINT_1_MASK) ++ << ISPCCDC_VDINT_1_SHIFT), ++ ISPCCDC_VDINT); ++ ++ } else if (ispccdc_obj.ccdc_outfmt == CCDC_OTHERS_MEM) { ++#ifndef CONFIG_ARCH_OMAP3410 ++#ifndef ENABLE_BT_656_CAPTURE ++ omap_writel(1 << ISPCCDC_HORZ_INFO_SPH_SHIFT ++ | ((ispccdc_obj.ccdcout_w - 1) ++ << ISPCCDC_HORZ_INFO_NPH_SHIFT), ++ ISPCCDC_HORZ_INFO); ++#else ++ omap_writel(0 << ISPCCDC_HORZ_INFO_SPH_SHIFT ++ | (((ispccdc_obj.ccdcout_w << 1) - 1) ++ << ISPCCDC_HORZ_INFO_NPH_SHIFT), ++ ISPCCDC_HORZ_INFO); ++#endif ++#else ++ omap_writel(0 << ISPCCDC_HORZ_INFO_SPH_SHIFT ++ | ((ispccdc_obj.ccdcout_w - 1) ++ << ISPCCDC_HORZ_INFO_NPH_SHIFT), ++ ISPCCDC_HORZ_INFO); ++#endif ++ ++#ifndef ENABLE_BT_656_CAPTURE ++ omap_writel(0 << ISPCCDC_VERT_START_SLV0_SHIFT, ++ ISPCCDC_VERT_START); ++ omap_writel((ispccdc_obj.ccdcout_h - 1) ++ << ISPCCDC_VERT_LINES_NLV_SHIFT, ++ ISPCCDC_VERT_LINES); ++#else ++ omap_writel(2 << ISPCCDC_VERT_START_SLV0_SHIFT | 2 << ISPCCDC_VERT_START_SLV1_SHIFT, ++ ISPCCDC_VERT_START); ++ omap_writel(((ispccdc_obj.ccdcout_h >> 1) - 1) ++ << ISPCCDC_VERT_LINES_NLV_SHIFT, ++ ISPCCDC_VERT_LINES); ++#endif ++ ++ /*Configure the HSIZE_OFF with output buffer width */ ++ ispccdc_config_outlineoffset(ispccdc_obj.ccdcout_w*2, 0, 0); ++ ++#ifndef ENABLE_BT_656_CAPTURE ++ omap_writel((((ispccdc_obj.ccdcout_h - 1) ++ & ISPCCDC_VDINT_0_MASK) ++ << ISPCCDC_VDINT_0_SHIFT) ++ | (((50) & ISPCCDC_VDINT_1_MASK) ++ << ISPCCDC_VDINT_1_SHIFT), ++ ISPCCDC_VDINT); ++#else ++ ispccdc_config_outlineoffset(ispccdc_obj.ccdcout_w*2, ++ EVENEVEN, 1); ++ ispccdc_config_outlineoffset(ispccdc_obj.ccdcout_w*2, ++ ODDEVEN, 1); ++ ispccdc_config_outlineoffset(ispccdc_obj.ccdcout_w*2, ++ EVENODD, 1); ++ ispccdc_config_outlineoffset(ispccdc_obj.ccdcout_w*2, ++ ODDODD, 1); ++ ++ omap_writel(((((ispccdc_obj.ccdcout_h >> 1) - 1) ++ & ISPCCDC_VDINT_0_MASK) ++ << ISPCCDC_VDINT_0_SHIFT) ++ | (((50) & ISPCCDC_VDINT_1_MASK) ++ << ISPCCDC_VDINT_1_SHIFT), ++ ISPCCDC_VDINT); ++#endif ++ } else if (ispccdc_obj.ccdc_outfmt == CCDC_OTHERS_VP_MEM) { ++ /* Start with 1 pixel apart */ ++ omap_writel((1 << ISPCCDC_FMT_HORZ_FMTSPH_SHIFT) ++ | (ispccdc_obj.ccdcin_w ++ << ISPCCDC_FMT_HORZ_FMTLNH_SHIFT), ++ ISPCCDC_FMT_HORZ); ++ ++ omap_writel((0 << ISPCCDC_FMT_VERT_FMTSLV_SHIFT) ++ | ((ispccdc_obj.ccdcin_h) ++ << ISPCCDC_FMT_VERT_FMTLNV_SHIFT), ++ ISPCCDC_FMT_VERT); ++ ++ omap_writel((ispccdc_obj.ccdcout_w ++ << ISPCCDC_VP_OUT_HORZ_NUM_SHIFT) ++ | (ispccdc_obj.ccdcout_h ++ << ISPCCDC_VP_OUT_VERT_NUM_SHIFT), ++ ISPCCDC_VP_OUT); ++ omap_writel(0 << ISPCCDC_HORZ_INFO_SPH_SHIFT ++ | ((ispccdc_obj.ccdcout_w - 1) ++ << ISPCCDC_HORZ_INFO_NPH_SHIFT), ++ ISPCCDC_HORZ_INFO); ++ omap_writel(0 << ISPCCDC_VERT_START_SLV0_SHIFT, ++ ISPCCDC_VERT_START); ++ omap_writel((ispccdc_obj.ccdcout_h - 1) ++ << ISPCCDC_VERT_LINES_NLV_SHIFT, ++ ISPCCDC_VERT_LINES); ++ /*Configure the HSIZE_OFF with output buffer width*/ ++ ispccdc_config_outlineoffset(ispccdc_obj.ccdcout_w*2, 0, 0); ++ omap_writel((((ispccdc_obj.ccdcout_h - 25) ++ & ISPCCDC_VDINT_0_MASK) ++ << ISPCCDC_VDINT_0_SHIFT) ++ | (((50) & ISPCCDC_VDINT_1_MASK) ++ << ISPCCDC_VDINT_1_SHIFT), ++ ISPCCDC_VDINT); ++ } ++#ifdef USE_ISP_LSC ++ if (ispccdc_obj.ccdc_inpfmt == CCDC_RAW) { ++ ispccdc_config_lsc(&lsc_config); ++ ispccdc_load_lsc(lsc_config.size); ++ } ++#endif ++ return 0; ++} ++EXPORT_SYMBOL(ispccdc_config_size); ++ ++/* ++ * Configures the output line offset when stored in memory. ++ * Configures the num of even and odd line fields in case of rearranging ++ * the lines ++ * offset: twice the Output width and aligned on 32byte boundary. ++ * oddeven: odd/even line pattern to be chosen to store the output ++ * numlines: Configure the value 0-3 for +1-4lines, 4-7 for -1-4lines ++ */ ++int ispccdc_config_outlineoffset(u32 offset, u8 oddeven, u8 numlines) ++{ ++ ++ ++ /* ++ * Make sure offset is multiple of 32bytes. ie last 5bits should be ++ * zero ++ */ ++ if ((offset & ISP_32B_BOUNDARY_OFFSET) == offset) ++ omap_writel((offset&0xFFFF), ISPCCDC_HSIZE_OFF); ++ else { ++ DPRINTK_ISPCCDC("ISP_ERR : Offset should be in 32 byte \ ++ boundary"); ++ return -EINVAL; ++ } ++ ++ /*0 - By default Donot inverse the field identification */ ++ omap_writel((omap_readl(ISPCCDC_SDOFST) & (~ISPCCDC_SDOFST_FINV)), ++ ISPCCDC_SDOFST); ++ ++ /*0 - By default one line offset*/ ++ omap_writel(omap_readl(ISPCCDC_SDOFST) & ISPCCDC_SDOFST_FOFST_1L, ++ ISPCCDC_SDOFST); ++ ++ switch (oddeven) { ++ case EVENEVEN: /*even lines even fields*/ ++ omap_writel((omap_readl(ISPCCDC_SDOFST))| ++ ((numlines & 0x7) << ISPCCDC_SDOFST_LOFST0_SHIFT) ++ , ISPCCDC_SDOFST); ++ break; ++ case ODDEVEN: /*odd lines even fields*/ ++ omap_writel((omap_readl(ISPCCDC_SDOFST))| ++ ((numlines & 0x7) << ISPCCDC_SDOFST_LOFST1_SHIFT) ++ , ISPCCDC_SDOFST); ++ break; ++ case EVENODD: /*even lines odd fields*/ ++ omap_writel((omap_readl(ISPCCDC_SDOFST)) | ++ ((numlines & 0x7) << ISPCCDC_SDOFST_LOFST2_SHIFT) ++ , ISPCCDC_SDOFST); ++ break; ++ case ODDODD: /*odd lines odd fields*/ ++ omap_writel((omap_readl(ISPCCDC_SDOFST)) | ++ ((numlines & 0x7) << ISPCCDC_SDOFST_LOFST3_SHIFT) ++ , ISPCCDC_SDOFST); ++ break; ++ default: ++ break; ++ } ++ return 0; ++} ++EXPORT_SYMBOL(ispccdc_config_outlineoffset); ++ ++/* ++ * Configures the memory address where the output should be stored. ++ * addr : 32bit memory address aligned on 32 bit boundary. ++ */ ++int ispccdc_set_outaddr(u32 addr) ++{ ++ if ((addr & ISP_32B_BOUNDARY_BUF) == addr) { ++ omap_writel(addr, ISPCCDC_SDR_ADDR); ++ return 0; ++ } else { ++ DPRINTK_ISPCCDC("ISP_ERR : Address should be in 32 byte \ ++ boundary"); ++ return -EINVAL; ++ } ++ ++} ++EXPORT_SYMBOL(ispccdc_set_outaddr); ++ ++/* ++ * ++ * Enables the CCDC module. ++ * Client should configure all the sub modules in CCDC before this. ++ * enable : 1- Enables the preview module. ++ */ ++void ispccdc_enable(u8 enable) ++{ ++ if (enable) ++ omap_writel(omap_readl(ISPCCDC_PCR) | (ISPCCDC_PCR_EN), ++ ISPCCDC_PCR); ++ else ++ omap_writel(omap_readl(ISPCCDC_PCR) & ~(ISPCCDC_PCR_EN), ++ ISPCCDC_PCR); ++} ++EXPORT_SYMBOL(ispccdc_enable); ++ ++#ifdef ENABLE_BT_656_CAPTURE ++/* ++ * Configures the location of Y color component when YCbCr 8-bit data is input ++ */ ++void ispccdc_config_y8pos(enum y8pos_mode mode) ++{ ++ if (mode == Y8POS_EVEN) ++ omap_writel(omap_readl(ISPCCDC_CFG) & ~(ISPCCDC_CFG_Y8POS), ++ ISPCCDC_CFG); ++ else ++ omap_writel(omap_readl(ISPCCDC_CFG) | (ISPCCDC_CFG_Y8POS), ++ ISPCCDC_CFG); ++} ++EXPORT_SYMBOL(ispccdc_config_y8pos); ++ ++/* ++ * Configures byte swap data stored in memory. 1 - swap bytes, 0 - normal ++ */ ++void ispccdc_config_byteswap(int swap) ++{ ++ if (swap) ++ omap_writel(omap_readl(ISPCCDC_CFG) | (ISPCCDC_CFG_BSWD), ++ ISPCCDC_CFG); ++ else ++ omap_writel(omap_readl(ISPCCDC_CFG) & ~(ISPCCDC_CFG_BSWD), ++ ISPCCDC_CFG); ++} ++EXPORT_SYMBOL(ispccdc_config_byteswap); ++#endif ++ ++int ispccdc_busy(void) ++{ ++ return (omap_readl(ISPCCDC_PCR) & ISPCCDC_PCR_BUSY); ++} ++EXPORT_SYMBOL(ispccdc_busy); ++ ++/* ++ * Saves the values of the CCDC module registers. ++ */ ++void ispccdc_save_context(void) ++{ ++ DPRINTK_ISPCCDC(" Saving context \n"); ++ isp_save_context(ispccdc_reg_list); ++ ++} ++EXPORT_SYMBOL(ispccdc_save_context); ++ ++/* ++ * Restores the values of the CCDC module registers. ++ */ ++void ispccdc_restore_context(void) ++{ ++ DPRINTK_ISPCCDC(" Restoring context\n"); ++ isp_restore_context(ispccdc_reg_list); ++} ++EXPORT_SYMBOL(ispccdc_restore_context); ++ ++/* ++ * Prints the values of the CCDC Module registers ++ * Also prints other debug information stored in the CCDC module ++ */ ++void ispccdc_print_status(void) ++{ ++#ifdef OMAP_ISPCCDC_DEBUG ++ DPRINTK_ISPCCDC("Module in use =%d\n", ispccdc_obj.ccdc_inuse); ++ DPRINTK_ISPCCDC("Accepted CCDC Input (width = %d,Height = %d)\n", ++ ispccdc_obj.ccdcin_w, ++ ispccdc_obj.ccdcin_h); ++ DPRINTK_ISPCCDC("Accepted CCDC Output (width = %d,Height = %d)\n", ++ ispccdc_obj.ccdcout_w, ++ ispccdc_obj.ccdcout_h); ++ ++ DPRINTK_ISPCCDC("###CCDC PCR=0x%x\n", omap_readl(ISPCCDC_PCR)); ++ DPRINTK_ISPCCDC("ISP_CTRL =0x%x\n", omap_readl(ISP_CTRL)); ++ switch (ispccdc_obj.ccdc_inpfmt) { ++ case CCDC_RAW: ++ DPRINTK_ISPCCDC("ccdc input format is CCDC_RAW\n"); ++ break; ++ case CCDC_YUV_SYNC: ++ DPRINTK_ISPCCDC("ccdc input format is CCDC_YUV_SYNC\n"); ++ break; ++ case CCDC_YUV_BT: ++ DPRINTK_ISPCCDC("ccdc input format is CCDC_YUV_BT\n"); ++ break; ++ ++ } ++ switch (ispccdc_obj.ccdc_outfmt) { ++ case CCDC_OTHERS_VP: ++ DPRINTK_ISPCCDC("ccdc output format is CCDC_OTHERS_VP\n"); ++ break; ++ case CCDC_OTHERS_MEM: ++ DPRINTK_ISPCCDC("ccdc output format is CCDC_OTHERS_MEM\n"); ++ break; ++ case CCDC_YUV_RSZ: ++ DPRINTK_ISPCCDC("ccdc output format is CCDC_YUV_RSZ\n"); ++ break; ++ } ++ DPRINTK_ISPCCDC("###ISP_CTRL in ccdc =0x%x\n", omap_readl(ISP_CTRL)); ++ DPRINTK_ISPCCDC("###ISP_IRQ0ENABLE in ccdc =0x%x\n", ++ omap_readl(ISP_IRQ0ENABLE)); ++ DPRINTK_ISPCCDC("###ISP_IRQ0STATUS in ccdc =0x%x\n", ++ omap_readl(ISP_IRQ0STATUS)); ++ DPRINTK_ISPCCDC("###CCDC SYN_MODE=0x%x\n", ++ omap_readl(ISPCCDC_SYN_MODE)); ++ DPRINTK_ISPCCDC("###CCDC HORZ_INFO=0x%x\n", ++ omap_readl(ISPCCDC_HORZ_INFO)); ++ DPRINTK_ISPCCDC("###CCDC VERT_START=0x%x\n", ++ omap_readl(ISPCCDC_VERT_START)); ++ DPRINTK_ISPCCDC("###CCDC VERT_LINES=0x%x\n", ++ omap_readl(ISPCCDC_VERT_LINES)); ++ DPRINTK_ISPCCDC("###CCDC CULLING=0x%x\n", omap_readl(ISPCCDC_CULLING)); ++ DPRINTK_ISPCCDC("###CCDC HSIZE_OFF=0x%x\n", ++ omap_readl(ISPCCDC_HSIZE_OFF)); ++ DPRINTK_ISPCCDC("###CCDC SDOFST=0x%x\n", omap_readl(ISPCCDC_SDOFST)); ++ DPRINTK_ISPCCDC("###CCDC SDR_ADDR=0x%x\n", ++ omap_readl(ISPCCDC_SDR_ADDR)); ++ DPRINTK_ISPCCDC("###CCDC CLAMP=0x%x\n", omap_readl(ISPCCDC_CLAMP)); ++ DPRINTK_ISPCCDC("###CCDC COLPTN=0x%x\n", omap_readl(ISPCCDC_COLPTN)); ++ DPRINTK_ISPCCDC("###CCDC CFG=0x%x\n", omap_readl(ISPCCDC_CFG)); ++ DPRINTK_ISPCCDC("###CCDC VP_OUT=0x%x\n", omap_readl(ISPCCDC_VP_OUT)); ++ DPRINTK_ISPCCDC("###CCDC_SDR_ADDR= 0x%x\n", ++ omap_readl(ISPCCDC_SDR_ADDR)); ++ DPRINTK_ISPCCDC("###CCDC FMTCFG=0x%x\n", omap_readl(ISPCCDC_FMTCFG)); ++ DPRINTK_ISPCCDC("###CCDC FMT_HORZ=0x%x\n", ++ omap_readl(ISPCCDC_FMT_HORZ)); ++ DPRINTK_ISPCCDC("###CCDC FMT_VERT=0x%x\n", ++ omap_readl(ISPCCDC_FMT_VERT)); ++ DPRINTK_ISPCCDC("###CCDC LSC_CONFIG=0x%x\n", ++ omap_readl(ISPCCDC_LSC_CONFIG)); ++ DPRINTK_ISPCCDC("###CCDC LSC_INIT=0x%x\n", ++ omap_readl(ISPCCDC_LSC_INITIAL)); ++ DPRINTK_ISPCCDC("###CCDC LSC_TABLE BASE=0x%x\n", ++ omap_readl(ISPCCDC_LSC_TABLE_BASE)); ++ DPRINTK_ISPCCDC("###CCDC LSC TABLE OFFSET=0x%x\n", ++ omap_readl(ISPCCDC_LSC_TABLE_OFFSET)); ++#endif ++} ++EXPORT_SYMBOL(ispccdc_print_status); ++ ++/* ++ * Module Initialisation. ++ */ ++static int __init isp_ccdc_init(void) ++{ ++ ispccdc_obj.ccdc_inuse = 0; ++ ispccdc_config_crop(0, 0, 0, 0); ++ init_MUTEX(&(ispccdc_obj.semlock)); ++ ++#ifdef USE_ISP_LSC ++ lsc_config.initial_x = 0; ++ lsc_config.initial_y = 0; ++ lsc_config.gain_mode_n = 0x06; ++ lsc_config.gain_mode_m = 0x06; ++ lsc_config.gain_format = 0x04; ++ lsc_config.offset = 0x60; ++ lsc_config.size = sizeof(ispccdc_lsc_tbl); ++ ccdc_use_lsc = 1; ++#endif ++ ++ return 0; ++} ++ ++static void isp_ccdc_cleanup(void) ++{ ++#ifdef USE_ISP_LSC ++ if (lsc_initialized) { ++ ispmmu_unmap(lsc_ispmmu_addr); ++ kfree(lsc_gain_table); ++ lsc_initialized = 0; ++ } ++#endif ++ if (fpc_table_add_m != 0) { ++ ispmmu_unmap(fpc_table_add_m); ++ kfree(fpc_table_add); ++ } ++} ++ ++module_init(isp_ccdc_init); ++module_exit(isp_ccdc_cleanup); ++ ++ ++MODULE_AUTHOR("Texas Instruments"); ++MODULE_DESCRIPTION("ISP CCDC Library"); ++MODULE_LICENSE("GPL"); +Index: git/drivers/media/video/isp/ispccdc.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ git/drivers/media/video/isp/ispccdc.h 2009-02-12 10:29:26.000000000 -0600 +@@ -0,0 +1,342 @@ ++/* ++ * drivers/media/video/isp/ispccdc.h ++ * ++ * Driver include file for CCDC module in TI's OMAP3430 Camera ISP ++ * ++ * Copyright (C) 2008 Texas Instruments, Inc. ++ * ++ * This package is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ * ++ * THIS PACKAGE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR ++ * IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED ++ * WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE. ++ */ ++ ++#ifndef OMAP_ISP_CCDC_H ++#define OMAP_ISP_CCDC_H ++ ++/*Abstraction layer CCDC configurations*/ ++#define ISP_ABS_CCDC_ALAW (1 << 0) ++#define ISP_ABS_CCDC_LPF (1 << 1) ++#define ISP_ABS_CCDC_BLCLAMP (1 << 2) ++#define ISP_ABS_CCDC_BCOMP (1 << 3) ++#define ISP_ABS_CCDC_FPC (1 << 4) ++#define ISP_ABS_CCDC_CULL (1 << 5) ++#define ISP_ABS_CCDC_COLPTN (1 << 6) ++#define ISP_ABS_CCDC_CONFIG_LSC (1 << 7) ++ ++#define ISP_ABS_TBL_LSC (1 << 0) ++ ++#ifndef CONFIG_ARCH_OMAP3410 ++ #include "isppreview.h" ++#endif ++ ++int ispccdc_request(void); ++ ++int ispccdc_free(void); ++ ++/*Enumeration constants for CCDC input output format */ ++enum ccdc_input { ++ CCDC_RAW, ++ CCDC_YUV_SYNC, ++ CCDC_YUV_BT, ++ CCDC_OTHERS ++}; ++enum ccdc_output { ++ CCDC_YUV_RSZ, ++ CCDC_YUV_MEM_RSZ, ++ CCDC_OTHERS_VP, ++ CCDC_OTHERS_MEM, ++ CCDC_OTHERS_VP_MEM ++}; ++ ++/* ++ * Sets up the default CCDC configuration according to the arguments. ++ */ ++int ispccdc_config_datapath(enum ccdc_input input, enum ccdc_output output); ++ ++/* ++ * Configures the crop settings in the CCDC module. ++ */ ++void ispccdc_config_crop(u32 left, u32 top, u32 height, u32 width); ++ ++/* Enumeration constants for the sync interface parameters */ ++enum inpmode { ++ RAW, ++ YUV16, ++ YUV8 ++}; ++enum datasize { ++ DAT8, ++ DAT10, ++ DAT11, ++ DAT12 ++}; ++ ++#ifdef ENABLE_BT_656_CAPTURE ++/* ++ * Configure location of Y component in 8-bit YUV data input ++ */ ++enum y8pos_mode { ++ Y8POS_EVEN = 0, ++ Y8POS_ODD = 1 ++}; ++#endif ++ ++/* Structure for the Sync Interface between the sensor and CCDC*/ ++struct ispccdc_syncif { ++ /* 1 - Master, 0- Slave */ ++ u8 ccdc_mastermode; ++ /* 0 - Odd Field, 1- Even Field */ ++ u8 fldstat; ++ enum inpmode ipmod; ++ enum datasize datsz; ++ /* 0 -Progressive Mode, 1 -Interlaced Mode */ ++ u8 fldmode; ++ /* 0 -Positive, 1 - Negative */ ++ u8 datapol; ++ /* 0 -Positive, 1 - Negative */ ++ u8 fldpol; ++ /* 0 -Positive, 1 - Negative */ ++ u8 hdpol; ++ /* 0 -Positive, 1 - Negative */ ++ u8 vdpol; ++ /* 0 -Input, 1 - Output */ ++ u8 fldout; ++ /* Width of the Horizontal Sync pulse - used for HS/VS Output*/ ++ u8 hs_width; ++ /* Width of the Vertical Sync pulse - used for HS/VS Output*/ ++ u8 vs_width; ++ /*Number of pixels per line - used for HS/VS Output*/ ++ u8 ppln; ++ /*Number of half lines per frame - used for HS/VS Output*/ ++ u8 hlprf; ++ /*1 - Enable ITU-R BT656 mode, 0 - Sync mode*/ ++ u8 bt_r656_en; ++}; ++ ++/* Structure for LSC configuration*/ ++struct ispccdc_lsc_config { ++ u8 offset; ++ u8 gain_mode_n; ++ u8 gain_mode_m; ++ u8 gain_format; ++ u16 fmtsph; ++ u16 fmtlnh; ++ u16 fmtslv; ++ u16 fmtlnv; ++ u8 initial_x; ++ u8 initial_y; ++ u32 size; ++}; ++ ++/* ++ * Configures the sync interface parameters between the sensor and the CCDC. ++ */ ++void ispccdc_config_sync_if(struct ispccdc_syncif syncif); ++ ++/* Structure for the optical black Clamp and Digital black Clamp subtract*/ ++struct ispccdc_bclamp{ ++ /*Optical black average gain*/ ++ u8 obgain; ++ /*Start Pixel w.r.t. HS pulse in Optical black sample*/ ++ u8 obstpixel; ++ /*Optical Black Sample lines*/ ++ u8 oblines; ++ /*Optical Black Sample Length*/ ++ u8 oblen; ++ /*Digital Black Clamp subtract value */ ++ u16 dcsubval; ++ }; ++ ++/* ++ * Configures the optical/digital black clamp parameters in CCDC. ++ */ ++int ispccdc_config_black_clamp(struct ispccdc_bclamp bclamp); ++ ++/* ++ * Enables the optical or Digital black clamp. ++ */ ++void ispccdc_enable_black_clamp(u8 enable); ++ ++/* Structure for FPC */ ++struct ispccdc_fpc{ ++ /* Number of faulty pixels to be corrected in the frame*/ ++ u16 fpnum; ++ /* Memory address of the FPC Table */ ++ u32 fpcaddr; ++ }; ++ ++/* ++ * Configures the Faulty Pixel Correction parameters. ++ */ ++int ispccdc_config_fpc(struct ispccdc_fpc fpc); ++ ++/* ++ * Enables the Faulty Pixel Correction. ++ * enable : : 1- Enables FPC ++ */ ++void ispccdc_enable_fpc(u8 enable); ++ ++/* Structure for Black Level Compensation parameters*/ ++struct ispccdc_blcomp{ ++ u8 b_mg; ++ u8 gb_g; ++ u8 gr_cy; ++ u8 r_ye; ++ }; ++ ++/* ++ * Configures the Black Level Compensation parameters. ++ */ ++void ispccdc_config_black_comp(struct ispccdc_blcomp blcomp); ++ ++/* Enumeration constants for Video Port */ ++enum vpin { ++ BIT12_3 = 3, ++ BIT11_2 = 4, ++ BIT10_1 = 5, ++ BIT9_0 = 6 ++}; ++enum vpif_freq { ++ PIXCLKBY2, ++ PIXCLKBY3_5, ++ PIXCLKBY4_5, ++ PIXCLKBY5_5, ++ PIXCLKBY6_5 ++}; ++ ++/*Structure for Video Port parameters */ ++struct ispccdc_vp { ++ enum vpin bitshift_sel; ++ enum vpif_freq freq_sel; ++}; ++ ++/* ++ * Configures the Video Port Configuration parameters. ++ */ ++void ispccdc_config_vp(struct ispccdc_vp vp); ++ ++/* ++ * Enables the Video Port. ++ */ ++void ispccdc_enable_vp(u8 enable); ++ ++/* Structure for Reformatter parameters */ ++struct ispccdc_refmt{ ++ u8 lnalt; ++ u8 lnum; ++ u8 plen_even; ++ u8 plen_odd; ++ u32 prgeven0; ++ u32 prgeven1; ++ u32 prgodd0; ++ u32 prgodd1; ++ u32 fmtaddr0; ++ u32 fmtaddr1; ++ u32 fmtaddr2; ++ u32 fmtaddr3; ++ u32 fmtaddr4; ++ u32 fmtaddr5; ++ u32 fmtaddr6; ++ u32 fmtaddr7; ++}; ++ ++/* ++ * Configures the Reformatter register values if line alternating is disabled. ++ * else just enabling the line alternating is enough. ++ */ ++void ispccdc_config_reformatter(struct ispccdc_refmt refmt); ++ ++/* ++ * Enables the Reformatter ++ */ ++void ispccdc_enable_reformatter(u8 enable); ++ ++/* Structure for Culling parameters */ ++struct ispccdc_culling{ ++ /* Vertical culling pattern */ ++ u8 v_pattern; ++ /* Horizontal Culling pattern for odd lines */ ++ u16 h_odd; ++ /* Horizontal Culling pattern for even lines */ ++ u16 h_even; ++}; ++ ++/* ++ * Configures the Culling parameters. ++ */ ++void ispccdc_config_culling(struct ispccdc_culling culling); ++ ++/* ++ * Enables the Low pass Filter ++ */ ++void ispccdc_enable_lpf(u8 enable); ++ ++/* Enumeration constants for Alaw input width */ ++enum alaw_ipwidth{ ++ ALAW_BIT12_3 = 0x3, ++ ALAW_BIT11_2 = 0x4, ++ ALAW_BIT10_1 = 0x5, ++ ALAW_BIT9_0 = 0x6 ++}; ++ ++/* Structure for CCDC configuration*/ ++struct ispccdc_update_config { ++ u16 update; ++ u16 flag; ++ enum alaw_ipwidth alawip; ++ struct ispccdc_bclamp *bclamp; ++ struct ispccdc_blcomp *blcomp; ++ struct ispccdc_fpc *fpc; ++ struct ispccdc_lsc_config *lsc_cfg; ++ struct ispccdc_culling *cull; ++ u32 colptn; ++}; ++ ++ ++void ispccdc_config_alaw(enum alaw_ipwidth ipwidth); ++ ++void ispccdc_enable_alaw(u8 enable); ++ ++int ispccdc_load_lsc(u32 table_size); ++ ++void ispccdc_config_lsc(struct ispccdc_lsc_config *lsc_cfg); ++ ++void ispccdc_enable_lsc(u8 enable); ++ ++void ispccdc_config_imgattr(u32 colptn); ++ ++void ispccdc_config_shadow_registers(void); ++ ++int ispccdc_try_size(u32 input_w, u32 input_h, u32 *output_w, u32 *output_h); ++ ++int ispccdc_config_size(u32 input_w, u32 input_h, u32 output_w, u32 output_h); ++ ++int ispccdc_config_outlineoffset(u32 offset, u8 oddeven, u8 numlines); ++ ++int ispccdc_set_outaddr(u32 addr); ++ ++void ispccdc_enable(u8 enable); ++ ++#ifdef ENABLE_BT_656_CAPTURE ++void ispccdc_config_y8pos(enum y8pos_mode mode); ++ ++void ispccdc_config_byteswap(int swap); ++#endif ++ ++int ispccdc_busy(void); ++ ++void ispccdc_save_context(void); ++ ++void ispccdc_restore_context(void); ++ ++void ispccdc_print_status(void); ++ ++int omap34xx_isp_ccdc_config(void *userspace_add); ++ ++int omap34xx_isp_lsc_update(void *userspace_add); ++ ++#endif /* OMAP_ISP_CCDC_H */ +Index: git/drivers/media/video/isp/isph3a.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ git/drivers/media/video/isp/isph3a.c 2009-02-12 10:29:18.000000000 -0600 +@@ -0,0 +1,901 @@ ++/* ++ * drivers/media/video/omap/isp/isph3a.c ++ * ++ * H3A module for TI's OMAP3430 Camera ISP ++ * ++ * Copyright (C) 2008 Texas Instruments, Inc. ++ * ++ * This package is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ * ++ * THIS PACKAGE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR ++ * IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED ++ * WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE. ++ */ ++ ++#include <linux/mm.h> ++#include <linux/mman.h> ++#include <linux/syscalls.h> ++#include <linux/module.h> ++#include <linux/errno.h> ++#include <linux/types.h> ++#include <linux/dma-mapping.h> ++#include <asm/io.h> ++#include <asm/cacheflush.h> ++#include <asm/uaccess.h> ++ ++#include "isp.h" ++#include "ispreg.h" ++#include "isph3a.h" ++#include "ispmmu.h" ++#include "isppreview.h" ++ ++ ++struct isph3a_aewb_buffer { ++ unsigned long virt_addr; ++ unsigned long phy_addr; ++ unsigned long addr_align; ++ unsigned long ispmmu_addr; ++ unsigned long mmap_addr; /* For userspace */ ++ ++ u8 locked; ++ u16 frame_num; ++ struct isph3a_aewb_buffer *next; ++}; ++ ++static struct isph3a_aewb_status { ++ u8 initialized; ++ u8 update; ++ u8 stats_req; ++ u8 stats_done; ++ u16 frame_req; ++ ++ struct isph3a_aewb_buffer h3a_buff[H3A_MAX_BUFF]; ++ unsigned int stats_buf_size; ++ unsigned int min_buf_size; ++ ++ u16 win_count; ++ u32 frame_count; ++ wait_queue_head_t stats_wait; ++ spinlock_t buffer_lock; ++} aewbstat; ++ ++static struct isph3a_aewb_regs { ++ u32 reg_pcr; ++ u32 reg_win1; ++ u32 reg_start; ++ u32 reg_blk; ++ u32 reg_subwin; ++} aewb_regs; ++ ++static struct isph3a_aewb_config aewb_config_local = { ++ .saturation_limit = 0x3FF, ++ .win_height = 0, /* Range: 2 - 256 even values only */ ++ .win_width = 0, /* Range: 6 - 256 even values only */ ++ .ver_win_count = 0, /* Range: 1 - 128 */ ++ .hor_win_count = 0, /* Range: 1 - 36 */ ++ .ver_win_start = 0, /* Range: 0 - 4095 */ ++ .hor_win_start = 0, /* Range: 0 - 4095 */ ++ .blk_ver_win_start = 0, /* Range: 0 - 4095 */ ++ .blk_win_height = 0, /* Range: 2 - 256 even values only */ ++ .subsample_ver_inc = 0, /* Range: 2 - 32 even values only */ ++ .subsample_hor_inc = 0, /* Range: 2 - 32 even values only */ ++ .alaw_enable = 0, /* AEW ALAW EN flag */ ++ .aewb_enable = 0, /* AE AWB stats generation EN flag */ ++}; /* With reset values */ ++ ++ ++/* Structure for saving/restoring h3a module registers*/ ++static struct isp_reg isph3a_reg_list[] = { ++ {ISPH3A_AEWWIN1, 0x0000}, ++ {ISPH3A_AEWINSTART, 0x0000}, ++ {ISPH3A_AEWINBLK, 0x0000}, ++ {ISPH3A_AEWSUBWIN, 0x0000}, ++ {ISPH3A_AEWBUFST, 0x0000}, ++ {ISPH3A_AFPAX1, 0x0000}, ++ {ISPH3A_AFPAX2, 0x0000}, ++ {ISPH3A_AFPAXSTART, 0x0000}, ++ {ISPH3A_AFIIRSH, 0x0000}, ++ {ISPH3A_AFBUFST, 0x0000}, ++ {ISPH3A_AFCOEF010, 0x0000}, ++ {ISPH3A_AFCOEF032, 0x0000}, ++ {ISPH3A_AFCOEF054, 0x0000}, ++ {ISPH3A_AFCOEF076, 0x0000}, ++ {ISPH3A_AFCOEF098, 0x0000}, ++ {ISPH3A_AFCOEF0010, 0x0000}, ++ {ISPH3A_AFCOEF110, 0x0000}, ++ {ISPH3A_AFCOEF132, 0x0000}, ++ {ISPH3A_AFCOEF154, 0x0000}, ++ {ISPH3A_AFCOEF176, 0x0000}, ++ {ISPH3A_AFCOEF198, 0x0000}, ++ {ISPH3A_AFCOEF1010, 0x0000}, ++ {ISP_TOK_TERM, 0x0000} ++}; ++ ++static struct ispprev_wbal h3awb_update; /* Keep changes in AEWB gains */ ++static struct isph3a_aewb_buffer *active_buff; ++static struct isph3a_aewb_xtrastats h3a_xtrastats[H3A_MAX_BUFF]; ++static int camnotify; ++static int wb_update; ++static void isph3a_print_status(void); ++ ++void isph3a_aewb_setxtrastats(struct isph3a_aewb_xtrastats *xtrastats) ++{ ++ int i; ++ if (active_buff == NULL) ++ return; ++ ++ for (i = 0; i < H3A_MAX_BUFF; i++) { ++ if (aewbstat.h3a_buff[i].frame_num == active_buff->frame_num) { ++ if (i == 0) { ++ if (aewbstat.h3a_buff[H3A_MAX_BUFF - 1]. ++ locked == 0) ++ h3a_xtrastats[H3A_MAX_BUFF - 1] = ++ *xtrastats; ++ else ++ h3a_xtrastats[H3A_MAX_BUFF - 2] = ++ *xtrastats; ++ } else if (i == 1) { ++ if (aewbstat.h3a_buff[0].locked == 0) ++ h3a_xtrastats[0] = *xtrastats; ++ else ++ h3a_xtrastats[H3A_MAX_BUFF - 1] = ++ *xtrastats; ++ } else { ++ if (aewbstat.h3a_buff[i - 1].locked == 0) ++ h3a_xtrastats[i - 1] = *xtrastats; ++ else ++ h3a_xtrastats[i - 2] = *xtrastats; ++ } ++ return; ++ } ++ } ++} ++EXPORT_SYMBOL(isph3a_aewb_setxtrastats); ++ ++/* ++ * Enables AEW engine in the H3A module. ++ * Client should configure all the AE & AWB registers in H3A before this. ++ * enable : 1- Enables the AE & AWB engine. ++ */ ++static void ++isph3a_aewb_enable(u8 enable) ++{ ++ /* Before enabling AEWB we need to clear H3A bit in IRQ0 status reg */ ++ omap_writel(IRQ0STATUS_H3A_AWB_DONE_IRQ, ISP_IRQ0STATUS); ++ ++ if (enable) { ++ aewb_regs.reg_pcr |= ISPH3A_PCR_AEW_EN; ++ omap_writel(omap_readl(ISPH3A_PCR) | (ISPH3A_PCR_AEW_EN), ++ ISPH3A_PCR); ++ DPRINTK_ISPH3A(" H3A enabled \n"); ++ } else { ++ aewb_regs.reg_pcr &= ~ISPH3A_PCR_AEW_EN; ++ omap_writel(omap_readl(ISPH3A_PCR) & ~(ISPH3A_PCR_AEW_EN), ++ ISPH3A_PCR); ++ DPRINTK_ISPH3A(" H3A disabled \n"); ++ } ++ aewb_config_local.aewb_enable = enable; ++} ++ ++/* ++ * Updates WB parameters. Needs to be called when no ISP Preview processing is ++ * taking place. ++ */ ++void ++isph3a_update_wb(void) ++{ ++ if (wb_update) { ++ isppreview_config_whitebalance(h3awb_update); ++ wb_update = 0; ++ } ++ return; ++} ++EXPORT_SYMBOL(isph3a_update_wb); ++ ++/* ++ * Helper function to update h3a registers ++ */ ++static void ++isph3a_aewb_update_regs(void) ++{ ++ omap_writel(aewb_regs.reg_pcr, ISPH3A_PCR); ++ omap_writel(aewb_regs.reg_win1, ISPH3A_AEWWIN1); ++ omap_writel(aewb_regs.reg_start, ISPH3A_AEWINSTART); ++ omap_writel(aewb_regs.reg_blk, ISPH3A_AEWINBLK); ++ omap_writel(aewb_regs.reg_subwin, ISPH3A_AEWSUBWIN); ++ ++ aewbstat.update = 0; ++ aewbstat.frame_count = 0; ++} ++ ++/* ++ * Helper function to update buffer cache pages ++ */ ++static void ++isph3a_aewb_update_req_buffer(struct isph3a_aewb_buffer *buffer) ++{ ++ int size = aewbstat.stats_buf_size; ++ ++ size = PAGE_ALIGN(size); ++ /* Update the kernel pages of the requested buffer */ ++ dmac_inv_range((void *)buffer->addr_align, ++ (void *)buffer->addr_align + size); ++} ++ ++/* ++ * Helper function to check for stats available of specified frame ++ * Returns 0 if stats available for frame requested; -1 otherwise. ++ */ ++static int ++isph3a_aewb_stats_available(struct isph3a_aewb_data *aewbdata) ++{ ++ int i; ++ unsigned long irqflags; ++ ++ spin_lock_irqsave(&aewbstat.buffer_lock, irqflags); ++ for (i = 0; i < H3A_MAX_BUFF; i++) { ++ if ((aewbdata->frame_number == aewbstat.h3a_buff[i].frame_num) ++ && (aewbstat.h3a_buff[i].frame_num != ++ active_buff->frame_num)) { ++ aewbstat.h3a_buff[i].locked = 1; ++ spin_unlock_irqrestore(&aewbstat.buffer_lock, irqflags); ++ isph3a_aewb_update_req_buffer(&aewbstat.h3a_buff[i]); ++ aewbstat.h3a_buff[i].frame_num = 0; ++ aewbdata->h3a_aewb_statistics_buf = (void *) ++ aewbstat.h3a_buff[i].mmap_addr; ++ aewbdata->ts = h3a_xtrastats[i].ts; ++ aewbdata->field_count = h3a_xtrastats[i].field_count; ++ return 0; ++ } ++ } ++ spin_unlock_irqrestore(&aewbstat.buffer_lock, irqflags); ++ /* Stats unavailable */ ++ ++ aewbdata->h3a_aewb_statistics_buf = NULL; ++ return -1; ++} ++ ++/* ++ * Helper function to link allocated buffers ++ */ ++static void ++isph3a_aewb_link_buffers(void) ++{ ++ int i; ++ ++ for (i = 0; i < H3A_MAX_BUFF; i++) { ++ if ((i + 1) < H3A_MAX_BUFF) { ++ aewbstat.h3a_buff[i].next = &aewbstat.h3a_buff[i + 1]; ++ h3a_xtrastats[i].next = &h3a_xtrastats[i + 1]; ++ } else { ++ aewbstat.h3a_buff[i].next = &aewbstat.h3a_buff[0]; ++ h3a_xtrastats[i].next = &h3a_xtrastats[0]; ++ } ++ } ++} ++ ++/* ++ * Helper function to unlock all buffers ++ */ ++static void ++isph3a_aewb_unlock_buffers(void) ++{ ++ int i; ++ unsigned long irqflags; ++ ++ spin_lock_irqsave(&aewbstat.buffer_lock, irqflags); ++ for (i = 0; i < H3A_MAX_BUFF; i++) ++ aewbstat.h3a_buff[i].locked = 0; ++ ++ spin_unlock_irqrestore(&aewbstat.buffer_lock, irqflags); ++} ++ ++/* ++ * Callback from ISP driver for H3A AEW interrupt ++ * status : IRQ0STATUS in case of MMU error, 0 for h3a interrupt ++ * arg1 : Not used as of now. ++ * arg2 : Not used as of now. ++ */ ++static void ++isph3a_aewb_isr(unsigned long status, isp_vbq_callback_ptr arg1, void *arg2) ++{ ++ u16 frame_align; ++ ++ if ((H3A_AWB_DONE & status) != H3A_AWB_DONE) ++ return; ++ ++ /* Exchange buffers */ ++ active_buff = active_buff->next; ++ if (active_buff->locked == 1) ++ active_buff = active_buff->next; ++ omap_writel(active_buff->ispmmu_addr, ISPH3A_AEWBUFST); ++ ++ /* Update frame counter */ ++ aewbstat.frame_count++; ++ frame_align = aewbstat.frame_count; ++ if (aewbstat.frame_count > MAX_FRAME_COUNT) { ++ aewbstat.frame_count = 1; ++ frame_align++; ++ } ++ active_buff->frame_num = aewbstat.frame_count; ++ ++ /* Future Stats requested? */ ++ if (aewbstat.stats_req) { ++ /* Is the frame we want already done? */ ++ DPRINTK_ISPH3A("waiting for frame %d\n", aewbstat.frame_req); ++ if (frame_align >= (aewbstat.frame_req + 1)) { ++ aewbstat.stats_req = 0; ++ aewbstat.stats_done = 1; ++ wake_up_interruptible(&aewbstat.stats_wait); ++ } ++ } ++ ++ if (aewbstat.update) ++ isph3a_aewb_update_regs(); ++ ++ DPRINTK_ISPH3A("."); ++} ++ ++/* ++ * Helper function to check and store user given params. ++ * As most of them are busy-lock registers, need to wait ++ * until AEW_BUSY = 0 --> to program them during ISR. ++ */ ++static int ++isph3a_aewb_set_params(struct isph3a_aewb_config *user_cfg) ++{ ++ /* Saturation limit */ ++ if (unlikely(user_cfg->saturation_limit > MAX_SATURATION_LIM)) { ++ printk(KERN_ERR "Invalid Saturation_limit: %d\n", ++ user_cfg->saturation_limit); ++ return -EINVAL; ++ } else if (aewb_config_local.saturation_limit != ++ user_cfg->saturation_limit) { ++ WRITE_SAT_LIM(aewb_regs.reg_pcr, user_cfg->saturation_limit); ++ aewb_config_local.saturation_limit = ++ user_cfg->saturation_limit; ++ aewbstat.update = 1; ++ } ++ /* A-Law */ ++ if (aewb_config_local.alaw_enable != user_cfg->alaw_enable) { ++ WRITE_ALAW(aewb_regs.reg_pcr, user_cfg->alaw_enable); ++ aewb_config_local.alaw_enable = user_cfg->alaw_enable; ++ aewbstat.update = 1; ++ } ++ /* Window height */ ++ if (unlikely((user_cfg->win_height < MIN_WIN_H) ++ || (user_cfg->win_height > MAX_WIN_H) ++ || (user_cfg->win_height & 0x01))) { ++ printk(KERN_ERR "Invalid window height: %d\n", ++ user_cfg->win_height); ++ return -EINVAL; ++ } else if (aewb_config_local.win_height != user_cfg->win_height) { ++ WRITE_WIN_H(aewb_regs.reg_win1, user_cfg->win_height); ++ aewb_config_local.win_height = user_cfg->win_height; ++ aewbstat.update = 1; ++ } ++ /* Window width */ ++ if (unlikely((user_cfg->win_width < MIN_WIN_W) ++ || (user_cfg->win_width > MAX_WIN_W) ++ || (user_cfg->win_width & 0x01))) { ++ printk(KERN_ERR "Invalid window width: %d\n", ++ user_cfg->win_width); ++ return -EINVAL; ++ } else if (aewb_config_local.win_width != user_cfg->win_width) { ++ WRITE_WIN_W(aewb_regs.reg_win1, user_cfg->win_width); ++ aewb_config_local.win_width = user_cfg->win_width; ++ aewbstat.update = 1; ++ } ++ /* Vertical window count */ ++ if (unlikely((user_cfg->ver_win_count < 1) ++ || (user_cfg->ver_win_count > MAX_WINVC))) { ++ printk(KERN_ERR "Invalid vertical window count: %d\n", ++ user_cfg->ver_win_count); ++ return -EINVAL; ++ } else if (aewb_config_local.ver_win_count ++ != user_cfg->ver_win_count){ ++ WRITE_VER_C(aewb_regs.reg_win1, ++ user_cfg->ver_win_count); ++ aewb_config_local.ver_win_count = ++ user_cfg->ver_win_count; ++ aewbstat.update = 1; ++ } ++ /* Horizontal window count */ ++ if (unlikely((user_cfg->hor_win_count < 1) ++ || (user_cfg->hor_win_count > MAX_WINHC))) { ++ printk(KERN_ERR "Invalid horizontal window count: %d\n", ++ user_cfg->hor_win_count); ++ return -EINVAL; ++ } else if (aewb_config_local.hor_win_count ++ != user_cfg->hor_win_count){ ++ WRITE_HOR_C(aewb_regs.reg_win1, ++ user_cfg->hor_win_count); ++ aewb_config_local.hor_win_count = ++ user_cfg->hor_win_count; ++ aewbstat.update = 1; ++ } ++ /* Windows vertical start position */ ++ if (unlikely(user_cfg->ver_win_start > MAX_WINSTART)) { ++ printk(KERN_ERR "Invalid vertical window start: %d\n", ++ user_cfg->ver_win_start); ++ return -EINVAL; ++ } else if (aewb_config_local.ver_win_start ++ != user_cfg->ver_win_start){ ++ WRITE_VER_WIN_ST(aewb_regs.reg_start, ++ user_cfg->ver_win_start); ++ aewb_config_local.ver_win_start = ++ user_cfg->ver_win_start; ++ aewbstat.update = 1; ++ } ++ /* Windows horizontal start position */ ++ if (unlikely(user_cfg->hor_win_start > MAX_WINSTART)) { ++ printk(KERN_ERR "Invalid horizontal window start: %d\n", ++ user_cfg->hor_win_start); ++ return -EINVAL; ++ } else if (aewb_config_local.hor_win_start ++ != user_cfg->hor_win_start){ ++ WRITE_HOR_WIN_ST(aewb_regs.reg_start, ++ user_cfg->hor_win_start); ++ aewb_config_local.hor_win_start = ++ user_cfg->hor_win_start; ++ aewbstat.update = 1; ++ } ++ /* Black Line vertical start position */ ++ if (unlikely(user_cfg->blk_ver_win_start > MAX_WINSTART)) { ++ printk(KERN_ERR "Invalid black vertical window start: %d\n", ++ user_cfg->blk_ver_win_start); ++ return -EINVAL; ++ } else if (aewb_config_local.blk_ver_win_start ++ != user_cfg->blk_ver_win_start){ ++ WRITE_BLK_VER_WIN_ST(aewb_regs.reg_blk, ++ user_cfg->blk_ver_win_start); ++ aewb_config_local.blk_ver_win_start = ++ user_cfg->blk_ver_win_start; ++ aewbstat.update = 1; ++ } ++ /* Black line height */ ++ if (unlikely((user_cfg->blk_win_height < MIN_WIN_H) ++ || (user_cfg->blk_win_height > MAX_WIN_H) ++ || (user_cfg->blk_win_height & 0x01))) { ++ printk(KERN_ERR "Invalid black window height: %d\n", ++ user_cfg->blk_win_height); ++ return -EINVAL; ++ } else if (aewb_config_local.blk_win_height ++ != user_cfg->blk_win_height) { ++ WRITE_BLK_WIN_H(aewb_regs.reg_blk, ++ user_cfg->blk_win_height); ++ aewb_config_local.blk_win_height ++ = user_cfg->blk_win_height; ++ aewbstat.update = 1; ++ } ++ /* Vertical sampling point increments */ ++ if (unlikely((user_cfg->subsample_ver_inc < MIN_SUB_INC) ++ || (user_cfg->subsample_ver_inc > MAX_SUB_INC) ++ || (user_cfg->subsample_ver_inc & 0x01))) { ++ printk(KERN_ERR "Invalid vertical subsample increment: %d\n", ++ user_cfg->subsample_ver_inc); ++ return -EINVAL; ++ } else if (aewb_config_local.subsample_ver_inc ++ != user_cfg->subsample_ver_inc) { ++ WRITE_SUB_VER_INC(aewb_regs.reg_subwin, ++ user_cfg->subsample_ver_inc); ++ aewb_config_local.subsample_ver_inc ++ = user_cfg->subsample_ver_inc; ++ aewbstat.update = 1; ++ } ++ /* Horizontal sampling point increments */ ++ if (unlikely((user_cfg->subsample_hor_inc < MIN_SUB_INC) ++ || (user_cfg->subsample_hor_inc > MAX_SUB_INC) ++ || (user_cfg->subsample_hor_inc & 0x01))) { ++ printk(KERN_ERR "Invalid horizontal subsample increment: %d\n", ++ user_cfg->subsample_hor_inc); ++ return -EINVAL; ++ } else if (aewb_config_local.subsample_hor_inc ++ != user_cfg->subsample_hor_inc) { ++ WRITE_SUB_HOR_INC(aewb_regs.reg_subwin, ++ user_cfg->subsample_hor_inc); ++ aewb_config_local.subsample_hor_inc ++ = user_cfg->subsample_hor_inc; ++ aewbstat.update = 1; ++ } ++ ++ if ((!aewbstat.initialized) || (0 == aewb_config_local.aewb_enable)) { ++ isph3a_aewb_update_regs(); ++ aewbstat.initialized = 1; ++ } ++ return 0; ++} ++ ++/* ++ * Helper function to munmap kernel buffers from user space. ++ */ ++static int ++isph3a_aewb_munmap(struct isph3a_aewb_buffer *buffer) ++{ ++ /* TO DO: munmap succesfully the kernel buffers, so they can be ++ remmaped again */ ++ buffer->mmap_addr = 0; ++ return 0; ++} ++ ++/* ++ * Helper function to mmap buffers to user space. ++ * buffer passed need to already have a valid physical address: buffer->phy_addr ++ * It returns user pointer as unsigned long in buffer->mmap_addr ++ */ ++static int ++isph3a_aewb_mmap_buffers(struct isph3a_aewb_buffer *buffer) ++{ ++ struct vm_area_struct vma; ++ struct mm_struct *mm = current->mm; ++ int size = aewbstat.stats_buf_size; ++ unsigned long addr = 0; ++ unsigned long pgoff = 0, flags = MAP_SHARED | MAP_ANONYMOUS; ++ unsigned long prot = PROT_READ | PROT_WRITE; ++ void *pos = (void *) buffer->addr_align; ++ ++ size = PAGE_ALIGN(size); ++ ++ addr = get_unmapped_area(NULL, addr, size, pgoff, flags); ++ vma.vm_mm = mm; ++ vma.vm_start = addr; ++ vma.vm_end = addr + size; ++ vma.vm_flags = calc_vm_prot_bits(prot) | calc_vm_flag_bits(flags); ++ vma.vm_pgoff = pgoff; ++ vma.vm_file = NULL; ++#ifndef ENABLE_BT_656_CAPTURE ++ vma.vm_page_prot = protection_map[vma.vm_flags]; ++#else ++ vma.vm_page_prot = vm_get_page_prot(vma.vm_flags); ++#endif ++ ++ while (size > 0) { ++ if (vm_insert_page(&vma, addr, vmalloc_to_page(pos))) ++ return -EAGAIN; ++ addr += PAGE_SIZE; ++ pos += PAGE_SIZE; ++ size -= PAGE_SIZE; ++ } ++ ++ buffer->mmap_addr = vma.vm_start; ++ return 0; ++} ++ ++/* ++ * API to configure AEW registers and enable/disable H3A engine ++ */ ++int ++isph3a_aewb_configure(struct isph3a_aewb_config *aewbcfg) ++{ ++ int ret = 0; ++ int i; ++ int win_count = 0; ++ ++ if (NULL == aewbcfg) { ++ printk(KERN_ERR "Null argument in configuration. \n"); ++ return -EINVAL; ++ } ++ ++ if (!aewbstat.initialized) { ++ DPRINTK_ISPH3A("Setting callback for H3A\n"); ++ ret = isp_set_callback(CBK_H3A_AWB_DONE, isph3a_aewb_isr, ++ (void *)NULL, (void *)NULL); ++ if (ret) { ++ printk(KERN_ERR "No callback for H3A\n"); ++ return ret; ++ } ++ } ++ ++ ret = isph3a_aewb_set_params(aewbcfg); ++ if (ret) { ++ printk(KERN_ERR "Invalid parameters! \n"); ++ return ret; ++ } ++ ++ win_count = (aewbcfg->ver_win_count * aewbcfg->hor_win_count); ++ win_count += aewbcfg->hor_win_count; /* Blk windows row*/ ++ ret = (win_count / 8); ++ win_count += (win_count % 8)? 1: 0; ++ win_count += ret; ++ ++ aewbstat.win_count = win_count; ++ ++ if (aewbstat.stats_buf_size && ((win_count * AEWB_PACKET_SIZE) ++ > aewbstat.stats_buf_size)) { ++ DPRINTK_ISPH3A("There was a previous buffer... \n"); ++ isph3a_aewb_enable(0); ++ for (i = 0; i < H3A_MAX_BUFF; i++) { ++ isph3a_aewb_munmap(&aewbstat.h3a_buff[i]); ++ ispmmu_unmap(aewbstat.h3a_buff[i].ispmmu_addr); ++ dma_free_coherent(NULL, ++ aewbstat.min_buf_size + 64, ++ (void *)aewbstat.h3a_buff[i].virt_addr, ++ (dma_addr_t)aewbstat.h3a_buff[i].phy_addr); ++ aewbstat.h3a_buff[i].virt_addr = 0; ++ } ++ aewbstat.stats_buf_size = 0; ++ } ++ ++ if (!aewbstat.h3a_buff[0].virt_addr) { ++ aewbstat.stats_buf_size = win_count * AEWB_PACKET_SIZE; ++ aewbstat.min_buf_size = PAGE_ALIGN(aewbstat.stats_buf_size); ++ ++ for (i = 0; i < H3A_MAX_BUFF; i++) { ++ aewbstat.h3a_buff[i].virt_addr = ++ (unsigned long)dma_alloc_coherent(NULL, ++ aewbstat.min_buf_size, ++ (dma_addr_t *) ++ &aewbstat.h3a_buff[i]. ++ phy_addr, GFP_KERNEL | ++ GFP_DMA); ++ if (aewbstat.h3a_buff[i].virt_addr == 0) { ++ printk(KERN_ERR "Can't acquire memory for " ++ "buffer[%d]\n", i); ++ return -ENOMEM; ++ } ++ aewbstat.h3a_buff[i].addr_align = ++ aewbstat.h3a_buff[i].virt_addr; ++ while ((aewbstat.h3a_buff[i].addr_align & ++ 0xFFFFFFC0) != ++ aewbstat.h3a_buff[i]. ++ addr_align) ++ aewbstat.h3a_buff[i].addr_align++; ++ aewbstat.h3a_buff[i].ispmmu_addr = ++ ispmmu_map(aewbstat. ++ h3a_buff[i].phy_addr, ++ aewbstat.min_buf_size); ++ } ++ isph3a_aewb_unlock_buffers(); ++ isph3a_aewb_link_buffers(); ++ ++ /* First active buffer */ ++ if (active_buff == NULL) ++ active_buff = &aewbstat.h3a_buff[0]; ++ omap_writel(active_buff->ispmmu_addr, ISPH3A_AEWBUFST); ++ } ++ /* Always remap when calling Configure */ ++ for (i = 0; i < H3A_MAX_BUFF; i++) { ++ if (aewbstat.h3a_buff[i].mmap_addr) { ++ isph3a_aewb_munmap(&aewbstat.h3a_buff[i]); ++ DPRINTK_ISPH3A("We have munmaped buffer 0x%lX\n", ++ aewbstat.h3a_buff[i].virt_addr); ++ } ++ isph3a_aewb_mmap_buffers(&aewbstat.h3a_buff[i]); ++ DPRINTK_ISPH3A("buff[%d] addr is:\n virt 0x%lX\n" ++ " aligned 0x%lX\n" ++ " phys 0x%lX\n" ++ " ispmmu 0x%08lX\n" ++ " mmapped 0x%lX\n", i, ++ aewbstat.h3a_buff[i].virt_addr, ++ aewbstat.h3a_buff[i].addr_align, ++ aewbstat.h3a_buff[i].phy_addr, ++ aewbstat.h3a_buff[i].ispmmu_addr, ++ aewbstat.h3a_buff[i].mmap_addr); ++ } ++ /* Enable/disable engine */ ++ isph3a_aewb_enable(aewbcfg->aewb_enable); ++ isph3a_print_status(); ++ ++ return 0; ++} ++EXPORT_SYMBOL(isph3a_aewb_configure); ++ ++ ++/* ++ * This API allows the user to update White Balance gains, as well as ++ * exposure time and analog gain. It is also used to request frame ++ * statistics. ++ */ ++int ++isph3a_aewb_request_statistics(struct isph3a_aewb_data *aewbdata) ++{ ++ int ret = 0; ++ u16 frame_diff = 0; ++ u16 frame_cnt = aewbstat.frame_count; ++ wait_queue_t wqt; ++ ++ /* ++ * This will be replaced by the gain settings using ++ * Master->Slave approach in camera driver ++ */ ++ ++ /* ++ u32 exp_time = aewbdata->shutter; ++ u16 gain = aewbdata->gain; ++ */ ++ ++ if (!aewb_config_local.aewb_enable) { ++ printk(KERN_ERR "H3A engine not enabled\n"); ++ return -EINVAL; ++ } ++ aewbdata->h3a_aewb_statistics_buf = NULL; ++ ++ DPRINTK_ISPH3A("User data received: \n"); ++ DPRINTK_ISPH3A("Digital gain = 0x%04x\n", aewbdata->dgain); ++ DPRINTK_ISPH3A("WB gain b *= 0x%04x\n", aewbdata->wb_gain_b); ++ DPRINTK_ISPH3A("WB gain r *= 0x%04x\n", aewbdata->wb_gain_r); ++ DPRINTK_ISPH3A("WB gain gb = 0x%04x\n", aewbdata->wb_gain_gb); ++ DPRINTK_ISPH3A("WB gain gr = 0x%04x\n", aewbdata->wb_gain_gr); ++ DPRINTK_ISPH3A("ISP AEWB request status wait for interrupt\n"); ++ ++ if (aewbdata->update != 0) { ++ if (aewbdata->update & SET_DIGITAL_GAIN) ++ h3awb_update.dgain = (u16)aewbdata->dgain; ++ if (aewbdata->update & SET_COLOR_GAINS) { ++ h3awb_update.coef3 = (u8)aewbdata->wb_gain_b; ++ h3awb_update.coef2 = (u8)aewbdata->wb_gain_gr; ++ h3awb_update.coef1 = (u8)aewbdata->wb_gain_gb; ++ h3awb_update.coef0 = (u8)aewbdata->wb_gain_r; ++ } ++ if (aewbdata->update & (SET_COLOR_GAINS | SET_DIGITAL_GAIN)) ++ wb_update = 1; ++ ++ if (aewbdata->update & REQUEST_STATISTICS) { ++ isph3a_aewb_unlock_buffers(); ++ ++ /* Stats available? */ ++ DPRINTK_ISPH3A("Stats available?\n"); ++ ret = isph3a_aewb_stats_available(aewbdata); ++ if (!ret) ++ goto out; ++ ++ DPRINTK_ISPH3A("Stats in near future?\n"); ++ /* Stats in near future? */ ++ if (aewbdata->frame_number > frame_cnt) { ++ frame_diff = aewbdata->frame_number - frame_cnt; ++ } else if (aewbdata->frame_number < frame_cnt) { ++ if ((frame_cnt > (MAX_FRAME_COUNT - ++ MAX_FUTURE_FRAMES)) ++ && (aewbdata-> ++ frame_number ++ < MAX_FRAME_COUNT)) ++ frame_diff = aewbdata->frame_number ++ + MAX_FRAME_COUNT ++ - frame_cnt; ++ else { ++ /* Frame unavailable */ ++ frame_diff = MAX_FUTURE_FRAMES + 1; ++ aewbdata->h3a_aewb_statistics_buf = ++ NULL; ++ } ++ } ++ ++ if (frame_diff > MAX_FUTURE_FRAMES) { ++ printk(KERN_ERR "Invalid frame requested\n"); ++ ++ } else if (!camnotify) { ++ /* Block until frame in near future completes */ ++ aewbstat.frame_req = aewbdata->frame_number; ++ aewbstat.stats_req = 1; ++ aewbstat.stats_done = 0; ++ init_waitqueue_entry(&wqt, current); ++ ret = wait_event_interruptible ++ (aewbstat.stats_wait, ++ aewbstat.stats_done == 1); ++ if (ret < 0) ++ return ret; ++ ++ DPRINTK_ISPH3A("ISP AEWB request status" ++ " interrupt raised\n"); ++ /* Stats now available */ ++ ret = isph3a_aewb_stats_available(aewbdata); ++ if (ret) { ++ DPRINTK_ISPH3A ++ ("After waiting for stats," ++ " stats not available!!\n"); ++ } ++ } ++ } ++ } ++out: ++ aewbdata->curr_frame = aewbstat.frame_count; ++ ++ return 0; ++} ++EXPORT_SYMBOL(isph3a_aewb_request_statistics); ++ ++/* ++ * Module Initialisation. ++ */ ++static int __init ++isph3a_aewb_init(void) ++{ ++ memset(&aewbstat, 0, sizeof(aewbstat)); ++ memset(&aewb_regs, 0, sizeof(aewb_regs)); ++ ++ init_waitqueue_head(&aewbstat.stats_wait); ++ spin_lock_init(&aewbstat.buffer_lock); ++ return 0; ++} ++ ++/* ++ * Module exit. ++ */ ++static void ++isph3a_aewb_cleanup(void) ++{ ++ int i; ++ isph3a_aewb_enable(0); ++ isp_unset_callback(CBK_H3A_AWB_DONE); ++ ++ if (aewbstat.h3a_buff) { ++ /* Free buffers */ ++ for (i = 0; i < H3A_MAX_BUFF; i++) { ++ ispmmu_unmap(aewbstat.h3a_buff[i].ispmmu_addr); ++ dma_free_coherent(NULL, ++ aewbstat.min_buf_size + 64, ++ (void *)aewbstat.h3a_buff[i].virt_addr, ++ (dma_addr_t)aewbstat.h3a_buff[i].phy_addr); ++ } ++ } ++ memset(&aewbstat, 0, sizeof(aewbstat)); ++ memset(&aewb_regs, 0, sizeof(aewb_regs)); ++} ++ ++/* ++ * Debug print ++ */ ++static void ++isph3a_print_status(void) ++{ ++ DPRINTK_ISPH3A("ISPH3A_PCR = 0x%08x\n", ++ omap_readl(ISPH3A_PCR)); ++ DPRINTK_ISPH3A("ISPH3A_AEWWIN1 = 0x%08x\n", ++ omap_readl(ISPH3A_AEWWIN1)); ++ DPRINTK_ISPH3A("ISPH3A_AEWINSTART = 0x%08x\n", ++ omap_readl(ISPH3A_AEWINSTART)); ++ DPRINTK_ISPH3A("ISPH3A_AEWINBLK = 0x%08x\n", ++ omap_readl(ISPH3A_AEWINBLK)); ++ DPRINTK_ISPH3A("ISPH3A_AEWSUBWIN = 0x%08x\n", ++ omap_readl(ISPH3A_AEWSUBWIN)); ++ DPRINTK_ISPH3A("ISPH3A_AEWBUFST = 0x%08x\n", ++ omap_readl(ISPH3A_AEWBUFST)); ++ DPRINTK_ISPH3A("stats windows = %d\n", ++ aewbstat.win_count); ++ DPRINTK_ISPH3A("stats buff size = %d\n", ++ aewbstat.stats_buf_size); ++} ++void ++isph3a_notify(int notify) ++{ ++ camnotify = notify; ++ if (camnotify && aewbstat.initialized) { ++ printk(KERN_DEBUG "Warning Camera Off \n"); ++ aewbstat.stats_req = 0; ++ aewbstat.stats_done = 1; ++ wake_up_interruptible(&aewbstat.stats_wait); ++ } ++} ++EXPORT_SYMBOL(isph3a_notify); ++/* ++ * Saves the values of the h3a module registers. ++ */ ++void ++isph3a_save_context(void) ++{ ++ DPRINTK_ISPH3A(" Saving context\n"); ++ isp_save_context(isph3a_reg_list); ++} ++EXPORT_SYMBOL(isph3a_save_context); ++ ++/* ++ * Restores the values of the h3a module registers. ++ */ ++void ++isph3a_restore_context(void) ++{ ++ DPRINTK_ISPH3A(" Restoring context\n"); ++ isp_restore_context(isph3a_reg_list); ++} ++EXPORT_SYMBOL(isph3a_restore_context); ++ ++module_init(isph3a_aewb_init); ++module_exit(isph3a_aewb_cleanup); ++ ++ ++MODULE_AUTHOR("Texas Instruments"); ++MODULE_DESCRIPTION("H3A ISP Module"); ++MODULE_LICENSE("GPL"); ++ +Index: git/drivers/media/video/isp/isph3a.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ git/drivers/media/video/isp/isph3a.h 2009-02-12 15:25:41.000000000 -0600 +@@ -0,0 +1,197 @@ ++/* ++ * drivers/media/video/omap/isp/isph3a.h ++ * ++ * Include file for H3A module in TI's OMAP3430 Camera ISP ++ * ++ * Copyright (C) 2008 Texas Instruments, Inc. ++ * ++ * This package is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ * ++ * THIS PACKAGE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR ++ * IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED ++ * WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE. ++ */ ++ ++#ifndef OMAP_ISP_H3A_H ++#define OMAP_ISP_H3A_H ++ ++#define AEWB_PACKET_SIZE 16 ++#define H3A_MAX_BUFF 5 ++ ++/* Flags for changed registers */ ++#define PCR_CHNG (1 << 0) ++#define AEWWIN1_CHNG (1 << 1) ++#define AEWINSTART_CHNG (1 << 2) ++#define AEWINBLK_CHNG (1 << 3) ++#define AEWSUBWIN_CHNG (1 << 4) ++#define PRV_WBDGAIN_CHNG (1 << 5) ++#define PRV_WBGAIN_CHNG (1 << 6) ++ ++/* Flags for update field */ ++#define REQUEST_STATISTICS (1 << 0) ++#define SET_COLOR_GAINS (1 << 1) ++#define SET_DIGITAL_GAIN (1 << 2) ++#define SET_EXPOSURE (1 << 3) ++#define SET_ANALOG_GAIN (1 << 4) ++ ++#define MAX_SATURATION_LIM 1023 ++#define MIN_WIN_H 2 ++#define MAX_WIN_H 256 ++#define MIN_WIN_W 6 ++#define MAX_WIN_W 256 ++#define MAX_WINVC 128 ++#define MAX_WINHC 36 ++#define MAX_WINSTART 4095 ++#define MIN_SUB_INC 2 ++#define MAX_SUB_INC 32 ++ ++#define MAX_FRAME_COUNT 0x0FFF ++#define MAX_FUTURE_FRAMES 10 ++ ++/* ISPH3A REGISTERS bits */ ++#define ISPH3A_PCR_AF_EN (1 << 0) ++#define ISPH3A_PCR_AF_ALAW_EN (1 << 1) ++#define ISPH3A_PCR_AF_MED_EN (1 << 2) ++#define ISPH3A_PCR_AF_BUSY (1 << 15) ++#define ISPH3A_PCR_AEW_EN (1 << 16) ++#define ISPH3A_PCR_AEW_ALAW_EN (1 << 17) ++#define ISPH3A_PCR_AEW_BUSY (1 << 18) ++ ++#define WRITE_SAT_LIM(reg, sat_limit) \ ++ (reg = (reg & (~(ISPH3A_PCR_AEW_AVE2LMT_MASK))) \ ++ | (sat_limit << ISPH3A_PCR_AEW_AVE2LMT_SHIFT)) ++ ++#define WRITE_ALAW(reg, alaw_en) \ ++ (reg = (reg & (~(ISPH3A_PCR_AEW_ALAW_EN))) \ ++ | ((alaw_en & ISPH3A_PCR_AF_ALAW_EN) \ ++ << ISPH3A_PCR_AEW_ALAW_EN_SHIFT)) ++ ++#define WRITE_WIN_H(reg, height) \ ++ (reg = (reg & (~(ISPH3A_AEWWIN1_WINH_MASK))) \ ++ | (((height >> 1) - 1) << ISPH3A_AEWWIN1_WINH_SHIFT)) ++ ++#define WRITE_WIN_W(reg, width) \ ++ (reg = (reg & (~(ISPH3A_AEWWIN1_WINW_MASK))) \ ++ | (((width >> 1) - 1) << ISPH3A_AEWWIN1_WINW_SHIFT)) ++ ++#define WRITE_VER_C(reg, ver_count) \ ++ (reg = (reg & ~(ISPH3A_AEWWIN1_WINVC_MASK)) \ ++ | ((ver_count - 1) << ISPH3A_AEWWIN1_WINVC_SHIFT)) ++ ++#define WRITE_HOR_C(reg, hor_count) \ ++ (reg = (reg & ~(ISPH3A_AEWWIN1_WINHC_MASK)) \ ++ | ((hor_count - 1) << ISPH3A_AEWWIN1_WINHC_SHIFT)) ++ ++#define WRITE_VER_WIN_ST(reg, ver_win_st) \ ++ (reg = (reg & ~(ISPH3A_AEWINSTART_WINSV_MASK)) \ ++ | (ver_win_st << ISPH3A_AEWINSTART_WINSV_SHIFT)) ++ ++#define WRITE_HOR_WIN_ST(reg, hor_win_st) \ ++ (reg = (reg & ~(ISPH3A_AEWINSTART_WINSH_MASK)) \ ++ | (hor_win_st << ISPH3A_AEWINSTART_WINSH_SHIFT)) ++ ++#define WRITE_BLK_VER_WIN_ST(reg, blk_win_st) \ ++ (reg = (reg & ~(ISPH3A_AEWINBLK_WINSV_MASK)) \ ++ | (blk_win_st << ISPH3A_AEWINBLK_WINSV_SHIFT)) ++ ++#define WRITE_BLK_WIN_H(reg, height) \ ++ (reg = (reg & ~(ISPH3A_AEWINBLK_WINH_MASK)) \ ++ | (((height >> 1) - 1) << ISPH3A_AEWINBLK_WINH_SHIFT)) ++ ++#define WRITE_SUB_VER_INC(reg, sub_ver_inc) \ ++ (reg = (reg & ~(ISPH3A_AEWSUBWIN_AEWINCV_MASK)) \ ++ | (((sub_ver_inc >> 1) - 1) << ISPH3A_AEWSUBWIN_AEWINCV_SHIFT)) ++ ++#define WRITE_SUB_HOR_INC(reg, sub_hor_inc) \ ++ (reg = (reg & ~(ISPH3A_AEWSUBWIN_AEWINCH_MASK)) \ ++ | (((sub_hor_inc >> 1) - 1) << ISPH3A_AEWSUBWIN_AEWINCH_SHIFT)) ++ ++ ++struct isph3a_aewb_config { ++ u16 saturation_limit; ++ u16 win_height; /* Range: 2 - 256 */ ++ u16 win_width; /* Range: 2 - 256 */ ++ u16 ver_win_count; /* vertical window count: 1 - 128 */ ++ u16 hor_win_count; /* horizontal window count: 1 - 36 */ ++ u16 ver_win_start; /* ver window start position: 0 - 4095 */ ++ u16 hor_win_start; /* hor window start position: 0 - 4095 */ ++ u16 blk_ver_win_start; /* black line ver window start pos: 0 -4095 */ ++ u16 blk_win_height; /* black line height: 2 - 256 */ ++ u16 subsample_ver_inc; /* ver distance between subsamples: 2 - 32 */ ++ u16 subsample_hor_inc; /* hor distance between subsamples: 2 - 32 */ ++ u8 alaw_enable; /* enable AEW ALAW flag */ ++ u8 aewb_enable; /* AE AWB enable flag */ ++}; ++ ++struct isph3a_aewb_data { ++ void *h3a_aewb_statistics_buf; /* Pointer to pass to user */ ++ u32 shutter; /* Shutter speed */ ++ u16 gain; /* Sensor analog Gain */ ++ u32 shutter_cap; /* Shutter speed for capture */ ++ u16 gain_cap; /* Sensor Gain for capture */ ++ ++ u16 dgain; /* White balance digital gain */ ++ u16 wb_gain_b; /* White balance color gain blue */ ++ u16 wb_gain_r; /* White balance color gain red */ ++ u16 wb_gain_gb; /* White balance color gain green blue */ ++ u16 wb_gain_gr; /* White balance color gain green red */ ++ ++ u16 frame_number; /* Frame number of requested stats */ ++ u16 curr_frame; /* Current frame number being processed */ ++ u8 update; /* Bitwise flags to update parameters */ ++ ++ struct timeval ts; /* Timestamp of returned framestats */ ++ unsigned long field_count; /* ++ * Sequence number of returned ++ * framestats ++ */ ++}; ++ ++struct isph3a_aewb_xtrastats { ++ struct timeval ts; ++ unsigned long field_count; ++ ++ struct isph3a_aewb_xtrastats *next; ++}; ++ ++void isph3a_aewb_setxtrastats(struct isph3a_aewb_xtrastats *xtrastats); ++ ++#include <linux/autoconf.h> ++#ifdef CONFIG_VIDEO_OMAP34XX_ISP_PREVIEWER ++/* ++ * Sets the parameters in H3A registers ++ */ ++int isph3a_aewb_configure(struct isph3a_aewb_config *aewbcfg); ++ ++/* ++ * Requests AE and AWB statistics ++ */ ++int isph3a_aewb_request_statistics(struct isph3a_aewb_data *aewbdata); ++ ++/* ++ * Saves h3a context ++ */ ++void isph3a_save_context(void); ++ ++/* ++ * Restores h3a context ++ */ ++void isph3a_restore_context(void); ++ ++#else ++#define isph3a_aewb_configure(x) -EFAULT ++#define isph3a_aewb_request_statistics(x) -EFAULT ++#define isph3a_save_context() ++#define isph3a_restore_context() ++ ++#endif ++ ++/* ++ * Update WB values after a H3A statistics request ++ */ ++void isph3a_update_wb(void); ++ ++void isph3a_notify(int notify); ++#endif /* OMAP_ISP_H3A_H */ +Index: git/drivers/media/video/isp/isphist.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ git/drivers/media/video/isp/isphist.h 2009-02-12 15:23:05.000000000 -0600 +@@ -0,0 +1,145 @@ ++/* ++ * drivers/media/video/isp/isphist.h ++ * ++ * Include file for HISTOGRAM module in TI's OMAP3430 Camera ISP ++ * ++ * Copyright (C) 2008 Texas Instruments, Inc. ++ * ++ * This package is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ * ++ * THIS PACKAGE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR ++ * IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED ++ * WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE. ++ */ ++ ++#ifndef OMAP_ISP_HIST_H ++#define OMAP_ISP_HIST_H ++ ++/* Flags for number of bins */ ++#define BINS_32 0x0 ++#define BINS_64 0x1 ++#define BINS_128 0x2 ++#define BINS_256 0x3 ++ ++#define MAX_REGIONS 0x4 ++#define MAX_WB_GAIN 255 ++#define MIN_WB_GAIN 0x0 ++#define MAX_BIT_WIDTH 14 ++#define MIN_BIT_WIDTH 8 ++ ++#define ISPHIST_PCR_EN (1 << 0) ++#define HIST_MEM_SIZE 1024 ++#define ISPHIST_CNT_CLR_EN (1 << 7) ++ ++#define WRITE_SOURCE(reg, source) \ ++ (reg = (reg & ~(ISPHIST_CNT_SOURCE_MASK)) \ ++ | (source << ISPHIST_CNT_SOURCE_SHIFT)) ++ ++#define WRITE_HV_INFO(reg, hv_info) \ ++ (reg = ((reg & ~(ISPHIST_HV_INFO_MASK)) \ ++ | (hv_info & ISPHIST_HV_INFO_MASK))) ++ ++#define WRITE_RADD(reg, radd) \ ++ (reg = (reg & ~(ISPHIST_RADD_MASK)) \ ++ | (radd << ISPHIST_RADD_SHIFT)) ++ ++#define WRITE_RADD_OFF(reg, radd_off) \ ++ (reg = (reg & ~(ISPHIST_RADD_OFF_MASK)) \ ++ | (radd_off << ISPHIST_RADD_OFF_SHIFT)) ++ ++#define WRITE_BIT_SHIFT(reg, bit_shift) \ ++ (reg = (reg & ~(ISPHIST_CNT_SHIFT_MASK)) \ ++ | (bit_shift << ISPHIST_CNT_SHIFT_SHIFT)) ++ ++#define WRITE_DATA_SIZE(reg, data_size) \ ++ (reg = (reg & ~(ISPHIST_CNT_DATASIZE_MASK)) \ ++ | (data_size << ISPHIST_CNT_DATASIZE_SHIFT)) ++ ++#define WRITE_NUM_BINS(reg, num_bins) \ ++ (reg = (reg & ~(ISPHIST_CNT_BINS_MASK)) \ ++ | (num_bins << ISPHIST_CNT_BINS_SHIFT)) ++ ++#define WRITE_WB_R(reg, reg_wb_gain) \ ++ reg = ((reg & ~(ISPHIST_WB_GAIN_WG00_MASK)) \ ++ | (reg_wb_gain << ISPHIST_WB_GAIN_WG00_SHIFT)) ++ ++#define WRITE_WB_RG(reg, reg_wb_gain) \ ++ (reg = (reg & ~(ISPHIST_WB_GAIN_WG01_MASK)) \ ++ | (reg_wb_gain << ISPHIST_WB_GAIN_WG01_SHIFT)) ++ ++#define WRITE_WB_B(reg, reg_wb_gain) \ ++ (reg = (reg & ~(ISPHIST_WB_GAIN_WG02_MASK)) \ ++ | (reg_wb_gain << ISPHIST_WB_GAIN_WG02_SHIFT)) ++ ++#define WRITE_WB_BG(reg, reg_wb_gain) \ ++ (reg = (reg & ~(ISPHIST_WB_GAIN_WG03_MASK)) \ ++ | (reg_wb_gain << ISPHIST_WB_GAIN_WG03_SHIFT)) ++ ++#define WRITE_REG_HORIZ(reg, reg_n_hor) \ ++ (reg = ((reg & ~ISPHIST_REGHORIZ_MASK) \ ++ | (reg_n_hor & ISPHIST_REGHORIZ_MASK))) ++ ++#define WRITE_REG_VERT(reg, reg_n_vert) \ ++ (reg = ((reg & ~ISPHIST_REGVERT_MASK) \ ++ | (reg_n_vert & ISPHIST_REGVERT_MASK))) ++ ++struct isp_hist_config { ++ u8 hist_source; /* CCDC or Memory */ ++ u8 input_bit_width; /* Needed o know the size per pixel */ ++ u8 hist_frames; /* Num of frames to be processed and accumulated */ ++ u8 hist_h_v_info; /* frame-input width and height if source is memory */ ++ u16 hist_radd; /* frame-input address in memory */ ++ u16 hist_radd_off; /* line-offset for frame-input */ ++ u16 hist_bins; /* number of bins: 32, 64, 128, or 256 */ ++ u16 wb_gain_R; /* White Balance Field-to-Pattern Assignments */ ++ u16 wb_gain_RG; /* White Balance Field-to-Pattern Assignments */ ++ u16 wb_gain_B; /* White Balance Field-to-Pattern Assignments */ ++ u16 wb_gain_BG; /* White Balance Field-to-Pattern Assignments */ ++ u8 num_regions; /* number of regions to be configured */ ++ u16 reg0_hor; /* Region 0 size and position */ ++ u16 reg0_ver; /* Region 0 size and position */ ++ u16 reg1_hor; /* Region 1 size and position */ ++ u16 reg1_ver; /* Region 1 size and position */ ++ u16 reg2_hor; /* Region 2 size and position */ ++ u16 reg2_ver; /* Region 2 size and position */ ++ u16 reg3_hor; /* Region 3 size and position */ ++ u16 reg3_ver; /* Region 3 size and position */ ++}; ++ ++struct isp_hist_data { ++ ++ u32 *hist_statistics_buf; /* Pointer to pass to user */ ++ ++}; ++ ++#include <linux/autoconf.h> ++#ifdef CONFIG_VIDEO_OMAP34XX_ISP_PREVIEWER ++/* ++ * Validate parameters to be stored in HIST registers ++ */ ++int isp_hist_configure(struct isp_hist_config *histcfg); ++ ++/* ++ * Requests Histrogram statistics ++ */ ++int isp_hist_request_statistics(struct isp_hist_data *histdata); ++ ++/* ++ * Saves hist context ++ */ ++void isphist_save_context(void); ++ ++/* ++ * Restores hist context ++ */ ++void isphist_restore_context(void); ++#else ++#define isp_hist_configure(x) -EFAULT ++#define isp_hist_request_statistics(x) -EFAULT ++#define isphist_save_context() ++#define isphist_restore_context() ++#endif ++ ++#endif /* OMAP_ISP_HIST */ +Index: git/drivers/media/video/isp/ispmmu.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ git/drivers/media/video/isp/ispmmu.c 2009-02-12 11:41:19.000000000 -0600 +@@ -0,0 +1,792 @@ ++/* ++ * drivers/media/video/isp/ispmmu.c ++ * ++ * Driver Library for ISP MMU module in TI's OMAP3430 Camera ISP ++ * ++ * Copyright (C) 2008 Texas Instruments, Inc. ++ * ++ * This package is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ * ++ * THIS PACKAGE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR ++ * IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED ++ * WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE. ++ * ++ */ ++ ++#include <linux/init.h> ++#include <linux/module.h> ++#include <linux/moduleparam.h> ++#include <linux/delay.h> ++#include <linux/errno.h> ++#include <linux/kernel.h> ++#include <linux/sched.h> ++#include <linux/interrupt.h> ++#include <linux/types.h> ++#include <linux/dma-mapping.h> ++#include <linux/mm.h> ++ ++#include <asm/io.h> ++#include <asm/byteorder.h> ++#include <asm/scatterlist.h> ++#include <asm/irq.h> ++ ++ ++#include "isp.h" ++#include "ispreg.h" ++#include "ispmmu.h" ++ ++ ++#define ISPMMU_L1D_TYPE_SHIFT 0 ++#define ISPMMU_L1D_TYPE_MASK 0x3 ++#define ISPMMU_L1D_TYPE_FAULT 0 ++#define ISPMMU_L1D_TYPE_FAULT1 3 ++#define ISPMMU_L1D_TYPE_PAGE 1 ++#define ISPMMU_L1D_TYPE_SECTION 2 ++#define ISPMMU_L1D_PAGE_ADDR_SHIFT 10 ++ ++#define ISPMMU_L2D_TYPE_SHIFT 0 ++#define ISPMMU_L2D_TYPE_MASK 0x3 ++#define ISPMMU_L2D_TYPE_FAULT 0 ++#define ISPMMU_L2D_TYPE_LARGE_PAGE 1 ++#define ISPMMU_L2D_TYPE_SMALL_PAGE 2 ++#define ISPMMU_L2D_SMALL_ADDR_SHIFT 12 ++#define ISPMMU_L2D_SMALL_ADDR_MASK 0xFFFFF000 ++#define ISPMMU_L2D_M_ACCESSBASED (1 << 11) ++#define ISPMMU_L2D_E_BIGENDIAN (1 << 9) ++#define ISPMMU_L2D_ES_SHIFT 4 ++#define ISPMMU_L2D_ES_MASK ~(3 << 4) ++#define ISPMMU_L2D_ES_8BIT 0 ++#define ISPMMU_L2D_ES_16BIT 1 ++#define ISPMMU_L2D_ES_32BIT 2 ++#define ISPMMU_L2D_ES_NOENCONV 3 ++ ++#define ISPMMU_TTB_ENTRIES_NR 4096 ++ ++/* Number 1MB entries in TTB in one 32MB region */ ++#define ISPMMU_REGION_ENTRIES_NR 32 ++ ++/* 128 region entries */ ++#define ISPMMU_REGION_NR \ ++ (ISPMMU_TTB_ENTRIES_NR / ISPMMU_REGION_ENTRIES_NR) ++ ++/* Each region is 32MB */ ++#define ISPMMU_REGION_SIZE (ISPMMU_REGION_ENTRIES_NR * (1 << 20)) ++ ++/* Number of entries per L2 Page table */ ++#define ISPMMU_L2D_ENTRIES_NR 256 ++ ++/* ++ * Statically allocate 16KB for L2 page tables. 16KB can be used for ++ * up to 16 L2 page tables which cover up to 16MB space. We use an array of 16 ++ * to keep track of these 16 L2 page table's status. ++ */ ++#define L2P_TABLE_SIZE 1024 ++#define L2P_TABLE_NR 41 /* Currently supports 4*5MP shots */ ++#define L2P_TABLES_SIZE (L2P_TABLE_SIZE * L2P_TABLE_NR) ++ ++/* Extra memory allocated to get ttb aligned on 16KB */ ++#define ISPMMU_TTB_MISALIGN_SIZE 0x3000 ++ ++/* Page structure for statically allocated l1 and l2 page tables */ ++static struct page *ttb_page; ++static struct page *l2p_page; ++ ++/* ++* Allocate the same number as of TTB entries for easy tracking ++* even though L2P tables are limited to 16 or so ++*/ ++static u32 l2p_table_addr[4096]; ++ ++/* An array of flags to keep the L2P table allotted */ ++static int l2p_table_allotted[L2P_TABLE_NR]; ++ ++/* TTB virtual and physical address */ ++static u32 *ttb, ttb_p; ++ ++/* Worst case allocation for TTB for 16KB alignment */ ++static u32 ttb_aligned_size; ++ ++/* L2 page table base virtural and physical address */ ++static u32 l2_page_cache, l2_page_cache_p; ++ ++/* Structure for Mapping Attributes in the L1, L2 descriptor*/ ++struct ispmmu_mapattr{ ++ enum ISPMMU_MAP_ENDIAN endianism; ++ enum ISPMMU_MAP_ELEMENTSIZE element_size; ++ enum ISPMMU_MAP_MIXEDREGION mixed_size; ++ enum ISPMMU_MAP_SIZE map_size; ++}; ++ ++static struct ispmmu_mapattr l1_mapattr_obj, l2_mapattr_obj; ++ ++/* Structure for saving/restoring mmu module registers*/ ++static struct isp_reg ispmmu_reg_list[] = { ++ {ISPMMU_SYSCONFIG, 0x0000}, ++ {ISPMMU_IRQENABLE, 0x0000}, ++ {ISPMMU_CNTL, 0x0000}, ++ {ISPMMU_TTB, 0x0000}, ++ {ISPMMU_LOCK, 0x0000}, ++ {ISPMMU_LD_TLB, 0x0000}, ++ {ISPMMU_CAM, 0x0000}, ++ {ISPMMU_RAM, 0x0000}, ++ {ISPMMU_GFLUSH, 0x0000}, ++ {ISPMMU_FLUSH_ENTRY, 0x0000}, ++ {ISP_TOK_TERM, 0x0000} ++}; ++ ++/* ++ * Sets the L1,L2 descriptor with section/supersection/Largepage/Smallpage ++ * base address or with L2 Page table address depending on the size parameter. ++ * Returns the written L1/L2 descriptor. ++ * pte_addr : Pointer to the Indexed address in the L1 Page table ie TTB. ++ * phy_addr : Section/Supersection/L2page table physical address. ++ * mapattr : Mapping attributes applicable for Section/Supersections. ++ */ ++static u32 ispmmu_set_pte(u32 *pte_addr, u32 phy_addr, ++ struct ispmmu_mapattr mapattr) ++{ ++ u32 pte = 0; ++ ++ switch (mapattr.map_size) { ++ case PAGE : ++ pte = ISPMMU_L1D_TYPE_PAGE << ISPMMU_L1D_TYPE_SHIFT; ++ pte |= (phy_addr >> ISPMMU_L1D_PAGE_ADDR_SHIFT) ++ << ISPMMU_L1D_PAGE_ADDR_SHIFT; ++ break; ++ case SMALLPAGE: ++ pte = ISPMMU_L2D_TYPE_SMALL_PAGE << ++ ISPMMU_L2D_TYPE_SHIFT; ++ pte &= ~ISPMMU_L2D_M_ACCESSBASED; ++ if (mapattr.endianism) ++ pte |= ISPMMU_L2D_E_BIGENDIAN ; ++ else ++ pte &= ~ISPMMU_L2D_E_BIGENDIAN ; ++ pte &= ISPMMU_L2D_ES_MASK; ++ pte |= mapattr.element_size << ISPMMU_L2D_ES_SHIFT; ++ pte |= (phy_addr >> ISPMMU_L2D_SMALL_ADDR_SHIFT) ++ << ISPMMU_L2D_SMALL_ADDR_SHIFT; ++ break; ++ case L1DFAULT: ++ pte = ISPMMU_L1D_TYPE_FAULT << ISPMMU_L1D_TYPE_SHIFT; ++ break; ++ case L2DFAULT: ++ pte = ISPMMU_L2D_TYPE_FAULT << ISPMMU_L2D_TYPE_SHIFT; ++ break; ++ default: ++ break; ++ }; ++ ++ *pte_addr = pte; ++ return pte; ++} ++ ++/* ++ * Returns the index in the ttb for a free 32MB region ++ * Returns 0 as an error code, if run out of regions. ++ */ ++static u32 find_free_region_index(void) ++{ ++ int idx = 0; ++ /* Find the first free 32M region in ttb. */ ++ /* skip region 0 to avoid NULL pointer */ ++ for (idx = ISPMMU_REGION_ENTRIES_NR; idx < ISPMMU_TTB_ENTRIES_NR; ++ idx += ISPMMU_REGION_ENTRIES_NR){ ++ if (((*(ttb + idx)) & ISPMMU_L1D_TYPE_MASK) == ++ (ISPMMU_L1D_TYPE_FAULT << ISPMMU_L1D_TYPE_SHIFT)) ++ break; ++ } ++ if (idx == ISPMMU_TTB_ENTRIES_NR) { ++ DPRINTK_ISPMMU("run out of virtual space\n"); ++ return 0; ++ } ++ return idx; ++} ++ ++/* ++ * Returns the Page aligned address ++ * addr :Address to be page aligned ++ */ ++static inline u32 page_aligned_addr(u32 addr) ++{ ++ u32 paddress; ++ paddress = addr & ~(PAGE_SIZE-1) ; ++ return paddress; ++} ++ ++ ++/* ++ * Returns the physical address of the allocated L2 page Table. ++ * l2_table : Virtual address of the allocated l2 table. ++ */ ++static inline u32 l2_page_paddr(u32 l2_table) ++{ ++ return (l2_page_cache_p + (l2_table - l2_page_cache)); ++} ++ ++/* ++ * Allocates contigous memory for L2 page tables. ++ */ ++static int init_l2_page_cache(void) ++{ ++ int i; ++ u32 *l2p; ++ ++ l2p_page = alloc_pages(GFP_KERNEL, get_order(L2P_TABLES_SIZE)); ++ if (!l2p_page) { ++ DPRINTK_ISPMMU("ISP_ERR : No Memory for L2 page tables\n"); ++ return -ENOMEM; ++ } ++ l2p = page_address(l2p_page); ++ l2_page_cache = (u32)l2p; ++ l2_page_cache_p = __pa(l2p); ++ l2_page_cache = (u32)ioremap_nocache(l2_page_cache_p, L2P_TABLES_SIZE); ++ ++ for (i = 0; i < L2P_TABLE_NR; i++) ++ l2p_table_allotted[i] = 0; ++ ++ DPRINTK_ISPMMU("Mem for L2 page tables at l2_paddr = %x, \ ++ l2_vaddr = 0x%x, of bytes = 0x%x\n", ++ l2_page_cache_p, l2_page_cache, L2P_TABLES_SIZE); ++ /*HW Errata 1.40. Camera ISP: MMU endianess polarity inverted */ ++/// if (is_sil_rev_less_than(OMAP3430_REV_ES2_0)) ++/// l2_mapattr_obj.endianism = B_ENDIAN; ++/// else ++ l2_mapattr_obj.endianism = L_ENDIAN; ++ l2_mapattr_obj.element_size = ES_8BIT; ++ l2_mapattr_obj.mixed_size = ACCESS_BASED; ++ l2_mapattr_obj.map_size = L2DFAULT; ++ return 0; ++} ++ ++/* ++ * Frees the memory of L2 page tables. ++ */ ++static void cleanup_l2_page_cache(void) ++{ ++ if (l2p_page) { ++ ioremap_cached(l2_page_cache_p, L2P_TABLES_SIZE); ++ __free_pages(l2p_page, get_order(L2P_TABLES_SIZE)); ++ } ++} ++ ++/* ++ * Finds the free L2 Page table slot. ++ * Fills the allotted L2 Page table with default entries. ++ * Returns the virtual address of the allotted L2 Pagetable, ++ */ ++static u32 request_l2_page_table(void) ++{ ++ int i, j; ++ u32 l2_table; ++ ++ for (i = 0; i < L2P_TABLE_NR; i++) { ++ if (!l2p_table_allotted[i]) ++ break; ++ } ++ if (i < L2P_TABLE_NR) { ++ l2p_table_allotted[i] = 1; ++ l2_table = l2_page_cache + (i * L2P_TABLE_SIZE); ++ l2_mapattr_obj.map_size = L2DFAULT; ++ /*Fill up all the entries with fault */ ++ for (j = 0; j < ISPMMU_L2D_ENTRIES_NR; j++) ++ ispmmu_set_pte((u32 *)l2_table+j, 0, l2_mapattr_obj); ++ DPRINTK_ISPMMU("Allotted l2 page table at 0x%x\n", ++ (u32)l2_table); ++ return l2_table; ++ } else { ++ DPRINTK_ISPMMU("ISP_ERR : Cannot allocate more than 16 L2\ ++ Page Tables"); ++ return 0; ++ } ++} ++ ++/* ++ * Frees the allotted L2 Page table slot. ++ */ ++static int free_l2_page_table(u32 l2_table) ++{ ++ int i; ++ ++ DPRINTK_ISPMMU("Free l2 page table at 0x%x\n", l2_table); ++ for (i = 0; i < L2P_TABLE_NR; i++) ++ if (l2_table == (l2_page_cache + (i * L2P_TABLE_SIZE))) { ++ if (!l2p_table_allotted[i]) { ++ DPRINTK_ISPMMU("L2 page not in use\n"); ++ } ++ l2p_table_allotted[i] = 0; ++ return 0; ++ } ++ DPRINTK_ISPMMU("L2 table not found\n"); ++ return -EINVAL; ++} ++ ++/* ++ * Map a physically contiguous buffer to ISP space. This call is used to ++ * map a frame buffer ++ * p_addr : Physical address of the contigous mem to be mapped. ++ * size : Size of the contigous mem to be mapped. ++ */ ++dma_addr_t ispmmu_map(u32 p_addr, int size) ++{ ++ int i, j, idx, num; ++ u32 sz, first_padding; ++ u32 p_addr_align, p_addr_align_end; ++ u32 pd; ++ u32 *l2_table; ++ ++ DPRINTK_ISPMMU("map: p_addr = 0x%x, size = 0x%x\n", p_addr, size); ++ ++ p_addr_align = page_aligned_addr(p_addr); ++ ++ first_padding = p_addr - p_addr_align; ++ ++ if (first_padding > size) ++ sz = 0; ++ else ++ sz = size - first_padding; ++ ++ num = (sz/PAGE_SIZE) + ((sz%PAGE_SIZE)?1:0) + (first_padding ?1:0); ++ p_addr_align_end = p_addr_align + num*PAGE_SIZE; ++ ++ DPRINTK_ISPMMU("buffer at 0x%x of size 0x%x spans to %d pages\n", ++ p_addr, size, num); ++ ++ idx = find_free_region_index(); ++ if (!idx) { ++ DPRINTK_ISPMMU("Runs out of virtual space"); ++ return -EINVAL; ++ } ++ DPRINTK_ISPMMU("allocating region %d\n", idx/ISPMMU_REGION_ENTRIES_NR); ++ ++ /* how many second-level page tables we need */ ++ num = num/ISPMMU_L2D_ENTRIES_NR + ++ ((num%ISPMMU_L2D_ENTRIES_NR)?1:0); ++ DPRINTK_ISPMMU("need %d second-level page tables (1KB each)\n", num); ++ ++ /* create second-level page tables */ ++ for (i = 0; i < num; i++) { ++ l2_table = (u32 *)request_l2_page_table(); ++ if (!l2_table) { ++ DPRINTK_ISPMMU("no memory\n"); ++ i--; ++ goto release_mem; ++ } ++ ++ /* Make the first level page descriptor */ ++ l1_mapattr_obj.map_size = PAGE; ++ pd = ispmmu_set_pte(ttb+idx+i, l2_page_paddr((u32)l2_table), ++ l1_mapattr_obj); ++ DPRINTK_ISPMMU("L1 pte[%d] = 0x%x\n", idx+i, pd); ++ ++ /* Make the second Level page descriptors */ ++ l2_mapattr_obj.map_size = SMALLPAGE; ++ for (j = 0; j < ISPMMU_L2D_ENTRIES_NR; j++) { ++ pd = ispmmu_set_pte(l2_table + j, p_addr_align, ++ l2_mapattr_obj); ++ /* DPRINTK_ISPMMU("L2 pte[%d] = 0x%x\n", j, pd); */ ++ /*Contigous memory, just increment with Page size */ ++ p_addr_align += PAGE_SIZE; ++ if (p_addr_align == p_addr_align_end) ++ break; ++ } ++ /* save it so we can free this l2 table later */ ++ l2p_table_addr[idx + i] = (u32)l2_table; ++ } ++ ++ DPRINTK_ISPMMU("mapped to ISP virtual address 0x%x\n", ++ (u32)((idx << 20) + (p_addr & (PAGE_SIZE - 1)))); ++ ++ omap_writel(1, ISPMMU_GFLUSH); ++ return (dma_addr_t)((idx<<20) + (p_addr & (PAGE_SIZE - 1))); ++ ++release_mem: ++ for (; i >= 0; i--) { ++ free_l2_page_table(l2p_table_addr[idx + i]); ++ l2p_table_addr[idx + i] = 0; ++ } ++ return 0; ++} ++EXPORT_SYMBOL_GPL(ispmmu_map); ++ ++/* ++ * Map a physically discontiguous buffer to ISP space. This call is used to ++ * map a user buffer or a vmalloc buffer. The sg list is a set of pages. ++ * sg_list : Address of the Scatter gather linked list. ++ * sglen : Number of elements in the sg list. ++ */ ++dma_addr_t ispmmu_map_sg(const struct scatterlist *sglist, int sglen) ++{ ++ int i, j, idx, num, sg_num = 0; ++ u32 pd, sg_element_addr; ++ u32 *l2_table; ++ ++ DPRINTK_ISPMMU("Map_sg: sglen (num of pages) = %d\n", sglen); ++ ++ idx = find_free_region_index(); ++ if (!idx) { ++ DPRINTK_ISPMMU("Runs out of virtual space"); ++ return -EINVAL; ++ } ++ ++ DPRINTK_ISPMMU("allocating region %d\n", idx/ISPMMU_REGION_ENTRIES_NR); ++ ++ /* How many second-level page tables we need */ ++ /* ++ * Size of each sglist element does not exceed a page size ++ * so consider the number of elements in the list for calcuating ++ * number of L2P tables ++ */ ++ num = sglen/ISPMMU_L2D_ENTRIES_NR + ++ ((sglen%ISPMMU_L2D_ENTRIES_NR)?1:0); ++ DPRINTK_ISPMMU("Need %d second-level page tables (1KB each)\n", num); ++ ++ /* create second-level page tables */ ++ for (i = 0; i < num; i++) { ++ l2_table = (u32 *)request_l2_page_table(); ++ if (!l2_table) { ++ DPRINTK_ISPMMU("No memory\n"); ++ i--; ++ goto release_mem; ++ } ++ /* Make the first level page descriptor */ ++ l1_mapattr_obj.map_size = PAGE; ++ pd = ispmmu_set_pte(ttb+idx+i, l2_page_paddr((u32)l2_table), ++ l1_mapattr_obj); ++ DPRINTK_ISPMMU("L1 pte[%d] = 0x%x\n", idx+i, pd); ++ ++ /* Make the second Level page descriptors */ ++ l2_mapattr_obj.map_size = SMALLPAGE; ++ for (j = 0; j < ISPMMU_L2D_ENTRIES_NR; j++) { ++ /* ++ * Assuming that sglist elements are always page ++ * aligned ++ */ ++ sg_element_addr = sg_dma_address(sglist + sg_num); ++ if ((sg_num > 0) && page_aligned_addr(sg_element_addr) ++ != sg_element_addr) ++ DPRINTK_ISPMMU("ISP_ERR : Intermediate SG" ++ " elements are not" ++ " page aligned = 0x%x\n", ++ sg_element_addr); ++ pd = ispmmu_set_pte(l2_table + j, sg_element_addr, ++ l2_mapattr_obj); ++ ++ /* DPRINTK_ISPMMU("L2 pte[%d] = 0x%x\n", j, pd); */ ++ ++ sg_num++; ++ if (sg_num == sglen) ++ break; ++ } ++ /* save it so we can free this l2 table later */ ++ l2p_table_addr[idx + i] = (u32)l2_table; ++ } ++ ++ DPRINTK_ISPMMU("mapped sg list to ISP virtual address 0x%x, idx=%d\n", ++ (u32)((idx << 20) + (sg_dma_address(sglist + 0) & ++ (PAGE_SIZE - 1))), idx); ++ ++ omap_writel(1, ISPMMU_GFLUSH); ++ return (dma_addr_t)((idx << 20) + (sg_dma_address(sglist + 0) & ++ (PAGE_SIZE - 1))); ++ ++release_mem: ++ for (; i >= 0; i--) { ++ free_l2_page_table(l2p_table_addr[idx + i]); ++ l2p_table_addr[idx + i] = 0; ++ } ++ return 0; ++} ++EXPORT_SYMBOL_GPL(ispmmu_map_sg); ++ ++/* ++ * Unmap a ISP space that is mapped before via ispmmu_map and ++ * ispmmu_map_sg. ++ * v_addr : Virtural address to be unmapped ++ */ ++int ispmmu_unmap(dma_addr_t v_addr) ++{ ++ u32 v_addr_align; ++ int idx; ++ ++ DPRINTK_ISPMMU("+ispmmu_unmap: 0x%x\n", v_addr); ++ ++ v_addr_align = page_aligned_addr(v_addr); ++ idx = v_addr_align >> 20; ++ if ((idx < ISPMMU_REGION_ENTRIES_NR) || ++ (idx > (ISPMMU_REGION_ENTRIES_NR * (ISPMMU_REGION_NR - 1))) ++ || ((idx << 20) != v_addr_align) ++ || (idx%ISPMMU_REGION_ENTRIES_NR)) { ++ DPRINTK_ISPMMU("Cannot unmap a non region-aligned space \ ++ 0x%x\n", v_addr); ++ return -EINVAL; ++ } ++ ++ if (((*(ttb + idx)) & (ISPMMU_L1D_TYPE_MASK << ++ ISPMMU_L1D_TYPE_SHIFT)) != ++ (ISPMMU_L1D_TYPE_PAGE << ++ ISPMMU_L1D_TYPE_SHIFT)) { ++ DPRINTK_ISPMMU("unmap a wrong region\n"); ++ return -EINVAL; ++ } ++ ++ /* free the associated level-2 page tables */ ++ while (((*(ttb + idx)) & (ISPMMU_L1D_TYPE_MASK << ++ ISPMMU_L1D_TYPE_SHIFT)) == ++ (ISPMMU_L1D_TYPE_PAGE << ++ ISPMMU_L1D_TYPE_SHIFT)) { ++ *(ttb + idx) = (ISPMMU_L1D_TYPE_FAULT << ++ ISPMMU_L1D_TYPE_SHIFT); ++ free_l2_page_table(l2p_table_addr[idx]); ++ l2p_table_addr[idx++] = 0; ++ if (!(idx%ISPMMU_REGION_ENTRIES_NR)) { ++ DPRINTK_ISPMMU("Do not exceed this 32M region\n"); ++ break; ++ } ++ } ++ omap_writel(1, ISPMMU_GFLUSH); ++ ++ DPRINTK_ISPMMU("-ispmmu_unmap()\n"); ++ return 0; ++} ++EXPORT_SYMBOL_GPL(ispmmu_unmap); ++ ++/* ++ * Callback from ISP driver for MMU interrupt ++ * status : IRQ status of ISPMMU ++ * arg1 : Not used as of now. ++ * arg2 : Not used as of now. ++ */ ++static void ispmmu_isr(unsigned long status, isp_vbq_callback_ptr arg1, ++ void *arg2) ++{ ++ u32 irqstatus; ++ ++ irqstatus = omap_readl(ISPMMU_IRQSTATUS); ++ DPRINTK_ISPMMU("mmu error 0x%lx, 0x%x\n", status, irqstatus); ++ ++ if (irqstatus & IRQENABLE_TLBMISS) ++ DPRINTK_ISPMMU("ISP_ERR: TLB Miss\n"); ++ if (irqstatus & IRQENABLE_TRANSLNFAULT) ++ DPRINTK_ISPMMU("ISP_ERR: Invalid descriptor in the " ++ "translation table - Translation Fault\n"); ++ if (irqstatus & IRQENABLE_EMUMISS) ++ DPRINTK_ISPMMU("ISP_ERR: TLB Miss during debug - " ++ "Emulation mode\n"); ++ if (irqstatus & IRQENABLE_TWFAULT) ++ DPRINTK_ISPMMU("ISP_ERR: Table Walk Fault\n"); ++ if (irqstatus & IRQENABLE_MULTIHITFAULT) ++ DPRINTK_ISPMMU("ISP_ERR: Multiple Matches in the TLB\n"); ++ ++ DPRINTK_ISPMMU("Fault address for the ISPMMU is 0x%x\n", ++ omap_readl(ISPMMU_FAULT_AD)); ++ /* ++ * TODO: Indicate the camera driver about the fault and it should ++ * stop using the ISP ++ */ ++ omap_writel(irqstatus, ISPMMU_IRQSTATUS); ++} ++ ++/* ++ * Reserves memory for L1 and L2 Page tables. ++ * Initializes the ISPMMU with TTB address, fault entries as default in the ++ * TTB table. ++ * Enables MMU and TWL. ++ * Sets the callback for the MMU error events. ++ */ ++static int __init ispmmu_init(void) ++{ ++ int i, val = 5; ++ struct isp_sysc isp_sysconfig; ++ ++ isp_get(); ++ ++ /* reset */ ++ omap_writel(0x2, ISPMMU_SYSCONFIG); ++ while (((omap_readl(ISPMMU_SYSSTATUS) & 0x1) != 0x1) && val--) ++ udelay(10); ++ ++ if ((omap_readl(ISPMMU_SYSSTATUS) & 0x1) != 0x1) { ++ DPRINTK_ISPMMU("can't take ISP MMU out of reset\n"); ++ isp_put(); ++ return -ENODEV; ++ } ++ ++ isp_sysconfig.reset = 0; ++ isp_sysconfig.idle_mode = 1; ++ isp_power_settings(isp_sysconfig); ++ ++ ttb_page = alloc_pages(GFP_KERNEL, ++ get_order(ISPMMU_TTB_ENTRIES_NR * 4)); ++ if (!ttb_page) { ++ DPRINTK_ISPMMU("No Memory for TTB\n"); ++ isp_put(); ++ return -ENOMEM; ++ } ++ ++ ttb = page_address(ttb_page); ++ ttb_p = __pa(ttb); ++ ttb_aligned_size = ISPMMU_TTB_ENTRIES_NR * 4; ++ ttb = ioremap_nocache(ttb_p, ttb_aligned_size); ++ if ((ttb_p & 0xFFFFC000) != ttb_p) { ++ DPRINTK_ISPMMU("ISP_ERR : TTB address not aligned at 16KB\n"); ++ __free_pages(ttb_page, get_order(ISPMMU_TTB_ENTRIES_NR * 4)); ++ ttb_aligned_size = (ISPMMU_TTB_ENTRIES_NR * 4) ++ + (ISPMMU_TTB_MISALIGN_SIZE); ++ ttb_page = alloc_pages(GFP_KERNEL, ++ get_order(ttb_aligned_size)); ++ if (!ttb_page) { ++ DPRINTK_ISPMMU("No Memory for TTB\n"); ++ isp_put(); ++ return -ENOMEM; ++ } ++ ttb = page_address(ttb_page); ++ ttb_p = __pa(ttb); ++ ttb = ioremap_nocache(ttb_p, ttb_aligned_size); ++ if ((ttb_p & 0xFFFFC000) != ttb_p) { ++ /* ++ * Move the unaligned address to the next 16KB ++ * alignment ++ */ ++ ttb = (u32 *)(((u32)ttb & 0xFFFFC000) + 0x4000); ++ ttb_p = __pa(ttb); ++ } ++ } ++ ++ DPRINTK_ISPMMU("TTB allocated at p = 0x%x, v = 0x%x, size = 0x%x\n", ++ ttb_p, (u32)ttb, ttb_aligned_size); ++ /*HW Errata 1.40. Camera ISP: MMU endianess polarity inverted */ ++/// if (is_sil_rev_less_than(OMAP3430_REV_ES2_0)) ++/// l1_mapattr_obj.endianism = B_ENDIAN; ++/// else ++ l1_mapattr_obj.endianism = L_ENDIAN; ++ ++ l1_mapattr_obj.element_size = ES_8BIT; ++ l1_mapattr_obj.mixed_size = ACCESS_BASED; ++ l1_mapattr_obj.map_size = L1DFAULT; ++ ++ val = init_l2_page_cache(); ++ if (val) { ++ DPRINTK_ISPMMU("ISP_ERR : init l2 page cache\n"); ++ ttb = page_address(ttb_page); ++ ttb_p = __pa(ttb); ++ ioremap_cached(ttb_p, ttb_aligned_size); ++ __free_pages(ttb_page, get_order(ttb_aligned_size)); ++ ++ isp_put(); ++ return val; ++ } ++ ++ /* Setting all the entries to generate fault by default */ ++ for (i = 0; i < ISPMMU_TTB_ENTRIES_NR; i++) ++ ispmmu_set_pte(ttb + i, 0, l1_mapattr_obj); ++ /* ++ * TTB 31:7 is the address, since TTB is on 16KB boundary the last ++ * 14 bits are 0 ++ */ ++ omap_writel(ttb_p, ISPMMU_TTB); ++ ++ /* Enable MMU with table walking logic */ ++ omap_writel((ISPMMU_MMUCNTL_MMU_EN|ISPMMU_MMUCNTL_TWL_EN), ++ ISPMMU_CNTL); ++ omap_writel(omap_readl(ISPMMU_IRQSTATUS), ISPMMU_IRQSTATUS); ++ omap_writel(0xf, ISPMMU_IRQENABLE); ++ ++ isp_set_callback(CBK_MMU_ERR, ispmmu_isr, (void *)NULL, (void *)NULL); ++ ++ val = omap_readl(ISPMMU_REVISION); ++ DPRINTK_ISPMMU("ISP MMU Rev %c.%c initialized\n", ++ (val>>ISPMMU_REVISION_REV_MAJOR_SHIFT)+'0', ++ (val & ISPMMU_REVISION_REV_MINOR_MASK)+'0'); ++ /* Release the clocks now */ ++ isp_put(); ++ return 0; ++} ++ ++/* ++ * Frees the L1 and L2 Page tables. ++ * Unsets the callback for MMU ++ */ ++static void ispmmu_cleanup(void) ++{ ++ /* free ttb */ ++ ttb = page_address(ttb_page); ++ ttb_p = __pa(ttb); ++ ioremap_cached(ttb_p, ttb_aligned_size); ++ __free_pages(ttb_page, get_order(ttb_aligned_size)); ++ ++ isp_unset_callback(CBK_MMU_ERR); ++ ++ cleanup_l2_page_cache(); ++ ++ return; ++} ++ ++/* ++ * Saves the values of the mmu module registers. ++ */ ++void ispmmu_save_context(void) ++{ ++ DPRINTK_ISPMMU(" Saving context\n"); ++ isp_save_context(ispmmu_reg_list); ++} ++EXPORT_SYMBOL_GPL(ispmmu_save_context); ++ ++/* ++ * Restores the values of the mmu module registers. ++ */ ++void ispmmu_restore_context(void) ++{ ++ DPRINTK_ISPMMU(" Restoring context\n"); ++ isp_restore_context(ispmmu_reg_list); ++} ++EXPORT_SYMBOL_GPL(ispmmu_restore_context); ++ ++/* ++ * Prints the values of the ISPMMU registers ++ * Also prints other debug information stored ++ */ ++void ispmmu_print_status(void) ++{ ++#ifdef OMAP_ISPMMU_DEBUG ++ DPRINTK_ISPMMU("TTB v_addr = 0x%x, p_addr = 0x%x\n", (u32)ttb, ttb_p); ++ DPRINTK_ISPMMU("L2P base v_addr = 0x%x, p_addr = 0x%x\n" ++ , l2_page_cache, l2_page_cache_p); ++ DPRINTK_ISPMMU("ISPMMU_REVISION = 0x%x\n", ++ omap_readl(ISPMMU_REVISION)); ++ DPRINTK_ISPMMU("ISPMMU_SYSCONFIG = 0x%x\n", ++ omap_readl(ISPMMU_SYSCONFIG)); ++ DPRINTK_ISPMMU("ISPMMU_SYSSTATUS = 0x%x\n", ++ omap_readl(ISPMMU_SYSSTATUS)); ++ DPRINTK_ISPMMU("ISPMMU_IRQSTATUS = 0x%x\n", ++ omap_readl(ISPMMU_IRQSTATUS)); ++ DPRINTK_ISPMMU("ISPMMU_IRQENABLE = 0x%x\n", ++ omap_readl(ISPMMU_IRQENABLE)); ++ DPRINTK_ISPMMU("ISPMMU_WALKING_ST = 0x%x\n", ++ omap_readl(ISPMMU_WALKING_ST)); ++ DPRINTK_ISPMMU("ISPMMU_CNTL = 0x%x\n", omap_readl(ISPMMU_CNTL)); ++ DPRINTK_ISPMMU("ISPMMU_FAULT_AD = 0x%x\n", ++ omap_readl(ISPMMU_FAULT_AD)); ++ DPRINTK_ISPMMU("ISPMMU_TTB = 0x%x\n", omap_readl(ISPMMU_TTB)); ++ DPRINTK_ISPMMU("ISPMMU_LOCK = 0x%x\n", omap_readl(ISPMMU_LOCK)); ++ DPRINTK_ISPMMU("ISPMMU_LD_TLB= 0x%x\n", omap_readl(ISPMMU_LD_TLB)); ++ DPRINTK_ISPMMU("ISPMMU_CAM = 0x%x\n", omap_readl(ISPMMU_CAM)); ++ DPRINTK_ISPMMU("ISPMMU_RAM = 0x%x\n", omap_readl(ISPMMU_RAM)); ++ DPRINTK_ISPMMU("ISPMMU_GFLUSH = 0x%x\n", omap_readl(ISPMMU_GFLUSH)); ++ DPRINTK_ISPMMU("ISPMMU_FLUSH_ENTRY = 0x%x\n", ++ omap_readl(ISPMMU_FLUSH_ENTRY)); ++ DPRINTK_ISPMMU("ISPMMU_READ_CAM = 0x%x\n", ++ omap_readl(ISPMMU_READ_CAM)); ++ DPRINTK_ISPMMU("ISPMMU_READ_RAM = 0x%x\n", ++ omap_readl(ISPMMU_READ_RAM)); ++#endif ++} ++EXPORT_SYMBOL_GPL(ispmmu_print_status); ++ ++MODULE_AUTHOR("Texas Instruments."); ++MODULE_DESCRIPTION("OMAP3430 ISP MMU Driver"); ++MODULE_LICENSE("GPL"); ++ ++module_init(ispmmu_init); ++module_exit(ispmmu_cleanup); +Index: git/drivers/media/video/isp/ispmmu.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ git/drivers/media/video/isp/ispmmu.h 2009-02-12 10:29:26.000000000 -0600 +@@ -0,0 +1,57 @@ ++/* ++ * drivers/media/video/isp/ispmmu.h ++ * ++ * OMAP3430 Camera ISP MMU API ++ * ++ * Copyright (C) 2008 Texas Instruments. ++ * ++ * This package is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ * ++ * THIS PACKAGE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR ++ * IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED ++ * WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE. ++ */ ++ ++#ifndef OMAP_ISP_MMU_H ++#define OMAP_ISP_MMU_H ++ ++#ifdef CONFIG_ARCH_OMAP3410 ++#include <asm/scatterlist.h> ++#endif ++ ++dma_addr_t ispmmu_map(unsigned int p_addr, int size); ++ ++/* ++* To be called from camera driver with scatter gather list ++*/ ++dma_addr_t ispmmu_map_sg(const struct scatterlist *sglist, int sglen); ++int ispmmu_unmap(dma_addr_t isp_addr); ++ ++void ispmmu_print_status(void); ++ ++enum ++ISPMMU_MAP_ENDIAN{L_ENDIAN, B_ENDIAN}; ++ ++enum ++ISPMMU_MAP_ELEMENTSIZE{ES_8BIT, ES_16BIT, ES_32BIT, ES_NOENCONV}; ++ ++enum ++ISPMMU_MAP_MIXEDREGION{ACCESS_BASED, PAGE_BASED}; ++ ++enum ++ISPMMU_MAP_SIZE{L1DFAULT, PAGE, SECTION, SUPERSECTION, L2DFAULT, ++ LARGEPAGE, SMALLPAGE}; ++ ++/* ++ * Saves mmu context ++ */ ++void ispmmu_save_context(void); ++ ++/* ++ * Restores mmu context ++ */ ++void ispmmu_restore_context(void); ++ ++#endif /* OMAP_ISP_MMU_H */ +Index: git/drivers/media/video/isp/isppreview.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ git/drivers/media/video/isp/isppreview.c 2009-02-12 10:29:18.000000000 -0600 +@@ -0,0 +1,1894 @@ ++/* ++ * drivers/media/video/isp/isppreview.c ++ * ++ * Driver Library for Preview module in TI's OMAP3430 Camera ISP ++ * ++ * Copyright (C) 2008 Texas Instruments, Inc. ++ * ++ * This package is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ * ++ * THIS PACKAGE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR ++ * IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED ++ * WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE. ++ */ ++ ++#include <linux/mutex.h> ++#include <linux/module.h> ++#include <linux/errno.h> ++#include <linux/types.h> ++#include <asm/io.h> ++ ++#include "isp.h" ++#include "ispreg.h" ++#include "isppreview.h" ++#include <asm/uaccess.h> ++ ++static struct ispprev_nf prev_nf_t; ++static int RG_update, GG_update, BG_update, NF_enable, NF_update; ++ ++/* Structure for saving/restoring preview module registers*/ ++static struct isp_reg ispprev_reg_list[] = { ++ {ISPPRV_HORZ_INFO, 0x0000}, ++ {ISPPRV_VERT_INFO, 0x0000}, ++ {ISPPRV_RSDR_ADDR, 0x0000}, ++ {ISPPRV_RADR_OFFSET, 0x0000}, ++ {ISPPRV_DSDR_ADDR, 0x0000}, ++ {ISPPRV_DRKF_OFFSET, 0x0000}, ++ {ISPPRV_WSDR_ADDR, 0x0000}, ++ {ISPPRV_WADD_OFFSET, 0x0000}, ++ {ISPPRV_AVE, 0x0000}, ++ {ISPPRV_HMED, 0x0000}, ++ {ISPPRV_NF, 0x0000}, ++ {ISPPRV_WB_DGAIN, 0x0000}, ++ {ISPPRV_WBGAIN, 0x0000}, ++ {ISPPRV_WBSEL, 0x0000}, ++ {ISPPRV_CFA, 0x0000}, ++ {ISPPRV_BLKADJOFF, 0x0000}, ++ {ISPPRV_RGB_MAT1, 0x0000}, ++ {ISPPRV_RGB_MAT2, 0x0000}, ++ {ISPPRV_RGB_MAT3, 0x0000}, ++ {ISPPRV_RGB_MAT4, 0x0000}, ++ {ISPPRV_RGB_MAT5, 0x0000}, ++ {ISPPRV_RGB_OFF1, 0x0000}, ++ {ISPPRV_RGB_OFF2, 0x0000}, ++ {ISPPRV_CSC0, 0x0000}, ++ {ISPPRV_CSC1, 0x0000}, ++ {ISPPRV_CSC2, 0x0000}, ++ {ISPPRV_CSC_OFFSET, 0x0000}, ++ {ISPPRV_CNT_BRT, 0x0000}, ++ {ISPPRV_CSUP, 0x0000}, ++ {ISPPRV_SETUP_YC, 0x0000}, ++ {ISPPRV_SET_TBL_ADDR, 0x0000}, ++ {ISPPRV_SET_TBL_DATA, 0x0000}, ++ {ISPPRV_CDC_THR0, 0x0000}, ++ {ISPPRV_CDC_THR1, 0x0000}, ++ {ISPPRV_CDC_THR2, 0x0000}, ++ {ISPPRV_CDC_THR3, 0x0000}, ++ {ISP_TOK_TERM, 0x0000} ++}; ++ ++ ++/* Default values in Office Flourescent Light for RGBtoRGB Blending */ ++static struct ispprev_rgbtorgb flr_rgb2rgb = { ++ { /* RGB-RGB Matrix */ ++ { 0x01E2, 0x0F30, 0x0FEE }, ++ { 0x0F9B, 0x01AC, 0x0FB9 }, ++ { 0x0FE0, 0x0EC0, 0x0260 } ++ }, /* RGB Offset */ ++ {0x0000, 0x0000, 0x0000} ++}; ++ ++/* Default values in Office Flourescent Light for RGB to YUV Conversion*/ ++static struct ispprev_csc flr_prev_csc[] = { ++ { ++ { /* CSC Coef Matrix */ ++ { 66, 129, 25}, ++ { -38, -75, 112}, ++ { 112, -94 , -18} ++ }, /* CSC Offset */ ++ {0x0, 0x0, 0x0} ++ }, ++ { ++ { /* CSC Coef Matrix Sepia*/ ++ { 19, 38, 7}, ++ { 0, 0, 0}, ++ { 0, 0, 0} ++ }, /* CSC Offset */ ++ {0x0, 0xE7, 0x14} ++ }, ++ { ++ { /* CSC Coef Matrix BW*/ ++ { 66, 129, 25}, ++ { 0, 0, 0}, ++ { 0, 0, 0} ++ }, /* CSC Offset */ ++ {0x0, 0x0, 0x0} ++ } ++}; ++ ++ ++/* Default values in Office Flourescent Light for CFA Gradient*/ ++static u8 flr_cfa_gradthrs_horz = 0x28; ++static u8 flr_cfa_gradthrs_vert = 0x28; ++ ++/* Default values in Office Flourescent Light for Chroma Suppression*/ ++static u8 flr_csup_gain = 0x0D; ++static u8 flr_csup_thres = 0xEB; ++ ++/* Default values in Office Flourescent Light for Noise Filter*/ ++static u8 flr_nf_strgth = 0x03; ++ ++/* Default values in Office Flourescent Light for White Balance*/ ++static u16 flr_wbal_dgain = 0x100; ++static u8 flr_wbal_coef0 = 0x68; ++static u8 flr_wbal_coef1 = 0x5c; ++static u8 flr_wbal_coef2 = 0x5c; ++static u8 flr_wbal_coef3 = 0x94; ++ ++/* Default values in Office Flourescent Light for Black Adjustment*/ ++static u8 flr_blkadj_blue = 0x0; ++static u8 flr_blkadj_green = 0x0; ++static u8 flr_blkadj_red = 0x0; ++ ++static int update_color_matrix; ++ ++/* ++ * Structure for the preview module to store its own information. ++ */ ++static struct isp_prev { ++ u8 prev_inuse; ++ u32 prevout_w; ++ u32 prevout_h; ++ u32 previn_w; ++ u32 previn_h; ++ enum preview_input prev_inpfmt; ++ enum preview_output prev_outfmt; ++ u8 hmed_en; ++ u8 nf_en; ++ u8 dcor_en; ++ u8 cfa_en; ++ u8 csup_en; ++ u8 yenh_en; ++ u8 fmtavg; ++ u8 brightness; ++ u8 contrast; ++ enum preview_color_effect color; ++ enum cfa_fmt cfafmt; ++ struct mutex ispprev_mutex; ++} ispprev_obj; ++ ++/* Saved parameters */ ++struct prev_params *prev_config_params; ++ ++/* ++ * Coeficient Tables for the submodules in Preview. ++ * Array is initialised with the values from.the tables text file. ++ */ ++ ++/* ++ * CFA Filter Coefficient Table ++ * ++ */ ++static u32 cfa_coef_table[] = { ++#include "cfa_coef_table.h" ++}; ++ ++/* ++ * Gamma Correction Table - Red ++ */ ++static u32 redgamma_table[] = { ++#include "redgamma_table.h" ++}; ++ ++/* ++ * Gamma Correction Table - Green ++ */ ++static u32 greengamma_table[] = { ++#include "greengamma_table.h" ++}; ++ ++/* ++ * Gamma Correction Table - Blue ++ */ ++static u32 bluegamma_table[] = { ++#include "bluegamma_table.h" ++}; ++ ++/* ++ * Noise Filter Threshold table ++ */ ++static u32 noise_filter_table[] = { ++#include "noise_filter_table.h" ++}; ++ ++/* ++ * Luminance Enhancement Table ++ */ ++static u32 luma_enhance_table[] = { ++#include "luma_enhance_table.h" ++}; ++ ++int omap34xx_isp_preview_config(void *userspace_add) ++{ ++ struct prev_params *params = prev_config_params; ++ struct ispprev_hmed prev_hmed_t; ++ struct ispprev_cfa prev_cfa_t; ++ struct ispprev_csup csup_t; ++ struct ispprev_wbal prev_wbal_t; ++ struct ispprev_blkadj prev_blkadj_t; ++ struct ispprev_rgbtorgb rgb2rgb_t; ++ struct ispprev_csc prev_csc_t; ++ struct ispprev_yclimit yclimit_t; ++ struct ispprev_dcor prev_dcor_t; ++ struct ispprv_update_config preview_struct; ++ int yen_t[128]; ++ ++ if (userspace_add == NULL) ++ return -EINVAL ; ++ if (copy_from_user(&preview_struct, ++ (struct ispprv_update_config *)userspace_add, ++ sizeof(struct ispprv_update_config))) { ++ goto err_copy_from_user; ++ } ++ if ((ISP_ABS_PREV_LUMAENH & preview_struct.flag) == ++ ISP_ABS_PREV_LUMAENH) { ++ if ((ISP_ABS_PREV_LUMAENH & preview_struct.update) == ++ ISP_ABS_PREV_LUMAENH) { ++ if (copy_from_user(yen_t, (preview_struct.yen), ++ sizeof(yen_t))) ++ goto err_copy_from_user; ++ ++ isppreview_config_luma_enhancement(yen_t); ++ params->features |= (PREV_LUMA_ENHANCE); ++ } else ++ params->features |= (PREV_LUMA_ENHANCE); ++ } else { ++ if ((ISP_ABS_PREV_LUMAENH & preview_struct.update) == ++ ISP_ABS_PREV_LUMAENH) ++ params->features &= ~(PREV_LUMA_ENHANCE); ++ } ++ ++ if ((ISP_ABS_PREV_INVALAW & preview_struct.flag) ++ == ISP_ABS_PREV_INVALAW) { ++ isppreview_enable_invalaw(1); ++ params->features |= (PREV_INVERSE_ALAW); ++ } else { ++ isppreview_enable_invalaw(0); ++ params->features &= ~(PREV_INVERSE_ALAW); ++ } ++ ++ if ((ISP_ABS_PREV_HRZ_MED & preview_struct.flag) == ++ ISP_ABS_PREV_HRZ_MED) { ++ if ((ISP_ABS_PREV_HRZ_MED & preview_struct.update) ++ == ISP_ABS_PREV_HRZ_MED) { ++ if (copy_from_user(&prev_hmed_t, ++ (struct ispprev_hmed *) ++ (preview_struct.prev_hmed), ++ sizeof(struct ispprev_hmed))) ++ goto err_copy_from_user; ++ isppreview_config_hmed(prev_hmed_t); ++ isppreview_enable_hmed(1); ++ params->features |= (PREV_HORZ_MEDIAN_FILTER); ++ } else { ++ isppreview_enable_hmed(1); ++ params->features |= (PREV_HORZ_MEDIAN_FILTER); ++ } ++ } else { ++ if ((ISP_ABS_PREV_HRZ_MED & preview_struct.update) == ++ ISP_ABS_PREV_HRZ_MED) { ++ isppreview_enable_hmed(0); ++ params->features &= ~(PREV_HORZ_MEDIAN_FILTER); ++ } ++ } ++ ++ if ((ISP_ABS_PREV_CFA & preview_struct.flag) == ++ ISP_ABS_PREV_CFA) { ++ if ((ISP_ABS_PREV_CFA & preview_struct.update) == ++ ISP_ABS_PREV_CFA) { ++ if (copy_from_user(&prev_cfa_t, ++ (struct ispprev_cfa *)preview_struct. ++ prev_cfa, sizeof(struct ispprev_cfa))) ++ goto err_copy_from_user; ++ ++ isppreview_config_cfa(prev_cfa_t); ++ isppreview_enable_cfa(1); ++ params->features |= (PREV_CFA); ++ ++ } else { ++ isppreview_enable_cfa(1); ++ params->features |= (PREV_CFA); ++ } ++ } else { ++ if ((ISP_ABS_PREV_CFA & preview_struct.update) == ++ ISP_ABS_PREV_CFA) { ++ isppreview_enable_cfa(0); ++ params->features &= ~(PREV_CFA); ++ } ++ } ++ ++ if ((ISP_ABS_PREV_CHROMA_SUPP & preview_struct.flag) == ++ ISP_ABS_PREV_CHROMA_SUPP) { ++ if ((ISP_ABS_PREV_CHROMA_SUPP & ++ preview_struct.update) == ++ ISP_ABS_PREV_CHROMA_SUPP) { ++ if (copy_from_user(&csup_t, ++ (struct ispprev_csup *) ++ (preview_struct.csup), ++ sizeof(struct ispprev_csup))) ++ goto err_copy_from_user; ++ ++ isppreview_config_chroma_suppression(csup_t); ++ isppreview_enable_chroma_suppression(1); ++ params->features |= (PREV_CHROMA_SUPPRESS); ++ ++ } else { ++ isppreview_enable_chroma_suppression(1); ++ params->features |= (PREV_CHROMA_SUPPRESS); ++ } ++ } else { ++ if ((ISP_ABS_PREV_CHROMA_SUPP & ++ preview_struct.update) == ++ ISP_ABS_PREV_CHROMA_SUPP) { ++ isppreview_enable_chroma_suppression(0); ++ params->features &= ~(PREV_CHROMA_SUPPRESS); ++ } ++ } ++ ++ if ((ISP_ABS_PREV_WB & preview_struct.update) == ISP_ABS_PREV_WB) { ++ if (copy_from_user(&prev_wbal_t, ++ (struct ispprev_wbal *)(preview_struct. ++ prev_wbal), sizeof(struct ispprev_wbal))) ++ goto err_copy_from_user; ++ ++ isppreview_config_whitebalance(prev_wbal_t); ++ } ++ ++ if ((ISP_ABS_PREV_BLKADJ & preview_struct.update) ++ == ISP_ABS_PREV_BLKADJ) { ++ if (copy_from_user(&prev_blkadj_t, ++ (struct ispprev_blkadjl *)(preview_struct. ++ prev_blkadj), sizeof(struct ispprev_blkadj))) { ++ goto err_copy_from_user; ++ } ++ isppreview_config_blkadj(prev_blkadj_t); ++ } ++ ++ if ((ISP_ABS_PREV_RGB2RGB & preview_struct.update) ++ == ISP_ABS_PREV_RGB2RGB) { ++ if (copy_from_user(&rgb2rgb_t, ++ (struct ispprev_rgbtorgb *)(preview_struct. ++ rgb2rgb), sizeof(struct ispprev_rgbtorgb))) ++ goto err_copy_from_user; ++ ++ isppreview_config_rgb_blending(rgb2rgb_t); ++ } ++ ++ if ((ISP_ABS_PREV_COLOR_CONV & preview_struct.update) ++ == ISP_ABS_PREV_COLOR_CONV) { ++ if (copy_from_user(&prev_csc_t, ++ (struct ispprev_csc *)(preview_struct. ++ prev_csc), sizeof(struct ispprev_csc))) ++ goto err_copy_from_user; ++ ++ isppreview_config_rgb_to_ycbcr(prev_csc_t); ++ } ++ ++ if ((ISP_ABS_PREV_YC_LIMIT & preview_struct.update) ++ == ISP_ABS_PREV_YC_LIMIT) { ++ if (copy_from_user(&yclimit_t, ++ (struct ispprev_yclimit *)(preview_struct. ++ yclimit), sizeof(struct ispprev_yclimit))) ++ goto err_copy_from_user; ++ ++ isppreview_config_yc_range(yclimit_t); ++ } ++ ++ if ((ISP_ABS_PREV_DEFECT_COR & preview_struct.flag) == ++ ISP_ABS_PREV_DEFECT_COR) { ++ if ((ISP_ABS_PREV_DEFECT_COR & preview_struct.update) == ++ ISP_ABS_PREV_DEFECT_COR) { ++ if (copy_from_user(&prev_dcor_t, ++ (struct ispprev_dcor *) ++ (preview_struct.prev_dcor), ++ sizeof(struct ispprev_dcor))) ++ goto err_copy_from_user; ++ ++ isppreview_config_dcor(prev_dcor_t); ++ isppreview_enable_dcor(1); ++ params->features |= (PREV_DEFECT_COR); ++ } else { ++ isppreview_enable_dcor(1); ++ params->features |= (PREV_DEFECT_COR); ++ } ++ } else { ++ if ((ISP_ABS_PREV_DEFECT_COR & preview_struct.update) == ++ ISP_ABS_PREV_DEFECT_COR) { ++ isppreview_enable_dcor(0); ++ params->features &= ~(PREV_DEFECT_COR); ++ } ++ } ++ ++ if ((ISP_ABS_PREV_GAMMABYPASS & preview_struct.flag) == ++ ISP_ABS_PREV_GAMMABYPASS) { ++ isppreview_enable_gammabypass(1); ++ params->features |= (PREV_GAMMA_BYPASS); ++ } else { ++ isppreview_enable_gammabypass(0); ++ params->features &= ~(PREV_GAMMA_BYPASS); ++ } ++ ++ return 0; ++ ++err_copy_from_user: ++ printk(KERN_ERR); ++ DPRINTK_ISPPREV("ISP_ERR : Preview Copy From User Error \n"); ++ return -EINVAL ; ++} ++EXPORT_SYMBOL(omap34xx_isp_preview_config); ++ ++int omap34xx_isp_tables_update(void *userspace_add) ++{ ++ struct isptables_update isptables_struct; ++ struct prev_params *params = prev_config_params; ++ ++ if (userspace_add == NULL) ++ return -EINVAL; ++ ++ if (copy_from_user(&isptables_struct, ++ (struct isptables_update *)(userspace_add), ++ sizeof(struct isptables_update))) ++ goto err_copy_from_user; ++ ++ if ((ISP_ABS_TBL_NF & isptables_struct.flag) == ISP_ABS_TBL_NF) { ++ NF_enable = 1; ++ params->features |= (PREV_NOISE_FILTER); ++ } else { ++ NF_enable = 0; ++ params->features &= ~(PREV_NOISE_FILTER); ++ } ++ ++ if ((ISP_ABS_TBL_NF & isptables_struct.update) == ISP_ABS_TBL_NF) { ++ if (copy_from_user(&prev_nf_t, (void *)isptables_struct.prev_nf, ++ sizeof(struct ispprev_nf))) ++ goto err_copy_from_user; ++ ++ if (copy_from_user(noise_filter_table, prev_nf_t.table, ++ sizeof(noise_filter_table))) { ++ NF_update = 0; ++ goto err_copy_from_user; ++ } ++ prev_nf_t.table = noise_filter_table; ++ NF_update = 1; ++ } ++ ++ if ((ISP_ABS_TBL_REDGAMMA & isptables_struct.update) == ++ ISP_ABS_TBL_REDGAMMA) { ++ if (copy_from_user(redgamma_table, ++ (isptables_struct.red_gamma), ++ sizeof(redgamma_table))) { ++ RG_update = 0; ++ goto err_copy_from_user; ++ } ++ RG_update = 1; ++ } ++ ++ if ((ISP_ABS_TBL_GREENGAMMA & isptables_struct.update) == ++ ISP_ABS_TBL_GREENGAMMA) { ++ if (copy_from_user(greengamma_table, ++ (isptables_struct.green_gamma), ++ sizeof(greengamma_table))) { ++ GG_update = 0; ++ goto err_copy_from_user; ++ } ++ GG_update = 1; ++ } ++ ++ if ((ISP_ABS_TBL_BLUEGAMMA & isptables_struct.update) == ++ ISP_ABS_TBL_BLUEGAMMA) { ++ if (copy_from_user(bluegamma_table, ++ (isptables_struct.blue_gamma), ++ sizeof(bluegamma_table))) { ++ BG_update = 0; ++ goto err_copy_from_user; ++ } ++ BG_update = 1; ++ } ++ ++ return 0; ++ ++err_copy_from_user: ++ printk(KERN_ERR "Preview Tables:Copy From User Error"); ++ return -EINVAL; ++} ++EXPORT_SYMBOL(omap34xx_isp_tables_update); ++ ++/* ++ * Allows user to program shadow registers associated with preview module. ++ */ ++void ++isppreview_config_shadow_registers() ++{ ++ struct prev_params *params = prev_config_params; ++ u8 current_brightness_contrast; ++ int ctr, prv_disabled; ++ ++ /* Program Brightness if needed */ ++ isppreview_query_brightness(¤t_brightness_contrast); ++ if (current_brightness_contrast != ((ispprev_obj.brightness) * ++ ISPPRV_BRIGHT_UNITS)) { ++ DPRINTK_ISPPREV(" Changing Brightness level to %d\n", ++ ispprev_obj.brightness); ++ isppreview_config_brightness((ispprev_obj.brightness) * ++ ISPPRV_BRIGHT_UNITS); ++ } ++ ++ /* Program Contrast if needed */ ++ isppreview_query_contrast(¤t_brightness_contrast); ++ if (current_brightness_contrast != ((ispprev_obj.contrast) * ++ ISPPRV_CONTRAST_UNITS)) { ++ DPRINTK_ISPPREV(" Changing Contrast level to %d\n", ++ ispprev_obj.contrast); ++ isppreview_config_contrast((ispprev_obj.contrast) * ++ ISPPRV_CONTRAST_UNITS); ++ } ++ ++ if (update_color_matrix) { ++ isppreview_config_rgb_to_ycbcr( ++ flr_prev_csc[ispprev_obj.color]); ++ update_color_matrix = 0; ++ } ++ ++ if (GG_update || RG_update || BG_update || NF_update) { ++ isppreview_enable(0); ++ prv_disabled = 1; ++ } ++ ++ if (GG_update) { ++ omap_writel(0x400, ISPPRV_SET_TBL_ADDR); ++ ++ for (ctr = 0; ctr < ISP_GAMMA_TABLE_SIZE; ctr++) ++ omap_writel(greengamma_table[ctr], ++ ISPPRV_SET_TBL_DATA); ++ ++ GG_update = 0; ++ } ++ ++ if (RG_update) { ++ omap_writel(0, ISPPRV_SET_TBL_ADDR); ++ ++ for (ctr = 0; ctr < ISP_GAMMA_TABLE_SIZE; ctr++) ++ omap_writel(redgamma_table[ctr], ISPPRV_SET_TBL_DATA); ++ ++ RG_update = 0; ++ } ++ ++ if (BG_update) { ++ omap_writel(0x800, ISPPRV_SET_TBL_ADDR); ++ ++ for (ctr = 0; ctr < ISP_GAMMA_TABLE_SIZE; ctr++) ++ omap_writel(bluegamma_table[ctr], ISPPRV_SET_TBL_DATA); ++ ++ BG_update = 0; ++ } ++ ++ if (NF_update) { ++ isppreview_config_noisefilter(prev_nf_t); ++ ++ if (NF_enable) { ++ isppreview_enable_noisefilter(1); ++ params->features |= ~(PREV_NOISE_FILTER); ++ } else { ++ isppreview_enable_noisefilter(0); ++ params->features &= ~(PREV_NOISE_FILTER); ++ } ++ ++ NF_update = 0; ++ } ++ ++ if (prv_disabled) { ++ isppreview_enable(1); ++ prv_disabled = 0; ++ } ++} ++EXPORT_SYMBOL(isppreview_config_shadow_registers); ++ ++/** ++ * isppreview_request - Reserves the preview module. ++ * ++ * Returns 0 if successful, or -EBUSY if the module was already reserved. ++ **/ ++int isppreview_request() ++{ ++ mutex_lock(&ispprev_obj.ispprev_mutex); ++ if (!(ispprev_obj.prev_inuse)) { ++ ispprev_obj.prev_inuse = 1; ++ mutex_unlock(&ispprev_obj.ispprev_mutex); ++ /* Turn on Preview module Clocks. */ ++ omap_writel((omap_readl(ISP_CTRL)) | ISPCTRL_PREV_RAM_EN | ++ ISPCTRL_PREV_CLK_EN | ISPCTRL_SBL_WR1_RAM_EN ++ , ISP_CTRL); ++ return 0; ++ } else{ ++ mutex_unlock(&ispprev_obj.ispprev_mutex); ++ printk(KERN_ERR "ISP_ERR : Preview Module Busy\n"); ++ return -EBUSY; ++ } ++} ++EXPORT_SYMBOL(isppreview_request); ++ ++/* ++ * Marks Preview module free. ++ */ ++int ++isppreview_free() ++{ ++ mutex_lock(&ispprev_obj.ispprev_mutex); ++ if (ispprev_obj.prev_inuse) { ++ ispprev_obj.prev_inuse = 0; ++ mutex_unlock(&ispprev_obj.ispprev_mutex); ++ omap_writel(omap_readl(ISP_CTRL) & ~(ISPCTRL_PREV_CLK_EN | ++ ISPCTRL_PREV_RAM_EN ++ | ISPCTRL_SBL_WR1_RAM_EN), ISP_CTRL); ++ return 0; ++ } else { ++ mutex_unlock(&ispprev_obj.ispprev_mutex); ++ DPRINTK_ISPPREV("ISP_ERR : Preview Module already freed\n"); ++ return -EINVAL; ++ } ++ ++} ++EXPORT_SYMBOL(isppreview_free); ++ ++/* Sets up the default preview configuration according to the arguments. ++ * input: Indicates the module that gives the image to preview ++ * output: Indicates the module to which the preview outputs to. ++ */ ++int ++isppreview_config_datapath(enum preview_input input, ++ enum preview_output output) ++{ ++ u32 pcr = 0; ++ u8 enable = 0; ++ struct prev_params *params = prev_config_params; ++ struct ispprev_yclimit yclimit; ++ ++ pcr = omap_readl(ISPPRV_PCR); ++ ++ switch (input) { ++ case PRV_RAW_CCDC: ++ pcr &= ~(ISPPRV_PCR_SOURCE); ++ pcr &= ~(ISPPRV_PCR_ONESHOT); ++ ispprev_obj.prev_inpfmt = PRV_RAW_CCDC; ++ break; ++ case PRV_RAW_MEM: ++ pcr |= ISPPRV_PCR_SOURCE; ++ pcr |= ISPPRV_PCR_ONESHOT; ++ ispprev_obj.prev_inpfmt = PRV_RAW_MEM; ++ break; ++ case PRV_CCDC_DRKF: ++ pcr |= ISPPRV_PCR_DRKFCAP; ++ pcr |= ISPPRV_PCR_ONESHOT; ++ ispprev_obj.prev_inpfmt = PRV_CCDC_DRKF; ++ break; ++ /* Just check for input path validity. No PCR update required ++ * for the current HW setup. ++ */ ++ case PRV_COMPCFA: ++ ispprev_obj.prev_inpfmt = PRV_COMPCFA; ++ break; ++ case PRV_OTHERS: ++ ispprev_obj.prev_inpfmt = PRV_OTHERS; ++ break; ++ case PRV_RGBBAYERCFA: ++ ispprev_obj.prev_inpfmt = PRV_RGBBAYERCFA; ++ break; ++ default: ++ printk(KERN_ERR "ISP_ERR : Wrong Input\n"); ++ return -EINVAL; ++ }; ++ ++ if (output == PREVIEW_RSZ) { ++ pcr |= ISPPRV_PCR_RSZPORT; ++ pcr &= (~ISPPRV_PCR_SDRPORT); ++ ispprev_obj.prev_outfmt = PREVIEW_RSZ; ++ } else if (output == PREVIEW_MEM) { ++ pcr &= (~ISPPRV_PCR_RSZPORT); ++ pcr |= ISPPRV_PCR_SDRPORT; ++ ispprev_obj.prev_outfmt = PREVIEW_MEM; ++ } else { ++ printk(KERN_ERR "ISP_ERR : Wrong Output\n"); ++ return -EINVAL; ++ } ++ omap_writel(pcr, ISPPRV_PCR); ++ ++ /* Default Output format configured is YCrYCb (UYVY) */ ++ isppreview_config_ycpos(params->pix_fmt); ++ ++ /* CFA */ ++ if (params->cfa.cfa_table != NULL) ++ isppreview_config_cfa(params->cfa); ++ /* Chroma Suppression */ ++ if (params->csup.hypf_en == 1) ++ isppreview_config_chroma_suppression(params->csup); ++ /* Luma */ ++ if (params->ytable != NULL) ++ isppreview_config_luma_enhancement(params->ytable); ++ /* Noise Filter */ ++ /* Gamma Correction */ ++ if (params->gtable.redtable != NULL) ++ isppreview_config_gammacorrn(params->gtable); ++ ++ /* Enabling specific features */ ++ enable = ((params->features & PREV_CFA) == PREV_CFA) ? 1 : 0; ++ isppreview_enable_cfa(enable); ++ ++ enable = ((params->features & PREV_CHROMA_SUPPRESS) ++ == PREV_CHROMA_SUPPRESS) ? 1 : 0; ++ isppreview_enable_chroma_suppression(enable); ++ ++ enable = ((params->features & PREV_LUMA_ENHANCE) ++ == PREV_LUMA_ENHANCE) ? 1 : 0; ++ isppreview_enable_luma_enhancement(enable); ++ ++ enable = ((params->features & PREV_NOISE_FILTER) ++ == PREV_NOISE_FILTER) ? 1 : 0; ++ if (enable) ++ isppreview_config_noisefilter(params->nf); ++ isppreview_enable_noisefilter(enable); ++ ++ enable = ((params->features & PREV_DEFECT_COR) ++ == PREV_DEFECT_COR) ? 1 : 0; ++ if (enable) ++ isppreview_config_dcor(params->dcor); ++ isppreview_enable_dcor(enable); ++ ++ enable = ((params->features & PREV_GAMMA_BYPASS) ++ == PREV_GAMMA_BYPASS) ? 1 : 0; ++ isppreview_enable_gammabypass(enable); ++ ++ isppreview_config_whitebalance(params->wbal); ++ isppreview_config_blkadj(params->blk_adj); ++ isppreview_config_rgb_blending(params->rgb2rgb); ++ isppreview_config_rgb_to_ycbcr(params->rgb2ycbcr); ++ ++ isppreview_config_contrast(params->contrast * ISPPRV_CONTRAST_UNITS); ++ isppreview_config_brightness(params->brightness * ISPPRV_BRIGHT_UNITS); ++ ++ yclimit.minC = ISPPRV_YC_MIN; ++ yclimit.maxC = ISPPRV_YC_MAX; ++ yclimit.minY = ISPPRV_YC_MIN; ++ yclimit.maxY = ISPPRV_YC_MAX; ++ isppreview_config_yc_range(yclimit); ++ ++ return 0; ++} ++EXPORT_SYMBOL(isppreview_config_datapath); ++ ++/* ++ * Configure byte layout of YUV image ++ */ ++void isppreview_config_ycpos(enum preview_ycpos_mode mode) ++{ ++ u32 pcr = omap_readl(ISPPRV_PCR); ++ pcr &= (~ISPPRV_PCR_YCPOS_CrYCbY); ++ pcr |= (mode << ISPPRV_PCR_YCPOS_SHIFT); ++ omap_writel(pcr, ISPPRV_PCR); ++} ++EXPORT_SYMBOL(isppreview_config_ycpos); ++ ++/* ++ * Enable/disable/configure averager ++ */ ++void ++isppreview_config_averager(u8 average) ++{ ++ int reg = 0; ++ ++ reg = AVE_ODD_PIXEL_DIST | AVE_EVEN_PIXEL_DIST | average; ++ omap_writel(reg, ISPPRV_AVE); ++} ++EXPORT_SYMBOL(isppreview_config_averager); ++ ++/* ++ * Enable/Disable the Inverse A-Law module in Preview ++ * enable: 1- Reverse the ALaw done in CCDC. ++ */ ++void isppreview_enable_invalaw(u8 enable) ++{ ++ u32 pcr_val = 0; ++ pcr_val = omap_readl(ISPPRV_PCR); ++ ++ if (enable) ++ omap_writel(pcr_val | ISPPRV_PCR_WIDTH | ISPPRV_PCR_INVALAW, ++ ISPPRV_PCR); ++ else ++ omap_writel(pcr_val & ~(ISPPRV_PCR_WIDTH | ISPPRV_PCR_INVALAW), ++ ISPPRV_PCR); ++} ++EXPORT_SYMBOL(isppreview_enable_invalaw); ++ ++/* Enable/Disable of the darkframe subtract for each captured frame. ++ * enable: 1- Acquires memory bandwidth since the pixels in each frame is ++ * subtracted with the pixels in the current frame. ++ */ ++void ++isppreview_enable_drkframe(u8 enable) ++{ ++ if (enable) ++ omap_writel(omap_readl(ISPPRV_PCR) | ISPPRV_PCR_DRKFEN, ++ ISPPRV_PCR); ++ else ++ omap_writel((omap_readl(ISPPRV_PCR)) & ~ISPPRV_PCR_DRKFEN, ++ ISPPRV_PCR); ++} ++EXPORT_SYMBOL(isppreview_enable_drkframe); ++ ++/* If dark frame subtract not to be used, then enable this shading compensation ++ * enable: 1- Enables the shading compensation. ++ */ ++void ++isppreview_enable_shadcomp(u8 enable) ++{ ++ ++ if (enable) { ++ omap_writel((omap_readl(ISPPRV_PCR)) | ISPPRV_PCR_SCOMP_EN, ++ ISPPRV_PCR); ++ isppreview_enable_drkframe(1); ++ } else ++ omap_writel((omap_readl(ISPPRV_PCR)) & ~ISPPRV_PCR_SCOMP_EN, ++ ISPPRV_PCR); ++} ++EXPORT_SYMBOL(isppreview_enable_shadcomp); ++ ++/* Configure the shift value to be used in shading compensation. ++ * scomp_shtval: 3bit value of shift used in shading compensation. ++ */ ++void isppreview_config_drkf_shadcomp(u8 scomp_shtval) ++{ ++ u32 pcr_val = omap_readl(ISPPRV_PCR); ++ ++ pcr_val &= ISPPRV_PCR_SCOMP_SFT_MASK; ++ omap_writel(pcr_val | (scomp_shtval << ISPPRV_PCR_SCOMP_SFT_SHIFT), ++ ISPPRV_PCR); ++} ++EXPORT_SYMBOL(isppreview_config_drkf_shadcomp); ++ ++/* ++ * Enable/Disable of the Horizontal Median Filter ++ * enable: 1- Enables Horizontal Median Filter ++ */ ++void isppreview_enable_hmed(u8 enable) ++{ ++ if (enable) { ++ omap_writel((omap_readl(ISPPRV_PCR)) | ISPPRV_PCR_HMEDEN, ++ ISPPRV_PCR); ++ ispprev_obj.hmed_en = 1; ++ } else { ++ omap_writel((omap_readl(ISPPRV_PCR)) & (~ISPPRV_PCR_HMEDEN), ++ ISPPRV_PCR); ++ ispprev_obj.hmed_en = 0; ++ } ++} ++EXPORT_SYMBOL(isppreview_enable_hmed); ++ ++/* ++ *Configures the Horizontal Median Filter ++ * prev_hmed: Structure containing the odd and even distance between the ++ * pixels in the image along with the filter threshold. ++ */ ++void isppreview_config_hmed(struct ispprev_hmed prev_hmed) ++{ ++ ++ u32 odddist = 0; ++ u32 evendist = 0; ++ ++ if (prev_hmed.odddist == 1) ++ odddist = ~ISPPRV_HMED_ODDDIST; ++ else /* else the odd distance is 2 */ ++ odddist = ISPPRV_HMED_ODDDIST; ++ ++ if (prev_hmed.evendist == 1) ++ evendist = ~ISPPRV_HMED_EVENDIST; ++ else /* else the even distance is 2 */ ++ evendist = ISPPRV_HMED_EVENDIST; ++ ++ omap_writel(odddist | evendist ++ | (prev_hmed.thres<<ISPPRV_HMED_THRESHOLD_SHIFT), ++ ISPPRV_HMED); ++ ++} ++EXPORT_SYMBOL(isppreview_config_hmed); ++ ++/* ++ * Configures the Noise Filter ++ * prev_nf: Structure containing the noisefilter table, strength to be used ++ * for the noise filter and the defect correction enable flag. ++ */ ++void ++isppreview_config_noisefilter(struct ispprev_nf prev_nf) ++{ ++ int i = 0; ++ omap_writel(prev_nf.spread, ISPPRV_NF); ++ omap_writel(ISPPRV_NF_TABLE_ADDR, ISPPRV_SET_TBL_ADDR); ++ for (i = 0; i < 64; i++) ++ omap_writel(prev_nf.table[i], ISPPRV_SET_TBL_DATA); ++} ++EXPORT_SYMBOL(isppreview_config_noisefilter); ++ ++/* ++ * Configures the defect correction ++ * prev_nf: Structure containing the defect correction structure ++ */ ++void ++isppreview_config_dcor(struct ispprev_dcor prev_dcor) ++{ ++ if (prev_dcor.couplet_mode_en) { ++ omap_writel(prev_dcor.detect_correct[0], ISPPRV_CDC_THR0); ++ omap_writel(prev_dcor.detect_correct[1], ISPPRV_CDC_THR1); ++ omap_writel(prev_dcor.detect_correct[2], ISPPRV_CDC_THR2); ++ omap_writel(prev_dcor.detect_correct[3], ISPPRV_CDC_THR3); ++ omap_writel((omap_readl(ISPPRV_PCR)) | ISPPRV_PCR_DCCOUP, ++ ISPPRV_PCR); ++ } else ++ omap_writel((omap_readl(ISPPRV_PCR)) & (~ISPPRV_PCR_DCCOUP), ++ ISPPRV_PCR); ++} ++EXPORT_SYMBOL(isppreview_config_dcor); ++ ++/* ++ * Configures the CFA Interpolation parameters ++ * prev_cfa: Structure containing the CFA interpolation table, CFA format ++ * in the image, vertical and horizontal gradient threshold. ++ */ ++void isppreview_config_cfa(struct ispprev_cfa prev_cfa) ++{ ++ int i = 0; ++ ispprev_obj.cfafmt = prev_cfa.cfafmt; ++ ++ omap_writel((omap_readl(ISPPRV_PCR)) ++ | (prev_cfa.cfafmt << ISPPRV_PCR_CFAFMT_SHIFT), ISPPRV_PCR); ++ ++ omap_writel((prev_cfa.cfa_gradthrs_vert << ISPPRV_CFA_GRADTH_VER_SHIFT) ++ | (prev_cfa.cfa_gradthrs_horz << ISPPRV_CFA_GRADTH_HOR_SHIFT), ++ ISPPRV_CFA); ++ ++ omap_writel(ISPPRV_CFA_TABLE_ADDR, ISPPRV_SET_TBL_ADDR); ++ ++ /* Array of 576 */ ++ for (i = 0; i < 576; i++) ++ omap_writel(prev_cfa.cfa_table[i], ISPPRV_SET_TBL_DATA); ++} ++EXPORT_SYMBOL(isppreview_config_cfa); ++ ++/* ++ * Configures the Gamma Correction table values ++ * gtable: Structure containing the table for red, blue, green gamma table. ++ */ ++void ++isppreview_config_gammacorrn(struct ispprev_gtable gtable) ++{ ++ int i = 0; ++ ++ omap_writel(ISPPRV_REDGAMMA_TABLE_ADDR, ISPPRV_SET_TBL_ADDR); ++ /* Array of 1024 */ ++ for (i = 0; i < 1024; i++) ++ omap_writel(gtable.redtable[i], ISPPRV_SET_TBL_DATA); ++ ++ omap_writel(ISPPRV_GREENGAMMA_TABLE_ADDR, ISPPRV_SET_TBL_ADDR); ++ /* Array of 1024 */ ++ for (i = 0; i < 1024; i++) ++ omap_writel(gtable.greentable[i], ISPPRV_SET_TBL_DATA); ++ ++ omap_writel(ISPPRV_BLUEGAMMA_TABLE_ADDR, ISPPRV_SET_TBL_ADDR); ++ /* Array of 1024 */ ++ for (i = 0; i < 1024; i++) ++ omap_writel(gtable.bluetable[i], ISPPRV_SET_TBL_DATA); ++} ++EXPORT_SYMBOL(isppreview_config_gammacorrn); ++ ++/* ++ * Configures the Luminance Enhancement table values ++ * ytable: Structure containing the table for Luminance Enhancement table. ++ */ ++void ++isppreview_config_luma_enhancement(u32 *ytable) ++{ ++ int i = 0; ++ omap_writel(ISPPRV_YENH_TABLE_ADDR, ISPPRV_SET_TBL_ADDR); ++ /* Array of 128 */ ++ for (i = 0; i < 128; i++) ++ omap_writel(ytable[i], ISPPRV_SET_TBL_DATA); ++} ++EXPORT_SYMBOL(isppreview_config_luma_enhancement); ++ ++/* ++ * Configures the Chroma Suppression ++ * csup: Structure containing the threshold value for suppression ++ * and the hypass filter enable flag. ++ */ ++void ++isppreview_config_chroma_suppression(struct ispprev_csup csup) ++{ ++ omap_writel(csup.gain | (csup.thres << ISPPRV_CSUP_THRES_SHIFT) ++ | (csup.hypf_en << ISPPRV_CSUP_HPYF_SHIFT) ++ , ISPPRV_CSUP); ++} ++EXPORT_SYMBOL(isppreview_config_chroma_suppression); ++ ++/* ++ * Enable/Disable the Noise Filter ++ * enable: 1 - Enables the Noise Filter. ++ */ ++void ++isppreview_enable_noisefilter(u8 enable) ++{ ++ if (enable) { ++ omap_writel((omap_readl(ISPPRV_PCR)) | ISPPRV_PCR_NFEN, ++ ISPPRV_PCR); ++ ispprev_obj.nf_en = 1; ++ } else { ++ omap_writel((omap_readl(ISPPRV_PCR)) & (~ISPPRV_PCR_NFEN), ++ ISPPRV_PCR); ++ ispprev_obj.nf_en = 0; ++ } ++} ++EXPORT_SYMBOL(isppreview_enable_noisefilter); ++ ++/* ++ * Enable/Disable the defect correction ++ * enable: 1 - Enables the defect correction. ++ */ ++void ++isppreview_enable_dcor(u8 enable) ++{ ++ if (enable) { ++ omap_writel((omap_readl(ISPPRV_PCR)) | ISPPRV_PCR_DCOREN, ++ ISPPRV_PCR); ++ ispprev_obj.dcor_en = 1; ++ } else { ++ omap_writel((omap_readl(ISPPRV_PCR)) & (~ISPPRV_PCR_DCOREN), ++ ISPPRV_PCR); ++ ispprev_obj.dcor_en = 0; ++ } ++} ++EXPORT_SYMBOL(isppreview_enable_dcor); ++ ++/* ++ * Enable/Disable the CFA Interpolation ++ * enable: 1 - Enables the CFA. ++ */ ++void ++isppreview_enable_cfa(u8 enable) ++{ ++ if (enable) { ++ omap_writel((omap_readl(ISPPRV_PCR)) | ISPPRV_PCR_CFAEN, ++ ISPPRV_PCR); ++ ispprev_obj.cfa_en = 1; ++ } else { ++ omap_writel((omap_readl(ISPPRV_PCR)) & (~ISPPRV_PCR_CFAEN), ++ ISPPRV_PCR); ++ ispprev_obj.cfa_en = 0; ++ } ++ ++} ++EXPORT_SYMBOL(isppreview_enable_cfa); ++ ++/* ++ * Enable/Disable the GammaByPass ++ * enable: 1 - Bypasses Gamma - 10bit input is cropped to 8MSB. ++ * 0 - Goes through Gamma Correction. input and output is 10bit. ++ */ ++void ++isppreview_enable_gammabypass(u8 enable) ++{ ++ if (enable) ++ omap_writel((omap_readl(ISPPRV_PCR)) | ISPPRV_PCR_GAMMA_BYPASS, ++ ISPPRV_PCR); ++ else ++ omap_writel((omap_readl(ISPPRV_PCR)) & ++ (~ISPPRV_PCR_GAMMA_BYPASS), ++ ISPPRV_PCR); ++} ++EXPORT_SYMBOL(isppreview_enable_gammabypass); ++ ++/* ++ * Enable/Disable the Luminance Enhancement ++ * enable: 1 - Enable the Luminance Enhancement. ++ */ ++void ++isppreview_enable_luma_enhancement(u8 enable) ++{ ++ if (enable) { ++ omap_writel((omap_readl(ISPPRV_PCR)) | ISPPRV_PCR_YNENHEN, ++ ISPPRV_PCR); ++ ispprev_obj.yenh_en = 1; ++ } else { ++ omap_writel((omap_readl(ISPPRV_PCR)) & (~ISPPRV_PCR_YNENHEN), ++ ISPPRV_PCR); ++ ispprev_obj.yenh_en = 0; ++ } ++} ++EXPORT_SYMBOL(isppreview_enable_luma_enhancement); ++ ++/* ++ * Enable/Disable the Chrominance Suppression ++ * enable: 1 - Enable the Chrominance Suppression. ++ */ ++void ++isppreview_enable_chroma_suppression(u8 enable) ++{ ++ if (enable) { ++ omap_writel((omap_readl(ISPPRV_PCR)) | ISPPRV_PCR_SUPEN, ++ ISPPRV_PCR); ++ ispprev_obj.csup_en = 1; ++ } else { ++ omap_writel((omap_readl(ISPPRV_PCR)) & (~ISPPRV_PCR_SUPEN), ++ ISPPRV_PCR); ++ ispprev_obj.csup_en = 0; ++ } ++} ++EXPORT_SYMBOL(isppreview_enable_chroma_suppression); ++ ++/* ++ * Configures the White Balance parameters. Coefficient matrix always with ++ * default values. ++ * prev_wbal: Structure containing the digital gain and white balance ++ * coefficient. ++ */ ++void isppreview_config_whitebalance(struct ispprev_wbal prev_wbal) ++{ ++ ++ omap_writel(prev_wbal.dgain, ISPPRV_WB_DGAIN); ++ omap_writel(prev_wbal.coef0 | ++ prev_wbal.coef1 << ISPPRV_WBGAIN_COEF1_SHIFT | ++ prev_wbal.coef2 << ISPPRV_WBGAIN_COEF2_SHIFT | ++ prev_wbal.coef3 << ISPPRV_WBGAIN_COEF3_SHIFT, ISPPRV_WBGAIN); ++ ++ /* Keeping the HW default value as such */ ++ omap_writel(ISPPRV_WBSEL_COEF0 << ISPPRV_WBSEL_N0_0_SHIFT ++ | ISPPRV_WBSEL_COEF1 << ISPPRV_WBSEL_N0_1_SHIFT ++ | ISPPRV_WBSEL_COEF0 << ISPPRV_WBSEL_N0_2_SHIFT ++ | ISPPRV_WBSEL_COEF1 << ISPPRV_WBSEL_N0_3_SHIFT ++ | ISPPRV_WBSEL_COEF2 << ISPPRV_WBSEL_N1_0_SHIFT ++ | ISPPRV_WBSEL_COEF3 << ISPPRV_WBSEL_N1_1_SHIFT ++ | ISPPRV_WBSEL_COEF2 << ISPPRV_WBSEL_N1_2_SHIFT ++ | ISPPRV_WBSEL_COEF3 << ISPPRV_WBSEL_N1_3_SHIFT ++ | ISPPRV_WBSEL_COEF0 << ISPPRV_WBSEL_N2_0_SHIFT ++ | ISPPRV_WBSEL_COEF1 << ISPPRV_WBSEL_N2_1_SHIFT ++ | ISPPRV_WBSEL_COEF0 << ISPPRV_WBSEL_N2_2_SHIFT ++ | ISPPRV_WBSEL_COEF1 << ISPPRV_WBSEL_N2_3_SHIFT ++ | ISPPRV_WBSEL_COEF2 << ISPPRV_WBSEL_N3_0_SHIFT ++ | ISPPRV_WBSEL_COEF3 << ISPPRV_WBSEL_N3_1_SHIFT ++ | ISPPRV_WBSEL_COEF2 << ISPPRV_WBSEL_N3_2_SHIFT ++ | ISPPRV_WBSEL_COEF3 << ISPPRV_WBSEL_N3_3_SHIFT, ++ ISPPRV_WBSEL); ++ ++} ++EXPORT_SYMBOL(isppreview_config_whitebalance); ++ ++/* ++ * Configures the White Balance parameters. Coefficient matrix can be changed. ++ * prev_wbal: Structure containing the digital gain and white balance ++ * coefficient. ++ */ ++void isppreview_config_whitebalance2(struct prev_white_balance prev_wbal) ++{ ++ omap_writel(prev_wbal.wb_dgain, ISPPRV_WB_DGAIN); ++ omap_writel(prev_wbal.wb_gain[0] ++ | prev_wbal.wb_gain[1] << ISPPRV_WBGAIN_COEF1_SHIFT ++ | prev_wbal.wb_gain[2] << ISPPRV_WBGAIN_COEF2_SHIFT ++ | prev_wbal.wb_gain[3] << ISPPRV_WBGAIN_COEF3_SHIFT, ++ ISPPRV_WBGAIN); ++ ++ /* Changing the HW default value */ ++ omap_writel(prev_wbal.wb_coefmatrix[0][0] << ISPPRV_WBSEL_N0_0_SHIFT ++ | prev_wbal.wb_coefmatrix[0][1] << ISPPRV_WBSEL_N0_1_SHIFT ++ | prev_wbal.wb_coefmatrix[0][2] << ISPPRV_WBSEL_N0_2_SHIFT ++ | prev_wbal.wb_coefmatrix[0][3] << ISPPRV_WBSEL_N0_3_SHIFT ++ | prev_wbal.wb_coefmatrix[1][0] << ISPPRV_WBSEL_N1_0_SHIFT ++ | prev_wbal.wb_coefmatrix[1][1] << ISPPRV_WBSEL_N1_1_SHIFT ++ | prev_wbal.wb_coefmatrix[1][2] << ISPPRV_WBSEL_N1_2_SHIFT ++ | prev_wbal.wb_coefmatrix[1][3] << ISPPRV_WBSEL_N1_3_SHIFT ++ | prev_wbal.wb_coefmatrix[2][0] << ISPPRV_WBSEL_N2_0_SHIFT ++ | prev_wbal.wb_coefmatrix[2][1] << ISPPRV_WBSEL_N2_1_SHIFT ++ | prev_wbal.wb_coefmatrix[2][2] << ISPPRV_WBSEL_N2_2_SHIFT ++ | prev_wbal.wb_coefmatrix[2][3] << ISPPRV_WBSEL_N2_3_SHIFT ++ | prev_wbal.wb_coefmatrix[3][0] << ISPPRV_WBSEL_N3_0_SHIFT ++ | prev_wbal.wb_coefmatrix[3][1] << ISPPRV_WBSEL_N3_1_SHIFT ++ | prev_wbal.wb_coefmatrix[3][2] << ISPPRV_WBSEL_N3_2_SHIFT ++ | prev_wbal.wb_coefmatrix[3][3] << ISPPRV_WBSEL_N3_3_SHIFT, ++ ISPPRV_WBSEL); ++} ++EXPORT_SYMBOL(isppreview_config_whitebalance2); ++ ++/* ++ * Configures the Black Adjustment parameters ++ * prev_blkadj: Structure containing the black adjustment towards red, ++ * green, blue. ++ */ ++void ++isppreview_config_blkadj(struct ispprev_blkadj prev_blkadj) ++{ ++ omap_writel(prev_blkadj.blue ++ | (prev_blkadj.green << ISPPRV_BLKADJOFF_G_SHIFT) ++ | (prev_blkadj.red << ISPPRV_BLKADJOFF_R_SHIFT) ++ , ISPPRV_BLKADJOFF); ++} ++EXPORT_SYMBOL(isppreview_config_blkadj); ++ ++/* ++ * Configures the RGB-RGB Blending matrix ++ * rgb2rgb: Structure containing the rgb to rgb blending matrix and the ++ * rgb offset. ++ */ ++void ++isppreview_config_rgb_blending(struct ispprev_rgbtorgb rgb2rgb) ++{ ++ omap_writel((rgb2rgb.matrix[0][0] << ISPPRV_RGB_MAT1_MTX_RR_SHIFT) ++ | (rgb2rgb.matrix[0][1] << ISPPRV_RGB_MAT1_MTX_GR_SHIFT), ++ ISPPRV_RGB_MAT1); ++ ++ omap_writel((rgb2rgb.matrix[0][2] << ISPPRV_RGB_MAT2_MTX_BR_SHIFT) ++ | (rgb2rgb.matrix[1][0] << ISPPRV_RGB_MAT2_MTX_RG_SHIFT), ++ ISPPRV_RGB_MAT2); ++ ++ omap_writel((rgb2rgb.matrix[1][1] << ISPPRV_RGB_MAT3_MTX_GG_SHIFT) ++ | (rgb2rgb.matrix[1][2] << ISPPRV_RGB_MAT3_MTX_BG_SHIFT), ++ ISPPRV_RGB_MAT3); ++ ++ omap_writel((rgb2rgb.matrix[2][0] << ISPPRV_RGB_MAT4_MTX_RB_SHIFT) ++ | (rgb2rgb.matrix[2][1] << ISPPRV_RGB_MAT4_MTX_GB_SHIFT), ++ ISPPRV_RGB_MAT4); ++ ++ omap_writel((rgb2rgb.matrix[2][2] << ISPPRV_RGB_MAT5_MTX_BB_SHIFT), ++ ISPPRV_RGB_MAT5); ++ ++ omap_writel((rgb2rgb.offset[0] << ISPPRV_RGB_OFF1_MTX_OFFG_SHIFT) ++ | (rgb2rgb.offset[1] << ISPPRV_RGB_OFF1_MTX_OFFR_SHIFT), ++ ISPPRV_RGB_OFF1); ++ ++ omap_writel(rgb2rgb.offset[2] << ISPPRV_RGB_OFF2_MTX_OFFB_SHIFT, ++ ISPPRV_RGB_OFF2); ++ ++} ++EXPORT_SYMBOL(isppreview_config_rgb_blending); ++ ++/* ++ * Configures the RGB-YCbYCr conversion matrix ++ * prev_csc: Structure containing the RGB to YCbYCr matrix and the ++ * YCbCr offset. ++ */ ++void ++isppreview_config_rgb_to_ycbcr(struct ispprev_csc prev_csc) ++{ ++ omap_writel(prev_csc.matrix[0][0] << ISPPRV_CSC0_RY_SHIFT ++ | prev_csc.matrix[0][1] << ISPPRV_CSC0_GY_SHIFT ++ | prev_csc.matrix[0][2] << ISPPRV_CSC0_BY_SHIFT, ++ ISPPRV_CSC0); ++ ++ omap_writel(prev_csc.matrix[1][0] << ISPPRV_CSC1_RCB_SHIFT ++ | prev_csc.matrix[1][1] << ISPPRV_CSC1_GCB_SHIFT ++ | prev_csc.matrix[1][2] << ISPPRV_CSC1_BCB_SHIFT, ++ ISPPRV_CSC1); ++ ++ omap_writel(prev_csc.matrix[2][0] << ISPPRV_CSC2_RCR_SHIFT ++ | prev_csc.matrix[2][1] << ISPPRV_CSC2_GCR_SHIFT ++ | prev_csc.matrix[2][2] << ISPPRV_CSC2_BCR_SHIFT, ++ ISPPRV_CSC2); ++ ++ omap_writel(prev_csc.offset[0] << ISPPRV_CSC_OFFSET_CR_SHIFT ++ | prev_csc.offset[1] << ISPPRV_CSC_OFFSET_CB_SHIFT ++ | prev_csc.offset[2] << ISPPRV_CSC_OFFSET_Y_SHIFT, ++ ISPPRV_CSC_OFFSET); ++} ++EXPORT_SYMBOL(isppreview_config_rgb_to_ycbcr); ++ ++/* ++ * Query the contrast. ++ * contrast: Pointer to hold the current programmed contrast value. ++ */ ++void ++isppreview_query_contrast(u8 *contrast) ++{ ++ u32 brt_cnt_val = 0; ++ brt_cnt_val = omap_readl(ISPPRV_CNT_BRT); ++ *contrast = (brt_cnt_val >> ISPPRV_CNT_BRT_CNT_SHIFT) & 0xFF; ++ DPRINTK_ISPPREV(" Current brt cnt value in hw is %x\n", brt_cnt_val); ++} ++EXPORT_SYMBOL(isppreview_query_contrast); ++ ++/* ++ * Updates the contrast. ++ * Value should be programmed before enabling the module. ++ */ ++void ++isppreview_update_contrast(u8 *contrast) ++{ ++ ispprev_obj.contrast = *contrast; ++} ++EXPORT_SYMBOL(isppreview_update_contrast); ++ ++/* ++ * Configures the Contrast. ++ * contrast: 8bitvalue in U8Q4 format. ++ * Value should be programmed before enabling the module. ++ */ ++void ++isppreview_config_contrast(u8 contrast) ++{ ++ u32 brt_cnt_val = 0; ++ ++ brt_cnt_val = omap_readl(ISPPRV_CNT_BRT); ++ brt_cnt_val &= ~(0xFF << ISPPRV_CNT_BRT_CNT_SHIFT); ++ contrast &= 0xFF; ++ omap_writel((brt_cnt_val)|(contrast << ISPPRV_CNT_BRT_CNT_SHIFT) ++ , ISPPRV_CNT_BRT); ++} ++EXPORT_SYMBOL(isppreview_config_contrast); ++ ++/* ++ * Gets the range contrast value ++ * min_contrast: Pointer to hold the minimum Contrast value ++ * max_contrast: Pointer to hold the maximum Contrast value ++ */ ++void ++isppreview_get_contrast_range(u8 *min_contrast, u8 *max_contrast) ++{ ++ *min_contrast = ISPPRV_CONTRAST_MIN; ++ *max_contrast = ISPPRV_CONTRAST_MAX; ++} ++EXPORT_SYMBOL(isppreview_get_contrast_range); ++ ++/* ++ * Updates the brightness in the preview module. ++ */ ++void ++isppreview_update_brightness(u8 *brightness) ++{ ++ ispprev_obj.brightness = *brightness; ++} ++EXPORT_SYMBOL(isppreview_update_brightness); ++ ++/* ++ * Configures the brightness. ++ * contrast: 8bitvalue in U8Q0 format. ++ */ ++void ++isppreview_config_brightness(u8 brightness) ++{ ++ u32 brt_cnt_val = 0; ++ DPRINTK_ISPPREV("\tConfiguring brightness in ISP: %d\n", brightness); ++ brt_cnt_val = omap_readl(ISPPRV_CNT_BRT); ++ brt_cnt_val &= ~(0xFF << ISPPRV_CNT_BRT_BRT_SHIFT); ++ brightness &= 0xFF; ++ omap_writel((brt_cnt_val)|(brightness << ISPPRV_CNT_BRT_BRT_SHIFT) ++ , ISPPRV_CNT_BRT); ++} ++EXPORT_SYMBOL(isppreview_config_brightness); ++ ++/* ++ * Query the brightness. ++ * brightness: Pointer to hold the current programmed brightness value. ++ */ ++void ++isppreview_query_brightness(u8 *brightness) ++{ ++ ++ *brightness = omap_readl(ISPPRV_CNT_BRT); ++} ++EXPORT_SYMBOL(isppreview_query_brightness); ++ ++/* ++ * Gets the range brightness value ++ * min_brightness: Pointer to hold the minimum brightness value ++ * max_brightness: Pointer to hold the maximum brightness value ++ */ ++void ++isppreview_get_brightness_range(u8 *min_brightness, u8 *max_brightness) ++{ ++ *min_brightness = ISPPRV_BRIGHT_MIN; ++ *max_brightness = ISPPRV_BRIGHT_MAX; ++} ++EXPORT_SYMBOL(isppreview_get_brightness_range); ++ ++/** ++ * @brief isppreview_set_color -- sets the color effect. ++ * @param mode -- indicates the required color effect. ++ */ ++void isppreview_set_color(u8 *mode) ++{ ++ ispprev_obj.color = *mode; ++ update_color_matrix = 1; ++} ++EXPORT_SYMBOL(isppreview_set_color); ++ ++/** ++ * @brief isppreview_get_color -- gets the current color effect. ++ * @param mode -- indicates the current color effect. ++ */ ++void isppreview_get_color(u8 *mode) ++{ ++ *mode = ispprev_obj.color; ++} ++EXPORT_SYMBOL(isppreview_get_color); ++ ++/* ++ * Configures the max and minim Y and C values. ++ * yclimit: Structure containing the min,max Y,C values. ++ */ ++void ++isppreview_config_yc_range(struct ispprev_yclimit yclimit) ++{ ++ omap_writel(((yclimit.maxC << ISPPRV_SETUP_YC_MAXC_SHIFT) ++ | (yclimit.maxY << ISPPRV_SETUP_YC_MAXY_SHIFT) ++ | (yclimit.minC << ISPPRV_SETUP_YC_MINC_SHIFT) ++ | (yclimit.minY << ISPPRV_SETUP_YC_MINY_SHIFT)) ++ , ISPPRV_SETUP_YC); ++} ++EXPORT_SYMBOL(isppreview_config_yc_range); ++ ++/* ++ * Calculates the number of pixels cropped in the submodules that are enabled, ++ * Fills up the output widht height variables in the isp_prev structure . ++ * input_w: input width for the preview in number of pixels per line ++ * input_h: input height for the preview in number of lines ++ * output_w: output width from the preview in number of pixels per line ++ * output_h: output height for the preview in number of lines ++*/ ++int ++isppreview_try_size(u32 input_w, u32 input_h, u32 *output_w, ++ u32 *output_h) ++{ ++ u32 prevout_w = input_w; ++ u32 prevout_h = input_h; ++ u32 div = 0; ++ int max_out; ++ ++ ispprev_obj.previn_w = input_w; ++ ispprev_obj.previn_h = input_h; ++ ++ /*Checks if input size is more than the preview output width limit, ++ *else suggests for downsampling in the averager. ++ */ ++ if (is_sil_rev_equal_to(OMAP3430_REV_ES1_0)) ++ max_out = ISPPRV_MAXOUTPUT_WIDTH; ++ else ++ max_out = ISPPRV_MAXOUTPUT_WIDTH_ES2; ++ ++ ispprev_obj.fmtavg = 0; ++ ++ if (input_w > max_out) { ++ div = (input_w/max_out); ++ if (div >= 2 && div < 4) { ++ ispprev_obj.fmtavg = 1; ++ prevout_w /= 2; ++ } else if (div >= 4 && div < 8) { ++ ispprev_obj.fmtavg = 2; ++ prevout_w /= 4; ++ } else if (div >= 8) { ++ ispprev_obj.fmtavg = 3; ++ prevout_w /= 8; ++ } ++ } ++ ++ if (ispprev_obj.hmed_en) ++ prevout_w -= 4; ++ if (ispprev_obj.nf_en) { ++ prevout_w -= 4; ++ prevout_h -= 4; ++ } ++ if (ispprev_obj.cfa_en) { ++ switch (ispprev_obj.cfafmt) { ++ case CFAFMT_BAYER: ++ case CFAFMT_SONYVGA: ++ prevout_w -= 4; ++ prevout_h -= 4; ++ break; ++ case CFAFMT_RGBFOVEON: ++ case CFAFMT_RRGGBBFOVEON: ++ case CFAFMT_DNSPL: ++ case CFAFMT_HONEYCOMB: ++ prevout_h -= 2; ++ break; ++ }; ++ } ++ if ((ispprev_obj.yenh_en) || (ispprev_obj.csup_en)) ++ prevout_w -= 2; ++ ++ /* FMTSPH is always set to be 4 */ ++ prevout_w -= 4; ++ /* Reserving for now, another 2 extra pixels from Preview to Resizer ++ prevout_w -=2;*/ ++ ++ /* ++ * Make sure that preview always outputs even number of pixels ++ */ ++ if (prevout_w % 2) ++ prevout_w -= 1; ++ ++ if (ispprev_obj.prev_outfmt == PREVIEW_MEM) { ++ if (((prevout_w*2)&ISP_32B_BOUNDARY_OFFSET) != (prevout_w*2)) ++ prevout_w = ((prevout_w*2)&ISP_32B_BOUNDARY_OFFSET)/2; ++ } ++ ispprev_obj.prevout_w = *output_w = prevout_w; ++ ispprev_obj.prevout_h = *output_h = prevout_h; ++ return 0; ++} ++EXPORT_SYMBOL(isppreview_try_size); ++ ++/* ++ * Configures the appropriate values stored in the isp_prev structure to ++ * HORZ/VERT_INFO. ++ * Configures PRV_AVE if needed for downsampling as calculated in trysize. ++ * input_w: input width for the preview in number of pixels per line ++ * input_h: input height for the preview in number of lines ++ * output_w: output width from the preview in number of pixels per line ++ * output_h: output height for the preview in number of lines ++ */ ++int ++isppreview_config_size(u32 input_w, u32 input_h, u32 output_w, ++ u32 output_h) ++{ ++ u32 prevsdroff; ++ ++ /* Checks if the parameters match the values calculated in the ++ * isppreview_try_size(). If not return error. ++ */ ++ if ((output_w != ispprev_obj.prevout_w) ++ || (output_h != ispprev_obj.prevout_h)) { ++ printk(KERN_ERR "ISP_ERR : isppreview_try_size should " ++ "be called before config size\n"); ++ return -EINVAL; ++ } ++ ++ omap_writel((4 << ISPPRV_HORZ_INFO_SPH_SHIFT) | ++ (ispprev_obj.previn_w - 1), ++ ISPPRV_HORZ_INFO); ++ omap_writel((0 << ISPPRV_VERT_INFO_SLV_SHIFT) | ++ (ispprev_obj.previn_h - 1), ++ ISPPRV_VERT_INFO); ++ ++ if (ispprev_obj.cfafmt == CFAFMT_BAYER) ++ omap_writel(ISPPRV_AVE_EVENDIST_2 << ISPPRV_AVE_EVENDIST_SHIFT ++ | ISPPRV_AVE_ODDDIST_2 << ISPPRV_AVE_ODDDIST_SHIFT ++ | ispprev_obj.fmtavg, ++ ISPPRV_AVE); ++ ++ /* When written to memory output should be of 32byte boundary */ ++ if (ispprev_obj.prev_outfmt == PREVIEW_MEM) { ++ prevsdroff = ispprev_obj.prevout_w*2; ++ if ((prevsdroff & ISP_32B_BOUNDARY_OFFSET) != prevsdroff) { ++ DPRINTK_ISPPREV("ISP_WARN : Preview output buffer line" ++ " size is truncated to 32byte boundary\n"); ++ prevsdroff &= ISP_32B_BOUNDARY_BUF ; ++ } ++ isppreview_config_outlineoffset(prevsdroff); ++ } ++ return 0; ++} ++EXPORT_SYMBOL(isppreview_config_size); ++ ++/* ++ * Configures the Read address line offset. ++ * offset: Line Offset for the input image. ++ */ ++int ++isppreview_config_inlineoffset(u32 offset) ++{ ++ if ((offset & ISP_32B_BOUNDARY_OFFSET) == offset) ++ omap_writel(offset&0xFFFF, ISPPRV_RADR_OFFSET); ++ else{ ++ printk(KERN_ERR "ISP_ERR : Offset should be in 32 byte " ++ "boundary\n"); ++ return -EINVAL; ++ } ++ return 0; ++} ++EXPORT_SYMBOL(isppreview_config_inlineoffset); ++ ++/* ++ * Configures the memory address from which the input frame is to be read. ++ * addr: 32bit memory address aligned on 32byte boundary. ++ */ ++int isppreview_set_inaddr(u32 addr) ++{ ++ if ((addr & ISP_32B_BOUNDARY_BUF) == addr) ++ omap_writel(addr, ISPPRV_RSDR_ADDR); ++ else{ ++ printk(KERN_ERR "ISP_ERR : Address should be in 32 byte " ++ "boundary\n"); ++ return -EINVAL; ++ } ++ return 0; ++} ++EXPORT_SYMBOL(isppreview_set_inaddr); ++ ++/* ++ * Configures the Write address line offset. ++ * offset: Line Offset for the preview output. ++ */ ++int isppreview_config_outlineoffset(u32 offset) ++{ ++ if ((offset & ISP_32B_BOUNDARY_OFFSET) == offset) { ++ omap_writel(offset&0xFFFF, ISPPRV_WADD_OFFSET); ++ } ++ else{ ++ printk(KERN_ERR "ISP_ERR : Offset should be in 32 byte " ++ "boundary\n"); ++ return -EINVAL; ++ } ++ return 0; ++} ++EXPORT_SYMBOL(isppreview_config_outlineoffset); ++ ++/* ++ * Configures the memory address to which the output frame is written. ++ * addr: 32bit memory address aligned on 32byte boundary. ++ */ ++int ++isppreview_set_outaddr(u32 addr) ++{ ++ if ((addr & ISP_32B_BOUNDARY_BUF) == addr) { ++ omap_writel(addr, ISPPRV_WSDR_ADDR); ++ } else { ++ printk(KERN_ERR "ISP_ERR : Address should be in 32 byte " ++ "boundary\n"); ++ return -EINVAL; ++ } ++ return 0; ++} ++EXPORT_SYMBOL(isppreview_set_outaddr); ++ ++/* ++ * Configures the Dark frame address line offset. ++ * offset: Line Offset for the Darkframe. ++ */ ++int ++isppreview_config_darklineoffset(u32 offset) ++{ ++ if ((offset & ISP_32B_BOUNDARY_OFFSET) == offset) ++ omap_writel(offset&0xFFFF, ISPPRV_DRKF_OFFSET); ++ else{ ++ printk(KERN_ERR "ISP_ERR : Offset should be in 32 byte " ++ "boundary\n"); ++ return -EINVAL; ++ } ++ return 0; ++} ++EXPORT_SYMBOL(isppreview_config_darklineoffset); ++ ++/* ++ * Configures the memory address where the Dark frame should be stored. ++ * addr: 32bit memory address aligned on 32 bit boundary. ++ */ ++int ++isppreview_set_darkaddr(u32 addr) ++{ ++ if ((addr & ISP_32B_BOUNDARY_BUF) == addr) ++ omap_writel(addr, ISPPRV_DSDR_ADDR); ++ else{ ++ printk(KERN_ERR "ISP_ERR : Address should be in 32 byte " ++ "boundary\n"); ++ return -EINVAL; ++ } ++ return 0; ++} ++EXPORT_SYMBOL(isppreview_set_darkaddr); ++ ++/* ++ * ++ * Enables the Preview module. ++ * Client should configure all the sub modules in Preview before this. ++ * enable: 1- Enables the preview module. ++ */ ++void ++isppreview_enable(u8 enable) ++{ ++ ++ if (enable) ++ omap_writel((omap_readl(ISPPRV_PCR)) ++ | ISPPRV_PCR_EN, ISPPRV_PCR); ++ else ++ omap_writel((omap_readl(ISPPRV_PCR)) ++ & ~ISPPRV_PCR_EN, ISPPRV_PCR); ++} ++EXPORT_SYMBOL(isppreview_enable); ++ ++int isppreview_busy(void) ++{ ++ return (omap_readl(ISPPRV_PCR) & ISPPRV_PCR_BUSY); ++} ++EXPORT_SYMBOL(isppreview_busy); ++ ++struct prev_params *isppreview_get_config(void) ++{ ++ return prev_config_params; ++} ++EXPORT_SYMBOL(isppreview_get_config); ++ ++/* ++ * Saves the values of the preview module registers. ++ */ ++void isppreview_save_context(void) ++{ ++ DPRINTK_ISPPREV(" Saving context\n"); ++ isp_save_context(ispprev_reg_list); ++} ++EXPORT_SYMBOL(isppreview_save_context); ++ ++/* ++ * Restores the values of the preview module registers. ++ */ ++void isppreview_restore_context(void) ++{ ++ DPRINTK_ISPPREV(" Restoring context\n"); ++ isp_restore_context(ispprev_reg_list); ++} ++EXPORT_SYMBOL(isppreview_restore_context); ++ ++/* ++ * Prints the values of the Preview Module registers ++ * Also prints other debug information stored in the preview moduel ++ */ ++void isppreview_print_status(void) ++{ ++#ifdef OMAP_ISPPREV_DEBUG ++ printk("Module in use =%d\n", ispprev_obj.prev_inuse); ++ DPRINTK_ISPPREV("Preview Input format =%d, Output Format =%d\n", ++ ispprev_obj.prev_inpfmt, ++ ispprev_obj.prev_outfmt); ++ DPRINTK_ISPPREV("Accepted Preview Input (width = %d,Height = %d)\n", ++ ispprev_obj.previn_w, ++ ispprev_obj.previn_h); ++ DPRINTK_ISPPREV("Accepted Preview Output (width = %d,Height = %d)\n", ++ ispprev_obj.prevout_w, ++ ispprev_obj.prevout_h); ++ DPRINTK_ISPPREV("###ISP_CTRL in preview =0x%x\n", ++ omap_readl(ISP_CTRL)); ++ DPRINTK_ISPPREV("###ISP_IRQ0ENABLE in preview =0x%x\n", ++ omap_readl(ISP_IRQ0ENABLE)); ++ DPRINTK_ISPPREV("###ISP_IRQ0STATUS in preview =0x%x\n", ++ omap_readl(ISP_IRQ0STATUS)); ++ DPRINTK_ISPPREV("###PRV PCR =0x%x\n", omap_readl(ISPPRV_PCR)); ++ DPRINTK_ISPPREV("###PRV HORZ_INFO =0x%x\n", ++ omap_readl(ISPPRV_HORZ_INFO)); ++ DPRINTK_ISPPREV("###PRV VERT_INFO =0x%x\n", ++ omap_readl(ISPPRV_VERT_INFO)); ++ DPRINTK_ISPPREV("###PRV WSDR_ADDR =0x%x\n", ++ omap_readl(ISPPRV_WSDR_ADDR)); ++ DPRINTK_ISPPREV("###PRV WADD_OFFSET =0x%x\n", ++ omap_readl(ISPPRV_WADD_OFFSET)); ++ DPRINTK_ISPPREV("###PRV AVE =0x%x\n", omap_readl(ISPPRV_AVE)); ++ DPRINTK_ISPPREV("###PRV HMED =0x%x\n", omap_readl(ISPPRV_HMED)); ++ DPRINTK_ISPPREV("###PRV NF =0x%x\n", omap_readl(ISPPRV_NF)); ++ DPRINTK_ISPPREV("###PRV WB_DGAIN =0x%x\n", ++ omap_readl(ISPPRV_WB_DGAIN)); ++ DPRINTK_ISPPREV("###PRV WBGAIN =0x%x\n", omap_readl(ISPPRV_WBGAIN)); ++ DPRINTK_ISPPREV("###PRV WBSEL =0x%x\n", omap_readl(ISPPRV_WBSEL)); ++ DPRINTK_ISPPREV("###PRV CFA =0x%x\n", omap_readl(ISPPRV_CFA)); ++ DPRINTK_ISPPREV("###PRV BLKADJOFF =0x%x\n", ++ omap_readl(ISPPRV_BLKADJOFF)); ++ DPRINTK_ISPPREV("###PRV RGB_MAT1 =0x%x\n", ++ omap_readl(ISPPRV_RGB_MAT1)); ++ DPRINTK_ISPPREV("###PRV RGB_MAT2 =0x%x\n", ++ omap_readl(ISPPRV_RGB_MAT2)); ++ DPRINTK_ISPPREV("###PRV RGB_MAT3 =0x%x\n", ++ omap_readl(ISPPRV_RGB_MAT3)); ++ DPRINTK_ISPPREV("###PRV RGB_MAT4 =0x%x\n", ++ omap_readl(ISPPRV_RGB_MAT4)); ++ DPRINTK_ISPPREV("###PRV RGB_MAT5 =0x%x\n", ++ omap_readl(ISPPRV_RGB_MAT5)); ++ DPRINTK_ISPPREV("###PRV RGB_OFF1 =0x%x\n", ++ omap_readl(ISPPRV_RGB_OFF1)); ++ DPRINTK_ISPPREV("###PRV RGB_OFF2 =0x%x\n", ++ omap_readl(ISPPRV_RGB_OFF2)); ++ DPRINTK_ISPPREV("###PRV CSC0 =0x%x\n", omap_readl(ISPPRV_CSC0)); ++ DPRINTK_ISPPREV("###PRV CSC1 =0x%x\n", omap_readl(ISPPRV_CSC1)); ++ DPRINTK_ISPPREV("###PRV CSC2 =0x%x\n", omap_readl(ISPPRV_CSC2)); ++ DPRINTK_ISPPREV("###PRV CSC_OFFSET =0x%x\n", ++ omap_readl(ISPPRV_CSC_OFFSET)); ++ DPRINTK_ISPPREV("###PRV CNT_BRT =0x%x\n", omap_readl(ISPPRV_CNT_BRT)); ++ DPRINTK_ISPPREV("###PRV CSUP =0x%x\n", omap_readl(ISPPRV_CSUP)); ++ DPRINTK_ISPPREV("###PRV SETUP_YC =0x%x\n", ++ omap_readl(ISPPRV_SETUP_YC)); ++#endif ++} ++EXPORT_SYMBOL(isppreview_print_status); ++ ++/* ++ * Module Initialisation. ++ */ ++static int __init ++isp_preview_init(void) ++{ ++ struct prev_params *params; ++ int i = 0; ++ ++ prev_config_params = kmalloc(sizeof(*prev_config_params), GFP_KERNEL); ++ if (prev_config_params == NULL) { ++ printk(KERN_ERR "Can't get memory for isp_preview params!\n"); ++ return -ENOMEM; ++ } ++ params = prev_config_params; ++ ++ ispprev_obj.prev_inuse = 0; ++ mutex_init(&ispprev_obj.ispprev_mutex); ++ ++ if (is_sil_rev_equal_to(OMAP3430_REV_ES2_0)) { ++ flr_wbal_coef0 = 0x23; ++ flr_wbal_coef1 = 0x20; ++ flr_wbal_coef2 = 0x20; ++ flr_wbal_coef3 = 0x39; ++ } ++ ++ /* Init values */ ++ ispprev_obj.color = PREV_DEFAULT_COLOR; ++ params->contrast = ispprev_obj.contrast = ISPPRV_CONTRAST_DEF; ++ params->brightness = ispprev_obj.brightness = ISPPRV_BRIGHT_DEF; ++ params->average = NO_AVE; ++ params->lens_shading_shift = 0; ++ params->pix_fmt = YCPOS_YCrYCb; ++ /* Color Filter Array */ ++ params->cfa.cfafmt = CFAFMT_BAYER; ++ params->cfa.cfa_table = cfa_coef_table; ++ params->cfa.cfa_gradthrs_horz = flr_cfa_gradthrs_horz; ++ params->cfa.cfa_gradthrs_vert = flr_cfa_gradthrs_vert; ++ /* Chroma Suppression */ ++ params->csup.gain = flr_csup_gain; ++ params->csup.thres = flr_csup_thres; ++ params->csup.hypf_en = 0; ++ /* Lumma Enhancement Table */ ++ params->ytable = luma_enhance_table; ++ /* Noise Filter */ ++ params->nf.spread = flr_nf_strgth; ++ params->nf.table = noise_filter_table; ++ /* defect correction */ ++ params->dcor.couplet_mode_en = 1; ++ for (i = 0; i < 4; i++) ++ params->dcor.detect_correct[i] = 0xE; ++ /* Gamma Correction */ ++ params->gtable.bluetable = bluegamma_table; ++ params->gtable.greentable = greengamma_table; ++ params->gtable.redtable = redgamma_table; ++ /* White Balance */ ++ params->wbal.dgain = flr_wbal_dgain; ++ params->wbal.coef0 = flr_wbal_coef0; ++ params->wbal.coef1 = flr_wbal_coef1; ++ params->wbal.coef2 = flr_wbal_coef2; ++ params->wbal.coef3 = flr_wbal_coef3; ++ /* Black Adjustment */ ++ params->blk_adj.red = flr_blkadj_red; ++ params->blk_adj.green = flr_blkadj_green; ++ params->blk_adj.blue = flr_blkadj_blue; ++ /* RGB to RGB Blending */ ++ params->rgb2rgb = flr_rgb2rgb; ++ /* RGB to YCbCr Blending */ ++ params->rgb2ycbcr = flr_prev_csc[ispprev_obj.color]; ++ ++ /* Features enabled by default */ ++ params->features = PREV_CFA | PREV_CHROMA_SUPPRESS | PREV_LUMA_ENHANCE ++ | PREV_DEFECT_COR | PREV_NOISE_FILTER; ++ params->features &= ~(PREV_AVERAGER | PREV_INVERSE_ALAW | ++ PREV_HORZ_MEDIAN_FILTER | ++ PREV_GAMMA_BYPASS | ++ PREV_DARK_FRAME_SUBTRACT | ++ PREV_LENS_SHADING | ++ PREV_DARK_FRAME_CAPTURE); ++ return 0; ++} ++ ++static void ++isp_preview_cleanup(void) ++{ ++ kfree(prev_config_params); ++ prev_config_params = NULL; ++} ++ ++module_init(isp_preview_init); ++module_exit(isp_preview_cleanup); ++ ++MODULE_AUTHOR("Texas Instruments"); ++MODULE_DESCRIPTION("ISP Preview Library"); ++MODULE_LICENSE("GPL"); +Index: git/drivers/media/video/isp/isppreview.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ git/drivers/media/video/isp/isppreview.h 2009-02-12 16:32:50.000000000 -0600 +@@ -0,0 +1,525 @@ ++/* ++ * drivers/media/video/isp/isppreview.h ++ * ++ * Driver include file for Preview module in TI's OMAP3430 Camera ISP ++ * ++ * Copyright (C) 2008 Texas Instruments, Inc. ++ * ++ * This package is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ * ++ * THIS PACKAGE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR ++ * IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED ++ * WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE. ++ */ ++ ++#ifndef OMAP_ISP_PREVIEW_H ++#define OMAP_ISP_PREVIEW_H ++ ++/* Isp query control structure */ ++ ++#define ISPPRV_BRIGHT_STEP 0x1 ++#define ISPPRV_BRIGHT_DEF 0x1 ++#define ISPPRV_BRIGHT_LOW 0x0 ++#define ISPPRV_BRIGHT_HIGH 0xF ++#define ISPPRV_BRIGHT_UNITS 0x7 ++ ++#define ISPPRV_CONTRAST_STEP 0x1 ++#define ISPPRV_CONTRAST_DEF 0x2 ++#define ISPPRV_CONTRAST_LOW 0x0 ++#define ISPPRV_CONTRAST_HIGH 0xF ++#define ISPPRV_CONTRAST_UNITS 0x5 ++ ++#define NO_AVE 0x0 ++#define AVE_2_PIX 0x1 ++#define AVE_4_PIX 0x2 ++#define AVE_8_PIX 0x3 ++#define AVE_ODD_PIXEL_DIST (1 << 4) /* For Bayer Sensors */ ++#define AVE_EVEN_PIXEL_DIST (1 << 2) ++ ++#define WB_GAIN_MAX 4 ++#define RGB_MAX 3 ++ ++/* Features list */ ++#define PREV_AVERAGER (1 << 0) ++#define PREV_INVERSE_ALAW (1 << 1) ++#define PREV_HORZ_MEDIAN_FILTER (1 << 2) ++#define PREV_NOISE_FILTER (1 << 3) ++#define PREV_CFA (1 << 4) ++#define PREV_GAMMA_BYPASS (1 << 5) ++#define PREV_LUMA_ENHANCE (1 << 6) ++#define PREV_CHROMA_SUPPRESS (1 << 7) ++#define PREV_DARK_FRAME_SUBTRACT (1 << 8) ++#define PREV_LENS_SHADING (1 << 9) ++#define PREV_DARK_FRAME_CAPTURE (1 << 10) ++#define PREV_DEFECT_COR (1 << 11) ++ ++/* Abstraction layer preview configurations */ ++#define ISP_ABS_PREV_LUMAENH (1 << 1) ++#define ISP_ABS_PREV_INVALAW (1 << 2) ++#define ISP_ABS_PREV_HRZ_MED (1 << 5) ++#define ISP_ABS_PREV_CFA (1 << 6) ++#define ISP_ABS_PREV_CHROMA_SUPP (1 << 7) ++#define ISP_ABS_PREV_WB (1 << 8) ++#define ISP_ABS_PREV_BLKADJ (1 << 9) ++#define ISP_ABS_PREV_RGB2RGB (1 << 10) ++#define ISP_ABS_PREV_COLOR_CONV (1 << 11) ++#define ISP_ABS_PREV_YC_LIMIT (1 << 12) ++#define ISP_ABS_PREV_DEFECT_COR (1 << 13) ++#define ISP_ABS_PREV_GAMMABYPASS (1 << 14) ++ ++/* Abstraction layer Table Update Flags */ ++#define ISP_ABS_TBL_NF (1 << 1) ++#define ISP_ABS_TBL_REDGAMMA (1 << 2) ++#define ISP_ABS_TBL_GREENGAMMA (1 << 3) ++#define ISP_ABS_TBL_BLUEGAMMA (1 << 4) ++ ++#define ISP_NF_TABLE_SIZE 64 ++#define ISP_GAMMA_TABLE_SIZE 1024 ++ ++/* ++ *Enumeration Constants for input and output format ++ */ ++enum preview_input { ++ PRV_RAW_CCDC, ++ PRV_RAW_MEM, ++ PRV_RGBBAYERCFA, ++ PRV_COMPCFA, ++ PRV_CCDC_DRKF, ++ PRV_OTHERS ++}; ++ ++enum preview_output { ++ PREVIEW_RSZ, ++ PREVIEW_MEM ++}; ++/* ++ * Configure byte layout of YUV image ++ */ ++enum preview_ycpos_mode { ++ YCPOS_YCrYCb = 0, ++ YCPOS_YCbYCr = 1, ++ YCPOS_CbYCrY = 2, ++ YCPOS_CrYCbY = 3 ++}; ++ ++enum preview_color_effect { ++ PREV_DEFAULT_COLOR = 0, ++ PREV_BW_COLOR = 1, ++ PREV_SEPIA_COLOR = 2 ++}; ++ ++/** ++ * struct ispprev_hmed - Structure for Horizontal Median Filter. ++ * @odddist: Distance between consecutive pixels of same color in the odd line. ++ * @evendist: Distance between consecutive pixels of same color in the even ++ * line. ++ * @thres: Horizontal median filter threshold. ++ */ ++struct ispprev_hmed { ++ u8 odddist; ++ u8 evendist; ++ u8 thres; ++}; ++ ++/* ++ * Structure for Noise Filter ++ */ ++struct ispprev_nf { ++ /* Spread value to be used in Noise Filter*/ ++ u8 spread; ++ /*Pointer to the Noise Filter table */ ++ u32 *table; ++}; ++ ++/* ++ * Structure for Defect correction ++ */ ++struct ispprev_dcor { ++ /* Flag to enable or disable the couplet dc Correction in NF*/ ++ u8 couplet_mode_en; ++ /* Thresholds for correction bit 0:10 detect 16:25 correct*/ ++ u32 detect_correct[4]; ++}; ++ ++ ++ ++/* ++ * Enumeration for CFA Formats supported by preview ++ */ ++enum cfa_fmt { ++ CFAFMT_BAYER, CFAFMT_SONYVGA, CFAFMT_RGBFOVEON, ++ CFAFMT_DNSPL, CFAFMT_HONEYCOMB, CFAFMT_RRGGBBFOVEON ++}; ++/* ++ * Structure for CFA Inpterpolation ++ */ ++struct ispprev_cfa { ++ /* CFA Format Enum value supported by preview.*/ ++ enum cfa_fmt cfafmt; ++ /* CFA Gradient Threshold - Vertical */ ++ u8 cfa_gradthrs_vert; ++ /* CFA Gradient Threshold - Horizontal */ ++ u8 cfa_gradthrs_horz; ++ /* Pointer to the CFA table */ ++ u32 *cfa_table; ++}; ++/* ++ * Structure for Gamma Correction ++ */ ++struct ispprev_gtable { ++ /* Pointer to the red gamma table */ ++ u32 *redtable; ++ /* Pointer to the green gamma table */ ++ u32 *greentable; ++ /* Pointer to the blue gamma table */ ++ u32 *bluetable; ++}; ++/* ++ * Structure for Chrominance Suppression ++ */ ++struct ispprev_csup { ++ /* Gain */ ++ u8 gain; ++ /* Threshold */ ++ u8 thres; ++ /* Flag to enable/disable the High Pass Filter */ ++ u8 hypf_en; ++}; ++/* ++ * Structure for White Balance ++ */ ++struct ispprev_wbal { ++ /*Digital gain (U10Q8) */ ++ u16 dgain; ++ /*White balance gain - COEF 3 (U8Q5) */ ++ u8 coef3; ++ /*White balance gain - COEF 2 (U8Q5) */ ++ u8 coef2; ++ /*White balance gain - COEF 1 (U8Q5) */ ++ u8 coef1; ++ /*White balance gain - COEF 0 (U8Q5) */ ++ u8 coef0; ++}; ++ ++struct prev_white_balance { ++ u16 wb_dgain; /* white balance common gain */ ++ u8 wb_gain[WB_GAIN_MAX]; /* individual color gains */ ++ u8 wb_coefmatrix[WB_GAIN_MAX][WB_GAIN_MAX]; ++}; ++/* ++ * Structure for Black Adjustment ++ */ ++struct ispprev_blkadj { ++ /*Black level offset adjustment for Red in 2's complement format */ ++ u8 red; ++ /*Black level offset adjustment for Green in 2's complement format */ ++ u8 green; ++ /* Black level offset adjustment for Blue in 2's complement format */ ++ u8 blue; ++}; ++/* ++ * Structure for RGB to RGB Blending ++ */ ++struct ispprev_rgbtorgb { ++ /* ++ * Blending values(S12Q8 format) ++ * [RR] [GR] [BR] ++ * [RG] [GG] [BG] ++ * [RB] [GB] [BB] ++ */ ++ u16 matrix[3][3]; ++ /*Blending offset value for R,G,B in 2's complement integer format*/ ++ u16 offset[3]; ++}; ++/* ++ * Structure for Color Space Conversion from RGB-YCbYCr ++ */ ++struct ispprev_csc { ++ /* ++ *Color space conversion coefficients(S10Q8) ++ * [CSCRY] [CSCGY] [CSCBY] ++ * [CSCRCB] [CSCGCB] [CSCBCB] ++ * [CSCRCR] [CSCGCR] [CSCBCR] ++ */ ++ u16 matrix[RGB_MAX][RGB_MAX]; ++ /* ++ *CSC offset values for Y offset, CB offset and CR offset respectively ++ */ ++ s16 offset[RGB_MAX]; ++}; ++/* ++ * Structure for Y, C Value Limit ++ */ ++struct ispprev_yclimit{ ++ u8 minC; ++ u8 maxC; ++ u8 minY; ++ u8 maxY; ++}; ++ ++/* ++ * Structure for size parameters ++ */ ++struct prev_size_params { ++ unsigned int hstart; /* Starting pixel */ ++ unsigned int vstart; /* Starting line */ ++ unsigned int hsize; /* width of input image */ ++ unsigned int vsize; /* height of input image */ ++ unsigned char pixsize; /* pixel size of the image in ++ terms of bits */ ++ unsigned short in_pitch; /* line offset of input image */ ++ unsigned short out_pitch; /* line offset of output image */ ++}; ++ ++/* ++ * Structure RGB2YCbCr parameters ++ */ ++struct prev_rgb2ycbcr_coeffs { ++ short coeff[RGB_MAX][RGB_MAX]; /* color conversion gains in ++ 3x3 matrix */ ++ short offset[RGB_MAX]; /* color conversion offsets */ ++}; ++ ++/* ++ * Structure for Dark frame suppression ++ */ ++struct prev_darkfrm_params { ++ u32 addr; /* memory start address */ ++ u32 offset; /* line offset */ ++}; ++ ++ ++/* ++ * Structure for all configuration ++ */ ++struct prev_params { ++ u16 features; /* Set of features enabled */ ++ ++ enum preview_ycpos_mode pix_fmt; /* output pixel format */ ++ ++ struct ispprev_cfa cfa; /* CFA coefficients */ ++ ++ struct ispprev_csup csup; /* chroma suppression coefficients */ ++ ++ u32 *ytable; /* luma enhancement coeffs */ ++ ++ struct ispprev_nf nf; /* noise filter coefficients */ ++ ++ struct ispprev_dcor dcor; /* noise filter coefficients */ ++ ++ struct ispprev_gtable gtable; /* gamma coefficients */ ++ ++ struct ispprev_wbal wbal; ++ /* ++ struct prev_white_balance prev_wbal; ++ */ ++ struct ispprev_blkadj blk_adj; /* black adjustment parameters */ ++ ++ struct ispprev_rgbtorgb rgb2rgb; /* rgb blending parameters */ ++ ++ struct ispprev_csc rgb2ycbcr; /* rgb to ycbcr parameters */ ++ ++ struct ispprev_hmed hmf_params; /* horizontal median filter */ ++ ++ struct prev_size_params size_params; /* size parameters */ ++ struct prev_darkfrm_params drkf_params; ++ u8 lens_shading_shift; ++ u8 average; /* down sampling rate for averager */ ++ ++ u8 contrast; /* contrast */ ++ u8 brightness; /* brightness */ ++}; ++ ++/** ++ * struct ispprv_update_config - Structure for Preview Configuration (user). ++ * @update: Specifies which ISP Preview registers should be updated. ++ * @flag: Specifies which ISP Preview functions should be enabled. ++ * @yen: Pointer to luma enhancement table. ++ * @shading_shift: 3bit value of shift used in shading compensation. ++ * @prev_hmed: Pointer to structure containing the odd and even distance. ++ * between the pixels in the image along with the filter threshold. ++ * @prev_cfa: Pointer to structure containing the CFA interpolation table, CFA. ++ * format in the image, vertical and horizontal gradient threshold. ++ * @csup: Pointer to Structure for Chrominance Suppression coefficients. ++ * @prev_wbal: Pointer to structure for White Balance. ++ * @prev_blkadj: Pointer to structure for Black Adjustment. ++ * @rgb2rgb: Pointer to structure for RGB to RGB Blending. ++ * @prev_csc: Pointer to structure for Color Space Conversion from RGB-YCbYCr. ++ * @yclimit: Pointer to structure for Y, C Value Limit. ++ * @prev_dcor: Pointer to structure for defect correction. ++ */ ++struct ispprv_update_config { ++ u16 update; ++ u16 flag; ++ void *yen; ++ u32 shading_shift; ++ struct ispprev_hmed *prev_hmed; ++ struct ispprev_cfa *prev_cfa; ++ struct ispprev_csup *csup; ++ struct ispprev_wbal *prev_wbal; ++ struct ispprev_blkadj *prev_blkadj; ++ struct ispprev_rgbtorgb *rgb2rgb; ++ struct ispprev_csc *prev_csc; ++ struct ispprev_yclimit *yclimit; ++ struct ispprev_dcor *prev_dcor; ++}; ++ ++/** ++ * struct isptables_update - Structure for Table Configuration. ++ * @update: Specifies which tables should be updated. ++ * @flag: Specifies which tables should be enabled. ++ * @lsc_cfg: Pointer to structure for LSC configuration. ++ * @prev_nf: Pointer to structure for Noise Filter ++ * @lsc: Pointer to LSC gain table. (currently not used) ++ * @red_gamma: Pointer to red gamma correction table. ++ * @green_gamma: Pointer to green gamma correction table. ++ * @blue_gamma: Pointer to blue gamma correction table. ++ */ ++struct isptables_update { ++ u16 update; ++ u16 flag; ++ struct ispprev_nf *prev_nf; ++ u32 *lsc; ++ u32 *red_gamma; ++ u32 *green_gamma; ++ u32 *blue_gamma; ++}; ++ ++void isppreview_config_shadow_registers(void); ++ ++#include <linux/autoconf.h> ++#ifdef CONFIG_VIDEO_OMAP34XX_ISP_PREVIEWER ++int isppreview_request(void); ++ ++int isppreview_free(void); ++ ++int isppreview_config_datapath(enum preview_input input, ++ enum preview_output output); ++ ++void isppreview_config_ycpos(enum preview_ycpos_mode mode); ++ ++void isppreview_set_color(u8 *mode); ++ ++void isppreview_get_color(u8 *mode); ++ ++void isppreview_query_contrast(u8 *contrast); ++ ++void isppreview_query_brightness(u8 *brightness); ++ ++int isppreview_try_size(u32 input_w, u32 input_h, u32 *output_w, u32 *output_h); ++ ++int isppreview_config_size(u32 input_w, u32 input_h, u32 output_w, ++ u32 output_h); ++ ++void isppreview_update_contrast(u8 *contrast); ++ ++void isppreview_update_brightness(u8 *brightness); ++ ++int isppreview_busy(void); ++ ++void isppreview_save_context(void); ++ ++void isppreview_restore_context(void); ++ ++int omap34xx_isp_preview_config(void *userspace_add); ++ ++int omap34xx_isp_tables_update(void *userspace_add); ++ ++#else ++static inline int isppreview_request(void) { return 0;} ++static inline int isppreview_free(void) { return 0;} ++static inline int isppreview_config_datapath(enum preview_input input, ++ enum preview_output output) { return 0;} ++static inline void isppreview_config_ycpos(enum preview_ycpos_mode mode) {} ++static inline void isppreview_set_color(u8 *mode) {} ++static inline void isppreview_get_color(u8 *mode) {} ++static inline void isppreview_query_brightness(u8 *brightness) {} ++static inline void isppreview_query_contrast(u8 *contrast){} ++static inline int isppreview_try_size(u32 input_w, u32 input_h, u32 *output_w, u32 *output_h){ return 0;} ++static inline int isppreview_config_size(u32 input_w, u32 input_h, u32 output_w, u32 output_h) {return 0;} ++static inline void isppreview_update_contrast(u8 *contrast) {} ++static inline void isppreview_update_brightness(u8 *brightness) {} ++static inline int isppreview_busy(void){return 0;} ++static inline int omap34xx_isp_preview_config(void *userspace_add){return 0;} ++static inline int omap34xx_isp_tables_update(void *userspace_add){return 0;} ++static inline void isppreview_save_context(void) {} ++static inline void isppreview_restore_context(void) {} ++#endif ++ ++void isppreview_config_averager(u8 average); ++ ++void isppreview_enable_invalaw(u8 enable); ++ ++void isppreview_enable_drkframe(u8 enable); ++ ++void isppreview_enable_shadcomp(u8 enable); ++ ++void isppreview_config_drkf_shadcomp(u8 scomp_shtval); ++ ++void isppreview_enable_gammabypass(u8 enable); ++ ++void isppreview_enable_hmed(u8 enable); ++ ++void isppreview_config_hmed(struct ispprev_hmed); ++ ++void isppreview_enable_noisefilter(u8 enable); ++ ++void isppreview_config_noisefilter(struct ispprev_nf prev_nf); ++ ++void isppreview_enable_dcor(u8 enable); ++ ++void isppreview_config_dcor(struct ispprev_dcor prev_dcor); ++ ++void isppreview_config_cfa(struct ispprev_cfa); ++ ++void isppreview_config_gammacorrn(struct ispprev_gtable); ++ ++void isppreview_config_chroma_suppression(struct ispprev_csup csup); ++ ++void isppreview_enable_cfa(u8 enable); ++ ++void isppreview_config_luma_enhancement(u32 *ytable); ++ ++void isppreview_enable_luma_enhancement(u8 enable); ++ ++void isppreview_enable_chroma_suppression(u8 enable); ++ ++void isppreview_config_whitebalance(struct ispprev_wbal); ++ ++void isppreview_config_blkadj(struct ispprev_blkadj); ++ ++void isppreview_config_rgb_blending(struct ispprev_rgbtorgb); ++ ++void isppreview_config_rgb_to_ycbcr(struct ispprev_csc); ++ ++void isppreview_config_contrast(u8 contrast); ++ ++void isppreview_get_contrast_range(u8 *min_contrast, u8 *max_contrast); ++ ++void isppreview_config_brightness(u8 brightness); ++ ++void isppreview_get_brightness_range(u8 *min_brightness, u8 *max_brightness); ++ ++void isppreview_config_yc_range(struct ispprev_yclimit yclimit); ++ ++int isppreview_config_inlineoffset(u32 offset); ++ ++int isppreview_set_inaddr(u32 addr); ++ ++int isppreview_config_outlineoffset(u32 offset); ++ ++int isppreview_set_outaddr(u32 addr); ++ ++int isppreview_config_darklineoffset(u32 offset); ++ ++int isppreview_set_darkaddr(u32 addr); ++ ++void isppreview_enable(u8 enable); ++ ++struct prev_params *isppreview_get_config(void); ++ ++void isppreview_print_status(void); ++ ++#endif/* OMAP_ISP_PREVIEW_H */ +Index: git/drivers/media/video/isp/ispreg.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ git/drivers/media/video/isp/ispreg.h 2009-02-12 10:29:26.000000000 -0600 +@@ -0,0 +1,1225 @@ ++/* ++ * drivers/media/video/omap/isp/ispreg.h ++ * ++ * Header file for all the ISP module in TI's OMAP3430 Camera ISP. ++ * It has the OMAP HW register definitions. ++ * ++ * Copyright (C) 2007 Texas Instruments. ++ * ++ * This package is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ * ++ * THIS PACKAGE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR ++ * IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED ++ * WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE. ++ */ ++ ++#ifndef __ISPREG_H__ ++#define __ISPREG_H__ ++ ++#if 0 ++#define OMAP_ISPCTRL_DEBUG ++#define OMAP_ISPCCDC_DEBUG ++#define OMAP_ISPPREV_DEBUG ++#define OMAP_ISPRESZ_DEBUG ++#define OMAP_ISPMMU_DEBUG ++#define OMAP_ISPH3A_DEBUG ++#define OMAP_ISPHIST_DEBUG ++#endif ++ ++#ifdef OMAP_ISPCTRL_DEBUG ++#define DPRINTK_ISPCTRL(format,...)\ ++ printk("ISPCTRL: " format, ## __VA_ARGS__) ++#else ++#define DPRINTK_ISPCTRL(format, ...) ++#endif ++ ++#ifdef OMAP_ISPCCDC_DEBUG ++#define DPRINTK_ISPCCDC(format, ...)\ ++ printk("ISPCCDC: " format, ## __VA_ARGS__) ++#else ++#define DPRINTK_ISPCCDC(format, ...) ++#endif ++ ++#ifdef OMAP_ISPPREV_DEBUG ++#define DPRINTK_ISPPREV(format, ...)\ ++ printk("ISPPREV: " format, ## __VA_ARGS__) ++#else ++#define DPRINTK_ISPPREV(format, ...) ++#endif ++ ++#ifdef OMAP_ISPRESZ_DEBUG ++#define DPRINTK_ISPRESZ(format, ...)\ ++ printk("ISPRESZ: " format, ## __VA_ARGS__) ++#else ++#define DPRINTK_ISPRESZ(format, ...) ++#endif ++ ++#ifdef OMAP_ISPMMU_DEBUG ++#define DPRINTK_ISPMMU(format, ...)\ ++ printk("ISPMMU: " format, ## __VA_ARGS__) ++#else ++#define DPRINTK_ISPMMU(format, ...) ++#endif ++ ++#ifdef OMAP_ISPH3A_DEBUG ++#define DPRINTK_ISPH3A(format, ...)\ ++ printk("ISPH3A: " format, ## __VA_ARGS__) ++#else ++#define DPRINTK_ISPH3A(format, ...) ++#endif ++ ++#ifdef OMAP_ISPHIST_DEBUG ++#define DPRINTK_ISPHIST(format, ...)\ ++ printk("ISPHIST: " format, ## __VA_ARGS__) ++#else ++#define DPRINTK_ISPHIST(format, ...) ++#endif ++ ++#define ISP_32B_BOUNDARY_BUF 0xFFFFFFE0 ++#define ISP_32B_BOUNDARY_OFFSET 0x0000FFE0 ++ ++/*PRCM Clock definition*/ ++ ++#define CM_FCLKEN_CAM 0x48004f00 ++#define CM_ICLKEN_CAM 0x48004f10 ++#define CM_AUTOIDLE_CAM 0x48004f30 ++#define CM_CLKSEL_CAM 0x48004f40 ++#define CM_CLKEN_PLL 0x48004D00 ++#define CM_CLKSEL2_PLL 0x48004D44 ++#define CTRL_PADCONF_CAM_HS 0x4800210C ++#define CTRL_PADCONF_CAM_XCLKA 0x48002110 ++#define CTRL_PADCONF_CAM_D1 0x48002118 ++#define CTRL_PADCONF_CAM_D3 0x4800211C ++#define CTRL_PADCONF_CAM_D5 0x48002120 ++ ++#define CTRL_PADCONF_CAM_D7 0x48002124 ++#define CTRL_PADCONF_CAM_D9 0x48002128 ++#define CTRL_PADCONF_CAM_D11 0x4800212C ++ ++#define CM_ICLKEN_CAM_EN 0x1 ++#define CM_FCLKEN_CAM_EN 0x1 ++ ++#define CM_CAM_MCLK_HZ 216000000 ++ ++/* ISP Submodules offset */ ++ ++#define ISP_REG_BASE 0x480BC000 ++#define ISP_REG_SIZE 0x00001600 ++ ++#define ISPCBUFF_REG_BASE 0x480BC100 ++#define ISPCBUFF_REG(offset) (ISPCBUFF_REG_BASE + (offset)) ++ ++#define ISPCCP2A_REG_OFFSET 0x00000200 ++#define ISPCCP2A_REG_BASE 0x480BC200 ++ ++#define ISPCCP2B_REG_OFFSET 0x00000400 ++#define ISPCCP2B_REG_BASE 0x480BC400 ++ ++#define ISPCCDC_REG_OFFSET 0x00000600 ++#define ISPCCDC_REG_BASE 0x480BC600 ++ ++#define ISPSCMP_REG_OFFSET 0x00000800 ++#define ISPSCMP_REG_BASE 0x480BC800 ++ ++#define ISPHIST_REG_OFFSET 0x00000A00 ++#define ISPHIST_REG_BASE 0x480BCA00 ++#define ISPHIST_REG(offset) (ISPHIST_REG_BASE + (offset)) ++ ++#define ISPH3A_REG_OFFSET 0x00000C00 ++#define ISPH3A_REG_BASE 0x480BCC00 ++#define ISPH3A_REG(offset) (ISPH3A_REG_BASE + (offset)) ++ ++#define ISPPREVIEW_REG_OFFSET 0x00000E00 ++#define ISPPREVIEW_REG_BASE 0x480BCE00 ++ ++#define ISPRESIZER_REG_OFFSET 0x00001000 ++#define ISPRESIZER_REG_BASE 0x480BD000 ++ ++#define ISPSBL_REG_OFFSET 0x00001200 ++#define ISPSBL_REG_BASE 0x480BD200 ++ ++#define ISPMMU_REG_OFFSET 0x00001400 ++#define ISPMMU_REG_BASE 0x480BD400 ++ ++/* ISP module register offset */ ++ ++#define ISP_REVISION 0x480BC000 ++#define ISP_SYSCONFIG 0x480BC004 ++#define ISP_SYSSTATUS 0x480BC008 ++#define ISP_IRQ0ENABLE 0x480BC00C ++#define ISP_IRQ0STATUS 0x480BC010 ++#define ISP_IRQ1ENABLE 0x480BC014 ++#define ISP_IRQ1STATUS 0x480BC018 ++#define ISP_TCTRL_GRESET_LENGTH 0x480BC030 ++#define ISP_TCTRL_PSTRB_REPLAY 0x480BC034 ++#define ISP_CTRL 0x480BC040 ++#define ISP_SECURE 0x480BC044 ++#define ISP_TCTRL_CTRL 0x480BC050 ++#define ISP_TCTRL_FRAME 0x480BC054 ++#define ISP_TCTRL_PSTRB_DELAY 0x480BC058 ++#define ISP_TCTRL_STRB_DELAY 0x480BC05C ++#define ISP_TCTRL_SHUT_DELAY 0x480BC060 ++#define ISP_TCTRL_PSTRB_LENGTH 0x480BC064 ++#define ISP_TCTRL_STRB_LENGTH 0x480BC068 ++#define ISP_TCTRL_SHUT_LENGTH 0x480BC06C ++#define ISP_PING_PONG_ADDR 0x480BC070 ++#define ISP_PING_PONG_MEM_RANGE 0x480BC074 ++#define ISP_PING_PONG_BUF_SIZE 0x480BC078 ++ ++/* CSI1 receiver registers */ ++ ++#define ISP_CSIA_SYSCONFIG 0x480BC204 ++#define ISP_CSIB_SYSCONFIG 0x480BC404 ++ ++/* ISP_CBUFF Registers */ ++ ++#define ISP_CBUFF_SYSCONFIG ISPCBUFF_REG(0x010) ++#define ISP_CBUFF_IRQENABLE ISPCBUFF_REG(0x01C) ++ ++#define ISP_CBUFF0_CTRL ISPCBUFF_REG(0x020) ++#define ISP_CBUFF1_CTRL (ISP_CBUFF0_CTRL + (0x004)) ++ ++#define ISP_CBUFF0_START ISPCBUFF_REG(0x040) ++#define ISP_CBUFF1_START (ISP_CBUFF0_START + (0x004)) ++ ++#define ISP_CBUFF0_END ISPCBUFF_REG(0x050) ++#define ISP_CBUFF1_END (ISP_CBUFF0_END + (0x04)) ++ ++#define ISP_CBUFF0_WINDOWSIZE ISPCBUFF_REG(0x060) ++#define ISP_CBUFF1_WINDOWSIZE (ISP_CBUFF0_WINDOWSIZE + (0x004)) ++ ++#define ISP_CBUFF0_THRESHOLD ISPCBUFF_REG(0x070) ++#define ISP_CBUFF1_THRESHOLD (ISP_CBUFF0_THRESHOLD + (0x004)) ++ ++ ++/* CCDC module register offset */ ++ ++#define ISPCCDC_PID 0x480BC600 ++#define ISPCCDC_PCR 0x480BC604 ++#define ISPCCDC_SYN_MODE 0x480BC608 ++#define ISPCCDC_HD_VD_WID 0x480BC60C ++#define ISPCCDC_PIX_LINES 0x480BC610 ++#define ISPCCDC_HORZ_INFO 0x480BC614 ++#define ISPCCDC_VERT_START 0x480BC618 ++#define ISPCCDC_VERT_LINES 0x480BC61C ++#define ISPCCDC_CULLING 0x480BC620 ++#define ISPCCDC_HSIZE_OFF 0x480BC624 ++#define ISPCCDC_SDOFST 0x480BC628 ++#define ISPCCDC_SDR_ADDR 0x480BC62C ++#define ISPCCDC_CLAMP 0x480BC630 ++#define ISPCCDC_DCSUB 0x480BC634 ++#define ISPCCDC_COLPTN 0x480BC638 ++#define ISPCCDC_BLKCMP 0x480BC63C ++#define ISPCCDC_FPC 0x480BC640 ++#define ISPCCDC_FPC_ADDR 0x480BC644 ++#define ISPCCDC_VDINT 0x480BC648 ++#define ISPCCDC_ALAW 0x480BC64C ++#define ISPCCDC_REC656IF 0x480BC650 ++#define ISPCCDC_CFG 0x480BC654 ++#define ISPCCDC_FMTCFG 0x480BC658 ++#define ISPCCDC_FMT_HORZ 0x480BC65C ++#define ISPCCDC_FMT_VERT 0x480BC660 ++#define ISPCCDC_FMT_ADDR0 0x480BC664 ++#define ISPCCDC_FMT_ADDR1 0x480BC668 ++#define ISPCCDC_FMT_ADDR2 0x480BC66C ++#define ISPCCDC_FMT_ADDR3 0x480BC670 ++#define ISPCCDC_FMT_ADDR4 0x480BC674 ++#define ISPCCDC_FMT_ADDR5 0x480BC678 ++#define ISPCCDC_FMT_ADDR6 0x480BC67C ++#define ISPCCDC_FMT_ADDR7 0x480BC680 ++#define ISPCCDC_PRGEVEN0 0x480BC684 ++#define ISPCCDC_PRGEVEN1 0x480BC688 ++#define ISPCCDC_PRGODD0 0x480BC68C ++#define ISPCCDC_PRGODD1 0x480BC690 ++#define ISPCCDC_VP_OUT 0x480BC694 ++ ++#define ISPCCDC_LSC_CONFIG 0x480BC698 ++#define ISPCCDC_LSC_INITIAL 0x480BC69C ++#define ISPCCDC_LSC_TABLE_BASE 0x480BC6A0 ++#define ISPCCDC_LSC_TABLE_OFFSET 0x480BC6A4 ++ ++ ++/* Histogram registers */ ++#define ISPHIST_PID ISPHIST_REG(0x000) ++#define ISPHIST_PCR ISPHIST_REG(0x004) ++#define ISPHIST_CNT ISPHIST_REG(0x008) ++#define ISPHIST_WB_GAIN ISPHIST_REG(0x00C) ++#define ISPHIST_R0_HORZ ISPHIST_REG(0x010) ++#define ISPHIST_R0_VERT ISPHIST_REG(0x014) ++#define ISPHIST_R1_HORZ ISPHIST_REG(0x018) ++#define ISPHIST_R1_VERT ISPHIST_REG(0x01C) ++#define ISPHIST_R2_HORZ ISPHIST_REG(0x020) ++#define ISPHIST_R2_VERT ISPHIST_REG(0x024) ++#define ISPHIST_R3_HORZ ISPHIST_REG(0x028) ++#define ISPHIST_R3_VERT ISPHIST_REG(0x02C) ++#define ISPHIST_ADDR ISPHIST_REG(0x030) ++#define ISPHIST_DATA ISPHIST_REG(0x034) ++#define ISPHIST_RADD ISPHIST_REG(0x038) ++#define ISPHIST_RADD_OFF ISPHIST_REG(0x03C) ++#define ISPHIST_H_V_INFO ISPHIST_REG(0x040) ++ ++/* H3A module registers */ ++#define ISPH3A_PID ISPH3A_REG(0x000) ++#define ISPH3A_PCR ISPH3A_REG(0x004) ++#define ISPH3A_AEWWIN1 ISPH3A_REG(0x04C) ++#define ISPH3A_AEWINSTART ISPH3A_REG(0x050) ++#define ISPH3A_AEWINBLK ISPH3A_REG(0x054) ++#define ISPH3A_AEWSUBWIN ISPH3A_REG(0x058) ++#define ISPH3A_AEWBUFST ISPH3A_REG(0x05C) ++#define ISPH3A_AFPAX1 ISPH3A_REG(0x008) ++#define ISPH3A_AFPAX2 ISPH3A_REG(0x00C) ++#define ISPH3A_AFPAXSTART ISPH3A_REG(0x010) ++#define ISPH3A_AFIIRSH ISPH3A_REG(0x014) ++#define ISPH3A_AFBUFST ISPH3A_REG(0x018) ++#define ISPH3A_AFCOEF010 ISPH3A_REG(0x01C) ++#define ISPH3A_AFCOEF032 ISPH3A_REG(0x020) ++#define ISPH3A_AFCOEF054 ISPH3A_REG(0x024) ++#define ISPH3A_AFCOEF076 ISPH3A_REG(0x028) ++#define ISPH3A_AFCOEF098 ISPH3A_REG(0x02C) ++#define ISPH3A_AFCOEF0010 ISPH3A_REG(0x030) ++#define ISPH3A_AFCOEF110 ISPH3A_REG(0x034) ++#define ISPH3A_AFCOEF132 ISPH3A_REG(0x038) ++#define ISPH3A_AFCOEF154 ISPH3A_REG(0x03C) ++#define ISPH3A_AFCOEF176 ISPH3A_REG(0x040) ++#define ISPH3A_AFCOEF198 ISPH3A_REG(0x044) ++#define ISPH3A_AFCOEF1010 ISPH3A_REG(0x048) ++ ++ ++ ++ ++#define ISPPRV_PCR 0x480BCE04 ++#define ISPPRV_HORZ_INFO 0x480BCE08 ++#define ISPPRV_VERT_INFO 0x480BCE0C ++#define ISPPRV_RSDR_ADDR 0x480BCE10 ++#define ISPPRV_RADR_OFFSET 0x480BCE14 ++#define ISPPRV_DSDR_ADDR 0x480BCE18 ++#define ISPPRV_DRKF_OFFSET 0x480BCE1C ++#define ISPPRV_WSDR_ADDR 0x480BCE20 ++#define ISPPRV_WADD_OFFSET 0x480BCE24 ++#define ISPPRV_AVE 0x480BCE28 ++#define ISPPRV_HMED 0x480BCE2C ++#define ISPPRV_NF 0x480BCE30 ++#define ISPPRV_WB_DGAIN 0x480BCE34 ++#define ISPPRV_WBGAIN 0x480BCE38 ++#define ISPPRV_WBSEL 0x480BCE3C ++#define ISPPRV_CFA 0x480BCE40 ++#define ISPPRV_BLKADJOFF 0x480BCE44 ++#define ISPPRV_RGB_MAT1 0x480BCE48 ++#define ISPPRV_RGB_MAT2 0x480BCE4C ++#define ISPPRV_RGB_MAT3 0x480BCE50 ++#define ISPPRV_RGB_MAT4 0x480BCE54 ++#define ISPPRV_RGB_MAT5 0x480BCE58 ++#define ISPPRV_RGB_OFF1 0x480BCE5C ++#define ISPPRV_RGB_OFF2 0x480BCE60 ++#define ISPPRV_CSC0 0x480BCE64 ++#define ISPPRV_CSC1 0x480BCE68 ++#define ISPPRV_CSC2 0x480BCE6C ++#define ISPPRV_CSC_OFFSET 0x480BCE70 ++#define ISPPRV_CNT_BRT 0x480BCE74 ++#define ISPPRV_CSUP 0x480BCE78 ++#define ISPPRV_SETUP_YC 0x480BCE7C ++#define ISPPRV_SET_TBL_ADDR 0x480BCE80 ++#define ISPPRV_SET_TBL_DATA 0x480BCE84 ++#define ISPPRV_CDC_THR0 0x480BCE90 ++#define ISPPRV_CDC_THR1 (ISPPRV_CDC_THR0 + (0x4)) ++#define ISPPRV_CDC_THR2 (ISPPRV_CDC_THR0 + (0x4)*2) ++#define ISPPRV_CDC_THR3 (ISPPRV_CDC_THR0 + (0x4)*3) ++ ++#define ISPPRV_REDGAMMA_TABLE_ADDR 0x0000 ++#define ISPPRV_GREENGAMMA_TABLE_ADDR 0x0400 ++#define ISPPRV_BLUEGAMMA_TABLE_ADDR 0x0800 ++#define ISPPRV_NF_TABLE_ADDR 0x0C00 ++#define ISPPRV_YENH_TABLE_ADDR 0x1000 ++#define ISPPRV_CFA_TABLE_ADDR 0x1400 ++ ++#define ISPPRV_MAXOUTPUT_WIDTH 1280 ++#define ISPPRV_MAXOUTPUT_WIDTH_ES2 3300 ++ ++/* Resizer module register offset */ ++ ++#define ISPRSZ_PID 0x480BD000 ++#define ISPRSZ_PCR 0x480BD004 ++#define ISPRSZ_CNT 0x480BD008 ++#define ISPRSZ_OUT_SIZE 0x480BD00C ++#define ISPRSZ_IN_START 0x480BD010 ++#define ISPRSZ_IN_SIZE 0x480BD014 ++#define ISPRSZ_SDR_INADD 0x480BD018 ++#define ISPRSZ_SDR_INOFF 0x480BD01C ++#define ISPRSZ_SDR_OUTADD 0x480BD020 ++#define ISPRSZ_SDR_OUTOFF 0x480BD024 ++#define ISPRSZ_HFILT10 0x480BD028 ++#define ISPRSZ_HFILT32 0x480BD02C ++#define ISPRSZ_HFILT54 0x480BD030 ++#define ISPRSZ_HFILT76 0x480BD034 ++#define ISPRSZ_HFILT98 0x480BD038 ++#define ISPRSZ_HFILT1110 0x480BD03C ++#define ISPRSZ_HFILT1312 0x480BD040 ++#define ISPRSZ_HFILT1514 0x480BD044 ++#define ISPRSZ_HFILT1716 0x480BD048 ++#define ISPRSZ_HFILT1918 0x480BD04C ++#define ISPRSZ_HFILT2120 0x480BD050 ++#define ISPRSZ_HFILT2322 0x480BD054 ++#define ISPRSZ_HFILT2524 0x480BD058 ++#define ISPRSZ_HFILT2726 0x480BD05C ++#define ISPRSZ_HFILT2928 0x480BD060 ++#define ISPRSZ_HFILT3130 0x480BD064 ++#define ISPRSZ_VFILT10 0x480BD068 ++#define ISPRSZ_VFILT32 0x480BD06C ++#define ISPRSZ_VFILT54 0x480BD070 ++#define ISPRSZ_VFILT76 0x480BD074 ++#define ISPRSZ_VFILT98 0x480BD078 ++#define ISPRSZ_VFILT1110 0x480BD07C ++#define ISPRSZ_VFILT1312 0x480BD080 ++#define ISPRSZ_VFILT1514 0x480BD084 ++#define ISPRSZ_VFILT1716 0x480BD088 ++#define ISPRSZ_VFILT1918 0x480BD08C ++#define ISPRSZ_VFILT2120 0x480BD090 ++#define ISPRSZ_VFILT2322 0x480BD094 ++#define ISPRSZ_VFILT2524 0x480BD098 ++#define ISPRSZ_VFILT2726 0x480BD09C ++#define ISPRSZ_VFILT2928 0x480BD0A0 ++#define ISPRSZ_VFILT3130 0x480BD0A4 ++#define ISPRSZ_YENH 0x480BD0A8 ++ ++ ++/* MMU module registers */ ++#define ISPMMU_REVISION 0x480BD400 ++#define ISPMMU_SYSCONFIG 0x480BD410 ++#define ISPMMU_SYSSTATUS 0x480BD414 ++#define ISPMMU_IRQSTATUS 0x480BD418 ++#define ISPMMU_IRQENABLE 0x480BD41C ++#define ISPMMU_WALKING_ST 0x480BD440 ++#define ISPMMU_CNTL 0x480BD444 ++#define ISPMMU_FAULT_AD 0x480BD448 ++#define ISPMMU_TTB 0x480BD44C ++#define ISPMMU_LOCK 0x480BD450 ++#define ISPMMU_LD_TLB 0x480BD454 ++#define ISPMMU_CAM 0x480BD458 ++#define ISPMMU_RAM 0x480BD45C ++#define ISPMMU_GFLUSH 0x480BD460 ++#define ISPMMU_FLUSH_ENTRY 0x480BD464 ++#define ISPMMU_READ_CAM 0x480BD468 ++#define ISPMMU_READ_RAM 0x480BD46c ++#define ISPMMU_EMU_FAULT_AD 0x480BD470 ++ ++ ++#define ISP_INT_CLR 0xFF113F11 ++#define ISPPRV_PCR_EN 1 ++#define ISPPRV_PCR_BUSY (1<<1) ++#define ISPPRV_PCR_SOURCE (1<<2) ++#define ISPPRV_PCR_ONESHOT (1<<3) ++#define ISPPRV_PCR_WIDTH (1<<4) ++#define ISPPRV_PCR_INVALAW (1<<5) ++#define ISPPRV_PCR_DRKFEN (1<<6) ++#define ISPPRV_PCR_DRKFCAP (1<<7) ++#define ISPPRV_PCR_HMEDEN (1<<8) ++#define ISPPRV_PCR_NFEN (1<<9) ++#define ISPPRV_PCR_CFAEN (1<<10) ++#define ISPPRV_PCR_CFAFMT_SHIFT 11 ++#define ISPPRV_PCR_CFAFMT_MASK 0x7800 ++#define ISPPRV_PCR_CFAFMT_BAYER (0<<11) ++#define ISPPRV_PCR_CFAFMT_SONYVGA (1<<11) ++#define ISPPRV_PCR_CFAFMT_RGBFOVEON (2<<11) ++#define ISPPRV_PCR_CFAFMT_DNSPL (3<<11) ++#define ISPPRV_PCR_CFAFMT_HONEYCOMB (4<<11) ++#define ISPPRV_PCR_CFAFMT_RRGGBBFOVEON (5<<11) ++#define ISPPRV_PCR_YNENHEN (1<<15) ++#define ISPPRV_PCR_SUPEN (1<<16) ++#define ISPPRV_PCR_YCPOS_SHIFT 17 ++#define ISPPRV_PCR_YCPOS_YCrYCb (0<<17) ++#define ISPPRV_PCR_YCPOS_YCbYCr (1<<17) ++#define ISPPRV_PCR_YCPOS_CbYCrY (2<<17) ++#define ISPPRV_PCR_YCPOS_CrYCbY (3<<17) ++#define ISPPRV_PCR_RSZPORT (1<<19) ++#define ISPPRV_PCR_SDRPORT (1<<20) ++#define ISPPRV_PCR_SCOMP_EN (1<<21) ++#define ISPPRV_PCR_SCOMP_SFT_SHIFT (22) ++#define ISPPRV_PCR_SCOMP_SFT_MASK ~(7<<22) ++#define ISPPRV_PCR_GAMMA_BYPASS (1<<26) ++#define ISPPRV_PCR_DCOREN (1<<27) ++#define ISPPRV_PCR_DCCOUP (1<<28) ++#define ISPPRV_PCR_DRK_FAIL (1<<31) ++ ++#define ISPPRV_HORZ_INFO_EPH_SHIFT 0 ++#define ISPPRV_HORZ_INFO_EPH_MASK 0x3fff; ++#define ISPPRV_HORZ_INFO_SPH_SHIFT 16 ++#define ISPPRV_HORZ_INFO_SPH_MASK 0x3fff0 ++ ++#define ISPPRV_VERT_INFO_ELV_SHIFT 0 ++#define ISPPRV_VERT_INFO_ELV_MASK 0x3fff ++#define ISPPRV_VERT_INFO_SLV_SHIFT 16 ++#define ISPPRV_VERT_INFO_SLV_MASK 0x3fff0 ++ ++#define ISPPRV_AVE_EVENDIST_SHIFT 2 ++#define ISPPRV_AVE_EVENDIST_1 0x0 ++#define ISPPRV_AVE_EVENDIST_2 0x1 ++#define ISPPRV_AVE_EVENDIST_3 0x2 ++#define ISPPRV_AVE_EVENDIST_4 0x3 ++#define ISPPRV_AVE_ODDDIST_SHIFT 4 ++#define ISPPRV_AVE_ODDDIST_1 0x0 ++#define ISPPRV_AVE_ODDDIST_2 0x1 ++#define ISPPRV_AVE_ODDDIST_3 0x2 ++#define ISPPRV_AVE_ODDDIST_4 0x3 ++ ++#define ISPPRV_HMED_THRESHOLD_SHIFT 0 ++#define ISPPRV_HMED_EVENDIST (1<<8) ++#define ISPPRV_HMED_ODDDIST (1<<9) ++ ++#define ISPPRV_WBGAIN_COEF0_SHIFT 0 ++#define ISPPRV_WBGAIN_COEF1_SHIFT 8 ++#define ISPPRV_WBGAIN_COEF2_SHIFT 16 ++#define ISPPRV_WBGAIN_COEF3_SHIFT 24 ++ ++#define ISPPRV_WBSEL_COEF0 0x0 ++#define ISPPRV_WBSEL_COEF1 0x1 ++#define ISPPRV_WBSEL_COEF2 0x2 ++#define ISPPRV_WBSEL_COEF3 0x3 ++ ++#define ISPPRV_WBSEL_N0_0_SHIFT 0 ++#define ISPPRV_WBSEL_N0_1_SHIFT 2 ++#define ISPPRV_WBSEL_N0_2_SHIFT 4 ++#define ISPPRV_WBSEL_N0_3_SHIFT 6 ++#define ISPPRV_WBSEL_N1_0_SHIFT 8 ++#define ISPPRV_WBSEL_N1_1_SHIFT 10 ++#define ISPPRV_WBSEL_N1_2_SHIFT 12 ++#define ISPPRV_WBSEL_N1_3_SHIFT 14 ++#define ISPPRV_WBSEL_N2_0_SHIFT 16 ++#define ISPPRV_WBSEL_N2_1_SHIFT 18 ++#define ISPPRV_WBSEL_N2_2_SHIFT 20 ++#define ISPPRV_WBSEL_N2_3_SHIFT 22 ++#define ISPPRV_WBSEL_N3_0_SHIFT 24 ++#define ISPPRV_WBSEL_N3_1_SHIFT 26 ++#define ISPPRV_WBSEL_N3_2_SHIFT 28 ++#define ISPPRV_WBSEL_N3_3_SHIFT 30 ++ ++#define ISPPRV_CFA_GRADTH_HOR_SHIFT 0 ++#define ISPPRV_CFA_GRADTH_VER_SHIFT 8 ++ ++#define ISPPRV_BLKADJOFF_B_SHIFT 0 ++#define ISPPRV_BLKADJOFF_G_SHIFT 8 ++#define ISPPRV_BLKADJOFF_R_SHIFT 16 ++ ++#define ISPPRV_RGB_MAT1_MTX_RR_SHIFT 0 ++#define ISPPRV_RGB_MAT1_MTX_GR_SHIFT 16 ++ ++#define ISPPRV_RGB_MAT2_MTX_BR_SHIFT 0 ++#define ISPPRV_RGB_MAT2_MTX_RG_SHIFT 16 ++ ++#define ISPPRV_RGB_MAT3_MTX_GG_SHIFT 0 ++#define ISPPRV_RGB_MAT3_MTX_BG_SHIFT 16 ++ ++#define ISPPRV_RGB_MAT4_MTX_RB_SHIFT 0 ++#define ISPPRV_RGB_MAT4_MTX_GB_SHIFT 16 ++ ++#define ISPPRV_RGB_MAT5_MTX_BB_SHIFT 0 ++ ++#define ISPPRV_RGB_OFF1_MTX_OFFG_SHIFT 0 ++#define ISPPRV_RGB_OFF1_MTX_OFFR_SHIFT 16 ++ ++#define ISPPRV_RGB_OFF2_MTX_OFFB_SHIFT 0 ++ ++#define ISPPRV_CSC0_RY_SHIFT 0 ++#define ISPPRV_CSC0_GY_SHIFT 10 ++#define ISPPRV_CSC0_BY_SHIFT 20 ++ ++#define ISPPRV_CSC1_RCB_SHIFT 0 ++#define ISPPRV_CSC1_GCB_SHIFT 10 ++#define ISPPRV_CSC1_BCB_SHIFT 20 ++ ++#define ISPPRV_CSC2_RCR_SHIFT 0 ++#define ISPPRV_CSC2_GCR_SHIFT 10 ++#define ISPPRV_CSC2_BCR_SHIFT 20 ++ ++#define ISPPRV_CSC_OFFSET_CR_SHIFT 0 ++#define ISPPRV_CSC_OFFSET_CB_SHIFT 8 ++#define ISPPRV_CSC_OFFSET_Y_SHIFT 16 ++ ++#define ISPPRV_CNT_BRT_BRT_SHIFT 0 ++#define ISPPRV_CNT_BRT_CNT_SHIFT 8 ++ ++#define ISPPRV_CONTRAST_MAX 0x10 ++#define ISPPRV_CONTRAST_MIN 0xFF ++#define ISPPRV_BRIGHT_MIN 0x00 ++#define ISPPRV_BRIGHT_MAX 0xFF ++ ++ ++#define ISPPRV_CSUP_CSUPG_SHIFT 0 ++#define ISPPRV_CSUP_THRES_SHIFT 8 ++#define ISPPRV_CSUP_HPYF_SHIFT 16 ++ ++#define ISPPRV_SETUP_YC_MINC_SHIFT 0 ++#define ISPPRV_SETUP_YC_MAXC_SHIFT 8 ++#define ISPPRV_SETUP_YC_MINY_SHIFT 16 ++#define ISPPRV_SETUP_YC_MAXY_SHIFT 24 ++#define ISPPRV_YC_MAX 0xFF ++#define ISPPRV_YC_MIN 0x0 ++ ++ ++ ++ ++/* Define bit fields within selected registers */ ++ ++#define ISP_REVISION_SHIFT 0 ++ ++#define ISP_SYSCONFIG_AUTOIDLE 0 ++#define ISP_SYSCONFIG_SOFTRESET (1<<1) ++#define ISP_SYSCONFIG_MIdleMode_SHIFT 12 ++#define ISP_SYSCONFIG_MIdleMode_ForceStandBy 0x0 ++#define ISP_SYSCONFIG_MIdleMode_NoStandBy 0x1 ++#define ISP_SYSCONFIG_MIdleMode_SmartStandBy 0x2 ++ ++#define ISP_SYSSTATUS_ResetDone 0 ++ ++#define IRQ0ENABLE_CSIA_IRQ 1 ++#define IRQ0ENABLE_CSIA_LC1_IRQ (1<<1) ++#define IRQ0ENABLE_CSIA_LC2_IRQ (1<<2) ++#define IRQ0ENABLE_CSIA_LC3_IRQ (1<<3) ++#define IRQ0ENABLE_CSIB_IRQ (1<<4) ++#define IRQ0ENABLE_CSIB_LC1_IRQ (1<<5) ++#define IRQ0ENABLE_CSIB_LC2_IRQ (1<<6) ++#define IRQ0ENABLE_CSIB_LC3_IRQ (1<<7) ++#define IRQ0ENABLE_CCDC_VD0_IRQ (1<<8) ++#define IRQ0ENABLE_CCDC_VD1_IRQ (1<<9) ++#define IRQ0ENABLE_CCDC_VD2_IRQ (1<<10) ++#define IRQ0ENABLE_CCDC_ERR_IRQ (1<<11) ++#define IRQ0ENABLE_H3A_AF_DONE_IRQ (1<<12) ++#define IRQ0ENABLE_H3A_AWB_DONE_IRQ (1<<13) ++#define IRQ0ENABLE_HIST_DONE_IRQ (1<<16) ++#define IRQ0ENABLE_CCDC_LSC_DONE_IRQ (1<<17) ++#define IRQ0ENABLE_CCDC_LSC_PREF_COMP_IRQ (1<<18) ++#define IRQ0ENABLE_CCDC_LSC_PREF_ERR_IRQ (1<<19) ++#define IRQ0ENABLE_PRV_DONE_IRQ (1<<20) ++#define IRQ0ENABLE_RSZ_DONE_IRQ (1<<24) ++#define IRQ0ENABLE_OVF_IRQ (1<<25) ++#define IRQ0ENABLE_PING_IRQ (1<<26) ++#define IRQ0ENABLE_PONG_IRQ (1<<27) ++#define IRQ0ENABLE_MMU_ERR_IRQ (1<<28) ++#define IRQ0ENABLE_OCP_ERR_IRQ (1<<29) ++#define IRQ0ENABLE_SEC_ERR_IRQ (1<<30) ++#define IRQ0ENABLE_HS_VS_IRQ (1<<31) ++ ++#define IRQ0STATUS_CSIA_IRQ 1 ++#define IRQ0STATUS_CSIA_LC1_IRQ (1<<1) ++#define IRQ0STATUS_CSIA_LC2_IRQ (1<<2) ++#define IRQ0STATUS_CSIA_LC3_IRQ (1<<3) ++#define IRQ0STATUS_CSIB_IRQ (1<<4) ++#define IRQ0STATUS_CSIB_LC1_IRQ (1<<5) ++#define IRQ0STATUS_CSIB_LC2_IRQ (1<<6) ++#define IRQ0STATUS_CSIB_LC3_IRQ (1<<7) ++#define IRQ0STATUS_CCDC_VD0_IRQ (1<<8) ++#define IRQ0STATUS_CCDC_VD1_IRQ (1<<9) ++#define IRQ0STATUS_CCDC_VD2_IRQ (1<<10) ++#define IRQ0STATUS_CCDC_ERR_IRQ (1<<11) ++#define IRQ0STATUS_H3A_AF_DONE_IRQ (1<<12) ++#define IRQ0STATUS_H3A_AWB_DONE_IRQ (1<<13) ++#define IRQ0STATUS_HIST_DONE_IRQ (1<<16) ++#define IRQ0STATUS_PRV_DONE_IRQ (1<<20) ++#define IRQ0STATUS_RSZ_DONE_IRQ (1<<24) ++#define IRQ0STATUS_OVF_IRQ (1<<25) ++#define IRQ0STATUS_PING_IRQ (1<<26) ++#define IRQ0STATUS_PONG_IRQ (1<<27) ++#define IRQ0STATUS_MMU_ERR_IRQ (1<<28) ++#define IRQ0STATUS_OCP_ERR_IRQ (1<<29) ++#define IRQ0STATUS_SEC_ERR_IRQ (1<<30) ++#define IRQ0STATUS_HS_VS_IRQ (1<<31) ++ ++#define TCTRL_GRESET_LEN 0 ++ ++#define TCTRL_PSTRB_REPLAY_DELAY 0 ++#define TCTRL_PSTRB_REPLAY_COUNTER_SHIFT 25 ++ ++#define ISPCTRL_PAR_SER_CLK_SEL_parallel 0x0 ++#define ISPCTRL_PAR_SER_CLK_SEL_CSIA 0x1 ++#define ISPCTRL_PAR_SER_CLK_SEL_CSIB 0x2 ++#define ISPCTRL_PAR_SER_CLK_SEL_MASK 0xFFFFFFFC ++ ++#define ISPCTRL_PAR_BRIDGE_SHIFT 2 ++#define ISPCTRL_PAR_BRIDGE_DISABLE (0x0 << 2) ++#define ISPCTRL_PAR_BRIDGE_LENDIAN (0x2 << 2) ++#define ISPCTRL_PAR_BRIDGE_BENDIAN (0x3 << 2) ++ ++#define ISPCTRL_PAR_CLK_POL_SHIFT 4 ++#define ISPCTRL_PAR_CLK_POL_INV (1 << 4) ++#define ISPCTRL_PING_PONG_EN (1 << 5) ++#define ISPCTRL_SHIFT_SHIFT 6 ++#define ISPCTRL_SHIFT_0 (0x0 << 6) ++#define ISPCTRL_SHIFT_2 (0x1 << 6) ++#define ISPCTRL_SHIFT_4 (0x2 << 6) ++#define ISPCTRL_SHIFT_MASK (~(0x3 << 6)) ++ ++#define ISPCTRL_CCDC_CLK_EN (1 << 8) ++#define ISPCTRL_SCMP_CLK_EN (1 << 9) ++#define ISPCTRL_H3A_CLK_EN (1 << 10) ++#define ISPCTRL_HIST_CLK_EN (1 << 11) ++#define ISPCTRL_PREV_CLK_EN (1 << 12) ++#define ISPCTRL_RSZ_CLK_EN (1 << 13) ++#define ISPCTRL_SYNC_DETECT_SHIFT 14 ++#define ISPCTRL_SYNC_DETECT_HSFALL 0x0 ++#define ISPCTRL_SYNC_DETECT_HSRISE 0x1 ++#define ISPCTRL_SYNC_DETECT_VSFALL 0x2 ++#define ISPCTRL_SYNC_DETECT_VSRISE 0x3 ++ ++#define ISPCTRL_CCDC_RAM_EN (1 << 16) ++#define ISPCTRL_PREV_RAM_EN (1 << 17) ++#define ISPCTRL_SBL_RD_RAM_EN (1 << 18) ++#define ISPCTRL_SBL_WR1_RAM_EN (1 << 19) ++#define ISPCTRL_SBL_WR0_RAM_EN (1 << 20) ++#define ISPCTRL_SBL_AutoIdle (1 << 21) ++#define ISPCTRL_SBL_SHARED_RPORTB (1 << 28) ++#define ISPCTRL_JPEG_FLUSH (1 << 30) ++#define ISPCTRL_CCDC_FLUSH (1 << 31) ++ ++#define ISPSECURE_SecureMode 0 ++ ++#define ISPTCTRL_CTRL_DIVA_SHIFT 0 ++#define ISPTCTRL_CTRL_DIVA_MASK (0x1F << ISPTCTRL_CTRL_DIVA_SHIFT) ++#define ISPTCTRL_CTRL_DIVA_Low 0x0 ++#define ISPTCTRL_CTRL_DIVA_High 0x1 ++#define ISPTCTRL_CTRL_DIVA_Bypass 0x1F ++ ++#define ISPTCTRL_CTRL_DIVB_SHIFT 5 ++#define ISPTCTRL_CTRL_DIVB_MASK (0x1F << ISPTCTRL_CTRL_DIVB_SHIFT) ++#define ISPTCTRL_CTRL_DIVB_Low (0x0 << 5) ++#define ISPTCTRL_CTRL_DIVB_High (0x1 << 5) ++#define ISPTCTRL_CTRL_DIVB_Bypass (0x1F << 5) ++ ++#define ISPTCTRL_CTRL_DIVC_SHIFT 10 ++#define ISPTCTRL_CTRL_DIVC_NoClock (0x0 << 10) ++ ++#define ISPTCTRL_CTRL_SHUTEN (1 << 21) ++#define ISPTCTRL_CTRL_PSTRBEN (1 << 22) ++#define ISPTCTRL_CTRL_STRBEN (1 << 23) ++#define ISPTCTRL_CTRL_SHUTPOL (1 << 24) ++#define ISPTCTRL_CTRL_STRBPSTRBPOL (1 << 26) ++ ++#define ISPTCTRL_CTRL_INSEL_SHIFT 27 ++#define ISPTCTRL_CTRL_INSEL_Parallel (0x0 << 27) ++#define ISPTCTRL_CTRL_INSEL_CSIA (0x1 << 27) ++#define ISPTCTRL_CTRL_INSEL_CSIB (0x2 << 27) ++ ++#define ISPTCTRL_CTRL_GRESETEn (1 << 29) ++#define ISPTCTRL_CTRL_GRESETPOL (1 << 30) ++#define ISPTCTRL_CTRL_GRESETDIR (1 << 31) ++ ++#define ISPTCTRL_FRAME_SHUT_SHIFT 0 ++#define ISPTCTRL_FRAME_PSTRB_SHIFT 6 ++#define ISPTCTRL_FRAME_STRB_SHIFT 12 ++ ++#define ISPCCDC_PID_PREV_SHIFT 0 ++#define ISPCCDC_PID_CID_SHIFT 8 ++#define ISPCCDC_PID_TID_SHIFT 16 ++ ++#define ISPCCDC_PCR_EN 1 ++#define ISPCCDC_PCR_BUSY (1 << 1) ++ ++#define ISPCCDC_SYN_MODE_VDHDOUT 0x1 ++#define ISPCCDC_SYN_MODE_FLDOUT (1 << 1) ++#define ISPCCDC_SYN_MODE_VDPOL (1 << 2) ++#define ISPCCDC_SYN_MODE_HDPOL (1 << 3) ++#define ISPCCDC_SYN_MODE_FLDPOL (1 << 4) ++#define ISPCCDC_SYN_MODE_EXWEN (1 << 5) ++#define ISPCCDC_SYN_MODE_DATAPOL (1 << 6) ++#define ISPCCDC_SYN_MODE_FLDMODE (1 << 7) ++#define ISPCCDC_SYN_MODE_DATSIZ_MASK 0xFFFFF8FF ++#define ISPCCDC_SYN_MODE_DATSIZ_8_16 (0x0 << 8) ++#define ISPCCDC_SYN_MODE_DATSIZ_12 (0x4 << 8) ++#define ISPCCDC_SYN_MODE_DATSIZ_11 (0x5 << 8) ++#define ISPCCDC_SYN_MODE_DATSIZ_10 (0x6 << 8) ++#define ISPCCDC_SYN_MODE_DATSIZ_8 (0x7 << 8) ++#define ISPCCDC_SYN_MODE_PACK8 (1 << 11) ++#define ISPCCDC_SYN_MODE_INPMOD_MASK 0xFFFFCFFF ++#define ISPCCDC_SYN_MODE_INPMOD_RAW (0 << 12) ++#define ISPCCDC_SYN_MODE_INPMOD_YCBCR16 (1 << 12) ++#define ISPCCDC_SYN_MODE_INPMOD_YCBCR8 (2 << 12) ++#define ISPCCDC_SYN_MODE_LPF (1 << 14) ++#define ISPCCDC_SYN_MODE_FLDSTAT (1 << 15) ++#define ISPCCDC_SYN_MODE_VDHDEN (1 << 16) ++#define ISPCCDC_SYN_MODE_WEN (1 << 17) ++#define ISPCCDC_SYN_MODE_VP2SDR (1 << 18) ++#define ISPCCDC_SYN_MODE_SDR2RSZ (1 << 19) ++ ++#define ISPCCDC_HD_VD_WID_VDW_SHIFT 0 ++#define ISPCCDC_HD_VD_WID_HDW_SHIFT 16 ++ ++#define ISPCCDC_PIX_LINES_HLPRF_SHIFT 0 ++#define ISPCCDC_PIX_LINES_PPLN_SHIFT 16 ++ ++#define ISPCCDC_HORZ_INFO_NPH_SHIFT 0 ++#define ISPCCDC_HORZ_INFO_NPH_MASK 0xFFFF8000 ++#define ISPCCDC_HORZ_INFO_SPH_MASK 0x1000FFFF ++#define ISPCCDC_HORZ_INFO_SPH_SHIFT 16 ++ ++#define ISPCCDC_VERT_START_SLV0_SHIFT 16 ++#define ISPCCDC_VERT_START_SLV0_MASK 0x1000FFFF ++#define ISPCCDC_VERT_START_SLV1_SHIFT 0 ++ ++#define ISPCCDC_VERT_LINES_NLV_MASK 0xFFFF8000 ++#define ISPCCDC_VERT_LINES_NLV_SHIFT 0 ++ ++#define ISPCCDC_CULLING_CULV_SHIFT 0 ++#define ISPCCDC_CULLING_CULHODD_SHIFT 16 ++#define ISPCCDC_CULLING_CULHEVN_SHIFT 24 ++ ++#define ISPCCDC_HSIZE_OFF_SHIFT 0 ++ ++#define ISPCCDC_SDOFST_FINV (1 << 14) ++#define ISPCCDC_SDOFST_FOFST_1L (~(3 << 12)) ++#define ISPCCDC_SDOFST_FOFST_4L (3 << 12) ++#define ISPCCDC_SDOFST_LOFST3_SHIFT 0 ++#define ISPCCDC_SDOFST_LOFST2_SHIFT 3 ++#define ISPCCDC_SDOFST_LOFST1_SHIFT 6 ++#define ISPCCDC_SDOFST_LOFST0_SHIFT 9 ++#define EVENEVEN 1 ++#define ODDEVEN 2 ++#define EVENODD 3 ++#define ODDODD 4 ++ ++#define ISPCCDC_CLAMP_OBGAIN_SHIFT 0 ++#define ISPCCDC_CLAMP_OBST_SHIFT 10 ++#define ISPCCDC_CLAMP_OBSLN_SHIFT 25 ++#define ISPCCDC_CLAMP_OBSLEN_SHIFT 28 ++#define ISPCCDC_CLAMP_CLAMPEN (1 << 31) ++ ++#define ISPCCDC_COLPTN_R_Ye 0x0 ++#define ISPCCDC_COLPTN_Gr_Cy 0x1 ++#define ISPCCDC_COLPTN_Gb_G 0x2 ++#define ISPCCDC_COLPTN_B_Mg 0x3 ++#define ISPCCDC_COLPTN_CP0PLC0_SHIFT 0 ++#define ISPCCDC_COLPTN_CP0PLC1_SHIFT 2 ++#define ISPCCDC_COLPTN_CP0PLC2_SHIFT 4 ++#define ISPCCDC_COLPTN_CP0PLC3_SHIFT 6 ++#define ISPCCDC_COLPTN_CP1PLC0_SHIFT 8 ++#define ISPCCDC_COLPTN_CP1PLC1_SHIFT 10 ++#define ISPCCDC_COLPTN_CP1PLC2_SHIFT 12 ++#define ISPCCDC_COLPTN_CP1PLC3_SHIFT 14 ++#define ISPCCDC_COLPTN_CP2PLC0_SHIFT 16 ++#define ISPCCDC_COLPTN_CP2PLC1_SHIFT 18 ++#define ISPCCDC_COLPTN_CP2PLC2_SHIFT 20 ++#define ISPCCDC_COLPTN_CP2PLC3_SHIFT 22 ++#define ISPCCDC_COLPTN_CP3PLC0_SHIFT 24 ++#define ISPCCDC_COLPTN_CP3PLC1_SHIFT 26 ++#define ISPCCDC_COLPTN_CP3PLC2_SHIFT 28 ++#define ISPCCDC_COLPTN_CP3PLC3_SHIFT 30 ++ ++#define ISPCCDC_BLKCMP_B_MG_SHIFT 0 ++#define ISPCCDC_BLKCMP_GB_G_SHIFT 8 ++#define ISPCCDC_BLKCMP_GR_CY_SHIFT 6 ++#define ISPCCDC_BLKCMP_R_YE_SHIFT 24 ++ ++#define ISPCCDC_FPC_FPNUM_SHIFT 0 ++#define ISPCCDC_FPC_FPCEN (1 << 15) ++#define ISPCCDC_FPC_FPERR (1 << 16) ++ ++#define ISPCCDC_VDINT_1_SHIFT 0 ++#define ISPCCDC_VDINT_0_SHIFT 16 ++#define ISPCCDC_VDINT_0_MASK 0x7FFF ++#define ISPCCDC_VDINT_1_MASK 0x7FFF ++ ++#define ISPCCDC_ALAW_GWDI_SHIFT 0 ++#define ISPCCDC_ALAW_CCDTBL (1 << 3) ++ ++#define ISPCCDC_REC656IF_R656ON 1 ++#define ISPCCDC_REC656IF_ECCFVH (1 << 1) ++ ++#define ISPCCDC_CFG_BW656 (1 << 5) ++#define ISPCCDC_CFG_FIDMD_SHIFT 6 ++#define ISPCCDC_CFG_WENLOG (1 << 8) ++#define ISPCCDC_CFG_Y8POS (1 << 11) ++#define ISPCCDC_CFG_BSWD (1 << 12) ++#define ISPCCDC_CFG_MSBINVI (1 << 13) ++#define ISPCCDC_CFG_VDLC (1 << 15) ++ ++#define ISPCCDC_FMTCFG_FMTEN 0x1 ++#define ISPCCDC_FMTCFG_LNALT (1 << 1) ++#define ISPCCDC_FMTCFG_LNUM_SHIFT 2 ++#define ISPCCDC_FMTCFG_PLEN_ODD_SHIFT 4 ++#define ISPCCDC_FMTCFG_PLEN_EVEN_SHIFT 8 ++#define ISPCCDC_FMTCFG_VPIN_MASK 0xFFFF8000 ++#define ISPCCDC_FMTCFG_VPIN_12_3 (0x3 << 12) ++#define ISPCCDC_FMTCFG_VPIN_11_2 (0x4 << 12) ++#define ISPCCDC_FMTCFG_VPIN_10_1 (0x5 << 12) ++#define ISPCCDC_FMTCFG_VPIN_9_0 (0x6 << 12) ++#define ISPCCDC_FMTCFG_VPEN (1 << 15) ++ ++#define ISPCCDC_FMTCF_VPIF_FRQ_MASK 0xFFF8FFFF ++#define ISPCCDC_FMTCF_VPIF_FRQ_BY2 (0x0 << 16) ++#define ISPCCDC_FMTCF_VPIF_FRQ_BY3 (0x1 << 16) ++#define ISPCCDC_FMTCF_VPIF_FRQ_BY4 (0x2 << 16) ++#define ISPCCDC_FMTCF_VPIF_FRQ_BY5 (0x3 << 16) ++#define ISPCCDC_FMTCF_VPIF_FRQ_BY6 (0x4 << 16) ++ ++#define ISPCCDC_FMT_HORZ_FMTLNH_SHIFT 0 ++#define ISPCCDC_FMT_HORZ_FMTSPH_SHIFT 16 ++ ++#define ISPCCDC_FMT_VERT_FMTLNV_SHIFT 0 ++#define ISPCCDC_FMT_VERT_FMTSLV_SHIFT 16 ++ ++#define ISPCCDC_FMT_HORZ_FMTSPH_MASK 0x1FFF0000 ++#define ISPCCDC_FMT_HORZ_FMTLNH_MASK 0x1FFF ++ ++#define ISPCCDC_FMT_VERT_FMTSLV_MASK 0x1FFF0000 ++#define ISPCCDC_FMT_VERT_FMTLNV_MASK 0x1FFF ++ ++ ++#define ISPCCDC_VP_OUT_HORZ_ST_SHIFT 0 ++#define ISPCCDC_VP_OUT_HORZ_NUM_SHIFT 4 ++#define ISPCCDC_VP_OUT_VERT_NUM_SHIFT 17 ++ ++#define ISPRSZ_PID_PREV_SHIFT 0 ++#define ISPRSZ_PID_CID_SHIFT 8 ++#define ISPRSZ_PID_TID_SHIFT 16 ++ ++ ++#define ISPRSZ_PCR_ENABLE 0x5 ++#define ISPRSZ_PCR_BUSY (1 << 1) ++ ++#define ISPRSZ_CNT_HRSZ_SHIFT 0 ++#define ISPRSZ_CNT_HRSZ_MASK 0x3FF ++#define ISPRSZ_CNT_VRSZ_SHIFT 10 ++#define ISPRSZ_CNT_VRSZ_MASK 0xFFC00 ++#define ISPRSZ_CNT_HSTPH_SHIFT 20 ++#define ISPRSZ_CNT_HSTPH_MASK 0x700000 ++#define ISPRSZ_CNT_VSTPH_SHIFT 23 ++#define ISPRSZ_CNT_VSTPH_MASK 0x3800000 ++#define ISPRSZ_CNT_CBILIN_MASK 0x20000000 ++#define ISPRSZ_CNT_INPTYP_MASK 0x08000000 ++#define ISPRSZ_CNT_PIXFMT_MASK 0x04000000 ++#define ISPRSZ_CNT_YCPOS (1 << 26) ++#define ISPRSZ_CNT_INPTYP (1 << 27) ++#define ISPRSZ_CNT_INPSRC (1 << 28) ++#define ISPRSZ_CNT_CBILIN (1 << 29) ++ ++#define ISPRSZ_OUT_SIZE_HORZ_SHIFT 0 ++#define ISPRSZ_OUT_SIZE_HORZ_MASK 0x7FF ++#define ISPRSZ_OUT_SIZE_VERT_SHIFT 16 ++#define ISPRSZ_OUT_SIZE_VERT_MASK 0x7FF0000 ++ ++ ++#define ISPRSZ_IN_START_HORZ_ST_SHIFT 0 ++#define ISPRSZ_IN_START_HORZ_ST_MASK 0x1FFF ++#define ISPRSZ_IN_START_VERT_ST_SHIFT 16 ++#define ISPRSZ_IN_START_VERT_ST_MASK 0x1FFF0000 ++ ++ ++#define ISPRSZ_IN_SIZE_HORZ_SHIFT 0 ++#define ISPRSZ_IN_SIZE_HORZ_MASK 0x1FFF ++#define ISPRSZ_IN_SIZE_VERT_SHIFT 16 ++#define ISPRSZ_IN_SIZE_VERT_MASK 0x1FFF0000 ++ ++#define ISPRSZ_SDR_INADD_ADDR_SHIFT 0 ++#define ISPRSZ_SDR_INADD_ADDR_MASK 0xFFFFFFFF ++ ++#define ISPRSZ_SDR_INOFF_OFFSET_SHIFT 0 ++#define ISPRSZ_SDR_INOFF_OFFSET_MASK 0xFFFF ++ ++#define ISPRSZ_SDR_OUTADD_ADDR_SHIFT 0 ++#define ISPRSZ_SDR_OUTADD_ADDR_MASK 0xFFFFFFFF ++ ++ ++#define ISPRSZ_SDR_OUTOFF_OFFSET_SHIFT 0 ++#define ISPRSZ_SDR_OUTOFF_OFFSET_MASK 0xFFFF ++ ++#define ISPRSZ_HFILT10_COEF0_SHIFT 0 ++#define ISPRSZ_HFILT10_COEF0_MASK 0x3FF ++#define ISPRSZ_HFILT10_COEF1_SHIFT 16 ++#define ISPRSZ_HFILT10_COEF1_MASK 0x3FF0000 ++ ++#define ISPRSZ_HFILT32_COEF2_SHIFT 0 ++#define ISPRSZ_HFILT32_COEF2_MASK 0x3FF ++#define ISPRSZ_HFILT32_COEF3_SHIFT 16 ++#define ISPRSZ_HFILT32_COEF3_MASK 0x3FF0000 ++ ++#define ISPRSZ_HFILT54_COEF4_SHIFT 0 ++#define ISPRSZ_HFILT54_COEF4_MASK 0x3FF ++#define ISPRSZ_HFILT54_COEF5_SHIFT 16 ++#define ISPRSZ_HFILT54_COEF5_MASK 0x3FF0000 ++ ++#define ISPRSZ_HFILT76_COEFF6_SHIFT 0 ++#define ISPRSZ_HFILT76_COEFF6_MASK 0x3FF ++#define ISPRSZ_HFILT76_COEFF7_SHIFT 16 ++#define ISPRSZ_HFILT76_COEFF7_MASK 0x3FF0000 ++ ++#define ISPRSZ_HFILT98_COEFF8_SHIFT 0 ++#define ISPRSZ_HFILT98_COEFF8_MASK 0x3FF ++#define ISPRSZ_HFILT98_COEFF9_SHIFT 16 ++#define ISPRSZ_HFILT98_COEFF9_MASK 0x3FF0000 ++ ++#define ISPRSZ_HFILT1110_COEF10_SHIFT 0 ++#define ISPRSZ_HFILT1110_COEF10_MASK 0x3FF ++#define ISPRSZ_HFILT1110_COEF11_SHIFT 16 ++#define ISPRSZ_HFILT1110_COEF11_MASK 0x3FF0000 ++ ++#define ISPRSZ_HFILT1312_COEFF12_SHIFT 0 ++#define ISPRSZ_HFILT1312_COEFF12_MASK 0x3FF ++#define ISPRSZ_HFILT1312_COEFF13_SHIFT 16 ++#define ISPRSZ_HFILT1312_COEFF13_MASK 0x3FF0000 ++ ++#define ISPRSZ_HFILT1514_COEFF14_SHIFT 0 ++#define ISPRSZ_HFILT1514_COEFF14_MASK 0x3FF ++#define ISPRSZ_HFILT1514_COEFF15_SHIFT 16 ++#define ISPRSZ_HFILT1514_COEFF15_MASK 0x3FF0000 ++ ++#define ISPRSZ_HFILT1716_COEF16_SHIFT 0 ++#define ISPRSZ_HFILT1716_COEF16_MASK 0x3FF ++#define ISPRSZ_HFILT1716_COEF17_SHIFT 16 ++#define ISPRSZ_HFILT1716_COEF17_MASK 0x3FF0000 ++ ++#define ISPRSZ_HFILT1918_COEF18_SHIFT 0 ++#define ISPRSZ_HFILT1918_COEF18_MASK 0x3FF ++#define ISPRSZ_HFILT1918_COEF19_SHIFT 16 ++#define ISPRSZ_HFILT1918_COEF19_MASK 0x3FF0000 ++ ++#define ISPRSZ_HFILT2120_COEF20_SHIFT 0 ++#define ISPRSZ_HFILT2120_COEF20_MASK 0x3FF ++#define ISPRSZ_HFILT2120_COEF21_SHIFT 16 ++#define ISPRSZ_HFILT2120_COEF21_MASK 0x3FF0000 ++ ++#define ISPRSZ_HFILT2322_COEF22_SHIFT 0 ++#define ISPRSZ_HFILT2322_COEF22_MASK 0x3FF ++#define ISPRSZ_HFILT2322_COEF23_SHIFT 16 ++#define ISPRSZ_HFILT2322_COEF23_MASK 0x3FF0000 ++ ++#define ISPRSZ_HFILT2524_COEF24_SHIFT 0 ++#define ISPRSZ_HFILT2524_COEF24_MASK 0x3FF ++#define ISPRSZ_HFILT2524_COEF25_SHIFT 16 ++#define ISPRSZ_HFILT2524_COEF25_MASK 0x3FF0000 ++ ++#define ISPRSZ_HFILT2726_COEF26_SHIFT 0 ++#define ISPRSZ_HFILT2726_COEF26_MASK 0x3FF ++#define ISPRSZ_HFILT2726_COEF27_SHIFT 16 ++#define ISPRSZ_HFILT2726_COEF27_MASK 0x3FF0000 ++ ++ ++#define ISPRSZ_HFILT2928_COEF28_SHIFT 0 ++#define ISPRSZ_HFILT2928_COEF28_MASK 0x3FF ++#define ISPRSZ_HFILT2928_COEF29_SHIFT 16 ++#define ISPRSZ_HFILT2928_COEF29_MASK 0x3FF0000 ++ ++ ++#define ISPRSZ_HFILT3130_COEF30_SHIFT 0 ++#define ISPRSZ_HFILT3130_COEF30_MASK 0x3FF ++#define ISPRSZ_HFILT3130_COEF31_SHIFT 16 ++#define ISPRSZ_HFILT3130_COEF31_MASK 0x3FF0000 ++ ++ ++#define ISPRSZ_VFILT10_COEF0_SHIFT 0 ++#define ISPRSZ_VFILT10_COEF0_MASK 0x3FF ++#define ISPRSZ_VFILT10_COEF1_SHIFT 16 ++#define ISPRSZ_VFILT10_COEF1_MASK 0x3FF0000 ++ ++#define ISPRSZ_VFILT32_COEF2_SHIFT 0 ++#define ISPRSZ_VFILT32_COEF2_MASK 0x3FF ++#define ISPRSZ_VFILT32_COEF3_SHIFT 16 ++#define ISPRSZ_VFILT32_COEF3_MASK 0x3FF0000 ++ ++ ++#define ISPRSZ_VFILT54_COEF4_SHIFT 0 ++#define ISPRSZ_VFILT54_COEF4_MASK 0x3FF ++#define ISPRSZ_VFILT54_COEF5_SHIFT 16 ++#define ISPRSZ_VFILT54_COEF5_MASK 0x3FF0000 ++ ++#define ISPRSZ_VFILT76_COEFF6_SHIFT 0 ++#define ISPRSZ_VFILT76_COEFF6_MASK 0x3FF ++#define ISPRSZ_VFILT76_COEFF7_SHIFT 16 ++#define ISPRSZ_VFILT76_COEFF7_MASK 0x3FF0000 ++ ++#define ISPRSZ_VFILT98_COEFF8_SHIFT 0 ++#define ISPRSZ_VFILT98_COEFF8_MASK 0x3FF ++#define ISPRSZ_VFILT98_COEFF9_SHIFT 16 ++#define ISPRSZ_VFILT98_COEFF9_MASK 0x3FF0000 ++ ++#define ISPRSZ_VFILT1110_COEF10_SHIFT 0 ++#define ISPRSZ_VFILT1110_COEF10_MASK 0x3FF ++#define ISPRSZ_VFILT1110_COEF11_SHIFT 16 ++#define ISPRSZ_VFILT1110_COEF11_MASK 0x3FF0000 ++ ++#define ISPRSZ_VFILT1312_COEFF12_SHIFT 0 ++#define ISPRSZ_VFILT1312_COEFF12_MASK 0x3FF ++#define ISPRSZ_VFILT1312_COEFF13_SHIFT 16 ++#define ISPRSZ_VFILT1312_COEFF13_MASK 0x3FF0000 ++ ++#define ISPRSZ_VFILT1514_COEFF14_SHIFT 0 ++#define ISPRSZ_VFILT1514_COEFF14_MASK 0x3FF ++#define ISPRSZ_VFILT1514_COEFF15_SHIFT 16 ++#define ISPRSZ_VFILT1514_COEFF15_MASK 0x3FF0000 ++ ++#define ISPRSZ_VFILT1716_COEF16_SHIFT 0 ++#define ISPRSZ_VFILT1716_COEF16_MASK 0x3FF ++#define ISPRSZ_VFILT1716_COEF17_SHIFT 16 ++#define ISPRSZ_VFILT1716_COEF17_MASK 0x3FF0000 ++ ++#define ISPRSZ_VFILT1918_COEF18_SHIFT 0 ++#define ISPRSZ_VFILT1918_COEF18_MASK 0x3FF ++#define ISPRSZ_VFILT1918_COEF19_SHIFT 16 ++#define ISPRSZ_VFILT1918_COEF19_MASK 0x3FF0000 ++ ++#define ISPRSZ_VFILT2120_COEF20_SHIFT 0 ++#define ISPRSZ_VFILT2120_COEF20_MASK 0x3FF ++#define ISPRSZ_VFILT2120_COEF21_SHIFT 16 ++#define ISPRSZ_VFILT2120_COEF21_MASK 0x3FF0000 ++ ++#define ISPRSZ_VFILT2322_COEF22_SHIFT 0 ++#define ISPRSZ_VFILT2322_COEF22_MASK 0x3FF ++#define ISPRSZ_VFILT2322_COEF23_SHIFT 16 ++#define ISPRSZ_VFILT2322_COEF23_MASK 0x3FF0000 ++ ++#define ISPRSZ_VFILT2524_COEF24_SHIFT 0 ++#define ISPRSZ_VFILT2524_COEF24_MASK 0x3FF ++#define ISPRSZ_VFILT2524_COEF25_SHIFT 16 ++#define ISPRSZ_VFILT2524_COEF25_MASK 0x3FF0000 ++ ++#define ISPRSZ_VFILT2726_COEF26_SHIFT 0 ++#define ISPRSZ_VFILT2726_COEF26_MASK 0x3FF ++#define ISPRSZ_VFILT2726_COEF27_SHIFT 16 ++#define ISPRSZ_VFILT2726_COEF27_MASK 0x3FF0000 ++ ++#define ISPRSZ_VFILT2928_COEF28_SHIFT 0 ++#define ISPRSZ_VFILT2928_COEF28_MASK 0x3FF ++#define ISPRSZ_VFILT2928_COEF29_SHIFT 16 ++#define ISPRSZ_VFILT2928_COEF29_MASK 0x3FF0000 ++ ++#define ISPRSZ_VFILT3130_COEF30_SHIFT 0 ++#define ISPRSZ_VFILT3130_COEF30_MASK 0x3FF ++#define ISPRSZ_VFILT3130_COEF31_SHIFT 16 ++#define ISPRSZ_VFILT3130_COEF31_MASK 0x3FF0000 ++ ++#define ISPRSZ_YENH_CORE_SHIFT 0 ++#define ISPRSZ_YENH_CORE_MASK 0xFF ++#define ISPRSZ_YENH_SLOP_SHIFT 8 ++#define ISPRSZ_YENH_SLOP_MASK 0xF00 ++#define ISPRSZ_YENH_GAIN_SHIFT 12 ++#define ISPRSZ_YENH_GAIN_MASK 0xF000 ++#define ISPRSZ_YENH_ALGO_SHIFT 16 ++#define ISPRSZ_YENH_ALGO_MASK 0x30000 ++ ++#define ISPH3A_PCR_AEW_ALAW_EN_SHIFT 1 ++#define ISPH3A_PCR_AF_MED_TH_SHIFT 3 ++#define ISPH3A_PCR_AF_RGBPOS_SHIFT 11 ++#define ISPH3A_PCR_AEW_AVE2LMT_SHIFT 22 ++#define ISPH3A_PCR_AEW_AVE2LMT_MASK 0xFFC00000 ++ ++#define ISPH3A_AEWWIN1_WINHC_SHIFT 0 ++#define ISPH3A_AEWWIN1_WINHC_MASK 0x3F ++#define ISPH3A_AEWWIN1_WINVC_SHIFT 6 ++#define ISPH3A_AEWWIN1_WINVC_MASK 0x1FC0 ++#define ISPH3A_AEWWIN1_WINW_SHIFT 13 ++#define ISPH3A_AEWWIN1_WINW_MASK 0xFE000 ++#define ISPH3A_AEWWIN1_WINH_SHIFT 24 ++#define ISPH3A_AEWWIN1_WINH_MASK 0x7F000000 ++ ++#define ISPH3A_AEWINSTART_WINSH_SHIFT 0 ++#define ISPH3A_AEWINSTART_WINSH_MASK 0x0FFF ++#define ISPH3A_AEWINSTART_WINSV_SHIFT 16 ++#define ISPH3A_AEWINSTART_WINSV_MASK 0x0FFF0000 ++ ++#define ISPH3A_AEWINBLK_WINH_SHIFT 0 ++#define ISPH3A_AEWINBLK_WINH_MASK 0x7F ++#define ISPH3A_AEWINBLK_WINSV_SHIFT 16 ++#define ISPH3A_AEWINBLK_WINSV_MASK 0x0FFF0000 ++ ++#define ISPH3A_AEWSUBWIN_AEWINCH_SHIFT 0 ++#define ISPH3A_AEWSUBWIN_AEWINCH_MASK 0x0F ++#define ISPH3A_AEWSUBWIN_AEWINCV_SHIFT 8 ++#define ISPH3A_AEWSUBWIN_AEWINCV_MASK 0x0F00 ++ ++#define ISPHIST_PCR_ENABLE_SHIFT 0 ++#define ISPHIST_PCR_ENABLE_MASK 0x01 ++#define ISPHIST_PCR_BUSY_SHIFT 1 ++#define ISPHIST_PCR_BUSY_MASK 0x02 ++ ++#define ISPHIST_CNT_DATASIZE_SHIFT 8 ++#define ISPHIST_CNT_DATASIZE_MASK 0x0100 ++#define ISPHIST_CNT_CLEAR_SHIFT 7 ++#define ISPHIST_CNT_CLEAR_MASK 0x080 ++#define ISPHIST_CNT_CFA_SHIFT 6 ++#define ISPHIST_CNT_CFA_MASK 0x040 ++#define ISPHIST_CNT_BINS_SHIFT 4 ++#define ISPHIST_CNT_BINS_MASK 0x030 ++#define ISPHIST_CNT_SOURCE_SHIFT 3 ++#define ISPHIST_CNT_SOURCE_MASK 0x08 ++#define ISPHIST_CNT_SHIFT_SHIFT 0 ++#define ISPHIST_CNT_SHIFT_MASK 0x07 ++ ++#define ISPHIST_WB_GAIN_WG00_SHIFT 24 ++#define ISPHIST_WB_GAIN_WG00_MASK 0xFF000000 ++#define ISPHIST_WB_GAIN_WG01_SHIFT 16 ++#define ISPHIST_WB_GAIN_WG01_MASK 0xFF0000 ++#define ISPHIST_WB_GAIN_WG02_SHIFT 8 ++#define ISPHIST_WB_GAIN_WG02_MASK 0xFF00 ++#define ISPHIST_WB_GAIN_WG03_SHIFT 0 ++#define ISPHIST_WB_GAIN_WG03_MASK 0xFF ++ ++#define ISPHIST_REGHORIZ_HSTART_SHIFT 16 /*REGION 0 to 3 HORZ and VERT */ ++#define ISPHIST_REGHORIZ_HSTART_MASK 0x3FFF0000 ++#define ISPHIST_REGHORIZ_HEND_SHIFT 0 ++#define ISPHIST_REGHORIZ_HEND_MASK 0x3FFF ++#define ISPHIST_REGVERT_VSTART_SHIFT 16 ++#define ISPHIST_REGVERT_VSTART_MASK 0x3FFF0000 ++#define ISPHIST_REGVERT_VEND_SHIFT 0 ++#define ISPHIST_REGVERT_VEND_MASK 0x3FFF ++ ++#define ISPHIST_REGHORIZ_MASK 0x3FFF3FFF ++#define ISPHIST_REGVERT_MASK 0x3FFF3FFF ++ ++#define ISPHIST_ADDR_SHIFT 0 ++#define ISPHIST_ADDR_MASK 0x3FF ++ ++#define ISPHIST_DATA_SHIFT 0 ++#define ISPHIST_DATA_MASK 0xFFFFF ++ ++#define ISPHIST_RADD_SHIFT 0 ++#define ISPHIST_RADD_MASK 0xFFFFFFFF ++ ++#define ISPHIST_RADD_OFF_SHIFT 0 ++#define ISPHIST_RADD_OFF_MASK 0xFFFF ++ ++#define ISPHIST_HV_INFO_HSIZE_SHIFT 16 ++#define ISPHIST_HV_INFO_HSIZE_MASK 0x3FFF0000 ++#define ISPHIST_HV_INFO_VSIZE_SHIFT 0 ++#define ISPHIST_HV_INFO_VSIZE_MASK 0x3FFF ++ ++#define ISPHIST_HV_INFO_MASK 0x3FFF3FFF ++ ++ ++#define ISPCCDC_LSC_GAIN_MODE_N_MASK 0x700 ++#define ISPCCDC_LSC_GAIN_MODE_N_SHIFT 8 ++#define ISPCCDC_LSC_GAIN_MODE_M_MASK 0x3800 ++#define ISPCCDC_LSC_GAIN_MODE_M_SHIFT 12 ++#define ISPCCDC_LSC_GAIN_FORMAT_MASK 0xE ++#define ISPCCDC_LSC_GAIN_FORMAT_SHIFT 1 ++#define ISPCCDC_LSC_AFTER_REFORMATTER_MASK (1<<6) ++ ++ ++#define ISPCCDC_LSC_INITIAL_X_MASK 0x3F ++#define ISPCCDC_LSC_INITIAL_X_SHIFT 0 ++#define ISPCCDC_LSC_INITIAL_Y_MASK 0x3F0000 ++#define ISPCCDC_LSC_INITIAL_Y_SHIFT 16 ++ ++ ++#define ISPMMU_REVISION_REV_MINOR_MASK 0xF ++#define ISPMMU_REVISION_REV_MAJOR_SHIFT 0x4 ++ ++#define IRQENABLE_MULTIHITFAULT (1<<4) ++#define IRQENABLE_TWFAULT (1<<3) ++#define IRQENABLE_EMUMISS (1<<2) ++#define IRQENABLE_TRANSLNFAULT (1<<1) ++#define IRQENABLE_TLBMISS (1) ++ ++#define ISPMMU_MMUCNTL_MMU_EN (1<<1) ++#define ISPMMU_MMUCNTL_TWL_EN (1<<2) ++#define ISPMMU_MMUCNTL_EMUTLBUPDATE (1<<3) ++#define ISPMMU_AUTOIDLE 0x1 ++#define ISPMMU_SIdlemode_Forceidle 0 ++#define ISPMMU_SIdlemode_Noidle 1 ++#define ISPMMU_SIdlemode_Smartidle 2 ++#define ISPMMU_SIdlemode_Shift 3 ++ ++#define ISPCSI1_AUTOIDLE 0x1 ++#define ISPCSI1_MIdleMode_Shift 12 ++#define ISPCSI1_MIdleMode_ForceStandBy 0x0 ++#define ISPCSI1_MIdleMode_NoStandBy 0x1 ++#define ISPCSI1_MIdleMode_SmartStandBy 0x2 ++ ++#endif /* __ISPREG_H__ */ +Index: git/drivers/media/video/isp/ispresizer.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ git/drivers/media/video/isp/ispresizer.c 2009-02-12 11:44:14.000000000 -0600 +@@ -0,0 +1,854 @@ ++/* ++ * drivers/media/video/ispresizer.c ++ * ++ * Driver Library for Resizer module in TI's OMAP3430 Camera ISP ++ * ++ * Copyright (C)2008 Texas Instruments, Inc. ++ * ++ * This package is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ * ++ * THIS PACKAGE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR ++ * IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED ++ * WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE. ++ * ++ * Resizer module for ISP driver on OMAP3430. It implements ++ * the Resizer module APIs defined in ispresizer.h. ++ */ ++ ++#include <linux/errno.h> ++#include <linux/types.h> ++#include <linux/delay.h> ++#include <asm/io.h> ++#include <linux/module.h> ++ ++#include "isp.h" ++#include "ispreg.h" ++#include "ispresizer.h" ++ ++/* ++ * Resizer Constants ++ */ ++#define MAX_IN_WIDTH_MEMORY_MODE 4095 ++ ++#define MAX_IN_WIDTH_ONTHEFLY_MODE 1280 ++#define MAX_IN_WIDTH_ONTHEFLY_MODE_ES2 4095 ++#define MAX_IN_HEIGHT 4095 ++#define MINIMUM_RESIZE_VALUE 64 ++#define MAXIMUM_RESIZE_VALUE 1024 ++#define MID_RESIZE_VALUE 512 ++ ++#define MAX_7TAP_HRSZ_OUTWIDTH 1280 ++#define MAX_7TAP_VRSZ_OUTWIDTH 640 ++ ++#define MAX_7TAP_HRSZ_OUTWIDTH_ES2 3300 ++#define MAX_7TAP_VRSZ_OUTWIDTH_ES2 1650 ++ ++#define DEFAULTSTPIXEL 0 ++#define DEFAULTSTPHASE 1 ++#define DEFAULTHSTPIXEL4TAPMODE 3 ++#define FOURPHASE 4 ++#define EIGHTPHASE 8 ++#define RESIZECONSTANT 256 ++#define SHIFTER4TAPMODE 0 ++#define SHIFTER7TAPMODE 1 ++#define DEFAULTOFFSET 7 ++#define OFFSETVERT4TAPMODE 4 ++#define OPWDALIGNCONSTANT 0xFFFFFFF0 ++ ++/* Default configuration of resizer,filter coefficients,yenh for camera isp*/ ++static struct isprsz_yenh ispreszdefaultyenh = {0, 0, 0, 0}; ++static struct isprsz_coef ispreszdefcoef = { ++{ ++ 0x0000, 0x0100, 0x0000, 0x0000, ++ 0x03FA, 0x00F6, 0x0010, 0x0000, ++ 0x03F9, 0x00DB, 0x002C, 0x0000, ++ 0x03FB, 0x00B3, 0x0053, 0x03FF, ++ 0x03FD, 0x0082, 0x0084, 0x03FD, ++ 0x03FF, 0x0053, 0x00B3, 0x03FB, ++ 0x0000, 0x002C, 0x00DB, 0x03F9, ++ 0x0000, 0x0010, 0x00F6, 0x03FA ++ }, ++ { ++ 0x0000, 0x0100, 0x0000, 0x0000, ++ 0x03FA, 0x00F6, 0x0010, 0x0000, ++ 0x03F9, 0x00DB, 0x002C, 0x0000, ++ 0x03FB, 0x00B3, 0x0053, 0x03FF, ++ 0x03FD, 0x0082, 0x0084, 0x03FD, ++ 0x03FF, 0x0053, 0x00B3, 0x03FB, ++ 0x0000, 0x002C, 0x00DB, 0x03F9, ++ 0x0000, 0x0010, 0x00F6, 0x03FA ++ }, ++ { ++ 0x0004, 0x0023, 0x005A, 0x0058, ++ 0x0023, 0x0004, 0x0000, 0x0002, ++ 0x0018, 0x004d, 0x0060, 0x0031, ++ 0x0008, 0x0000, 0x0001, 0x000f, ++ 0x003f, 0x0062, 0x003f, 0x000f, ++ 0x0001, 0x0000, 0x0008, 0x0031, ++ 0x0060, 0x004d, 0x0018, 0x0002 ++ }, ++ { ++ 0x0004, 0x0023, 0x005A, 0x0058, ++ 0x0023, 0x0004, 0x0000, 0x0002, ++ 0x0018, 0x004d, 0x0060, 0x0031, ++ 0x0008, 0x0000, 0x0001, 0x000f, ++ 0x003f, 0x0062, 0x003f, 0x000f, ++ 0x0001, 0x0000, 0x0008, 0x0031, ++ 0x0060, 0x004d, 0x0018, 0x0002 ++ } ++ }; ++ ++/* ++ * Structure for the resizer module to store its own information. ++ */ ++static struct isp_res { ++ u8 res_inuse; ++ u8 h_startphase; ++ u8 v_startphase; ++ u16 h_resz; ++ u16 v_resz; ++ u32 outputwidth; ++ u32 outputheight; ++ u32 inputwidth; ++ u32 inputheight; ++ u8 algo; ++ u32 ipht_crop; ++ u32 ipwd_crop; ++ u32 cropwidth; ++ u32 cropheight; ++ enum ispresizer_input resinput; ++ struct isprsz_coef coeflist; ++ struct semaphore semlock; ++} ispres_obj; ++ ++/* Structure for saving/restoring resizer module registers*/ ++static struct isp_reg isprsz_reg_list[] = { ++ {ISPRSZ_CNT, 0x0000}, ++ {ISPRSZ_OUT_SIZE, 0x0000}, ++ {ISPRSZ_IN_START, 0x0000}, ++ {ISPRSZ_IN_SIZE, 0x0000}, ++ {ISPRSZ_SDR_INADD, 0x0000}, ++ {ISPRSZ_SDR_INOFF, 0x0000}, ++ {ISPRSZ_SDR_OUTADD, 0x0000}, ++ {ISPRSZ_SDR_OUTOFF, 0x0000}, ++ {ISPRSZ_HFILT10, 0x0000}, ++ {ISPRSZ_HFILT32, 0x0000}, ++ {ISPRSZ_HFILT54, 0x0000}, ++ {ISPRSZ_HFILT76, 0x0000}, ++ {ISPRSZ_HFILT98, 0x0000}, ++ {ISPRSZ_HFILT1110, 0x0000}, ++ {ISPRSZ_HFILT1312, 0x0000}, ++ {ISPRSZ_HFILT1514, 0x0000}, ++ {ISPRSZ_HFILT1716, 0x0000}, ++ {ISPRSZ_HFILT1918, 0x0000}, ++ {ISPRSZ_HFILT2120, 0x0000}, ++ {ISPRSZ_HFILT2322, 0x0000}, ++ {ISPRSZ_HFILT2524, 0x0000}, ++ {ISPRSZ_HFILT2726, 0x0000}, ++ {ISPRSZ_HFILT2928, 0x0000}, ++ {ISPRSZ_HFILT3130, 0x0000}, ++ {ISPRSZ_VFILT10, 0x0000}, ++ {ISPRSZ_VFILT32, 0x0000}, ++ {ISPRSZ_VFILT54, 0x0000}, ++ {ISPRSZ_VFILT76, 0x0000}, ++ {ISPRSZ_VFILT98, 0x0000}, ++ {ISPRSZ_VFILT1110, 0x0000}, ++ {ISPRSZ_VFILT1312, 0x0000}, ++ {ISPRSZ_VFILT1514, 0x0000}, ++ {ISPRSZ_VFILT1716, 0x0000}, ++ {ISPRSZ_VFILT1918, 0x0000}, ++ {ISPRSZ_VFILT2120, 0x0000}, ++ {ISPRSZ_VFILT2322, 0x0000}, ++ {ISPRSZ_VFILT2524, 0x0000}, ++ {ISPRSZ_VFILT2726, 0x0000}, ++ {ISPRSZ_VFILT2928, 0x0000}, ++ {ISPRSZ_VFILT3130, 0x0000}, ++ {ISPRSZ_YENH, 0x0000}, ++ {ISP_TOK_TERM, 0x0000} ++}; ++ ++void ispresizer_config_shadow_registers() ++{ ++ return; ++} ++EXPORT_SYMBOL(ispresizer_config_shadow_registers); ++ ++void ispresizer_trycrop(u32 left, u32 top, u32 width, u32 height, u32 ow, ++ u32 oh) ++{ ++ ispres_obj.cropwidth = width + 6; ++ ispres_obj.cropheight = height + 6; ++ ispresizer_try_size(&ispres_obj.cropwidth, &ispres_obj.cropheight, &ow, ++ &oh); ++ ispres_obj.ipht_crop = top; ++ ispres_obj.ipwd_crop = left; ++} ++EXPORT_SYMBOL(ispresizer_trycrop); ++ ++void ispresizer_applycrop() ++{ ++ ispresizer_config_size(ispres_obj.cropwidth, ispres_obj.cropheight, ++ ispres_obj.outputwidth, ++ ispres_obj.outputheight); ++ return; ++} ++ ++ ++/* ++ * Reserve the Resizer module. ++ * Only one user at a time. ++ */ ++int ispresizer_request() ++{ ++ down(&(ispres_obj.semlock)); ++ if (!(ispres_obj.res_inuse)) { ++ ispres_obj.res_inuse = 1; ++ up(&(ispres_obj.semlock)); ++ /* Turn on Resizer module Clocks.*/ ++ omap_writel(omap_readl(ISP_CTRL) | ISPCTRL_SBL_WR0_RAM_EN | ++ ISPCTRL_RSZ_CLK_EN, ISP_CTRL); ++ return 0; ++ } else { ++ up(&(ispres_obj.semlock)); ++ printk(KERN_ERR "ISP_ERR : Resizer Module Busy\n"); ++ return -EBUSY; ++ } ++} ++EXPORT_SYMBOL(ispresizer_request); ++ ++/* ++ * Makes Resizer module free. ++ */ ++int ispresizer_free() ++{ ++ down(&(ispres_obj.semlock)); ++ if (ispres_obj.res_inuse) { ++ ispres_obj.res_inuse = 0; ++ up(&(ispres_obj.semlock)); ++ omap_writel(omap_readl(ISP_CTRL) & ~(ISPCTRL_RSZ_CLK_EN | ++ ISPCTRL_SBL_WR0_RAM_EN), ISP_CTRL); ++ return 0; ++ } else { ++ up(&(ispres_obj.semlock)); ++ DPRINTK_ISPRESZ("ISP_ERR : Resizer Module already freed\n"); ++ return -EINVAL; ++ } ++} ++EXPORT_SYMBOL(ispresizer_free); ++ ++/* ++ * Sets up the default resizer configuration according to the arguments. ++ * input : Indicates the module that gives the image to resizer ++ */ ++int ++ispresizer_config_datapath(enum ispresizer_input input) ++{ ++ u32 cnt = 0; ++ DPRINTK_ISPRESZ("ispresizer_config_datapath()+\n"); ++ ispres_obj.resinput = input; ++ switch (input) { ++ case RSZ_OTFLY_YUV: ++ cnt &= ~ISPRSZ_CNT_INPTYP; ++ cnt &= ~ISPRSZ_CNT_INPSRC; ++ /* according to TRM, inline address and inline offset must be ++ * set to 0 for OTF input mode ++ */ ++ ispresizer_set_inaddr(0); ++ ispresizer_config_inlineoffset(0); ++ break; ++ case RSZ_MEM_YUV: ++ cnt |= ISPRSZ_CNT_INPSRC; ++ cnt &= ~ISPRSZ_CNT_INPTYP; ++ break; ++ case RSZ_MEM_COL8: ++ cnt |= ISPRSZ_CNT_INPSRC; ++ cnt |= ISPRSZ_CNT_INPTYP; ++ break; ++ default: ++ printk(KERN_ERR "ISP_ERR : Wrong Input\n"); ++ return -EINVAL; ++ } ++ omap_writel(omap_readl(ISPRSZ_CNT) | cnt, ISPRSZ_CNT); ++ /*Set up default parameters ++ */ ++ ispresizer_config_ycpos(0); ++ ispresizer_config_filter_coef(&ispreszdefcoef); ++ ispresizer_enable_cbilin(0); ++ ispresizer_config_luma_enhance(&ispreszdefaultyenh); ++ DPRINTK_ISPRESZ("ispresizer_config_datapath()-\n"); ++ return 0; ++} ++EXPORT_SYMBOL(ispresizer_config_datapath); ++ ++/* ++ * Calculates the horizontal and vertical resize ratio,number of pixels to ++ * be cropped in the resizer module and checks the validity of various ++ * parameters.This function internally calls trysize_calculation,which does ++ * the actual calculations and populates required members of isp_res struct ++ * Formula used for calculation is:- ++ * 8-phase 4-tap mode :- ++ * inputwidth = (32*sph + (ow - 1)*hrsz + 16) >> 8 + 7 ++ * inputheight = (32*spv + (oh - 1)*vrsz + 16) >> 8 + 4 ++ * endpahse for width = ( ( 32*sph + (ow - 1)*hrsz +16 ) >> 5 )% 8 ++ * endphase for height = ( ( 32*sph + (oh - 1)*hrsz +16 ) >> 5 )% 8 ++ * 4-phase 7-tap mode :- ++ * inputwidth = (64*sph + (ow - 1)*hrsz + 32) >> 8 + 7 ++ * inputheight = (64*spv + (oh - 1)*vrsz + 32) >> 8 + 7 ++ * endpahse for width = ( ( 64*sph + (ow - 1)*hrsz +32 ) >> 6 )% 4 ++ * endphase for height = ( ( 64*sph + (oh - 1)*hrsz +32 ) >> 6 )% 4 ++ * where ++ * sph = Start phase horizontal ++ * spv = Start phase vertical ++ * ow = Output width ++ * oh = Output height ++ * hrsz = Horizontal resize value ++ * vrsz = Vertical resize value ++ * Fills up the output/input widht/height,horizontal/vertical resize ratio, ++ * horizontal/vertical crop variables in the isp_res structure . ++ * input_w: input width for the resizer in number of pixels per line ++ * input_h: input height for the resizer in number of lines ++ * output_w: output width from the resizer in number of pixels per line ++ * resizer when writing to memory needs this to be multiple of 16 ++ * output_h: output height for the resizer in number of lines, must be even ++*/ ++int ispresizer_try_size(u32 *input_width, u32 *input_height, u32 *output_w, ++ u32 *output_h) ++{ ++ u32 rsz, rsz_7, rsz_4; ++ u32 sph; ++ u32 input_w, input_h; ++ u32 output; ++ int max_in_otf, max_out_7tap; ++ input_w = *input_width; ++ input_h = *input_height; ++ ++ /* ++ * This has to be done inorder to make sure that the try size does not ++ * end up with input height/width greater than what the preview will ++ * output. ++ */ ++ input_w = input_w - 6; ++ input_h = input_h - 6; ++ ++ if (input_h > MAX_IN_HEIGHT) ++ return -EINVAL; ++ ++/// if (is_sil_rev_equal_to(OMAP3430_REV_ES1_0)) { ++/// max_in_otf = MAX_IN_WIDTH_ONTHEFLY_MODE; ++// max_out_7tap = MAX_7TAP_VRSZ_OUTWIDTH; ++/// } else { ++ max_in_otf = MAX_IN_WIDTH_ONTHEFLY_MODE_ES2; ++ max_out_7tap = MAX_7TAP_VRSZ_OUTWIDTH_ES2; ++/// } ++ ++ if (ispres_obj.resinput == RSZ_OTFLY_YUV) { ++ if (input_w > max_in_otf) ++ return -EINVAL; ++ } else { ++ if (input_w > MAX_IN_WIDTH_MEMORY_MODE) ++ return -EINVAL; ++ } ++ ++ ++ *(output_h) = *(output_h) & 0xFFFFFFFE; ++ output = *(output_h); ++ sph = DEFAULTSTPHASE; ++ ++ /* For height */ ++ rsz_7 = ((input_h - 7) * 256) / (output - 1); ++ rsz_4 = ((input_h - 4) * 256) / (output - 1); ++ ++ rsz = (input_h * 256) / output; ++ ++ if (rsz <= MID_RESIZE_VALUE) { ++ rsz = rsz_4; ++ if (rsz < MINIMUM_RESIZE_VALUE) { ++ rsz = MINIMUM_RESIZE_VALUE; ++ output = (((input_h - 4) * 256) / rsz) + 1; ++ printk(KERN_ERR "\t ISP_ERR: rsz was less than min -" ++ " new op_h is = %d\n", output); ++ } ++ } else { ++ rsz = rsz_7; ++ if (*(output_w) > max_out_7tap) ++ *(output_w) = max_out_7tap; ++ if (rsz > MAXIMUM_RESIZE_VALUE) { ++ rsz = MAXIMUM_RESIZE_VALUE; ++ output = (((input_h - 7) * 256) / rsz) + 1; ++ printk("\t ISP_ERR: rsz was more than max - new op_h" ++ " is %d\n", output); ++ } ++ } ++ ++ /* Recalculate input */ ++ if (rsz > MID_RESIZE_VALUE) ++ input_h = (((64 * sph) + ((output - 1) * rsz) + 32) / 256) + 7; ++ else ++ input_h = (((32 * sph) + ((output - 1) * rsz) + 16) / 256) + 4; ++ ++ ispres_obj.outputheight = output; ++ ispres_obj.v_resz = rsz; ++ ispres_obj.inputheight = input_h; ++ ispres_obj.ipht_crop = DEFAULTSTPIXEL; ++ ispres_obj.v_startphase = sph; ++ ++ ++ *(output_w) = *(output_w) & 0xFFFFFFF0; ++ output = *(output_w); ++ sph = DEFAULTSTPHASE; ++ ++ /* For Width */ ++ rsz_7 = ((input_w - 7) * 256) / (output - 1); ++ rsz_4 = ((input_w - 4) * 256) / (output - 1); ++ ++ rsz = (input_w * 256) / output; ++ if (rsz > MID_RESIZE_VALUE) { ++ rsz = rsz_7; ++ if (rsz > MAXIMUM_RESIZE_VALUE) { ++ rsz = MAXIMUM_RESIZE_VALUE; ++ output = (((input_w - 7) * 256) / rsz) + 1; ++ printk("\t ISP_ERR: rsz was greater than max - new" ++ " op_w is %d\n", output); ++ } ++ } else { ++ rsz = rsz_4; ++ if (rsz < MINIMUM_RESIZE_VALUE) { ++ rsz = MINIMUM_RESIZE_VALUE; ++ output = (((input_w - 4) * 256) / rsz) + 1; ++ printk("\t ISP_ERR: rsz was less than min - new op_w" ++ " is %d\n", output); ++ } ++ } ++ ++ /* Recalculate input based on TRM equations */ ++ if (rsz > MID_RESIZE_VALUE) ++ input_w = (((64 * sph) + ((output - 1) * rsz) + 32) / 256) + 7; ++ else ++ input_w = (((32 * sph) + ((output - 1) * rsz) + 16) / 256) + 7; ++ ++ ispres_obj.outputwidth = output; ++ ispres_obj.h_resz = rsz; ++ ispres_obj.inputwidth = input_w; ++ ispres_obj.ipwd_crop = DEFAULTSTPIXEL; ++ ispres_obj.h_startphase = sph; ++ ++ *input_height = input_h; ++ *input_width = input_w; ++ return 0; ++} ++EXPORT_SYMBOL(ispresizer_try_size); ++ ++/* ++ * Configures the appropriate values stored in the isp_res structure in ++ * the resizer registers ++ * input_w : input width for the resizer in number of pixels per line ++ * input_h : input height for the resizer in number of lines ++ * output_w : output width from the resizer in number of pixels per line ++ * output_h : output height for the resizer in number of lines ++ */ ++int ++ispresizer_config_size(u32 input_w, u32 input_h, u32 output_w, u32 output_h) ++{ ++ int i, j; ++ u32 res; ++ DPRINTK_ISPRESZ("ispresizer_config_size()+, input_w = %d,input_h =" ++ " %d, output_w = %d, output_h" ++ " = %d,hresz = %d,vresz = %d," ++ " hcrop = %d, vcrop = %d," ++ " hstph = %d, vstph = %d\n", ++ ispres_obj.inputwidth, ++ ispres_obj.inputheight, ++ ispres_obj.outputwidth, ++ ispres_obj.outputheight, ++ ispres_obj.h_resz, ++ ispres_obj.v_resz, ++ ispres_obj.ipwd_crop, ++ ispres_obj.ipht_crop, ++ ispres_obj.h_startphase, ++ ispres_obj.v_startphase); ++ if ((output_w != ispres_obj.outputwidth) ++ || (output_h != ispres_obj.outputheight)) { ++ printk(KERN_ERR "Output parameters passed do not match the" ++ " values calculated by the" ++ " trysize passed w %d, h %d" ++ " \n", output_w , output_h); ++ return -EINVAL; ++ } ++ /* Set horizontal and vertical starting phase */ ++ res = omap_readl(ISPRSZ_CNT) & (~(ISPRSZ_CNT_HSTPH_MASK | ++ ISPRSZ_CNT_VSTPH_MASK)); ++ omap_writel(res | (ispres_obj.h_startphase << ISPRSZ_CNT_HSTPH_SHIFT) ++ | (ispres_obj.v_startphase << ISPRSZ_CNT_VSTPH_SHIFT) ++ , ISPRSZ_CNT); ++ /* Set horizontal and vertical start pixel */ ++ omap_writel(((ispres_obj.ipwd_crop * 2) << ++ ISPRSZ_IN_START_HORZ_ST_SHIFT) | ++ (ispres_obj.ipht_crop << ++ ISPRSZ_IN_START_VERT_ST_SHIFT), ++ ISPRSZ_IN_START); ++ ++ ++ /*Set input width and height*/ ++ omap_writel((ispres_obj.inputwidth << ISPRSZ_IN_SIZE_HORZ_SHIFT) | ++ (ispres_obj.inputheight << ++ ISPRSZ_IN_SIZE_VERT_SHIFT), ++ ISPRSZ_IN_SIZE); ++ /*Set output width and height*/ ++ if (!ispres_obj.algo) ++ omap_writel((output_w << ISPRSZ_OUT_SIZE_HORZ_SHIFT) | ++ (output_h << ++ ISPRSZ_OUT_SIZE_VERT_SHIFT), ++ ISPRSZ_OUT_SIZE); ++ else ++ omap_writel(((output_w - 4) << ISPRSZ_OUT_SIZE_HORZ_SHIFT) | ++ (output_h << ++ ISPRSZ_OUT_SIZE_VERT_SHIFT), ++ ISPRSZ_OUT_SIZE); ++ ++ ++ /*Set horizontal and vertical resize ratios*/ ++ res = omap_readl(ISPRSZ_CNT) & (~(ISPRSZ_CNT_HRSZ_MASK | ++ ISPRSZ_CNT_VRSZ_MASK)); ++ omap_writel(res | ((ispres_obj.h_resz - 1) << ISPRSZ_CNT_HRSZ_SHIFT) ++ | ((ispres_obj.v_resz - 1) << ISPRSZ_CNT_VRSZ_SHIFT) ++ , ISPRSZ_CNT); ++ /*Set the horizontal/vertical filter coefficients depending on the ++ * resize values ++ */ ++ if (ispres_obj.h_resz <= MID_RESIZE_VALUE) { ++ j = 0; ++ for (i = 0; i < 16; i++) { ++ omap_writel((ispres_obj.coeflist. ++ h_filter_coef_4tap[j] << ++ ISPRSZ_HFILT10_COEF0_SHIFT) | ++ (ispres_obj.coeflist.h_filter_coef_4tap[j+1] ++ << ISPRSZ_HFILT10_COEF1_SHIFT), ++ ISPRSZ_HFILT10 + (i * 0x04)); ++ j += 2; ++ } ++ } else { ++ j = 0; ++ for (i = 0; i < 16; i++) { ++ if ((i + 1) % 4 == 0) { ++ omap_writel((ispres_obj.coeflist. ++ h_filter_coef_7tap[j] << ++ ISPRSZ_HFILT10_COEF0_SHIFT) , ++ ISPRSZ_HFILT10 + (i * 0x04)); ++ j += 1; ++ } else { ++ omap_writel((ispres_obj.coeflist. ++ h_filter_coef_7tap[j] << ++ ISPRSZ_HFILT10_COEF0_SHIFT) | ++ (ispres_obj.coeflist. ++ h_filter_coef_7tap[j+1] << ++ ISPRSZ_HFILT10_COEF1_SHIFT), ++ ISPRSZ_HFILT10 + (i * 0x04)); ++ j += 2; ++ } ++ } ++ } ++ if (ispres_obj.v_resz <= MID_RESIZE_VALUE) { ++ j = 0; ++ for (i = 0; i < 16; i++) { ++ omap_writel((ispres_obj.coeflist. ++ v_filter_coef_4tap[j] << ++ ISPRSZ_VFILT10_COEF0_SHIFT) | ++ (ispres_obj.coeflist.v_filter_coef_4tap[j+1] ++ << ISPRSZ_VFILT10_COEF1_SHIFT), ++ ISPRSZ_VFILT10 + (i * 0x04)); ++ j += 2; ++ } ++ } else { ++ j = 0; ++ for (i = 0; i < 16; i++) { ++ if ((i + 1) % 4 == 0) { ++ omap_writel((ispres_obj.coeflist. ++ v_filter_coef_7tap[j] << ++ ISPRSZ_VFILT10_COEF0_SHIFT) , ++ ISPRSZ_VFILT10 + (i * 0x04)); ++ j += 1; ++ } else { ++ omap_writel((ispres_obj.coeflist. ++ v_filter_coef_7tap[j] << ++ ISPRSZ_VFILT10_COEF0_SHIFT) | ++ (ispres_obj.coeflist. ++ v_filter_coef_7tap[j+1] << ++ ISPRSZ_VFILT10_COEF1_SHIFT), ++ ISPRSZ_VFILT10 + (i * 0x04)); ++ j += 2; ++ } ++ } ++ } ++ ++ /* Configure the outline offset to e outputwidth*2*/ ++ ispresizer_config_outlineoffset(output_w*2); ++ DPRINTK_ISPRESZ("ispresizer_config_size()-\n"); ++ return 0; ++} ++EXPORT_SYMBOL(ispresizer_config_size); ++ ++/* ++ * Enables the Resizer module. ++ * Client should configure all the sub modules in Resizer before this. ++ * enable : 1- Enables the resizer module. ++ */ ++void ++ispresizer_enable(u8 enable) ++{ ++ DPRINTK_ISPRESZ("+ispresizer_enable()+\n"); ++ if (enable) ++ omap_writel((omap_readl(ISPRSZ_PCR)) | ++ ISPRSZ_PCR_ENABLE, ISPRSZ_PCR); ++ else { ++ omap_writel((omap_readl(ISPRSZ_PCR)) & ++ ~ISPRSZ_PCR_ENABLE, ISPRSZ_PCR); ++ } ++ DPRINTK_ISPRESZ("+ispresizer_enable()-\n"); ++} ++EXPORT_SYMBOL(ispresizer_enable); ++ ++int ispresizer_busy(void) ++{ ++ return (omap_readl(ISPRSZ_PCR) & ISPPRV_PCR_BUSY); ++} ++EXPORT_SYMBOL(ispresizer_busy); ++ ++/* ++ * Sets the horizontal and vertical start phase. ++ * This API just updates the isp_res struct.Actual register write happens in ++ * ispresizer_config_size. ++ * hstartphase : horizontal start phase(0-7) ++ * vstartphase : vertical startphase(0-7) ++ */ ++void ispresizer_config_startphase(u8 hstartphase, u8 vstartphase) ++{ ++ DPRINTK_ISPRESZ("ispresizer_config_startphase()+\n"); ++ ispres_obj.h_startphase = hstartphase; ++ ispres_obj.v_startphase = vstartphase; ++ DPRINTK_ISPRESZ("ispresizer_config_startphase()-\n"); ++} ++EXPORT_SYMBOL(ispresizer_config_startphase); ++ ++/* ++ * Sets whether the output should be in YC or CY format. ++ * yc :0 - YC format ++ * 1 - CY format ++ */ ++void ispresizer_config_ycpos(u8 yc) ++{ ++ DPRINTK_ISPRESZ("ispresizer_config_ycpos()+\n"); ++ if (yc) ++ omap_writel((omap_readl(ISPRSZ_CNT)) | ++ (ISPRSZ_CNT_YCPOS), ISPRSZ_CNT); ++ else ++ omap_writel((omap_readl(ISPRSZ_CNT)) & ++ (~ISPRSZ_CNT_YCPOS), ISPRSZ_CNT); ++ DPRINTK_ISPRESZ("ispresizer_config_ycpos()-\n"); ++} ++EXPORT_SYMBOL(ispresizer_config_ycpos); ++ ++/* ++ * Sets the chrominance algorithm ++ * cbilin :0 - chrominance uses same processing as luminance ++ * 1 - bilinear interpolation processing ++ */ ++void ++ispresizer_enable_cbilin(u8 enable) ++{ ++ DPRINTK_ISPRESZ("ispresizer_enable_cbilin()+\n"); ++ if (enable) ++ omap_writel((omap_readl(ISPRSZ_CNT)) | ++ (ISPRSZ_CNT_CBILIN), ISPRSZ_CNT); ++ else ++ omap_writel((omap_readl(ISPRSZ_CNT)) & ++ (~ISPRSZ_CNT_CBILIN) , ISPRSZ_CNT); ++ DPRINTK_ISPRESZ("ispresizer_enable_cbilin()-\n"); ++} ++EXPORT_SYMBOL(ispresizer_enable_cbilin); ++ ++/* ++ * Configures luminance enhancer parameters. ++ * yenh :structure containing desired values for core,slope,gain and ++ * algo parameters ++ */ ++void ++ispresizer_config_luma_enhance(struct isprsz_yenh *yenh) ++{ ++ DPRINTK_ISPRESZ("ispresizer_config_luma_enhance()+\n"); ++ ispres_obj.algo = yenh->algo; ++ omap_writel((yenh->algo << ISPRSZ_YENH_ALGO_SHIFT) | ++ (yenh->gain << ISPRSZ_YENH_GAIN_SHIFT) | ++ (yenh->slope << ISPRSZ_YENH_SLOP_SHIFT) | ++ (yenh->coreoffset << ISPRSZ_YENH_CORE_SHIFT), ++ ISPRSZ_YENH); ++ DPRINTK_ISPRESZ("ispresizer_config_luma_enhance()-\n"); ++} ++EXPORT_SYMBOL(ispresizer_config_luma_enhance); ++ ++/* ++ * Sets the filter coefficients for both 4-tap and 7-tap mode. ++ * This API just updates the isp_res struct.Actual register write happens in ++ * ispresizer_config_size. ++ * coef :structure containing horizontal and vertical filter ++ * coefficients for both 4-tap and 7-tap mode ++ */ ++void ispresizer_config_filter_coef(struct isprsz_coef *coef) ++{ ++ int i; ++ DPRINTK_ISPRESZ("ispresizer_config_filter_coef()+\n"); ++ for (i = 0; i < 32; i++) { ++ ispres_obj.coeflist.h_filter_coef_4tap[i] = ++ coef->h_filter_coef_4tap[i]; ++ ispres_obj.coeflist.v_filter_coef_4tap[i] = ++ coef->v_filter_coef_4tap[i]; ++ } ++ for (i = 0; i < 28; i++) { ++ ispres_obj.coeflist.h_filter_coef_7tap[i] = ++ coef->h_filter_coef_7tap[i]; ++ ispres_obj.coeflist.v_filter_coef_7tap[i] = ++ coef->v_filter_coef_7tap[i]; ++ } ++ DPRINTK_ISPRESZ("ispresizer_config_filter_coef()-\n"); ++} ++EXPORT_SYMBOL(ispresizer_config_filter_coef); ++ ++/* ++ * Configures the Read address line offset. ++ * offset : Line Offset for the input image. ++ */ ++int ispresizer_config_inlineoffset(u32 offset) ++{ ++ DPRINTK_ISPRESZ("ispresizer_config_inlineoffset()+\n"); ++ if (offset%32) ++ return -EINVAL; ++ omap_writel(offset << ISPRSZ_SDR_INOFF_OFFSET_SHIFT, ISPRSZ_SDR_INOFF); ++ DPRINTK_ISPRESZ("ispresizer_config_inlineoffset()-\n"); ++ return 0; ++} ++EXPORT_SYMBOL(ispresizer_config_inlineoffset); ++ ++/* ++ * Configures the memory address from which the input frame is to be read. ++ * addr : 32bit memory address aligned on 32byte boundary. ++ */ ++int ++ispresizer_set_inaddr(u32 addr) ++{ ++ DPRINTK_ISPRESZ("ispresizer_set_inaddr()+\n"); ++ if (addr%32) ++ return -EINVAL; ++ omap_writel(addr << ISPRSZ_SDR_INADD_ADDR_SHIFT, ISPRSZ_SDR_INADD); ++ DPRINTK_ISPRESZ("ispresizer_set_inaddr()-\n"); ++ return 0; ++} ++EXPORT_SYMBOL(ispresizer_set_inaddr); ++ ++/* ++ * Configures the Write address line offset. ++ * offset : Line Offset for the preview output. ++ */ ++int ispresizer_config_outlineoffset(u32 offset) ++{ ++ DPRINTK_ISPRESZ("ispresizer_config_outlineoffset()+\n"); ++ if (offset%32) ++ return -EINVAL; ++ omap_writel(offset << ISPRSZ_SDR_OUTOFF_OFFSET_SHIFT, ++ ISPRSZ_SDR_OUTOFF); ++ DPRINTK_ISPRESZ("ispresizer_config_outlineoffset()-\n"); ++ return 0; ++} ++EXPORT_SYMBOL(ispresizer_config_outlineoffset); ++ ++/* ++ * Configures the memory address to which the output frame is written. ++ * addr : 32bit memory address aligned on 32byte boundary. ++ */ ++int ispresizer_set_outaddr(u32 addr) ++{ ++ DPRINTK_ISPRESZ("ispresizer_set_outaddr()+\n"); ++ if (addr%32) ++ return -EINVAL; ++ omap_writel(addr << ISPRSZ_SDR_OUTADD_ADDR_SHIFT, ISPRSZ_SDR_OUTADD); ++ ++ DPRINTK_ISPRESZ("ispresizer_set_outaddr()-\n"); ++ return 0; ++} ++EXPORT_SYMBOL(ispresizer_set_outaddr); ++ ++/* ++ * Saves the values of the resizer module registers. ++ */ ++void ispresizer_save_context(void) ++{ ++ DPRINTK_ISPRESZ("Saving context\n"); ++ isp_save_context(isprsz_reg_list); ++} ++EXPORT_SYMBOL(ispresizer_save_context); ++ ++/* ++ * Restores the values of the resizer module registers. ++ */ ++void ispresizer_restore_context(void) ++{ ++ DPRINTK_ISPRESZ("Restoring context\n"); ++ isp_restore_context(isprsz_reg_list); ++} ++EXPORT_SYMBOL(ispresizer_restore_context); ++ ++/* ++ * Prints the values of the Resizer Module registers ++ */ ++void ispresizer_print_status() ++{ ++#ifdef OMAP_ISPRESZ_DEBUG ++ DPRINTK_ISPRESZ("###ISP_CTRL inresizer =0x%x\n", omap_readl(ISP_CTRL)); ++ ++ DPRINTK_ISPRESZ("###ISP_IRQ0ENABLE in resizer =0x%x\n", ++ omap_readl(ISP_IRQ0ENABLE)); ++ DPRINTK_ISPRESZ("###ISP_IRQ0STATUS in resizer =0x%x\n", ++ omap_readl(ISP_IRQ0STATUS)); ++ DPRINTK_ISPRESZ("###RSZ PCR =0x%x\n", omap_readl(ISPRSZ_PCR)); ++ DPRINTK_ISPRESZ("###RSZ CNT =0x%x\n", omap_readl(ISPRSZ_CNT)); ++ DPRINTK_ISPRESZ("###RSZ OUT SIZE =0x%x\n", ++ omap_readl(ISPRSZ_OUT_SIZE)); ++ DPRINTK_ISPRESZ("###RSZ IN START =0x%x\n", ++ omap_readl(ISPRSZ_IN_START)); ++ DPRINTK_ISPRESZ("###RSZ IN SIZE =0x%x\n", omap_readl(ISPRSZ_IN_SIZE)); ++ DPRINTK_ISPRESZ("###RSZ SDR INADD =0x%x\n", ++ omap_readl(ISPRSZ_SDR_INADD)); ++ DPRINTK_ISPRESZ("###RSZ SDR INOFF =0x%x\n", ++ omap_readl(ISPRSZ_SDR_INOFF)); ++ DPRINTK_ISPRESZ("###RSZ SDR OUTADD =0x%x\n", ++ omap_readl(ISPRSZ_SDR_OUTADD)); ++ DPRINTK_ISPRESZ("###RSZ SDR OTOFF =0x%x\n", ++ omap_readl(ISPRSZ_SDR_OUTOFF)); ++ DPRINTK_ISPRESZ("###RSZ YENH =0x%x\n", omap_readl(ISPRSZ_YENH)); ++#endif ++} ++EXPORT_SYMBOL(ispresizer_print_status); ++ ++/* ++ * Module Initialisation. ++ */ ++static int __init ++isp_resizer_init(void) ++{ ++ /*Nothing to do other than mutex init*/ ++ init_MUTEX(&(ispres_obj.semlock)); ++ return 0; ++} ++ ++static void ++isp_resizer_cleanup(void) ++{ ++ /*Nothing to do*/ ++} ++ ++module_init(isp_resizer_init); ++module_exit(isp_resizer_cleanup); ++ ++MODULE_AUTHOR("Texas Instruments"); ++MODULE_DESCRIPTION("ISP Resizer Library"); ++MODULE_LICENSE("GPL"); +Index: git/drivers/media/video/isp/ispresizer.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ git/drivers/media/video/isp/ispresizer.h 2009-02-12 10:29:26.000000000 -0600 +@@ -0,0 +1,184 @@ ++/* ++ * drivers/media/video/ispresizer.h ++ * ++ * Driver include file for Resizer module in TI's OMAP3430 Camera ISP ++ * ++ * Copyright (C) 2008 Texas Instruments, Inc. ++ * ++ * This package is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ * ++ * THIS PACKAGE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR ++ * IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED ++ * WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE. ++ */ ++ ++#ifndef OMAP_ISP_RESIZER_H ++#define OMAP_ISP_RESIZER_H ++ ++/************************************************************************ ++The client is supposed to call resizer API in the following sequence: ++ - request() ++ - config_datatpath() ++ - optionally config/enable sub modules ++ - try/config size ++ - setup callback ++ - setup in/out memory offsets and ptrs ++ - enable() ++ ... ++ - disable() ++ - free() ++*************************************************************************/ ++ ++void ispresizer_config_shadow_registers(void); ++ ++/* ++ * Reserve the resizer module and turns on the clocks ++ * Only one user at a time. ++ */ ++int ispresizer_request(void); ++ ++/* ++ * Marks Resizer module free and turns off the clocks. ++ */ ++int ispresizer_free(void); ++ ++/* ++ *Enumeration Constants for input format ++ */ ++enum ispresizer_input { ++ RSZ_OTFLY_YUV, ++ RSZ_MEM_YUV, ++ RSZ_MEM_COL8 ++}; ++ ++/* ++ * Sets up the default resizer configuration according to the arguments. ++ */ ++int ispresizer_config_datapath(enum ispresizer_input input); ++ ++/* ++ * Sets the chrominance algorithm ++ */ ++void ispresizer_enable_cbilin(u8 enable); ++ ++/* ++ * Sets whether the output should be in YC or CY format. ++ */ ++void ispresizer_config_ycpos(u8 yc); ++ ++/* ++ * Sets the horizontal and vertical start phase. ++ */ ++void ispresizer_config_startphase(u8 hstartphase, u8 vstartphase); ++ ++/* ++ * Structure for resizer filter coeffcients. ++ */ ++struct isprsz_coef{ ++ /* 8-phase/4-tap mode(.5x-4x) */ ++ u16 h_filter_coef_4tap[32]; ++ u16 v_filter_coef_4tap[32]; ++ /* 4-phase/7-tap mode(.25x-.5x) */ ++ u16 h_filter_coef_7tap[28]; ++ u16 v_filter_coef_7tap[28]; ++}; ++ ++/* ++ * Sets the filter coefficients for both 4-tap and 7-tap mode. ++ * Note this API doesn't program to hardware at all. It only make a local ++ * copy of filter arrays. The actual programming happnes when _config_size ++ * is called. ++ */ ++void ispresizer_config_filter_coef(struct isprsz_coef *coef); ++ ++/* ++ * Structure for resizer luminance enhancer parameters ++ */ ++struct isprsz_yenh{ ++ u8 algo; ++ u8 gain; ++ u8 slope; ++ u8 coreoffset; ++ }; ++ ++/* ++ * Configures luminance enhancer parameters. ++ */ ++void ispresizer_config_luma_enhance(struct isprsz_yenh *yenh); ++/* ++ * Calculates the horizontal and vertical resize ratio,number of pixels to ++ * be cropped in the resizer module and checks the validity of various ++ * parameters.We don't expose API to change RSZ_IN_START (cropping). HORZ_ST ++ * and VERT_ST are implictly set based on the expected output size and the ++ * need of small cropping on the input image. ++ * User should already config yenh/stphase before attempting any size API. ++ */ ++int ispresizer_try_size(u32 *input_w, u32 *input_h, u32 *output_w, ++ u32 *output_h); ++ ++ ++/* ++ * Applies Crop values to hardware ++ */ ++void ispresizer_applycrop(void); ++ ++/* ++ * Try size for applying crop. Updates global resizer structure. Does not ++ * update h/w ++ */ ++void ispresizer_trycrop(u32 left, u32 top, u32 width, u32 height, u32 ow, ++ u32 oh); ++ ++/* ++ * APT that programs I/O sizes, ratios, and the right filter coefficients ++ * to resizer hardware. ++ */ ++int ispresizer_config_size(u32 input_w, u32 input_h, u32 output_w, ++ u32 output_h); ++ ++/* ++ * Configures the Read address line offset. ++ */ ++int ispresizer_config_inlineoffset(u32 offset); ++ ++/* ++ * Configures the memory address from which the input frame is to be read. ++ */ ++int ispresizer_set_inaddr(u32 addr); ++ ++/* ++ * Configures the Write address line offset. ++ */ ++int ispresizer_config_outlineoffset(u32 offset); ++ ++/* ++ * Configures the memory address to which the output frame is written. ++ */ ++int ispresizer_set_outaddr(u32 addr); ++ ++/* ++ * Enables the Resizer module. ++ * ES1 only works on one-shot. ES2 allows On-The-Fly. ++ * A client should config everything else before enabling the resizer. ++ */ ++void ispresizer_enable(u8 enable); ++int ispresizer_busy(void); ++ ++/* ++ * Saves resizer context ++ */ ++void ispresizer_save_context(void); ++ ++/* ++ * Restores resizer context ++ */ ++void ispresizer_restore_context(void); ++ ++/* ++ * Prints the values of the Resizer Module registers ++ */ ++void ispresizer_print_status(void); ++ ++#endif /* OMAP_ISP_RESIZER_H */ +Index: git/drivers/media/video/isp/luma_enhance_table.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ git/drivers/media/video/isp/luma_enhance_table.h 2009-02-12 10:29:26.000000000 -0600 +@@ -0,0 +1,144 @@ ++/* ++ * drivers/media/video/isp/luma_enhance_table.h ++ * ++ * Luminance Enhancement table values for TI's OMAP3430 Camera ISP ++ * ++ * Copyright (C) 2008 Texas Instruments, Inc. ++ * ++ * This package is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ * ++ * THIS PACKAGE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR ++ * IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED ++ * WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE. ++ */ ++ ++1047552, ++1047552, ++1047552, ++1047552, ++1047552, ++1047552, ++1047552, ++1047552, ++1047552, ++1047552, ++1047552, ++1047552, ++1047552, ++1047552, ++1047552, ++1047552, ++1047552, ++1047552, ++1047552, ++1047552, ++1047552, ++1047552, ++1047552, ++1047552, ++1047552, ++1047552, ++1047552, ++1047552, ++1048575, ++1047551, ++1046527, ++1045503, ++1044479, ++1043455, ++1042431, ++1041407, ++1040383, ++1039359, ++1038335, ++1037311, ++1036287, ++1035263, ++1034239, ++1033215, ++1032191, ++1031167, ++1030143, ++1028096, ++1028096, ++1028096, ++1028096, ++1028096, ++1028096, ++1028096, ++1028096, ++1028096, ++1028096, ++1028100, ++1032196, ++1036292, ++1040388, ++1044484, ++0, ++0, ++0, ++5, ++5125, ++10245, ++15365, ++20485, ++25605, ++30720, ++30720, ++30720, ++30720, ++30720, ++30720, ++30720, ++30720, ++30720, ++30720, ++30720, ++31743, ++30719, ++29695, ++28671, ++27647, ++26623, ++25599, ++24575, ++23551, ++22527, ++21503, ++20479, ++19455, ++18431, ++17407, ++16383, ++15359, ++14335, ++13311, ++12287, ++11263, ++10239, ++9215, ++8191, ++7167, ++6143, ++5119, ++4095, ++3071, ++1024, ++1024, ++1024, ++1024, ++1024, ++1024, ++1024, ++1024, ++1024, ++1024, ++1024, ++1024, ++1024, ++1024, ++1024, ++1024, ++1024 +Index: git/drivers/media/video/isp/omap_previewer.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ git/drivers/media/video/isp/omap_previewer.c 2009-02-12 10:29:18.000000000 -0600 +@@ -0,0 +1,820 @@ ++/* ++ * drivers/media/video/isp/omap_previewer.c ++ * ++ * Wrapper for Preview module in TI's OMAP3430 ISP ++ * ++ * Copyright (C) 2008 Texas Instruments, Inc. ++ * ++ * This package is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ * ++ * THIS PACKAGE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR ++ * IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED ++ * WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE. ++ */ ++ ++#include <linux/mutex.h> ++#include <linux/cdev.h> ++#include <linux/device.h> ++#include <linux/delay.h> ++#include <linux/fs.h> ++#include <linux/mm.h> ++#include <linux/module.h> ++#include <linux/platform_device.h> ++#include <media/v4l2-dev.h> ++#include <asm/cacheflush.h> ++#include <asm/uaccess.h> ++#include <asm/io.h> ++#include <asm/arch/io.h> ++#include "isp.h" ++#include "ispmmu.h" ++#include "ispreg.h" ++#include "omap_previewer.h" ++ ++#define OMAP_PREV_NAME "omap-previewer" ++ ++static int prev_major = -1; ++static struct device *prev_dev; ++static struct class *prev_class; ++static struct prev_device *prevdevice; ++static struct platform_driver omap_previewer_driver; ++ ++static u32 prev_bufsize; ++ ++/** ++ * prev_calculate_crop - Calculate crop size according to device parameters ++ * @device: Structure containing ISP preview wrapper global information ++ * @crop: Structure containing crop size ++ * ++ * This function is used to calculate frame size reduction depending on ++ * the features enabled by the application. ++ **/ ++static void prev_calculate_crop(struct prev_device *device, ++ struct prev_cropsize *crop) ++{ ++ dev_dbg(prev_dev, "prev_calculate_crop E\n"); ++ ++ if (!device || !crop) { ++ dev_err(prev_dev, "\nErron in argument"); ++ return; ++ } ++ ++ isppreview_try_size(device->params->size_params.hsize, ++ device->params->size_params.vsize, ++ &crop->hcrop, &crop->vcrop); ++ crop->hcrop &= PREV_16PIX_ALIGN_MASK; ++ dev_dbg(prev_dev, "prev_calculate_crop L\n"); ++} ++ ++/** ++ * prev_get_status - Get status of ISP preview module ++ * @status: Structure containing the busy state. ++ * ++ * Checks if the ISP preview module is busy. ++ * ++ * Returns 0 if successful, or -EINVAL if the status parameter is invalid. ++ **/ ++static int prev_get_status(struct prev_status *status) ++{ ++ if (!status) { ++ dev_err(prev_dev, "get_status: invalid parameter\n"); ++ return -EINVAL; ++ } ++ status->hw_busy = (char)isppreview_busy(); ++ return 0; ++} ++ ++/** ++ * prev_hw_setup - Stores the desired configuration in the proper HW registers ++ * @config: Structure containing the desired configuration for ISP preview ++ * module. ++ * ++ * Reads the structure sent, and modifies the desired registers. ++ * ++ * Always returns 0. ++ **/ ++static int prev_hw_setup(struct prev_params *config) ++{ ++ dev_dbg(prev_dev, "prev_hw_setup E\n"); ++ ++ if (config->features & PREV_AVERAGER) ++ isppreview_config_averager(config->average); ++ else ++ isppreview_config_averager(0); ++ ++ if (config->features & PREV_INVERSE_ALAW) ++ isppreview_enable_invalaw(1); ++ else ++ isppreview_enable_invalaw(0); ++ ++ if (config->features & PREV_HORZ_MEDIAN_FILTER) { ++ isppreview_config_hmed(config->hmf_params); ++ isppreview_enable_hmed(1); ++ } else ++ isppreview_enable_hmed(0); ++ ++ if (config->features & PREV_DARK_FRAME_SUBTRACT) { ++ isppreview_set_darkaddr(config->drkf_params.addr); ++ isppreview_config_darklineoffset(config->drkf_params.offset); ++ isppreview_enable_drkframe(1); ++ } else ++ isppreview_enable_drkframe(0); ++ ++ if (config->features & PREV_LENS_SHADING) { ++ isppreview_config_drkf_shadcomp(config->lens_shading_shift); ++ isppreview_enable_shadcomp(1); ++ } else ++ isppreview_enable_shadcomp(0); ++ ++ dev_dbg(prev_dev, "prev_hw_setup L\n"); ++ return 0; ++} ++ ++/** ++ * prev_validate_params - Validate configuration parameters for Preview Wrapper ++ * @params: Structure containing configuration parameters ++ * ++ * Validate configuration parameters for Preview Wrapper ++ * ++ * Returns 0 if successful, or -EINVAL if a parameter value is invalid. ++ **/ ++static int prev_validate_params(struct prev_params *params) ++{ ++ if (!params) { ++ dev_err(prev_dev, "validate_params: error in argument"); ++ goto err_einval; ++ } ++ ++ if ((params->features & PREV_AVERAGER) == PREV_AVERAGER) { ++ if ((params->average != NO_AVE) ++ && (params->average != AVE_2_PIX) ++ && (params->average != AVE_4_PIX) ++ && (params->average != AVE_8_PIX)) { ++ dev_err(prev_dev, "validate_params: wrong pix " ++ "average\n"); ++ goto err_einval; ++ } else if (((params->average == AVE_2_PIX) ++ && (params->size_params.hsize % 2)) ++ || ((params->average == AVE_4_PIX) ++ && (params->size_params.hsize % 4)) ++ || ((params->average == AVE_8_PIX) ++ && (params->size_params.hsize % 8))) { ++ dev_err(prev_dev, "validate_params: " ++ "wrong pix average for input size\n"); ++ goto err_einval; ++ } ++ } ++ ++ if ((params->size_params.pixsize != PREV_INWIDTH_8BIT) ++ && (params->size_params.pixsize ++ != PREV_INWIDTH_10BIT)) { ++ dev_err(prev_dev, "validate_params: wrong pixsize\n"); ++ goto err_einval; ++ } ++ ++ if (params->size_params.hsize > MAX_IMAGE_WIDTH ++ || params->size_params.hsize < 0) { ++ dev_err(prev_dev, "validate_params: wrong hsize\n"); ++ goto err_einval; ++ } ++ ++ if ((params->pix_fmt != YCPOS_YCrYCb) ++ && (YCPOS_YCbYCr != params->pix_fmt) ++ && (YCPOS_CbYCrY != params->pix_fmt) ++ && (YCPOS_CrYCbY != params->pix_fmt)) { ++ dev_err(prev_dev, "validate_params: wrong pix_fmt"); ++ goto err_einval; ++ } ++ ++ if ((params->features & PREV_DARK_FRAME_SUBTRACT) ++ && (params->features ++ & PREV_DARK_FRAME_CAPTURE)) { ++ dev_err(prev_dev, "validate_params: DARK FRAME CAPTURE and " ++ "SUBSTRACT cannot be enabled " ++ "at same time\n"); ++ goto err_einval; ++ } ++ ++ if (params->features & PREV_DARK_FRAME_SUBTRACT) ++ if (!params->drkf_params.addr ++ || (params->drkf_params.offset % 32)) { ++ dev_err(prev_dev, "validate_params: dark frame " ++ "address\n"); ++ goto err_einval; ++ } ++ ++ if (params->features & PREV_LENS_SHADING) ++ if ((params->lens_shading_shift > 7) ++ || !params->drkf_params.addr ++ || (params->drkf_params.offset % 32)) { ++ dev_err(prev_dev, "validate_params: lens shading " ++ "shift\n"); ++ goto err_einval; ++ } ++ ++ if ((params->size_params.in_pitch <= 0) ++ || (params->size_params.in_pitch % 32)) { ++ params->size_params.in_pitch = ++ (params->size_params.hsize * 2) & 0xFFE0; ++ dev_err(prev_dev, "\nError in in_pitch; new value = %d", ++ params->size_params.in_pitch); ++ } ++ ++ return 0; ++err_einval: ++ return -EINVAL; ++} ++ ++/** ++ * preview_isr - Callback from ISP driver for ISP Preview Interrupt ++ * @status: ISP IRQ0STATUS register value ++ * @arg1: Structure containing ISP preview wrapper global information ++ * @arg2: Currently not used ++ **/ ++static void preview_isr(unsigned long status, isp_vbq_callback_ptr arg1, ++ void *arg2) ++{ ++ struct prev_device *device = (struct prev_device *)arg1; ++ ++ if ((status & PREV_DONE) != PREV_DONE) ++ return; ++ ++ if (device) ++ complete(&device->wfc); ++} ++ ++/** ++ * prev_do_preview - Performs the Preview process ++ * @device: Structure containing ISP preview wrapper global information ++ * @arg: Currently not used ++ * ++ * Returns 0 if successful, or -EINVAL if the sent parameters are invalid. ++ **/ ++static int prev_do_preview(struct prev_device *device, int *arg) ++{ ++ int bpp, size; ++ int ret = 0; ++ u32 out_hsize, out_vsize, out_line_offset; ++ ++ dev_dbg(prev_dev, "prev_do_preview E\n"); ++ ++ if (!device) { ++ dev_err(prev_dev, "preview: invalid parameters\n"); ++ return -EINVAL; ++ } ++ ++ if (device->params->size_params.pixsize == PREV_INWIDTH_8BIT) ++ bpp = 1; ++ else ++ bpp = 2; ++ ++ size = device->params->size_params.hsize * ++ device->params->size_params.vsize * bpp; ++ ++ ret = isppreview_set_inaddr(device->isp_addr_read); ++ if (ret) ++ goto out; ++ ++ ret = isppreview_set_outaddr(device->isp_addr_read); ++ if (ret) ++ goto out; ++ ++ isppreview_try_size(device->params->size_params.hsize, ++ device->params->size_params.vsize, ++ &out_hsize, &out_vsize); ++ ++ ret = isppreview_config_inlineoffset(device->params->size_params.hsize ++ * bpp); ++ if (ret) ++ goto out; ++ ++ out_line_offset = (out_hsize * bpp) & PREV_32BYTES_ALIGN_MASK; ++ ++ ret = isppreview_config_outlineoffset(out_line_offset); ++ if (ret) ++ goto out; ++ ++ ret = isppreview_config_size(device->params->size_params.hsize, ++ device->params->size_params.vsize, ++ out_hsize, out_vsize); ++ if (ret) ++ goto out; ++ ++ isppreview_config_datapath(PRV_RAW_MEM, PREVIEW_MEM); ++ ++ ret = isp_set_callback(CBK_PREV_DONE, preview_isr, (void *)device, ++ (void *)NULL); ++ if (ret) { ++ dev_err(prev_dev, "ERROR while setting Previewer callback!\n"); ++ goto out; ++ } ++ isppreview_enable(1); ++ ++ wait_for_completion_interruptible(&device->wfc); ++ ++ if (device->isp_addr_read) { ++ ispmmu_unmap(device->isp_addr_read); ++ device->isp_addr_read = 0; ++ } ++ ++ ret = isp_unset_callback(CBK_PREV_DONE); ++ ++ dev_dbg(prev_dev, "prev_do_preview L\n"); ++out: ++ return ret; ++} ++ ++/** ++ * previewer_vbq_release - Videobuffer queue release ++ * @q: Structure containing the videobuffer queue. ++ * @vb: Structure containing the videobuffer used for previewer processing. ++ **/ ++static void previewer_vbq_release(struct videobuf_queue *q, ++ struct videobuf_buffer *vb) ++{ ++ struct prev_fh *fh = q->priv_data; ++ struct prev_device *device = fh->device; ++ ++ ispmmu_unmap(device->isp_addr_read); ++ device->isp_addr_read = 0; ++ spin_lock(&device->vbq_lock); ++ vb->state = VIDEOBUF_NEEDS_INIT; ++ spin_unlock(&device->vbq_lock); ++ dev_dbg(prev_dev, "previewer_vbq_release\n"); ++} ++ ++/** ++ * previewer_vbq_setup - Sets up the videobuffer size and validates count. ++ * @q: Structure containing the videobuffer queue. ++ * @cnt: Number of buffers requested ++ * @size: Size in bytes of the buffer used for previewing ++ * ++ * Always returns 0. ++ **/ ++static int previewer_vbq_setup(struct videobuf_queue *q, ++ unsigned int *cnt, ++ unsigned int *size) ++{ ++ struct prev_fh *fh = q->priv_data; ++ struct prev_device *device = fh->device; ++ u32 bpp = 1; ++ ++ spin_lock(&device->vbq_lock); ++ if (*cnt <= 0) ++ *cnt = VIDEO_MAX_FRAME; ++ ++ if (*cnt > VIDEO_MAX_FRAME) ++ *cnt = VIDEO_MAX_FRAME; ++ ++ if (!device->params->size_params.hsize || ++ !device->params->size_params.vsize) { ++ dev_err(prev_dev, "Can't setup buffer size\n"); ++ spin_unlock(&device->vbq_lock); ++ return -EINVAL; ++ } ++ ++ if (device->params->size_params.pixsize == PREV_INWIDTH_10BIT) ++ bpp = 2; ++ *size = prev_bufsize = bpp * device->params->size_params.hsize ++ * device->params->size_params.vsize; ++ spin_unlock(&device->vbq_lock); ++ dev_dbg(prev_dev, "previewer_vbq_setup\n"); ++ return 0; ++} ++ ++/** ++ * previewer_vbq_prepare - Videobuffer is prepared and mmapped. ++ * @q: Structure containing the videobuffer queue. ++ * @vb: Structure containing the videobuffer used for previewer processing. ++ * @field: Type of field to set in videobuffer device. ++ * ++ * Returns 0 if successful, or -EINVAL if buffer couldn't get allocated, or ++ * -EIO if the ISP MMU mapping fails ++ **/ ++static int previewer_vbq_prepare(struct videobuf_queue *q, ++ struct videobuf_buffer *vb, ++ enum v4l2_field field) ++{ ++ struct prev_fh *fh = q->priv_data; ++ struct prev_device *device = fh->device; ++ int err = -EINVAL; ++ unsigned int isp_addr; ++ struct videobuf_dmabuf *dma = videobuf_to_dma(vb); ++ ++ dev_dbg(prev_dev, "previewer_vbq_prepare E\n"); ++ spin_lock(&device->vbq_lock); ++ if (vb->baddr) { ++ vb->size = prev_bufsize; ++ vb->bsize = prev_bufsize; ++ } else { ++ spin_unlock(&device->vbq_lock); ++ dev_err(prev_dev, "No user buffer allocated\n"); ++ goto out; ++ } ++ ++ vb->width = device->params->size_params.hsize; ++ vb->height = device->params->size_params.vsize; ++ vb->field = field; ++ spin_unlock(&device->vbq_lock); ++ ++ if (vb->state == VIDEOBUF_NEEDS_INIT) { ++ err = videobuf_iolock(q, vb, NULL); ++ if (!err) { ++ isp_addr = ispmmu_map_sg(dma->sglist, dma->sglen); ++ if (!isp_addr) ++ err = -EIO; ++ else ++ device->isp_addr_read = isp_addr; ++ } ++ } ++ ++ if (!err) { ++ vb->state = VIDEOBUF_PREPARED; ++ flush_cache_user_range(NULL, vb->baddr, ++ (vb->baddr + vb->bsize)); ++ } else ++ previewer_vbq_release(q, vb); ++ ++ dev_dbg(prev_dev, "previewer_vbq_prepare L\n"); ++out: ++ return err; ++} ++ ++static void previewer_vbq_queue(struct videobuf_queue *q, ++ struct videobuf_buffer *vb) ++{ ++ return; ++} ++ ++/** ++ * previewer_open - Initializes and opens the Preview Wrapper ++ * @inode: Inode structure associated with the Preview Wrapper ++ * @filp: File structure associated with the Preview Wrapper ++ * ++ * Returns 0 if successful, -EACCES if its unable to initialize default config, ++ * -EBUSY if its already opened or the ISP module is not available, or -ENOMEM ++ * if its unable to allocate the device in kernel space memory. ++ **/ ++static int previewer_open(struct inode *inode, struct file *filp) ++{ ++ int ret = 0; ++ struct prev_device *device = prevdevice; ++ struct prev_params *config = isppreview_get_config(); ++ struct prev_fh *fh; ++ ++ if (config == NULL) { ++ dev_err(prev_dev, "Unable to initialize default config " ++ "from isppreviewer\n\n"); ++ return -EACCES; ++ } ++ ++ if (device->opened || (filp->f_flags & O_NONBLOCK)) { ++ dev_err(prev_dev, "previewer_open: device is already " ++ "opened\n"); ++ return -EBUSY; ++ } ++ ++ fh = kzalloc(sizeof(struct prev_fh), GFP_KERNEL); ++ if (NULL == fh) ++ return -ENOMEM; ++ ++ isp_get(); ++ ret = isppreview_request(); ++ if (ret) { ++ isp_put(); ++ dev_err(prev_dev, "Can't acquire isppreview\n"); ++ return ret; ++ } ++ ++ device->params = config; ++ device->opened = 1; ++ ++ filp->private_data = fh; ++ fh->type = V4L2_BUF_TYPE_VIDEO_CAPTURE; ++ fh->device = device; ++ ++ videobuf_queue_pci_init(&fh->vbq, &device->vbq_ops, NULL, ++ &device->vbq_lock, fh->type, ++ V4L2_FIELD_NONE, ++ sizeof(struct videobuf_buffer), fh); ++ ++ init_completion(&device->wfc); ++ device->wfc.done = 0; ++ mutex_init(&device->prevwrap_mutex); ++ ++ return 0; ++} ++ ++/** ++ * previewer_release - Releases Preview Wrapper and frees up allocated memory ++ * @inode: Inode structure associated with the Preview Wrapper ++ * @filp: File structure associated with the Preview Wrapper ++ * ++ * Always returns 0. ++ **/ ++static int previewer_release(struct inode *inode, struct file *filp) ++{ ++ struct prev_fh *fh = filp->private_data; ++ struct prev_device *device = fh->device; ++ struct videobuf_queue *q = &fh->vbq; ++ ++ device->opened = 0; ++ device->params = NULL; ++ isppreview_free(); ++ isp_put(); ++ videobuf_mmap_free(q); ++ prev_bufsize = 0; ++ filp->private_data = NULL; ++ kfree(fh); ++ ++ dev_dbg(prev_dev, "previewer_release\n"); ++ return 0; ++} ++ ++/** ++ * previewer_mmap - Memory maps the Preview Wrapper module. ++ * @file: File structure associated with the Preview Wrapper ++ * @vma: Virtual memory area structure. ++ * ++ * Returns 0 if successful, or returned value by the videobuf_mmap_mapper() ++ * function. ++ **/ ++static int previewer_mmap(struct file *file, struct vm_area_struct *vma) ++{ ++ struct prev_fh *fh = file->private_data; ++ dev_dbg(prev_dev, "previewer_mmap\n"); ++ ++ return videobuf_mmap_mapper(&fh->vbq, vma); ++} ++ ++/** ++ * previewer_ioctl - I/O control function for Preview Wrapper ++ * @inode: Inode structure associated with the Preview Wrapper. ++ * @file: File structure associated with the Preview Wrapper. ++ * @cmd: Type of command to execute. ++ * @arg: Argument to send to requested command. ++ * ++ * Returns 0 if successful, -1 if bad command passed or access is denied, ++ * -EFAULT if copy_from_user() or copy_to_user() fails, -EINVAL if parameter ++ * validation fails or parameter structure is not present ++ **/ ++static int previewer_ioctl(struct inode *inode, struct file *file, ++ unsigned int cmd, unsigned long arg) ++{ ++ int ret = 0; ++ struct prev_params params; ++ struct prev_fh *fh = file->private_data; ++ struct prev_device *device = fh->device; ++ ++ dev_dbg(prev_dev, "Entering previewer_ioctl()\n"); ++ ++ if ((_IOC_TYPE(cmd) != PREV_IOC_BASE) ++ || (_IOC_NR(cmd) > PREV_IOC_MAXNR)) { ++ dev_err(prev_dev, "Bad command Value \n"); ++ goto err_minusone; ++ } ++ ++ if (_IOC_DIR(cmd) & _IOC_READ) ++ ret = !access_ok(VERIFY_WRITE, (void *)arg, _IOC_SIZE(cmd)); ++ else if (_IOC_DIR(cmd) & _IOC_WRITE) ++ ret = !access_ok(VERIFY_READ, (void *)arg, _IOC_SIZE(cmd)); ++ if (ret) { ++ dev_err(prev_dev, "access denied\n"); ++ goto err_minusone; ++ } ++ ++ switch (cmd) { ++ case PREV_REQBUF: ++ if (mutex_lock_interruptible(&device->prevwrap_mutex)) ++ goto err_eintr; ++ ret = videobuf_reqbufs(&fh->vbq, (void *)arg); ++ mutex_unlock(&device->prevwrap_mutex); ++ break; ++ ++ case PREV_QUERYBUF: ++ if (mutex_lock_interruptible(&device->prevwrap_mutex)) ++ goto err_eintr; ++ ret = videobuf_querybuf(&fh->vbq, (void *)arg); ++ mutex_unlock(&device->prevwrap_mutex); ++ break; ++ ++ case PREV_QUEUEBUF: ++ if (mutex_lock_interruptible(&device->prevwrap_mutex)) ++ goto err_eintr; ++ ret = videobuf_qbuf(&fh->vbq, (void *)arg); ++ mutex_unlock(&device->prevwrap_mutex); ++ break; ++ ++ case PREV_SET_PARAM: ++ if (mutex_lock_interruptible(&device->prevwrap_mutex)) ++ goto err_eintr; ++ if (copy_from_user(¶ms, (struct prev_params *)arg, ++ sizeof(struct prev_params))) { ++ mutex_unlock(&device->prevwrap_mutex); ++ return -EFAULT; ++ } ++ ret = prev_validate_params(¶ms); ++ if (ret < 0) { ++ dev_err(prev_dev, "Error validating parameters!\n"); ++ mutex_unlock(&device->prevwrap_mutex); ++ goto out; ++ } ++ if (device->params) ++ memcpy(device->params, ¶ms, ++ sizeof(struct prev_params)); ++ else { ++ mutex_unlock(&device->prevwrap_mutex); ++ return -EINVAL; ++ } ++ ++ ret = prev_hw_setup(device->params); ++ mutex_unlock(&device->prevwrap_mutex); ++ break; ++ ++ case PREV_GET_PARAM: ++ if (copy_to_user((struct prev_params *)arg, device->params, ++ sizeof(struct prev_params))) ++ ret = -EFAULT; ++ break; ++ ++ case PREV_GET_STATUS: ++ ret = prev_get_status((struct prev_status *)arg); ++ break; ++ ++ case PREV_PREVIEW: ++ if (mutex_lock_interruptible(&device->prevwrap_mutex)) ++ goto err_eintr; ++ ret = prev_do_preview(device, (int *)arg); ++ mutex_unlock(&device->prevwrap_mutex); ++ break; ++ ++ case PREV_GET_CROPSIZE: ++ { ++ struct prev_cropsize outputsize; ++ prev_calculate_crop(device, &outputsize); ++ if (copy_to_user((struct prev_cropsize *)arg, &outputsize, ++ sizeof(struct prev_cropsize))) ++ ret = -EFAULT; ++ } ++ break; ++ ++ default: ++ dev_err(prev_dev, "previewer_ioctl: Invalid Command Value\n"); ++ ret = -EINVAL; ++ } ++out: ++ return ret; ++err_minusone: ++ return -1; ++err_eintr: ++ return -EINTR; ++} ++ ++/** ++ * previewer_platform_release - Acts when Reference count is zero ++ * @device: Structure containing ISP preview wrapper global information ++ * ++ * This is called when the reference count goes to zero ++ **/ ++static void previewer_platform_release(struct device *device) ++{ ++ dev_dbg(prev_dev, "previewer_platform_release()\n"); ++} ++ ++static struct file_operations prev_fops = { ++ .owner = THIS_MODULE, ++ .open = previewer_open, ++ .release = previewer_release, ++ .mmap = previewer_mmap, ++ .ioctl = previewer_ioctl, ++}; ++ ++static struct platform_device omap_previewer_device = { ++ .name = OMAP_PREV_NAME, ++ .id = -1, ++ .dev = { ++ .release = previewer_platform_release, ++ } ++}; ++ ++/** ++ * previewer_probe - Checks for device presence ++ * @pdev: Structure containing details of the current device. ++ * ++ * Always returns 0 ++ **/ ++static int __init previewer_probe(struct platform_device *pdev) ++{ ++ return 0; ++} ++ ++/** ++ * previewer_remove - Handles the removal of the driver ++ * @pdev: Structure containing details of the current device. ++ * ++ * Always returns 0. ++ **/ ++static int previewer_remove(struct platform_device *pdev) ++{ ++ dev_dbg(prev_dev, "previewer_remove()\n"); ++ ++ platform_device_unregister(&omap_previewer_device); ++ platform_driver_unregister(&omap_previewer_driver); ++ unregister_chrdev(prev_major, OMAP_PREV_NAME); ++ return 0; ++} ++ ++static struct platform_driver omap_previewer_driver = { ++ .probe = previewer_probe, ++ .remove = previewer_remove, ++ .driver = { ++ .owner = THIS_MODULE, ++ .name = OMAP_PREV_NAME, ++ }, ++}; ++ ++/** ++ * omap_previewer_init - Initialization of Preview Wrapper ++ * ++ * Returns 0 if successful, -ENOMEM if could not allocate memory, -ENODEV if ++ * could not register the wrapper as a character device, or other errors if the ++ * device or driver can't register. ++ **/ ++static int __init omap_previewer_init(void) ++{ ++ int ret; ++ struct prev_device *device; ++ ++ device = kzalloc(sizeof(struct prev_device), GFP_KERNEL); ++ if (!device) { ++ dev_err(prev_dev, OMAP_PREV_NAME ": could not allocate" ++ " memory\n"); ++ return -ENOMEM; ++ } ++ prev_major = register_chrdev(0, OMAP_PREV_NAME, &prev_fops); ++ ++ if (prev_major < 0) { ++ dev_err(prev_dev, OMAP_PREV_NAME ": initialization " ++ "failed. could not register character " ++ "device\n"); ++ return -ENODEV; ++ } ++ ++ ret = platform_driver_register(&omap_previewer_driver); ++ if (ret) { ++ dev_err(prev_dev, OMAP_PREV_NAME ++ ": failed to register platform driver!\n"); ++ goto fail2; ++ } ++ ret = platform_device_register(&omap_previewer_device); ++ if (ret) { ++ dev_err(prev_dev, OMAP_PREV_NAME ++ ": failed to register platform device!\n"); ++ goto fail3; ++ } ++ ++ prev_class = class_create(THIS_MODULE, OMAP_PREV_NAME); ++ if (!prev_class) ++ goto fail4; ++ ++ prev_dev = device_create(prev_class, prev_dev, (MKDEV(prev_major, 0)), ++ OMAP_PREV_NAME); ++ dev_dbg(prev_dev, OMAP_PREV_NAME ": Registered Previewer Wrapper\n"); ++ device->opened = 0; ++ ++ device->vbq_ops.buf_setup = previewer_vbq_setup; ++ device->vbq_ops.buf_prepare = previewer_vbq_prepare; ++ device->vbq_ops.buf_release = previewer_vbq_release; ++ device->vbq_ops.buf_queue = previewer_vbq_queue; ++ spin_lock_init(&device->vbq_lock); ++ ++ prevdevice = device; ++ return 0; ++ ++fail4: ++ platform_device_unregister(&omap_previewer_device); ++fail3: ++ platform_driver_unregister(&omap_previewer_driver); ++fail2: ++ unregister_chrdev(prev_major, OMAP_PREV_NAME); ++ ++ return ret; ++} ++ ++/** ++ * omap_previewer_exit - Close of Preview Wrapper ++ **/ ++static void __exit omap_previewer_exit(void) ++{ ++ previewer_remove(&omap_previewer_device); ++ kfree(prevdevice); ++ prev_major = -1; ++} ++ ++module_init(omap_previewer_init); ++module_exit(omap_previewer_exit); ++ ++MODULE_AUTHOR("Texas Instruments"); ++MODULE_DESCRIPTION("OMAP ISP Previewer"); ++MODULE_LICENSE("GPL"); +Index: git/drivers/media/video/isp/omap_previewer.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ git/drivers/media/video/isp/omap_previewer.h 2009-02-12 10:29:26.000000000 -0600 +@@ -0,0 +1,136 @@ ++/* ++ * drivers/media/video/isp/omap_previewer.h ++ * ++ * Include file for Preview module wrapper in TI's OMAP3430 ISP ++ * ++ * Copyright (C) 2008 Texas Instruments, Inc. ++ * ++ * This package is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ * ++ * THIS PACKAGE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR ++ * IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED ++ * WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE. ++ */ ++ ++#include "isppreview.h" ++ ++#ifndef OMAP_ISP_PREVIEW_WRAP_H ++#define OMAP_ISP_PREVIEW_WRAP_H ++ ++#define PREV_IOC_BASE 'P' ++#define PREV_REQBUF _IOWR(PREV_IOC_BASE, 1,\ ++ struct v4l2_requestbuffers) ++#define PREV_QUERYBUF _IOWR(PREV_IOC_BASE, 2,\ ++ struct v4l2_buffer) ++#define PREV_SET_PARAM _IOW(PREV_IOC_BASE, 3,\ ++ struct prev_params) ++#define PREV_GET_PARAM _IOWR(PREV_IOC_BASE, 4,\ ++ struct prev_params) ++#define PREV_PREVIEW _IOR(PREV_IOC_BASE, 5, int) ++#define PREV_GET_STATUS _IOR(PREV_IOC_BASE, 6, char) ++#define PREV_GET_CROPSIZE _IOR(PREV_IOC_BASE, 7,\ ++ struct prev_cropsize) ++#define PREV_QUEUEBUF _IOWR(PREV_IOC_BASE, 8,\ ++ struct v4l2_buffer) ++#define PREV_IOC_MAXNR 8 ++ ++#define LUMA_TABLE_SIZE 128 ++#define GAMMA_TABLE_SIZE 1024 ++#define CFA_COEFF_TABLE_SIZE 576 ++#define NOISE_FILTER_TABLE_SIZE 256 ++ ++#define MAX_IMAGE_WIDTH 3300 ++ ++#define PREV_INWIDTH_8BIT 0 /* pixel width of 8 bitS */ ++#define PREV_INWIDTH_10BIT 1 /* pixel width of 10 bits */ ++ ++#define PREV_32BYTES_ALIGN_MASK 0xFFFFFFE0 ++#define PREV_16PIX_ALIGN_MASK 0xFFFFFFF0 ++ ++/* list of structures */ ++ ++/* structure for RGB2RGB blending parameters */ ++struct prev_rgbblending { ++ short blending[RGB_MAX][RGB_MAX]; /* color correlation 3x3 ++ * matrix. ++ */ ++ short offset[RGB_MAX]; /* color correlation offsets */ ++}; ++ ++/* structure for CFA coefficients */ ++struct prev_cfa_coeffs { ++ char hthreshold, vthreshold; /* horizontal an vertical ++ * threshold. ++ */ ++ int coeffs[CFA_COEFF_TABLE_SIZE]; /* cfa coefficients */ ++}; ++/* structure for Gamma Coefficients */ ++struct prev_gamma_coeffs { ++ unsigned char red[GAMMA_TABLE_SIZE]; /* table of gamma correction ++ * values for red color. ++ */ ++ unsigned char green[GAMMA_TABLE_SIZE]; /* table of gamma correction ++ * values for green color. ++ */ ++ unsigned char blue[GAMMA_TABLE_SIZE]; /* table of gamma correction ++ * values for blue color. ++ */ ++}; ++/* Structure for Noise Filter Coefficients */ ++struct prev_noiseflt_coeffs { ++ unsigned char noise[NOISE_FILTER_TABLE_SIZE]; /* noise filter ++ * table. ++ */ ++ unsigned char strength; /* to find out ++ * weighted average. ++ */ ++}; ++ ++/* Structure for Chroma Suppression */ ++struct prev_chroma_spr { ++ unsigned char hpfy; /* whether to use high passed ++ * version of Y or normal Y ++ */ ++ char threshold; /* threshold for chroma ++ * suppress. ++ */ ++ unsigned char gain; /* chroma suppression gain */ ++}; ++ ++/* structure to know status of the hardware */ ++struct prev_status { ++ char hw_busy; ++}; ++/* structure to knwo crop size */ ++struct prev_cropsize { ++ int hcrop; ++ int vcrop; ++}; ++ ++ ++/* device structure keeps track of global information */ ++struct prev_device { ++ struct prev_params *params; ++ unsigned char opened; /* state of the device */ ++ ++ struct completion wfc; ++ struct mutex prevwrap_mutex; ++ ++ spinlock_t vbq_lock; /* spinlock for videobuf ++ * queues. ++ */ ++ struct videobuf_queue_ops vbq_ops; /* videobuf queue operations */ ++ ++ dma_addr_t isp_addr_read; /* Input/Output address */ ++ ++}; ++ ++/* per-filehandle data structure */ ++struct prev_fh { ++ enum v4l2_buf_type type; ++ struct videobuf_queue vbq; ++ struct prev_device *device; ++}; ++#endif +Index: git/drivers/media/video/isp/omap_resizer.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ git/drivers/media/video/isp/omap_resizer.c 2009-02-12 14:48:11.000000000 -0600 +@@ -0,0 +1,1812 @@ ++/* ++ * drivers/media/video/isp/omap_resizer.c ++ * ++ * Wrapper for Resizer module in TI's OMAP3430 ISP ++ * ++ * Copyright (C) 2007 Texas Instruments, Inc. ++ * ++ * This package is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ * ++ * THIS PACKAGE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR ++ * IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED ++ * WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE. ++ */ ++ ++#include <linux/mutex.h> ++#include <linux/cdev.h> ++#include <linux/delay.h> ++#include <linux/device.h> ++#include <linux/fs.h> ++#include <linux/mm.h> ++#include <linux/module.h> ++#include <linux/platform_device.h> ++#include <linux/time.h> ++#include <media/v4l2-dev.h> ++#include <asm/cacheflush.h> ++#include <asm/uaccess.h> ++#include <asm/io.h> ++#include <mach/io.h> ++#include <asm/scatterlist.h> ++#include <linux/pci.h> ++#include "isp.h" ++#include "ispmmu.h" ++#include "ispreg.h" ++#include "ispresizer.h" ++#include <linux/omap_resizer.h> ++ ++#define OMAP_REZR_NAME "omap-resizer" ++ ++/* Defines and Constants*/ ++#define MAX_CHANNELS 16 ++#define MAX_IMAGE_WIDTH 2047 ++#define MAX_IMAGE_WIDTH_HIGH 2047 ++#define ALIGNMENT 16 ++#define CHANNEL_BUSY 1 ++#define CHANNEL_FREE 0 ++#define PIXEL_EVEN 2 ++#define RATIO_MULTIPLIER 256 ++/* Bit position Macro */ ++/* macro for bit set and clear */ ++#define BITSET(variable, bit) (variable) | (1 << bit) ++#define BITRESET(variable, bit) (variable) & ~(0x00000001 << (bit)) ++#define SET_BIT_INPUTRAM 28 ++#define SET_BIT_CBLIN 29 ++#define SET_BIT_INPTYP 27 ++#define SET_BIT_YCPOS 26 ++#define INPUT_RAM 1 ++#define UP_RSZ_RATIO 64 ++#define DOWN_RSZ_RATIO 512 ++#define UP_RSZ_RATIO1 513 ++#define DOWN_RSZ_RATIO1 1024 ++#define RSZ_IN_SIZE_VERT_SHIFT 16 ++#define MAX_HORZ_PIXEL_8BIT 31 ++#define MAX_HORZ_PIXEL_16BIT 15 ++#define NUM_PHASES 8 ++#define NUM_TAPS 4 ++#define NUM_D2PH 4 /* for downsampling * 2+x ~ 4x, ++ * number of phases ++ */ ++#define NUM_D2TAPS 7 /* for downsampling * 2+x ~ 4x, ++ * number of taps ++ */ ++#define ALIGN32 32 ++#define MAX_COEF_COUNTER 16 ++#define COEFF_ADDRESS_OFFSET 0x04 ++ ++#define RSZ_DEF_REQ_EXP 0xE /* Default read operation expand ++ * for the Resizer driver; value ++ * taken from Davinci. ++ */ ++/* ++ * These magic numbers are copied from video-buf layer, ++ * since they gets set in to the same layer. To support ++ * contiguous memory and to remove max buffer size constraint from ++ * application, we implemented replication of some video-buf functions ++ * so magic numbers also. ++ */ ++#define MAGIC_BUFFER 0x20070728 ++#define MAGIC_DMABUF 0x19721112 ++#define MAGIC_SG_MEM 0x17890714 ++#define MAGIC_CHECK(is,should) if (unlikely((is) != (should))) \ ++ { printk(KERN_ERR "magic mismatch: %x (expected %x)\n",is,should); BUG(); } ++ ++/* Global structure which contains information about number of channels ++ and protection variables */ ++struct device_params { ++ ++ struct mutex reszwrap_mutex; /* Semaphore for array */ ++ struct completion compl_isr; /* Completion for interrupt */ ++ struct videobuf_queue_ops vbq_ops; /* videobuf queue operations */ ++}; ++ ++/* Register mapped structure which contains the every register ++ information */ ++struct resizer_config { ++ u32 rsz_pcr; /* pcr register mapping ++ * variable. ++ */ ++ u32 rsz_in_start; /* in_start register mapping ++ * variable. ++ */ ++ u32 rsz_in_size; /* in_size register mapping ++ * variable. ++ */ ++ u32 rsz_out_size; /* out_size register mapping ++ * variable. ++ */ ++ u32 rsz_cnt; /* rsz_cnt register mapping ++ * variable. ++ */ ++ u32 rsz_sdr_inadd; /* sdr_inadd register mapping ++ * variable. ++ */ ++ u32 rsz_sdr_inoff; /* sdr_inoff register mapping ++ * variable. ++ */ ++ u32 rsz_sdr_outadd; /* sdr_outadd register mapping ++ * variable. ++ */ ++ u32 rsz_sdr_outoff; /* sdr_outbuff register ++ * mapping variable. ++ */ ++ u32 rsz_coeff_horz[16]; /* horizontal coefficients ++ * mapping array. ++ */ ++ u32 rsz_coeff_vert[16]; /* vertical coefficients ++ * mapping array. ++ */ ++ u32 rsz_yehn; /* yehn(luma)register mapping ++ * variable. ++ */ ++ u32 sdr_req_exp; /* Configuration for Non ++ * real time read expand ++ */ ++}; ++struct rsz_mult { ++ s32 in_hsize; /* input frame horizontal ++ * size. ++ */ ++ s32 in_vsize; /* input frame vertical size. ++ */ ++ s32 out_hsize; /* output frame horizontal ++ * size. ++ */ ++ s32 out_vsize; /* output frame vertical ++ * size. ++ */ ++ s32 in_pitch; /* offset between two rows of ++ * input frame. ++ */ ++ s32 out_pitch; /* offset between two rows of ++ * output frame. ++ */ ++ s32 end_hsize; ++ s32 end_vsize; ++ s32 num_htap; /* 0 = 7tap; 1 = 4tap */ ++ s32 num_vtap; /* 0 = 7tap; 1 = 4tap */ ++ s32 active; ++ s32 inptyp; ++ s32 vrsz; ++ s32 hrsz; ++ s32 hstph; /* for specifying horizontal ++ * starting phase. ++ */ ++ s32 vstph; ++ s32 pix_fmt; /* # defined, UYVY or YUYV. */ ++ s32 cbilin; /* # defined, filter with luma ++ * or bi-linear. ++ */ ++ u16 tap4filt_coeffs[32]; /* horizontal filter ++ * coefficients. ++ */ ++ u16 tap7filt_coeffs[32]; /* vertical filter ++ * coefficients. ++ */ ++}; ++/* Channel specific structure contains information regarding ++ the every channel */ ++struct channel_config { ++ struct resizer_config register_config; /* Instance of register set ++ * mapping structure ++ */ ++ int status; /* Specifies whether the ++ * channel is busy or not ++ */ ++ struct mutex chanprotection_mutex; /* Pointer to channel ++ * specific protection ++ */ ++ int buf_address[VIDEO_MAX_FRAME]; ++ enum config_done config_state; ++ u8 input_buf_index, output_buf_index; ++ ++}; ++ ++/* per-filehandle data structure */ ++struct rsz_fh { ++ struct rsz_params *params; ++ struct channel_config *config; /* Pointer to channel ++ * configuration. ++ */ ++ enum v4l2_buf_type type; ++ struct videobuf_queue vbq; ++ struct device_params *device; ++ dma_addr_t isp_addr_read; /* Input/Output address */ ++ dma_addr_t isp_addr_write; /* Input/Output address */ ++ struct rsz_mult *multipass; /* Multipass to support ++ * resizing ration outside ++ * of 0.25x to 4x ++ */ ++ spinlock_t vbq_lock; /* spinlock for videobuf ++ * queues. ++ */ ++ u32 rsz_bufsize; /* channel specific buffersize ++ */ ++}; ++ ++static struct device_params *device_config; ++static struct device *rsz_device; ++static int rsz_major = -1; ++/* functions declaration */ ++static void rsz_hardware_setup(struct channel_config *rsz_conf_chan); ++static int rsz_set_params(struct rsz_mult *multipass, struct rsz_params *, ++ struct channel_config *); ++static int rsz_get_params(struct rsz_params *, struct channel_config *); ++static void rsz_copy_data(struct rsz_mult *multipass, ++ struct rsz_params *params); ++static void rsz_isr(unsigned long status, isp_vbq_callback_ptr arg1, ++ void *arg2); ++static void rsz_calculate_crop(struct channel_config *rsz_conf_chan, ++ struct rsz_cropsize *cropsize); ++static int rsz_set_multipass(struct rsz_mult *multipass, ++ struct channel_config *rsz_conf_chan); ++static int rsz_set_ratio(struct rsz_mult *multipass, ++ struct channel_config *rsz_conf_chan); ++static void rsz_config_ratio(struct rsz_mult *multipass, ++ struct channel_config *rsz_conf_chan); ++ ++/* ++ * resizer_busy - Enables the Resizer driver ++ */ ++static int inline resizer_busy(void) ++{ ++ return (omap_readl(ISPRSZ_PCR) & ISPPRV_PCR_BUSY); ++} ++ ++static void inline rsz_set_exp(unsigned int exp) ++{ ++ omap_writel(((exp & 0x3FF) << 10), ISPSBL_REG_BASE+0xF8); ++} ++/** ++ * rsz_hardware_setup - Sets hardware configuration registers ++ * @rsz_conf_chan: Structure containing channel configuration ++ * ++ * Set hardware configuration registers ++ **/ ++static void rsz_hardware_setup(struct channel_config *rsz_conf_chan) ++{ ++ int coeffcounter; ++ int coeffoffset = 0; ++ ++ omap_writel(rsz_conf_chan->register_config.rsz_cnt, ISPRSZ_CNT); ++ ++ omap_writel(rsz_conf_chan->register_config.rsz_in_start, ++ ISPRSZ_IN_START); ++ omap_writel(rsz_conf_chan->register_config.rsz_in_size, ++ ISPRSZ_IN_SIZE); ++ ++ omap_writel(rsz_conf_chan->register_config.rsz_out_size, ++ ISPRSZ_OUT_SIZE); ++ omap_writel(rsz_conf_chan->register_config.rsz_sdr_inadd, ++ ISPRSZ_SDR_INADD); ++ omap_writel(rsz_conf_chan->register_config.rsz_sdr_inoff, ++ ISPRSZ_SDR_INOFF); ++ omap_writel(rsz_conf_chan->register_config.rsz_sdr_outadd, ++ ISPRSZ_SDR_OUTADD); ++ omap_writel(rsz_conf_chan->register_config.rsz_sdr_outoff, ++ ISPRSZ_SDR_OUTOFF); ++ omap_writel(rsz_conf_chan->register_config.rsz_yehn, ISPRSZ_YENH); ++ ++ for (coeffcounter = 0; coeffcounter < MAX_COEF_COUNTER; ++ coeffcounter++) { ++ omap_writel(rsz_conf_chan->register_config. ++ rsz_coeff_horz[coeffcounter], ++ ISPRSZ_HFILT10 + coeffoffset); ++ ++ omap_writel(rsz_conf_chan->register_config. ++ rsz_coeff_vert[coeffcounter], ++ ISPRSZ_VFILT10 + coeffoffset); ++ coeffoffset = coeffoffset + COEFF_ADDRESS_OFFSET; ++ } ++ /* Configure the read expand register */ ++ rsz_set_exp(rsz_conf_chan->register_config.sdr_req_exp); ++} ++ ++/** ++ * rsz_start - Enables Resizer Wrapper ++ * @arg: Currently not used. ++ * @fh: File structure containing ISP resizer information specific to ++ * channel opened. ++ * ++ * Submits a resizing task specified by the rsz_resize structure. The call can ++ * either be blocked until the task is completed or returned immediately based ++ * on the value of the blocking argument in the rsz_resize structure. If it is ++ * blocking, the status of the task can be checked by calling ioctl ++ * RSZ_G_STATUS. Only one task can be outstanding for each logical channel. ++ * ++ * Returns 0 if successful, or -EINVAL if could not set callback for RSZR IRQ ++ * event or the state of the channel is not configured. ++ **/ ++int rsz_start(int *arg, struct rsz_fh *fh) ++{ ++ struct channel_config *rsz_conf_chan = fh->config; ++ struct rsz_mult *multipass = fh->multipass; ++ struct videobuf_queue *q = &fh->vbq; ++ struct videobuf_buffer *buf; ++ int ret; ++ ++ if (rsz_conf_chan->config_state) { ++ dev_err(rsz_device, "State not configured \n"); ++ goto err_einval; ++ } ++ if(!rsz_conf_chan->register_config.rsz_sdr_inadd || ++ !rsz_conf_chan->register_config.rsz_sdr_outadd) { ++ dev_err(rsz_device, "address is null\n"); ++ goto err_einval; ++ } ++ ++ rsz_conf_chan->status = CHANNEL_BUSY; ++ rsz_hardware_setup(rsz_conf_chan); ++ if (isp_set_callback(CBK_RESZ_DONE, rsz_isr, (void *) NULL, ++ (void *)NULL)) { ++ dev_err(rsz_device, "No callback for RSZR\n"); ++ goto err_einval; ++ } ++mult: ++ device_config->compl_isr.done = 0; ++ ispresizer_enable(1); ++ ret = wait_for_completion_interruptible(&device_config->compl_isr); ++ if (ret != 0) { ++ dev_dbg(rsz_device, "Unexpected exit from " ++ "wait_for_completion_interruptible\n"); ++ wait_for_completion(&device_config->compl_isr); ++ } ++ ++ if (multipass->active) { ++ rsz_set_multipass(multipass, rsz_conf_chan); ++ goto mult; ++ } ++ ++ rsz_conf_chan->status = CHANNEL_FREE; ++ rsz_conf_chan->register_config.rsz_sdr_outadd = 0; ++ rsz_conf_chan->register_config.rsz_sdr_inadd = 0; ++ ++ isp_unset_callback(CBK_RESZ_DONE); ++ ++ /* Empty the Videobuf queue which was filled during the qbuf */ ++ buf = q->bufs[rsz_conf_chan->input_buf_index]; ++ buf->state = VIDEOBUF_IDLE; ++ list_del(&buf->stream); ++ if (rsz_conf_chan->input_buf_index != rsz_conf_chan->output_buf_index) { ++ buf = q->bufs[rsz_conf_chan->output_buf_index]; ++ buf->state = VIDEOBUF_IDLE; ++ list_del(&buf->stream); ++ } ++ ++ return 0; ++err_einval: ++ return -EINVAL; ++} ++ ++/** ++ * rsz_set_multipass - Set resizer multipass ++ * @fh: File structure containing ISP resizer information specific to ++ * channel opened. ++ * @rsz_conf_chan: Structure containing channel configuration ++ * ++ * Returns always 0 ++ **/ ++static int rsz_set_multipass(struct rsz_mult *multipass, ++ struct channel_config *rsz_conf_chan) ++{ ++ multipass->in_hsize = multipass->out_hsize; ++ multipass->in_vsize = multipass->out_vsize; ++ multipass->out_hsize = multipass->end_hsize; ++ multipass->out_vsize = multipass->end_vsize; ++ ++ multipass->out_pitch = (multipass->inptyp ? multipass->out_hsize ++ : (multipass->out_hsize * 2)); ++ multipass->in_pitch = (multipass->inptyp ? multipass->in_hsize ++ : (multipass->in_hsize * 2)); ++ ++ rsz_set_ratio(multipass, rsz_conf_chan); ++ rsz_config_ratio(multipass, rsz_conf_chan); ++ rsz_hardware_setup(rsz_conf_chan); ++ return 0; ++} ++ ++/** ++ * rsz_copy_data - Copy data ++ * @fh: File structure containing ISP resizer information specific to ++ * channel opened. ++ * @params: Structure containing the Resizer Wrapper parameters ++ * ++ * Copy data ++ **/ ++static void rsz_copy_data(struct rsz_mult *multipass, struct rsz_params *params) ++{ ++ int i; ++ multipass->in_hsize = params->in_hsize; ++ multipass->in_vsize = params->in_vsize; ++ multipass->out_hsize = params->out_hsize; ++ multipass->out_vsize = params->out_vsize; ++ multipass->end_hsize = params->out_hsize; ++ multipass->end_vsize = params->out_vsize; ++ multipass->in_pitch = params->in_pitch; ++ multipass->out_pitch = params->out_pitch; ++ multipass->hstph = params->hstph; ++ multipass->vstph = params->vstph; ++ multipass->inptyp = params->inptyp; ++ multipass->pix_fmt = params->pix_fmt; ++ multipass->cbilin = params->cbilin; ++ ++ for (i = 0; i < 32; i++) { ++ multipass->tap4filt_coeffs[i] = params->tap4filt_coeffs[i]; ++ multipass->tap7filt_coeffs[i] = params->tap7filt_coeffs[i]; ++ } ++} ++ ++/** ++ * rsz_set_params - Set parameters for resizer wrapper ++ * @fh: File structure containing ISP resizer information specific to ++ * channel opened. ++ * @params: Structure containing the Resizer Wrapper parameters ++ * @rsz_conf_chan: Structure containing channel configuration ++ * ++ * Used to set the parameters of the Resizer hardware, including input and ++ * output image size, horizontal and vertical poly-phase filter coefficients, ++ * luma enchancement filter coefficients, etc. ++ **/ ++static int rsz_set_params(struct rsz_mult *multipass, struct rsz_params *params, ++ struct channel_config *rsz_conf_chan) ++{ ++ int mul = 1; ++ if(params->yenh_params.type < 0 || params->yenh_params.type > 2) { ++ dev_err(rsz_device, "rsz_set_params:Wrong yenh type\n"); ++ return -EINVAL; ++ } ++ if(params->in_vsize <= 0 || params->in_hsize <= 0 || ++ params->out_vsize <= 0 || params->out_hsize <= 0 || ++ params->in_pitch <= 0 || params->out_pitch <= 0) { ++ dev_err(rsz_device,"rsz_set_size:invalid size params\n"); ++ return -EINVAL; ++ } ++ if((params->inptyp != RSZ_INTYPE_YCBCR422_16BIT) && ++ (params->inptyp != RSZ_INTYPE_PLANAR_8BIT)){ ++ dev_err(rsz_device, "Invalid input type\n"); ++ return -EINVAL; ++ } ++ if((params->pix_fmt != RSZ_PIX_FMT_UYVY) && ++ (params->pix_fmt != RSZ_PIX_FMT_YUYV)) { ++ dev_err(rsz_device, "Invalid pix_fmt\n"); ++ return -EINVAL; ++ } ++ if(params->inptyp == RSZ_INTYPE_YCBCR422_16BIT) ++ mul = 2; ++ else ++ mul = 1; ++ if(params->in_pitch < (params->in_hsize * mul)) { ++ dev_err(rsz_device, "pitch is incorrect\n"); ++ return -EINVAL; ++ } ++ if(params->out_pitch < (params->out_hsize * mul)) { ++ dev_err(rsz_device,"out pitch is less than out hsize\n"); ++ return -EINVAL; ++ } ++ /* Output h size should be even */ ++ if((params->out_hsize % PIXEL_EVEN) != 0) { ++ dev_err(rsz_device, "output h size should be even\n"); ++ return -EINVAL; ++ } ++ if(params->horz_starting_pixel < 0) { ++ dev_err(rsz_device, "horz start pixel cannot be less \ ++ that zero\n"); ++ return -EINVAL; ++ } ++ ++ rsz_copy_data(multipass, params); ++ if (0 != rsz_set_ratio(multipass, rsz_conf_chan)) ++ goto err_einval; ++ ++ if(params->yenh_params.type) { ++ if((multipass->num_htap && multipass->out_hsize > ++ 1280 ) || ++ (!multipass->num_htap && multipass->out_hsize > ++ 640)) ++ goto err_einval; ++ } ++ if ((multipass->in_pitch) % ALIGN32) { ++ dev_err(rsz_device, "Invalid input pitch: %d \n", ++ multipass->in_pitch); ++ goto err_einval; ++ } ++ if ((multipass->out_pitch) % ALIGN32) { ++ dev_err(rsz_device, "Invalid output pitch %d \n", ++ multipass->out_pitch); ++ goto err_einval; ++ } ++ ++ if (INPUT_RAM) ++ params->vert_starting_pixel = 0; ++ ++ rsz_conf_chan->register_config.rsz_in_start = ++ (params->vert_starting_pixel ++ << ISPRSZ_IN_SIZE_VERT_SHIFT) ++ & ISPRSZ_IN_SIZE_VERT_MASK; ++ ++ if (params->inptyp == RSZ_INTYPE_PLANAR_8BIT) { ++ if (params->horz_starting_pixel > MAX_HORZ_PIXEL_8BIT) ++ goto err_einval; ++ } ++ if (params->inptyp == RSZ_INTYPE_YCBCR422_16BIT) { ++ if (params->horz_starting_pixel > MAX_HORZ_PIXEL_16BIT) ++ goto err_einval; ++ } ++ ++ rsz_conf_chan->register_config.rsz_in_start |= ++ params->horz_starting_pixel ++ & ISPRSZ_IN_START_HORZ_ST_MASK; ++ ++ rsz_conf_chan->register_config.rsz_yehn = ++ (params->yenh_params.type ++ << ISPRSZ_YENH_ALGO_SHIFT) ++ & ISPRSZ_YENH_ALGO_MASK; ++ ++ if (params->yenh_params.type) { ++ rsz_conf_chan->register_config.rsz_yehn |= ++ params->yenh_params.core ++ & ISPRSZ_YENH_CORE_MASK; ++ ++ rsz_conf_chan->register_config.rsz_yehn |= ++ (params->yenh_params.gain ++ << ISPRSZ_YENH_GAIN_SHIFT) ++ & ISPRSZ_YENH_GAIN_MASK; ++ ++ rsz_conf_chan->register_config.rsz_yehn |= ++ (params->yenh_params.slop ++ << ISPRSZ_YENH_SLOP_SHIFT) ++ & ISPRSZ_YENH_SLOP_MASK; ++ } ++ ++ rsz_config_ratio(multipass, rsz_conf_chan); ++ /* Default value for read expand:Taken from Davinci */ ++ rsz_conf_chan->register_config.sdr_req_exp = RSZ_DEF_REQ_EXP; ++ ++ rsz_conf_chan->config_state = STATE_CONFIGURED; ++ ++ return 0; ++err_einval: ++ return -EINVAL; ++} ++ ++/** ++ * rsz_set_ratio - Set ratio ++ * @fh: File structure containing ISP resizer information specific to ++ * channel opened. ++ * @rsz_conf_chan: Structure containing channel configuration ++ * ++ * Returns 0 if successful, -EINVAL if invalid output size, upscaling ratio is ++ * being requested, or other ratio configuration value is out of bounds ++ **/ ++static int rsz_set_ratio(struct rsz_mult *multipass, ++ struct channel_config *rsz_conf_chan) ++{ ++ int alignment = 0, hrsz, vrsz; ++ rsz_conf_chan->register_config.rsz_cnt = 0; ++ if ((multipass->out_hsize > MAX_IMAGE_WIDTH) || ++ (multipass->out_vsize > MAX_IMAGE_WIDTH)) { ++ dev_err(rsz_device, "Invalid output size!"); ++ goto err_einval; ++ } ++ if (multipass->cbilin) { ++ rsz_conf_chan->register_config.rsz_cnt = ++ BITSET(rsz_conf_chan->register_config.rsz_cnt, ++ SET_BIT_CBLIN); ++ } ++ if (INPUT_RAM) { ++ rsz_conf_chan->register_config.rsz_cnt = ++ BITSET(rsz_conf_chan->register_config.rsz_cnt, ++ SET_BIT_INPUTRAM); ++ } ++ if (multipass->inptyp == RSZ_INTYPE_PLANAR_8BIT) { ++ rsz_conf_chan->register_config.rsz_cnt = ++ BITSET(rsz_conf_chan->register_config.rsz_cnt, ++ SET_BIT_INPTYP); ++ } else { ++ rsz_conf_chan->register_config.rsz_cnt = ++ BITRESET(rsz_conf_chan->register_config. ++ rsz_cnt, SET_BIT_INPTYP); ++ if (multipass->pix_fmt == RSZ_PIX_FMT_UYVY) { ++ rsz_conf_chan->register_config.rsz_cnt = ++ BITRESET(rsz_conf_chan->register_config. ++ rsz_cnt, SET_BIT_YCPOS); ++ } else if (multipass->pix_fmt == RSZ_PIX_FMT_YUYV) { ++ rsz_conf_chan->register_config.rsz_cnt = ++ BITSET(rsz_conf_chan->register_config. ++ rsz_cnt, SET_BIT_YCPOS); ++ } ++ ++ } ++ hrsz = (multipass->in_hsize * RATIO_MULTIPLIER) / multipass->out_hsize; ++ vrsz = (multipass->in_vsize * RATIO_MULTIPLIER) / multipass->out_vsize; ++ if(hrsz < 64 || hrsz > 1024 || vrsz < 64 || vrsz > 1024){ ++ dev_err(rsz_device,"Wrong Resizing Ratio\n"); ++ goto err_einval; ++ } ++ ++ vrsz = multipass->vrsz = (multipass->in_vsize - NUM_D2TAPS) * ++ RATIO_MULTIPLIER / (multipass->out_vsize - 1); ++ hrsz = multipass->hrsz = ((multipass->in_hsize - NUM_D2TAPS) * ++ RATIO_MULTIPLIER) / (multipass->out_hsize - 1); ++ ++ /* For Width */ ++ if (multipass->hrsz <= 512) { ++ hrsz = multipass->hrsz = (multipass->in_hsize - NUM_TAPS) ++ * RATIO_MULTIPLIER ++ / (multipass->out_hsize - 1); ++ if (multipass->hrsz < 64) ++ multipass->hrsz = 64; ++ if (multipass->hrsz > 512) ++ multipass->hrsz = 512; ++ if (multipass->hstph > NUM_PHASES) ++ goto err_einval; ++ multipass->num_htap = 1; ++ } else if (multipass->hrsz >= 513 && multipass->hrsz <= 1024) { ++ if (multipass->hstph > NUM_D2PH) ++ goto err_einval; ++ multipass->num_htap = 0; ++ } ++ /* For Height */ ++ if (multipass->vrsz <= 512) { ++ vrsz = multipass->vrsz = (multipass->in_vsize - NUM_TAPS) ++ * RATIO_MULTIPLIER ++ / (multipass->out_vsize - 1); ++ if (multipass->vrsz < 64) ++ multipass->vrsz = 64; ++ if (multipass->vrsz > 512) ++ multipass->vrsz = 512; ++ if (multipass->vstph > NUM_PHASES) ++ goto err_einval; ++ multipass->num_vtap = 1; ++ } else if (multipass->vrsz >= 513 && multipass->vrsz <= 1024) { ++ if (multipass->vstph > NUM_D2PH) ++ goto err_einval; ++ multipass->num_vtap = 0; ++ } ++ if(vrsz >= 64 && vrsz <= 512) { ++ if(multipass->out_hsize > 3300) { ++ dev_err(rsz_device, "wrong output hsize\n"); ++ goto err_einval; ++ } ++ } else { ++ if(multipass->out_hsize > 1650) { ++ dev_err(rsz_device, "wrong output hsize\n"); ++ goto err_einval; ++ } ++ } ++ ++ if (multipass->vrsz < 256 && ++ (multipass->in_vsize < multipass->out_vsize)) { ++ if (multipass->inptyp == RSZ_INTYPE_PLANAR_8BIT) { ++ alignment = ALIGNMENT; ++ } else if (multipass->inptyp == RSZ_INTYPE_YCBCR422_16BIT) { ++ alignment = (ALIGNMENT / 2); ++ } else { ++ dev_err(rsz_device, "Invalid input type\n"); ++ } ++ ++ if (!(((multipass->out_hsize % PIXEL_EVEN) == 0) ++ && (multipass->out_hsize % alignment) == 0)) { ++ dev_err(rsz_device, "wrong hsize\n"); ++ goto err_einval; ++ } ++ } ++ if (multipass->hrsz >= 64 && multipass->hrsz <= 1024) { ++ if (multipass->out_hsize > MAX_IMAGE_WIDTH) { ++ dev_err(rsz_device, "wrong width\n"); ++ goto err_einval; ++ } ++ multipass->active = 0; ++ ++ } else if (multipass->hrsz > 1024) { ++ if (multipass->out_hsize > MAX_IMAGE_WIDTH) { ++ dev_err(rsz_device, "wrong width\n"); ++ goto err_einval; ++ } ++ if (multipass->hstph > NUM_D2PH) ++ goto err_einval; ++ multipass->num_htap = 0; ++ multipass->out_hsize = multipass->in_hsize * 256 / 1024; ++ if (multipass->out_hsize % ALIGN32) { ++ multipass->out_hsize += ++ abs((multipass->out_hsize % ALIGN32) - ALIGN32); ++ } ++ multipass->out_pitch = ((multipass->inptyp) ? multipass->out_hsize ++ : (multipass->out_hsize * 2)); ++ multipass->hrsz = ((multipass->in_hsize - NUM_D2TAPS) ++ * RATIO_MULTIPLIER) ++ / (multipass->out_hsize - 1); ++ multipass->active = 1; ++ ++ } ++ if (multipass->vrsz > 1024) { ++ if (multipass->out_vsize > MAX_IMAGE_WIDTH_HIGH) { ++ dev_err(rsz_device, "wrong width\n"); ++ goto err_einval; ++ } ++ ++ multipass->out_vsize = multipass->in_vsize * 256 / 1024; ++ multipass->vrsz = ((multipass->in_vsize - NUM_D2TAPS) ++ * RATIO_MULTIPLIER) ++ / (multipass->out_vsize - 1); ++ multipass->active = 1; ++ multipass->num_vtap = 0; ++ } ++ rsz_conf_chan->register_config.rsz_out_size = ++ multipass->out_hsize ++ & ISPRSZ_OUT_SIZE_HORZ_MASK; ++ ++ rsz_conf_chan->register_config.rsz_out_size |= ++ (multipass->out_vsize ++ << ISPRSZ_OUT_SIZE_VERT_SHIFT) ++ & ISPRSZ_OUT_SIZE_VERT_MASK; ++ ++ rsz_conf_chan->register_config.rsz_sdr_inoff = ++ multipass->in_pitch ++ & ISPRSZ_SDR_INOFF_OFFSET_MASK; ++ ++ rsz_conf_chan->register_config.rsz_sdr_outoff = ++ multipass->out_pitch ++ & ISPRSZ_SDR_OUTOFF_OFFSET_MASK; ++ ++ if (multipass->hrsz >= 64 && multipass->hrsz <= 512) { ++ if (multipass->hstph > NUM_PHASES) ++ goto err_einval; ++ } else if (multipass->hrsz >= 64 && multipass->hrsz <= 512) { ++ if (multipass->hstph > NUM_D2PH) ++ goto err_einval; ++ } ++ ++ rsz_conf_chan->register_config.rsz_cnt |= ++ (multipass->hstph ++ << ISPRSZ_CNT_HSTPH_SHIFT) ++ & ISPRSZ_CNT_HSTPH_MASK; ++ ++ if (multipass->vrsz >= 64 && multipass->hrsz <= 512) { ++ if (multipass->vstph > NUM_PHASES) ++ goto err_einval; ++ } else if (multipass->vrsz >= 64 && multipass->vrsz <= 512) { ++ if (multipass->vstph > NUM_D2PH) ++ goto err_einval; ++ } ++ ++ rsz_conf_chan->register_config.rsz_cnt |= ++ (multipass->vstph ++ << ISPRSZ_CNT_VSTPH_SHIFT) ++ & ISPRSZ_CNT_VSTPH_MASK; ++ ++ rsz_conf_chan->register_config.rsz_cnt |= ++ (multipass->hrsz - 1) ++ & ISPRSZ_CNT_HRSZ_MASK; ++ ++ rsz_conf_chan->register_config.rsz_cnt |= ++ ((multipass->vrsz - 1) ++ << ISPRSZ_CNT_VRSZ_SHIFT) ++ & ISPRSZ_CNT_VRSZ_MASK; ++ return 0; ++err_einval: ++ return -EINVAL; ++} ++ ++/** ++ * rsz_config_ratio - Configure ratio ++ * @fh: File structure containing ISP resizer information specific to ++ * channel opened. ++ * @rsz_conf_chan: Structure containing channel configuration ++ * ++ * Configure ratio ++ **/ ++static void rsz_config_ratio(struct rsz_mult *multipass, struct channel_config *rsz_conf_chan) ++{ ++ int hsize, vsize; ++ int coeffcounter; ++ if (multipass->hrsz <= 512) { ++ hsize = ((32 * multipass->hstph + (multipass->out_hsize - 1) ++ * multipass->hrsz + 16) >> 8) + 7; ++ } else { ++ hsize = ((64 * multipass->hstph + (multipass->out_hsize - 1) ++ * multipass->hrsz + 32) >> 8) + 7; ++ } ++ if (multipass->vrsz <= 512) { ++ vsize = ((32 * multipass->vstph + (multipass->out_vsize - 1) ++ * multipass->vrsz + 16) >> 8) + 4; ++ } else { ++ vsize = ((64 * multipass->vstph + (multipass->out_vsize - 1) ++ * multipass->vrsz + 32) >> 8) + 7; ++ } ++ rsz_conf_chan->register_config.rsz_in_size = hsize; ++ ++ rsz_conf_chan->register_config.rsz_in_size |= ++ ((vsize << ISPRSZ_IN_SIZE_VERT_SHIFT) ++ & ISPRSZ_IN_SIZE_VERT_MASK); ++ ++ for (coeffcounter = 0; coeffcounter < MAX_COEF_COUNTER; ++ coeffcounter++) { ++ if (multipass->num_htap) { ++ rsz_conf_chan->register_config. ++ rsz_coeff_horz[coeffcounter] = ++ (multipass->tap4filt_coeffs[2 ++ * coeffcounter] ++ & ISPRSZ_HFILT10_COEF0_MASK); ++ rsz_conf_chan->register_config. ++ rsz_coeff_horz[coeffcounter] |= ++ ((multipass->tap4filt_coeffs[2 ++ * coeffcounter + 1] ++ << ISPRSZ_HFILT10_COEF1_SHIFT) ++ & ISPRSZ_HFILT10_COEF1_MASK); ++ } else { ++ rsz_conf_chan->register_config. ++ rsz_coeff_horz[coeffcounter] = ++ (multipass->tap7filt_coeffs[2 ++ * coeffcounter] ++ & ISPRSZ_HFILT10_COEF0_MASK); ++ ++ rsz_conf_chan->register_config. ++ rsz_coeff_horz[coeffcounter] |= ++ ((multipass->tap7filt_coeffs[2 ++ * coeffcounter + 1] ++ << ISPRSZ_HFILT10_COEF1_SHIFT) ++ & ISPRSZ_HFILT10_COEF1_MASK); ++ } ++ ++ if (multipass->num_vtap) { ++ rsz_conf_chan->register_config. ++ rsz_coeff_vert[coeffcounter] = ++ (multipass->tap4filt_coeffs[2 ++ * coeffcounter] ++ & ISPRSZ_VFILT10_COEF0_MASK); ++ ++ rsz_conf_chan->register_config. ++ rsz_coeff_vert[coeffcounter] |= ++ ((multipass->tap4filt_coeffs[2 ++ * coeffcounter + 1] ++ << ISPRSZ_VFILT10_COEF1_SHIFT) & ++ ISPRSZ_VFILT10_COEF1_MASK); ++ } else { ++ rsz_conf_chan->register_config. ++ rsz_coeff_vert[coeffcounter] = ++ (multipass->tap7filt_coeffs[2 ++ * coeffcounter] ++ & ISPRSZ_VFILT10_COEF0_MASK); ++ rsz_conf_chan->register_config. ++ rsz_coeff_vert[coeffcounter] |= ++ ((multipass->tap7filt_coeffs[2 ++ * coeffcounter + 1] ++ << ISPRSZ_VFILT10_COEF1_SHIFT) ++ & ISPRSZ_VFILT10_COEF1_MASK); ++ } ++ } ++} ++ ++/** ++ * rsz_get_params - Gets the parameter values ++ * @params: Structure containing the Resizer Wrapper parameters ++ * @rsz_conf_chan: Structure containing channel configuration ++ * ++ * Used to get the Resizer hardware settings associated with the ++ * current logical channel represented by fd. ++ **/ ++static int rsz_get_params(struct rsz_params *params, ++ struct channel_config *rsz_conf_chan) ++{ ++ int coeffcounter; ++ ++ if (rsz_conf_chan->config_state) { ++ dev_err(rsz_device, "state not configured\n"); ++ return -EINVAL; ++ } ++ ++ params->in_hsize = rsz_conf_chan->register_config.rsz_in_size ++ & ISPRSZ_IN_SIZE_HORZ_MASK; ++ params->in_vsize = (rsz_conf_chan->register_config.rsz_in_size ++ & ISPRSZ_IN_SIZE_VERT_MASK) ++ >> ISPRSZ_IN_SIZE_VERT_SHIFT; ++ ++ params->in_pitch = rsz_conf_chan->register_config.rsz_sdr_inoff ++ & ISPRSZ_SDR_INOFF_OFFSET_MASK; ++ ++ params->out_hsize = rsz_conf_chan->register_config.rsz_out_size ++ & ISPRSZ_OUT_SIZE_HORZ_MASK; ++ ++ params->out_vsize = (rsz_conf_chan->register_config.rsz_out_size ++ & ISPRSZ_OUT_SIZE_VERT_MASK) ++ >> ISPRSZ_OUT_SIZE_VERT_SHIFT; ++ ++ params->out_pitch = rsz_conf_chan->register_config.rsz_sdr_outoff ++ & ISPRSZ_SDR_OUTOFF_OFFSET_MASK; ++ ++ params->cbilin = (rsz_conf_chan->register_config.rsz_cnt ++ & SET_BIT_CBLIN) >> SET_BIT_CBLIN; ++ ++ params->inptyp = (rsz_conf_chan->register_config.rsz_cnt ++ & ISPRSZ_CNT_INPTYP_MASK) ++ >> SET_BIT_INPTYP; ++ params->horz_starting_pixel = ((rsz_conf_chan->register_config. ++ rsz_in_start ++ & ISPRSZ_IN_START_HORZ_ST_MASK)); ++ params->vert_starting_pixel = ((rsz_conf_chan->register_config. ++ rsz_in_start ++ & ISPRSZ_IN_START_VERT_ST_MASK) ++ >> ISPRSZ_IN_START_VERT_ST_SHIFT); ++ ++ params->hstph = ((rsz_conf_chan->register_config.rsz_cnt ++ & ISPRSZ_CNT_HSTPH_MASK ++ >> ISPRSZ_CNT_HSTPH_SHIFT)); ++ params->vstph = ((rsz_conf_chan->register_config.rsz_cnt ++ & ISPRSZ_CNT_VSTPH_MASK ++ >> ISPRSZ_CNT_VSTPH_SHIFT)); ++ ++ for (coeffcounter = 0; coeffcounter < MAX_COEF_COUNTER; ++ coeffcounter++) { ++ params->tap4filt_coeffs[2 * coeffcounter] = ++ rsz_conf_chan->register_config. ++ rsz_coeff_horz[coeffcounter] ++ & ISPRSZ_HFILT10_COEF0_MASK; ++ ++ params->tap4filt_coeffs[2 * coeffcounter + 1] = ++ (rsz_conf_chan->register_config. ++ rsz_coeff_horz[coeffcounter] ++ & ISPRSZ_HFILT10_COEF1_MASK) ++ >> ISPRSZ_HFILT10_COEF1_SHIFT; ++ ++ params->tap7filt_coeffs[2 * coeffcounter] = ++ rsz_conf_chan->register_config. ++ rsz_coeff_vert[coeffcounter] ++ & ISPRSZ_VFILT10_COEF0_MASK; ++ ++ params->tap7filt_coeffs[2 * coeffcounter + 1] = ++ (rsz_conf_chan->register_config. ++ rsz_coeff_vert[coeffcounter] ++ & ISPRSZ_VFILT10_COEF1_MASK) ++ >> ISPRSZ_VFILT10_COEF1_SHIFT; ++ ++ } ++ ++ params->yenh_params.type = (rsz_conf_chan->register_config.rsz_yehn ++ & ISPRSZ_YENH_ALGO_MASK) ++ >> ISPRSZ_YENH_ALGO_SHIFT; ++ ++ params->yenh_params.core = rsz_conf_chan->register_config.rsz_yehn ++ & ISPRSZ_YENH_CORE_MASK; ++ ++ params->yenh_params.gain = (rsz_conf_chan->register_config.rsz_yehn ++ & ISPRSZ_YENH_GAIN_MASK) ++ >> ISPRSZ_YENH_GAIN_SHIFT; ++ ++ params->yenh_params.slop = (rsz_conf_chan->register_config.rsz_yehn ++ & ISPRSZ_YENH_SLOP_MASK) ++ >> ISPRSZ_YENH_SLOP_SHIFT; ++ ++ params->pix_fmt = ((rsz_conf_chan->register_config.rsz_cnt ++ & ISPRSZ_CNT_PIXFMT_MASK) ++ >> SET_BIT_YCPOS); ++ ++ if (params->pix_fmt) ++ params->pix_fmt = RSZ_PIX_FMT_UYVY; ++ else ++ params->pix_fmt = RSZ_PIX_FMT_YUYV; ++ ++ return 0; ++} ++ ++/** ++ * rsz_calculate_crop - Calculate Crop values ++ * @rsz_conf_chan: Structure containing channel configuration ++ * @cropsize: Structure containing crop parameters ++ * ++ * Calculate Crop values ++ **/ ++static void rsz_calculate_crop(struct channel_config *rsz_conf_chan, ++ struct rsz_cropsize *cropsize) ++{ ++ int luma_enable; ++ ++ cropsize->hcrop = 0; ++ cropsize->vcrop = 0; ++ ++ luma_enable = (rsz_conf_chan->register_config.rsz_yehn ++ & ISPRSZ_YENH_ALGO_MASK) ++ >> ISPRSZ_YENH_ALGO_SHIFT; ++ ++ if (luma_enable) { ++ cropsize->hcrop += 2; ++ } ++} ++ ++/** ++ * rsz_vbq_release - Videobuffer queue release ++ * @q: Structure containing the videobuffer queue file handle, and device ++ * structure which contains the actual configuration. ++ * @vb: Structure containing the videobuffer used for resizer processing. ++ **/ ++static void rsz_vbq_release(struct videobuf_queue *q, ++ struct videobuf_buffer *vb) ++{ ++ struct rsz_fh *fh = q->priv_data; ++ struct videobuf_dmabuf *dma = NULL; ++ ++ dma = videobuf_to_dma(q->bufs[vb->i]); ++ videobuf_dma_unmap(q, dma); ++ videobuf_dma_free(dma); ++ ispmmu_unmap(fh->config->buf_address[vb->i]); ++ fh->config->buf_address[vb->i] = 0; ++ ++ spin_lock(&fh->vbq_lock); ++ vb->state = VIDEOBUF_NEEDS_INIT; ++ spin_unlock(&fh->vbq_lock); ++ ++} ++ ++/** ++ * rsz_vbq_setup - Sets up the videobuffer size and validates count. ++ * @q: Structure containing the videobuffer queue file handle, and device ++ * structure which contains the actual configuration. ++ * @cnt: Number of buffers requested ++ * @size: Size in bytes of the buffer used for previewing ++ * ++ * Always returns 0. ++ **/ ++static int rsz_vbq_setup(struct videobuf_queue *q, unsigned int *cnt, ++ unsigned int *size) ++{ ++ struct rsz_fh *fh = q->priv_data; ++ struct rsz_mult *multipass = fh->multipass; ++ u32 bpp = 1, insize, outsize; ++ ++ spin_lock(&fh->vbq_lock); ++ ++ if (fh->params->inptyp == RSZ_INTYPE_YCBCR422_16BIT) ++ bpp = 2; ++ if (*cnt <= 0) ++ *cnt = VIDEO_MAX_FRAME; ++ if (*cnt > VIDEO_MAX_FRAME) ++ *cnt = VIDEO_MAX_FRAME; ++ ++ outsize = multipass->out_pitch * multipass->out_vsize; ++ insize = multipass->in_pitch * multipass->in_vsize; ++ if (*cnt == 1 && (outsize > insize)) { ++ dev_err(rsz_device, "2 buffers are required for Upscaling " ++ "mode\n"); ++ goto err_einval; ++ } ++ if (!fh->params->in_hsize || !fh->params->in_vsize) { ++ dev_err(rsz_device, "Can't setup buffer size\n"); ++ goto err_einval; ++ } else { ++ if(outsize > insize) ++ *size = outsize; ++ else ++ *size = insize; ++ ++ fh->rsz_bufsize = *size; ++ } ++ spin_unlock(&fh->vbq_lock); ++ return 0; ++err_einval: ++ spin_unlock(&fh->vbq_lock); ++ return -EINVAL; ++} ++/* ++ * This function is work around for the videobuf_iolock API, ++ * For User memory allocated with ioremap (VM_IO flag) the API ++ * get_user_pages fails. ++ * ++ * To fulfill this requirement, we have completely ignored VM layer of ++ * Linux, and configuring the ISP MMU with physical address. ++ */ ++static int omap_videobuf_dma_init_user (struct videobuf_dmabuf *dma, ++ unsigned long physp) ++{ ++ struct scatterlist *sglist; ++ int len, i = 0; ++ ++ if (dma->nr_pages == 0) ++ return -EINVAL; ++ ++ len = dma->nr_pages; ++ ++ sglist = kcalloc(len, sizeof(*sglist), GFP_KERNEL); ++ if (NULL == sglist) ++ return -ENOMEM; ++ /* */ ++ for (i = 0; i < len; i++) { ++ sglist[i].offset = 0; ++ sglist[i].length = PAGE_SIZE; ++ sglist[i].dma_address = (dma_addr_t)physp; ++ physp += PAGE_SIZE; ++ } ++ dma->sglist = sglist; ++ dma->sglen = len; ++ return 0; ++ ++} ++static int omap_videobuf_dma_init(struct videobuf_dmabuf *dma, ++ int rw, unsigned long data) ++{ ++ int err = 0; ++ ++ if(dma->nr_pages == 0) ++ return -EINVAL; ++ ++ dma->pages = kmalloc(dma->nr_pages * sizeof(struct page*), ++ GFP_KERNEL); ++ if (NULL == dma->pages) ++ return -ENOMEM; ++ ++ dma->varea = (void *) data; ++ err = get_user_pages(current,current->mm, ++ data & PAGE_MASK, dma->nr_pages, ++ rw == READ, 1, /* force */ ++ dma->pages, NULL); ++ ++ if (err != dma->nr_pages) { ++ dma->nr_pages = (err >= 0) ? err : 0; ++ printk("get_user_pages: err=%d [%d]\n",err,dma->nr_pages); ++ return err < 0 ? err : -EINVAL; ++ } ++ return 0; ++} ++ ++static int omap_videobuf_iolock(struct videobuf_queue* q, ++ struct videobuf_buffer *vb, ++ unsigned long asize) ++{ ++ int err = 0; ++ unsigned long start, first, last; ++ struct videobuf_dma_sg_memory *mem = vb->priv; ++ struct videobuf_dmabuf *dma; ++ struct vm_area_struct *vma; ++ ++ BUG_ON(!mem); ++ MAGIC_CHECK(vb->magic, MAGIC_BUFFER); ++ MAGIC_CHECK(q->int_ops->magic, MAGIC_QTYPE_OPS); ++ MAGIC_CHECK(mem->magic, MAGIC_SG_MEM); ++ ++ dma = &mem->dma; ++ dma->direction = PCI_DMA_FROMDEVICE; ++ start = vb->baddr; ++ /* Calculate number of pages required */ ++ first = (start & PAGE_MASK) >> PAGE_SHIFT; ++ last = ((start+asize-1) & PAGE_MASK) >> PAGE_SHIFT; ++ dma->offset = start & ~PAGE_MASK; ++ dma->nr_pages = last-first+1; ++ ++ /* For kernel direct-mapped memory, take the easy way */ ++ if (start >= PAGE_OFFSET) { ++ unsigned long physp = 0; ++ physp = virt_to_phys((void *)start); ++ err = omap_videobuf_dma_init_user(dma, physp); ++ if (err != 0) ++ return err; ++ } else if ((vma = find_vma(current->mm, start)) && (vma->vm_flags & VM_IO) ++ && (vma->vm_pgoff)){ ++ /* This will catch, kernel-allocated, ++ mmaped-to-usermode addresses */ ++ unsigned long physp = 0; ++ physp = (vma->vm_pgoff << PAGE_SHIFT) + (start - ++ vma->vm_start); ++ err = omap_videobuf_dma_init_user(dma, physp); ++ if (err != 0) ++ return err; ++ } ++ else { ++ down_read(¤t->mm->mmap_sem); ++ asize = PAGE_ALIGN(asize); ++ err = omap_videobuf_dma_init(&mem->dma, ++ READ, start); ++ up_read(¤t->mm->mmap_sem); ++ if (0 != err) ++ return err; ++ ++ err = videobuf_dma_map(q,&mem->dma); ++ if (0 != err) ++ return err; ++ } ++ return 0; ++} ++/** ++ * rsz_vbq_prepare - Videobuffer is prepared and mmapped. ++ * @q: Structure containing the videobuffer queue file handle, and device ++ * structure which contains the actual configuration. ++ * @vb: Structure containing the videobuffer used for resizer processing. ++ * @field: Type of field to set in videobuffer device. ++ * ++ * Returns 0 if successful, or -EINVAL if buffer couldn't get allocated, or ++ * -EIO if the ISP MMU mapping fails ++ **/ ++static int rsz_vbq_prepare(struct videobuf_queue *q, ++ struct videobuf_buffer *vb, ++ enum v4l2_field field) ++{ ++ struct rsz_fh *fh = q->priv_data; ++ struct channel_config *rsz_conf_chan = fh->config; ++ int err = 0; ++ unsigned int isp_addr, insize, outsize; ++ struct videobuf_dmabuf *dma; ++ struct rsz_mult *multipass = fh->multipass; ++ spin_lock(&fh->vbq_lock); ++ dma = videobuf_to_dma(vb); ++ if (vb->baddr) { ++ if (vb->baddr != (vb->baddr & PAGE_MASK)) { ++ dev_err(rsz_device, "Buffer address should be aligned \ ++ to PAGE_SIZE\n"); ++ return -EINVAL; ++ } ++ vb->size = fh->rsz_bufsize; ++ vb->bsize = fh->rsz_bufsize; ++ } else { ++ spin_unlock(&fh->vbq_lock); ++ dev_err(rsz_device, "No user buffer allocated\n"); ++ goto out; ++ } ++ if (vb->i) { ++ vb->width = fh->params->out_hsize; ++ vb->height = fh->params->out_vsize; ++ } else { ++ vb->width = fh->params->in_hsize; ++ vb->height = fh->params->in_vsize; ++ } ++ vb->field = field; ++ spin_unlock(&fh->vbq_lock); ++ ++ outsize = multipass->out_pitch * multipass->out_vsize; ++ insize = multipass->in_pitch * multipass->in_vsize; ++ ++ if (vb->state == VIDEOBUF_NEEDS_INIT) { ++ spin_lock(&fh->vbq_lock); ++ if(vb->memory == V4L2_MEMORY_USERPTR) ++ err = omap_videobuf_iolock(q, vb, ++ vb->i?outsize:insize); ++ else ++ err = videobuf_iolock(q, vb, NULL); ++ spin_unlock(&fh->vbq_lock); ++ if(err) { ++ rsz_vbq_release(q, vb); ++ return err; ++ } ++ isp_addr = ispmmu_map_sg(dma->sglist, dma->sglen); ++ if (!isp_addr) ++ err = -EIO; ++ else { ++ if (vb->i) { ++ rsz_conf_chan->buf_address[vb->i] = isp_addr; ++ rsz_conf_chan->register_config. ++ rsz_sdr_outadd ++ = isp_addr; ++ fh->isp_addr_write = isp_addr; ++ rsz_conf_chan->output_buf_index = vb->i; ++ } else { ++ rsz_conf_chan->buf_address[vb->i] = isp_addr; ++ rsz_conf_chan->register_config. ++ rsz_sdr_inadd ++ = isp_addr; ++ rsz_conf_chan->input_buf_index = vb->i; ++ if(outsize < insize && rsz_conf_chan-> ++ register_config. ++ rsz_sdr_outadd == 0) { ++ rsz_conf_chan->register_config. ++ rsz_sdr_outadd ++ = isp_addr; ++ rsz_conf_chan-> ++ output_buf_index = ++ vb->i; ++ } ++ fh->isp_addr_read = isp_addr; ++ } ++ } ++ ++ } else { ++ if(vb->i) { ++ rsz_conf_chan->register_config. ++ rsz_sdr_outadd = rsz_conf_chan->buf_address[vb->i]; ++ fh->isp_addr_write = rsz_conf_chan->buf_address[vb->i]; ++ rsz_conf_chan->output_buf_index = vb->i; ++ } else { ++ rsz_conf_chan->register_config. ++ rsz_sdr_inadd = rsz_conf_chan->buf_address[vb->i]; ++ rsz_conf_chan->input_buf_index = vb->i; ++ if(outsize < insize && rsz_conf_chan-> ++ register_config. ++ rsz_sdr_outadd == 0) { ++ rsz_conf_chan->register_config. ++ rsz_sdr_outadd ++ = rsz_conf_chan->buf_address[vb->i]; ++ rsz_conf_chan->output_buf_index = vb->i; ++ } ++ ++ } ++ ++ } ++ if (!err) { ++ spin_lock(&fh->vbq_lock); ++ vb->state = VIDEOBUF_PREPARED; ++ spin_unlock(&fh->vbq_lock); ++ } else ++ rsz_vbq_release(q, vb); ++out: ++ return err; ++} ++ ++static void rsz_vbq_queue(struct videobuf_queue *q, struct videobuf_buffer *vb) ++{ ++ return; ++} ++ ++/** ++ * rsz_open - Initializes and opens the Resizer Wrapper ++ * @inode: Inode structure associated with the Resizer Wrapper ++ * @filp: File structure associated with the Resizer Wrapper ++ * ++ * Returns 0 if successful, -EBUSY if its already opened or the ISP module is ++ * not available, or -ENOMEM if its unable to allocate the device in kernel ++ * space memory. ++ **/ ++static int rsz_open(struct inode *inode, struct file *filp) ++{ ++ int ret = 0; ++ struct channel_config *rsz_conf_chan; ++ struct rsz_fh *fh; ++ struct device_params *device = device_config; ++ struct rsz_params *params; ++ struct rsz_mult *multipass; ++ ++ if ((filp->f_flags & O_NONBLOCK) == O_NONBLOCK) { ++ printk(KERN_DEBUG "omap-resizer: Device is opened in " ++ "non blocking mode\n"); ++ }else{ ++ printk(KERN_DEBUG "omap-resizer: Device is opened in blocking " ++ "mode\n"); ++ } ++ fh = kzalloc(sizeof(struct rsz_fh), GFP_KERNEL); ++ if (NULL == fh) ++ return -ENOMEM; ++ ++ isp_get(); ++ ++ rsz_conf_chan = kzalloc(sizeof(struct channel_config), GFP_KERNEL); ++ if (rsz_conf_chan == NULL) { ++ dev_err(rsz_device, "\n cannot allocate memory to config"); ++ ret = -ENOMEM; ++ goto err_enomem0; ++ } ++ params = kzalloc(sizeof(struct rsz_params), GFP_KERNEL); ++ if (params == NULL) { ++ dev_err(rsz_device, "\n cannot allocate memory to params"); ++ ret = -ENOMEM; ++ goto err_enomem1; ++ } ++ multipass = kzalloc(sizeof(struct rsz_mult), GFP_KERNEL); ++ if (multipass == NULL) { ++ dev_err(rsz_device, "\n cannot allocate memory to multipass"); ++ ret = -ENOMEM; ++ goto err_enomem2; ++ } ++ fh->multipass = multipass; ++ fh->params = params; ++ fh->config = rsz_conf_chan; ++ rsz_conf_chan->config_state = STATE_NOT_CONFIGURED; ++ rsz_conf_chan->status = CHANNEL_FREE; ++ filp->private_data = fh; ++ fh->type = V4L2_BUF_TYPE_VIDEO_CAPTURE; ++ fh->device = device; ++ ++ videobuf_queue_sg_init(&fh->vbq, &device->vbq_ops, NULL, ++ &fh->vbq_lock, fh->type, ++ V4L2_FIELD_NONE, ++ sizeof(struct videobuf_buffer), fh); ++ ++ spin_lock_init(&fh->vbq_lock); ++ mutex_init(&rsz_conf_chan->chanprotection_mutex); ++ return 0; ++err_enomem2: ++ kfree(params); ++err_enomem1: ++ kfree(rsz_conf_chan); ++err_enomem0: ++ kfree(fh); ++ return ret; ++} ++ ++/** ++ * rsz_release - Releases Resizer Wrapper and frees up allocated memory ++ * @inode: Inode structure associated with the Resizer Wrapper ++ * @filp: File structure associated with the Resizer Wrapper ++ * ++ * Returns 0 if successful, or -EBUSY if channel is being used. ++ **/ ++static int rsz_release(struct inode *inode, struct file *filp) ++{ ++ int i; ++ unsigned int timeout = 0; ++ struct rsz_fh *fh = filp->private_data; ++ struct channel_config *rsz_conf_chan = fh->config; ++ struct rsz_params *params = fh->params; ++ struct rsz_mult *multipass = fh->multipass; ++ struct videobuf_queue *q = &fh->vbq; ++ ++ while((rsz_conf_chan->status != CHANNEL_FREE) && (timeout < 20)) { ++ timeout++; ++ schedule(); ++ } ++ /* Free memory allocated to the buffers */ ++ for (i = 0 ; i < VIDEO_MAX_FRAME ; i ++) { ++ struct videobuf_dmabuf *dma = NULL; ++ if(!q->bufs[i]) ++ continue; ++ dma = videobuf_to_dma(q->bufs[i]); ++ videobuf_dma_unmap(q, dma); ++ videobuf_dma_free(dma); ++ } ++ ++ videobuf_mmap_free(q); ++ fh->rsz_bufsize = 0; ++ filp->private_data = NULL; ++ kfree(rsz_conf_chan); ++ kfree(params); ++ kfree(multipass); ++ kfree(fh); ++ isp_put(); ++ fh->params = NULL; ++ fh->config = NULL; ++ return 0; ++} ++ ++/** ++ * rsz_mmap - Memory maps the Resizer Wrapper module. ++ * @file: File structure associated with the Resizer Wrapper ++ * @vma: Virtual memory area structure. ++ * ++ * Returns 0 if successful, or returned value by the videobuf_mmap_mapper() ++ * function. ++ **/ ++static int rsz_mmap(struct file *file, struct vm_area_struct *vma) ++{ ++ struct rsz_fh *fh = file->private_data; ++ ++ return videobuf_mmap_mapper(&fh->vbq, vma); ++} ++ ++/** ++ * rsz_ioctl - I/O control function for Resizer Wrapper ++ * @inode: Inode structure associated with the Resizer Wrapper. ++ * @file: File structure associated with the Resizer Wrapper. ++ * @cmd: Type of command to execute. ++ * @arg: Argument to send to requested command. ++ * ++ * Returns 0 if successful, -EBUSY if channel is being used, -1 if bad command ++ * passed or access is denied, -EFAULT if copy_from_user() or copy_to_user() ++ * fails, -EINVAL if parameter validation fails or parameter structure is not ++ * present. ++ **/ ++static long rsz_unlocked_ioctl(struct file *file, unsigned int cmd, unsigned long arg) ++{ ++ int ret = 0, i; ++ struct rsz_fh *fh = file->private_data; ++ struct device_params *device = fh->device; ++ struct channel_config *rsz_conf_chan = fh->config; ++ ++ if ((_IOC_TYPE(cmd) != RSZ_IOC_BASE) ++ || (_IOC_NR(cmd) > RSZ_IOC_MAXNR)) { ++ dev_err(rsz_device, "Bad command value \n"); ++ goto err_minusone; ++ } ++ ++ if (_IOC_DIR(cmd) & _IOC_READ) ++ ret = !access_ok(VERIFY_WRITE, (void *)arg, _IOC_SIZE(cmd)); ++ else if (_IOC_DIR(cmd) & _IOC_WRITE) ++ ret = !access_ok(VERIFY_READ, (void *)arg, _IOC_SIZE(cmd)); ++ ++ if (ret) { ++ dev_err(rsz_device, "Access denied\n"); ++ goto err_minusone; ++ } ++ ++ switch (cmd) { ++ case RSZ_REQBUF: ++ { ++ struct v4l2_requestbuffers req_buf; ++ struct videobuf_queue *q = &fh->vbq; ++ if (copy_from_user(&req_buf, (struct v4l2_requestbuffers *)arg, ++ sizeof(struct v4l2_requestbuffers))) { ++ goto err_efault; ++ } ++ if (mutex_lock_interruptible(&rsz_conf_chan->chanprotection_mutex)) ++ goto err_eintr; ++ /* Free memory allocated to the buffers */ ++ for (i = 0 ; i < VIDEO_MAX_FRAME ; i ++) { ++ struct videobuf_dmabuf *dma = NULL; ++ if(!q->bufs[i]) ++ continue; ++ if(q->bufs[i]->memory != V4L2_MEMORY_MMAP) ++ continue; ++ dma = videobuf_to_dma(q->bufs[i]); ++ videobuf_dma_unmap(q, dma); ++ videobuf_dma_free(dma); ++ ++ } ++ videobuf_mmap_free(q); ++ ++ ret = videobuf_reqbufs(q, &req_buf); ++ mutex_unlock(&rsz_conf_chan->chanprotection_mutex); ++ break; ++ } ++ case RSZ_QUERYBUF: ++ { ++ struct v4l2_buffer buf; ++ if (copy_from_user(&buf, (struct v4l2_buffer *)arg, ++ sizeof(struct v4l2_buffer))) { ++ goto err_efault; ++ } ++ if (mutex_lock_interruptible(&rsz_conf_chan->chanprotection_mutex)) ++ goto err_eintr; ++ ret = videobuf_querybuf(&fh->vbq, &buf); ++ mutex_unlock(&rsz_conf_chan->chanprotection_mutex); ++ if (copy_to_user((struct v4l2_buffer *)arg, &buf, ++ sizeof(struct v4l2_buffer))) ++ ret = -EFAULT; ++ ++ break; ++ } ++ case RSZ_QUEUEBUF: ++ { ++ struct v4l2_buffer buf; ++ if (copy_from_user(&buf, (struct v4l2_buffer *)arg, ++ sizeof(struct v4l2_buffer))) { ++ goto err_efault; ++ } ++ if (mutex_lock_interruptible(&rsz_conf_chan->chanprotection_mutex)) ++ goto err_eintr; ++ ret = videobuf_qbuf(&fh->vbq, &buf); ++ mutex_unlock(&rsz_conf_chan->chanprotection_mutex); ++ break; ++ } ++ case RSZ_S_PARAM: ++ { ++ struct rsz_params *params = fh->params; ++ if (copy_from_user(params, (struct rsz_params *)arg, ++ sizeof(struct rsz_params))) { ++ goto err_efault; ++ } ++ ret = rsz_set_params(fh->multipass, fh->params, rsz_conf_chan); ++ break; ++ } ++ case RSZ_G_PARAM: ++ ret = rsz_get_params((struct rsz_params *)arg, rsz_conf_chan); ++ break; ++ ++ case RSZ_G_STATUS: ++ { ++ struct rsz_status *status; ++ status = (struct rsz_status *)arg; ++ status->chan_busy = rsz_conf_chan->status; ++ status->hw_busy = resizer_busy(); ++ status->src = INPUT_RAM; ++ break; ++ } ++ case RSZ_RESIZE: ++ if(file->f_flags & O_NONBLOCK) { ++ if(resizer_busy()) ++ return -EBUSY; ++ else { ++ if(!mutex_trylock(&device->reszwrap_mutex)) ++ return -EBUSY; ++ } ++ } ++ else { ++ if (mutex_lock_interruptible(&device->reszwrap_mutex)) ++ goto err_eintr; ++ } ++ ret = rsz_start((int *)arg, fh); ++ mutex_unlock(&device->reszwrap_mutex); ++ break; ++ ++ case RSZ_GET_CROPSIZE: ++ rsz_calculate_crop(rsz_conf_chan, (struct rsz_cropsize *)arg); ++ break; ++ ++ case RSZ_S_EXP: ++ if (mutex_lock_interruptible(&rsz_conf_chan->chanprotection_mutex)) ++ goto err_eintr; ++ rsz_conf_chan->register_config.sdr_req_exp = *((unsigned int *)arg); ++ mutex_unlock(&rsz_conf_chan->chanprotection_mutex); ++ break; ++ default: ++ dev_err(rsz_device, "resizer_ioctl: Invalid Command Value"); ++ ret = -EINVAL; ++ } ++ ++out: ++ return (long)ret; ++err_minusone: ++ ret = -1; ++ goto out; ++err_eintr: ++ ret = -EINTR; ++ goto out; ++err_efault: ++ ret = -EFAULT; ++ goto out; ++} ++ ++static struct file_operations rsz_fops = { ++ .owner = THIS_MODULE, ++ .open = rsz_open, ++ .release = rsz_release, ++ .mmap = rsz_mmap, ++ .unlocked_ioctl = rsz_unlocked_ioctl, ++}; ++ ++/** ++ * rsz_isr - Interrupt Service Routine for Resizer wrapper ++ * @status: ISP IRQ0STATUS register value ++ * @arg1: Currently not used ++ * @arg2: Currently not used ++ * ++ * Interrupt Service Routine for Resizer wrapper ++ **/ ++static void rsz_isr(unsigned long status, isp_vbq_callback_ptr arg1, void *arg2) ++{ ++ if ((status & RESZ_DONE) != RESZ_DONE) ++ return; ++ complete(&(device_config->compl_isr)); ++} ++ ++/** ++ * resizer_platform_release - Acts when Reference count is zero ++ * @device: Structure containing ISP resizer wrapper global information ++ * ++ * This is called when the reference count goes to zero. ++ **/ ++static void resizer_platform_release(struct device *device) ++{ ++} ++ ++/** ++ * resizer_probe - Checks for device presence ++ * @device: Structure containing details of the current device. ++ * ++ * Always returns 0. ++ **/ ++static int __init resizer_probe(struct platform_device *device) ++{ ++ return 0; ++} ++ ++/** ++ * resizer_remove - Handles the removal of the driver ++ * @omap_resizer_device: Structure containing details of the current device. ++ * ++ * Always returns 0. ++ **/ ++static int resizer_remove(struct platform_device *omap_resizer_device) ++{ ++ return 0; ++} ++ ++static struct class *rsz_class = NULL; ++static struct cdev c_dev; ++static dev_t dev; ++ ++static struct platform_device omap_resizer_device = { ++ .name = OMAP_REZR_NAME, ++ .id = 2, ++ .dev = { ++ .release = resizer_platform_release, ++ } ++}; ++ ++static struct platform_driver omap_resizer_driver = { ++ .probe = resizer_probe, ++ .remove = resizer_remove, ++ .driver = { ++ .bus = &platform_bus_type, ++ .name = OMAP_REZR_NAME, ++ }, ++}; ++ ++/** ++ * omap_rsz_init - Initialization of Resizer Wrapper ++ * ++ * Returns 0 if successful, -ENOMEM if could not allocate memory, -ENODEV if ++ * could not register the wrapper as a character device, or other errors if the ++ * device or driver can't register. ++ **/ ++static int __init omap_rsz_init(void) ++{ ++ int ret = 0; ++ struct device_params *device; ++ ++ device = kzalloc(sizeof(struct device_params), GFP_KERNEL); ++ if (!device) { ++ dev_err(rsz_device, OMAP_REZR_NAME ": could not allocate " ++ "memory\n"); ++ return -ENOMEM; ++ } ++ ret = alloc_chrdev_region(&dev, 0, 1, OMAP_REZR_NAME); ++ if (ret < 0) { ++ dev_err(rsz_device, OMAP_REZR_NAME ": intialization failed. " ++ "Could not allocate region " ++ "for character device\n"); ++ kfree(device); ++ return -ENODEV; ++ } ++ /* Register the driver in the kernel */ ++ /* Initialize of character device */ ++ cdev_init(&c_dev, &rsz_fops); ++ c_dev.owner = THIS_MODULE; ++ c_dev.ops = &rsz_fops; ++ /* addding character device */ ++ ret = cdev_add(&c_dev, dev, 1); ++ if (ret) { ++ dev_err(rsz_device, OMAP_REZR_NAME ": Error adding " ++ "device - %d\n", ret); ++ goto fail2; ++ } ++ rsz_major = MAJOR(dev); ++ /* register driver as a platform driver */ ++ ret = platform_driver_register(&omap_resizer_driver); ++ if (ret) { ++ dev_err(rsz_device, OMAP_REZR_NAME ++ ": failed to register platform driver!\n"); ++ goto fail3; ++ } ++ /* Register the drive as a platform device */ ++ ret = platform_device_register(&omap_resizer_device); ++ if (ret) { ++ dev_err(rsz_device, OMAP_REZR_NAME ++ ": failed to register platform device!\n"); ++ goto fail4; ++ } ++ rsz_class = class_create(THIS_MODULE, OMAP_REZR_NAME); ++ if (!rsz_class) { ++ dev_err(rsz_device, OMAP_REZR_NAME ++ ": Failed to create class!\n"); ++ goto fail5; ++ } ++ /* make entry in the devfs */ ++ rsz_device = device_create(rsz_class, rsz_device, MKDEV(rsz_major, 0), ++ NULL,OMAP_REZR_NAME); ++ dev_dbg(rsz_device, OMAP_REZR_NAME ": Registered Resizer Wrapper\n"); ++ ++ device->vbq_ops.buf_setup = rsz_vbq_setup; ++ device->vbq_ops.buf_prepare = rsz_vbq_prepare; ++ device->vbq_ops.buf_release = rsz_vbq_release; ++ device->vbq_ops.buf_queue = rsz_vbq_queue; ++ ++ init_completion(&device->compl_isr); ++ mutex_init(&device->reszwrap_mutex); ++ device_config = device; ++ return 0; ++fail5: ++ platform_device_unregister(&omap_resizer_device); ++fail4: ++ platform_driver_unregister(&omap_resizer_driver); ++fail3: ++ cdev_del(&c_dev); ++fail2: ++ unregister_chrdev_region(dev, 1); ++ kfree(device); ++ return ret; ++} ++ ++/** ++ * omap_rsz_exit - Close of Resizer Wrapper ++ **/ ++void __exit omap_rsz_exit(void) ++{ ++ device_destroy(rsz_class, dev); ++ class_destroy(rsz_class); ++ platform_device_unregister(&omap_resizer_device); ++ platform_driver_unregister(&omap_resizer_driver); ++ cdev_del(&c_dev); ++ unregister_chrdev_region(dev, 1); ++ kfree(device_config); ++} ++ ++module_init(omap_rsz_init) ++module_exit(omap_rsz_exit) ++ ++MODULE_AUTHOR("Texas Instruments"); ++MODULE_DESCRIPTION("OMAP ISP Resizer"); ++MODULE_LICENSE("GPL"); +Index: git/drivers/media/video/isp/omap_resizer.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ git/drivers/media/video/isp/omap_resizer.h 2009-02-12 10:29:26.000000000 -0600 +@@ -0,0 +1,323 @@ ++/* ++ * drivers/media/video/isp/omap_resizer.h ++ * ++ * Include file for Resizer module wrapper in TI's OMAP3430 ISP ++ * ++ * Copyright (C) 2008 Texas Instruments, Inc. ++ * ++ * This package is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ * ++ * THIS PACKAGE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR ++ * IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED ++ * WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE. ++ */ ++ ++#ifndef OMAP_ISP_RESIZER_WRAP_H ++#define OMAP_ISP_RESIZER_WRAP_H ++ ++/* ioctls definition */ ++#define RSZ_IOC_BASE 'R' ++#define RSZ_IOC_MAXNR 8 ++ ++/*Ioctl options which are to be passed while calling the ioctl*/ ++#define RSZ_REQBUF _IOWR(RSZ_IOC_BASE, 1,\ ++ struct v4l2_requestbuffers) ++#define RSZ_QUERYBUF _IOWR(RSZ_IOC_BASE, 2,\ ++ struct v4l2_buffer) ++#define RSZ_S_PARAM _IOWR(RSZ_IOC_BASE, 3,\ ++ struct rsz_params) ++#define RSZ_G_PARAM _IOWR(RSZ_IOC_BASE, 4,\ ++ struct rsz_params) ++#define RSZ_RESIZE _IOWR(RSZ_IOC_BASE, 5, int) ++#define RSZ_G_STATUS _IOWR(RSZ_IOC_BASE, 6,\ ++ struct rsz_status) ++#define RSZ_QUEUEBUF _IOWR(RSZ_IOC_BASE, 7,\ ++ struct v4l2_buffer) ++#define RSZ_GET_CROPSIZE _IOWR(RSZ_IOC_BASE, 8,\ ++ struct rsz_cropsize) ++ ++/* Defines and Constants*/ ++ ++#define MAX_CHANNELS 16 ++#define MAX_IMAGE_WIDTH 2047 ++#define MAX_IMAGE_WIDTH_HIGH 2047 ++ ++#define ALIGNMENT 16 ++#define CHANNEL_BUSY 1 ++#define CHANNEL_FREE 0 ++#define PIXEL_EVEN 2 ++#define RATIO_MULTIPLIER 256 ++ ++/* Bit position Macro */ ++/* macro for bit set and clear */ ++#define BITSET(variable, bit) (variable) | (1 << bit) ++#define BITRESET(variable, bit) (variable) & ~(0x00000001 << (bit)) ++#define SET_BIT_INPUTRAM 28 ++#define SET_BIT_CBLIN 29 ++#define SET_BIT_INPTYP 27 ++#define SET_BIT_YCPOS 26 ++#define INPUT_RAM 1 ++#define UP_RSZ_RATIO 64 ++#define DOWN_RSZ_RATIO 512 ++#define UP_RSZ_RATIO1 513 ++#define DOWN_RSZ_RATIO1 1024 ++#define RSZ_IN_SIZE_VERT_SHIFT 16 ++#define MAX_HORZ_PIXEL_8BIT 31 ++#define MAX_HORZ_PIXEL_16BIT 15 ++#define NUM_PHASES 8 ++#define NUM_TAPS 4 ++#define NUM_D2PH 4 /* for downsampling ++ * 2+x ~ 4x, number of phases ++ */ ++#define NUM_D2TAPS 7 /* for downsampling ++ * 2+x ~ 4x,number of taps ++ */ ++#define ALIGN32 32 ++#define MAX_COEF_COUNTER 16 ++#define COEFF_ADDRESS_OFFSET 0x04 ++ ++#define RSZ_INTYPE_YCBCR422_16BIT 0 ++#define RSZ_INTYPE_PLANAR_8BIT 1 ++#define RSZ_PIX_FMT_UYVY 1 /* cb:y:cr:y */ ++#define RSZ_PIX_FMT_YUYV 0 /* y:cb:y:cr */ ++ ++enum config_done { ++ STATE_CONFIGURED, /* Resizer driver configured ++ * by application. ++ */ ++ STATE_NOT_CONFIGURED /* Resizer driver not ++ * configured by application. ++ */ ++}; ++ ++/* Structure Definitions */ ++ ++/* used to luma enhancement options */ ++ ++struct rsz_yenh { ++ int type; /* represents luma enable or ++ * disable. ++ */ ++ unsigned char gain; /* represents gain. */ ++ unsigned char slop; /* represents slop. */ ++ unsigned char core; /* Represents core value. */ ++}; ++ ++/* Conatins all the parameters for resizing. This structure ++ * is used to configure resiser parameters ++ */ ++struct rsz_params { ++ int in_hsize; /* input frame horizontal ++ * size. ++ */ ++ int in_vsize; /* input frame vertical size */ ++ int in_pitch; /* offset between two rows of ++ * input frame. ++ */ ++ int inptyp; /* for determining 16 bit or ++ * 8 bit data. ++ */ ++ int vert_starting_pixel; /* for specifying vertical ++ * starting pixel in input. ++ */ ++ int horz_starting_pixel; /* for specyfing horizontal ++ * starting pixel in input. ++ */ ++ int cbilin; /* # defined, filter with luma ++ * or bi-linear interpolation. ++ */ ++ int pix_fmt; /* # defined, UYVY or YUYV */ ++ int out_hsize; /* output frame horizontal ++ * size. ++ */ ++ int out_vsize; /* output frame vertical ++ * size. ++ */ ++ int out_pitch; /* offset between two rows of ++ * output frame. ++ */ ++ int hstph; /* for specifying horizontal ++ * starting phase. ++ */ ++ int vstph; /* for specifying vertical ++ * starting phase. ++ */ ++ u16 tap4filt_coeffs[32]; /* horizontal filter ++ * coefficients. ++ */ ++ u16 tap7filt_coeffs[32]; /* vertical filter ++ * coefficients. ++ */ ++ struct rsz_yenh yenh_params; ++}; ++ ++struct rsz_mult { ++ int in_hsize; /* input frame horizontal ++ * size. ++ */ ++ int in_vsize; /* input frame vertical size. ++ */ ++ int out_hsize; /* output frame horizontal ++ * size. ++ */ ++ int out_vsize; /* output frame vertical ++ * size. ++ */ ++ int in_pitch; /* offset between two rows of ++ * input frame. ++ */ ++ int out_pitch; /* offset between two rows of ++ * output frame. ++ */ ++ int end_hsize; ++ int end_vsize; ++ int num_htap; /* 0 = 7tap; 1 = 4tap */ ++ int num_vtap; /* 0 = 7tap; 1 = 4tap */ ++ int active; ++ int inptyp; ++ int vrsz; ++ int hrsz; ++ int hstph; /* for specifying horizontal ++ * starting phase. ++ */ ++ int vstph; ++ int pix_fmt; /* # defined, UYVY or YUYV. */ ++ int cbilin; /* # defined, filter with luma ++ * or bi-linear. ++ */ ++ u16 tap4filt_coeffs[32]; /* horizontal filter ++ * coefficients. ++ */ ++ u16 tap7filt_coeffs[32]; /* vertical filter ++ * coefficients. ++ */ ++}; ++ ++/* Contains the status of hardware and channel */ ++struct rsz_status { ++ int chan_busy; /* 1: channel is busy, ++ * 0: channel is not busy ++ */ ++ int hw_busy; /* 1: hardware is busy, ++ * 0: hardware is not busy ++ */ ++ int src; /* # defined, can be either ++ * SD-RAM or CCDC/PREVIEWER ++ */ ++}; ++ ++/* Passed by application for getting crop size */ ++struct rsz_cropsize { ++ unsigned int hcrop; /* Number of pixels per line ++ * cropped in output image. ++ */ ++ ++ unsigned int vcrop; /* Number of lines cropped ++ * in output image. ++ */ ++}; ++ ++/* Register mapped structure which contains the every register ++ information */ ++struct resizer_config { ++ u32 rsz_pcr; /* pcr register mapping ++ * variable. ++ */ ++ u32 rsz_in_start; /* in_start register mapping ++ * variable. ++ */ ++ u32 rsz_in_size; /* in_size register mapping ++ * variable. ++ */ ++ u32 rsz_out_size; /* out_size register mapping ++ * variable. ++ */ ++ u32 rsz_cnt; /* rsz_cnt register mapping ++ * variable. ++ */ ++ u32 rsz_sdr_inadd; /* sdr_inadd register mapping ++ * variable. ++ */ ++ u32 rsz_sdr_inoff; /* sdr_inoff register mapping ++ * variable. ++ */ ++ u32 rsz_sdr_outadd; /* sdr_outadd register mapping ++ * variable. ++ */ ++ u32 rsz_sdr_outoff; /* sdr_outbuff register ++ * mapping variable. ++ */ ++ u32 rsz_coeff_horz[16]; /* horizontal coefficients ++ * mapping array. ++ */ ++ u32 rsz_coeff_vert[16]; /* vertical coefficients ++ * mapping array. ++ */ ++ u32 rsz_yehn; /* yehn(luma)register mapping ++ * variable. ++ */ ++}; ++ ++/* Channel specific structure contains information regarding ++ the every channel */ ++struct channel_config { ++ struct resizer_config register_config; /* Instance of register set ++ * mapping structure ++ */ ++ int status; /* Specifies whether the ++ * channel is busy or not ++ */ ++ struct mutex chanprotection_mutex; /* Pointer to channel ++ * specific protection ++ */ ++ enum config_done config_state; ++ u8 input_buf_index, output_buf_index; ++ ++}; ++ ++/* Global structure which contains information about number of channels ++ and protection variables */ ++struct device_params { ++ ++ struct mutex reszwrap_mutex; /* Semaphore for array */ ++ struct completion compl_isr; /* Completion for interrupt */ ++ struct videobuf_queue_ops vbq_ops; /* videobuf queue operations */ ++}; ++ ++/* per-filehandle data structure */ ++struct rsz_fh { ++ struct rsz_params *params; ++ struct channel_config *config; /* Pointer to channel ++ * configuration. ++ */ ++ enum v4l2_buf_type type; ++ struct videobuf_queue vbq; ++ struct device_params *device; ++ dma_addr_t isp_addr_read; /* Input/Output address */ ++ dma_addr_t isp_addr_write; /* Input/Output address */ ++ struct rsz_mult *multipass; /* Multipass to support ++ * resizing ration outside ++ * of 0.25x to 4x ++ */ ++ spinlock_t vbq_lock; /* spinlock for videobuf ++ * queues. ++ */ ++ u32 rsz_bufsize; /* channel specific buffersize ++ */ ++}; ++ ++/* functions definition */ ++void rsz_hardware_setup(struct channel_config *rsz_conf_chan); ++int rsz_set_params(struct rsz_mult *multipass, struct rsz_params *, struct channel_config *); ++int rsz_get_params(struct rsz_params *, struct channel_config *); ++void rsz_copy_data(struct rsz_mult *multipass, struct rsz_params *params); ++void rsz_isr(unsigned long status, isp_vbq_callback_ptr arg1, void *arg2); ++void rsz_calculate_crop(struct channel_config *rsz_conf_chan, ++ struct rsz_cropsize *cropsize); ++int rsz_set_multipass(struct rsz_mult *multipass, struct channel_config *rsz_conf_chan); ++int rsz_set_ratio(struct rsz_mult *multipass, struct channel_config *rsz_conf_chan); ++void rsz_config_ratio(struct rsz_mult *multipass, struct channel_config *rsz_conf_chan); ++ ++#endif +Index: git/drivers/media/video/isp/redgamma_table.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ git/drivers/media/video/isp/redgamma_table.h 2009-02-12 10:29:26.000000000 -0600 +@@ -0,0 +1,1040 @@ ++/* ++ * drivers/media/video/isp/redgamma_table.h ++ * ++ * Gamma Table values for Red for TI's OMAP3430 Camera ISP ++ * ++ * Copyright (C) 2008 Texas Instruments, Inc. ++ * ++ * This package is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ * ++ * THIS PACKAGE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR ++ * IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED ++ * WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE. ++ */ ++ ++0, ++0, ++1, ++2, ++3, ++3, ++4, ++5, ++6, ++8, ++10, ++12, ++14, ++16, ++18, ++20, ++22, ++23, ++25, ++26, ++28, ++29, ++31, ++32, ++34, ++35, ++36, ++37, ++39, ++40, ++41, ++42, ++43, ++44, ++45, ++46, ++47, ++48, ++49, ++50, ++51, ++52, ++52, ++53, ++54, ++55, ++56, ++57, ++58, ++59, ++60, ++61, ++62, ++63, ++63, ++64, ++65, ++66, ++66, ++67, ++68, ++69, ++69, ++70, ++71, ++72, ++72, ++73, ++74, ++75, ++75, ++76, ++77, ++78, ++78, ++79, ++80, ++81, ++81, ++82, ++83, ++84, ++84, ++85, ++86, ++87, ++88, ++88, ++89, ++90, ++91, ++91, ++92, ++93, ++94, ++94, ++95, ++96, ++97, ++97, ++98, ++98, ++99, ++99, ++100, ++100, ++101, ++101, ++102, ++103, ++104, ++104, ++105, ++106, ++107, ++108, ++108, ++109, ++110, ++111, ++111, ++112, ++113, ++114, ++114, ++115, ++116, ++117, ++117, ++118, ++119, ++119, ++120, ++120, ++121, ++121, ++122, ++122, ++123, ++123, ++124, ++124, ++125, ++125, ++126, ++126, ++127, ++127, ++128, ++128, ++129, ++129, ++130, ++130, ++131, ++131, ++132, ++132, ++133, ++133, ++134, ++134, ++135, ++135, ++136, ++136, ++137, ++137, ++138, ++138, ++139, ++139, ++140, ++140, ++141, ++141, ++142, ++142, ++143, ++143, ++144, ++144, ++145, ++145, ++146, ++146, ++147, ++147, ++148, ++148, ++149, ++149, ++150, ++150, ++151, ++151, ++152, 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10:31:16.000000000 -0600 +@@ -0,0 +1,136 @@ ++/* ++ * drivers/media/video/isp/omap_resizer.h ++ * ++ * Include file for Resizer module wrapper in TI's OMAP3430 ISP ++ * ++ * Copyright (C) 2008 Texas Instruments, Inc. ++ * ++ * This package is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ * ++ * THIS PACKAGE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR ++ * IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED ++ * WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE. ++ */ ++ ++#ifndef OMAP_RESIZER_H ++#define OMAP_RESIZER_H ++ ++#include <linux/types.h> ++ ++/* ioctls definition */ ++#define RSZ_IOC_BASE 'R' ++#define RSZ_IOC_MAXNR 9 ++ ++/*Ioctl options which are to be passed while calling the ioctl*/ ++#define RSZ_REQBUF _IOWR(RSZ_IOC_BASE, 1,\ ++ struct v4l2_requestbuffers) ++#define RSZ_QUERYBUF _IOWR(RSZ_IOC_BASE, 2, struct v4l2_buffer) ++#define RSZ_S_PARAM _IOWR(RSZ_IOC_BASE, 3, struct rsz_params) ++#define RSZ_G_PARAM _IOWR(RSZ_IOC_BASE, 4, struct rsz_params) ++#define RSZ_RESIZE _IOWR(RSZ_IOC_BASE, 5, __s32) ++#define RSZ_G_STATUS _IOWR(RSZ_IOC_BASE, 6, struct rsz_status) ++#define RSZ_QUEUEBUF _IOWR(RSZ_IOC_BASE, 7, struct v4l2_buffer) ++#define RSZ_GET_CROPSIZE _IOWR(RSZ_IOC_BASE, 8, struct rsz_cropsize) ++#define RSZ_S_EXP _IOWR(RSZ_IOC_BASE, 9, __s32) ++#define RSZ_INTYPE_YCBCR422_16BIT 0 ++#define RSZ_INTYPE_PLANAR_8BIT 1 ++#define RSZ_PIX_FMT_UYVY 1 /* cb:y:cr:y */ ++#define RSZ_PIX_FMT_YUYV 0 /* y:cb:y:cr */ ++ ++enum config_done { ++ STATE_CONFIGURED, /* Resizer driver configured ++ * by application. ++ */ ++ STATE_NOT_CONFIGURED /* Resizer driver not ++ * configured by application. ++ */ ++}; ++ ++/* Structure Definitions */ ++ ++/* used to luma enhancement options */ ++ ++struct rsz_yenh { ++ __s32 type; /* represents luma enable or ++ * disable. ++ */ ++ __u8 gain; /* represents gain. */ ++ __u8 slop; /* represents slop. */ ++ __u8 core; /* Represents core value. */ ++}; ++ ++/* Conatins all the parameters for resizing. This structure ++ * is used to configure resiser parameters ++ */ ++struct rsz_params { ++ __s32 in_hsize; /* input frame horizontal ++ * size. ++ */ ++ __s32 in_vsize; /* input frame vertical size */ ++ __s32 in_pitch; /* offset between two rows of ++ * input frame. ++ */ ++ __s32 inptyp; /* for determining 16 bit or ++ * 8 bit data. ++ */ ++ __s32 vert_starting_pixel; /* for specifying vertical ++ * starting pixel in input. ++ */ ++ __s32 horz_starting_pixel; /* for specyfing horizontal ++ * starting pixel in input. ++ */ ++ __s32 cbilin; /* # defined, filter with luma ++ * or bi-linear interpolation. ++ */ ++ __s32 pix_fmt; /* # defined, UYVY or YUYV */ ++ __s32 out_hsize; /* output frame horizontal ++ * size. ++ */ ++ __s32 out_vsize; /* output frame vertical ++ * size. ++ */ ++ __s32 out_pitch; /* offset between two rows of ++ * output frame. ++ */ ++ __s32 hstph; /* for specifying horizontal ++ * starting phase. ++ */ ++ __s32 vstph; /* for specifying vertical ++ * starting phase. ++ */ ++ __u16 tap4filt_coeffs[32]; /* horizontal filter ++ * coefficients. ++ */ ++ __u16 tap7filt_coeffs[32]; /* vertical filter ++ * coefficients. ++ */ ++ struct rsz_yenh yenh_params; ++}; ++ ++/* Contains the status of hardware and channel */ ++struct rsz_status { ++ __s32 chan_busy; /* 1: channel is busy, ++ * 0: channel is not busy ++ */ ++ __s32 hw_busy; /* 1: hardware is busy, ++ * 0: hardware is not busy ++ */ ++ __s32 src; /* # defined, can be either ++ * SD-RAM or CCDC/PREVIEWER ++ */ ++}; ++ ++/* Passed by application for getting crop size */ ++struct rsz_cropsize { ++ __u32 hcrop; /* Number of pixels per line ++ * cropped in output image. ++ */ ++ ++ __u32 vcrop; /* Number of lines cropped ++ * in output image. ++ */ ++}; ++ ++#endif +Index: git/drivers/media/video/Kconfig +=================================================================== +--- git.orig/drivers/media/video/Kconfig 2009-02-12 10:24:15.000000000 -0600 ++++ git/drivers/media/video/Kconfig 2009-02-12 10:34:27.000000000 -0600 +@@ -370,6 +370,8 @@ + To compile this driver as a module, choose M here: the + module will be called tvp5150. + ++source "drivers/media/video/isp/Kconfig" ++ + config VIDEO_VPX3220 + tristate "vpx3220a, vpx3216b & vpx3214c video decoders" + depends on VIDEO_V4L1 && I2C +Index: git/drivers/media/video/isp/Kconfig +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ git/drivers/media/video/isp/Kconfig 2009-02-12 14:53:17.000000000 -0600 +@@ -0,0 +1,13 @@ ++config VIDEO_OMAP34XX_ISP ++ tristate "omap isp driver" ++ depends on ARCH_OMAP34XX ++ select VIDEOBUF_DMA_SG ++ ++config VIDEO_OMAP34XX_ISP_PREVIEWER ++ tristate "omap isp previewer" ++ depends on VIDEO_OMAP34XX_ISP && !ARCH_OMAP3410 ++ ++config VIDEO_OMAP34XX_ISP_RESIZER ++ tristate "omap isp resizer" ++ depends on VIDEO_OMAP34XX_ISP && !ARCH_OMAP3410 ++ +Index: git/drivers/media/video/Makefile +=================================================================== +--- git.orig/drivers/media/video/Makefile 2009-02-12 11:02:15.000000000 -0600 ++++ git/drivers/media/video/Makefile 2009-02-12 11:03:13.000000000 -0600 +@@ -18,6 +18,8 @@ + obj-$(CONFIG_VIDEO_DEV) += v4l1-compat.o + endif + ++obj-y += isp/ ++ + obj-$(CONFIG_VIDEO_TUNER) += tuner.o + + obj-$(CONFIG_VIDEO_BT848) += bt8xx/ +Index: git/drivers/media/video/isp/Makefile +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ git/drivers/media/video/isp/Makefile 2009-02-12 11:13:53.000000000 -0600 +@@ -0,0 +1,9 @@ ++# Makefile for OMAP3 ISP driver ++ ++obj-$(CONFIG_VIDEO_OMAP34XX_ISP) += isp.o ispccdc.o ispmmu.o ++ ++obj-$(CONFIG_VIDEO_OMAP34XX_ISP_PREVIEWER) += isppreview.o isph3a.o isphist.o \ ++ omap_previewer.o isp_af.o ++ ++obj-$(CONFIG_VIDEO_OMAP34XX_ISP_RESIZER) += ispresizer.o omap_resizer.o ++ +Index: git/drivers/media/video/isp/ispccd_lsc.dat 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0x40, 0x68, 0x68, 0x40, 0x40, 0x68, 0x68, 0x40, 0x40, 0x68, 0x68, 0x40, 0x40, 0x68, 0x68, 0x40, 0x40, 0x68, 0x68, 0x40, 0x40, 0x68, 0x68, 0x40, 0x40, 0x68, 0x68, 0x40, 0x40, 0x68, 0x68, 0x40, 0x40, 0x68, 0x68, 0x40, 0x40, 0x68, 0x68, 0x40, 0x40, 0x68, 0x68, 0x40, 0x40, 0x68, 0x68, 0x40, 0x40, 0x68, 0x68, 0x40, 0x40, 0x68, 0x68 +Index: git/include/media/videobuf-dma-sg.h +=================================================================== +--- git.orig/include/media/videobuf-dma-sg.h 2009-02-12 12:03:38.000000000 -0600 ++++ git/include/media/videobuf-dma-sg.h 2009-02-12 14:02:41.000000000 -0600 +@@ -68,6 +68,9 @@ + /* for kernel buffers */ + void *vmalloc; + ++ /* Stores the userspace pointer to vmalloc area */ ++ void *varea; ++ + /* for overlay buffers (pci-pci dma) */ + dma_addr_t bus_addr; + diff --git a/packages/linux/linux-omap-2.6.28/overo/defconfig b/packages/linux/linux-omap-2.6.28/overo/defconfig index c92e425140..0a8821e97c 100644 --- a/packages/linux/linux-omap-2.6.28/overo/defconfig +++ b/packages/linux/linux-omap-2.6.28/overo/defconfig @@ -1,7 +1,7 @@ # # Automatically generated make config: don't edit # Linux kernel version: 2.6.28-omap1 -# Wed Feb 4 12:40:38 2009 +# Mon Feb 16 13:35:13 2009 # CONFIG_ARM=y CONFIG_SYS_SUPPORTS_APM_EMULATION=y @@ -588,7 +588,7 @@ CONFIG_MTD_NAND=y # CONFIG_MTD_NAND_ECC_SMC is not set # CONFIG_MTD_NAND_MUSEUM_IDS is not set # CONFIG_MTD_NAND_GPIO is not set -# CONFIG_MTD_NAND_OMAP2 is not set +CONFIG_MTD_NAND_OMAP2=y CONFIG_MTD_NAND_IDS=y # CONFIG_MTD_NAND_DISKONCHIP is not set # CONFIG_MTD_NAND_NANDSIM is not set @@ -599,7 +599,15 @@ CONFIG_MTD_NAND_IDS=y # # UBI - Unsorted block images # -# CONFIG_MTD_UBI is not set +CONFIG_MTD_UBI=y +CONFIG_MTD_UBI_WL_THRESHOLD=4096 +CONFIG_MTD_UBI_BEB_RESERVE=1 +# CONFIG_MTD_UBI_GLUEBI is not set + +# +# UBI debugging options +# +# CONFIG_MTD_UBI_DEBUG is not set # CONFIG_PARPORT is not set CONFIG_BLK_DEV=y # CONFIG_BLK_DEV_COW_COMMON is not set @@ -616,6 +624,7 @@ CONFIG_CDROM_PKTCDVD_BUFFERS=8 # CONFIG_CDROM_PKTCDVD_WCACHE is not set # CONFIG_ATA_OVER_ETH is not set # CONFIG_MISC_DEVICES is not set +CONFIG_EEPROM_93CX6=y CONFIG_HAVE_IDE=y # CONFIG_IDE is not set @@ -696,8 +705,36 @@ CONFIG_NETDEV_10000=y # Wireless LAN # # CONFIG_WLAN_PRE80211 is not set -# CONFIG_WLAN_80211 is not set +CONFIG_WLAN_80211=y +CONFIG_LIBERTAS=m +CONFIG_LIBERTAS_USB=m +CONFIG_LIBERTAS_SDIO=m +# CONFIG_LIBERTAS_DEBUG is not set +CONFIG_LIBERTAS_THINFIRM=m +CONFIG_LIBERTAS_THINFIRM_USB=m +CONFIG_USB_ZD1201=m +CONFIG_USB_NET_RNDIS_WLAN=m +CONFIG_RTL8187=y +# CONFIG_MAC80211_HWSIM is not set +CONFIG_P54_COMMON=m +CONFIG_P54_USB=m # CONFIG_IWLWIFI_LEDS is not set +CONFIG_HOSTAP=m +CONFIG_HOSTAP_FIRMWARE=y +# CONFIG_HOSTAP_FIRMWARE_NVRAM is not set +# CONFIG_B43 is not set +# CONFIG_B43LEGACY is not set +CONFIG_ZD1211RW=m +# CONFIG_ZD1211RW_DEBUG is not set +CONFIG_RT2X00=m +CONFIG_RT2500USB=m +CONFIG_RT73USB=m +CONFIG_RT2X00_LIB_USB=m +CONFIG_RT2X00_LIB=m +CONFIG_RT2X00_LIB_FIRMWARE=y +CONFIG_RT2X00_LIB_CRYPTO=y +CONFIG_RT2X00_LIB_LEDS=y +# CONFIG_RT2X00_DEBUG is not set # # USB Network Adapters @@ -1243,8 +1280,42 @@ CONFIG_FONT_8x16=y # CONFIG_FONT_10x18 is not set # CONFIG_LOGO is not set CONFIG_SOUND=y -# CONFIG_SOUND_OSS_CORE is not set -# CONFIG_SND is not set +CONFIG_SOUND_OSS_CORE=y +CONFIG_SND=y +CONFIG_SND_TIMER=y +CONFIG_SND_PCM=y +CONFIG_SND_HWDEP=m +CONFIG_SND_RAWMIDI=m +CONFIG_SND_SEQUENCER=m +# CONFIG_SND_SEQ_DUMMY is not set +CONFIG_SND_OSSEMUL=y +CONFIG_SND_MIXER_OSS=m +CONFIG_SND_PCM_OSS=m +CONFIG_SND_PCM_OSS_PLUGINS=y +# CONFIG_SND_SEQUENCER_OSS is not set +# CONFIG_SND_DYNAMIC_MINORS is not set +CONFIG_SND_SUPPORT_OLD_API=y +CONFIG_SND_VERBOSE_PROCFS=y +# CONFIG_SND_VERBOSE_PRINTK is not set +# CONFIG_SND_DEBUG is not set +CONFIG_SND_DRIVERS=y +# CONFIG_SND_DUMMY is not set +# CONFIG_SND_VIRMIDI is not set +# CONFIG_SND_MTPAV is not set +# CONFIG_SND_SERIAL_U16550 is not set +# CONFIG_SND_MPU401 is not set +# CONFIG_SND_ARM is not set +# CONFIG_SND_SPI is not set +CONFIG_SND_USB=y +CONFIG_SND_USB_AUDIO=m +CONFIG_SND_USB_CAIAQ=m +CONFIG_SND_USB_CAIAQ_INPUT=y +CONFIG_SND_SOC=y +CONFIG_SND_OMAP_SOC=y +CONFIG_SND_OMAP_SOC_MCBSP=y +CONFIG_SND_OMAP_SOC_OVERO=y +# CONFIG_SND_SOC_ALL_CODECS is not set +CONFIG_SND_SOC_TWL4030=y # CONFIG_SOUND_PRIME is not set CONFIG_HID_SUPPORT=y CONFIG_HID=y @@ -1601,14 +1672,25 @@ CONFIG_EXT2_FS=y # CONFIG_EXT2_FS_XIP is not set CONFIG_EXT3_FS=y # CONFIG_EXT3_FS_XATTR is not set -# CONFIG_EXT4_FS is not set +CONFIG_EXT4_FS=m +# CONFIG_EXT4DEV_COMPAT is not set +CONFIG_EXT4_FS_XATTR=y +# CONFIG_EXT4_FS_POSIX_ACL is not set +# CONFIG_EXT4_FS_SECURITY is not set CONFIG_JBD=y # CONFIG_JBD_DEBUG is not set +CONFIG_JBD2=m +# CONFIG_JBD2_DEBUG is not set +CONFIG_FS_MBCACHE=m # CONFIG_REISERFS_FS is not set # CONFIG_JFS_FS is not set CONFIG_FS_POSIX_ACL=y CONFIG_FILE_LOCKING=y -# CONFIG_XFS_FS is not set +CONFIG_XFS_FS=m +# CONFIG_XFS_QUOTA is not set +# CONFIG_XFS_POSIX_ACL is not set +# CONFIG_XFS_RT is not set +# CONFIG_XFS_DEBUG is not set # CONFIG_OCFS2_FS is not set CONFIG_DNOTIFY=y CONFIG_INOTIFY=y @@ -1681,6 +1763,12 @@ CONFIG_JFFS2_RUBIN=y CONFIG_JFFS2_CMODE_PRIORITY=y # CONFIG_JFFS2_CMODE_SIZE is not set # CONFIG_JFFS2_CMODE_FAVOURLZO is not set +CONFIG_UBIFS_FS=y +CONFIG_UBIFS_FS_XATTR=y +CONFIG_UBIFS_FS_ADVANCED_COMPR=y +CONFIG_UBIFS_FS_LZO=y +CONFIG_UBIFS_FS_ZLIB=y +# CONFIG_UBIFS_FS_DEBUG is not set # CONFIG_CRAMFS is not set # CONFIG_VXFS_FS is not set # CONFIG_MINIX_FS is not set @@ -1937,8 +2025,8 @@ CONFIG_CRYPTO_TWOFISH_COMMON=m # # Compression # -CONFIG_CRYPTO_DEFLATE=m -# CONFIG_CRYPTO_LZO is not set +CONFIG_CRYPTO_DEFLATE=y +CONFIG_CRYPTO_LZO=y # # Random Number Generation @@ -1951,7 +2039,7 @@ CONFIG_CRYPTO_HW=y # CONFIG_BITREVERSE=y CONFIG_CRC_CCITT=y -CONFIG_CRC16=m +CONFIG_CRC16=y CONFIG_CRC_T10DIF=y CONFIG_CRC_ITU_T=y CONFIG_CRC32=y diff --git a/packages/linux/linux-omap-2.6.28/overo/overo-ehci.patch b/packages/linux/linux-omap-2.6.28/overo/overo-ehci.patch new file mode 100644 index 0000000000..ff81d98095 --- /dev/null +++ b/packages/linux/linux-omap-2.6.28/overo/overo-ehci.patch @@ -0,0 +1,113 @@ +diff --git a/arch/arm/mach-omap2/usb-ehci.c b/arch/arm/mach-omap2/usb-ehci.c +index 489439d..2c6305b 100644 +--- a/arch/arm/mach-omap2/usb-ehci.c ++++ b/arch/arm/mach-omap2/usb-ehci.c +@@ -152,9 +152,7 @@ static void setup_ehci_io_mux(void) + void __init usb_ehci_init(void) + { + #if defined(CONFIG_USB_EHCI_HCD) || defined(CONFIG_USB_EHCI_HCD_MODULE) +- /* Setup Pin IO MUX for EHCI */ +- if (cpu_is_omap34xx()) +- setup_ehci_io_mux(); ++ /* TODO: Setup Pin IO MUX for EHCI - moved this temporarily to U-boot */ + + if (platform_device_register(&ehci_device) < 0) { + printk(KERN_ERR "Unable to register HS-USB (EHCI) device\n"); + +diff --git a/drivers/usb/host/ehci-omap.c b/drivers/usb/host/ehci-omap.c +index 1b3266c..8472996 100644 +--- a/drivers/usb/host/ehci-omap.c ++++ b/drivers/usb/host/ehci-omap.c +@@ -48,16 +48,26 @@ + * to get the PHY state machine in working state + */ + #define EXTERNAL_PHY_RESET ++#ifdef CONFIG_MACH_OVERO ++#define EXT_PHY_RESET_GPIO_PORT2 (183) ++#else + #define EXT_PHY_RESET_GPIO_PORT1 (57) + #define EXT_PHY_RESET_GPIO_PORT2 (61) ++#endif + #define EXT_PHY_RESET_DELAY (10) + ++#define PHY_STP_PULLUP_ENABLE (0x10) ++#define PHY_STP_PULLUP_DISABLE (0x90) ++ ++ + /* ISSUE2: + * USBHOST supports External charge pump PHYs only + * Use the VBUS from Port1 to power VBUS of Port2 externally + * So use Port2 as the working ULPI port + */ ++#ifndef CONFIG_MACH_OVERO + #define VBUS_INTERNAL_CHARGEPUMP_HACK ++#endif + + #endif /* CONFIG_OMAP_EHCI_PHY_MODE */ + +@@ -225,14 +235,43 @@ static int omap_start_ehc(struct platform_device *dev, struct usb_hcd *hcd) + + #ifdef EXTERNAL_PHY_RESET + /* Refer: ISSUE1 */ ++#ifndef CONFIG_MACH_OVERO + gpio_request(EXT_PHY_RESET_GPIO_PORT1, "USB1 PHY reset"); + gpio_direction_output(EXT_PHY_RESET_GPIO_PORT1, 0); ++#endif + gpio_request(EXT_PHY_RESET_GPIO_PORT2, "USB2 PHY reset"); + gpio_direction_output(EXT_PHY_RESET_GPIO_PORT2, 0); ++ gpio_set_value(EXT_PHY_RESET_GPIO_PORT2, 0); + /* Hold the PHY in RESET for enough time till DIR is high */ + udelay(EXT_PHY_RESET_DELAY); + #endif + ++ /* ++ * The PHY register 0x7 - Interface Control register is ++ * configured to disable the integrated STP pull-up resistor ++ * used for interface protection. ++ * ++ * May not need to be here. ++ */ ++ omap_writel((0x7 << EHCI_INSNREG05_ULPI_REGADD_SHIFT) |/* interface reg */ ++ (2 << EHCI_INSNREG05_ULPI_OPSEL_SHIFT) |/* Write */ ++ (1 << EHCI_INSNREG05_ULPI_PORTSEL_SHIFT) |/* Port1 */ ++ (1 << EHCI_INSNREG05_ULPI_CONTROL_SHIFT) |/* Start */ ++ (PHY_STP_PULLUP_DISABLE), ++ EHCI_INSNREG05_ULPI); ++ ++ while (!(omap_readl(EHCI_INSNREG05_ULPI) & (1<<EHCI_INSNREG05_ULPI_CONTROL_SHIFT))); ++ ++ /* Force PHY to HS */ ++ omap_writel((0x4 << EHCI_INSNREG05_ULPI_REGADD_SHIFT) |/* function ctrl */ ++ (2 << EHCI_INSNREG05_ULPI_OPSEL_SHIFT) |/* Write */ ++ (1 << EHCI_INSNREG05_ULPI_PORTSEL_SHIFT) |/* Port1 */ ++ (1 << EHCI_INSNREG05_ULPI_CONTROL_SHIFT) |/* Start */ ++ (0x40), ++ EHCI_INSNREG05_ULPI); ++ ++ while (!(omap_readl(EHCI_INSNREG05_ULPI) & (1<<EHCI_INSNREG05_ULPI_CONTROL_SHIFT))); ++ + /* Configure TLL for 60Mhz clk for ULPI */ + ehci_clocks->usbtll_fck_clk = clk_get(&dev->dev, USBHOST_TLL_FCLK); + if (IS_ERR(ehci_clocks->usbtll_fck_clk)) +@@ -307,7 +346,9 @@ static int omap_start_ehc(struct platform_device *dev, struct usb_hcd *hcd) + * Hold the PHY in RESET for enough time till PHY is settled and ready + */ + udelay(EXT_PHY_RESET_DELAY); ++#ifndef CONFIG_MACH_OVERO + gpio_set_value(EXT_PHY_RESET_GPIO_PORT1, 1); ++#endif + gpio_set_value(EXT_PHY_RESET_GPIO_PORT2, 1); + #endif + +@@ -393,7 +434,9 @@ static void omap_stop_ehc(struct platform_device *dev, struct usb_hcd *hcd) + + + #ifdef EXTERNAL_PHY_RESET ++#ifndef CONFIG_MACH_OVERO + gpio_free(EXT_PHY_RESET_GPIO_PORT1); ++#endif + gpio_free(EXT_PHY_RESET_GPIO_PORT2); + #endif + +-- +1.6.0.4.790.gaa14a diff --git a/packages/linux/linux-omap_2.6.28.bb b/packages/linux/linux-omap_2.6.28.bb index 21eb2cf6fb..ff1c5d2521 100644 --- a/packages/linux/linux-omap_2.6.28.bb +++ b/packages/linux/linux-omap_2.6.28.bb @@ -7,11 +7,12 @@ COMPATIBLE_MACHINE = "omap5912osk|omap1710h3|omap2430sdp|omap2420h4|beagleboard| DEFAULT_PREFERENCE = "-1" DEFAULT_PREFERENCE_beagleboard = "1" +DEFAULT_PREFERENCE_overo = "1" SRCREV = "79d042a081d3e467c735bb0d9569ed6296f85a3c" PV = "2.6.28" -PR = "r12" +PR = "r13" SRC_URI = "git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap-2.6.git;branch=omap-2.6.28;protocol=git \ file://defconfig" @@ -47,18 +48,23 @@ SRC_URI_append = " \ file://0013-DSS-OMAPFB-remove-extra-spaces.patch;patch=1 \ file://0014-DSS-fix-clk_get_usecount.patch;patch=1 \ file://0001-ASoC-Add-support-for-OMAP3-EVM.patch;patch=1 \ - file://0001-This-merges-Steve-Kipisz-USB-EHCI-support.-He-star.patch;patch=1 \ file://0001-board-omap3beagle-set-i2c-3-to-100kHz.patch;patch=1 \ + file://add-resizer-driver.patch;patch=1 \ " SRC_URI_append_beagleboard = " file://logo_linux_clut224.ppm \ + file://0001-This-merges-Steve-Kipisz-USB-EHCI-support.-He-star.patch;patch=1 \ " SRC_URI_append_omap3evm = " \ file://evm-mcspi-ts.diff;patch=1 \ " +SRC_URI_append_overo = " \ + file://overo-ehci.patch;patch=1 \ +" + S = "${WORKDIR}/git" diff --git a/packages/linux/linux-orion/defconfig b/packages/linux/linux-orion/defconfig index e2ce06256e..84ddcf0e7e 100644 --- a/packages/linux/linux-orion/defconfig +++ b/packages/linux/linux-orion/defconfig @@ -1,7 +1,7 @@ # # Automatically generated make config: don't edit -# Linux kernel version: 2.6.27.10 -# Fri Jan 23 22:58:28 2009 +# Linux kernel version: 2.6.28.4 +# Tue Feb 10 18:45:26 2009 # CONFIG_ARM=y CONFIG_SYS_SUPPORTS_APM_EMULATION=y @@ -22,8 +22,6 @@ CONFIG_RWSEM_GENERIC_SPINLOCK=y # CONFIG_ARCH_HAS_ILOG2_U64 is not set CONFIG_GENERIC_HWEIGHT=y CONFIG_GENERIC_CALIBRATE_DELAY=y -CONFIG_ARCH_SUPPORTS_AOUT=y -CONFIG_ZONE_DMA=y CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y CONFIG_VECTORS_BASE=0xffff0000 CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" @@ -78,7 +76,9 @@ CONFIG_SIGNALFD=y CONFIG_TIMERFD=y CONFIG_EVENTFD=y CONFIG_SHMEM=y +CONFIG_AIO=y CONFIG_VM_EVENT_COUNTERS=y +CONFIG_PCI_QUIRKS=y CONFIG_SLAB=y # CONFIG_SLUB is not set # CONFIG_SLOB is not set @@ -86,15 +86,8 @@ CONFIG_SLAB=y # CONFIG_MARKERS is not set CONFIG_HAVE_OPROFILE=y # CONFIG_KPROBES is not set -# CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS is not set -# CONFIG_HAVE_IOREMAP_PROT is not set CONFIG_HAVE_KPROBES=y CONFIG_HAVE_KRETPROBES=y -# CONFIG_HAVE_ARCH_TRACEHOOK is not set -# CONFIG_HAVE_DMA_ATTRS is not set -# CONFIG_USE_GENERIC_SMP_HELPERS is not set -# CONFIG_HAVE_CLK is not set -CONFIG_PROC_PAGE_MONITOR=y CONFIG_HAVE_GENERIC_DMA_COHERENT=y CONFIG_SLABINFO=y CONFIG_RT_MUTEXES=y @@ -127,6 +120,7 @@ CONFIG_DEFAULT_CFQ=y # CONFIG_DEFAULT_NOOP is not set CONFIG_DEFAULT_IOSCHED="cfq" CONFIG_CLASSIC_RCU=y +# CONFIG_FREEZER is not set # # System Type @@ -167,7 +161,7 @@ CONFIG_ARCH_ORION5X=y # CONFIG_ARCH_LH7A40X is not set # CONFIG_ARCH_DAVINCI is not set # CONFIG_ARCH_OMAP is not set -# CONFIG_ARCH_MSM7X00A is not set +# CONFIG_ARCH_MSM is not set # # Orion Implementations @@ -177,15 +171,19 @@ CONFIG_ARCH_ORION5X=y CONFIG_MACH_KUROBOX_PRO=y CONFIG_MACH_DNS323=y CONFIG_MACH_TS209=y +# CONFIG_MACH_TERASTATION_PRO2 is not set CONFIG_MACH_LINKSTATION_PRO=y +# CONFIG_MACH_LINKSTATION_MINI is not set CONFIG_MACH_TS409=y # CONFIG_MACH_WRT350N_V2 is not set # CONFIG_MACH_TS78XX is not set CONFIG_MACH_MV2120=y +# CONFIG_MACH_EDMINI_V2 is not set # CONFIG_MACH_MSS2 is not set # CONFIG_MACH_WNR854T is not set # CONFIG_MACH_RD88F5181L_GE is not set # CONFIG_MACH_RD88F5181L_FXO is not set +# CONFIG_MACH_RD88F6183AP_GE is not set # # Boot options @@ -235,26 +233,30 @@ CONFIG_TICK_ONESHOT=y CONFIG_NO_HZ=y CONFIG_HIGH_RES_TIMERS=y CONFIG_GENERIC_CLOCKEVENTS_BUILD=y +CONFIG_VMSPLIT_3G=y +# CONFIG_VMSPLIT_2G is not set +# CONFIG_VMSPLIT_1G is not set +CONFIG_PAGE_OFFSET=0xC0000000 CONFIG_PREEMPT=y CONFIG_HZ=100 CONFIG_AEABI=y # CONFIG_OABI_COMPAT is not set CONFIG_ARCH_FLATMEM_HAS_HOLES=y -# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set +# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set +# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set CONFIG_SELECT_MEMORY_MODEL=y CONFIG_FLATMEM_MANUAL=y # CONFIG_DISCONTIGMEM_MANUAL is not set # CONFIG_SPARSEMEM_MANUAL is not set CONFIG_FLATMEM=y CONFIG_FLAT_NODE_MEM_MAP=y -# CONFIG_SPARSEMEM_STATIC is not set -# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set CONFIG_PAGEFLAGS_EXTENDED=y CONFIG_SPLIT_PTLOCK_CPUS=4096 # CONFIG_RESOURCES_64BIT is not set -CONFIG_ZONE_DMA_FLAG=1 -CONFIG_BOUNCE=y +# CONFIG_PHYS_ADDR_T_64BIT is not set +CONFIG_ZONE_DMA_FLAG=0 CONFIG_VIRT_TO_BUS=y +CONFIG_UNEVICTABLE_LRU=y CONFIG_ALIGNMENT_TRAP=y # @@ -262,11 +264,16 @@ CONFIG_ALIGNMENT_TRAP=y # CONFIG_ZBOOT_ROM_TEXT=0x0 CONFIG_ZBOOT_ROM_BSS=0x0 -CONFIG_CMDLINE="" +CONFIG_CMDLINE=" debug " # CONFIG_XIP_KERNEL is not set # CONFIG_KEXEC is not set # +# CPU Power Management +# +# CONFIG_CPU_IDLE is not set + +# # Floating point emulation # @@ -279,6 +286,8 @@ CONFIG_VFP=y # Userspace binary formats # CONFIG_BINFMT_ELF=y +# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set +CONFIG_HAVE_AOUT=y # CONFIG_BINFMT_AOUT is not set # CONFIG_BINFMT_MISC is not set @@ -357,6 +366,7 @@ CONFIG_IPV6_TUNNEL=m # CONFIG_TIPC is not set # CONFIG_ATM is not set # CONFIG_BRIDGE is not set +# CONFIG_NET_DSA is not set # CONFIG_VLAN_8021Q is not set # CONFIG_DECNET is not set CONFIG_LLC=m @@ -443,12 +453,11 @@ CONFIG_BT_HCIBPA10X=m CONFIG_BT_HCIBFUSB=m CONFIG_BT_HCIVHCI=m # CONFIG_AF_RXRPC is not set - -# -# Wireless -# +# CONFIG_PHONET is not set +CONFIG_WIRELESS=y CONFIG_CFG80211=m CONFIG_NL80211=y +CONFIG_WIRELESS_OLD_REGULATORY=y CONFIG_WIRELESS_EXT=y CONFIG_WIRELESS_EXT_SYSFS=y CONFIG_MAC80211=m @@ -457,7 +466,9 @@ CONFIG_MAC80211=m # Rate control algorithm selection # CONFIG_MAC80211_RC_PID=y +# CONFIG_MAC80211_RC_MINSTREL is not set CONFIG_MAC80211_RC_DEFAULT_PID=y +# CONFIG_MAC80211_RC_DEFAULT_MINSTREL is not set CONFIG_MAC80211_RC_DEFAULT="pid" # CONFIG_MAC80211_MESH is not set # CONFIG_MAC80211_LEDS is not set @@ -566,6 +577,7 @@ CONFIG_MTD_NAND=y CONFIG_MTD_NAND_VERIFY_WRITE=y # CONFIG_MTD_NAND_ECC_SMC is not set # CONFIG_MTD_NAND_MUSEUM_IDS is not set +# CONFIG_MTD_NAND_GPIO is not set CONFIG_MTD_NAND_IDS=y # CONFIG_MTD_NAND_DISKONCHIP is not set # CONFIG_MTD_NAND_CAFE is not set @@ -738,6 +750,7 @@ CONFIG_SATA_MV=y # CONFIG_PATA_SCH is not set CONFIG_MD=y CONFIG_BLK_DEV_MD=y +CONFIG_MD_AUTODETECT=y # CONFIG_MD_LINEAR is not set CONFIG_MD_RAID0=m CONFIG_MD_RAID1=m @@ -775,8 +788,25 @@ CONFIG_NETDEVICES=y # CONFIG_TUN is not set # CONFIG_VETH is not set # CONFIG_ARCNET is not set +CONFIG_PHYLIB=y + +# +# MII PHY device drivers +# +# CONFIG_MARVELL_PHY is not set +# CONFIG_DAVICOM_PHY is not set +# CONFIG_QSEMI_PHY is not set +# CONFIG_LXT_PHY is not set +# CONFIG_CICADA_PHY is not set +# CONFIG_VITESSE_PHY is not set +# CONFIG_SMSC_PHY is not set +# CONFIG_BROADCOM_PHY is not set +# CONFIG_ICPLUS_PHY is not set +# CONFIG_REALTEK_PHY is not set +# CONFIG_FIXED_PHY is not set +# CONFIG_MDIO_BITBANG is not set # CONFIG_NET_ETHERNET is not set -CONFIG_MII=y +CONFIG_MII=m CONFIG_NETDEV_1000=y # CONFIG_ACENIC is not set # CONFIG_DL2K is not set @@ -798,6 +828,7 @@ CONFIG_MV643XX_ETH=y # CONFIG_QLA3XXX is not set # CONFIG_ATL1 is not set # CONFIG_ATL1E is not set +# CONFIG_JME is not set # CONFIG_NETDEV_10000 is not set # CONFIG_TR is not set @@ -809,6 +840,7 @@ CONFIG_WLAN_80211=y # CONFIG_IPW2100 is not set # CONFIG_IPW2200 is not set # CONFIG_LIBERTAS is not set +# CONFIG_LIBERTAS_THINFIRM is not set # CONFIG_HERMES is not set # CONFIG_ATMEL is not set # CONFIG_PRISM54 is not set @@ -833,14 +865,15 @@ CONFIG_P54_USB=m CONFIG_ZD1211RW=m CONFIG_ZD1211RW_DEBUG=y CONFIG_RT2X00=m -CONFIG_RT2X00_LIB=m -CONFIG_RT2X00_LIB_USB=m -CONFIG_RT2X00_LIB_FIRMWARE=y # CONFIG_RT2400PCI is not set # CONFIG_RT2500PCI is not set # CONFIG_RT61PCI is not set CONFIG_RT2500USB=m CONFIG_RT73USB=m +CONFIG_RT2X00_LIB_USB=m +CONFIG_RT2X00_LIB=m +CONFIG_RT2X00_LIB_FIRMWARE=y +CONFIG_RT2X00_LIB_CRYPTO=y # CONFIG_RT2X00_DEBUG is not set # @@ -854,6 +887,7 @@ CONFIG_USB_USBNET=m CONFIG_USB_NET_AX8817X=m CONFIG_USB_NET_CDCETHER=m CONFIG_USB_NET_DM9601=m +# CONFIG_USB_NET_SMSC95XX is not set CONFIG_USB_NET_GL620A=m CONFIG_USB_NET_NET1080=m CONFIG_USB_NET_PLUSB=m @@ -922,7 +956,6 @@ CONFIG_INPUT_TOUCHSCREEN=y # CONFIG_TOUCHSCREEN_PENMOUNT is not set # CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set # CONFIG_TOUCHSCREEN_TOUCHWIN is not set -# CONFIG_TOUCHSCREEN_UCB1400 is not set CONFIG_TOUCHSCREEN_USB_COMPOSITE=m CONFIG_TOUCHSCREEN_USB_EGALAX=y CONFIG_TOUCHSCREEN_USB_PANJIT=y @@ -1060,12 +1093,14 @@ CONFIG_I2C_DEBUG_ALGO=y # CONFIG_W1 is not set # CONFIG_POWER_SUPPLY is not set # CONFIG_HWMON is not set +# CONFIG_THERMAL is not set +# CONFIG_THERMAL_HWMON is not set # CONFIG_WATCHDOG is not set +CONFIG_SSB_POSSIBLE=y # # Sonics Silicon Backplane # -CONFIG_SSB_POSSIBLE=y # CONFIG_SSB is not set # @@ -1075,8 +1110,9 @@ CONFIG_SSB_POSSIBLE=y # CONFIG_MFD_SM501 is not set # CONFIG_HTC_PASIC3 is not set # CONFIG_MFD_TMIO is not set -# CONFIG_MFD_T7L66XB is not set -# CONFIG_MFD_TC6387XB is not set +# CONFIG_PMIC_DA903X is not set +# CONFIG_MFD_WM8400 is not set +# CONFIG_MFD_WM8350_I2C is not set # # Multimedia devices @@ -1085,15 +1121,120 @@ CONFIG_SSB_POSSIBLE=y # # Multimedia core support # -# CONFIG_VIDEO_DEV is not set +CONFIG_VIDEO_DEV=m +CONFIG_VIDEO_V4L2_COMMON=m +CONFIG_VIDEO_ALLOW_V4L1=y +CONFIG_VIDEO_V4L1_COMPAT=y # CONFIG_DVB_CORE is not set -# CONFIG_VIDEO_MEDIA is not set +CONFIG_VIDEO_MEDIA=m # # Multimedia drivers # +# CONFIG_MEDIA_ATTACH is not set +CONFIG_MEDIA_TUNER=m +# CONFIG_MEDIA_TUNER_CUSTOMIZE is not set +CONFIG_MEDIA_TUNER_SIMPLE=m +CONFIG_MEDIA_TUNER_TDA8290=m +CONFIG_MEDIA_TUNER_TDA9887=m +CONFIG_MEDIA_TUNER_TEA5761=m +CONFIG_MEDIA_TUNER_TEA5767=m +CONFIG_MEDIA_TUNER_MT20XX=m +CONFIG_MEDIA_TUNER_XC2028=m +CONFIG_MEDIA_TUNER_XC5000=m +CONFIG_VIDEO_V4L2=m +CONFIG_VIDEO_V4L1=m +CONFIG_VIDEOBUF_GEN=m +CONFIG_VIDEOBUF_VMALLOC=m +CONFIG_VIDEO_IR=m +CONFIG_VIDEO_TVEEPROM=m +CONFIG_VIDEO_TUNER=m +CONFIG_VIDEO_CAPTURE_DRIVERS=y +# CONFIG_VIDEO_ADV_DEBUG is not set +# CONFIG_VIDEO_FIXED_MINOR_RANGES is not set +CONFIG_VIDEO_HELPER_CHIPS_AUTO=y +CONFIG_VIDEO_IR_I2C=m +CONFIG_VIDEO_MSP3400=m +CONFIG_VIDEO_CS53L32A=m +CONFIG_VIDEO_WM8775=m +CONFIG_VIDEO_SAA711X=m +CONFIG_VIDEO_TVP5150=m +CONFIG_VIDEO_CX25840=m +CONFIG_VIDEO_CX2341X=m +# CONFIG_VIDEO_VIVI is not set +# CONFIG_VIDEO_BT848 is not set +# CONFIG_VIDEO_CPIA is not set +# CONFIG_VIDEO_CPIA2 is not set +# CONFIG_VIDEO_SAA5246A is not set +# CONFIG_VIDEO_SAA5249 is not set +# CONFIG_VIDEO_STRADIS is not set +# CONFIG_VIDEO_SAA7134 is not set +# CONFIG_VIDEO_MXB is not set +# CONFIG_VIDEO_HEXIUM_ORION is not set +# CONFIG_VIDEO_HEXIUM_GEMINI is not set +# CONFIG_VIDEO_CX88 is not set +# CONFIG_VIDEO_IVTV is not set +# CONFIG_VIDEO_CAFE_CCIC is not set +# CONFIG_SOC_CAMERA is not set +CONFIG_V4L_USB_DRIVERS=y +CONFIG_USB_VIDEO_CLASS=m +CONFIG_USB_VIDEO_CLASS_INPUT_EVDEV=y +CONFIG_USB_GSPCA=m +CONFIG_USB_M5602=m +CONFIG_USB_GSPCA_CONEX=m +CONFIG_USB_GSPCA_ETOMS=m +CONFIG_USB_GSPCA_FINEPIX=m +CONFIG_USB_GSPCA_MARS=m +CONFIG_USB_GSPCA_OV519=m +CONFIG_USB_GSPCA_PAC207=m +CONFIG_USB_GSPCA_PAC7311=m +CONFIG_USB_GSPCA_SONIXB=m +CONFIG_USB_GSPCA_SONIXJ=m +CONFIG_USB_GSPCA_SPCA500=m +CONFIG_USB_GSPCA_SPCA501=m +CONFIG_USB_GSPCA_SPCA505=m +CONFIG_USB_GSPCA_SPCA506=m +CONFIG_USB_GSPCA_SPCA508=m +CONFIG_USB_GSPCA_SPCA561=m +CONFIG_USB_GSPCA_STK014=m +CONFIG_USB_GSPCA_SUNPLUS=m +CONFIG_USB_GSPCA_T613=m +CONFIG_USB_GSPCA_TV8532=m +CONFIG_USB_GSPCA_VC032X=m +CONFIG_USB_GSPCA_ZC3XX=m +CONFIG_VIDEO_PVRUSB2=m +CONFIG_VIDEO_PVRUSB2_SYSFS=y +# CONFIG_VIDEO_PVRUSB2_DEBUGIFC is not set +CONFIG_VIDEO_EM28XX=m +CONFIG_VIDEO_EM28XX_ALSA=m +CONFIG_VIDEO_USBVISION=m +CONFIG_VIDEO_USBVIDEO=m +CONFIG_USB_VICAM=m +CONFIG_USB_IBMCAM=m +CONFIG_USB_KONICAWC=m +CONFIG_USB_QUICKCAM_MESSENGER=m +CONFIG_USB_ET61X251=m +CONFIG_VIDEO_OVCAMCHIP=m +CONFIG_USB_W9968CF=m +CONFIG_USB_OV511=m +CONFIG_USB_SE401=m +CONFIG_USB_SN9C102=m +CONFIG_USB_STV680=m +CONFIG_USB_ZC0301=m +CONFIG_USB_PWC=m +# CONFIG_USB_PWC_DEBUG is not set +CONFIG_USB_ZR364XX=m +CONFIG_USB_STKWEBCAM=m +CONFIG_USB_S2255=m +CONFIG_RADIO_ADAPTERS=y +# CONFIG_RADIO_GEMTEK_PCI is not set +# CONFIG_RADIO_MAXIRADIO is not set +# CONFIG_RADIO_MAESTRO is not set +CONFIG_USB_DSBR=m +# CONFIG_USB_SI470X is not set +# CONFIG_USB_MR800 is not set CONFIG_DAB=y -# CONFIG_USB_DABUSB is not set +CONFIG_USB_DABUSB=m # # Graphics support @@ -1116,6 +1257,7 @@ CONFIG_DAB=y CONFIG_DUMMY_CONSOLE=y CONFIG_FONT_8x16=y CONFIG_SOUND=m +CONFIG_SOUND_OSS_CORE=y CONFIG_SND=m CONFIG_SND_TIMER=m CONFIG_SND_PCM=m @@ -1162,6 +1304,8 @@ CONFIG_USB_DEVICE_CLASS=y # CONFIG_USB_OTG_WHITELIST is not set # CONFIG_USB_OTG_BLACKLIST_HUB is not set # CONFIG_USB_MON is not set +# CONFIG_USB_WUSB is not set +# CONFIG_USB_WUSB_CBAF is not set # # USB Host Controller Drivers @@ -1179,6 +1323,8 @@ CONFIG_USB_OHCI_LITTLE_ENDIAN=y CONFIG_USB_UHCI_HCD=y CONFIG_USB_SL811_HCD=y # CONFIG_USB_R8A66597_HCD is not set +# CONFIG_USB_WHCI_HCD is not set +# CONFIG_USB_HWA_HCD is not set # # USB Device Class drivers @@ -1186,13 +1332,14 @@ CONFIG_USB_SL811_HCD=y CONFIG_USB_ACM=m CONFIG_USB_PRINTER=m CONFIG_USB_WDM=m +# CONFIG_USB_TMC is not set # -# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' +# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may also be needed; # # -# may also be needed; see USB_STORAGE Help for more information +# see USB_STORAGE Help for more information # CONFIG_USB_STORAGE=y # CONFIG_USB_STORAGE_DEBUG is not set @@ -1282,6 +1429,7 @@ CONFIG_USB_SERIAL_OMNINET=m CONFIG_USB_EMI62=m CONFIG_USB_EMI26=m # CONFIG_USB_ADUTUX is not set +# CONFIG_USB_SEVSEG is not set CONFIG_USB_RIO500=m CONFIG_USB_LEGOTOWER=m CONFIG_USB_LCD=m @@ -1300,13 +1448,15 @@ CONFIG_USB_SISUSBVGA_CON=y # CONFIG_USB_IOWARRIOR is not set # CONFIG_USB_TEST is not set CONFIG_USB_ISIGHTFW=m +# CONFIG_USB_VST is not set # CONFIG_USB_GADGET is not set +# CONFIG_UWB is not set CONFIG_MMC=m # CONFIG_MMC_DEBUG is not set # CONFIG_MMC_UNSAFE_RESUME is not set # -# MMC/SD Card Drivers +# MMC/SD/SDIO Card Drivers # CONFIG_MMC_BLOCK=m CONFIG_MMC_BLOCK_BOUNCE=y @@ -1314,10 +1464,12 @@ CONFIG_MMC_BLOCK_BOUNCE=y # CONFIG_MMC_TEST is not set # -# MMC/SD Host Controller Drivers +# MMC/SD/SDIO Host Controller Drivers # # CONFIG_MMC_SDHCI is not set # CONFIG_MMC_TIFM_SD is not set +# CONFIG_MEMSTICK is not set +# CONFIG_ACCESSIBILITY is not set # CONFIG_NEW_LEDS is not set CONFIG_RTC_LIB=y CONFIG_RTC_CLASS=y @@ -1350,6 +1502,7 @@ CONFIG_RTC_DRV_M41T80=y # CONFIG_RTC_DRV_M41T80_WDT is not set CONFIG_RTC_DRV_S35390A=y # CONFIG_RTC_DRV_FM3130 is not set +# CONFIG_RTC_DRV_RX8581 is not set # # SPI RTC drivers @@ -1359,12 +1512,15 @@ CONFIG_RTC_DRV_S35390A=y # Platform RTC drivers # # CONFIG_RTC_DRV_CMOS is not set +# CONFIG_RTC_DRV_DS1286 is not set # CONFIG_RTC_DRV_DS1511 is not set # CONFIG_RTC_DRV_DS1553 is not set # CONFIG_RTC_DRV_DS1742 is not set # CONFIG_RTC_DRV_STK17TA8 is not set # CONFIG_RTC_DRV_M48T86 is not set +# CONFIG_RTC_DRV_M48T35 is not set # CONFIG_RTC_DRV_M48T59 is not set +# CONFIG_RTC_DRV_BQ4802 is not set # CONFIG_RTC_DRV_V3020 is not set # @@ -1383,14 +1539,7 @@ CONFIG_DMA_ENGINE=y # # CONFIG_NET_DMA is not set # CONFIG_DMATEST is not set - -# -# Voltage and Current regulators -# # CONFIG_REGULATOR is not set -# CONFIG_REGULATOR_FIXED_VOLTAGE is not set -# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set -# CONFIG_REGULATOR_BQ24022 is not set # CONFIG_UIO is not set # @@ -1405,7 +1554,7 @@ CONFIG_EXT3_FS=y CONFIG_EXT3_FS_XATTR=y CONFIG_EXT3_FS_POSIX_ACL=y CONFIG_EXT3_FS_SECURITY=y -# CONFIG_EXT4DEV_FS is not set +# CONFIG_EXT4_FS is not set CONFIG_JBD=y CONFIG_FS_MBCACHE=y CONFIG_REISERFS_FS=y @@ -1420,6 +1569,7 @@ CONFIG_JFS_SECURITY=y # CONFIG_JFS_DEBUG is not set CONFIG_JFS_STATISTICS=y CONFIG_FS_POSIX_ACL=y +CONFIG_FILE_LOCKING=y CONFIG_XFS_FS=y CONFIG_XFS_QUOTA=y CONFIG_XFS_POSIX_ACL=y @@ -1464,6 +1614,7 @@ CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" # CONFIG_PROC_FS=y CONFIG_PROC_SYSCTL=y +CONFIG_PROC_PAGE_MONITOR=y CONFIG_SYSFS=y CONFIG_TMPFS=y # CONFIG_TMPFS_POSIX_ACL is not set @@ -1517,6 +1668,7 @@ CONFIG_NFS_ACL_SUPPORT=y CONFIG_NFS_COMMON=y CONFIG_SUNRPC=y CONFIG_SUNRPC_GSS=y +# CONFIG_SUNRPC_REGISTER_V4 is not set CONFIG_RPCSEC_GSS_KRB5=y # CONFIG_RPCSEC_GSS_SPKM3 is not set # CONFIG_SMB_FS is not set @@ -1604,15 +1756,15 @@ CONFIG_FRAME_WARN=1024 # CONFIG_DEBUG_BUGVERBOSE is not set # CONFIG_DEBUG_MEMORY_INIT is not set CONFIG_FRAME_POINTER=y +# CONFIG_RCU_CPU_STALL_DETECTOR is not set # CONFIG_LATENCYTOP is not set CONFIG_SYSCTL_SYSCALL_CHECK=y -CONFIG_HAVE_FTRACE=y -CONFIG_HAVE_DYNAMIC_FTRACE=y -# CONFIG_FTRACE is not set -# CONFIG_IRQSOFF_TRACER is not set -# CONFIG_PREEMPT_TRACER is not set -# CONFIG_SCHED_TRACER is not set -# CONFIG_CONTEXT_SWITCH_TRACER is not set +CONFIG_HAVE_FUNCTION_TRACER=y + +# +# Tracers +# +# CONFIG_DYNAMIC_PRINTK_DEBUG is not set # CONFIG_SAMPLES is not set CONFIG_HAVE_ARCH_KGDB=y # CONFIG_DEBUG_USER is not set @@ -1622,6 +1774,7 @@ CONFIG_HAVE_ARCH_KGDB=y # # CONFIG_KEYS is not set # CONFIG_SECURITY is not set +# CONFIG_SECURITYFS is not set # CONFIG_SECURITY_FILE_CAPABILITIES is not set CONFIG_XOR_BLOCKS=m CONFIG_ASYNC_CORE=y @@ -1632,11 +1785,18 @@ CONFIG_CRYPTO=y # # Crypto core or helper # +# CONFIG_CRYPTO_FIPS is not set CONFIG_CRYPTO_ALGAPI=y +CONFIG_CRYPTO_ALGAPI2=y CONFIG_CRYPTO_AEAD=m +CONFIG_CRYPTO_AEAD2=y CONFIG_CRYPTO_BLKCIPHER=y +CONFIG_CRYPTO_BLKCIPHER2=y CONFIG_CRYPTO_HASH=m +CONFIG_CRYPTO_HASH2=y +CONFIG_CRYPTO_RNG2=y CONFIG_CRYPTO_MANAGER=y +CONFIG_CRYPTO_MANAGER2=y # CONFIG_CRYPTO_GF128MUL is not set # CONFIG_CRYPTO_NULL is not set # CONFIG_CRYPTO_CRYPTD is not set @@ -1708,6 +1868,11 @@ CONFIG_CRYPTO_DES=y # CONFIG_CRYPTO_DEFLATE=m # CONFIG_CRYPTO_LZO is not set + +# +# Random Number Generation +# +# CONFIG_CRYPTO_ANSI_CPRNG is not set CONFIG_CRYPTO_HW=y # CONFIG_CRYPTO_DEV_HIFN_795X is not set @@ -1715,8 +1880,6 @@ CONFIG_CRYPTO_HW=y # Library routines # CONFIG_BITREVERSE=y -# CONFIG_GENERIC_FIND_FIRST_BIT is not set -# CONFIG_GENERIC_FIND_NEXT_BIT is not set CONFIG_CRC_CCITT=y CONFIG_CRC16=y CONFIG_CRC_T10DIF=y diff --git a/packages/linux/linux-orion_2.6.27.10.bb b/packages/linux/linux-orion_2.6.28.4.bb index 500d959a9a..c0a7d3c9af 100644 --- a/packages/linux/linux-orion_2.6.27.10.bb +++ b/packages/linux/linux-orion_2.6.28.4.bb @@ -1,19 +1,19 @@ DESCRIPTION = "Linux Kernel for Marvell Orion based devices" SECTION = "kernel" LICENSE = "GPL" -PR = "r6" +PR = "r0" COMPATIBLE_MACHINE = "(dns323|mv2120|kuropro|lspro|tsx09|ts409)" require linux.inc -SRC_URI = "${KERNELORG_MIRROR}/pub/linux/kernel/v2.6/linux-2.6.27.tar.bz2 \ +SRC_URI = "${KERNELORG_MIRROR}/pub/linux/kernel/v2.6/linux-2.6.28.tar.bz2 \ ${KERNELORG_MIRROR}/pub/linux/kernel/v2.6/patch-${PV}.gz;patch=1 \ file://kuropro-foonas-mtd.patch;patch=1 \ file://fw-and-powerpc-install.patch;patch=1 \ file://defconfig \ " -S = "${WORKDIR}/linux-2.6.27" +S = "${WORKDIR}/linux-2.6.28" # Fix the mach-type of orion devices - always passed 526 SRC_URI_append_dns323 += "file://dns323.patch;patch=1" diff --git a/packages/linux/linux_2.6.25.20.bb b/packages/linux/linux_2.6.25.20.bb new file mode 100644 index 0000000000..7b9308cf1d --- /dev/null +++ b/packages/linux/linux_2.6.25.20.bb @@ -0,0 +1,32 @@ +########################################### +#@MAINTAINER: Marco Cavallini <m.cavallini@koansoftware.com> +# linux_2.6.25.20.bb +# recipe file for PM9261 and PM9263 +########################################### + +require linux.inc + +PR = "r2" + +DEFAULT_PREFERENCE_ronetix-pm9263 = "1" +DEFAULT_PREFERENCE_ronetix-pm9261 = "1" + +SRC_URI = "${KERNELORG_MIRROR}/pub/linux/kernel/v2.6/linux-2.6.25.tar.bz2 \ + ${KERNELORG_MIRROR}/pub/linux/kernel/v2.6/patch-2.6.25.20.bz2;patch=1 \ + file://defconfig" + +# WARNING: for following patched is required the proper entry in conf/checksums.ini + +SRC_URI_append_ronetix-pm9263 = " \ + http://maxim.org.za/AT91RM9200/2.6/2.6.25-at91.patch.gz;patch=1 \ + http://download.ronetix.info/sk-eb926x/linux/kernel/2.6.25.4/linux-2.6.25.4-ronetix-08-11-02.2228.patch;patch=1 \ + http://download.ronetix.info/sk-eb926x/linux/kernel/2.6.25.4/socketcan-driver-at91.patch;patch=1 \ + " + +SRC_URI_append_ronetix-pm9261 = " \ + http://maxim.org.za/AT91RM9200/2.6/2.6.25-at91.patch.gz;patch=1 \ + http://download.ronetix.info/sk-eb926x/linux/kernel/2.6.25.4/linux-2.6.25.4-ronetix-08-11-02.2228.patch;patch=1 \ + http://download.ronetix.info/sk-eb926x/linux/kernel/2.6.25.4/socketcan-driver-at91.patch;patch=1 \ + " + +S = "${WORKDIR}/linux-2.6.25/" diff --git a/packages/linux/linux_2.6.27.bb b/packages/linux/linux_2.6.27.bb index 7da406a0d3..4b094bf48c 100644 --- a/packages/linux/linux_2.6.27.bb +++ b/packages/linux/linux_2.6.27.bb @@ -1,6 +1,6 @@ require linux.inc -PR = "r3" +PR = "r4" # Mark archs/machines that this kernel supports DEFAULT_PREFERENCE = "-1" @@ -21,8 +21,8 @@ SRC_URI_append_boc01 = "\ file://010-090112-mii.patch;patch=1 \ file://011-090115-gpio.patch;patch=1 \ file://012-090115-cy3218-btns.patch;patch=1 \ - file://013-090116-lcd.patch;patch=1 \ - file://014-090115-pm-wakeup.patch;patch=1 \ + file://013-090209-lcd.patch;patch=1 \ + file://014-090209-pm-wakeup.patch;patch=1 \ " SRC_URI_append_progear = "file://progear-bl.patch;patch=1\ diff --git a/packages/linux/linux_2.6.28.bb b/packages/linux/linux_2.6.28.bb index 393209c3be..603fe49cd7 100644 --- a/packages/linux/linux_2.6.28.bb +++ b/packages/linux/linux_2.6.28.bb @@ -1,12 +1,14 @@ require linux.inc -PR = "r2" +PR = "r4" # Mark archs/machines that this kernel supports DEFAULT_PREFERENCE = "-1" DEFAULT_PREFERENCE_at91sam9263ek = "28" +DEFAULT_PREFERENCE_ronetix-pm9263 = "28" DEFAULT_PREFERENCE_stb225 = "28" +DEFAULT_PREFERENCE_collie = "1" SRC_URI = "${KERNELORG_MIRROR}/pub/linux/kernel/v2.6/linux-2.6.28.tar.bz2 \ file://defconfig" @@ -15,8 +17,40 @@ SRC_URI_append_at91sam9263ek = " \ file://linux-2.6.28-at91.patch.bz2;patch=1 \ file://linux-2.6.28-exp.patch.bz2;patch=1 " +SRC_URI_append_ronetix-pm9263 = " \ + file://linux-2.6.28-at91.patch.bz2;patch=1 \ + file://linux-2.6.28-exp.patch.bz2;patch=1 \ + file://linux-2.6.28-at91-ronetix-12012009.patch;patch=1 " + SRC_URI_append_stb225 = " \ file://uImage.patch;patch=1 \ file://ebase-fix.patch;patch=1 \ file://enable-uart.patch;patch=1 \ file://ip3902.patch;patch=1" + +SRC_URI_append_collie = " \ + file://0001-collie-start-scoop-converton-to-new-api.patch;patch=1 \ + file://0002-add-locomo_spi-driver.patch;patch=1 \ + file://0003-enable-cpufreq-for-collie.patch;patch=1 \ + file://0004-fix-dma-for-SA1100.patch;patch=1 \ + file://0005-fix-collie-keyboard-bug.patch;patch=1 \ + file://0006-add-collie-flash-hack.patch;patch=1 \ + file://0007-hostap-workaround-for-buggy-sa1100-pcmcia-driver.patch;patch=1 \ + file://0008-fix-collie-suspend-hack.patch;patch=1 \ + file://0009-add-sa1100-usb-gadget-driver-hack.patch;patch=1 \ + file://0010-mmc_spi-add-suspend-and-resume-callbacks.patch;patch=1 \ + file://0011-move-drivers-mfd-.h-to-include-linux-mfd.patch;patch=1 \ + file://0012-move-ucb1200-ts-driver.patch;patch=1 \ + file://0013-add-collie-touchscreen-driver.patch;patch=1 \ + file://0014-collie-locomo-led-change-default-trigger.patch;patch=1 \ + file://0015-SA1100-make-gpio_to_irq-and-reverse-a-macro.patch;patch=1 \ + file://0016-add-gpiolib-support-to-ucb1x00.patch;patch=1 \ + file://0017-collie-convert-to-gpiolib-for-ucb1x00.patch;patch=1 \ + file://0018-collie-add-battery-driver.patch;patch=1 \ + file://0019-collie-support-pda_power-driver.patch;patch=1 \ + file://0020-remove-collie_pm.c.patch;patch=1 \ + file://0021-mmc-trivial-annotation-of-blocks.patch;patch=1 \ + file://0022-mmc_block-print-better-error-messages.patch;patch=1 \ + file://0023-mmc_block-ensure-all-sectors-that-do-not-have-error.patch;patch=1 " + +S = "${WORKDIR}/linux-2.6.28/" |