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Diffstat (limited to 'packages/linux/nslu2-kernel/2.6.14/50-nslu2-include.patch')
-rw-r--r--packages/linux/nslu2-kernel/2.6.14/50-nslu2-include.patch51
1 files changed, 0 insertions, 51 deletions
diff --git a/packages/linux/nslu2-kernel/2.6.14/50-nslu2-include.patch b/packages/linux/nslu2-kernel/2.6.14/50-nslu2-include.patch
deleted file mode 100644
index afd395b190..0000000000
--- a/packages/linux/nslu2-kernel/2.6.14/50-nslu2-include.patch
+++ /dev/null
@@ -1,51 +0,0 @@
---- linux-2.6.14-rc2/include/asm-arm/arch-ixp4xx/nslu2.h 1970-01-01 01:00:00.000000000 +0100
-+++ test3/include/asm-arm/arch-ixp4xx/nslu2.h 2005-09-24 17:46:04.000000000 +0200
-@@ -0,0 +1,48 @@
-+/*
-+ * include/asm-arm/arch-ixp4xx/nslu2.h
-+ *
-+ * NSLU2 platform specific definitions
-+ *
-+ * Author: Mark Rakes <mrakes AT mac.com>
-+ * Maintainers: http://www.nslu2-linux.org
-+ *
-+ * based on ixdp425.h:
-+ * Copyright 2004 (c) MontaVista, Software, Inc.
-+ *
-+ * This file is licensed under the terms of the GNU General Public
-+ * License version 2. This program is licensed "as is" without any
-+ * warranty of any kind, whether express or implied.
-+ */
-+
-+// GPIO 8 is used as the power input so is not free for use as a PCI IRQ
-+// kas11 11-2-04
-+
-+#ifndef __ASM_ARCH_HARDWARE_H__
-+#error "Do not include this directly, instead #include <asm/hardware.h>"
-+#endif
-+
-+#define NSLU2_FLASH_BASE IXP4XX_EXP_BUS_CS0_BASE_PHYS
-+#define NSLU2_FLASH_SIZE IXP4XX_EXP_BUS_CSX_REGION_SIZE
-+
-+#define NSLU2_SDA_PIN 7
-+#define NSLU2_SCL_PIN 6
-+
-+/*
-+ * NSLU2 PCI IRQs
-+ */
-+#define NSLU2_PCI_MAX_DEV 3
-+#define NSLU2_PCI_IRQ_LINES 3
-+
-+
-+/* PCI controller GPIO to IRQ pin mappings */
-+#define NSLU2_PCI_INTA_PIN 11
-+#define NSLU2_PCI_INTB_PIN 10
-+#define NSLU2_PCI_INTC_PIN 9
-+//#define NSLU2_PCI_INTD_PIN 8
-+
-+
-+/* NSLU2 Timer */
-+//#define NSLU2_FREQ 66000000
-+//#define NSLU2_CLOCK_TICK_RATE (((NSLU2_FREQ / HZ & ~IXP4XX_OST_RELOAD_MASK) + 1) * HZ)
-+//#define NSLU2_CLOCK_TICKS_PER_USEC ((NSLU2_CLOCK_TICK_RATE + USEC_PER_SEC/2) / USEC_PER_SEC)
-+