diff options
Diffstat (limited to 'packages/linux/nas100d-kernel/2.6.14/10-ixp4xx-le.patch')
| -rw-r--r-- | packages/linux/nas100d-kernel/2.6.14/10-ixp4xx-le.patch | 54 |
1 files changed, 54 insertions, 0 deletions
diff --git a/packages/linux/nas100d-kernel/2.6.14/10-ixp4xx-le.patch b/packages/linux/nas100d-kernel/2.6.14/10-ixp4xx-le.patch new file mode 100644 index 0000000000..0b50e4e1a0 --- /dev/null +++ b/packages/linux/nas100d-kernel/2.6.14/10-ixp4xx-le.patch @@ -0,0 +1,54 @@ +--- linux-2.6.14/drivers/mtd/maps/ixp4xx.c 2005-10-27 17:02:08.000000000 -0700 ++++ linux-2.6.14/drivers/mtd/maps/ixp4xx.c 2005-10-29 23:11:24.990820968 -0700 +@@ -22,6 +22,7 @@ + #include <linux/string.h> + #include <linux/mtd/mtd.h> + #include <linux/mtd/map.h> ++#include <linux/mtd/cfi_endian.h> + #include <linux/mtd/partitions.h> + #include <linux/ioport.h> + #include <linux/device.h> +@@ -30,17 +31,40 @@ + + #include <linux/reboot.h> + ++/* On a little-endian IXP4XX system (tested on NSLU2) an LDRH or STRH ++ * will flip the second address bit - i.e. XOR the address with 10b. ++ * This causes the cfi commands (sent to the command address, 0xAA for ++ * 16 bit flash) to fail. This is fixed here by XOR'ing the address ++ * before use with 10b. The cost of this is that the flash layout ends ++ * up with pdp-endiannes (on an LE system), however this is not a problem ++ * as the access code consistently only accesses half words - so the ++ * endianness is not determinable on stuff which is written and read ++ * consistently in the little endian world. ++ * ++ * For flash data from the big-endian world, however, the results are ++ * weird - the pdp-endianness results in the data apparently being ++ * 2-byte swapped (as in dd conv=swab). To work round this the 16 ++ * bit values are written and read using cpu_to_cfi16 and cfi16_to_cpu, ++ * by default these are no-ops, but if the MTD driver is configed with ++ * CONFIG_MTD_CFI_BE_BYTE_SWAP the macros will byte swap the data, ++ * resulting in a consistently BE view of the flash on both BE (no ++ * op) and LE systems. This config setting also causes the command ++ * data from the CFI implementation to get swapped - as is required ++ * so that this code will *unswap* it and give the correct command ++ * data to the flash. ++ */ + #ifndef __ARMEB__ + #define BYTE0(h) ((h) & 0xFF) + #define BYTE1(h) (((h) >> 8) & 0xFF) ++#define FLASHWORD(a) (*(__u16*)((u32)(a) ^ 2)) + #else + #define BYTE0(h) (((h) >> 8) & 0xFF) + #define BYTE1(h) ((h) & 0xFF) ++#define FLASHWORD(a) (*(__u16*)(a)) + #endif + +-#define FLASHWORD(a) (*(__u16*)(a)) +-#define FLASHVAL(a) FLASHWORD(a) +-#define FLASHSET(a,v) do { FLASHWORD(a) = (v); } while (0) ++#define FLASHVAL(a) cfi16_to_cpu(FLASHWORD(a)) ++#define FLASHSET(a,v) (FLASHWORD(a) = cpu_to_cfi16(v)) + + static map_word ixp4xx_read16(struct map_info *map, unsigned long ofs) + { |