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-rw-r--r--packages/linux/linux-omap2-git/beagleboard/00001-mcbsp-transform.patch1160
-rw-r--r--packages/linux/linux-omap2-git/beagleboard/00002-mcbsp-omap1.patch204
-rw-r--r--packages/linux/linux-omap2-git/beagleboard/00003-mcbsp-omap3-clock.patch123
-rw-r--r--packages/linux/linux-omap2-git/beagleboard/00004-omap2-mcbsp.patch144
-rw-r--r--packages/linux/linux-omap2-git/beagleboard/0001-omap3-cpuidle.patch450
-rw-r--r--packages/linux/linux-omap2-git/beagleboard/0002-omap3-cpuidle.patch88
-rw-r--r--packages/linux/linux-omap2-git/beagleboard/defconfig21
-rw-r--r--packages/linux/linux-omap2-git/beagleboard/mcbsp-fix-include.patch10
-rw-r--r--packages/linux/linux-omap2-git/beagleboard/mux.patch15
9 files changed, 557 insertions, 1658 deletions
diff --git a/packages/linux/linux-omap2-git/beagleboard/00001-mcbsp-transform.patch b/packages/linux/linux-omap2-git/beagleboard/00001-mcbsp-transform.patch
deleted file mode 100644
index e8b3e7a70e..0000000000
--- a/packages/linux/linux-omap2-git/beagleboard/00001-mcbsp-transform.patch
+++ /dev/null
@@ -1,1160 +0,0 @@
-From: Eduardo Valentin <eduardo.valentin@indt.org.br>
-
-This patch transform mcbsp code into a very initial
-implementation of a platform driver.
-
-It also gets ride of ifdefs on mcbsp.c code.
-To do it, a platform data structure was defined.
-
-Platform devices are located in arch/arm/plat-omap/devices.c
-
-Signed-off-by: Eduardo Valentin <eduardo.valentin@indt.org.br>
----
- arch/arm/plat-omap/devices.c | 45 +++
- arch/arm/plat-omap/mcbsp.c | 660 ++++++++++++++-----------------------
- include/asm-arm/arch-omap/mcbsp.h | 73 ++++-
- 3 files changed, 367 insertions(+), 411 deletions(-)
-
-diff --git a/arch/arm/plat-omap/devices.c b/arch/arm/plat-omap/devices.c
-index 099182b..b3e0147 100644
---- a/arch/arm/plat-omap/devices.c
-+++ b/arch/arm/plat-omap/devices.c
-@@ -27,6 +27,7 @@
- #include <asm/arch/gpio.h>
- #include <asm/arch/menelaus.h>
- #include <asm/arch/dsp_common.h>
-+#include <asm/arch/mcbsp.h>
-
- #if defined(CONFIG_OMAP_DSP) || defined(CONFIG_OMAP_DSP_MODULE)
-
-@@ -150,6 +151,49 @@ static inline void omap_init_kp(void) {}
- #endif
-
- /*-------------------------------------------------------------------------*/
-+#if defined(CONFIG_OMAP_MCBSP) || defined(CONFIG_OMAP_MCBSP_MODULE)
-+
-+static struct platform_device omap_mcbsp_devices[OMAP_MAX_MCBSP_COUNT];
-+static int mcbsps_configured;
-+
-+void omap_mcbsp_register_board_cfg(struct omap_mcbsp_platform_data *config,
-+ int size)
-+{
-+ int i;
-+
-+ if (size > OMAP_MAX_MCBSP_COUNT) {
-+ printk(KERN_WARNING "Registered too many McBSPs platform_data."
-+ " Using maximum (%d) available.\n",
-+ OMAP_MAX_MCBSP_COUNT);
-+ size = OMAP_MAX_MCBSP_COUNT;
-+ }
-+
-+ for (i = 0; i < size; i++) {
-+ struct platform_device *new_mcbsp = &omap_mcbsp_devices[i];
-+ new_mcbsp->name = "omap-mcbsp";
-+ new_mcbsp->id = i + 1;
-+ new_mcbsp->dev.platform_data = &config[i];
-+ }
-+ mcbsps_configured = size;
-+}
-+
-+static void __init omap_init_mcbsp(void)
-+{
-+ int i;
-+
-+ for (i = 0; i < mcbsps_configured; i++)
-+ platform_device_register(&omap_mcbsp_devices[i]);
-+}
-+#else
-+void omap_mcbsp_register_board_cfg(struct omap_mcbsp_platform_data *config,
-+ int size)
-+{ }
-+
-+static inline void __init omap_init_mcbsp(void)
-+{ }
-+#endif
-+
-+/*-------------------------------------------------------------------------*/
-
- #if defined(CONFIG_MMC_OMAP) || defined(CONFIG_MMC_OMAP_MODULE) \
- || defined(CONFIG_MMC_OMAP_HS) || defined(CONFIG_MMC_OMAP_HS_MODULE)
-@@ -511,6 +555,7 @@ static int __init omap_init_devices(void)
- */
- omap_init_dsp();
- omap_init_kp();
-+ omap_init_mcbsp();
- omap_init_mmc();
- omap_init_uwire();
- omap_init_wdt();
-diff --git a/arch/arm/plat-omap/mcbsp.c b/arch/arm/plat-omap/mcbsp.c
-index 053de31..5536223 100644
---- a/arch/arm/plat-omap/mcbsp.c
-+++ b/arch/arm/plat-omap/mcbsp.c
-@@ -15,6 +15,7 @@
- #include <linux/module.h>
- #include <linux/init.h>
- #include <linux/device.h>
-+#include <linux/platform_device.h>
- #include <linux/wait.h>
- #include <linux/completion.h>
- #include <linux/interrupt.h>
-@@ -25,83 +26,53 @@
- #include <linux/irq.h>
-
- #include <asm/arch/dma.h>
--#include <asm/arch/mux.h>
--#include <asm/arch/irqs.h>
--#include <asm/arch/dsp_common.h>
- #include <asm/arch/mcbsp.h>
-
--#ifdef CONFIG_MCBSP_DEBUG
--#define DBG(x...) printk(x)
--#else
--#define DBG(x...) do { } while (0)
--#endif
--
--struct omap_mcbsp {
-- u32 io_base;
-- u8 id;
-- u8 free;
-- omap_mcbsp_word_length rx_word_length;
-- omap_mcbsp_word_length tx_word_length;
--
-- omap_mcbsp_io_type_t io_type; /* IRQ or poll */
-- /* IRQ based TX/RX */
-- int rx_irq;
-- int tx_irq;
--
-- /* DMA stuff */
-- u8 dma_rx_sync;
-- short dma_rx_lch;
-- u8 dma_tx_sync;
-- short dma_tx_lch;
--
-- /* Completion queues */
-- struct completion tx_irq_completion;
-- struct completion rx_irq_completion;
-- struct completion tx_dma_completion;
-- struct completion rx_dma_completion;
--
-- /* Protect the field .free, while checking if the mcbsp is in use */
-- spinlock_t lock;
--};
--
- static struct omap_mcbsp mcbsp[OMAP_MAX_MCBSP_COUNT];
--#ifdef CONFIG_ARCH_OMAP1
--static struct clk *mcbsp_dsp_ck;
--static struct clk *mcbsp_api_ck;
--static struct clk *mcbsp_dspxor_ck;
--#endif
--#ifdef CONFIG_ARCH_OMAP2
--static struct clk *mcbsp1_ick;
--static struct clk *mcbsp1_fck;
--static struct clk *mcbsp2_ick;
--static struct clk *mcbsp2_fck;
--#endif
-+
-+#define omap_mcbsp_check_valid_id(id) (mcbsp[id].pdata && \
-+ mcbsp[id].pdata->ops && \
-+ mcbsp[id].pdata->ops->check && \
-+ (mcbsp[id].pdata->ops->check(id) == 0))
-
- static void omap_mcbsp_dump_reg(u8 id)
- {
-- DBG("**** MCBSP%d regs ****\n", mcbsp[id].id);
-- DBG("DRR2: 0x%04x\n", OMAP_MCBSP_READ(mcbsp[id].io_base, DRR2));
-- DBG("DRR1: 0x%04x\n", OMAP_MCBSP_READ(mcbsp[id].io_base, DRR1));
-- DBG("DXR2: 0x%04x\n", OMAP_MCBSP_READ(mcbsp[id].io_base, DXR2));
-- DBG("DXR1: 0x%04x\n", OMAP_MCBSP_READ(mcbsp[id].io_base, DXR1));
-- DBG("SPCR2: 0x%04x\n", OMAP_MCBSP_READ(mcbsp[id].io_base, SPCR2));
-- DBG("SPCR1: 0x%04x\n", OMAP_MCBSP_READ(mcbsp[id].io_base, SPCR1));
-- DBG("RCR2: 0x%04x\n", OMAP_MCBSP_READ(mcbsp[id].io_base, RCR2));
-- DBG("RCR1: 0x%04x\n", OMAP_MCBSP_READ(mcbsp[id].io_base, RCR1));
-- DBG("XCR2: 0x%04x\n", OMAP_MCBSP_READ(mcbsp[id].io_base, XCR2));
-- DBG("XCR1: 0x%04x\n", OMAP_MCBSP_READ(mcbsp[id].io_base, XCR1));
-- DBG("SRGR2: 0x%04x\n", OMAP_MCBSP_READ(mcbsp[id].io_base, SRGR2));
-- DBG("SRGR1: 0x%04x\n", OMAP_MCBSP_READ(mcbsp[id].io_base, SRGR1));
-- DBG("PCR0: 0x%04x\n", OMAP_MCBSP_READ(mcbsp[id].io_base, PCR0));
-- DBG("***********************\n");
-+ dev_dbg(mcbsp[id].dev, "**** McBSP%d regs ****\n", mcbsp[id].id);
-+ dev_dbg(mcbsp[id].dev, "DRR2: 0x%04x\n",
-+ OMAP_MCBSP_READ(mcbsp[id].io_base, DRR2));
-+ dev_dbg(mcbsp[id].dev, "DRR1: 0x%04x\n",
-+ OMAP_MCBSP_READ(mcbsp[id].io_base, DRR1));
-+ dev_dbg(mcbsp[id].dev, "DXR2: 0x%04x\n",
-+ OMAP_MCBSP_READ(mcbsp[id].io_base, DXR2));
-+ dev_dbg(mcbsp[id].dev, "DXR1: 0x%04x\n",
-+ OMAP_MCBSP_READ(mcbsp[id].io_base, DXR1));
-+ dev_dbg(mcbsp[id].dev, "SPCR2: 0x%04x\n",
-+ OMAP_MCBSP_READ(mcbsp[id].io_base, SPCR2));
-+ dev_dbg(mcbsp[id].dev, "SPCR1: 0x%04x\n",
-+ OMAP_MCBSP_READ(mcbsp[id].io_base, SPCR1));
-+ dev_dbg(mcbsp[id].dev, "RCR2: 0x%04x\n",
-+ OMAP_MCBSP_READ(mcbsp[id].io_base, RCR2));
-+ dev_dbg(mcbsp[id].dev, "RCR1: 0x%04x\n",
-+ OMAP_MCBSP_READ(mcbsp[id].io_base, RCR1));
-+ dev_dbg(mcbsp[id].dev, "XCR2: 0x%04x\n",
-+ OMAP_MCBSP_READ(mcbsp[id].io_base, XCR2));
-+ dev_dbg(mcbsp[id].dev, "XCR1: 0x%04x\n",
-+ OMAP_MCBSP_READ(mcbsp[id].io_base, XCR1));
-+ dev_dbg(mcbsp[id].dev, "SRGR2: 0x%04x\n",
-+ OMAP_MCBSP_READ(mcbsp[id].io_base, SRGR2));
-+ dev_dbg(mcbsp[id].dev, "SRGR1: 0x%04x\n",
-+ OMAP_MCBSP_READ(mcbsp[id].io_base, SRGR1));
-+ dev_dbg(mcbsp[id].dev, "PCR0: 0x%04x\n",
-+ OMAP_MCBSP_READ(mcbsp[id].io_base, PCR0));
-+ dev_dbg(mcbsp[id].dev, "***********************\n");
- }
-
- static irqreturn_t omap_mcbsp_tx_irq_handler(int irq, void *dev_id)
- {
- struct omap_mcbsp *mcbsp_tx = dev_id;
-
-- DBG("TX IRQ callback : 0x%x\n",
-- OMAP_MCBSP_READ(mcbsp_tx->io_base, SPCR2));
-+ dev_dbg(mcbsp_tx->dev, "TX IRQ callback : 0x%x\n",
-+ OMAP_MCBSP_READ(mcbsp_tx->io_base, SPCR2));
-
- complete(&mcbsp_tx->tx_irq_completion);
-
-@@ -112,8 +83,8 @@ static irqreturn_t omap_mcbsp_rx_irq_handler(int irq, void *dev_id)
- {
- struct omap_mcbsp *mcbsp_rx = dev_id;
-
-- DBG("RX IRQ callback : 0x%x\n",
-- OMAP_MCBSP_READ(mcbsp_rx->io_base, SPCR2));
-+ dev_dbg(mcbsp_rx->dev, "RX IRQ callback : 0x%x\n",
-+ OMAP_MCBSP_READ(mcbsp_rx->io_base, SPCR2));
-
- complete(&mcbsp_rx->rx_irq_completion);
-
-@@ -124,8 +95,8 @@ static void omap_mcbsp_tx_dma_callback(int lch, u16 ch_status, void *data)
- {
- struct omap_mcbsp *mcbsp_dma_tx = data;
-
-- DBG("TX DMA callback : 0x%x\n",
-- OMAP_MCBSP_READ(mcbsp_dma_tx->io_base, SPCR2));
-+ dev_dbg(mcbsp_dma_tx->dev, "TX DMA callback : 0x%x\n",
-+ OMAP_MCBSP_READ(mcbsp_dma_tx->io_base, SPCR2));
-
- /* We can free the channels */
- omap_free_dma(mcbsp_dma_tx->dma_tx_lch);
-@@ -138,8 +109,8 @@ static void omap_mcbsp_rx_dma_callback(int lch, u16 ch_status, void *data)
- {
- struct omap_mcbsp *mcbsp_dma_rx = data;
-
-- DBG("RX DMA callback : 0x%x\n",
-- OMAP_MCBSP_READ(mcbsp_dma_rx->io_base, SPCR2));
-+ dev_dbg(mcbsp_dma_rx->dev, "RX DMA callback : 0x%x\n",
-+ OMAP_MCBSP_READ(mcbsp_dma_rx->io_base, SPCR2));
-
- /* We can free the channels */
- omap_free_dma(mcbsp_dma_rx->dma_rx_lch);
-@@ -156,9 +127,16 @@ static void omap_mcbsp_rx_dma_callback(int lch, u16 ch_status, void *data)
- */
- void omap_mcbsp_config(unsigned int id, const struct omap_mcbsp_reg_cfg *config)
- {
-- u32 io_base = mcbsp[id].io_base;
-+ u32 io_base;
-+
-+ if (!omap_mcbsp_check_valid_id(id)) {
-+ printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
-+ return;
-+ }
-
-- DBG("OMAP-McBSP: McBSP%d io_base: 0x%8x\n", id + 1, io_base);
-+ io_base = mcbsp[id].io_base;
-+ dev_dbg(mcbsp[id].dev, "Configuring McBSP%d io_base: 0x%8x\n",
-+ mcbsp[id].id, io_base);
-
- /* We write the given config */
- OMAP_MCBSP_WRITE(io_base, SPCR2, config->spcr2);
-@@ -175,97 +153,22 @@ void omap_mcbsp_config(unsigned int id, const struct omap_mcbsp_reg_cfg *config)
- }
- EXPORT_SYMBOL(omap_mcbsp_config);
-
--static int omap_mcbsp_check(unsigned int id)
--{
-- if (cpu_is_omap730()) {
-- if (id > OMAP_MAX_MCBSP_COUNT - 1) {
-- printk(KERN_ERR "OMAP-McBSP: McBSP%d doesn't exist\n",
-- id + 1);
-- return -1;
-- }
-- return 0;
-- }
--
-- if (cpu_is_omap15xx() || cpu_is_omap16xx() || cpu_is_omap24xx()) {
-- if (id > OMAP_MAX_MCBSP_COUNT) {
-- printk(KERN_ERR "OMAP-McBSP: McBSP%d doesn't exist\n",
-- id + 1);
-- return -1;
-- }
-- return 0;
-- }
--
-- return -1;
--}
--
--#ifdef CONFIG_ARCH_OMAP1
--static void omap_mcbsp_dsp_request(void)
--{
-- if (cpu_is_omap15xx() || cpu_is_omap16xx()) {
-- int ret;
--
-- ret = omap_dsp_request_mem();
-- if (ret < 0) {
-- printk(KERN_ERR "Could not get dsp memory: %i\n", ret);
-- return;
-- }
--
-- clk_enable(mcbsp_dsp_ck);
-- clk_enable(mcbsp_api_ck);
--
-- /* enable 12MHz clock to mcbsp 1 & 3 */
-- clk_enable(mcbsp_dspxor_ck);
--
-- /*
-- * DSP external peripheral reset
-- * FIXME: This should be moved to dsp code
-- */
-- __raw_writew(__raw_readw(DSP_RSTCT2) | 1 | 1 << 1,
-- DSP_RSTCT2);
-- }
--}
--
--static void omap_mcbsp_dsp_free(void)
--{
-- if (cpu_is_omap15xx() || cpu_is_omap16xx()) {
-- omap_dsp_release_mem();
-- clk_disable(mcbsp_dspxor_ck);
-- clk_disable(mcbsp_dsp_ck);
-- clk_disable(mcbsp_api_ck);
-- }
--}
--#endif
--
--#ifdef CONFIG_ARCH_OMAP2
--static void omap2_mcbsp2_mux_setup(void)
--{
-- if (cpu_is_omap2420()) {
-- omap_cfg_reg(Y15_24XX_MCBSP2_CLKX);
-- omap_cfg_reg(R14_24XX_MCBSP2_FSX);
-- omap_cfg_reg(W15_24XX_MCBSP2_DR);
-- omap_cfg_reg(V15_24XX_MCBSP2_DX);
-- omap_cfg_reg(V14_24XX_GPIO117);
-- }
-- /*
-- * Need to add MUX settings for OMAP 2430 SDP
-- */
--}
--#endif
--
- /*
- * We can choose between IRQ based or polled IO.
- * This needs to be called before omap_mcbsp_request().
- */
- int omap_mcbsp_set_io_type(unsigned int id, omap_mcbsp_io_type_t io_type)
- {
-- if (omap_mcbsp_check(id) < 0)
-- return -EINVAL;
-+ if (!omap_mcbsp_check_valid_id(id)) {
-+ printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
-+ return -ENODEV;
-+ }
-
- spin_lock(&mcbsp[id].lock);
-
- if (!mcbsp[id].free) {
-- printk(KERN_ERR "OMAP-McBSP: McBSP%d is currently in use\n",
-- id + 1);
-+ dev_err(mcbsp[id].dev, "McBSP%d is currently in use\n",
-+ mcbsp[id].id);
- spin_unlock(&mcbsp[id].lock);
- return -EINVAL;
- }
-@@ -282,34 +185,20 @@ int omap_mcbsp_request(unsigned int id)
- {
- int err;
-
-- if (omap_mcbsp_check(id) < 0)
-- return -EINVAL;
--
--#ifdef CONFIG_ARCH_OMAP1
-- /*
-- * On 1510, 1610 and 1710, McBSP1 and McBSP3
-- * are DSP public peripherals.
-- */
-- if (id == OMAP_MCBSP1 || id == OMAP_MCBSP3)
-- omap_mcbsp_dsp_request();
--#endif
--
--#ifdef CONFIG_ARCH_OMAP2
-- if (cpu_is_omap24xx()) {
-- if (id == OMAP_MCBSP1) {
-- clk_enable(mcbsp1_ick);
-- clk_enable(mcbsp1_fck);
-- } else {
-- clk_enable(mcbsp2_ick);
-- clk_enable(mcbsp2_fck);
-- }
-+ if (!omap_mcbsp_check_valid_id(id)) {
-+ printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
-+ return -ENODEV;
- }
--#endif
-+
-+ if (mcbsp[id].pdata->ops->request)
-+ mcbsp[id].pdata->ops->request(id);
-+
-+ mcbsp_clk_enable(&mcbsp[id]);
-
- spin_lock(&mcbsp[id].lock);
- if (!mcbsp[id].free) {
-- printk(KERN_ERR "OMAP-McBSP: McBSP%d is currently in use\n",
-- id + 1);
-+ dev_err(mcbsp[id].dev, "McBSP%d is currently in use\n",
-+ mcbsp[id].id);
- spin_unlock(&mcbsp[id].lock);
- return -1;
- }
-@@ -322,9 +211,9 @@ int omap_mcbsp_request(unsigned int id)
- err = request_irq(mcbsp[id].tx_irq, omap_mcbsp_tx_irq_handler,
- 0, "McBSP", (void *) (&mcbsp[id]));
- if (err != 0) {
-- printk(KERN_ERR "OMAP-McBSP: Unable to "
-- "request TX IRQ %d for McBSP%d\n",
-- mcbsp[id].tx_irq, mcbsp[id].id);
-+ dev_err(mcbsp[id].dev, "Unable to request TX IRQ %d "
-+ "for McBSP%d\n", mcbsp[id].tx_irq,
-+ mcbsp[id].id);
- return err;
- }
-
-@@ -333,9 +222,9 @@ int omap_mcbsp_request(unsigned int id)
- err = request_irq(mcbsp[id].rx_irq, omap_mcbsp_rx_irq_handler,
- 0, "McBSP", (void *) (&mcbsp[id]));
- if (err != 0) {
-- printk(KERN_ERR "OMAP-McBSP: Unable to "
-- "request RX IRQ %d for McBSP%d\n",
-- mcbsp[id].rx_irq, mcbsp[id].id);
-+ dev_err(mcbsp[id].dev, "Unable to request RX IRQ %d "
-+ "for McBSP%d\n", mcbsp[id].rx_irq,
-+ mcbsp[id].id);
- free_irq(mcbsp[id].tx_irq, (void *) (&mcbsp[id]));
- return err;
- }
-@@ -349,32 +238,20 @@ EXPORT_SYMBOL(omap_mcbsp_request);
-
- void omap_mcbsp_free(unsigned int id)
- {
-- if (omap_mcbsp_check(id) < 0)
-+ if (!omap_mcbsp_check_valid_id(id)) {
-+ printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
- return;
--
--#ifdef CONFIG_ARCH_OMAP1
-- if (cpu_class_is_omap1()) {
-- if (id == OMAP_MCBSP1 || id == OMAP_MCBSP3)
-- omap_mcbsp_dsp_free();
- }
--#endif
--
--#ifdef CONFIG_ARCH_OMAP2
-- if (cpu_is_omap24xx()) {
-- if (id == OMAP_MCBSP1) {
-- clk_disable(mcbsp1_ick);
-- clk_disable(mcbsp1_fck);
-- } else {
-- clk_disable(mcbsp2_ick);
-- clk_disable(mcbsp2_fck);
-- }
-- }
--#endif
-+
-+ if (mcbsp[id].pdata->ops->free)
-+ mcbsp[id].pdata->ops->free(id);
-+
-+ mcbsp_clk_disable(&mcbsp[id]);
-
- spin_lock(&mcbsp[id].lock);
- if (mcbsp[id].free) {
-- printk(KERN_ERR "OMAP-McBSP: McBSP%d was not reserved\n",
-- id + 1);
-+ dev_err(mcbsp[id].dev, "McBSP%d was not reserved\n",
-+ mcbsp[id].id);
- spin_unlock(&mcbsp[id].lock);
- return;
- }
-@@ -400,8 +277,10 @@ void omap_mcbsp_start(unsigned int id)
- u32 io_base;
- u16 w;
-
-- if (omap_mcbsp_check(id) < 0)
-+ if (!omap_mcbsp_check_valid_id(id)) {
-+ printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
- return;
-+ }
-
- io_base = mcbsp[id].io_base;
-
-@@ -435,8 +314,10 @@ void omap_mcbsp_stop(unsigned int id)
- u32 io_base;
- u16 w;
-
-- if (omap_mcbsp_check(id) < 0)
-+ if (!omap_mcbsp_check_valid_id(id)) {
-+ printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
- return;
-+ }
-
- io_base = mcbsp[id].io_base;
-
-@@ -457,7 +338,14 @@ EXPORT_SYMBOL(omap_mcbsp_stop);
- /* polled mcbsp i/o operations */
- int omap_mcbsp_pollwrite(unsigned int id, u16 buf)
- {
-- u32 base = mcbsp[id].io_base;
-+ u32 base;
-+
-+ if (!omap_mcbsp_check_valid_id(id)) {
-+ printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
-+ return -ENODEV;
-+ }
-+
-+ base = mcbsp[id].io_base;
- writew(buf, base + OMAP_MCBSP_REG_DXR1);
- /* if frame sync error - clear the error */
- if (readw(base + OMAP_MCBSP_REG_SPCR2) & XSYNC_ERR) {
-@@ -479,8 +367,8 @@ int omap_mcbsp_pollwrite(unsigned int id, u16 buf)
- (XRST),
- base + OMAP_MCBSP_REG_SPCR2);
- udelay(10);
-- printk(KERN_ERR
-- " Could not write to McBSP Register\n");
-+ dev_err(mcbsp[id].dev, "Could not write to"
-+ " McBSP%d Register\n", mcbsp[id].id);
- return -2;
- }
- }
-@@ -492,7 +380,14 @@ EXPORT_SYMBOL(omap_mcbsp_pollwrite);
-
- int omap_mcbsp_pollread(unsigned int id, u16 *buf)
- {
-- u32 base = mcbsp[id].io_base;
-+ u32 base;
-+
-+ if (!omap_mcbsp_check_valid_id(id)) {
-+ printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
-+ return -ENODEV;
-+ }
-+
-+ base = mcbsp[id].io_base;
- /* if frame sync error - clear the error */
- if (readw(base + OMAP_MCBSP_REG_SPCR1) & RSYNC_ERR) {
- /* clear error */
-@@ -513,8 +408,8 @@ int omap_mcbsp_pollread(unsigned int id, u16 *buf)
- (RRST),
- base + OMAP_MCBSP_REG_SPCR1);
- udelay(10);
-- printk(KERN_ERR
-- " Could not read from McBSP Register\n");
-+ dev_err(mcbsp[id].dev, "Could not read from"
-+ " McBSP%d Register\n", mcbsp[id].id);
- return -2;
- }
- }
-@@ -531,12 +426,15 @@ EXPORT_SYMBOL(omap_mcbsp_pollread);
- void omap_mcbsp_xmit_word(unsigned int id, u32 word)
- {
- u32 io_base;
-- omap_mcbsp_word_length word_length = mcbsp[id].tx_word_length;
-+ omap_mcbsp_word_length word_length;
-
-- if (omap_mcbsp_check(id) < 0)
-+ if (!omap_mcbsp_check_valid_id(id)) {
-+ printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
- return;
-+ }
-
- io_base = mcbsp[id].io_base;
-+ word_length = mcbsp[id].tx_word_length;
-
- wait_for_completion(&(mcbsp[id].tx_irq_completion));
-
-@@ -550,11 +448,14 @@ u32 omap_mcbsp_recv_word(unsigned int id)
- {
- u32 io_base;
- u16 word_lsb, word_msb = 0;
-- omap_mcbsp_word_length word_length = mcbsp[id].rx_word_length;
-+ omap_mcbsp_word_length word_length;
-
-- if (omap_mcbsp_check(id) < 0)
-- return -EINVAL;
-+ if (!omap_mcbsp_check_valid_id(id)) {
-+ printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
-+ return -ENODEV;
-+ }
-
-+ word_length = mcbsp[id].rx_word_length;
- io_base = mcbsp[id].io_base;
-
- wait_for_completion(&(mcbsp[id].rx_irq_completion));
-@@ -569,11 +470,20 @@ EXPORT_SYMBOL(omap_mcbsp_recv_word);
-
- int omap_mcbsp_spi_master_xmit_word_poll(unsigned int id, u32 word)
- {
-- u32 io_base = mcbsp[id].io_base;
-- omap_mcbsp_word_length tx_word_length = mcbsp[id].tx_word_length;
-- omap_mcbsp_word_length rx_word_length = mcbsp[id].rx_word_length;
-+ u32 io_base;
-+ omap_mcbsp_word_length tx_word_length;
-+ omap_mcbsp_word_length rx_word_length;
- u16 spcr2, spcr1, attempts = 0, word_lsb, word_msb = 0;
-
-+ if (!omap_mcbsp_check_valid_id(id)) {
-+ printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
-+ return -ENODEV;
-+ }
-+
-+ io_base = mcbsp[id].io_base;
-+ tx_word_length = mcbsp[id].tx_word_length;
-+ rx_word_length = mcbsp[id].rx_word_length;
-+
- if (tx_word_length != rx_word_length)
- return -EINVAL;
-
-@@ -587,7 +497,8 @@ int omap_mcbsp_spi_master_xmit_word_poll(unsigned int id, u32 word)
- udelay(10);
- OMAP_MCBSP_WRITE(io_base, SPCR2, spcr2 | XRST);
- udelay(10);
-- printk(KERN_ERR "McBSP transmitter not ready\n");
-+ dev_err(mcbsp[id].dev, "McBSP%d transmitter not "
-+ "ready\n", mcbsp[id].id);
- return -EAGAIN;
- }
- }
-@@ -607,7 +518,8 @@ int omap_mcbsp_spi_master_xmit_word_poll(unsigned int id, u32 word)
- udelay(10);
- OMAP_MCBSP_WRITE(io_base, SPCR1, spcr1 | RRST);
- udelay(10);
-- printk(KERN_ERR "McBSP receiver not ready\n");
-+ dev_err(mcbsp[id].dev, "McBSP%d receiver not "
-+ "ready\n", mcbsp[id].id);
- return -EAGAIN;
- }
- }
-@@ -623,11 +535,20 @@ EXPORT_SYMBOL(omap_mcbsp_spi_master_xmit_word_poll);
-
- int omap_mcbsp_spi_master_recv_word_poll(unsigned int id, u32 *word)
- {
-- u32 io_base = mcbsp[id].io_base, clock_word = 0;
-- omap_mcbsp_word_length tx_word_length = mcbsp[id].tx_word_length;
-- omap_mcbsp_word_length rx_word_length = mcbsp[id].rx_word_length;
-+ u32 io_base, clock_word = 0;
-+ omap_mcbsp_word_length tx_word_length;
-+ omap_mcbsp_word_length rx_word_length;
- u16 spcr2, spcr1, attempts = 0, word_lsb, word_msb = 0;
-
-+ if (!omap_mcbsp_check_valid_id(id)) {
-+ printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
-+ return -ENODEV;
-+ }
-+
-+ io_base = mcbsp[id].io_base;
-+ tx_word_length = mcbsp[id].tx_word_length;
-+ rx_word_length = mcbsp[id].rx_word_length;
-+
- if (tx_word_length != rx_word_length)
- return -EINVAL;
-
-@@ -641,7 +562,8 @@ int omap_mcbsp_spi_master_recv_word_poll(unsigned int id, u32 *word)
- udelay(10);
- OMAP_MCBSP_WRITE(io_base, SPCR2, spcr2 | XRST);
- udelay(10);
-- printk(KERN_ERR "McBSP transmitter not ready\n");
-+ dev_err(mcbsp[id].dev, "McBSP%d transmitter not "
-+ "ready\n", mcbsp[id].id);
- return -EAGAIN;
- }
- }
-@@ -661,7 +583,8 @@ int omap_mcbsp_spi_master_recv_word_poll(unsigned int id, u32 *word)
- udelay(10);
- OMAP_MCBSP_WRITE(io_base, SPCR1, spcr1 | RRST);
- udelay(10);
-- printk(KERN_ERR "McBSP receiver not ready\n");
-+ dev_err(mcbsp[id].dev, "McBSP%d receiver not "
-+ "ready\n", mcbsp[id].id);
- return -EAGAIN;
- }
- }
-@@ -692,20 +615,24 @@ int omap_mcbsp_xmit_buffer(unsigned int id, dma_addr_t buffer,
- int dest_port = 0;
- int sync_dev = 0;
-
-- if (omap_mcbsp_check(id) < 0)
-- return -EINVAL;
-+ if (!omap_mcbsp_check_valid_id(id)) {
-+ printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
-+ return -ENODEV;
-+ }
-
- if (omap_request_dma(mcbsp[id].dma_tx_sync, "McBSP TX",
- omap_mcbsp_tx_dma_callback,
- &mcbsp[id],
- &dma_tx_ch)) {
-- printk(KERN_ERR "OMAP-McBSP: Unable to request DMA channel for"
-- " McBSP%d TX. Trying IRQ based TX\n", id + 1);
-+ dev_err(mcbsp[id].dev, " Unable to request DMA channel for "
-+ "McBSP%d TX. Trying IRQ based TX\n",
-+ mcbsp[id].id);
- return -EAGAIN;
- }
- mcbsp[id].dma_tx_lch = dma_tx_ch;
-
-- DBG("TX DMA on channel %d\n", dma_tx_ch);
-+ dev_err(mcbsp[id].dev, "McBSP%d TX DMA on channel %d\n", mcbsp[id].id,
-+ dma_tx_ch);
-
- init_completion(&(mcbsp[id].tx_dma_completion));
-
-@@ -713,7 +640,7 @@ int omap_mcbsp_xmit_buffer(unsigned int id, dma_addr_t buffer,
- src_port = OMAP_DMA_PORT_TIPB;
- dest_port = OMAP_DMA_PORT_EMIFF;
- }
-- if (cpu_is_omap24xx())
-+ if (cpu_class_is_omap2())
- sync_dev = mcbsp[id].dma_tx_sync;
-
- omap_set_dma_transfer_params(mcbsp[id].dma_tx_lch,
-@@ -749,20 +676,24 @@ int omap_mcbsp_recv_buffer(unsigned int id, dma_addr_t buffer,
- int dest_port = 0;
- int sync_dev = 0;
-
-- if (omap_mcbsp_check(id) < 0)
-- return -EINVAL;
-+ if (!omap_mcbsp_check_valid_id(id)) {
-+ printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
-+ return -ENODEV;
-+ }
-
- if (omap_request_dma(mcbsp[id].dma_rx_sync, "McBSP RX",
- omap_mcbsp_rx_dma_callback,
- &mcbsp[id],
- &dma_rx_ch)) {
-- printk(KERN_ERR "Unable to request DMA channel for McBSP%d RX."
-- " Trying IRQ based RX\n", id + 1);
-+ dev_err(mcbsp[id].dev, "Unable to request DMA channel for "
-+ "McBSP%d RX. Trying IRQ based RX\n",
-+ mcbsp[id].id);
- return -EAGAIN;
- }
- mcbsp[id].dma_rx_lch = dma_rx_ch;
-
-- DBG("RX DMA on channel %d\n", dma_rx_ch);
-+ dev_err(mcbsp[id].dev, "McBSP%d RX DMA on channel %d\n", mcbsp[id].id,
-+ dma_rx_ch);
-
- init_completion(&(mcbsp[id].rx_dma_completion));
-
-@@ -770,7 +701,7 @@ int omap_mcbsp_recv_buffer(unsigned int id, dma_addr_t buffer,
- src_port = OMAP_DMA_PORT_TIPB;
- dest_port = OMAP_DMA_PORT_EMIFF;
- }
-- if (cpu_is_omap24xx())
-+ if (cpu_class_is_omap2())
- sync_dev = mcbsp[id].dma_rx_sync;
-
- omap_set_dma_transfer_params(mcbsp[id].dma_rx_lch,
-@@ -809,8 +740,10 @@ void omap_mcbsp_set_spi_mode(unsigned int id,
- {
- struct omap_mcbsp_reg_cfg mcbsp_cfg;
-
-- if (omap_mcbsp_check(id) < 0)
-+ if (!omap_mcbsp_check_valid_id(id)) {
-+ printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
- return;
-+ }
-
- memset(&mcbsp_cfg, 0, sizeof(struct omap_mcbsp_reg_cfg));
-
-@@ -871,182 +804,91 @@ EXPORT_SYMBOL(omap_mcbsp_set_spi_mode);
- * McBSP1 and McBSP3 are directly mapped on 1610 and 1510.
- * 730 has only 2 McBSP, and both of them are MPU peripherals.
- */
--struct omap_mcbsp_info {
-- u32 virt_base;
-- u8 dma_rx_sync, dma_tx_sync;
-- u16 rx_irq, tx_irq;
--};
-+static int __init omap_mcbsp_probe(struct platform_device *pdev)
-+{
-+ struct omap_mcbsp_platform_data *pdata = pdev->dev.platform_data;
-+ int id = pdev->id - 1;
-+ int ret = 0;
-+ int i;
-
--#ifdef CONFIG_ARCH_OMAP730
--static const struct omap_mcbsp_info mcbsp_730[] = {
-- [0] = { .virt_base = io_p2v(OMAP730_MCBSP1_BASE),
-- .dma_rx_sync = OMAP_DMA_MCBSP1_RX,
-- .dma_tx_sync = OMAP_DMA_MCBSP1_TX,
-- .rx_irq = INT_730_McBSP1RX,
-- .tx_irq = INT_730_McBSP1TX },
-- [1] = { .virt_base = io_p2v(OMAP730_MCBSP2_BASE),
-- .dma_rx_sync = OMAP_DMA_MCBSP3_RX,
-- .dma_tx_sync = OMAP_DMA_MCBSP3_TX,
-- .rx_irq = INT_730_McBSP2RX,
-- .tx_irq = INT_730_McBSP2TX },
--};
--#endif
--
--#ifdef CONFIG_ARCH_OMAP15XX
--static const struct omap_mcbsp_info mcbsp_1510[] = {
-- [0] = { .virt_base = OMAP1510_MCBSP1_BASE,
-- .dma_rx_sync = OMAP_DMA_MCBSP1_RX,
-- .dma_tx_sync = OMAP_DMA_MCBSP1_TX,
-- .rx_irq = INT_McBSP1RX,
-- .tx_irq = INT_McBSP1TX },
-- [1] = { .virt_base = io_p2v(OMAP1510_MCBSP2_BASE),
-- .dma_rx_sync = OMAP_DMA_MCBSP2_RX,
-- .dma_tx_sync = OMAP_DMA_MCBSP2_TX,
-- .rx_irq = INT_1510_SPI_RX,
-- .tx_irq = INT_1510_SPI_TX },
-- [2] = { .virt_base = OMAP1510_MCBSP3_BASE,
-- .dma_rx_sync = OMAP_DMA_MCBSP3_RX,
-- .dma_tx_sync = OMAP_DMA_MCBSP3_TX,
-- .rx_irq = INT_McBSP3RX,
-- .tx_irq = INT_McBSP3TX },
--};
--#endif
--
--#if defined(CONFIG_ARCH_OMAP16XX)
--static const struct omap_mcbsp_info mcbsp_1610[] = {
-- [0] = { .virt_base = OMAP1610_MCBSP1_BASE,
-- .dma_rx_sync = OMAP_DMA_MCBSP1_RX,
-- .dma_tx_sync = OMAP_DMA_MCBSP1_TX,
-- .rx_irq = INT_McBSP1RX,
-- .tx_irq = INT_McBSP1TX },
-- [1] = { .virt_base = io_p2v(OMAP1610_MCBSP2_BASE),
-- .dma_rx_sync = OMAP_DMA_MCBSP2_RX,
-- .dma_tx_sync = OMAP_DMA_MCBSP2_TX,
-- .rx_irq = INT_1610_McBSP2_RX,
-- .tx_irq = INT_1610_McBSP2_TX },
-- [2] = { .virt_base = OMAP1610_MCBSP3_BASE,
-- .dma_rx_sync = OMAP_DMA_MCBSP3_RX,
-- .dma_tx_sync = OMAP_DMA_MCBSP3_TX,
-- .rx_irq = INT_McBSP3RX,
-- .tx_irq = INT_McBSP3TX },
--};
--#endif
--
--#if defined(CONFIG_ARCH_OMAP24XX)
--static const struct omap_mcbsp_info mcbsp_24xx[] = {
-- [0] = { .virt_base = IO_ADDRESS(OMAP24XX_MCBSP1_BASE),
-- .dma_rx_sync = OMAP24XX_DMA_MCBSP1_RX,
-- .dma_tx_sync = OMAP24XX_DMA_MCBSP1_TX,
-- .rx_irq = INT_24XX_MCBSP1_IRQ_RX,
-- .tx_irq = INT_24XX_MCBSP1_IRQ_TX,
-- },
-- [1] = { .virt_base = IO_ADDRESS(OMAP24XX_MCBSP2_BASE),
-- .dma_rx_sync = OMAP24XX_DMA_MCBSP2_RX,
-- .dma_tx_sync = OMAP24XX_DMA_MCBSP2_TX,
-- .rx_irq = INT_24XX_MCBSP2_IRQ_RX,
-- .tx_irq = INT_24XX_MCBSP2_IRQ_TX,
-- },
--};
--#endif
-+ if (!pdata) {
-+ dev_err(&pdev->dev, "McBSP device initialized without"
-+ "platform data\n");
-+ ret = -EINVAL;
-+ goto exit;
-+ }
-
--static int __init omap_mcbsp_init(void)
-+ dev_dbg(&pdev->dev, "Initializing OMAP McBSP (%d).\n", pdev->id);
-+
-+ if (id >= OMAP_MAX_MCBSP_COUNT) {
-+ dev_err(&pdev->dev, "Invalid McBSP device id (%d)\n", id);
-+ ret = -EINVAL;
-+ goto exit;
-+ }
-+
-+ spin_lock_init(&mcbsp[id].lock);
-+ mcbsp[id].id = id + 1;
-+ mcbsp[id].free = 1;
-+ mcbsp[id].dma_tx_lch = -1;
-+ mcbsp[id].dma_rx_lch = -1;
-+
-+ mcbsp[id].io_base = pdata->virt_base;
-+ /* Default I/O is IRQ based */
-+ mcbsp[id].io_type = OMAP_MCBSP_IRQ_IO;
-+ mcbsp[id].tx_irq = pdata->tx_irq;
-+ mcbsp[id].rx_irq = pdata->rx_irq;
-+ mcbsp[id].dma_rx_sync = pdata->dma_rx_sync;
-+ mcbsp[id].dma_tx_sync = pdata->dma_tx_sync;
-+
-+ mcbsp[id].nr_clocks = ARRAY_SIZE(pdata->clocks);
-+ for (i = 0; i < ARRAY_SIZE(pdata->clocks); i++)
-+ mcbsp[id].clocks[i] = clk_get(&pdev->dev, pdata->clocks[i]);
-+
-+ mcbsp[id].pdata = pdata;
-+ mcbsp[id].dev = &pdev->dev;
-+ platform_set_drvdata(pdev, &mcbsp[id]);
-+
-+exit:
-+ return ret;
-+}
-+
-+static int omap_mcbsp_remove(struct platform_device *pdev)
- {
-- int mcbsp_count = 0, i;
-- static const struct omap_mcbsp_info *mcbsp_info;
-+ struct omap_mcbsp *mcbsp = platform_get_drvdata(pdev);
-
-- printk(KERN_INFO "Initializing OMAP McBSP system\n");
-+ platform_set_drvdata(pdev, NULL);
-+ if (mcbsp) {
-+ int i;
-
--#ifdef CONFIG_ARCH_OMAP1
-- mcbsp_dsp_ck = clk_get(0, "dsp_ck");
-- if (IS_ERR(mcbsp_dsp_ck)) {
-- printk(KERN_ERR "mcbsp: could not acquire dsp_ck handle.\n");
-- return PTR_ERR(mcbsp_dsp_ck);
-- }
-- mcbsp_api_ck = clk_get(0, "api_ck");
-- if (IS_ERR(mcbsp_api_ck)) {
-- printk(KERN_ERR "mcbsp: could not acquire api_ck handle.\n");
-- return PTR_ERR(mcbsp_api_ck);
-- }
-- mcbsp_dspxor_ck = clk_get(0, "dspxor_ck");
-- if (IS_ERR(mcbsp_dspxor_ck)) {
-- printk(KERN_ERR "mcbsp: could not acquire dspxor_ck handle.\n");
-- return PTR_ERR(mcbsp_dspxor_ck);
-- }
--#endif
--#ifdef CONFIG_ARCH_OMAP2
-- mcbsp1_ick = clk_get(0, "mcbsp1_ick");
-- if (IS_ERR(mcbsp1_ick)) {
-- printk(KERN_ERR "mcbsp: could not acquire "
-- "mcbsp1_ick handle.\n");
-- return PTR_ERR(mcbsp1_ick);
-- }
-- mcbsp1_fck = clk_get(0, "mcbsp1_fck");
-- if (IS_ERR(mcbsp1_fck)) {
-- printk(KERN_ERR "mcbsp: could not acquire "
-- "mcbsp1_fck handle.\n");
-- return PTR_ERR(mcbsp1_fck);
-- }
-- mcbsp2_ick = clk_get(0, "mcbsp2_ick");
-- if (IS_ERR(mcbsp2_ick)) {
-- printk(KERN_ERR "mcbsp: could not acquire "
-- "mcbsp2_ick handle.\n");
-- return PTR_ERR(mcbsp2_ick);
-- }
-- mcbsp2_fck = clk_get(0, "mcbsp2_fck");
-- if (IS_ERR(mcbsp2_fck)) {
-- printk(KERN_ERR "mcbsp: could not acquire "
-- "mcbsp2_fck handle.\n");
-- return PTR_ERR(mcbsp2_fck);
-- }
--#endif
-+ if (mcbsp->pdata && mcbsp->pdata->ops &&
-+ mcbsp->pdata->ops->free)
-+ mcbsp->pdata->ops->free(mcbsp->id);
-
--#ifdef CONFIG_ARCH_OMAP730
-- if (cpu_is_omap730()) {
-- mcbsp_info = mcbsp_730;
-- mcbsp_count = ARRAY_SIZE(mcbsp_730);
-- }
--#endif
--#ifdef CONFIG_ARCH_OMAP15XX
-- if (cpu_is_omap15xx()) {
-- mcbsp_info = mcbsp_1510;
-- mcbsp_count = ARRAY_SIZE(mcbsp_1510);
-- }
--#endif
--#if defined(CONFIG_ARCH_OMAP16XX)
-- if (cpu_is_omap16xx()) {
-- mcbsp_info = mcbsp_1610;
-- mcbsp_count = ARRAY_SIZE(mcbsp_1610);
-- }
--#endif
--#if defined(CONFIG_ARCH_OMAP24XX)
-- if (cpu_is_omap24xx()) {
-- mcbsp_info = mcbsp_24xx;
-- mcbsp_count = ARRAY_SIZE(mcbsp_24xx);
-- omap2_mcbsp2_mux_setup();
-- }
--#endif
-- for (i = 0; i < OMAP_MAX_MCBSP_COUNT ; i++) {
-- if (i >= mcbsp_count) {
-- mcbsp[i].io_base = 0;
-- mcbsp[i].free = 0;
-- continue;
-- }
-- mcbsp[i].id = i + 1;
-- mcbsp[i].free = 1;
-- mcbsp[i].dma_tx_lch = -1;
-- mcbsp[i].dma_rx_lch = -1;
--
-- mcbsp[i].io_base = mcbsp_info[i].virt_base;
-- /* Default I/O is IRQ based */
-- mcbsp[i].io_type = OMAP_MCBSP_IRQ_IO;
-- mcbsp[i].tx_irq = mcbsp_info[i].tx_irq;
-- mcbsp[i].rx_irq = mcbsp_info[i].rx_irq;
-- mcbsp[i].dma_rx_sync = mcbsp_info[i].dma_rx_sync;
-- mcbsp[i].dma_tx_sync = mcbsp_info[i].dma_tx_sync;
-- spin_lock_init(&mcbsp[i].lock);
-+ mcbsp_clk_disable(mcbsp);
-+ mcbsp_clk_put(mcbsp);
-+
-+ for (i = 0; i < mcbsp->nr_clocks; i++)
-+ mcbsp->clocks[i] = NULL;
-+
-+ mcbsp->free = 0;
-+ mcbsp->dev = NULL;
- }
-
- return 0;
- }
-
--arch_initcall(omap_mcbsp_init);
-+static struct platform_driver omap_mcbsp_driver = {
-+ .probe = omap_mcbsp_probe,
-+ .remove = omap_mcbsp_remove,
-+ .driver = {
-+ .name = "omap-mcbsp",
-+ },
-+};
-+
-+int __init omap_mcbsp_init(void)
-+{
-+ /* Register the McBSP driver */
-+ return platform_driver_register(&omap_mcbsp_driver);
-+}
-+
-+
-diff --git a/include/asm-arm/arch-omap/mcbsp.h b/include/asm-arm/arch-omap/mcbsp.h
-index b53c3b2..aa47421 100644
---- a/include/asm-arm/arch-omap/mcbsp.h
-+++ b/include/asm-arm/arch-omap/mcbsp.h
-@@ -24,7 +24,11 @@
- #ifndef __ASM_ARCH_OMAP_MCBSP_H
- #define __ASM_ARCH_OMAP_MCBSP_H
-
-+#include <linux/completion.h>
-+#include <linux/spinlock.h>
-+
- #include <asm/hardware.h>
-+#include <asm/arch/clock.h>
-
- #define OMAP730_MCBSP1_BASE 0xfffb1000
- #define OMAP730_MCBSP2_BASE 0xfffb1800
-@@ -40,6 +44,9 @@
- #define OMAP24XX_MCBSP1_BASE 0x48074000
- #define OMAP24XX_MCBSP2_BASE 0x48076000
-
-+#define OMAP34XX_MCBSP1_BASE 0x48074000
-+#define OMAP34XX_MCBSP2_BASE 0x49022000
-+
- #if defined(CONFIG_ARCH_OMAP15XX) || defined(CONFIG_ARCH_OMAP16XX) || defined(CONFIG_ARCH_OMAP730)
-
- #define OMAP_MCBSP_REG_DRR2 0x00
-@@ -74,7 +81,8 @@
- #define OMAP_MCBSP_REG_XCERG 0x3A
- #define OMAP_MCBSP_REG_XCERH 0x3C
-
--#define OMAP_MAX_MCBSP_COUNT 3
-+#define OMAP_MAX_MCBSP_COUNT 3
-+#define MAX_MCBSP_CLOCKS 3
-
- #define AUDIO_MCBSP_DATAWRITE (OMAP1510_MCBSP1_BASE + OMAP_MCBSP_REG_DXR1)
- #define AUDIO_MCBSP_DATAREAD (OMAP1510_MCBSP1_BASE + OMAP_MCBSP_REG_DRR1)
-@@ -117,7 +125,8 @@
- #define OMAP_MCBSP_REG_XCERG 0x74
- #define OMAP_MCBSP_REG_XCERH 0x78
-
--#define OMAP_MAX_MCBSP_COUNT 2
-+#define OMAP_MAX_MCBSP_COUNT 2
-+#define MAX_MCBSP_CLOCKS 2
-
- #define AUDIO_MCBSP_DATAWRITE (OMAP24XX_MCBSP2_BASE + OMAP_MCBSP_REG_DXR1)
- #define AUDIO_MCBSP_DATAREAD (OMAP24XX_MCBSP2_BASE + OMAP_MCBSP_REG_DRR1)
-@@ -298,6 +307,66 @@ struct omap_mcbsp_spi_cfg {
- omap_mcbsp_word_length word_length;
- };
-
-+/* Platform specific configuration */
-+struct omap_mcbsp_ops {
-+ void (*request)(unsigned int);
-+ void (*free)(unsigned int);
-+ int (*check)(unsigned int);
-+};
-+
-+struct omap_mcbsp_platform_data {
-+ u32 virt_base;
-+ u8 dma_rx_sync, dma_tx_sync;
-+ u16 rx_irq, tx_irq;
-+ struct omap_mcbsp_ops *ops;
-+ char const *clocks[MAX_MCBSP_CLOCKS];
-+};
-+
-+struct omap_mcbsp {
-+ struct device *dev;
-+ u32 io_base;
-+ u8 id;
-+ u8 free;
-+ omap_mcbsp_word_length rx_word_length;
-+ omap_mcbsp_word_length tx_word_length;
-+
-+ omap_mcbsp_io_type_t io_type; /* IRQ or poll */
-+ /* IRQ based TX/RX */
-+ int rx_irq;
-+ int tx_irq;
-+
-+ /* DMA stuff */
-+ u8 dma_rx_sync;
-+ short dma_rx_lch;
-+ u8 dma_tx_sync;
-+ short dma_tx_lch;
-+
-+ /* Completion queues */
-+ struct completion tx_irq_completion;
-+ struct completion rx_irq_completion;
-+ struct completion tx_dma_completion;
-+ struct completion rx_dma_completion;
-+
-+ /* Protect the field .free, while checking if the mcbsp is in use */
-+ spinlock_t lock;
-+ struct omap_mcbsp_platform_data *pdata;
-+ int nr_clocks;
-+ struct clk *clocks[MAX_MCBSP_CLOCKS];
-+};
-+
-+#define __mcbsp_clk_op(mcbsp, op) \
-+ do { \
-+ int i; \
-+ for (i = 0; i < mcbsp->nr_clocks; i++) \
-+ clk_##op(mcbsp->clocks[i]); \
-+ } while (0)
-+#define mcbsp_clk_enable(mcbsp) __mcbsp_clk_op((mcbsp), enable)
-+#define mcbsp_clk_disable(mcbsp) __mcbsp_clk_op((mcbsp), disable)
-+#define mcbsp_clk_put(mcbsp) __mcbsp_clk_op((mcbsp), put)
-+
-+int omap_mcbsp_init(void);
-+void omap_mcbsp_register_board_cfg(struct omap_mcbsp_platform_data *config,
-+ int size);
- void omap_mcbsp_config(unsigned int id, const struct omap_mcbsp_reg_cfg * config);
- int omap_mcbsp_request(unsigned int id);
- void omap_mcbsp_free(unsigned int id);
---
-1.5.5.1.67.gbdb8.dirty
-
---
-To unsubscribe from this list: send the line "unsubscribe linux-omap" in
-the body of a message to majordomo@vger.kernel.org
-More majordomo info at http://vger.kernel.org/majordomo-info.html
-
diff --git a/packages/linux/linux-omap2-git/beagleboard/00002-mcbsp-omap1.patch b/packages/linux/linux-omap2-git/beagleboard/00002-mcbsp-omap1.patch
deleted file mode 100644
index cf7c0df4e0..0000000000
--- a/packages/linux/linux-omap2-git/beagleboard/00002-mcbsp-omap1.patch
+++ /dev/null
@@ -1,204 +0,0 @@
-From: Eduardo Valentin <eduardo.valentin@indt.org.br>
-
-This patch adds support for mach-omap1 based on current
-mcbsp platform driver.
-
-Signed-off-by: Eduardo Valentin <eduardo.valentin@indt.org.br>
----
- arch/arm/mach-omap1/Makefile | 2 +
- arch/arm/mach-omap1/mcbsp.c | 165 ++++++++++++++++++++++++++++++++++++++++++
- 2 files changed, 167 insertions(+), 0 deletions(-)
- create mode 100644 arch/arm/mach-omap1/mcbsp.c
-
-diff --git a/arch/arm/mach-omap1/Makefile b/arch/arm/mach-omap1/Makefile
-index 6ebf23b..09246a7 100644
---- a/arch/arm/mach-omap1/Makefile
-+++ b/arch/arm/mach-omap1/Makefile
-@@ -5,6 +5,8 @@
- # Common support
- obj-y := io.o id.o clock.o irq.o mux.o serial.o devices.o
-
-+obj-$(CONFIG_OMAP_MCBSP) += mcbsp.o
-+
- obj-$(CONFIG_OMAP_MPU_TIMER) += time.o
- obj-$(CONFIG_OMAP_32K_TIMER) += timer32k.o
-
-diff --git a/arch/arm/mach-omap1/mcbsp.c b/arch/arm/mach-omap1/mcbsp.c
-new file mode 100644
-index 0000000..f30624a
---- /dev/null
-+++ b/arch/arm/mach-omap1/mcbsp.c
-@@ -0,0 +1,165 @@
-+/*
-+ * linux/arch/arm/mach-omap1/mcbsp.c
-+ *
-+ * Copyright (C) 2008 Instituto Nokia de Tecnologia
-+ * Contact: Eduardo Valentin <eduardo.valentin@indt.org.br>
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License version 2 as
-+ * published by the Free Software Foundation.
-+ *
-+ * Multichannel mode not supported.
-+ */
-+#include <linux/module.h>
-+#include <linux/init.h>
-+#include <linux/clk.h>
-+#include <linux/err.h>
-+#include <linux/io.h>
-+
-+#include <asm/arch/dma.h>
-+#include <asm/arch/mux.h>
-+#include <asm/arch/cpu.h>
-+#include <asm/arch/mcbsp.h>
-+#include <asm/arch/dsp_common.h>
-+
-+#define DPS_RSTCT2_PER_EN (1 << 0)
-+#define DSP_RSTCT2_WD_PER_EN (1 << 1)
-+
-+static int omap1_mcbsp_check(unsigned int id)
-+{
-+ /* REVISIT: Check correctly for number of registered McBSPs */
-+ if (cpu_is_omap730()) {
-+ if (id > OMAP_MAX_MCBSP_COUNT - 2) {
-+ printk(KERN_ERR "OMAP-McBSP: McBSP%d doesn't exist\n",
-+ id + 1);
-+ return -ENODEV;
-+ }
-+ return 0;
-+ }
-+
-+ if (cpu_is_omap15xx() || cpu_is_omap16xx()) {
-+ if (id > OMAP_MAX_MCBSP_COUNT - 1) {
-+ printk(KERN_ERR "OMAP-McBSP: McBSP%d doesn't exist\n",
-+ id + 1);
-+ return -ENODEV;
-+ }
-+ return 0;
-+ }
-+
-+ return -ENODEV;
-+}
-+
-+static void omap1_mcbsp_request(unsigned int id)
-+{
-+ /*
-+ * On 1510, 1610 and 1710, McBSP1 and McBSP3
-+ * are DSP public peripherals.
-+ */
-+ if (id == OMAP_MCBSP1 || id == OMAP_MCBSP3) {
-+ omap_dsp_request_mem();
-+ /*
-+ * DSP external peripheral reset
-+ * FIXME: This should be moved to dsp code
-+ */
-+ __raw_writew(__raw_readw(DSP_RSTCT2) | DPS_RSTCT2_PER_EN |
-+ DSP_RSTCT2_WD_PER_EN, DSP_RSTCT2);
-+ }
-+}
-+
-+static void omap1_mcbsp_free(unsigned int id)
-+{
-+ if (id == OMAP_MCBSP1 || id == OMAP_MCBSP3)
-+ omap_dsp_release_mem();
-+}
-+
-+static struct omap_mcbsp_ops omap1_mcbsp_ops = {
-+ .check = omap1_mcbsp_check,
-+ .request = omap1_mcbsp_request,
-+ .free = omap1_mcbsp_free,
-+};
-+
-+static struct omap_mcbsp_platform_data omap1_mcbsp_pdata[] = {
-+#ifdef CONFIG_ARCH_OMAP730
-+ {
-+ .virt_base = io_p2v(OMAP730_MCBSP1_BASE),
-+ .dma_rx_sync = OMAP_DMA_MCBSP1_RX,
-+ .dma_tx_sync = OMAP_DMA_MCBSP1_TX,
-+ .rx_irq = INT_730_McBSP1RX,
-+ .tx_irq = INT_730_McBSP1TX,
-+ .ops = &omap1_mcbsp_ops,
-+ },
-+ {
-+ .virt_base = io_p2v(OMAP730_MCBSP2_BASE),
-+ .dma_rx_sync = OMAP_DMA_MCBSP3_RX,
-+ .dma_tx_sync = OMAP_DMA_MCBSP3_TX,
-+ .rx_irq = INT_730_McBSP2RX,
-+ .tx_irq = INT_730_McBSP2TX
-+ .ops = &omap1_mcbsp_ops,
-+ },
-+#endif
-+#ifdef CONFIG_ARCH_OMAP15XX
-+ {
-+ .virt_base = OMAP1510_MCBSP1_BASE,
-+ .dma_rx_sync = OMAP_DMA_MCBSP1_RX,
-+ .dma_tx_sync = OMAP_DMA_MCBSP1_TX,
-+ .rx_irq = INT_McBSP1RX,
-+ .tx_irq = INT_McBSP1TX,
-+ .ops = &omap1_mcbsp_ops,
-+ .clocks = { "dsp_ck", "api_ck", "dspxor_ck" },
-+ },
-+ {
-+ .virt_base = io_p2v(OMAP1510_MCBSP2_BASE),
-+ .dma_rx_sync = OMAP_DMA_MCBSP2_RX,
-+ .dma_tx_sync = OMAP_DMA_MCBSP2_TX,
-+ .rx_irq = INT_1510_SPI_RX,
-+ .tx_irq = INT_1510_SPI_TX,
-+ .ops = &omap1_mcbsp_ops,
-+ },
-+ {
-+ .virt_base = OMAP1510_MCBSP3_BASE,
-+ .dma_rx_sync = OMAP_DMA_MCBSP3_RX,
-+ .dma_tx_sync = OMAP_DMA_MCBSP3_TX,
-+ .rx_irq = INT_McBSP3RX,
-+ .tx_irq = INT_McBSP3TX,
-+ .ops = &omap1_mcbsp_ops,
-+ .clocks = { "dsp_ck", "api_ck", "dspxor_ck" },
-+ },
-+#endif
-+#ifdef CONFIG_ARCH_OMAP16XX
-+ {
-+ .virt_base = OMAP1610_MCBSP1_BASE,
-+ .dma_rx_sync = OMAP_DMA_MCBSP1_RX,
-+ .dma_tx_sync = OMAP_DMA_MCBSP1_TX,
-+ .rx_irq = INT_McBSP1RX,
-+ .tx_irq = INT_McBSP1TX,
-+ .ops = &omap1_mcbsp_ops,
-+ .clocks = { "dsp_ck", "api_ck", "dspxor_ck" },
-+ },
-+ {
-+ .virt_base = io_p2v(OMAP1610_MCBSP2_BASE),
-+ .dma_rx_sync = OMAP_DMA_MCBSP2_RX,
-+ .dma_tx_sync = OMAP_DMA_MCBSP2_TX,
-+ .rx_irq = INT_1610_McBSP2_RX,
-+ .tx_irq = INT_1610_McBSP2_TX,
-+ .ops = &omap1_mcbsp_ops,
-+ },
-+ {
-+ .virt_base = OMAP1610_MCBSP3_BASE,
-+ .dma_rx_sync = OMAP_DMA_MCBSP3_RX,
-+ .dma_tx_sync = OMAP_DMA_MCBSP3_TX,
-+ .rx_irq = INT_McBSP3RX,
-+ .tx_irq = INT_McBSP3TX,
-+ .ops = &omap1_mcbsp_ops,
-+ .clocks = { "dsp_ck", "api_ck", "dspxor_ck" },
-+ },
-+#endif
-+};
-+#define mcbsp_count ARRAY_SIZE(omap1_mcbsp_pdata)
-+
-+int __init omap1_mcbsp_init(void)
-+{
-+ omap_mcbsp_register_board_cfg(omap1_mcbsp_pdata, mcbsp_count);
-+
-+ return omap_mcbsp_init();
-+}
-+arch_initcall(omap1_mcbsp_init);
---
-1.5.5.1.67.gbdb8.dirty
-
---
-To unsubscribe from this list: send the line "unsubscribe linux-omap" in
-the body of a message to majordomo@vger.kernel.org
-More majordomo info at http://vger.kernel.org/majordomo-info.html
-
diff --git a/packages/linux/linux-omap2-git/beagleboard/00003-mcbsp-omap3-clock.patch b/packages/linux/linux-omap2-git/beagleboard/00003-mcbsp-omap3-clock.patch
deleted file mode 100644
index 643a626f30..0000000000
--- a/packages/linux/linux-omap2-git/beagleboard/00003-mcbsp-omap3-clock.patch
+++ /dev/null
@@ -1,123 +0,0 @@
-From: Eduardo Valentin <eduardo.valentin@indt.org.br>
-
-This patch fix the clock definition for mcbsps on clock34xx.h.
-Device identification must be done using .id field, not
-only name field.
-
-Signed-off-by: Eduardo Valentin <eduardo.valentin@indt.org.br>
----
- arch/arm/mach-omap2/clock34xx.h | 30 ++++++++++++++++++++----------
- 1 files changed, 20 insertions(+), 10 deletions(-)
-
-diff --git a/arch/arm/mach-omap2/clock34xx.h b/arch/arm/mach-omap2/clock34xx.h
-index 85afe1e..3fea82e 100644
---- a/arch/arm/mach-omap2/clock34xx.h
-+++ b/arch/arm/mach-omap2/clock34xx.h
-@@ -1480,7 +1480,8 @@ static const struct clksel mcbsp_15_clksel[] = {
- };
-
- static struct clk mcbsp5_fck = {
-- .name = "mcbsp5_fck",
-+ .name = "mcbsp_fck",
-+ .id = 5,
- .init = &omap2_init_clksel_parent,
- .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1),
- .enable_bit = OMAP3430_EN_MCBSP5_SHIFT,
-@@ -1493,7 +1494,8 @@ static struct clk mcbsp5_fck = {
- };
-
- static struct clk mcbsp1_fck = {
-- .name = "mcbsp1_fck",
-+ .name = "mcbsp_fck",
-+ .id = 1,
- .init = &omap2_init_clksel_parent,
- .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1),
- .enable_bit = OMAP3430_EN_MCBSP1_SHIFT,
-@@ -1941,7 +1943,8 @@ static struct clk gpt10_ick = {
- };
-
- static struct clk mcbsp5_ick = {
-- .name = "mcbsp5_ick",
-+ .name = "mcbsp_ick",
-+ .id = 5,
- .parent = &core_l4_ick,
- .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1),
- .enable_bit = OMAP3430_EN_MCBSP5_SHIFT,
-@@ -1951,7 +1954,8 @@ static struct clk mcbsp5_ick = {
- };
-
- static struct clk mcbsp1_ick = {
-- .name = "mcbsp1_ick",
-+ .name = "mcbsp_ick",
-+ .id = 1,
- .parent = &core_l4_ick,
- .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1),
- .enable_bit = OMAP3430_EN_MCBSP1_SHIFT,
-@@ -2754,7 +2758,8 @@ static struct clk gpt2_ick = {
- };
-
- static struct clk mcbsp2_ick = {
-- .name = "mcbsp2_ick",
-+ .name = "mcbsp_ick",
-+ .id = 2,
- .parent = &per_l4_ick,
- .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_ICLKEN),
- .enable_bit = OMAP3430_EN_MCBSP2_SHIFT,
-@@ -2764,7 +2769,8 @@ static struct clk mcbsp2_ick = {
- };
-
- static struct clk mcbsp3_ick = {
-- .name = "mcbsp3_ick",
-+ .name = "mcbsp_ick",
-+ .id = 3,
- .parent = &per_l4_ick,
- .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_ICLKEN),
- .enable_bit = OMAP3430_EN_MCBSP3_SHIFT,
-@@ -2774,7 +2780,8 @@ static struct clk mcbsp3_ick = {
- };
-
- static struct clk mcbsp4_ick = {
-- .name = "mcbsp4_ick",
-+ .name = "mcbsp_ick",
-+ .id = 4,
- .parent = &per_l4_ick,
- .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_ICLKEN),
- .enable_bit = OMAP3430_EN_MCBSP4_SHIFT,
-@@ -2790,7 +2797,8 @@ static const struct clksel mcbsp_234_clksel[] = {
- };
-
- static struct clk mcbsp2_fck = {
-- .name = "mcbsp2_fck",
-+ .name = "mcbsp_fck",
-+ .id = 2,
- .init = &omap2_init_clksel_parent,
- .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN),
- .enable_bit = OMAP3430_EN_MCBSP2_SHIFT,
-@@ -2803,7 +2811,8 @@ static struct clk mcbsp2_fck = {
- };
-
- static struct clk mcbsp3_fck = {
-- .name = "mcbsp3_fck",
-+ .name = "mcbsp_fck",
-+ .id = 3,
- .init = &omap2_init_clksel_parent,
- .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN),
- .enable_bit = OMAP3430_EN_MCBSP3_SHIFT,
-@@ -2816,7 +2825,8 @@ static struct clk mcbsp3_fck = {
- };
-
- static struct clk mcbsp4_fck = {
-- .name = "mcbsp4_fck",
-+ .name = "mcbsp_fck",
-+ .id = 4,
- .init = &omap2_init_clksel_parent,
- .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN),
- .enable_bit = OMAP3430_EN_MCBSP4_SHIFT,
---
-1.5.5.1.67.gbdb8.dirty
-
---
-To unsubscribe from this list: send the line "unsubscribe linux-omap" in
-the body of a message to majordomo@vger.kernel.org
-More majordomo info at http://vger.kernel.org/majordomo-info.html
-
diff --git a/packages/linux/linux-omap2-git/beagleboard/00004-omap2-mcbsp.patch b/packages/linux/linux-omap2-git/beagleboard/00004-omap2-mcbsp.patch
deleted file mode 100644
index 4e42a11a17..0000000000
--- a/packages/linux/linux-omap2-git/beagleboard/00004-omap2-mcbsp.patch
+++ /dev/null
@@ -1,144 +0,0 @@
-From: Eduardo Valentin <eduardo.valentin@indt.org.br>
-
-This patch adds support for mach-omap2 based on current
-mcbsp platform driver.
-
-Signed-off-by: Eduardo Valentin <eduardo.valentin@indt.org.br>
----
- arch/arm/mach-omap2/Makefile | 2 +
- arch/arm/mach-omap2/mcbsp.c | 105 ++++++++++++++++++++++++++++++++++++++++++
- 2 files changed, 107 insertions(+), 0 deletions(-)
- create mode 100644 arch/arm/mach-omap2/mcbsp.c
-
-diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
-index 552664c..84fa698 100644
---- a/arch/arm/mach-omap2/Makefile
-+++ b/arch/arm/mach-omap2/Makefile
-@@ -7,6 +7,8 @@ obj-y := irq.o id.o io.o memory.o control.o prcm.o clock.o mux.o \
- devices.o serial.o gpmc.o timer-gp.o powerdomain.o \
- clockdomain.o
-
-+obj-$(CONFIG_OMAP_MCBSP) += mcbsp.o
-+
- # Functions loaded to SRAM
- obj-$(CONFIG_ARCH_OMAP2) += sram24xx.o
-
-diff --git a/arch/arm/mach-omap2/mcbsp.c b/arch/arm/mach-omap2/mcbsp.c
-new file mode 100644
-index 0000000..e2ee8f7
---- /dev/null
-+++ b/arch/arm/mach-omap2/mcbsp.c
-@@ -0,0 +1,105 @@
-+/*
-+ * linux/arch/arm/mach-omap2/mcbsp.c
-+ *
-+ * Copyright (C) 2008 Instituto Nokia de Tecnologia
-+ * Contact: Eduardo Valentin <eduardo.valentin@indt.org.br>
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License version 2 as
-+ * published by the Free Software Foundation.
-+ *
-+ * Multichannel mode not supported.
-+ */
-+#include <linux/module.h>
-+#include <linux/init.h>
-+#include <linux/clk.h>
-+#include <linux/err.h>
-+
-+#include <asm/arch/dma.h>
-+#include <asm/arch/mux.h>
-+#include <asm/arch/cpu.h>
-+#include <asm/arch/mcbsp.h>
-+
-+static void omap2_mcbsp2_mux_setup(void)
-+{
-+ omap_cfg_reg(Y15_24XX_MCBSP2_CLKX);
-+ omap_cfg_reg(R14_24XX_MCBSP2_FSX);
-+ omap_cfg_reg(W15_24XX_MCBSP2_DR);
-+ omap_cfg_reg(V15_24XX_MCBSP2_DX);
-+ omap_cfg_reg(V14_24XX_GPIO117);
-+ /*
-+ * TODO: Need to add MUX settings for OMAP 2430 SDP
-+ */
-+}
-+
-+static void omap2_mcbsp_request(unsigned int id)
-+{
-+ if (cpu_is_omap2420() && (id == OMAP_MCBSP2))
-+ omap2_mcbsp2_mux_setup();
-+}
-+
-+static int omap2_mcbsp_check(unsigned int id)
-+{
-+ if (id > OMAP_MAX_MCBSP_COUNT - 1) {
-+ printk(KERN_ERR "OMAP-McBSP: McBSP%d doesn't exist\n", id + 1);
-+ return -ENODEV;
-+ }
-+ return 0;
-+}
-+
-+static struct omap_mcbsp_ops omap2_mcbsp_ops = {
-+ .request = omap2_mcbsp_request,
-+ .check = omap2_mcbsp_check,
-+};
-+
-+static struct omap_mcbsp_platform_data omap2_mcbsp_pdata[] = {
-+#ifdef CONFIG_ARCH_OMAP24XX
-+ {
-+ .virt_base = IO_ADDRESS(OMAP24XX_MCBSP1_BASE),
-+ .dma_rx_sync = OMAP24XX_DMA_MCBSP1_RX,
-+ .dma_tx_sync = OMAP24XX_DMA_MCBSP1_TX,
-+ .rx_irq = INT_24XX_MCBSP1_IRQ_RX,
-+ .tx_irq = INT_24XX_MCBSP1_IRQ_TX,
-+ .ops = &omap2_mcbsp_ops,
-+ .clocks = { "mcbsp_ick", "mcbsp_fck" },
-+ },
-+ {
-+ .virt_base = IO_ADDRESS(OMAP24XX_MCBSP2_BASE),
-+ .dma_rx_sync = OMAP24XX_DMA_MCBSP2_RX,
-+ .dma_tx_sync = OMAP24XX_DMA_MCBSP2_TX,
-+ .rx_irq = INT_24XX_MCBSP2_IRQ_RX,
-+ .tx_irq = INT_24XX_MCBSP2_IRQ_TX,
-+ .ops = &omap2_mcbsp_ops,
-+ .clocks = { "mcbsp_ick", "mcbsp_fck" },
-+ },
-+#endif
-+#ifdef CONFIG_ARCH_OMAP34XX
-+ {
-+ .virt_base = IO_ADDRESS(OMAP34XX_MCBSP1_BASE),
-+ .dma_rx_sync = OMAP24XX_DMA_MCBSP1_RX,
-+ .dma_tx_sync = OMAP24XX_DMA_MCBSP1_TX,
-+ .rx_irq = INT_24XX_MCBSP1_IRQ_RX,
-+ .tx_irq = INT_24XX_MCBSP1_IRQ_TX,
-+ .ops = &omap2_mcbsp_ops,
-+ .clocks = { "mcbsp_ick", "mcbsp_fck" },
-+ },
-+ {
-+ .virt_base = IO_ADDRESS(OMAP34XX_MCBSP2_BASE),
-+ .dma_rx_sync = OMAP24XX_DMA_MCBSP2_RX,
-+ .dma_tx_sync = OMAP24XX_DMA_MCBSP2_TX,
-+ .rx_irq = INT_24XX_MCBSP2_IRQ_RX,
-+ .tx_irq = INT_24XX_MCBSP2_IRQ_TX,
-+ .ops = &omap2_mcbsp_ops,
-+ .clocks = { "mcbsp_ick", "mcbsp_fck" },
-+ },
-+#endif
-+};
-+#define mcbsp_count ARRAY_SIZE(omap2_mcbsp_pdata)
-+
-+int __init omap2_mcbsp_init(void)
-+{
-+ omap_mcbsp_register_board_cfg(omap2_mcbsp_pdata, mcbsp_count);
-+
-+ return omap_mcbsp_init();
-+}
-+arch_initcall(omap2_mcbsp_init);
---
-1.5.5.1.67.gbdb8.dirty
-
---
-To unsubscribe from this list: send the line "unsubscribe linux-omap" in
-the body of a message to majordomo@vger.kernel.org
-More majordomo info at http://vger.kernel.org/majordomo-info.html
-
diff --git a/packages/linux/linux-omap2-git/beagleboard/0001-omap3-cpuidle.patch b/packages/linux/linux-omap2-git/beagleboard/0001-omap3-cpuidle.patch
new file mode 100644
index 0000000000..28b1ef2214
--- /dev/null
+++ b/packages/linux/linux-omap2-git/beagleboard/0001-omap3-cpuidle.patch
@@ -0,0 +1,450 @@
+From: "Rajendra Nayak" <rnayak@ti.com>
+To: <linux-omap@vger.kernel.org>
+Subject: [PATCH 01/02] OMAP3 CPUidle driver
+Date: Tue, 10 Jun 2008 12:39:00 +0530
+
+This patch adds the OMAP3 cpuidle driver. Irq enable/disable is done in the core cpuidle driver
+before it queries the governor for the next state.
+
+Signed-off-by: Rajendra Nayak <rnayak@ti.com>
+
+---
+ arch/arm/mach-omap2/Makefile | 2
+ arch/arm/mach-omap2/cpuidle34xx.c | 293 ++++++++++++++++++++++++++++++++++++++
+ arch/arm/mach-omap2/cpuidle34xx.h | 51 ++++++
+ arch/arm/mach-omap2/pm34xx.c | 5
+ drivers/cpuidle/cpuidle.c | 10 +
+ 5 files changed, 359 insertions(+), 2 deletions(-)
+
+Index: linux-omap-2.6/arch/arm/mach-omap2/Makefile
+===================================================================
+--- linux-omap-2.6.orig/arch/arm/mach-omap2/Makefile 2008-06-09 20:15:33.855303920 +0530
++++ linux-omap-2.6/arch/arm/mach-omap2/Makefile 2008-06-09 20:15:39.569121361 +0530
+@@ -20,7 +20,7 @@ obj-y += pm.o
+ obj-$(CONFIG_ARCH_OMAP2) += pm24xx.o
+ obj-$(CONFIG_ARCH_OMAP2420) += sleep242x.o
+ obj-$(CONFIG_ARCH_OMAP2430) += sleep243x.o
+-obj-$(CONFIG_ARCH_OMAP3) += pm34xx.o sleep34xx.o
++obj-$(CONFIG_ARCH_OMAP3) += pm34xx.o sleep34xx.o cpuidle34xx.o
+ obj-$(CONFIG_PM_DEBUG) += pm-debug.o
+ endif
+
+Index: linux-omap-2.6/arch/arm/mach-omap2/cpuidle34xx.c
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-omap-2.6/arch/arm/mach-omap2/cpuidle34xx.c 2008-06-10 11:41:27.644820323 +0530
+@@ -0,0 +1,293 @@
++/*
++ * linux/arch/arm/mach-omap2/cpuidle34xx.c
++ *
++ * OMAP3 CPU IDLE Routines
++ *
++ * Copyright (C) 2007-2008 Texas Instruments, Inc.
++ * Rajendra Nayak <rnayak@ti.com>
++ *
++ * Copyright (C) 2007 Texas Instruments, Inc.
++ * Karthik Dasu <karthik-dp@ti.com>
++ *
++ * Copyright (C) 2006 Nokia Corporation
++ * Tony Lindgren <tony@atomide.com>
++ *
++ * Copyright (C) 2005 Texas Instruments, Inc.
++ * Richard Woodruff <r-woodruff2@ti.com>
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++
++#include <linux/cpuidle.h>
++#include <asm/arch/pm.h>
++#include <asm/arch/prcm.h>
++#include <asm/arch/powerdomain.h>
++#include <asm/arch/clockdomain.h>
++#include <asm/arch/irqs.h>
++#include "cpuidle34xx.h"
++
++#ifdef CONFIG_CPU_IDLE
++
++struct omap3_processor_cx omap3_power_states[OMAP3_MAX_STATES];
++struct omap3_processor_cx current_cx_state;
++
++static int omap3_idle_bm_check(void)
++{
++ /* Check for omap3_fclks_active() here once available */
++ return 0;
++}
++
++/* omap3_enter_idle - Programs OMAP3 to enter the specified state.
++ * returns the total time during which the system was idle.
++ */
++static int omap3_enter_idle(struct cpuidle_device *dev,
++ struct cpuidle_state *state)
++{
++ struct omap3_processor_cx *cx = cpuidle_get_statedata(state);
++ struct timespec ts_preidle, ts_postidle, ts_idle;
++ struct powerdomain *mpu_pd, *core_pd, *per_pd, *neon_pd;
++ int neon_pwrst;
++
++ current_cx_state = *cx;
++
++ if (cx->type == OMAP3_STATE_C0) {
++ /* Do nothing for C0, not even a wfi */
++ return 0;
++ }
++
++ /* Used to keep track of the total time in idle */
++ getnstimeofday(&ts_preidle);
++
++ mpu_pd = pwrdm_lookup("mpu_pwrdm");
++ core_pd = pwrdm_lookup("core_pwrdm");
++ per_pd = pwrdm_lookup("per_pwrdm");
++ neon_pd = pwrdm_lookup("neon_pwrdm");
++
++ /* Reset previous power state registers */
++ pwrdm_clear_all_prev_pwrst(mpu_pd);
++ pwrdm_clear_all_prev_pwrst(neon_pd);
++ pwrdm_clear_all_prev_pwrst(core_pd);
++ pwrdm_clear_all_prev_pwrst(per_pd);
++
++ if (omap_irq_pending())
++ return 0;
++
++ neon_pwrst = pwrdm_read_pwrst(neon_pd);
++
++ /* Program MPU/NEON to target state */
++ if (cx->mpu_state < PWRDM_POWER_ON) {
++ if (neon_pwrst == PWRDM_POWER_ON) {
++ if (cx->mpu_state == PWRDM_POWER_RET)
++ pwrdm_set_next_pwrst(neon_pd, PWRDM_POWER_RET);
++ else if (cx->mpu_state == PWRDM_POWER_OFF)
++ pwrdm_set_next_pwrst(neon_pd, PWRDM_POWER_OFF);
++ }
++ pwrdm_set_next_pwrst(mpu_pd, cx->mpu_state);
++ }
++
++ /* Program CORE to target state */
++ if (cx->core_state < PWRDM_POWER_ON)
++ pwrdm_set_next_pwrst(core_pd, cx->core_state);
++
++ /* Execute ARM wfi */
++ omap_sram_idle();
++
++ /* Program MPU/NEON to ON */
++ if (cx->mpu_state < PWRDM_POWER_ON) {
++ if (neon_pwrst == PWRDM_POWER_ON)
++ pwrdm_set_next_pwrst(neon_pd, PWRDM_POWER_ON);
++ pwrdm_set_next_pwrst(mpu_pd, PWRDM_POWER_ON);
++ }
++
++ if (cx->core_state < PWRDM_POWER_ON)
++ pwrdm_set_next_pwrst(core_pd, PWRDM_POWER_ON);
++
++ getnstimeofday(&ts_postidle);
++ ts_idle = timespec_sub(ts_postidle, ts_preidle);
++ return timespec_to_ns(&ts_idle);
++}
++
++/*
++ * omap3_enter_idle_bm - enter function for states with CPUIDLE_FLAG_CHECK_BM
++ *
++ * This function checks for all the pre-requisites needed for OMAP3 to enter
++ * CORE RET/OFF state. It then calls omap3_enter_idle to program the desired
++ * C state.
++ */
++static int omap3_enter_idle_bm(struct cpuidle_device *dev,
++ struct cpuidle_state *state)
++{
++ struct cpuidle_state *new_state = NULL;
++ int i, j;
++
++ if ((state->flags & CPUIDLE_FLAG_CHECK_BM) && omap3_idle_bm_check()) {
++
++ /* Find current state in list */
++ for (i = 0; i < OMAP3_MAX_STATES; i++)
++ if (state == &dev->states[i])
++ break;
++ BUG_ON(i == OMAP3_MAX_STATES);
++
++ /* Back up to non 'CHECK_BM' state */
++ for (j = i - 1; j > 0; j--) {
++ struct cpuidle_state *s = &dev->states[j];
++
++ if (!(s->flags & CPUIDLE_FLAG_CHECK_BM)) {
++ new_state = s;
++ break;
++ }
++ }
++
++ pr_debug("%s: Bus activity: Entering %s (instead of %s)\n",
++ __FUNCTION__, new_state->name, state->name);
++ }
++
++ return omap3_enter_idle(dev, new_state ? : state);
++}
++
++DEFINE_PER_CPU(struct cpuidle_device, omap3_idle_dev);
++
++/* omap3_init_power_states - Initialises the OMAP3 specific C states.
++ * Below is the desciption of each C state.
++ *
++ C0 . System executing code
++ C1 . MPU WFI + Core active
++ C2 . MPU CSWR + Core active
++ C3 . MPU OFF + Core active
++ C4 . MPU CSWR + Core CSWR
++ C5 . MPU OFF + Core CSWR
++ C6 . MPU OFF + Core OFF
++ */
++void omap_init_power_states(void)
++{
++ /* C0 . System executing code */
++ omap3_power_states[0].valid = 1;
++ omap3_power_states[0].type = OMAP3_STATE_C0;
++ omap3_power_states[0].sleep_latency = 0;
++ omap3_power_states[0].wakeup_latency = 0;
++ omap3_power_states[0].threshold = 0;
++ omap3_power_states[0].mpu_state = PWRDM_POWER_ON;
++ omap3_power_states[0].core_state = PWRDM_POWER_ON;
++ omap3_power_states[0].flags = CPUIDLE_FLAG_TIME_VALID |
++ CPUIDLE_FLAG_SHALLOW;
++
++ /* C1 . MPU WFI + Core active */
++ omap3_power_states[1].valid = 1;
++ omap3_power_states[1].type = OMAP3_STATE_C1;
++ omap3_power_states[1].sleep_latency = 10;
++ omap3_power_states[1].wakeup_latency = 10;
++ omap3_power_states[1].threshold = 30;
++ omap3_power_states[1].mpu_state = PWRDM_POWER_ON;
++ omap3_power_states[1].core_state = PWRDM_POWER_ON;
++ omap3_power_states[1].flags = CPUIDLE_FLAG_TIME_VALID |
++ CPUIDLE_FLAG_SHALLOW;
++
++ /* C2 . MPU CSWR + Core active */
++ omap3_power_states[2].valid = 1;
++ omap3_power_states[2].type = OMAP3_STATE_C2;
++ omap3_power_states[2].sleep_latency = 50;
++ omap3_power_states[2].wakeup_latency = 50;
++ omap3_power_states[2].threshold = 300;
++ omap3_power_states[2].mpu_state = PWRDM_POWER_RET;
++ omap3_power_states[2].core_state = PWRDM_POWER_ON;
++ omap3_power_states[2].flags = CPUIDLE_FLAG_TIME_VALID |
++ CPUIDLE_FLAG_BALANCED;
++
++ /* C3 . MPU OFF + Core active */
++ omap3_power_states[3].valid = 0;
++ omap3_power_states[3].type = OMAP3_STATE_C3;
++ omap3_power_states[3].sleep_latency = 1500;
++ omap3_power_states[3].wakeup_latency = 1800;
++ omap3_power_states[3].threshold = 4000;
++ omap3_power_states[3].mpu_state = PWRDM_POWER_OFF;
++ omap3_power_states[3].core_state = PWRDM_POWER_RET;
++ omap3_power_states[3].flags = CPUIDLE_FLAG_TIME_VALID |
++ CPUIDLE_FLAG_BALANCED;
++
++ /* C4 . MPU CSWR + Core CSWR*/
++ omap3_power_states[4].valid = 1;
++ omap3_power_states[4].type = OMAP3_STATE_C4;
++ omap3_power_states[4].sleep_latency = 2500;
++ omap3_power_states[4].wakeup_latency = 7500;
++ omap3_power_states[4].threshold = 12000;
++ omap3_power_states[4].mpu_state = PWRDM_POWER_RET;
++ omap3_power_states[4].core_state = PWRDM_POWER_RET;
++ omap3_power_states[4].flags = CPUIDLE_FLAG_TIME_VALID |
++ CPUIDLE_FLAG_BALANCED | CPUIDLE_FLAG_CHECK_BM;
++
++ /* C5 . MPU OFF + Core CSWR */
++ omap3_power_states[5].valid = 0;
++ omap3_power_states[5].type = OMAP3_STATE_C5;
++ omap3_power_states[5].sleep_latency = 3000;
++ omap3_power_states[5].wakeup_latency = 8500;
++ omap3_power_states[5].threshold = 15000;
++ omap3_power_states[5].mpu_state = PWRDM_POWER_OFF;
++ omap3_power_states[5].core_state = PWRDM_POWER_RET;
++ omap3_power_states[5].flags = CPUIDLE_FLAG_TIME_VALID |
++ CPUIDLE_FLAG_BALANCED | CPUIDLE_FLAG_CHECK_BM;
++
++ /* C6 . MPU OFF + Core OFF */
++ omap3_power_states[6].valid = 0;
++ omap3_power_states[6].type = OMAP3_STATE_C6;
++ omap3_power_states[6].sleep_latency = 10000;
++ omap3_power_states[6].wakeup_latency = 30000;
++ omap3_power_states[6].threshold = 300000;
++ omap3_power_states[6].mpu_state = PWRDM_POWER_OFF;
++ omap3_power_states[6].core_state = PWRDM_POWER_OFF;
++ omap3_power_states[6].flags = CPUIDLE_FLAG_TIME_VALID |
++ CPUIDLE_FLAG_DEEP | CPUIDLE_FLAG_CHECK_BM;
++}
++
++struct cpuidle_driver omap3_idle_driver = {
++ .name = "omap3_idle",
++ .owner = THIS_MODULE,
++};
++/*
++ * omap3_idle_init - Init routine for OMAP3 idle.
++ * Registers the OMAP3 specific cpuidle driver with the cpuidle f/w
++ * with the valid set of states.
++ */
++int omap3_idle_init(void)
++{
++ int i, count = 0;
++ struct omap3_processor_cx *cx;
++ struct cpuidle_state *state;
++ struct cpuidle_device *dev;
++
++ omap_init_power_states();
++ cpuidle_register_driver(&omap3_idle_driver);
++
++ dev = &per_cpu(omap3_idle_dev, smp_processor_id());
++
++ for (i = 0; i < OMAP3_MAX_STATES; i++) {
++ cx = &omap3_power_states[i];
++ state = &dev->states[count];
++
++ if (!cx->valid)
++ continue;
++ cpuidle_set_statedata(state, cx);
++ state->exit_latency = cx->sleep_latency + cx->wakeup_latency;
++ state->target_residency = cx->threshold;
++ state->flags = cx->flags;
++ state->enter = (state->flags & CPUIDLE_FLAG_CHECK_BM) ?
++ omap3_enter_idle_bm : omap3_enter_idle;
++ sprintf(state->name, "C%d", count+1);
++ count++;
++ }
++
++ if (!count)
++ return -EINVAL;
++ dev->state_count = count;
++
++ if (cpuidle_register_device(dev)) {
++ printk(KERN_ERR "%s: CPUidle register device failed\n",
++ __FUNCTION__);
++ return -EIO;
++ }
++
++ return 0;
++}
++__initcall(omap3_idle_init);
++#endif /* CONFIG_CPU_IDLE */
+Index: linux-omap-2.6/arch/arm/mach-omap2/cpuidle34xx.h
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-omap-2.6/arch/arm/mach-omap2/cpuidle34xx.h 2008-06-09 20:15:39.569121361 +0530
+@@ -0,0 +1,51 @@
++/*
++ * linux/arch/arm/mach-omap2/cpuidle34xx.h
++ *
++ * OMAP3 cpuidle structure definitions
++ *
++ * Copyright (C) 2007-2008 Texas Instruments, Inc.
++ * Written by Rajendra Nayak <rnayak@ti.com>
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ *
++ * THIS PACKAGE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR
++ * IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED
++ * WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE.
++ *
++ * History:
++ *
++ */
++
++#ifndef ARCH_ARM_MACH_OMAP2_CPUIDLE_34XX
++#define ARCH_ARM_MACH_OMAP2_CPUIDLE_34XX
++
++#define OMAP3_MAX_STATES 7
++#define OMAP3_STATE_C0 0 /* C0 - System executing code */
++#define OMAP3_STATE_C1 1 /* C1 - MPU WFI + Core active */
++#define OMAP3_STATE_C2 2 /* C2 - MPU CSWR + Core active */
++#define OMAP3_STATE_C3 3 /* C3 - MPU OFF + Core active */
++#define OMAP3_STATE_C4 4 /* C4 - MPU RET + Core RET */
++#define OMAP3_STATE_C5 5 /* C5 - MPU OFF + Core RET */
++#define OMAP3_STATE_C6 6 /* C6 - MPU OFF + Core OFF */
++
++extern void omap_sram_idle(void);
++extern int omap3_irq_pending(void);
++
++struct omap3_processor_cx {
++ u8 valid;
++ u8 type;
++ u32 sleep_latency;
++ u32 wakeup_latency;
++ u32 mpu_state;
++ u32 core_state;
++ u32 threshold;
++ u32 flags;
++};
++
++void omap_init_power_states(void);
++int omap3_idle_init(void);
++
++#endif /* ARCH_ARM_MACH_OMAP2_CPUIDLE_34XX */
++
+Index: linux-omap-2.6/arch/arm/mach-omap2/pm34xx.c
+===================================================================
+--- linux-omap-2.6.orig/arch/arm/mach-omap2/pm34xx.c 2008-06-09 20:15:33.855303920 +0530
++++ linux-omap-2.6/arch/arm/mach-omap2/pm34xx.c 2008-06-09 20:16:20.976798343 +0530
+@@ -141,7 +141,7 @@ static irqreturn_t prcm_interrupt_handle
+ return IRQ_HANDLED;
+ }
+
+-static void omap_sram_idle(void)
++void omap_sram_idle(void)
+ {
+ /* Variable to tell what needs to be saved and restored
+ * in omap_sram_idle*/
+@@ -156,6 +156,7 @@ static void omap_sram_idle(void)
+
+ mpu_next_state = pwrdm_read_next_pwrst(mpu_pwrdm);
+ switch (mpu_next_state) {
++ case PWRDM_POWER_ON:
+ case PWRDM_POWER_RET:
+ /* No need to save context */
+ save_state = 0;
+@@ -386,7 +387,9 @@ int __init omap3_pm_init(void)
+
+ prcm_setup_regs();
+
++#ifndef CONFIG_CPU_IDLE
+ pm_idle = omap3_pm_idle;
++#endif
+
+ err1:
+ return ret;
+Index: linux-omap-2.6/drivers/cpuidle/cpuidle.c
+===================================================================
+--- linux-omap-2.6.orig/drivers/cpuidle/cpuidle.c 2008-06-09 20:15:33.856303888 +0530
++++ linux-omap-2.6/drivers/cpuidle/cpuidle.c 2008-06-09 20:15:39.570121329 +0530
+@@ -58,6 +58,11 @@ static void cpuidle_idle_call(void)
+ return;
+ }
+
++#ifdef CONFIG_ARCH_OMAP3
++ local_irq_disable();
++ local_fiq_disable();
++#endif
++
+ /* ask the governor for the next state */
+ next_state = cpuidle_curr_governor->select(dev);
+ if (need_resched())
+@@ -70,6 +75,11 @@ static void cpuidle_idle_call(void)
+ target_state->time += (unsigned long long)dev->last_residency;
+ target_state->usage++;
+
++#ifdef CONFIG_ARCH_OMAP3
++ local_irq_enable();
++ local_fiq_enable();
++#endif
++
+ /* give the governor an opportunity to reflect on the outcome */
+ if (cpuidle_curr_governor->reflect)
+ cpuidle_curr_governor->reflect(dev);
+
+--
+To unsubscribe from this list: send the line "unsubscribe linux-omap" in
+the body of a message to majordomo@vger.kernel.org
+More majordomo info at http://vger.kernel.org/majordomo-info.html
+
diff --git a/packages/linux/linux-omap2-git/beagleboard/0002-omap3-cpuidle.patch b/packages/linux/linux-omap2-git/beagleboard/0002-omap3-cpuidle.patch
new file mode 100644
index 0000000000..c17c690fe1
--- /dev/null
+++ b/packages/linux/linux-omap2-git/beagleboard/0002-omap3-cpuidle.patch
@@ -0,0 +1,88 @@
+From: "Rajendra Nayak" <rnayak@ti.com>
+To: <linux-omap@vger.kernel.org>
+Subject: [PATCH 02/02] Kconfig changes
+Date: Tue, 10 Jun 2008 12:39:02 +0530
+
+Updates the CPUidle Kconfig
+
+Signed-off-by: Rajendra Nayak <rnayak@ti.com>
+
+---
+ arch/arm/Kconfig | 10 ++++++++++
+ drivers/cpuidle/Kconfig | 28 ++++++++++++++++++++++------
+ 2 files changed, 32 insertions(+), 6 deletions(-)
+
+Index: linux-omap-2.6/arch/arm/Kconfig
+===================================================================
+--- linux-omap-2.6.orig/arch/arm/Kconfig 2008-06-10 11:43:10.790502713 +0530
++++ linux-omap-2.6/arch/arm/Kconfig 2008-06-10 11:43:38.701604549 +0530
+@@ -954,6 +954,16 @@ config ATAGS_PROC
+
+ endmenu
+
++if (ARCH_OMAP)
++
++menu "CPUIdle"
++
++source "drivers/cpuidle/Kconfig"
++
++endmenu
++
++endif
++
+ if (ARCH_SA1100 || ARCH_INTEGRATOR || ARCH_OMAP || ARCH_IMX || ARCH_PXA)
+
+ menu "CPU Frequency scaling"
+Index: linux-omap-2.6/drivers/cpuidle/Kconfig
+===================================================================
+--- linux-omap-2.6.orig/drivers/cpuidle/Kconfig 2008-06-10 11:43:10.790502713 +0530
++++ linux-omap-2.6/drivers/cpuidle/Kconfig 2008-06-10 12:06:36.139332151 +0530
+@@ -1,20 +1,36 @@
++menu "CPU idle PM support"
+
+ config CPU_IDLE
+ bool "CPU idle PM support"
+- default ACPI
++ default n
+ help
+ CPU idle is a generic framework for supporting software-controlled
+ idle processor power management. It includes modular cross-platform
+ governors that can be swapped during runtime.
+
+- If you're using an ACPI-enabled platform, you should say Y here.
++ If you're using a mobile platform that supports CPU idle PM (e.g.
++ an ACPI-capable notebook), you should say Y here.
++
++if CPU_IDLE
++
++comment "Governors"
+
+ config CPU_IDLE_GOV_LADDER
+- bool
++ bool "ladder"
+ depends on CPU_IDLE
+- default y
++ default n
+
+ config CPU_IDLE_GOV_MENU
+- bool
++ bool "menu"
+ depends on CPU_IDLE && NO_HZ
+- default y
++ default n
++ help
++ This cpuidle governor evaluates all available states and chooses the
++ deepest state that meets all of the following constraints: BM activity,
++ expected time until next timer interrupt, and last break event time
++ delta. It is designed to minimize power consumption. Currently
++ dynticks is required.
++
++endif # CPU_IDLE
++
++endmenu
+
+--
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+the body of a message to majordomo@vger.kernel.org
+More majordomo info at http://vger.kernel.org/majordomo-info.html
+
diff --git a/packages/linux/linux-omap2-git/beagleboard/defconfig b/packages/linux/linux-omap2-git/beagleboard/defconfig
index fd310de701..0936becec2 100644
--- a/packages/linux/linux-omap2-git/beagleboard/defconfig
+++ b/packages/linux/linux-omap2-git/beagleboard/defconfig
@@ -1,7 +1,7 @@
#
# Automatically generated make config: don't edit
-# Linux kernel version: 2.6.26-rc4-omap1
-# Mon Jun 2 14:01:16 2008
+# Linux kernel version: 2.6.26-rc5-omap1
+# Tue Jun 10 21:11:56 2008
#
CONFIG_ARM=y
CONFIG_SYS_SUPPORTS_APM_EMULATION=y
@@ -176,6 +176,7 @@ CONFIG_ARCH_OMAP3=y
# CONFIG_OMAP_DEBUG_POWERDOMAIN is not set
# CONFIG_OMAP_DEBUG_CLOCKDOMAIN is not set
CONFIG_OMAP_SMARTREFLEX=y
+# CONFIG_OMAP_SMARTREFLEX_TESTING is not set
CONFIG_OMAP_RESET_CLOCKS=y
CONFIG_OMAP_BOOT_TAG=y
CONFIG_OMAP_BOOT_REASON=y
@@ -286,6 +287,21 @@ CONFIG_KEXEC=y
CONFIG_ATAGS_PROC=y
#
+# CPUIdle
+#
+
+#
+# CPU idle PM support
+#
+CONFIG_CPU_IDLE=y
+
+#
+# Governors
+#
+CONFIG_CPU_IDLE_GOV_LADDER=y
+CONFIG_CPU_IDLE_GOV_MENU=y
+
+#
# CPU Frequency scaling
#
CONFIG_CPU_FREQ=y
@@ -1315,6 +1331,7 @@ CONFIG_USB_SISUSBVGA_CON=y
# CONFIG_USB_TRANCEVIBRATOR is not set
# CONFIG_USB_IOWARRIOR is not set
# CONFIG_USB_TEST is not set
+# CONFIG_USB_ISIGHTFW is not set
CONFIG_USB_GADGET=y
# CONFIG_USB_GADGET_DEBUG is not set
# CONFIG_USB_GADGET_DEBUG_FILES is not set
diff --git a/packages/linux/linux-omap2-git/beagleboard/mcbsp-fix-include.patch b/packages/linux/linux-omap2-git/beagleboard/mcbsp-fix-include.patch
deleted file mode 100644
index 13e931b61a..0000000000
--- a/packages/linux/linux-omap2-git/beagleboard/mcbsp-fix-include.patch
+++ /dev/null
@@ -1,10 +0,0 @@
---- /tmp/mcbsp.c 2008-05-29 00:41:05.793645383 +0200
-+++ git/arch/arm/mach-omap2/mcbsp.c 2008-05-29 00:41:31.584031392 +0200
-@@ -14,6 +14,7 @@
- #include <linux/init.h>
- #include <linux/clk.h>
- #include <linux/err.h>
-+#include <linux/io.h>
-
- #include <asm/arch/dma.h>
- #include <asm/arch/mux.h>
diff --git a/packages/linux/linux-omap2-git/beagleboard/mux.patch b/packages/linux/linux-omap2-git/beagleboard/mux.patch
deleted file mode 100644
index 836b52954d..0000000000
--- a/packages/linux/linux-omap2-git/beagleboard/mux.patch
+++ /dev/null
@@ -1,15 +0,0 @@
-diff --git a/arch/arm/mach-omap2/mux.c b/arch/arm/mach-omap2/mux.c
-index 7d56516..be6eb3e 100644
---- a/arch/arm/mach-omap2/mux.c
-+++ b/arch/arm/mach-omap2/mux.c
-@@ -253,8 +253,8 @@ MUX_CFG_34XX("Y13_3430_USB1HS_PHY_D7", 0x5e2,
- OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_INPUT_PULLDOWN)
-
- /* PHY - HSUSB: 12-pin ULPI PHY: Port 2*/
--MUX_CFG_34XX("AA8_3430_USB2HS_PHY_CLK", 0x5f0,
-- OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_OUTPUT)
-+/*KK MUX_CFG_34XX("AA8_3430_USB2HS_PHY_CLK", 0x5f0,
-+ OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_OUTPUT)*/
- MUX_CFG_34XX("AA10_3430_USB2HS_PHY_STP", 0x5f2,
- OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_OUTPUT)
- MUX_CFG_34XX("AA9_3430_USB2HS_PHY_DIR", 0x5f4,