diff options
Diffstat (limited to 'packages/linux/linux-omap2-git/beagleboard/TWL4030-08.patch')
| -rw-r--r-- | packages/linux/linux-omap2-git/beagleboard/TWL4030-08.patch | 231 |
1 files changed, 117 insertions, 114 deletions
diff --git a/packages/linux/linux-omap2-git/beagleboard/TWL4030-08.patch b/packages/linux/linux-omap2-git/beagleboard/TWL4030-08.patch index 713eebffd6..9af25a762d 100644 --- a/packages/linux/linux-omap2-git/beagleboard/TWL4030-08.patch +++ b/packages/linux/linux-omap2-git/beagleboard/TWL4030-08.patch @@ -1,43 +1,6 @@ -X-Mozilla-Status: 0001 -X-Mozilla-Status2: 00000000 -Return-Path: <linux-omap-owner@vger.kernel.org> -X-Spam-Checker-Version: SpamAssassin 3.2.2 (2007-07-23) on - morningsun.geekisp.com -X-Spam-Level: -X-Spam-Status: No, score=-3.0 required=5.0 tests=AWL,DKIM_POLICY_SIGNSOME, - DK_POLICY_SIGNSOME,RCVD_IN_DNSWL_MED autolearn=ham version=3.2.2 -Delivered-To: balister.org-philip@balister.org -Received: (qmail 12254 invoked by uid 1003); 18 Jul 2008 01:35:31 -0000 -Received: from vger.kernel.org (209.132.176.167) - by mail.geekisp.com with SMTP; 18 Jul 2008 01:35:31 -0000 -Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand - id S1756410AbYGRBfa (ORCPT <rfc822;philip@balister.org>); - Thu, 17 Jul 2008 21:35:30 -0400 -Received: (majordomo@vger.kernel.org) by vger.kernel.org id S1757008AbYGRBfa - (ORCPT <rfc822;linux-omap-outgoing>); - Thu, 17 Jul 2008 21:35:30 -0400 -Received: from utopia.booyaka.com ([72.9.107.138]:49368 "EHLO - utopia.booyaka.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org - with ESMTP id S1756410AbYGRBfZ (ORCPT - <rfc822;linux-omap@vger.kernel.org>); Thu, 17 Jul 2008 21:35:25 -0400 -Received: (qmail 13896 invoked by uid 526); 18 Jul 2008 01:35:24 -0000 -MBOX-Line: From nobody Thu Jul 17 19:34:55 2008 -From: Paul Walmsley <paul@pwsan.com> -Subject: [PATCH 8/9] TWL4030: use symbolic ISR/IMR register names during - twl_init_irq() -To: linux-omap@vger.kernel.org -Date: Thu, 17 Jul 2008 19:34:55 -0600 -Message-ID: <20080718013454.18943.7428.stgit@localhost.localdomain> -In-Reply-To: <20080718013205.18943.34047.stgit@localhost.localdomain> -References: <20080718013205.18943.34047.stgit@localhost.localdomain> -User-Agent: StGIT/0.14.3.163.g06f9 -MIME-Version: 1.0 -Content-Type: text/plain; charset="utf-8" -Content-Transfer-Encoding: 7bit -Sender: linux-omap-owner@vger.kernel.org -Precedence: bulk -List-ID: <linux-omap.vger.kernel.org> -X-Mailing-List: linux-omap@vger.kernel.org +TWL4030: use symbolic ISR/IMR register names during twl_init_irq() + +From: Paul Walmsley <paul@pwsan.com> twl_init_irq() uses a bunch of magic numbers as register indices; this has already led to several errors, fixed earlier in this patch series. @@ -47,11 +10,11 @@ not change kernel behavior. Signed-off-by: Paul Walmsley <paul@pwsan.com> --- - drivers/i2c/chips/twl4030-core.c | 181 +++++++++++++++++++------------------- - 1 files changed, 89 insertions(+), 92 deletions(-) + drivers/i2c/chips/twl4030-core.c | 188 +++++++++++++++++++------------------- + 1 files changed, 96 insertions(+), 92 deletions(-) diff --git a/drivers/i2c/chips/twl4030-core.c b/drivers/i2c/chips/twl4030-core.c -index 1906635..5855f5f 100644 +index 99cc143..38c227a 100644 --- a/drivers/i2c/chips/twl4030-core.c +++ b/drivers/i2c/chips/twl4030-core.c @@ -40,6 +40,9 @@ @@ -88,10 +51,25 @@ index 1906635..5855f5f 100644 /* Triton Core internal information (END) */ /* Few power values */ -@@ -748,108 +768,85 @@ static void twl_init_irq(void) +@@ -133,12 +153,10 @@ + /* on I2C-1 for 2430SDP */ + #define CONFIG_I2C_TWL4030_ID 1 + +-/* SIH_CTRL registers */ +-#define TWL4030_INT_PWR_SIH_CTRL 0x07 ++/* SIH_CTRL registers that aren't defined elsewhere */ + #define TWL4030_INTERRUPTS_BCISIHCTRL 0x0d + #define TWL4030_MADC_MADC_SIH_CTRL 0x67 + #define TWL4030_KEYPAD_KEYP_SIH_CTRL 0x17 +-#define TWL4030_GPIO_GPIO_SIH_CTRL 0x2d + + #define TWL4030_SIH_CTRL_COR_MASK (1 << 2) + +@@ -776,135 +794,121 @@ static void twl_init_irq(void) * handlers present. */ +- - /* PWR_IMR1 */ - WARN_ON(twl4030_i2c_write_u8(TWL4030_MODULE_INT, 0xff, 0x1) < 0); - @@ -99,21 +77,27 @@ index 1906635..5855f5f 100644 - WARN_ON(twl4030_i2c_write_u8(TWL4030_MODULE_INT, 0xff, 0x3) < 0); - - /* Clear off any other pending interrupts on power */ -- /* PWR_ISR1 */ -- WARN_ON(twl4030_i2c_clear_isr(TWL4030_MODULE_INT, 0x00) < 0); -- -- /* PWR_ISR2 */ -- WARN_ON(twl4030_i2c_clear_isr(TWL4030_MODULE_INT, 0x02) < 0); + /* Mask INT (PWR) interrupts at TWL4030 */ + WARN_ON(twl4030_i2c_write_u8(TWL4030_MODULE_INT, 0xff, + TWL4030_INT_PWR_IMR1) < 0); + WARN_ON(twl4030_i2c_write_u8(TWL4030_MODULE_INT, 0xff, + TWL4030_INT_PWR_IMR2) < 0); + + /* Are PWR interrupt status bits cleared by reads or writes? */ + cor = twl4030_read_cor_bit(TWL4030_MODULE_INT, + TWL4030_INT_PWR_SIH_CTRL); + WARN_ON(cor < 0); + +- /* PWR_ISR1 */ +- WARN_ON(twl4030_i2c_clear_isr(TWL4030_MODULE_INT, 0x00, cor) < 0); +- +- /* PWR_ISR2 */ +- WARN_ON(twl4030_i2c_clear_isr(TWL4030_MODULE_INT, 0x02, cor) < 0); + /* Clear TWL4030 INT (PWR) ISRs */ + WARN_ON(twl4030_i2c_clear_isr(TWL4030_MODULE_INT, -+ TWL4030_INT_PWR_ISR1) < 0); ++ TWL4030_INT_PWR_ISR1, cor) < 0); + WARN_ON(twl4030_i2c_clear_isr(TWL4030_MODULE_INT, -+ TWL4030_INT_PWR_ISR2) < 0); ++ TWL4030_INT_PWR_ISR2, cor) < 0); /* Slave address 0x4A */ @@ -128,18 +112,6 @@ index 1906635..5855f5f 100644 - - /* BCIIMR2B */ - WARN_ON(twl4030_i2c_write_u8(TWL4030_MODULE_INTERRUPTS, 0xff, 0x7) < 0); -- -- /* BCIISR1A */ -- WARN_ON(twl4030_i2c_clear_isr(TWL4030_MODULE_INTERRUPTS, 0x0) < 0); -- -- /* BCIISR2A */ -- WARN_ON(twl4030_i2c_clear_isr(TWL4030_MODULE_INTERRUPTS, 0x1) < 0); -- -- /* BCIISR1B */ -- WARN_ON(twl4030_i2c_clear_isr(TWL4030_MODULE_INTERRUPTS, 0x4) < 0); -- -- /* BCIISR2B */ -- WARN_ON(twl4030_i2c_clear_isr(TWL4030_MODULE_INTERRUPTS, 0x5) < 0); + /* Mask BCI interrupts at TWL4030 */ + WARN_ON(twl4030_i2c_write_u8(TWL4030_MODULE_INTERRUPTS, 0xff, + TWL4030_INTERRUPTS_BCIIMR1A) < 0); @@ -149,15 +121,32 @@ index 1906635..5855f5f 100644 + TWL4030_INTERRUPTS_BCIIMR1B) < 0); + WARN_ON(twl4030_i2c_write_u8(TWL4030_MODULE_INTERRUPTS, 0xff, + TWL4030_INTERRUPTS_BCIIMR2B) < 0); + + /* Are BCI interrupt status bits cleared by reads or writes? */ + cor = twl4030_read_cor_bit(TWL4030_MODULE_INTERRUPTS, + TWL4030_INTERRUPTS_BCISIHCTRL); + WARN_ON(cor < 0); + +- /* BCIISR1A */ +- WARN_ON(twl4030_i2c_clear_isr(TWL4030_MODULE_INTERRUPTS, 0x0, cor) < 0); +- +- /* BCIISR2A */ +- WARN_ON(twl4030_i2c_clear_isr(TWL4030_MODULE_INTERRUPTS, 0x1, cor) < 0); +- +- /* BCIISR1B */ +- WARN_ON(twl4030_i2c_clear_isr(TWL4030_MODULE_INTERRUPTS, 0x4, cor) < 0); +- +- /* BCIISR2B */ +- WARN_ON(twl4030_i2c_clear_isr(TWL4030_MODULE_INTERRUPTS, 0x5, cor) < 0); + /* Clear TWL4030 BCI ISRs */ + WARN_ON(twl4030_i2c_clear_isr(TWL4030_MODULE_INTERRUPTS, -+ TWL4030_INTERRUPTS_BCIISR1A) < 0); ++ TWL4030_INTERRUPTS_BCIISR1A, cor) < 0); + WARN_ON(twl4030_i2c_clear_isr(TWL4030_MODULE_INTERRUPTS, -+ TWL4030_INTERRUPTS_BCIISR2A) < 0); ++ TWL4030_INTERRUPTS_BCIISR2A, cor) < 0); + WARN_ON(twl4030_i2c_clear_isr(TWL4030_MODULE_INTERRUPTS, -+ TWL4030_INTERRUPTS_BCIISR1B) < 0); ++ TWL4030_INTERRUPTS_BCIISR1B, cor) < 0); + WARN_ON(twl4030_i2c_clear_isr(TWL4030_MODULE_INTERRUPTS, -+ TWL4030_INTERRUPTS_BCIISR2B) < 0); ++ TWL4030_INTERRUPTS_BCIISR2B, cor) < 0); /* MAD C */ - /* MADC_IMR1 */ @@ -165,46 +154,56 @@ index 1906635..5855f5f 100644 - - /* MADC_IMR2 */ - WARN_ON(twl4030_i2c_write_u8(TWL4030_MODULE_MADC, 0xff, 0x64) < 0); -- -- /* MADC_ISR1 */ -- WARN_ON(twl4030_i2c_clear_isr(TWL4030_MODULE_MADC, 0x61) < 0); -- -- /* MADC_ISR2 */ -- WARN_ON(twl4030_i2c_clear_isr(TWL4030_MODULE_MADC, 0x63) < 0); + /* Mask MADC interrupts at TWL4030 */ + WARN_ON(twl4030_i2c_write_u8(TWL4030_MODULE_MADC, 0xff, + TWL4030_MADC_IMR1) < 0); + WARN_ON(twl4030_i2c_write_u8(TWL4030_MODULE_MADC, 0xff, + TWL4030_MADC_IMR2) < 0); + + /* Are MADC interrupt status bits cleared by reads or writes? */ + cor = twl4030_read_cor_bit(TWL4030_MODULE_MADC, + TWL4030_MADC_MADC_SIH_CTRL); + WARN_ON(cor < 0); + +- /* MADC_ISR1 */ +- WARN_ON(twl4030_i2c_clear_isr(TWL4030_MODULE_MADC, 0x61, cor) < 0); +- +- /* MADC_ISR2 */ +- WARN_ON(twl4030_i2c_clear_isr(TWL4030_MODULE_MADC, 0x63, cor) < 0); + /* Clear TWL4030 MADC ISRs */ + WARN_ON(twl4030_i2c_clear_isr(TWL4030_MODULE_MADC, -+ TWL4030_MADC_ISR1) < 0); ++ TWL4030_MADC_ISR1, cor) < 0); + WARN_ON(twl4030_i2c_clear_isr(TWL4030_MODULE_MADC, -+ TWL4030_MADC_ISR2) < 0); ++ TWL4030_MADC_ISR2, cor) < 0); /* key Pad */ - /* KEYPAD - IMR1 */ - WARN_ON(twl4030_i2c_write_u8(TWL4030_MODULE_KEYPAD, 0xff, 0x12) < 0); -- -- /* KEYPAD - ISR1 */ + /* Mask keypad interrupts at TWL4030 */ + WARN_ON(twl4030_i2c_write_u8(TWL4030_MODULE_KEYPAD, 0xff, + TWL4030_KEYPAD_KEYP_IMR1) < 0); + WARN_ON(twl4030_i2c_write_u8(TWL4030_MODULE_KEYPAD, 0xff, + TWL4030_KEYPAD_KEYP_IMR2) < 0); + + /* Are keypad interrupt status bits cleared by reads or writes? */ + cor = twl4030_read_cor_bit(TWL4030_MODULE_KEYPAD, + TWL4030_KEYPAD_KEYP_SIH_CTRL); + WARN_ON(cor < 0); + +- /* KEYPAD - ISR1 */ + /* Clear TWL4030 keypad ISRs */ /* XXX does this still need to be done twice for some reason? */ -- WARN_ON(twl4030_i2c_clear_isr(TWL4030_MODULE_KEYPAD, 0x11) < 0); +- WARN_ON(twl4030_i2c_clear_isr(TWL4030_MODULE_KEYPAD, 0x11, cor) < 0); - - /* KEYPAD - IMR2 */ - WARN_ON(twl4030_i2c_write_u8(TWL4030_MODULE_KEYPAD, 0xff, 0x14) < 0); - - /* KEYPAD - ISR2 */ -- WARN_ON(twl4030_i2c_clear_isr(TWL4030_MODULE_KEYPAD, 0x13) < 0); +- WARN_ON(twl4030_i2c_clear_isr(TWL4030_MODULE_KEYPAD, 0x13, cor) < 0); + WARN_ON(twl4030_i2c_clear_isr(TWL4030_MODULE_KEYPAD, -+ TWL4030_KEYPAD_KEYP_ISR1) < 0); ++ TWL4030_KEYPAD_KEYP_ISR1, cor) < 0); + WARN_ON(twl4030_i2c_clear_isr(TWL4030_MODULE_KEYPAD, -+ TWL4030_KEYPAD_KEYP_ISR2) < 0); ++ TWL4030_KEYPAD_KEYP_ISR2, cor) < 0); /* Slave address 0x49 */ - /* GPIO_IMR1A */ @@ -218,30 +217,12 @@ index 1906635..5855f5f 100644 - - /* GPIO_IMR1B */ - WARN_ON(twl4030_i2c_write_u8(TWL4030_MODULE_GPIO, 0xff, 0x22) < 0); -- + - /* GPIO_IMR2B */ - WARN_ON(twl4030_i2c_write_u8(TWL4030_MODULE_GPIO, 0xff, 0x23) < 0); - - /* GPIO_IMR3B */ - WARN_ON(twl4030_i2c_write_u8(TWL4030_MODULE_GPIO, 0xff, 0x24) < 0); -- -- /* GPIO_ISR1A */ -- WARN_ON(twl4030_i2c_clear_isr(TWL4030_MODULE_GPIO, 0x19) < 0); -- -- /* GPIO_ISR2A */ -- WARN_ON(twl4030_i2c_clear_isr(TWL4030_MODULE_GPIO, 0x1a) < 0); -- -- /* GPIO_ISR3A */ -- WARN_ON(twl4030_i2c_clear_isr(TWL4030_MODULE_GPIO, 0x1b) < 0); -- -- /* GPIO_ISR1B */ -- WARN_ON(twl4030_i2c_clear_isr(TWL4030_MODULE_GPIO, 0x1f) < 0); -- -- /* GPIO_ISR2B */ -- WARN_ON(twl4030_i2c_clear_isr(TWL4030_MODULE_GPIO, 0x20) < 0); -- -- /* GPIO_ISR3B */ -- WARN_ON(twl4030_i2c_clear_isr(TWL4030_MODULE_GPIO, 0x21) < 0); + /* Mask GPIO interrupts at TWL4030 */ + WARN_ON(twl4030_i2c_write_u8(TWL4030_MODULE_GPIO, 0xff, + REG_GPIO_IMR1A) < 0); @@ -255,21 +236,43 @@ index 1906635..5855f5f 100644 + REG_GPIO_IMR2B) < 0); + WARN_ON(twl4030_i2c_write_u8(TWL4030_MODULE_GPIO, 0xff, + REG_GPIO_IMR3B) < 0); -+ + + /* Are GPIO interrupt status bits cleared by reads or writes? */ + cor = twl4030_read_cor_bit(TWL4030_MODULE_GPIO, +- TWL4030_GPIO_GPIO_SIH_CTRL); ++ REG_GPIO_SIH_CTRL); + WARN_ON(cor < 0); + +- /* GPIO_ISR1A */ +- WARN_ON(twl4030_i2c_clear_isr(TWL4030_MODULE_GPIO, 0x19, cor) < 0); +- +- /* GPIO_ISR2A */ +- WARN_ON(twl4030_i2c_clear_isr(TWL4030_MODULE_GPIO, 0x1a, cor) < 0); +- +- /* GPIO_ISR3A */ +- WARN_ON(twl4030_i2c_clear_isr(TWL4030_MODULE_GPIO, 0x1b, cor) < 0); +- +- /* GPIO_ISR1B */ +- WARN_ON(twl4030_i2c_clear_isr(TWL4030_MODULE_GPIO, 0x1f, cor) < 0); +- +- /* GPIO_ISR2B */ +- WARN_ON(twl4030_i2c_clear_isr(TWL4030_MODULE_GPIO, 0x20, cor) < 0); +- +- /* GPIO_ISR3B */ +- WARN_ON(twl4030_i2c_clear_isr(TWL4030_MODULE_GPIO, 0x21, cor) < 0); + /* Clear TWL4030 GPIO ISRs */ -+ WARN_ON(twl4030_i2c_clear_isr(TWL4030_MODULE_GPIO, REG_GPIO_ISR1A) < 0); -+ WARN_ON(twl4030_i2c_clear_isr(TWL4030_MODULE_GPIO, REG_GPIO_ISR2A) < 0); -+ WARN_ON(twl4030_i2c_clear_isr(TWL4030_MODULE_GPIO, REG_GPIO_ISR3A) < 0); -+ WARN_ON(twl4030_i2c_clear_isr(TWL4030_MODULE_GPIO, REG_GPIO_ISR1B) < 0); -+ WARN_ON(twl4030_i2c_clear_isr(TWL4030_MODULE_GPIO, REG_GPIO_ISR2B) < 0); -+ WARN_ON(twl4030_i2c_clear_isr(TWL4030_MODULE_GPIO, REG_GPIO_ISR3B) < 0); ++ WARN_ON(twl4030_i2c_clear_isr(TWL4030_MODULE_GPIO, REG_GPIO_ISR1A, ++ cor) < 0); ++ WARN_ON(twl4030_i2c_clear_isr(TWL4030_MODULE_GPIO, REG_GPIO_ISR2A, ++ cor) < 0); ++ WARN_ON(twl4030_i2c_clear_isr(TWL4030_MODULE_GPIO, REG_GPIO_ISR3A, ++ cor) < 0); ++ WARN_ON(twl4030_i2c_clear_isr(TWL4030_MODULE_GPIO, REG_GPIO_ISR1B, ++ cor) < 0); ++ WARN_ON(twl4030_i2c_clear_isr(TWL4030_MODULE_GPIO, REG_GPIO_ISR2B, ++ cor) < 0); ++ WARN_ON(twl4030_i2c_clear_isr(TWL4030_MODULE_GPIO, REG_GPIO_ISR3B, ++ cor) < 0); /* install an irq handler for each of the PIH modules */ for (i = TWL4030_IRQ_BASE; i < TWL4030_IRQ_END; i++) { - - --- -To unsubscribe from this list: send the line "unsubscribe linux-omap" in -the body of a message to majordomo@vger.kernel.org -More majordomo info at http://vger.kernel.org/majordomo-info.html - |