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-rw-r--r--packages/linux/linux-omap2-git/beagleboard/TWL4030-03.patch126
1 files changed, 126 insertions, 0 deletions
diff --git a/packages/linux/linux-omap2-git/beagleboard/TWL4030-03.patch b/packages/linux/linux-omap2-git/beagleboard/TWL4030-03.patch
new file mode 100644
index 0000000000..062d99fe5a
--- /dev/null
+++ b/packages/linux/linux-omap2-git/beagleboard/TWL4030-03.patch
@@ -0,0 +1,126 @@
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+MBOX-Line: From nobody Thu Jul 17 19:34:50 2008
+From: Paul Walmsley <paul@pwsan.com>
+Subject: [PATCH 3/9] TWL4030: use correct register addresses for BCI IMR
+ registers
+To: linux-omap@vger.kernel.org
+Date: Thu, 17 Jul 2008 19:34:50 -0600
+Message-ID: <20080718013450.18943.33123.stgit@localhost.localdomain>
+In-Reply-To: <20080718013205.18943.34047.stgit@localhost.localdomain>
+References: <20080718013205.18943.34047.stgit@localhost.localdomain>
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+
+The existing code to mask and clear BCI interrupts in twl_init_irq() is
+wrong. It uses the wrong register offsets, it does not mask all of the
+BCI IMR registers, and it does not clear all of the BCI ISR registers.
+
+Signed-off-by: Paul Walmsley <paul@pwsan.com>
+---
+
+ drivers/i2c/chips/twl4030-core.c | 40 ++++++++++++++++++++++++++++++++------
+ 1 files changed, 34 insertions(+), 6 deletions(-)
+
+diff --git a/drivers/i2c/chips/twl4030-core.c b/drivers/i2c/chips/twl4030-core.c
+index dfc3805..bb0732c 100644
+--- a/drivers/i2c/chips/twl4030-core.c
++++ b/drivers/i2c/chips/twl4030-core.c
+@@ -750,29 +750,57 @@ static void twl_init_irq(void)
+ /* POWER HACK (END) */
+ /* Slave address 0x4A */
+
+- /* BCIIMR1_1 */
++ /* BCIIMR1A */
++ res = twl4030_i2c_write_u8(TWL4030_MODULE_INTERRUPTS, 0xFF, 0x2);
++ if (res < 0) {
++ pr_err("%s[%d][%d]\n", msg, res, __LINE__);
++ return;
++ }
++
++ /* BCIIMR2A */
+ res = twl4030_i2c_write_u8(TWL4030_MODULE_INTERRUPTS, 0xFF, 0x3);
+ if (res < 0) {
+ pr_err("%s[%d][%d]\n", msg, res, __LINE__);
+ return;
+ }
+
+- /* BCIIMR1_2 */
+- res = twl4030_i2c_write_u8(TWL4030_MODULE_INTERRUPTS, 0xFF, 0x4);
++ /* BCIIMR1B */
++ res = twl4030_i2c_write_u8(TWL4030_MODULE_INTERRUPTS, 0xFF, 0x6);
+ if (res < 0) {
+ pr_err("%s[%d][%d]\n", msg, res, __LINE__);
+ return;
+ }
+
+- /* BCIIMR2_1 */
++ /* BCIIMR2B */
+ res = twl4030_i2c_write_u8(TWL4030_MODULE_INTERRUPTS, 0xFF, 0x7);
+ if (res < 0) {
+ pr_err("%s[%d][%d]\n", msg, res, __LINE__);
+ return;
+ }
+
+- /* BCIIMR2_2 */
+- res = twl4030_i2c_write_u8(TWL4030_MODULE_INTERRUPTS, 0xFF, 0x8);
++ /* BCIISR1A */
++ res = twl4030_i2c_write_u8(TWL4030_MODULE_INTERRUPTS, 0xFF, 0x0);
++ if (res < 0) {
++ pr_err("%s[%d][%d]\n", msg, res, __LINE__);
++ return;
++ }
++
++ /* BCIISR2A */
++ res = twl4030_i2c_write_u8(TWL4030_MODULE_INTERRUPTS, 0xFF, 0x1);
++ if (res < 0) {
++ pr_err("%s[%d][%d]\n", msg, res, __LINE__);
++ return;
++ }
++
++ /* BCIISR1B */
++ res = twl4030_i2c_write_u8(TWL4030_MODULE_INTERRUPTS, 0xFF, 0x4);
++ if (res < 0) {
++ pr_err("%s[%d][%d]\n", msg, res, __LINE__);
++ return;
++ }
++
++ /* BCIISR2B */
++ res = twl4030_i2c_write_u8(TWL4030_MODULE_INTERRUPTS, 0xFF, 0x5);
+ if (res < 0) {
+ pr_err("%s[%d][%d]\n", msg, res, __LINE__);
+ return;
+
+
+--
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