summaryrefslogtreecommitdiff
path: root/packages/gcc/gcc-4.2.4/arm-crunch-saveregs.patch
diff options
context:
space:
mode:
Diffstat (limited to 'packages/gcc/gcc-4.2.4/arm-crunch-saveregs.patch')
-rw-r--r--packages/gcc/gcc-4.2.4/arm-crunch-saveregs.patch153
1 files changed, 153 insertions, 0 deletions
diff --git a/packages/gcc/gcc-4.2.4/arm-crunch-saveregs.patch b/packages/gcc/gcc-4.2.4/arm-crunch-saveregs.patch
new file mode 100644
index 0000000000..531ae86610
--- /dev/null
+++ b/packages/gcc/gcc-4.2.4/arm-crunch-saveregs.patch
@@ -0,0 +1,153 @@
+diff -ruN /home/hwilliams/openembedded/build/tmp/work/ep9312-angstrom-linux-gnueabi/gcc-cross-4.1.2-r0/gcc-4.1.2/gcc/config/arm/arm.c gcc-4.1.2/gcc/config/arm/arm.c
+--- /home/hwilliams/openembedded/build/tmp/work/ep9312-angstrom-linux-gnueabi/gcc-cross-4.1.2-r0/gcc-4.1.2/gcc/config/arm/arm.c 2007-05-09 16:32:29.000000000 +1000
++++ gcc-4.1.2/gcc/config/arm/arm.c 2007-05-15 09:39:41.000000000 +1000
+@@ -426,7 +435,7 @@
+ #define FL_STRONG (1 << 8) /* StrongARM */
+ #define FL_ARCH5E (1 << 9) /* DSP extensions to v5 */
+ #define FL_XSCALE (1 << 10) /* XScale */
+-#define FL_CIRRUS (1 << 11) /* Cirrus/DSP. */
++#define FL_CIRRUS (1 << 11) /* Cirrus Crunch coprocessor. */
+ #define FL_ARCH6 (1 << 12) /* Architecture rel 6. Adds
+ media instructions. */
+ #define FL_VFPV2 (1 << 13) /* Vector Floating Point V2. */
+@@ -490,7 +499,7 @@
+ /* Nonzero if this chip is a StrongARM. */
+ int arm_tune_strongarm = 0;
+
+-/* Nonzero if this chip is a Cirrus variant. */
++/* Nonzero if this chip supports Cirrus Crunch coprocessor. */
+ int arm_arch_cirrus = 0;
+
+ /* Nonzero if this chip supports Intel Wireless MMX technology. */
+@@ -1184,7 +1193,8 @@
+ else
+ */
+ if (arm_arch_cirrus)
+- arm_fpu_arch = FPUTYPE_MAVERICK;
++ /* Cirrus crunch coprocessor still requires soft-float division. */
++ arm_fpu_arch = FPUTYPE_MAVERICK;
+ else
+ arm_fpu_arch = FPUTYPE_FPA_EMU2;
+ #endif
+@@ -1567,6 +1577,9 @@
+ if (regs_ever_live[regno] && !call_used_regs[regno])
+ return 0;
+
++ if (TARGET_MAVERICK)
++ return 0;
++
+ if (TARGET_REALLY_IWMMXT)
+ for (regno = FIRST_IWMMXT_REGNUM; regno <= LAST_IWMMXT_REGNUM; regno++)
+ if (regs_ever_live[regno] && ! call_used_regs [regno])
+@@ -9775,7 +9886,19 @@
+ /* This variable is for the Virtual Frame Pointer, not VFP regs. */
+ int vfp_offset = offsets->frame;
+
+- if (arm_fpu_arch == FPUTYPE_FPA_EMU2)
++ if (arm_fpu_arch == FPUTYPE_MAVERICK)
++ {
++ for (reg = LAST_CIRRUS_FP_REGNUM; reg >= FIRST_CIRRUS_FP_REGNUM; reg--)
++ if (regs_ever_live[reg] && !call_used_regs[reg])
++ {
++ floats_offset += 8; /* more problems - futaris? */
++ /* if (TARGET_CIRRUS_D0 || TARGET_CIRRUS_D1) */
++ asm_fprintf (f, "\tnop\n");
++ asm_fprintf (f, "\tcfldrd\tmvd%d, [%r, #-%d]\n",
++ reg - FIRST_CIRRUS_FP_REGNUM, FP_REGNUM, floats_offset - vfp_offset);
++ }
++ }
++ else if (arm_fpu_arch == FPUTYPE_FPA_EMU2)
+ {
+ for (reg = LAST_FPA_REGNUM; reg >= FIRST_FPA_REGNUM; reg--)
+ if (regs_ever_live[reg] && !call_used_regs[reg])
+@@ -9924,7 +10047,18 @@
+ output_add_immediate (operands);
+ }
+
+- if (arm_fpu_arch == FPUTYPE_FPA_EMU2)
++ if (arm_fpu_arch == FPUTYPE_MAVERICK)
++ { /* order changed - futaris */
++ for (reg = FIRST_CIRRUS_FP_REGNUM; reg <= LAST_CIRRUS_FP_REGNUM; reg++)
++ if (regs_ever_live[reg] && !call_used_regs[reg])
++ {
++ /* if (TARGET_CIRRUS_D0 || TARGET_CIRRUS_D1) */
++ asm_fprintf (f, "\tnop\n");
++ asm_fprintf (f, "\tcfldrd\tmvd%u, [%r], #8\n",
++ reg - FIRST_CIRRUS_FP_REGNUM, SP_REGNUM);
++ } /* reg problems - futaris */
++ }
++ else if (arm_fpu_arch == FPUTYPE_FPA_EMU2)
+ {
+ for (reg = FIRST_FPA_REGNUM; reg <= LAST_FPA_REGNUM; reg++)
+ if (regs_ever_live[reg] && !call_used_regs[reg])
+@@ -10429,9 +10563,19 @@
+ if (! IS_VOLATILE (func_type))
+ {
++ /* Space for saved MAVERICK registers. */
++ if (arm_fpu_arch == FPUTYPE_MAVERICK)
++ {
++ for (regno = FIRST_CIRRUS_FP_REGNUM; regno <= LAST_CIRRUS_FP_REGNUM; regno++)
++ if (regs_ever_live[regno] && !call_used_regs[regno])
++ saved += 8; // 8 in 3.4.3 patch - futaris;
++ }
++ else
+ /* Space for saved FPA registers. */
++ {
+ for (regno = FIRST_FPA_REGNUM; regno <= LAST_FPA_REGNUM; regno++)
+ if (regs_ever_live[regno] && ! call_used_regs[regno])
+ saved += 12;
++ }
+
+ /* Space for saved VFP registers. */
+ if (TARGET_HARD_FLOAT && TARGET_VFP)
+@@ -10739,7 +10882,19 @@
+
+ /* Save any floating point call-saved registers used by this
+ function. */
+- if (arm_fpu_arch == FPUTYPE_FPA_EMU2)
++ if (arm_fpu_arch == FPUTYPE_MAVERICK)
++ {
++ for (reg = LAST_CIRRUS_FP_REGNUM; reg >= FIRST_CIRRUS_FP_REGNUM; reg--)
++ if (regs_ever_live[reg] && !call_used_regs[reg])
++ {
++ insn = gen_rtx_PRE_DEC (DFmode, stack_pointer_rtx); /* think these causes problems */
++ insn = gen_rtx_MEM (DFmode, insn);
++ insn = emit_insn (gen_rtx_SET (VOIDmode, insn,
++ gen_rtx_REG (DFmode, reg)));
++ RTX_FRAME_RELATED_P (insn) = 1; saved_regs += 8; /* added by futaris */
++ }
++ }
++ else if (arm_fpu_arch == FPUTYPE_FPA_EMU2)
+ {
+ for (reg = LAST_FPA_REGNUM; reg >= FIRST_FPA_REGNUM; reg--)
+ if (regs_ever_live[reg] && !call_used_regs[reg])
+@@ -15179,6 +15331,9 @@
+ if (IS_FPA_REGNUM (regno))
+ return (TARGET_AAPCS_BASED ? 96 : 16) + regno - FIRST_FPA_REGNUM;
+
++ if (IS_CIRRUS_REGNUM (regno))
++ return 28 + regno - FIRST_CIRRUS_FP_REGNUM;
++
+ if (IS_VFP_REGNUM (regno))
+ return 64 + regno - FIRST_VFP_REGNUM;
+
+--- gcc-4.1.2/gcc/config/arm/arm.md-original 2007-06-28 15:42:36.000000000 +1000
++++ gcc-4.1.2/gcc/config/arm/arm.md 2007-06-28 15:42:48.000000000 +1000
+@@ -9800,7 +9800,7 @@
+ return arm_output_epilogue (next_nonnote_insn (insn));
+ "
+ ;; Length is absolute worst case
+- [(set_attr "length" "44")
++ [(set_attr "length" "108")
+ (set_attr "type" "block")
+ ;; We don't clobber the conditions, but the potential length of this
+ ;; operation is sufficient to make conditionalizing the sequence
+@@ -9818,7 +9818,7 @@
+ return thumb_unexpanded_epilogue ();
+ "
+ ; Length is absolute worst case
+- [(set_attr "length" "44")
++ [(set_attr "length" "108")
+ (set_attr "type" "block")
+ ;; We don't clobber the conditions, but the potential length of this
+ ;; operation is sufficient to make conditionalizing the sequence