diff options
Diffstat (limited to 'packages/gcc/gcc-4.1.2/arm-crunch-compare-new5.patch')
| -rw-r--r-- | packages/gcc/gcc-4.1.2/arm-crunch-compare-new5.patch | 432 |
1 files changed, 0 insertions, 432 deletions
diff --git a/packages/gcc/gcc-4.1.2/arm-crunch-compare-new5.patch b/packages/gcc/gcc-4.1.2/arm-crunch-compare-new5.patch deleted file mode 100644 index 78880b35be..0000000000 --- a/packages/gcc/gcc-4.1.2/arm-crunch-compare-new5.patch +++ /dev/null @@ -1,432 +0,0 @@ -diff -urN gcc-4.1.2/gcc/config/arm/arm.c ../../../../old-tmp/work/arm-oabi-angstrom-linux/gcc-cross-4.1.2-backup/gcc-4.1.2/gcc/config/arm/arm.c ---- gcc-4.1.2/gcc/config/arm/arm.c 2007-05-31 12:39:48.000000000 +1000 -+++ gcc-4.1.2/gcc/config/arm/arm.c 2007-05-29 17:19:38.000000000 +1000 -@@ -11427,26 +11427,53 @@ - /* These encodings assume that AC=1 in the FPA system control - byte. This allows us to handle all cases except UNEQ and - LTGT. */ -- switch (comp_code) -- { -- case GE: return ARM_GE; -- case GT: return ARM_GT; -- case LE: return ARM_LS; -- case LT: return ARM_MI; -- case NE: return ARM_NE; -- case EQ: return ARM_EQ; -- case ORDERED: return ARM_VC; -- case UNORDERED: return ARM_VS; -- case UNLT: return ARM_LT; -- case UNLE: return ARM_LE; -- case UNGT: return ARM_HI; -- case UNGE: return ARM_PL; -- /* UNEQ and LTGT do not have a representation. */ -- case UNEQ: /* Fall through. */ -- case LTGT: /* Fall through. */ -- default: gcc_unreachable (); -- } -- -+ if (!TARGET_MAVERICK) -+ { -+ switch (comp_code) -+ { -+ case GE: return ARM_GE; -+ case GT: return ARM_GT; -+ case LE: return ARM_LS; -+ case LT: return ARM_MI; -+ case NE: return ARM_NE; -+ case EQ: return ARM_EQ; -+ case ORDERED: return ARM_VC; -+ case UNORDERED: return ARM_VS; -+ case UNLT: return ARM_LT; -+ case UNLE: return ARM_LE; -+ case UNGT: return ARM_HI; -+ case UNGE: return ARM_PL; -+ /* UNEQ and LTGT do not have a representation. */ -+ case UNEQ: /* Fall through. */ -+ case LTGT: /* Fall through. */ -+ default: gcc_unreachable (); -+ } -+ } -+ else -+ { -+ /* CIRRUS */ -+ switch (comp_code) -+ { -+#if 1 -+ case GT: return ARM_VS; -+ case LE: return ARM_LE; -+ case LT: return ARM_LT; -+ case NE: return ARM_NE; -+ case EQ: return ARM_EQ; -+ case UNLE: return ARM_VC; -+ case UNGT: return ARM_GT; -+ case UNGE: return ARM_GE; -+ case UNEQ: return ARM_PL; -+ case LTGT: return ARM_MI; -+ /* These do not have a representation. */ -+ case GE: /* Fall through. -UNGE wrong atm */ -+ case UNLT: /* Fall through. -LT wrong atm */ -+ case ORDERED: /* Fall through. -AL wrong atm */ -+ case UNORDERED: /* Fall through. -AL wrong atm */ -+#endif -+ default: gcc_unreachable (); -+ } -+ } - case CC_SWPmode: - switch (comp_code) - { -diff -urN gcc-4.1.2/gcc/config/arm/arm.md ../../../../old-tmp/work/arm-oabi-angstrom-linux/gcc-cross-4.1.2-backup/gcc-4.1.2/gcc/config/arm/arm.md ---- gcc-4.1.2/gcc/config/arm/arm.md 2007-05-31 12:39:48.000000000 +1000 -+++ gcc-4.1.2/gcc/config/arm/arm.md 2007-05-29 15:17:18.000000000 +1000 -@@ -6952,10 +6952,11 @@ - "operands[1] = arm_gen_compare_reg (LE, arm_compare_op0, arm_compare_op1);" - ) - -+;broken on cirrus - (define_expand "bge" - [(set (pc) - (if_then_else (ge (match_dup 1) (const_int 0)) - (label_ref (match_operand 0 "" "")) - (pc)))] -- "TARGET_ARM" -+ "TARGET_ARM" - "operands[1] = arm_gen_compare_reg (GE, arm_compare_op0, arm_compare_op1);" -@@ -6988,6 +6989,7 @@ - "operands[1] = arm_gen_compare_reg (LEU, arm_compare_op0, arm_compare_op1);" - ) - -+; broken on cirrus? - (define_expand "bgeu" - [(set (pc) - (if_then_else (geu (match_dup 1) (const_int 0)) -@@ -7031,14 +7033,15 @@ - (if_then_else (ungt (match_dup 1) (const_int 0)) - (label_ref (match_operand 0 "" "")) - (pc)))] -- "TARGET_ARM && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP)" -+ "TARGET_ARM && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP || TARGET_MAVERICK)" - "operands[1] = arm_gen_compare_reg (UNGT, arm_compare_op0, arm_compare_op1);" - ) - --(define_expand "bunlt" -+; broken for cirrus -+(define_expand "bunlt" - [(set (pc) - (if_then_else (unlt (match_dup 1) (const_int 0)) - (label_ref (match_operand 0 "" "")) - (pc)))] -- "TARGET_ARM && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP)" -+ "TARGET_ARM && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP || TARGET_MAVERICK)" - "operands[1] = arm_gen_compare_reg (UNLT, arm_compare_op0, arm_compare_op1);" -@@ -7049,7 +7052,7 @@ - (if_then_else (unge (match_dup 1) (const_int 0)) - (label_ref (match_operand 0 "" "")) - (pc)))] -- "TARGET_ARM && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP)" -+ "TARGET_ARM && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP || TARGET_MAVERICK)" - "operands[1] = arm_gen_compare_reg (UNGE, arm_compare_op0, arm_compare_op1);" - ) - -@@ -7058,7 +7061,7 @@ - (if_then_else (unle (match_dup 1) (const_int 0)) - (label_ref (match_operand 0 "" "")) - (pc)))] -- "TARGET_ARM && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP)" -+ "TARGET_ARM && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP || TARGET_MAVERICK)" - "operands[1] = arm_gen_compare_reg (UNLE, arm_compare_op0, arm_compare_op1);" - ) - -@@ -7069,7 +7072,7 @@ - (if_then_else (uneq (match_dup 1) (const_int 0)) - (label_ref (match_operand 0 "" "")) - (pc)))] -- "TARGET_ARM && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP)" -+ "TARGET_ARM && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP)" ;; || TARGET_MAVERICK)" - "operands[1] = arm_gen_compare_reg (UNEQ, arm_compare_op0, arm_compare_op1);" - ) - -@@ -7078,7 +7081,7 @@ - (if_then_else (ltgt (match_dup 1) (const_int 0)) - (label_ref (match_operand 0 "" "")) - (pc)))] -- "TARGET_ARM && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP)" -+ "TARGET_ARM && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP)" ;; || TARGET_MAVERICK)" - "operands[1] = arm_gen_compare_reg (LTGT, arm_compare_op0, arm_compare_op1);" - ) - -@@ -7086,7 +7089,7 @@ - ;; Patterns to match conditional branch insns. - ;; - --; Special pattern to match UNEQ. -+; Special pattern to match UNEQ for FPA and VFP. - (define_insn "*arm_buneq" - [(set (pc) - (if_then_else (uneq (match_operand 1 "cc_register" "") (const_int 0)) -@@ -7102,7 +7105,7 @@ - (set_attr "length" "8")] - ) - --; Special pattern to match LTGT. -+; Special pattern to match LTGT for FPA and VFP. - (define_insn "*arm_bltgt" - [(set (pc) - (if_then_else (ltgt (match_operand 1 "cc_register" "") (const_int 0)) -@@ -7118,6 +7121,54 @@ - (set_attr "length" "8")] - ) - -+; Special pattern to match GE for MAVERICK. -+(define_insn "*arm_bge_sf" -+ [(set (pc) -+ (if_then_else (ge:SF (match_operand 1 "cc_register" "") (const_int 0)) -+ (label_ref (match_operand 0 "" "")) -+ (pc)))] -+ "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK" -+ "* -+ gcc_assert (!arm_ccfsm_state); -+ -+ return \"beq\\t%l0\;bvs\\t%l0\"; -+ " -+ [(set_attr "conds" "jump_clob") -+ (set_attr "length" "8")] -+) -+ -+; Special pattern to match GE for MAVERICK. -+(define_insn "*arm_bge_df" -+ [(set (pc) -+ (if_then_else (ge:DF (match_operand 1 "cc_register" "") (const_int 0)) -+ (label_ref (match_operand 0 "" "")) -+ (pc)))] -+ "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK" -+ "* -+ gcc_assert (!arm_ccfsm_state); -+ -+ return \"beq\\t%l0\;bvs\\t%l0\"; -+ " -+ [(set_attr "conds" "jump_clob") -+ (set_attr "length" "8")] -+) -+ -+; Special pattern to match UNLT for MAVERICK - UGLY since we need to test for Z=0 && V=0. -+(define_insn "*arm_bunlt" -+ [(set (pc) -+ (if_then_else (unlt (match_operand 1 "cc_register" "") (const_int 0)) -+ (label_ref (match_operand 0 "" "")) -+ (pc)))] -+ "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK" -+ "* -+ gcc_assert (!arm_ccfsm_state); -+ -+ return \"beq\\t.+12\;bvs\\t.+8\;b\\t%l0\"; -+ " -+ [(set_attr "conds" "jump_clob") -+ (set_attr "length" "12")] -+) -+ - (define_insn "*arm_cond_branch" - [(set (pc) - (if_then_else (match_operator 1 "arm_comparison_operator" -@@ -7137,7 +7172,7 @@ - (set_attr "type" "branch")] - ) - --; Special pattern to match reversed UNEQ. -+; Special pattern to match reversed UNEQ for FPA and VFP. - (define_insn "*arm_buneq_reversed" - [(set (pc) - (if_then_else (uneq (match_operand 1 "cc_register" "") (const_int 0)) -@@ -7153,7 +7188,7 @@ - (set_attr "length" "8")] - ) - --; Special pattern to match reversed LTGT. -+; Special pattern to match reversed LTGT for FPA and VFP. - (define_insn "*arm_bltgt_reversed" - [(set (pc) - (if_then_else (ltgt (match_operand 1 "cc_register" "") (const_int 0)) -@@ -7169,6 +7204,39 @@ - (set_attr "length" "8")] - ) - -+; Special pattern to match reversed GE for MAVERICK - UGLY since we need to tst for Z=0 && N=0. -+(define_insn "*arm_bge_reversed" -+ [(set (pc) -+ (if_then_else (ge:SF (match_operand 1 "cc_register" "") (const_int 0)) -+ (pc) -+ (label_ref (match_operand 0 "" ""))))] -+ "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK" -+ "* -+ gcc_assert (!arm_ccfsm_state); -+ -+ return \"beq\\t.+12\;bvs\\t.+8\;b\\t%l0\"; -+ " -+ [(set_attr "conds" "jump_clob") -+ (set_attr "length" "12")] -+) -+ -+; Special pattern to match reversed GE for MAVERICK - UGLY since we need to tst for Z=0 && N=0. -+(define_insn "*arm_bge_reversed_df" -+ [(set (pc) -+ (if_then_else (ge:DF (match_operand 1 "cc_register" "") (const_int 0)) -+ (pc) -+ (label_ref (match_operand 0 "" ""))))] -+ "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK" -+ "* -+ gcc_assert (!arm_ccfsm_state); -+ -+ return \"beq\\t.+12\;bvs\\t.+8\;b\\t%l0\"; -+ " -+ [(set_attr "conds" "jump_clob") -+ (set_attr "length" "12")] -+) -+ -+; Special pattern to match reversed UNLT for MAVERICK. -+(define_insn "*arm_bunlt_reversed" -+ [(set (pc) -+ (if_then_else (unlt (match_operand 1 "cc_register" "") (const_int 0)) -+ (pc) -+ (label_ref (match_operand 0 "" ""))))] -+ "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK" -+ "* -+ gcc_assert (!arm_ccfsm_state); -+ -+ return \"beq\\t%l0\;bvs\\t%l0\"; -+ " -+ [(set_attr "conds" "jump_clob") -+ (set_attr "length" "8")] -+) -+ -+ - (define_insn "*arm_cond_branch_reversed" - [(set (pc) - (if_then_else (match_operator 1 "arm_comparison_operator" -@@ -7220,8 +7288,9 @@ - "operands[1] = arm_gen_compare_reg (LE, arm_compare_op0, arm_compare_op1);" - ) - -+;; broken for cirrus - definitely - (define_expand "sge" - [(set (match_operand:SI 0 "s_register_operand" "") - (ge:SI (match_dup 1) (const_int 0)))] -- "TARGET_ARM" -+ "TARGET_ARM" - "operands[1] = arm_gen_compare_reg (GE, arm_compare_op0, arm_compare_op1);" -@@ -7227,6 +7296,14 @@ - "operands[1] = arm_gen_compare_reg (GE, arm_compare_op0, arm_compare_op1);" - ) - -+;;; DO NOT add patterns for SGE these can not be represented with MAVERICK -+; (define_expand "sge" -+; [(set (match_operand:SI 0 "s_register_operand" "") -+; (ge:SI (match_dup 1) (const_int 0)))] -+; "TARGET_ARM && (TARGET_MAVERICK)" -+; "gcc_unreachable ();" -+; ) -+ - (define_expand "slt" - [(set (match_operand:SI 0 "s_register_operand" "") - (lt:SI (match_dup 1) (const_int 0)))] -@@ -7248,6 +7325,7 @@ - "operands[1] = arm_gen_compare_reg (LEU, arm_compare_op0, arm_compare_op1);" - ) - -+;; broken for cirrus - maybe - (define_expand "sgeu" - [(set (match_operand:SI 0 "s_register_operand" "") - (geu:SI (match_dup 1) (const_int 0)))] -@@ -7255,6 +7333,14 @@ - "operands[1] = arm_gen_compare_reg (GEU, arm_compare_op0, arm_compare_op1);" - ) - -+;;; DO NOT add patterns for SGEU these may not be represented with MAVERICK? -+; (define_expand "sgeu" -+; [(set (match_operand:SI 0 "s_register_operand" "") -+; (ge:SI (match_dup 1) (const_int 0)))] -+; "TARGET_ARM && (TARGET_MAVERICK)" -+; "gcc_unreachable ();" -+; ) -+ - (define_expand "sltu" - [(set (match_operand:SI 0 "s_register_operand" "") - (ltu:SI (match_dup 1) (const_int 0)))] -@@ -7281,7 +7367,7 @@ - (define_expand "sungt" - [(set (match_operand:SI 0 "s_register_operand" "") - (ungt:SI (match_dup 1) (const_int 0)))] -- "TARGET_ARM && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP)" -+ "TARGET_ARM && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP || TARGET_MAVERICK)" - "operands[1] = arm_gen_compare_reg (UNGT, arm_compare_op0, - arm_compare_op1);" - ) -@@ -7289,23 +7375,32 @@ - (define_expand "sunge" - [(set (match_operand:SI 0 "s_register_operand" "") - (unge:SI (match_dup 1) (const_int 0)))] -- "TARGET_ARM && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP)" -+ "TARGET_ARM && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP || TARGET_MAVERICK)" - "operands[1] = arm_gen_compare_reg (UNGE, arm_compare_op0, - arm_compare_op1);" - ) - -+; broken for cirrus - (define_expand "sunlt" - [(set (match_operand:SI 0 "s_register_operand" "") - (unlt:SI (match_dup 1) (const_int 0)))] -- "TARGET_ARM && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP)" -+ "TARGET_ARM && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP)" - "operands[1] = arm_gen_compare_reg (UNLT, arm_compare_op0, - arm_compare_op1);" - ) - -+;;; DO NOT add patterns for SUNLT these can't be represented with MAVERICK -+; (define_expand "sunlt" -+; [(set (match_operand:SI 0 "s_register_operand" "") -+; (unlt:SI (match_dup 1) (const_int 0)))] -+; "TARGET_ARM && (TARGET_MAVERICK)" -+; "gcc_unreachable ();" -+; ) -+ - (define_expand "sunle" - [(set (match_operand:SI 0 "s_register_operand" "") - (unle:SI (match_dup 1) (const_int 0)))] -- "TARGET_ARM && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP)" -+ "TARGET_ARM && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP || TARGET_MAVERICK)" - "operands[1] = arm_gen_compare_reg (UNLE, arm_compare_op0, - arm_compare_op1);" - ) -@@ -7371,7 +7466,7 @@ - enum rtx_code code = GET_CODE (operands[1]); - rtx ccreg; - -- if (code == UNEQ || code == LTGT) -+ if ((code == UNEQ || code == LTGT) || (TARGET_MAVERICK && (code == GE || code == UNLT || code == ORDERED || code == UNORDERED))) - FAIL; - - ccreg = arm_gen_compare_reg (code, arm_compare_op0, arm_compare_op1); -@@ -7390,7 +7485,8 @@ - enum rtx_code code = GET_CODE (operands[1]); - rtx ccreg; - -- if (code == UNEQ || code == LTGT) -+ if ((code == UNEQ || code == LTGT) || (TARGET_MAVERICK && (code == GE || code == UNLT || code == ORDERED || code == UNORDERED))) -+ - FAIL; - - /* When compiling for SOFT_FLOAT, ensure both arms are in registers. -@@ -7409,13 +7505,13 @@ - (if_then_else:DF (match_operand 1 "arm_comparison_operator" "") - (match_operand:DF 2 "s_register_operand" "") - (match_operand:DF 3 "arm_float_add_operand" "")))] -- "TARGET_ARM && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP)" -+ "TARGET_ARM && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP || TARGET_MAVERICK)" - " - { - enum rtx_code code = GET_CODE (operands[1]); - rtx ccreg; - -- if (code == UNEQ || code == LTGT) -+ if ((code == UNEQ || code == LTGT) || (TARGET_MAVERICK && (code==GE || code == UNLT || code == ORDERED || code == UNORDERED))) - FAIL; - - ccreg = arm_gen_compare_reg (code, arm_compare_op0, arm_compare_op1); |