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authorJesse Gilles <jgilles@multitech.com>2010-04-22 16:41:04 -0500
committerJesse Gilles <jgilles@multitech.com>2010-04-26 11:50:38 -0500
commit5fd4e57da36d1c33e9b2bc86c5f6d9791c30aff2 (patch)
tree6f5467ccf65f4752094f1a4123f371d6687c9d4e /recipes
parent82701ed338eb73e83c65b01175b78d2c47045a5b (diff)
add u-boot 1.3.4
Diffstat (limited to 'recipes')
-rw-r--r--recipes/u-boot/u-boot-1.3.4/mtcdp/fw_env.config7
-rw-r--r--recipes/u-boot/u-boot-1.3.4/mtcdp/u-boot-1.3.4-mts.patch3256
-rw-r--r--recipes/u-boot/u-boot_1.3.4.bb28
3 files changed, 3291 insertions, 0 deletions
diff --git a/recipes/u-boot/u-boot-1.3.4/mtcdp/fw_env.config b/recipes/u-boot/u-boot-1.3.4/mtcdp/fw_env.config
new file mode 100644
index 0000000000..41b9605ee5
--- /dev/null
+++ b/recipes/u-boot/u-boot-1.3.4/mtcdp/fw_env.config
@@ -0,0 +1,7 @@
+# Configuration file for fw_{printenv,setenv} utility.
+# Up to two entries are valid, in this case the redundant
+# environment sector is assumed present.
+
+# MTD device name Device offset Env. size Flash sector size
+/dev/mtd3 0x0000 0x20000 0x20000
+/dev/mtd4 0x0000 0x20000 0x20000
diff --git a/recipes/u-boot/u-boot-1.3.4/mtcdp/u-boot-1.3.4-mts.patch b/recipes/u-boot/u-boot-1.3.4/mtcdp/u-boot-1.3.4-mts.patch
new file mode 100644
index 0000000000..8e2b658634
--- /dev/null
+++ b/recipes/u-boot/u-boot-1.3.4/mtcdp/u-boot-1.3.4-mts.patch
@@ -0,0 +1,3256 @@
+diff -uprN u-boot-1.3.4-vanilla/board/atmel/at91sam9260ek/at91sam9260ek.c u-boot-1.3.4/board/atmel/at91sam9260ek/at91sam9260ek.c
+--- u-boot-1.3.4-vanilla/board/atmel/at91sam9260ek/at91sam9260ek.c 2008-08-12 09:08:38.000000000 -0500
++++ u-boot-1.3.4/board/atmel/at91sam9260ek/at91sam9260ek.c 2010-03-25 16:45:59.000000000 -0500
+@@ -125,6 +125,8 @@ static void at91sam9260ek_spi_hw_init(vo
+ #ifdef CONFIG_MACB
+ static void at91sam9260ek_macb_hw_init(void)
+ {
++ unsigned long rstc;
++
+ /* Enable clock */
+ at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_EMAC);
+
+@@ -147,6 +149,8 @@ static void at91sam9260ek_macb_hw_init(v
+ pin_to_mask(AT91_PIN_PA28),
+ pin_to_controller(AT91_PIN_PA0) + PIO_PUDR);
+
++ rstc = at91_sys_read(AT91_RSTC_MR);
++
+ /* Need to reset PHY -> 500ms reset */
+ at91_sys_write(AT91_RSTC_MR, AT91_RSTC_KEY |
+ (AT91_RSTC_ERSTL & (0x0D << 8)) |
+@@ -159,9 +163,8 @@ static void at91sam9260ek_macb_hw_init(v
+
+ /* Restore NRST value */
+ at91_sys_write(AT91_RSTC_MR, AT91_RSTC_KEY |
+- (AT91_RSTC_ERSTL & (0x0 << 8)) |
++ (rstc) |
+ AT91_RSTC_URSTEN);
+-
+ /* Re-enable pull-up */
+ writel(pin_to_mask(AT91_PIN_PA14) |
+ pin_to_mask(AT91_PIN_PA15) |
+diff -uprN u-boot-1.3.4-vanilla/board/atmel/at91sam9263ek/at91sam9263ek.c u-boot-1.3.4/board/atmel/at91sam9263ek/at91sam9263ek.c
+--- u-boot-1.3.4-vanilla/board/atmel/at91sam9263ek/at91sam9263ek.c 2008-08-12 09:08:38.000000000 -0500
++++ u-boot-1.3.4/board/atmel/at91sam9263ek/at91sam9263ek.c 2010-03-25 16:45:59.000000000 -0500
+@@ -128,6 +128,8 @@ static void at91sam9263ek_spi_hw_init(vo
+ #ifdef CONFIG_MACB
+ static void at91sam9263ek_macb_hw_init(void)
+ {
++ unsigned long rstc;
++
+ /* Enable clock */
+ at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9263_ID_EMAC);
+
+@@ -145,6 +147,8 @@ static void at91sam9263ek_macb_hw_init(v
+ pin_to_mask(AT91_PIN_PE26),
+ pin_to_controller(AT91_PIN_PE0) + PIO_PUDR);
+
++ rstc = at91_sys_read(AT91_RSTC_MR);
++
+ /* Need to reset PHY -> 500ms reset */
+ at91_sys_write(AT91_RSTC_MR, AT91_RSTC_KEY |
+ (AT91_RSTC_ERSTL & (0x0D << 8)) |
+@@ -157,7 +161,7 @@ static void at91sam9263ek_macb_hw_init(v
+
+ /* Restore NRST value */
+ at91_sys_write(AT91_RSTC_MR, AT91_RSTC_KEY |
+- (AT91_RSTC_ERSTL & (0x0 << 8)) |
++ (rstc) |
+ AT91_RSTC_URSTEN);
+
+ /* Re-enable pull-up */
+diff -uprN u-boot-1.3.4-vanilla/board/atmel/at91sam9g10ek/at91sam9g10ek.c u-boot-1.3.4/board/atmel/at91sam9g10ek/at91sam9g10ek.c
+--- u-boot-1.3.4-vanilla/board/atmel/at91sam9g10ek/at91sam9g10ek.c 1969-12-31 17:00:00.000000000 -0700
++++ u-boot-1.3.4/board/atmel/at91sam9g10ek/at91sam9g10ek.c 2010-03-25 16:45:59.000000000 -0500
+@@ -0,0 +1,281 @@
++/*
++ * (C) Copyright 2007-2008
++ * Stelian Pop <stelian.pop@leadtechdesign.com>
++ * Lead Tech Design <www.leadtechdesign.com>
++ *
++ * See file CREDITS for list of people who contributed to this
++ * project.
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License as
++ * published by the Free Software Foundation; either version 2 of
++ * the License, or (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
++ * MA 02111-1307 USA
++ */
++
++#include <common.h>
++#include <asm/arch/at91sam9261.h>
++#include <asm/arch/at91sam9261_matrix.h>
++#include <asm/arch/at91sam9_smc.h>
++#include <asm/arch/at91_pmc.h>
++#include <asm/arch/at91_rstc.h>
++#include <asm/arch/gpio.h>
++#include <asm/arch/io.h>
++#include <lcd.h>
++#include <atmel_lcdc.h>
++#if defined(CONFIG_RESET_PHY_R) && defined(CONFIG_DRIVER_DM9000)
++#include <net.h>
++#endif
++
++DECLARE_GLOBAL_DATA_PTR;
++
++/* ------------------------------------------------------------------------- */
++/*
++ * Miscelaneous platform dependent initialisations
++ */
++
++static void at91sam9g10ek_serial_hw_init(void)
++{
++#ifdef CONFIG_USART0
++ at91_set_A_periph(AT91_PIN_PC8, 1); /* TXD0 */
++ at91_set_A_periph(AT91_PIN_PC9, 0); /* RXD0 */
++ at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_US0);
++#endif
++
++#ifdef CONFIG_USART1
++ at91_set_A_periph(AT91_PIN_PC12, 1); /* TXD1 */
++ at91_set_A_periph(AT91_PIN_PC13, 0); /* RXD1 */
++ at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_US1);
++#endif
++
++#ifdef CONFIG_USART2
++ at91_set_A_periph(AT91_PIN_PC14, 1); /* TXD2 */
++ at91_set_A_periph(AT91_PIN_PC15, 0); /* RXD2 */
++ at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_US2);
++#endif
++
++#ifdef CONFIG_USART3 /* DBGU */
++ at91_set_A_periph(AT91_PIN_PA9, 0); /* DRXD */
++ at91_set_A_periph(AT91_PIN_PA10, 1); /* DTXD */
++ at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_SYS);
++#endif
++}
++
++#ifdef CONFIG_CMD_NAND
++static void at91sam9g10ek_nand_hw_init(void)
++{
++ unsigned long csa;
++
++ /* Enable CS3 */
++ csa = at91_sys_read(AT91_MATRIX_EBICSA);
++ at91_sys_write(AT91_MATRIX_EBICSA,
++ csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA);
++
++ /* Configure SMC CS3 for NAND/SmartMedia */
++ at91_sys_write(AT91_SMC_SETUP(3),
++ /*
++ AT91_SMC_NWESETUP_(1) | AT91_SMC_NCS_WRSETUP_(0) |
++ AT91_SMC_NRDSETUP_(1) | AT91_SMC_NCS_RDSETUP_(0));
++ */
++ AT91_SMC_NWESETUP_(2) | AT91_SMC_NCS_WRSETUP_(0) |
++ AT91_SMC_NRDSETUP_(2) | AT91_SMC_NCS_RDSETUP_(0));
++ at91_sys_write(AT91_SMC_PULSE(3),
++ /*
++ AT91_SMC_NWEPULSE_(3) | AT91_SMC_NCS_WRPULSE_(3) |
++ AT91_SMC_NRDPULSE_(3) | AT91_SMC_NCS_RDPULSE_(3));
++ */
++ AT91_SMC_NWEPULSE_(3) | AT91_SMC_NCS_WRPULSE_(7) |
++ AT91_SMC_NRDPULSE_(3) | AT91_SMC_NCS_RDPULSE_(7));
++ at91_sys_write(AT91_SMC_CYCLE(3),
++ /*
++ AT91_SMC_NWECYCLE_(5) | AT91_SMC_NRDCYCLE_(5));
++ */
++ AT91_SMC_NWECYCLE_(7) | AT91_SMC_NRDCYCLE_(7));
++ at91_sys_write(AT91_SMC_MODE(3),
++ AT91_SMC_READMODE | AT91_SMC_WRITEMODE |
++ AT91_SMC_EXNWMODE_DISABLE |
++#ifdef CFG_NAND_DBW_16
++ AT91_SMC_DBW_16 |
++#else /* CFG_NAND_DBW_8 */
++ AT91_SMC_DBW_8 |
++#endif
++ AT91_SMC_TDF_(2));
++
++ at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9261_ID_PIOC);
++
++ /* Configure RDY/BSY */
++ at91_set_gpio_input(AT91_PIN_PC15, 1);
++
++ /* Enable NandFlash */
++ at91_set_gpio_output(AT91_PIN_PC14, 1);
++
++ at91_set_A_periph(AT91_PIN_PC0, 0); /* NANDOE */
++ at91_set_A_periph(AT91_PIN_PC1, 0); /* NANDWE */
++}
++#endif
++
++#ifdef CONFIG_HAS_DATAFLASH
++static void at91sam9g10ek_spi_hw_init(void)
++{
++ at91_set_A_periph(AT91_PIN_PA3, 0); /* SPI0_NPCS0 */
++
++ at91_set_A_periph(AT91_PIN_PA0, 0); /* SPI0_MISO */
++ at91_set_A_periph(AT91_PIN_PA1, 0); /* SPI0_MOSI */
++ at91_set_A_periph(AT91_PIN_PA2, 0); /* SPI0_SPCK */
++
++ /* Enable clock */
++ at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9261_ID_SPI0);
++}
++#endif
++
++#ifdef CONFIG_DRIVER_DM9000
++static void at91sam9g10ek_dm9000_hw_init(void)
++{
++ /* Configure SMC CS2 for DM9000 */
++ /*
++ at91_sys_write(AT91_SMC_SETUP(2),
++ AT91_SMC_NWESETUP_(2) | AT91_SMC_NCS_WRSETUP_(0) |
++ AT91_SMC_NRDSETUP_(2) | AT91_SMC_NCS_RDSETUP_(0));
++ at91_sys_write(AT91_SMC_PULSE(2),
++ AT91_SMC_NWEPULSE_(4) | AT91_SMC_NCS_WRPULSE_(8) |
++ AT91_SMC_NRDPULSE_(4) | AT91_SMC_NCS_RDPULSE_(8));
++ at91_sys_write(AT91_SMC_CYCLE(2),
++ AT91_SMC_NWECYCLE_(16) | AT91_SMC_NRDCYCLE_(16));
++ */
++ at91_sys_write(AT91_SMC_SETUP(2),
++ AT91_SMC_NWESETUP_(3) | AT91_SMC_NCS_WRSETUP_(0) |
++ AT91_SMC_NRDSETUP_(3) | AT91_SMC_NCS_RDSETUP_(0));
++ at91_sys_write(AT91_SMC_PULSE(2),
++ AT91_SMC_NWEPULSE_(6) | AT91_SMC_NCS_WRPULSE_(8) |
++ AT91_SMC_NRDPULSE_(6) | AT91_SMC_NCS_RDPULSE_(8));
++ at91_sys_write(AT91_SMC_CYCLE(2),
++ AT91_SMC_NWECYCLE_(20) | AT91_SMC_NRDCYCLE_(20));
++ at91_sys_write(AT91_SMC_MODE(2),
++ AT91_SMC_READMODE | AT91_SMC_WRITEMODE |
++ AT91_SMC_EXNWMODE_DISABLE |
++ AT91_SMC_BAT_WRITE | AT91_SMC_DBW_16 |
++ AT91_SMC_TDF_(1));
++
++ /* Configure Reset signal as output */
++ at91_set_gpio_output(AT91_PIN_PC10, 0);
++
++ /* Configure Interrupt pin as input, no pull-up */
++ at91_set_gpio_input(AT91_PIN_PC11, 0);
++}
++#endif
++
++#ifdef CONFIG_LCD
++vidinfo_t panel_info = {
++ vl_col: 240,
++ vl_row: 320,
++ vl_clk: 4965000,
++ vl_sync: ATMEL_LCDC_INVLINE_INVERTED |
++ ATMEL_LCDC_INVFRAME_INVERTED,
++ vl_bpix: 3,
++ vl_tft: 1,
++ vl_hsync_len: 5,
++ vl_left_margin: 1,
++ vl_right_margin:33,
++ vl_vsync_len: 1,
++ vl_upper_margin:1,
++ vl_lower_margin:0,
++ mmio: AT91SAM9261_LCDC_BASE,
++};
++
++void lcd_enable(void)
++{
++ at91_set_gpio_value(AT91_PIN_PA12, 0); /* power up */
++}
++
++void lcd_disable(void)
++{
++ at91_set_gpio_value(AT91_PIN_PA12, 1); /* power down */
++}
++
++static void at91sam9g10ek_lcd_hw_init(void)
++{
++ at91_set_A_periph(AT91_PIN_PB1, 0); /* LCDHSYNC */
++ at91_set_A_periph(AT91_PIN_PB2, 0); /* LCDDOTCK */
++ at91_set_A_periph(AT91_PIN_PB3, 0); /* LCDDEN */
++ at91_set_A_periph(AT91_PIN_PB4, 0); /* LCDCC */
++ at91_set_A_periph(AT91_PIN_PB7, 0); /* LCDD2 */
++ at91_set_A_periph(AT91_PIN_PB8, 0); /* LCDD3 */
++ at91_set_A_periph(AT91_PIN_PB9, 0); /* LCDD4 */
++ at91_set_A_periph(AT91_PIN_PB10, 0); /* LCDD5 */
++ at91_set_A_periph(AT91_PIN_PB11, 0); /* LCDD6 */
++ at91_set_A_periph(AT91_PIN_PB12, 0); /* LCDD7 */
++ at91_set_A_periph(AT91_PIN_PB15, 0); /* LCDD10 */
++ at91_set_A_periph(AT91_PIN_PB16, 0); /* LCDD11 */
++ at91_set_A_periph(AT91_PIN_PB17, 0); /* LCDD12 */
++ at91_set_A_periph(AT91_PIN_PB18, 0); /* LCDD13 */
++ at91_set_A_periph(AT91_PIN_PB19, 0); /* LCDD14 */
++ at91_set_A_periph(AT91_PIN_PB20, 0); /* LCDD15 */
++ at91_set_B_periph(AT91_PIN_PB23, 0); /* LCDD18 */
++ at91_set_B_periph(AT91_PIN_PB24, 0); /* LCDD19 */
++ at91_set_B_periph(AT91_PIN_PB25, 0); /* LCDD20 */
++ at91_set_B_periph(AT91_PIN_PB26, 0); /* LCDD21 */
++ at91_set_B_periph(AT91_PIN_PB27, 0); /* LCDD22 */
++ at91_set_B_periph(AT91_PIN_PB28, 0); /* LCDD23 */
++
++ at91_sys_write(AT91_PMC_SCER, AT91_PMC_HCK1);
++
++ /* gd->fb_base = AT91SAM9261_SRAM_BASE; */
++ gd->fb_base = 0x23E00000;
++
++}
++#endif
++
++int board_init(void)
++{
++ /* Enable Ctrlc */
++ console_init_f();
++
++ /* arch number of AT91SAM9G10EK-Board */
++ gd->bd->bi_arch_number = MACH_TYPE_AT91SAM9G10EK;
++ /* adress of boot parameters */
++ gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
++
++ at91sam9g10ek_serial_hw_init();
++#ifdef CONFIG_CMD_NAND
++ at91sam9g10ek_nand_hw_init();
++#endif
++#ifdef CONFIG_HAS_DATAFLASH
++ at91sam9g10ek_spi_hw_init();
++#endif
++#ifdef CONFIG_DRIVER_DM9000
++ at91sam9g10ek_dm9000_hw_init();
++#endif
++#ifdef CONFIG_LCD
++ at91sam9g10ek_lcd_hw_init();
++#endif
++ return 0;
++}
++
++int dram_init(void)
++{
++ gd->bd->bi_dram[0].start = PHYS_SDRAM;
++ gd->bd->bi_dram[0].size = PHYS_SDRAM_SIZE;
++ return 0;
++}
++
++#ifdef CONFIG_RESET_PHY_R
++void reset_phy(void)
++{
++#ifdef CONFIG_DRIVER_DM9000
++ /*
++ * Initialize ethernet HW addr prior to starting Linux,
++ * needed for nfsroot
++ */
++ eth_init(gd->bd);
++#endif
++}
++#endif
+diff -uprN u-boot-1.3.4-vanilla/board/atmel/at91sam9g10ek/config.mk u-boot-1.3.4/board/atmel/at91sam9g10ek/config.mk
+--- u-boot-1.3.4-vanilla/board/atmel/at91sam9g10ek/config.mk 1969-12-31 17:00:00.000000000 -0700
++++ u-boot-1.3.4/board/atmel/at91sam9g10ek/config.mk 2010-03-25 16:45:59.000000000 -0500
+@@ -0,0 +1 @@
++TEXT_BASE = 0x23f00000
+diff -uprN u-boot-1.3.4-vanilla/board/atmel/at91sam9g10ek/led.c u-boot-1.3.4/board/atmel/at91sam9g10ek/led.c
+--- u-boot-1.3.4-vanilla/board/atmel/at91sam9g10ek/led.c 1969-12-31 17:00:00.000000000 -0700
++++ u-boot-1.3.4/board/atmel/at91sam9g10ek/led.c 2010-03-25 16:45:59.000000000 -0500
+@@ -0,0 +1,78 @@
++/*
++ * (C) Copyright 2007-2008
++ * Stelian Pop <stelian.pop@leadtechdesign.com>
++ * Lead Tech Design <www.leadtechdesign.com>
++ *
++ * See file CREDITS for list of people who contributed to this
++ * project.
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License as
++ * published by the Free Software Foundation; either version 2 of
++ * the License, or (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
++ * MA 02111-1307 USA
++ */
++
++#include <common.h>
++#include <asm/arch/at91sam9261.h>
++#include <asm/arch/at91_pmc.h>
++#include <asm/arch/gpio.h>
++#include <asm/arch/io.h>
++
++#define RED_LED AT91_PIN_PA23 /* this is the power led */
++#define GREEN_LED AT91_PIN_PA13 /* this is the user1 led */
++#define YELLOW_LED AT91_PIN_PA14 /* this is the user2 led */
++
++void red_LED_on(void)
++{
++ at91_set_gpio_value(RED_LED, 1);
++}
++
++void red_LED_off(void)
++{
++ at91_set_gpio_value(RED_LED, 0);
++}
++
++void green_LED_on(void)
++{
++ at91_set_gpio_value(GREEN_LED, 0);
++}
++
++void green_LED_off(void)
++{
++ at91_set_gpio_value(GREEN_LED, 1);
++}
++
++void yellow_LED_on(void)
++{
++ at91_set_gpio_value(YELLOW_LED, 0);
++}
++
++void yellow_LED_off(void)
++{
++ at91_set_gpio_value(YELLOW_LED, 1);
++}
++
++
++void coloured_LED_init(void)
++{
++ /* Enable clock */
++ at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9261_ID_PIOA);
++
++ at91_set_gpio_output(RED_LED, 1);
++ at91_set_gpio_output(GREEN_LED, 1);
++ at91_set_gpio_output(YELLOW_LED, 1);
++
++ at91_set_gpio_value(RED_LED, 0);
++ at91_set_gpio_value(GREEN_LED, 1);
++ at91_set_gpio_value(YELLOW_LED, 1);
++}
+diff -uprN u-boot-1.3.4-vanilla/board/atmel/at91sam9g10ek/Makefile u-boot-1.3.4/board/atmel/at91sam9g10ek/Makefile
+--- u-boot-1.3.4-vanilla/board/atmel/at91sam9g10ek/Makefile 1969-12-31 17:00:00.000000000 -0700
++++ u-boot-1.3.4/board/atmel/at91sam9g10ek/Makefile 2010-03-25 16:45:59.000000000 -0500
+@@ -0,0 +1,57 @@
++#
++# (C) Copyright 2003-2008
++# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
++#
++# (C) Copyright 2008
++# Stelian Pop <stelian.pop@leadtechdesign.com>
++# Lead Tech Design <www.leadtechdesign.com>
++#
++# See file CREDITS for list of people who contributed to this
++# project.
++#
++# This program is free software; you can redistribute it and/or
++# modify it under the terms of the GNU General Public License as
++# published by the Free Software Foundation; either version 2 of
++# the License, or (at your option) any later version.
++#
++# This program is distributed in the hope that it will be useful,
++# but WITHOUT ANY WARRANTY; without even the implied warranty of
++# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++# GNU General Public License for more details.
++#
++# You should have received a copy of the GNU General Public License
++# along with this program; if not, write to the Free Software
++# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
++# MA 02111-1307 USA
++#
++
++include $(TOPDIR)/config.mk
++
++LIB = $(obj)lib$(BOARD).a
++
++COBJS-y += at91sam9g10ek.o
++COBJS-y += led.o
++COBJS-y += partition.o
++COBJS-$(CONFIG_CMD_NAND) += nand.o
++
++SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
++OBJS := $(addprefix $(obj),$(COBJS-y))
++SOBJS := $(addprefix $(obj),$(SOBJS))
++
++$(LIB): $(obj).depend $(OBJS) $(SOBJS)
++ $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
++
++clean:
++ rm -f $(SOBJS) $(OBJS)
++
++distclean: clean
++ rm -f $(LIB) core *.bak $(obj).depend
++
++#########################################################################
++
++# defines $(obj).depend target
++include $(SRCTREE)/rules.mk
++
++sinclude $(obj).depend
++
++#########################################################################
+diff -uprN u-boot-1.3.4-vanilla/board/atmel/at91sam9g10ek/nand.c u-boot-1.3.4/board/atmel/at91sam9g10ek/nand.c
+--- u-boot-1.3.4-vanilla/board/atmel/at91sam9g10ek/nand.c 1969-12-31 17:00:00.000000000 -0700
++++ u-boot-1.3.4/board/atmel/at91sam9g10ek/nand.c 2010-03-25 16:45:59.000000000 -0500
+@@ -0,0 +1,79 @@
++/*
++ * (C) Copyright 2007-2008
++ * Stelian Pop <stelian.pop@leadtechdesign.com>
++ * Lead Tech Design <www.leadtechdesign.com>
++ *
++ * (C) Copyright 2006 ATMEL Rousset, Lacressonniere Nicolas
++ *
++ * See file CREDITS for list of people who contributed to this
++ * project.
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License as
++ * published by the Free Software Foundation; either version 2 of
++ * the License, or (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
++ * MA 02111-1307 USA
++ */
++
++#include <common.h>
++#include <asm/arch/at91sam9261.h>
++#include <asm/arch/gpio.h>
++#include <asm/arch/at91_pio.h>
++
++#include <nand.h>
++
++/*
++ * hardware specific access to control-lines
++ */
++#define MASK_ALE (1 << 22) /* our ALE is AD22 */
++#define MASK_CLE (1 << 21) /* our CLE is AD21 */
++
++static void at91sam9261ek_nand_hwcontrol(struct mtd_info *mtd, int cmd)
++{
++ struct nand_chip *this = mtd->priv;
++ ulong IO_ADDR_W = (ulong) this->IO_ADDR_W;
++
++ IO_ADDR_W &= ~(MASK_ALE|MASK_CLE);
++ switch (cmd) {
++ case NAND_CTL_SETCLE:
++ IO_ADDR_W |= MASK_CLE;
++ break;
++ case NAND_CTL_SETALE:
++ IO_ADDR_W |= MASK_ALE;
++ break;
++ case NAND_CTL_CLRNCE:
++ at91_set_gpio_value(AT91_PIN_PC14, 1);
++ break;
++ case NAND_CTL_SETNCE:
++ at91_set_gpio_value(AT91_PIN_PC14, 0);
++ break;
++ }
++ this->IO_ADDR_W = (void *) IO_ADDR_W;
++}
++
++static int at91sam9261ek_nand_ready(struct mtd_info *mtd)
++{
++ return at91_get_gpio_value(AT91_PIN_PC15);
++}
++
++int board_nand_init(struct nand_chip *nand)
++{
++ nand->eccmode = NAND_ECC_SOFT;
++#ifdef CFG_NAND_DBW_16
++ nand->options = NAND_BUSWIDTH_16;
++#endif
++ nand->hwcontrol = at91sam9261ek_nand_hwcontrol;
++ nand->dev_ready = at91sam9261ek_nand_ready;
++ nand->chip_delay = 20;
++
++ return 0;
++}
+diff -uprN u-boot-1.3.4-vanilla/board/atmel/at91sam9g10ek/partition.c u-boot-1.3.4/board/atmel/at91sam9g10ek/partition.c
+--- u-boot-1.3.4-vanilla/board/atmel/at91sam9g10ek/partition.c 1969-12-31 17:00:00.000000000 -0700
++++ u-boot-1.3.4/board/atmel/at91sam9g10ek/partition.c 2010-03-25 16:45:59.000000000 -0500
+@@ -0,0 +1,40 @@
++/*
++ * (C) Copyright 2008
++ * Ulf Samuelsson <ulf@atmel.com>
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License as
++ * published by the Free Software Foundation; either version 2 of
++ * the License, or (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
++ * MA 02111-1307 USA
++ *
++ */
++#include <common.h>
++#include <config.h>
++#include <asm/hardware.h>
++#include <dataflash.h>
++
++AT91S_DATAFLASH_INFO dataflash_info[CFG_MAX_DATAFLASH_BANKS];
++
++struct dataflash_addr cs[CFG_MAX_DATAFLASH_BANKS] = {
++ {CFG_DATAFLASH_LOGIC_ADDR_CS0, 0}, /* Logical adress, CS */
++ {CFG_DATAFLASH_LOGIC_ADDR_CS3, 3}
++};
++
++/*define the area offsets*/
++dataflash_protect_t area_list[NB_DATAFLASH_AREA] = {
++ {0x00000000, 0x000041FF, FLAG_PROTECT_SET, 0, "Bootstrap"},
++ {0x00004200, 0x000083FF, FLAG_PROTECT_CLEAR, 0, "Environment"},
++ {0x00008400, 0x00041FFF, FLAG_PROTECT_SET, 0, "U-Boot"},
++ {0x00042000, 0x00251FFF, FLAG_PROTECT_CLEAR, 0, "Kernel"},
++ {0x00252000, 0xFFFFFFFF, FLAG_PROTECT_CLEAR, 0, "FS"},
++};
+diff -uprN u-boot-1.3.4-vanilla/board/atmel/at91sam9g20ek/at91sam9g20ek.c u-boot-1.3.4/board/atmel/at91sam9g20ek/at91sam9g20ek.c
+--- u-boot-1.3.4-vanilla/board/atmel/at91sam9g20ek/at91sam9g20ek.c 1969-12-31 17:00:00.000000000 -0700
++++ u-boot-1.3.4/board/atmel/at91sam9g20ek/at91sam9g20ek.c 2010-03-25 16:45:59.000000000 -0500
+@@ -0,0 +1,258 @@
++/*
++ * (C) Copyright 2007-2008
++ * Stelian Pop <stelian.pop@leadtechdesign.com>
++ * Lead Tech Design <www.leadtechdesign.com>
++ *
++ * See file CREDITS for list of people who contributed to this
++ * project.
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License as
++ * published by the Free Software Foundation; either version 2 of
++ * the License, or (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
++ * MA 02111-1307 USA
++ */
++
++#include <common.h>
++#include <asm/arch/at91sam9260.h>
++#include <asm/arch/at91sam9260_matrix.h>
++#include <asm/arch/at91sam9_smc.h>
++#include <asm/arch/at91_pmc.h>
++#include <asm/arch/at91_rstc.h>
++#include <asm/arch/gpio.h>
++#include <asm/arch/io.h>
++#if defined(CONFIG_RESET_PHY_R) && defined(CONFIG_MACB)
++#include <net.h>
++#endif
++
++DECLARE_GLOBAL_DATA_PTR;
++
++/* ------------------------------------------------------------------------- */
++/*
++ * Miscelaneous platform dependent initialisations
++ */
++
++static void at91sam9g20ek_serial_hw_init(void)
++{
++#ifdef CONFIG_USART0
++ at91_set_A_periph(AT91_PIN_PB4, 1); /* TXD0 */
++ at91_set_A_periph(AT91_PIN_PB5, 0); /* RXD0 */
++ at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_US0);
++#endif
++
++#ifdef CONFIG_USART1
++ at91_set_A_periph(AT91_PIN_PB6, 1); /* TXD1 */
++ at91_set_A_periph(AT91_PIN_PB7, 0); /* RXD1 */
++ at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_US1);
++#endif
++
++#ifdef CONFIG_USART2
++ at91_set_A_periph(AT91_PIN_PB8, 1); /* TXD2 */
++ at91_set_A_periph(AT91_PIN_PB9, 0); /* RXD2 */
++ at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_US2);
++#endif
++
++#ifdef CONFIG_USART3 /* DBGU */
++ at91_set_A_periph(AT91_PIN_PB14, 0); /* DRXD */
++ at91_set_A_periph(AT91_PIN_PB15, 1); /* DTXD */
++ at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_SYS);
++#endif
++}
++
++#ifdef CONFIG_CMD_NAND
++static void at91sam9g20ek_nand_hw_init(void)
++{
++ unsigned long csa;
++
++ /* Enable CS3 */
++ csa = at91_sys_read(AT91_MATRIX_EBICSA);
++ at91_sys_write(AT91_MATRIX_EBICSA,
++ csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA);
++
++ /* Configure SMC CS3 for NAND/SmartMedia */
++ at91_sys_write(AT91_SMC_SETUP(3),
++ AT91_SMC_NWESETUP_(2) | AT91_SMC_NCS_WRSETUP_(0) |
++ AT91_SMC_NRDSETUP_(2) | AT91_SMC_NCS_RDSETUP_(0));
++ at91_sys_write(AT91_SMC_PULSE(3),
++ AT91_SMC_NWEPULSE_(4) | AT91_SMC_NCS_WRPULSE_(3) |
++ AT91_SMC_NRDPULSE_(4) | AT91_SMC_NCS_RDPULSE_(3));
++ at91_sys_write(AT91_SMC_CYCLE(3),
++ AT91_SMC_NWECYCLE_(7) | AT91_SMC_NRDCYCLE_(7));
++ at91_sys_write(AT91_SMC_MODE(3),
++ AT91_SMC_READMODE | AT91_SMC_WRITEMODE |
++ AT91_SMC_EXNWMODE_DISABLE |
++#ifdef CFG_NAND_DBW_16
++ AT91_SMC_DBW_16 |
++#else /* CFG_NAND_DBW_8 */
++ AT91_SMC_DBW_8 |
++#endif
++ AT91_SMC_TDF_(3));
++
++ at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_PIOC);
++
++ /* Configure RDY/BSY */
++ at91_set_gpio_input(AT91_PIN_PC13, 1);
++
++ /* Enable NandFlash */
++ at91_set_gpio_output(AT91_PIN_PC14, 1);
++}
++#endif
++
++#ifdef CONFIG_HAS_DATAFLASH
++static void at91sam9g20ek_spi_hw_init(void)
++{
++ at91_set_A_periph(AT91_PIN_PA3, 0); /* SPI0_NPCS0 */
++ at91_set_B_periph(AT91_PIN_PC11, 0); /* SPI0_NPCS1 */
++
++ at91_set_A_periph(AT91_PIN_PA0, 0); /* SPI0_MISO */
++ at91_set_A_periph(AT91_PIN_PA1, 0); /* SPI0_MOSI */
++ at91_set_A_periph(AT91_PIN_PA2, 0); /* SPI0_SPCK */
++
++ /* Enable clock */
++ at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_SPI0);
++}
++#endif
++
++#ifdef CONFIG_MACB
++static void at91sam9g20ek_macb_hw_init(void)
++{
++ unsigned long rstc;
++
++ /* Enable clock */
++ at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_EMAC);
++
++ /*
++ * Disable pull-up on:
++ * RXDV (PA17) => PHY normal mode (not Test mode)
++ * ERX0 (PA14) => PHY ADDR0
++ * ERX1 (PA15) => PHY ADDR1
++ * ERX2 (PA25) => PHY ADDR2
++ * ERX3 (PA26) => PHY ADDR3
++ * ECRS (PA28) => PHY ADDR4 => PHYADDR = 0x0
++ *
++ * PHY has internal pull-down
++ */
++ writel(pin_to_mask(AT91_PIN_PA14) |
++ pin_to_mask(AT91_PIN_PA15) |
++ pin_to_mask(AT91_PIN_PA17) |
++ pin_to_mask(AT91_PIN_PA25) |
++ pin_to_mask(AT91_PIN_PA26) |
++ pin_to_mask(AT91_PIN_PA28),
++ pin_to_controller(AT91_PIN_PA0) + PIO_PUDR);
++
++ rstc = at91_sys_read(AT91_RSTC_MR);
++
++ /* Need to reset PHY -> 500ms reset */
++ at91_sys_write(AT91_RSTC_MR, AT91_RSTC_KEY |
++ (AT91_RSTC_ERSTL & (0x0D << 8)) |
++ AT91_RSTC_URSTEN);
++
++ at91_sys_write(AT91_RSTC_CR, AT91_RSTC_KEY | AT91_RSTC_EXTRST);
++
++ /* Wait for end hardware reset */
++ while (!(at91_sys_read(AT91_RSTC_SR) & AT91_RSTC_NRSTL));
++
++ /* Restore NRST value */
++ at91_sys_write(AT91_RSTC_MR, AT91_RSTC_KEY |
++ (rstc) |
++ AT91_RSTC_URSTEN);
++
++ /* Re-enable pull-up */
++ writel(pin_to_mask(AT91_PIN_PA14) |
++ pin_to_mask(AT91_PIN_PA15) |
++ pin_to_mask(AT91_PIN_PA17) |
++ pin_to_mask(AT91_PIN_PA25) |
++ pin_to_mask(AT91_PIN_PA26) |
++ pin_to_mask(AT91_PIN_PA28),
++ pin_to_controller(AT91_PIN_PA0) + PIO_PUER);
++
++ at91_set_A_periph(AT91_PIN_PA19, 0); /* ETXCK_EREFCK */
++ at91_set_A_periph(AT91_PIN_PA17, 0); /* ERXDV */
++ at91_set_A_periph(AT91_PIN_PA14, 0); /* ERX0 */
++ at91_set_A_periph(AT91_PIN_PA15, 0); /* ERX1 */
++ at91_set_A_periph(AT91_PIN_PA18, 0); /* ERXER */
++ at91_set_A_periph(AT91_PIN_PA16, 0); /* ETXEN */
++ at91_set_A_periph(AT91_PIN_PA12, 0); /* ETX0 */
++ at91_set_A_periph(AT91_PIN_PA13, 0); /* ETX1 */
++ at91_set_A_periph(AT91_PIN_PA21, 0); /* EMDIO */
++ at91_set_A_periph(AT91_PIN_PA20, 0); /* EMDC */
++
++#ifndef CONFIG_RMII
++ at91_set_B_periph(AT91_PIN_PA28, 0); /* ECRS */
++ at91_set_B_periph(AT91_PIN_PA29, 0); /* ECOL */
++ at91_set_B_periph(AT91_PIN_PA25, 0); /* ERX2 */
++ at91_set_B_periph(AT91_PIN_PA26, 0); /* ERX3 */
++ at91_set_B_periph(AT91_PIN_PA27, 0); /* ERXCK */
++#if defined(CONFIG_AT91SAM9G20EK) || defined(CONFIG_AT91SAM9G20EK_2MMC)
++ /*
++ * use PA10, PA11 for ETX2, ETX3.
++ * PA23 and PA24 are for TWI EEPROM
++ */
++ at91_set_B_periph(AT91_PIN_PA10, 0); /* ETX2 */
++ at91_set_B_periph(AT91_PIN_PA11, 0); /* ETX3 */
++#else
++ at91_set_B_periph(AT91_PIN_PA23, 0); /* ETX2 */
++ at91_set_B_periph(AT91_PIN_PA24, 0); /* ETX3 */
++#endif
++ at91_set_B_periph(AT91_PIN_PA22, 0); /* ETXER */
++#endif
++
++}
++#endif
++
++int board_init(void)
++{
++ /* Enable Ctrlc */
++ console_init_f();
++
++ /* arch number of AT91SAM9G20EK-Board */
++#ifdef CONFIG_AT91SAM9G20EK_2MMC
++ gd->bd->bi_arch_number = MACH_TYPE_AT91SAM9G20EK_2MMC;
++#else
++ gd->bd->bi_arch_number = MACH_TYPE_AT91SAM9G20EK;
++#endif
++ /* adress of boot parameters */
++ gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
++
++ at91sam9g20ek_serial_hw_init();
++#ifdef CONFIG_CMD_NAND
++ at91sam9g20ek_nand_hw_init();
++#endif
++#ifdef CONFIG_HAS_DATAFLASH
++ at91sam9g20ek_spi_hw_init();
++#endif
++#ifdef CONFIG_MACB
++ at91sam9g20ek_macb_hw_init();
++#endif
++
++ return 0;
++}
++
++int dram_init(void)
++{
++ gd->bd->bi_dram[0].start = PHYS_SDRAM;
++ gd->bd->bi_dram[0].size = PHYS_SDRAM_SIZE;
++ return 0;
++}
++
++#ifdef CONFIG_RESET_PHY_R
++void reset_phy(void)
++{
++#ifdef CONFIG_MACB
++ /*
++ * Initialize ethernet HW addr prior to starting Linux,
++ * needed for nfsroot
++ */
++ eth_init(gd->bd);
++#endif
++}
++#endif
+diff -uprN u-boot-1.3.4-vanilla/board/atmel/at91sam9g20ek/config.mk u-boot-1.3.4/board/atmel/at91sam9g20ek/config.mk
+--- u-boot-1.3.4-vanilla/board/atmel/at91sam9g20ek/config.mk 1969-12-31 17:00:00.000000000 -0700
++++ u-boot-1.3.4/board/atmel/at91sam9g20ek/config.mk 2010-03-25 16:45:59.000000000 -0500
+@@ -0,0 +1 @@
++TEXT_BASE = 0x23f00000
+diff -uprN u-boot-1.3.4-vanilla/board/atmel/at91sam9g20ek/led.c u-boot-1.3.4/board/atmel/at91sam9g20ek/led.c
+--- u-boot-1.3.4-vanilla/board/atmel/at91sam9g20ek/led.c 1969-12-31 17:00:00.000000000 -0700
++++ u-boot-1.3.4/board/atmel/at91sam9g20ek/led.c 2010-03-25 18:48:37.000000000 -0500
+@@ -0,0 +1,69 @@
++/*
++ * (C) Copyright 2007-2008
++ * Stelian Pop <stelian.pop@leadtechdesign.com>
++ * Lead Tech Design <www.leadtechdesign.com>
++ *
++ * See file CREDITS for list of people who contributed to this
++ * project.
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License as
++ * published by the Free Software Foundation; either version 2 of
++ * the License, or (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
++ * MA 02111-1307 USA
++ */
++
++#include <common.h>
++#include <asm/arch/at91sam9260.h>
++#include <asm/arch/at91_pmc.h>
++#include <asm/arch/gpio.h>
++#include <asm/arch/io.h>
++
++#ifdef CONFIG_AT91SAM9G20EK_2MMC
++#define RED_LED AT91_PIN_PB31 /* this is the power led */
++#define GREEN_LED AT91_PIN_PB30 /* this is the user led */
++#else
++#define RED_LED AT91_PIN_PA31 /* this is the power led */
++#define GREEN_LED AT91_PIN_PA30 /* this is the user led */
++#endif
++
++void red_LED_on(void)
++{
++ at91_set_gpio_value(RED_LED, 1);
++}
++
++void red_LED_off(void)
++{
++ at91_set_gpio_value(RED_LED, 0);
++}
++
++void green_LED_on(void)
++{
++ at91_set_gpio_value(GREEN_LED, 0);
++}
++
++void green_LED_off(void)
++{
++ at91_set_gpio_value(GREEN_LED, 1);
++}
++
++void coloured_LED_init(void)
++{
++ /* Enable clock */
++ at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_PIOA);
++
++ at91_set_gpio_output(RED_LED, 1);
++ at91_set_gpio_output(GREEN_LED, 1);
++
++ at91_set_gpio_value(RED_LED, 0);
++ at91_set_gpio_value(GREEN_LED, 1);
++}
+diff -uprN u-boot-1.3.4-vanilla/board/atmel/at91sam9g20ek/Makefile u-boot-1.3.4/board/atmel/at91sam9g20ek/Makefile
+--- u-boot-1.3.4-vanilla/board/atmel/at91sam9g20ek/Makefile 1969-12-31 17:00:00.000000000 -0700
++++ u-boot-1.3.4/board/atmel/at91sam9g20ek/Makefile 2010-03-25 16:45:59.000000000 -0500
+@@ -0,0 +1,57 @@
++#
++# (C) Copyright 2003-2008
++# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
++#
++# (C) Copyright 2008
++# Stelian Pop <stelian.pop@leadtechdesign.com>
++# Lead Tech Design <www.leadtechdesign.com>
++#
++# See file CREDITS for list of people who contributed to this
++# project.
++#
++# This program is free software; you can redistribute it and/or
++# modify it under the terms of the GNU General Public License as
++# published by the Free Software Foundation; either version 2 of
++# the License, or (at your option) any later version.
++#
++# This program is distributed in the hope that it will be useful,
++# but WITHOUT ANY WARRANTY; without even the implied warranty of
++# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++# GNU General Public License for more details.
++#
++# You should have received a copy of the GNU General Public License
++# along with this program; if not, write to the Free Software
++# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
++# MA 02111-1307 USA
++#
++
++include $(TOPDIR)/config.mk
++
++LIB = $(obj)lib$(BOARD).a
++
++COBJS-y += at91sam9g20ek.o
++COBJS-y += led.o
++COBJS-y += partition.o
++COBJS-$(CONFIG_CMD_NAND) += nand.o
++
++SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
++OBJS := $(addprefix $(obj),$(COBJS-y))
++SOBJS := $(addprefix $(obj),$(SOBJS))
++
++$(LIB): $(obj).depend $(OBJS) $(SOBJS)
++ $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
++
++clean:
++ rm -f $(SOBJS) $(OBJS)
++
++distclean: clean
++ rm -f $(LIB) core *.bak $(obj).depend
++
++#########################################################################
++
++# defines $(obj).depend target
++include $(SRCTREE)/rules.mk
++
++sinclude $(obj).depend
++
++#########################################################################
+diff -uprN u-boot-1.3.4-vanilla/board/atmel/at91sam9g20ek/nand.c u-boot-1.3.4/board/atmel/at91sam9g20ek/nand.c
+--- u-boot-1.3.4-vanilla/board/atmel/at91sam9g20ek/nand.c 1969-12-31 17:00:00.000000000 -0700
++++ u-boot-1.3.4/board/atmel/at91sam9g20ek/nand.c 2010-03-25 16:45:59.000000000 -0500
+@@ -0,0 +1,79 @@
++/*
++ * (C) Copyright 2007-2008
++ * Stelian Pop <stelian.pop@leadtechdesign.com>
++ * Lead Tech Design <www.leadtechdesign.com>
++ *
++ * (C) Copyright 2006 ATMEL Rousset, Lacressonniere Nicolas
++ *
++ * See file CREDITS for list of people who contributed to this
++ * project.
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License as
++ * published by the Free Software Foundation; either version 2 of
++ * the License, or (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
++ * MA 02111-1307 USA
++ */
++
++#include <common.h>
++#include <asm/arch/at91sam9260.h>
++#include <asm/arch/gpio.h>
++#include <asm/arch/at91_pio.h>
++
++#include <nand.h>
++
++/*
++ * hardware specific access to control-lines
++ */
++#define MASK_ALE (1 << 21) /* our ALE is AD21 */
++#define MASK_CLE (1 << 22) /* our CLE is AD22 */
++
++static void at91sam9g20ek_nand_hwcontrol(struct mtd_info *mtd, int cmd)
++{
++ struct nand_chip *this = mtd->priv;
++ ulong IO_ADDR_W = (ulong) this->IO_ADDR_W;
++
++ IO_ADDR_W &= ~(MASK_ALE|MASK_CLE);
++ switch (cmd) {
++ case NAND_CTL_SETCLE:
++ IO_ADDR_W |= MASK_CLE;
++ break;
++ case NAND_CTL_SETALE:
++ IO_ADDR_W |= MASK_ALE;
++ break;
++ case NAND_CTL_CLRNCE:
++ at91_set_gpio_value(AT91_PIN_PC14, 1);
++ break;
++ case NAND_CTL_SETNCE:
++ at91_set_gpio_value(AT91_PIN_PC14, 0);
++ break;
++ }
++ this->IO_ADDR_W = (void *) IO_ADDR_W;
++}
++
++static int at91sam9g20ek_nand_ready(struct mtd_info *mtd)
++{
++ return at91_get_gpio_value(AT91_PIN_PC13);
++}
++
++int board_nand_init(struct nand_chip *nand)
++{
++ nand->eccmode = NAND_ECC_SOFT;
++#ifdef CFG_NAND_DBW_16
++ nand->options = NAND_BUSWIDTH_16;
++#endif
++ nand->hwcontrol = at91sam9g20ek_nand_hwcontrol;
++ nand->dev_ready = at91sam9g20ek_nand_ready;
++ nand->chip_delay = 20;
++
++ return 0;
++}
+diff -uprN u-boot-1.3.4-vanilla/board/atmel/at91sam9g20ek/partition.c u-boot-1.3.4/board/atmel/at91sam9g20ek/partition.c
+--- u-boot-1.3.4-vanilla/board/atmel/at91sam9g20ek/partition.c 1969-12-31 17:00:00.000000000 -0700
++++ u-boot-1.3.4/board/atmel/at91sam9g20ek/partition.c 2010-03-25 16:45:59.000000000 -0500
+@@ -0,0 +1,40 @@
++/*
++ * (C) Copyright 2008
++ * Ulf Samuelsson <ulf@atmel.com>
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License as
++ * published by the Free Software Foundation; either version 2 of
++ * the License, or (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
++ * MA 02111-1307 USA
++ *
++ */
++#include <common.h>
++#include <config.h>
++#include <asm/hardware.h>
++#include <dataflash.h>
++
++AT91S_DATAFLASH_INFO dataflash_info[CFG_MAX_DATAFLASH_BANKS];
++
++struct dataflash_addr cs[CFG_MAX_DATAFLASH_BANKS] = {
++ {CFG_DATAFLASH_LOGIC_ADDR_CS0, 0}, /* Logical adress, CS */
++ {CFG_DATAFLASH_LOGIC_ADDR_CS1, 1}
++};
++
++/*define the area offsets*/
++dataflash_protect_t area_list[NB_DATAFLASH_AREA] = {
++ {0x00000000, 0x000041FF, FLAG_PROTECT_SET, 0, "Bootstrap"},
++ {0x00004200, 0x000083FF, FLAG_PROTECT_CLEAR, 0, "Environment"},
++ {0x00008400, 0x00041FFF, FLAG_PROTECT_SET, 0, "U-Boot"},
++ {0x00042000, 0x00251FFF, FLAG_PROTECT_CLEAR, 0, "Kernel"},
++ {0x00252000, 0xFFFFFFFF, FLAG_PROTECT_CLEAR, 0, "FS"},
++};
+diff -uprN u-boot-1.3.4-vanilla/board/atmel/at91sam9m10g45ek/at91sam9m10g45ek.c u-boot-1.3.4/board/atmel/at91sam9m10g45ek/at91sam9m10g45ek.c
+--- u-boot-1.3.4-vanilla/board/atmel/at91sam9m10g45ek/at91sam9m10g45ek.c 1969-12-31 17:00:00.000000000 -0700
++++ u-boot-1.3.4/board/atmel/at91sam9m10g45ek/at91sam9m10g45ek.c 2010-03-25 16:45:59.000000000 -0500
+@@ -0,0 +1,324 @@
++/*
++ * (C) Copyright 2007-2008
++ * Stelian Pop <stelian.pop@leadtechdesign.com>
++ * Lead Tech Design <www.leadtechdesign.com>
++ *
++ * See file CREDITS for list of people who contributed to this
++ * project.
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License as
++ * published by the Free Software Foundation; either version 2 of
++ * the License, or (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
++ * MA 02111-1307 USA
++ */
++
++#include <common.h>
++#include <asm/sizes.h>
++#include <asm/arch/at91sam9g45.h>
++#include <asm/arch/at91sam9g45_matrix.h>
++#include <asm/arch/at91sam9_smc.h>
++#include <asm/arch/at91_pmc.h>
++#include <asm/arch/at91_rstc.h>
++#include <asm/arch/gpio.h>
++#include <asm/arch/io.h>
++#include <lcd.h>
++#include <atmel_lcdc.h>
++#if defined(CONFIG_RESET_PHY_R) && defined(CONFIG_MACB)
++#include <net.h>
++#endif
++
++DECLARE_GLOBAL_DATA_PTR;
++
++/* ------------------------------------------------------------------------- */
++/*
++ * Miscelaneous platform dependent initialisations
++ */
++
++static void at91samm10g45ek_serial_hw_init(void)
++{
++#ifdef CONFIG_USART0
++ at91_set_A_periph(AT91_PIN_PB19, 1); /* TXD0 */
++ at91_set_A_periph(AT91_PIN_PB18, 0); /* RXD0 */
++ at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9G45_ID_US0);
++#endif
++
++#ifdef CONFIG_USART1
++ at91_set_A_periph(AT91_PIN_PB4, 1); /* TXD1 */
++ at91_set_A_periph(AT91_PIN_PB5, 0); /* RXD1 */
++ at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9G45_ID_US1);
++#endif
++
++#ifdef CONFIG_USART2
++ at91_set_A_periph(AT91_PIN_PD6, 1); /* TXD2 */
++ at91_set_A_periph(AT91_PIN_PD7, 0); /* RXD2 */
++ at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9G45_ID_US2);
++#endif
++
++#ifdef CONFIG_USART3 /* DBGU */
++ at91_set_A_periph(AT91_PIN_PB12, 0); /* DRXD */
++ at91_set_A_periph(AT91_PIN_PB13, 1); /* DTXD */
++ at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_SYS);
++#endif
++}
++
++#ifdef CONFIG_CMD_NAND
++static void at91samm10g45ek_nand_hw_init(void)
++{
++ unsigned long csa;
++
++ /* Enable CS3 */
++ csa = at91_sys_read(AT91_MATRIX_EBICSA);
++ at91_sys_write(AT91_MATRIX_EBICSA,
++ csa | AT91_MATRIX_EBI_CS3A_SMC_SMARTMEDIA);
++
++ /* Configure SMC CS3 for NAND/SmartMedia */
++ at91_sys_write(AT91_SMC_SETUP(3),
++ AT91_SMC_NWESETUP_(1) | AT91_SMC_NCS_WRSETUP_(0) |
++ AT91_SMC_NRDSETUP_(1) | AT91_SMC_NCS_RDSETUP_(0));
++ at91_sys_write(AT91_SMC_PULSE(3),
++ AT91_SMC_NWEPULSE_(4) | AT91_SMC_NCS_WRPULSE_(3) |
++ AT91_SMC_NRDPULSE_(3) | AT91_SMC_NCS_RDPULSE_(2));
++ at91_sys_write(AT91_SMC_CYCLE(3),
++ AT91_SMC_NWECYCLE_(7) | AT91_SMC_NRDCYCLE_(4));
++ at91_sys_write(AT91_SMC_MODE(3),
++ AT91_SMC_READMODE | AT91_SMC_WRITEMODE |
++ AT91_SMC_EXNWMODE_DISABLE |
++#ifdef CFG_NAND_DBW_16
++ AT91_SMC_DBW_16 |
++#else /* CFG_NAND_DBW_8 */
++ AT91_SMC_DBW_8 |
++#endif
++ AT91_SMC_TDF_(3));
++
++ at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9G45_ID_PIOC);
++
++ /* Configure RDY/BSY */
++ at91_set_gpio_input(AT91_PIN_PC8, 1);
++
++ /* Enable NandFlash */
++ at91_set_gpio_output(AT91_PIN_PC14, 1);
++}
++#endif
++
++#ifdef CONFIG_HAS_DATAFLASH
++static void at91samm10g45ek_spi_hw_init(void)
++{
++ at91_set_B_periph(AT91_PIN_PB3, 0); /* SPI0_NPCS0 */
++
++ at91_set_B_periph(AT91_PIN_PB0, 0); /* SPI0_MISO */
++ at91_set_B_periph(AT91_PIN_PB1, 0); /* SPI0_MOSI */
++ at91_set_B_periph(AT91_PIN_PB2, 0); /* SPI0_SPCK */
++
++ /* Enable clock */
++ at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9G45_ID_SPI0);
++}
++#endif
++
++#ifdef CONFIG_MACB
++static void at91samm10g45ek_macb_hw_init(void)
++{
++ unsigned long rstc;
++
++ /* Enable clock */
++ at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9G45_ID_EMAC);
++
++ /*
++ * Disable pull-up on:
++ * RXDV (PA15) => PHY normal mode (not Test mode)
++ * ERX0 (PA12) => PHY ADDR0
++ * ERX1 (PA13) => PHY ADDR1 => PHYADDR = 0x0
++ *
++ * PHY has internal pull-down
++ */
++ writel(pin_to_mask(AT91_PIN_PA15) |
++ pin_to_mask(AT91_PIN_PA12) |
++ pin_to_mask(AT91_PIN_PA13),
++ pin_to_controller(AT91_PIN_PA0) + PIO_PUDR);
++
++ rstc = at91_sys_read(AT91_RSTC_MR);
++
++ /* Need to reset PHY -> 500ms reset */
++ at91_sys_write(AT91_RSTC_MR, AT91_RSTC_KEY |
++ (AT91_RSTC_ERSTL & (0x0D << 8)) |
++ AT91_RSTC_URSTEN);
++
++ at91_sys_write(AT91_RSTC_CR, AT91_RSTC_KEY | AT91_RSTC_EXTRST);
++
++ /* Wait for end hardware reset */
++ while (!(at91_sys_read(AT91_RSTC_SR) & AT91_RSTC_NRSTL));
++
++ /* Restore NRST value */
++ at91_sys_write(AT91_RSTC_MR, AT91_RSTC_KEY |
++ (rstc) |
++ AT91_RSTC_URSTEN);
++
++ /* Re-enable pull-up */
++ writel(pin_to_mask(AT91_PIN_PA15) |
++ pin_to_mask(AT91_PIN_PA12) |
++ pin_to_mask(AT91_PIN_PA13),
++ pin_to_controller(AT91_PIN_PA0) + PIO_PUER);
++
++ at91_set_A_periph(AT91_PIN_PA17, 0); /* ETXCK_EREFCK */
++ at91_set_A_periph(AT91_PIN_PA15, 0); /* ERXDV */
++ at91_set_A_periph(AT91_PIN_PA12, 0); /* ERX0 */
++ at91_set_A_periph(AT91_PIN_PA13, 0); /* ERX1 */
++ at91_set_A_periph(AT91_PIN_PA16, 0); /* ERXER */
++ at91_set_A_periph(AT91_PIN_PA14, 0); /* ETXEN */
++ at91_set_A_periph(AT91_PIN_PA10, 0); /* ETX0 */
++ at91_set_A_periph(AT91_PIN_PA11, 0); /* ETX1 */
++ at91_set_A_periph(AT91_PIN_PA19, 0); /* EMDIO */
++ at91_set_A_periph(AT91_PIN_PA18, 0); /* EMDC */
++
++#ifndef CONFIG_RMII
++ at91_set_B_periph(AT91_PIN_PA29, 0); /* ECRS */
++ at91_set_B_periph(AT91_PIN_PA30, 0); /* ECOL */
++ at91_set_B_periph(AT91_PIN_PA8, 0); /* ERX2 */
++ at91_set_B_periph(AT91_PIN_PA9, 0); /* ERX3 */
++ at91_set_B_periph(AT91_PIN_PA28, 0); /* ERXCK */
++ at91_set_B_periph(AT91_PIN_PA6, 0); /* ETX2 */
++ at91_set_B_periph(AT91_PIN_PA7, 0); /* ETX3 */
++ at91_set_B_periph(AT91_PIN_PA27, 0); /* ETXER */
++#endif
++
++}
++#endif
++
++#ifdef CONFIG_LCD
++vidinfo_t panel_info = {
++ vl_col: 480,
++ vl_row: 272,
++ vl_clk: 125000,
++ vl_sync: ATMEL_LCDC_INVLINE_NORMAL |
++ ATMEL_LCDC_INVFRAME_NORMAL,
++ vl_bpix: 3,
++ vl_tft: 1,
++ vl_hsync_len: 41,
++ vl_left_margin: 2,
++ vl_right_margin:2,
++ vl_vsync_len: 1,
++ vl_upper_margin:2,
++ vl_lower_margin:2,
++ mmio: AT91SAM9G45_LCDC_BASE,
++};
++
++void lcd_enable(void)
++{
++ at91_set_gpio_value(AT91_PIN_PE6, 1); /* power up */
++}
++
++void lcd_disable(void)
++{
++ at91_set_gpio_value(AT91_PIN_PE6, 0); /* power down */
++}
++
++static void at91samm10g45ek_lcd_hw_init(void)
++{
++ at91_set_A_periph(AT91_PIN_PE0, 0); /* LCDDPWR */
++
++ at91_set_A_periph(AT91_PIN_PE4, 0); /* LCDHSYNC */
++ at91_set_A_periph(AT91_PIN_PE5, 0); /* LCDDOTCK */
++
++ at91_set_gpio_input(AT91_PIN_PE6, 0); /* LCDDEN */
++
++ at91_set_A_periph(AT91_PIN_PE7, 0); /* LCDD0 */
++ at91_set_A_periph(AT91_PIN_PE8, 0); /* LCDD1 */
++ at91_set_A_periph(AT91_PIN_PE9, 0); /* LCDD2 */
++ at91_set_A_periph(AT91_PIN_PE10, 0); /* LCDD3 */
++ at91_set_A_periph(AT91_PIN_PE11, 0); /* LCDD4 */
++ at91_set_A_periph(AT91_PIN_PE12, 0); /* LCDD5 */
++ at91_set_A_periph(AT91_PIN_PE13, 0); /* LCDD6 */
++ at91_set_A_periph(AT91_PIN_PE14, 0); /* LCDD7 */
++ at91_set_A_periph(AT91_PIN_PE15, 0); /* LCDD8 */
++ at91_set_A_periph(AT91_PIN_PE16, 0); /* LCDD9 */
++ at91_set_A_periph(AT91_PIN_PE17, 0); /* LCDD10 */
++ at91_set_A_periph(AT91_PIN_PE18, 0); /* LCDD11 */
++ at91_set_A_periph(AT91_PIN_PE19, 0); /* LCDD12 */
++ at91_set_B_periph(AT91_PIN_PE20, 0); /* LCDD13 */
++ at91_set_A_periph(AT91_PIN_PE21, 0); /* LCDD14 */
++ at91_set_A_periph(AT91_PIN_PE22, 0); /* LCDD15 */
++ at91_set_A_periph(AT91_PIN_PE23, 0); /* LCDD16 */
++ at91_set_A_periph(AT91_PIN_PE24, 0); /* LCDD17 */
++ at91_set_A_periph(AT91_PIN_PE25, 0); /* LCDD18 */
++ at91_set_A_periph(AT91_PIN_PE26, 0); /* LCDD19 */
++ at91_set_A_periph(AT91_PIN_PE27, 0); /* LCDD20 */
++ at91_set_B_periph(AT91_PIN_PE28, 0); /* LCDD21 */
++ at91_set_A_periph(AT91_PIN_PE29, 0); /* LCDD22 */
++ at91_set_A_periph(AT91_PIN_PE30, 0); /* LCDD23 */
++
++ at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9G45_ID_LCDC);
++
++ gd->fb_base = AT91SAM9G45_SRAM_BASE;
++}
++#endif
++
++#if defined(CONFIG_MACB) && defined(CONFIG_CMD_NET)
++extern int macb_eth_initialize(int id, void *regs, unsigned int phy_addr);
++
++int board_eth_init(bd_t *bis)
++{
++ macb_eth_initialize(0, (void *)AT91SAM9G45_BASE_EMAC, 0x00);
++}
++#endif
++
++int board_init(void)
++{
++ /* Enable Ctrlc */
++ console_init_f();
++
++ /* arch number of AT91SAM9M10G45EK-Board */
++#ifdef CONFIG_AT91SAM9M10G45EK
++ gd->bd->bi_arch_number = MACH_TYPE_AT91SAM9M10G45EK;
++#elif defined CONFIG_AT91SAM9G45EKES
++ gd->bd->bi_arch_number = MACH_TYPE_AT91SAM9G45EKES;
++#elif defined CONFIG_AT91SAM9M10EKES
++ gd->bd->bi_arch_number = MACH_TYPE_AT91SAM9M10EKES;
++#endif
++ /* adress of boot parameters */
++ gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
++
++ at91samm10g45ek_serial_hw_init();
++#ifdef CONFIG_CMD_NAND
++ at91samm10g45ek_nand_hw_init();
++#endif
++#ifdef CONFIG_HAS_DATAFLASH
++ at91samm10g45ek_spi_hw_init();
++#endif
++#ifdef CONFIG_MACB
++ at91samm10g45ek_macb_hw_init();
++#endif
++
++#ifdef CONFIG_LCD
++ at91samm10g45ek_lcd_hw_init();
++#endif
++ return 0;
++}
++
++int dram_init(void)
++{
++ gd->bd->bi_dram[0].start = PHYS_SDRAM;
++ gd->bd->bi_dram[0].size = PHYS_SDRAM_SIZE;
++ return 0;
++}
++
++#ifdef CONFIG_RESET_PHY_R
++void reset_phy(void)
++{
++#ifdef CONFIG_MACB
++ /*
++ * Initialize ethernet HW addr prior to starting Linux,
++ * needed for nfsroot
++ */
++ eth_init(gd->bd);
++#endif
++}
++#endif
+diff -uprN u-boot-1.3.4-vanilla/board/atmel/at91sam9m10g45ek/config.mk u-boot-1.3.4/board/atmel/at91sam9m10g45ek/config.mk
+--- u-boot-1.3.4-vanilla/board/atmel/at91sam9m10g45ek/config.mk 1969-12-31 17:00:00.000000000 -0700
++++ u-boot-1.3.4/board/atmel/at91sam9m10g45ek/config.mk 2010-03-25 16:45:59.000000000 -0500
+@@ -0,0 +1 @@
++TEXT_BASE = 0x73f00000
+diff -uprN u-boot-1.3.4-vanilla/board/atmel/at91sam9m10g45ek/led.c u-boot-1.3.4/board/atmel/at91sam9m10g45ek/led.c
+--- u-boot-1.3.4-vanilla/board/atmel/at91sam9m10g45ek/led.c 1969-12-31 17:00:00.000000000 -0700
++++ u-boot-1.3.4/board/atmel/at91sam9m10g45ek/led.c 2010-03-25 16:45:59.000000000 -0500
+@@ -0,0 +1,64 @@
++/*
++ * (C) Copyright 2007-2008
++ * Stelian Pop <stelian.pop@leadtechdesign.com>
++ * Lead Tech Design <www.leadtechdesign.com>
++ *
++ * See file CREDITS for list of people who contributed to this
++ * project.
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License as
++ * published by the Free Software Foundation; either version 2 of
++ * the License, or (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
++ * MA 02111-1307 USA
++ */
++
++#include <common.h>
++#include <asm/arch/at91sam9g45.h>
++#include <asm/arch/at91_pmc.h>
++#include <asm/arch/gpio.h>
++#include <asm/arch/io.h>
++
++#define RED_LED AT91_PIN_PD31 /* this is the user1 led */
++#define GREEN_LED AT91_PIN_PD0 /* this is the user2 led */
++
++void red_LED_on(void)
++{
++ at91_set_gpio_value(RED_LED, 1);
++}
++
++void red_LED_off(void)
++{
++ at91_set_gpio_value(RED_LED, 0);
++}
++
++void green_LED_on(void)
++{
++ at91_set_gpio_value(GREEN_LED, 0);
++}
++
++void green_LED_off(void)
++{
++ at91_set_gpio_value(GREEN_LED, 1);
++}
++
++void coloured_LED_init(void)
++{
++ /* Enable clock */
++ at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9G45_ID_PIODE);
++
++ at91_set_gpio_output(RED_LED, 1);
++ at91_set_gpio_output(GREEN_LED, 1);
++
++ at91_set_gpio_value(RED_LED, 0);
++ at91_set_gpio_value(GREEN_LED, 1);
++}
+diff -uprN u-boot-1.3.4-vanilla/board/atmel/at91sam9m10g45ek/Makefile u-boot-1.3.4/board/atmel/at91sam9m10g45ek/Makefile
+--- u-boot-1.3.4-vanilla/board/atmel/at91sam9m10g45ek/Makefile 1969-12-31 17:00:00.000000000 -0700
++++ u-boot-1.3.4/board/atmel/at91sam9m10g45ek/Makefile 2010-03-25 16:45:59.000000000 -0500
+@@ -0,0 +1,57 @@
++#
++# (C) Copyright 2003-2008
++# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
++#
++# (C) Copyright 2008
++# Stelian Pop <stelian.pop@leadtechdesign.com>
++# Lead Tech Design <www.leadtechdesign.com>
++#
++# See file CREDITS for list of people who contributed to this
++# project.
++#
++# This program is free software; you can redistribute it and/or
++# modify it under the terms of the GNU General Public License as
++# published by the Free Software Foundation; either version 2 of
++# the License, or (at your option) any later version.
++#
++# This program is distributed in the hope that it will be useful,
++# but WITHOUT ANY WARRANTY; without even the implied warranty of
++# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++# GNU General Public License for more details.
++#
++# You should have received a copy of the GNU General Public License
++# along with this program; if not, write to the Free Software
++# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
++# MA 02111-1307 USA
++#
++
++include $(TOPDIR)/config.mk
++
++LIB = $(obj)lib$(BOARD).a
++
++COBJS-y += at91sam9m10g45ek.o
++COBJS-y += led.o
++COBJS-y += partition.o
++COBJS-$(CONFIG_CMD_NAND) += nand.o
++
++SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
++OBJS := $(addprefix $(obj),$(COBJS-y))
++SOBJS := $(addprefix $(obj),$(SOBJS))
++
++$(LIB): $(obj).depend $(OBJS) $(SOBJS)
++ $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
++
++clean:
++ rm -f $(SOBJS) $(OBJS)
++
++distclean: clean
++ rm -f $(LIB) core *.bak $(obj).depend
++
++#########################################################################
++
++# defines $(obj).depend target
++include $(SRCTREE)/rules.mk
++
++sinclude $(obj).depend
++
++#########################################################################
+diff -uprN u-boot-1.3.4-vanilla/board/atmel/at91sam9m10g45ek/nand.c u-boot-1.3.4/board/atmel/at91sam9m10g45ek/nand.c
+--- u-boot-1.3.4-vanilla/board/atmel/at91sam9m10g45ek/nand.c 1969-12-31 17:00:00.000000000 -0700
++++ u-boot-1.3.4/board/atmel/at91sam9m10g45ek/nand.c 2010-03-25 16:45:59.000000000 -0500
+@@ -0,0 +1,79 @@
++/*
++ * (C) Copyright 2007-2008
++ * Stelian Pop <stelian.pop@leadtechdesign.com>
++ * Lead Tech Design <www.leadtechdesign.com>
++ *
++ * (C) Copyright 2006 ATMEL Rousset, Lacressonniere Nicolas
++ *
++ * See file CREDITS for list of people who contributed to this
++ * project.
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License as
++ * published by the Free Software Foundation; either version 2 of
++ * the License, or (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
++ * MA 02111-1307 USA
++ */
++
++#include <common.h>
++#include <asm/arch/at91sam9g45.h>
++#include <asm/arch/gpio.h>
++#include <asm/arch/at91_pio.h>
++
++#include <nand.h>
++
++/*
++ * hardware specific access to control-lines
++ */
++#define MASK_ALE (1 << 21) /* our ALE is AD21 */
++#define MASK_CLE (1 << 22) /* our CLE is AD22 */
++
++static void at91samm10g45ek_nand_hwcontrol(struct mtd_info *mtd, int cmd)
++{
++ struct nand_chip *this = mtd->priv;
++ ulong IO_ADDR_W = (ulong) this->IO_ADDR_W;
++
++ IO_ADDR_W &= ~(MASK_ALE|MASK_CLE);
++ switch (cmd) {
++ case NAND_CTL_SETCLE:
++ IO_ADDR_W |= MASK_CLE;
++ break;
++ case NAND_CTL_SETALE:
++ IO_ADDR_W |= MASK_ALE;
++ break;
++ case NAND_CTL_CLRNCE:
++ at91_set_gpio_value(AT91_PIN_PC14, 1);
++ break;
++ case NAND_CTL_SETNCE:
++ at91_set_gpio_value(AT91_PIN_PC14, 0);
++ break;
++ }
++ this->IO_ADDR_W = (void *) IO_ADDR_W;
++}
++
++static int at91samm10g45ek_nand_ready(struct mtd_info *mtd)
++{
++ return at91_get_gpio_value(AT91_PIN_PC8);
++}
++
++int board_nand_init(struct nand_chip *nand)
++{
++ nand->eccmode = NAND_ECC_SOFT;
++#ifdef CFG_NAND_DBW_16
++ nand->options = NAND_BUSWIDTH_16;
++#endif
++ nand->hwcontrol = at91samm10g45ek_nand_hwcontrol;
++ nand->dev_ready = at91samm10g45ek_nand_ready;
++ nand->chip_delay = 20;
++
++ return 0;
++}
+diff -uprN u-boot-1.3.4-vanilla/board/atmel/at91sam9m10g45ek/partition.c u-boot-1.3.4/board/atmel/at91sam9m10g45ek/partition.c
+--- u-boot-1.3.4-vanilla/board/atmel/at91sam9m10g45ek/partition.c 1969-12-31 17:00:00.000000000 -0700
++++ u-boot-1.3.4/board/atmel/at91sam9m10g45ek/partition.c 2010-03-25 16:45:59.000000000 -0500
+@@ -0,0 +1,39 @@
++/*
++ * (C) Copyright 2008
++ * Ulf Samuelsson <ulf@atmel.com>
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License as
++ * published by the Free Software Foundation; either version 2 of
++ * the License, or (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
++ * MA 02111-1307 USA
++ *
++ */
++#include <common.h>
++#include <config.h>
++#include <asm/hardware.h>
++#include <dataflash.h>
++
++AT91S_DATAFLASH_INFO dataflash_info[CFG_MAX_DATAFLASH_BANKS];
++
++struct dataflash_addr cs[CFG_MAX_DATAFLASH_BANKS] = {
++ {CFG_DATAFLASH_LOGIC_ADDR_CS0, 0}, /* Logical adress, CS */
++};
++
++/*define the area offsets*/
++dataflash_protect_t area_list[NB_DATAFLASH_AREA] = {
++ {0x00000000, 0x000041FF, FLAG_PROTECT_SET, 0, "Bootstrap"},
++ {0x00004200, 0x000083FF, FLAG_PROTECT_CLEAR, 0, "Environment"},
++ {0x00008400, 0x00041FFF, FLAG_PROTECT_SET, 0, "U-Boot"},
++ {0x00042000, 0x00251FFF, FLAG_PROTECT_CLEAR, 0, "Kernel"},
++ {0x00252000, 0xFFFFFFFF, FLAG_PROTECT_CLEAR, 0, "FS"},
++};
+diff -uprN u-boot-1.3.4-vanilla/cpu/arm926ejs/at91sam9/usb.c u-boot-1.3.4/cpu/arm926ejs/at91sam9/usb.c
+--- u-boot-1.3.4-vanilla/cpu/arm926ejs/at91sam9/usb.c 2008-08-12 09:08:38.000000000 -0500
++++ u-boot-1.3.4/cpu/arm926ejs/at91sam9/usb.c 2010-03-25 16:45:59.000000000 -0500
+@@ -33,7 +33,7 @@ int usb_cpu_init(void)
+ {
+ /* Enable USB host clock. */
+ at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_UHP);
+-#ifdef CONFIG_AT91SAM9261
++#if defined(CONFIG_AT91SAM9261) || defined(CONFIG_AT91SAM9G10)
+ at91_sys_write(AT91_PMC_SCER, AT91_PMC_UHP | AT91_PMC_HCK0);
+ #else
+ at91_sys_write(AT91_PMC_SCER, AT91_PMC_UHP);
+@@ -46,7 +46,7 @@ int usb_cpu_stop(void)
+ {
+ /* Disable USB host clock. */
+ at91_sys_write(AT91_PMC_PCDR, 1 << AT91_ID_UHP);
+-#ifdef CONFIG_AT91SAM9261
++#if defined(CONFIG_AT91SAM9261) || defined(CONFIG_AT91SAM9G10)
+ at91_sys_write(AT91_PMC_SCDR, AT91_PMC_UHP | AT91_PMC_HCK0);
+ #else
+ at91_sys_write(AT91_PMC_SCDR, AT91_PMC_UHP);
+diff -uprN u-boot-1.3.4-vanilla/doc/README.at91 u-boot-1.3.4/doc/README.at91
+--- u-boot-1.3.4-vanilla/doc/README.at91 1969-12-31 17:00:00.000000000 -0700
++++ u-boot-1.3.4/doc/README.at91 2010-03-25 16:45:59.000000000 -0500
+@@ -0,0 +1,88 @@
++Atmel AT91 Evaluation kits
++
++http://atmel.com/dyn/products/tools.asp?family_id=605#1443
++
++------------------------------------------------------------------------------
++AT91SAM9260EK
++------------------------------------------------------------------------------
++
++Memory map
++ 0x20000000 - 23FFFFFF SDRAM (64 MB)
++ 0xC0000000 - Cxxxxxxx Atmel Dataflash card (J13)
++ 0xD0000000 - Dxxxxxxx Soldered Atmel Dataflash
++
++Environment variables
++
++ U-Boot environment variables can be stored at different places:
++ - Dataflash on SPI chip select 1 (default)
++ - Dataflash on SPI chip select 0 (dataflash card)
++ - Nand flash.
++
++ You can choose your storage location at config step (here for at91sam9260ek) :
++ make at91sam9260ek_config - use data flash (spi cs1) (default)
++ make at91sam9260ek_nandflash_config - use nand flash
++ make at91sam9260ek_dataflash_cs0_config - use data flash (spi cs0)
++ make at91sam9260ek_dataflash_cs1_config - use data flash (spi cs1)
++
++
++------------------------------------------------------------------------------
++AT91SAM9261EK
++------------------------------------------------------------------------------
++
++Memory map
++ 0x20000000 - 23FFFFFF SDRAM (64 MB)
++ 0xC0000000 - Cxxxxxxx Soldered Atmel Dataflash
++ 0xD0000000 - Dxxxxxxx Atmel Dataflash card (J22)
++
++Environment variables
++
++ U-Boot environment variables can be stored at different places:
++ - Dataflash on SPI chip select 0 (default)
++ - Dataflash on SPI chip select 3 (dataflash card)
++ - Nand flash.
++
++ You can choose your storage location at config step (here for at91sam9260ek) :
++ make at91sam9261ek_config - use data flash (spi cs0) (default)
++ make at91sam9261ek_nandflash_config - use nand flash
++ make at91sam9261ek_dataflash_cs0_config - use data flash (spi cs0)
++ make at91sam9261ek_dataflash_cs3_config - use data flash (spi cs3)
++
++
++------------------------------------------------------------------------------
++AT91SAM9263EK
++------------------------------------------------------------------------------
++
++Memory map
++ 0x20000000 - 23FFFFFF SDRAM (64 MB)
++ 0xC0000000 - Cxxxxxxx Atmel Dataflash card (J9)
++
++Environment variables
++
++ U-Boot environment variables can be stored at different places:
++ - Dataflash on SPI chip select 0 (dataflash card)
++ - Nand flash.
++
++ You can choose your storage location at config step (here for at91sam9260ek) :
++ make at91sam9263ek_config - use data flash (spi cs0) (default)
++ make at91sam9263ek_nandflash_config - use nand flash
++ make at91sam9263ek_dataflash_cs0_config - use data flash (spi cs0)
++
++
++------------------------------------------------------------------------------
++AT91SAM9RLEK
++------------------------------------------------------------------------------
++
++Memory map
++ 0x20000000 - 23FFFFFF SDRAM (64 MB)
++ 0xC0000000 - Cxxxxxxx Soldered Atmel Dataflash
++
++Environment variables
++
++ U-Boot environment variables can be stored at different places:
++ - Dataflash on SPI chip select 0
++ - Nand flash.
++
++ You can choose your storage location at config step (here for at91sam9260ek) :
++ make at91sam9263ek_config - use data flash (spi cs0) (default)
++ make at91sam9263ek_nandflash_config - use nand flash
++ make at91sam9263ek_dataflash_cs0_config - use data flash (spi cs0)
+diff -uprN u-boot-1.3.4-vanilla/drivers/net/macb.c u-boot-1.3.4/drivers/net/macb.c
+--- u-boot-1.3.4-vanilla/drivers/net/macb.c 2008-08-12 09:08:38.000000000 -0500
++++ u-boot-1.3.4/drivers/net/macb.c 2010-03-25 16:45:59.000000000 -0500
+@@ -414,18 +414,16 @@ static int macb_init(struct eth_device *
+
+ /* choose RMII or MII mode. This depends on the board */
+ #ifdef CONFIG_RMII
+-#if defined(CONFIG_AT91CAP9) || defined(CONFIG_AT91SAM9260) || \
+- defined(CONFIG_AT91SAM9263)
+- macb_writel(macb, USRIO, MACB_BIT(RMII) | MACB_BIT(CLKEN));
+-#else
++#if defined(CONFIG_AVR32)
+ macb_writel(macb, USRIO, 0);
+-#endif
+ #else
+-#if defined(CONFIG_AT91CAP9) || defined(CONFIG_AT91SAM9260) || \
+- defined(CONFIG_AT91SAM9263)
+- macb_writel(macb, USRIO, MACB_BIT(CLKEN));
++ macb_writel(macb, USRIO, MACB_BIT(RMII) | MACB_BIT(CLKEN));
++#endif
+ #else
++#if defined(CONFIG_AVR32)
+ macb_writel(macb, USRIO, MACB_BIT(MII));
++#else
++ macb_writel(macb, USRIO, MACB_BIT(CLKEN));
+ #endif
+ #endif /* CONFIG_RMII */
+
+diff -uprN u-boot-1.3.4-vanilla/include/asm-arm/arch-at91sam9/at91sam9g45.h u-boot-1.3.4/include/asm-arm/arch-at91sam9/at91sam9g45.h
+--- u-boot-1.3.4-vanilla/include/asm-arm/arch-at91sam9/at91sam9g45.h 1969-12-31 17:00:00.000000000 -0700
++++ u-boot-1.3.4/include/asm-arm/arch-at91sam9/at91sam9g45.h 2010-03-25 16:45:59.000000000 -0500
+@@ -0,0 +1,135 @@
++/*
++ * Chip-specific header file for the AT91SAM9M1x family
++ *
++ * Copyright (C) 2008 Atmel Corporation.
++ *
++ * Common definitions.
++ * Based on AT91SAM9G45 preliminary datasheet.
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License, or
++ * (at your option) any later version.
++ */
++
++#ifndef AT91SAM9G45_H
++#define AT91SAM9G45_H
++
++/*
++ * Peripheral identifiers/interrupts.
++ */
++#define AT91_ID_FIQ 0 /* Advanced Interrupt Controller (FIQ) */
++#define AT91_ID_SYS 1 /* System Controller Interrupt */
++#define AT91SAM9G45_ID_PIOA 2 /* Parallel I/O Controller A */
++#define AT91SAM9G45_ID_PIOB 3 /* Parallel I/O Controller B */
++#define AT91SAM9G45_ID_PIOC 4 /* Parallel I/O Controller C */
++#define AT91SAM9G45_ID_PIODE 5 /* Parallel I/O Controller D and E */
++#define AT91SAM9G45_ID_TRNG 6 /* True Random Number Generator */
++#define AT91SAM9G45_ID_US0 7 /* USART 0 */
++#define AT91SAM9G45_ID_US1 8 /* USART 1 */
++#define AT91SAM9G45_ID_US2 9 /* USART 2 */
++#define AT91SAM9G45_ID_US3 10 /* USART 3 */
++#define AT91SAM9G45_ID_MCI0 11 /* High Speed Multimedia Card Interface 0 */
++#define AT91SAM9G45_ID_TWI0 12 /* Two-Wire Interface 0 */
++#define AT91SAM9G45_ID_TWI1 13 /* Two-Wire Interface 1 */
++#define AT91SAM9G45_ID_SPI0 14 /* Serial Peripheral Interface 0 */
++#define AT91SAM9G45_ID_SPI1 15 /* Serial Peripheral Interface 1 */
++#define AT91SAM9G45_ID_SSC0 16 /* Synchronous Serial Controller 0 */
++#define AT91SAM9G45_ID_SSC1 17 /* Synchronous Serial Controller 1 */
++#define AT91SAM9G45_ID_TCB 18 /* Timer Counter 0, 1, 2, 3, 4 and 5 */
++#define AT91SAM9G45_ID_PWMC 19 /* Pulse Width Modulation Controller */
++#define AT91SAM9G45_ID_TSC 20 /* Touch Screen ADC Controller */
++#define AT91SAM9G45_ID_DMA 21 /* DMA Controller */
++#define AT91SAM9G45_ID_UHPHS 22 /* USB Host High Speed */
++#define AT91SAM9G45_ID_LCDC 23 /* LCD Controller */
++#define AT91SAM9G45_ID_AC97C 24 /* AC97 Controller */
++#define AT91SAM9G45_ID_EMAC 25 /* Ethernet MAC */
++#define AT91SAM9G45_ID_ISI 26 /* Image Sensor Interface */
++#define AT91SAM9G45_ID_UDPHS 27 /* USB Device High Speed */
++#define AT91SAM9G45_ID_AESTDESSHA 28 /* AES + T-DES + SHA */
++#define AT91SAM9G45_ID_MCI1 29 /* High Speed Multimedia Card Interface 1 */
++#define AT91SAM9G45_ID_VDEC 30 /* Video Decoder */
++#define AT91SAM9G45_ID_IRQ0 31 /* Advanced Interrupt Controller */
++
++/*
++ * User Peripheral physical base addresses.
++ */
++#define AT91SAM9G45_BASE_UDPHS 0xfff78000
++#define AT91SAM9G45_BASE_TC0 0xfff7c000
++#define AT91SAM9G45_BASE_TC1 0xfff7c040
++#define AT91SAM9G45_BASE_TC2 0xfff7c080
++#define AT91SAM9G45_BASE_MCI0 0xfff80000
++#define AT91SAM9G45_BASE_TWI0 0xfff84000
++#define AT91SAM9G45_BASE_TWI1 0xfff88000
++#define AT91SAM9G45_BASE_US0 0xfff8c000
++#define AT91SAM9G45_BASE_US1 0xfff90000
++#define AT91SAM9G45_BASE_US2 0xfff94000
++#define AT91SAM9G45_BASE_US3 0xfff98000
++#define AT91SAM9G45_BASE_SSC0 0xfff9c000
++#define AT91SAM9G45_BASE_SSC1 0xfffa0000
++#define AT91SAM9G45_BASE_SPI0 0xfffa4000
++#define AT91SAM9G45_BASE_SPI1 0xfffa8000
++#define AT91SAM9G45_BASE_AC97C 0xfffac000
++#define AT91SAM9G45_BASE_TSC 0xfffb0000
++#define AT91SAM9G45_BASE_ISI 0xfffb4000
++#define AT91SAM9G45_BASE_PWMC 0xfffb8000
++#define AT91SAM9G45_BASE_EMAC 0xfffbc000
++#define AT91SAM9G45_BASE_AES 0xfffc0000
++#define AT91SAM9G45_BASE_TDES 0xfffc4000
++#define AT91SAM9G45_BASE_SHA 0xfffc8000
++#define AT91SAM9G45_BASE_TRNG 0xfffcc000
++#define AT91SAM9G45_BASE_MCI1 0xfffd0000
++#define AT91SAM9G45_BASE_TC3 0xfffd4000
++#define AT91SAM9G45_BASE_TC4 0xfffd4040
++#define AT91SAM9G45_BASE_TC5 0xfffd4080
++#define AT91_BASE_SYS 0xffffe200
++
++/*
++ * System Peripherals (offset from AT91_BASE_SYS)
++ */
++#define AT91_ECC (0xffffe200 - AT91_BASE_SYS)
++#define AT91_DDRSDRC1 (0xffffe400 - AT91_BASE_SYS)
++#define AT91_DDRSDRC0 (0xffffe600 - AT91_BASE_SYS)
++#define AT91_SMC (0xffffe800 - AT91_BASE_SYS)
++#define AT91_MATRIX (0xffffea00 - AT91_BASE_SYS)
++#define AT91_DMA (0xffffec00 - AT91_BASE_SYS)
++#define AT91_DBGU (0xffffee00 - AT91_BASE_SYS)
++#define AT91_AIC (0xfffff000 - AT91_BASE_SYS)
++#define AT91_PIOA (0xfffff200 - AT91_BASE_SYS)
++#define AT91_PIOB (0xfffff400 - AT91_BASE_SYS)
++#define AT91_PIOC (0xfffff600 - AT91_BASE_SYS)
++#define AT91_PIOD (0xfffff800 - AT91_BASE_SYS)
++#define AT91_PIOE (0xfffffa00 - AT91_BASE_SYS)
++#define AT91_PMC (0xfffffc00 - AT91_BASE_SYS)
++#define AT91_RSTC (0xfffffd00 - AT91_BASE_SYS)
++#define AT91_SHDWC (0xfffffd10 - AT91_BASE_SYS)
++#define AT91_RTT (0xfffffd20 - AT91_BASE_SYS)
++#define AT91_PIT (0xfffffd30 - AT91_BASE_SYS)
++#define AT91_WDT (0xfffffd40 - AT91_BASE_SYS)
++#define AT91_GPBR (0xfffffd60 - AT91_BASE_SYS)
++#define AT91_RTC (0xfffffdb0 - AT91_BASE_SYS)
++
++#define AT91_USART0 AT91SAM9G45_BASE_US0
++#define AT91_USART1 AT91SAM9G45_BASE_US1
++#define AT91_USART2 AT91SAM9G45_BASE_US2
++#define AT91_USART3 AT91SAM9G45_BASE_US3
++
++/*
++ * Internal Memory.
++ */
++#define AT91SAM9G45_SRAM_BASE 0x00300000 /* Internal SRAM base address */
++#define AT91SAM9G45_SRAM_SIZE SZ_64K /* Internal SRAM size (64Kb) */
++
++#define AT91SAM9G45_ROM_BASE 0x00400000 /* Internal ROM base address */
++#define AT91SAM9G45_ROM_SIZE SZ_64K /* Internal ROM size (64Kb) */
++
++#define AT91SAM9G45_LCDC_BASE 0x00500000 /* LCD Controller */
++#define AT91SAM9G45_UDPHS_FIFO 0x00600000 /* USB Device HS controller */
++#define AT91SAM9G45_HCI_BASE 0x00700000 /* USB Host controller (OHCI) */
++#define AT91SAM9G45_EHCI_BASE 0x00800000 /* USB Host controller (EHCI) */
++#define AT91SAM9G45_VDEC_BASE 0x00900000 /* Video Decoder Controller */
++
++#define CONFIG_DRAM_BASE AT91_CHIPSELECT_6
++
++
++#endif
+diff -uprN u-boot-1.3.4-vanilla/include/asm-arm/arch-at91sam9/at91sam9g45_matrix.h u-boot-1.3.4/include/asm-arm/arch-at91sam9/at91sam9g45_matrix.h
+--- u-boot-1.3.4-vanilla/include/asm-arm/arch-at91sam9/at91sam9g45_matrix.h 1969-12-31 17:00:00.000000000 -0700
++++ u-boot-1.3.4/include/asm-arm/arch-at91sam9/at91sam9g45_matrix.h 2010-03-25 16:45:59.000000000 -0500
+@@ -0,0 +1,153 @@
++/*
++ * Matrix-centric header file for the AT91SAM9M1x family
++ *
++ * Copyright (C) 2008 Atmel Corporation.
++ *
++ * Memory Controllers (MATRIX, EBI) - System peripherals registers.
++ * Based on AT91SAM9G45 preliminary datasheet.
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License, or
++ * (at your option) any later version.
++ */
++
++#ifndef AT91SAM9G45_MATRIX_H
++#define AT91SAM9G45_MATRIX_H
++
++#define AT91_MATRIX_MCFG0 (AT91_MATRIX + 0x00) /* Master Configuration Register 0 */
++#define AT91_MATRIX_MCFG1 (AT91_MATRIX + 0x04) /* Master Configuration Register 1 */
++#define AT91_MATRIX_MCFG2 (AT91_MATRIX + 0x08) /* Master Configuration Register 2 */
++#define AT91_MATRIX_MCFG3 (AT91_MATRIX + 0x0C) /* Master Configuration Register 3 */
++#define AT91_MATRIX_MCFG4 (AT91_MATRIX + 0x10) /* Master Configuration Register 4 */
++#define AT91_MATRIX_MCFG5 (AT91_MATRIX + 0x14) /* Master Configuration Register 5 */
++#define AT91_MATRIX_MCFG6 (AT91_MATRIX + 0x18) /* Master Configuration Register 6 */
++#define AT91_MATRIX_MCFG7 (AT91_MATRIX + 0x1C) /* Master Configuration Register 7 */
++#define AT91_MATRIX_MCFG8 (AT91_MATRIX + 0x20) /* Master Configuration Register 8 */
++#define AT91_MATRIX_MCFG9 (AT91_MATRIX + 0x24) /* Master Configuration Register 9 */
++#define AT91_MATRIX_MCFG10 (AT91_MATRIX + 0x28) /* Master Configuration Register 10 */
++#define AT91_MATRIX_MCFG11 (AT91_MATRIX + 0x2C) /* Master Configuration Register 11 */
++#define AT91_MATRIX_ULBT (7 << 0) /* Undefined Length Burst Type */
++#define AT91_MATRIX_ULBT_INFINITE (0 << 0)
++#define AT91_MATRIX_ULBT_SINGLE (1 << 0)
++#define AT91_MATRIX_ULBT_FOUR (2 << 0)
++#define AT91_MATRIX_ULBT_EIGHT (3 << 0)
++#define AT91_MATRIX_ULBT_SIXTEEN (4 << 0)
++#define AT91_MATRIX_ULBT_THIRTYTWO (5 << 0)
++#define AT91_MATRIX_ULBT_SIXTYFOUR (6 << 0)
++#define AT91_MATRIX_ULBT_128 (7 << 0)
++
++#define AT91_MATRIX_SCFG0 (AT91_MATRIX + 0x40) /* Slave Configuration Register 0 */
++#define AT91_MATRIX_SCFG1 (AT91_MATRIX + 0x44) /* Slave Configuration Register 1 */
++#define AT91_MATRIX_SCFG2 (AT91_MATRIX + 0x48) /* Slave Configuration Register 2 */
++#define AT91_MATRIX_SCFG3 (AT91_MATRIX + 0x4C) /* Slave Configuration Register 3 */
++#define AT91_MATRIX_SCFG4 (AT91_MATRIX + 0x50) /* Slave Configuration Register 4 */
++#define AT91_MATRIX_SCFG5 (AT91_MATRIX + 0x54) /* Slave Configuration Register 5 */
++#define AT91_MATRIX_SCFG6 (AT91_MATRIX + 0x58) /* Slave Configuration Register 6 */
++#define AT91_MATRIX_SCFG7 (AT91_MATRIX + 0x5C) /* Slave Configuration Register 7 */
++#define AT91_MATRIX_SLOT_CYCLE (0x1ff << 0) /* Maximum Number of Allowed Cycles for a Burst */
++#define AT91_MATRIX_DEFMSTR_TYPE (3 << 16) /* Default Master Type */
++#define AT91_MATRIX_DEFMSTR_TYPE_NONE (0 << 16)
++#define AT91_MATRIX_DEFMSTR_TYPE_LAST (1 << 16)
++#define AT91_MATRIX_DEFMSTR_TYPE_FIXED (2 << 16)
++#define AT91_MATRIX_FIXED_DEFMSTR (0xf << 18) /* Fixed Index of Default Master */
++
++#define AT91_MATRIX_PRAS0 (AT91_MATRIX + 0x80) /* Priority Register A for Slave 0 */
++#define AT91_MATRIX_PRBS0 (AT91_MATRIX + 0x84) /* Priority Register B for Slave 0 */
++#define AT91_MATRIX_PRAS1 (AT91_MATRIX + 0x88) /* Priority Register A for Slave 1 */
++#define AT91_MATRIX_PRBS1 (AT91_MATRIX + 0x8C) /* Priority Register B for Slave 1 */
++#define AT91_MATRIX_PRAS2 (AT91_MATRIX + 0x90) /* Priority Register A for Slave 2 */
++#define AT91_MATRIX_PRBS2 (AT91_MATRIX + 0x94) /* Priority Register B for Slave 2 */
++#define AT91_MATRIX_PRAS3 (AT91_MATRIX + 0x98) /* Priority Register A for Slave 3 */
++#define AT91_MATRIX_PRBS3 (AT91_MATRIX + 0x9C) /* Priority Register B for Slave 3 */
++#define AT91_MATRIX_PRAS4 (AT91_MATRIX + 0xA0) /* Priority Register A for Slave 4 */
++#define AT91_MATRIX_PRBS4 (AT91_MATRIX + 0xA4) /* Priority Register B for Slave 4 */
++#define AT91_MATRIX_PRAS5 (AT91_MATRIX + 0xA8) /* Priority Register A for Slave 5 */
++#define AT91_MATRIX_PRBS5 (AT91_MATRIX + 0xAC) /* Priority Register B for Slave 5 */
++#define AT91_MATRIX_PRAS6 (AT91_MATRIX + 0xB0) /* Priority Register A for Slave 6 */
++#define AT91_MATRIX_PRBS6 (AT91_MATRIX + 0xB4) /* Priority Register B for Slave 6 */
++#define AT91_MATRIX_PRAS7 (AT91_MATRIX + 0xB8) /* Priority Register A for Slave 7 */
++#define AT91_MATRIX_PRBS7 (AT91_MATRIX + 0xBC) /* Priority Register B for Slave 7 */
++#define AT91_MATRIX_M0PR (3 << 0) /* Master 0 Priority */
++#define AT91_MATRIX_M1PR (3 << 4) /* Master 1 Priority */
++#define AT91_MATRIX_M2PR (3 << 8) /* Master 2 Priority */
++#define AT91_MATRIX_M3PR (3 << 12) /* Master 3 Priority */
++#define AT91_MATRIX_M4PR (3 << 16) /* Master 4 Priority */
++#define AT91_MATRIX_M5PR (3 << 20) /* Master 5 Priority */
++#define AT91_MATRIX_M6PR (3 << 24) /* Master 6 Priority */
++#define AT91_MATRIX_M7PR (3 << 28) /* Master 7 Priority */
++#define AT91_MATRIX_M8PR (3 << 0) /* Master 8 Priority (in Register B) */
++#define AT91_MATRIX_M9PR (3 << 4) /* Master 9 Priority (in Register B) */
++#define AT91_MATRIX_M10PR (3 << 8) /* Master 10 Priority (in Register B) */
++#define AT91_MATRIX_M11PR (3 << 12) /* Master 11 Priority (in Register B) */
++
++#define AT91_MATRIX_MRCR (AT91_MATRIX + 0x100) /* Master Remap Control Register */
++#define AT91_MATRIX_RCB0 (1 << 0) /* Remap Command for AHB Master 0 (ARM926EJ-S Instruction Master) */
++#define AT91_MATRIX_RCB1 (1 << 1) /* Remap Command for AHB Master 1 (ARM926EJ-S Data Master) */
++#define AT91_MATRIX_RCB2 (1 << 2)
++#define AT91_MATRIX_RCB3 (1 << 3)
++#define AT91_MATRIX_RCB4 (1 << 4)
++#define AT91_MATRIX_RCB5 (1 << 5)
++#define AT91_MATRIX_RCB6 (1 << 6)
++#define AT91_MATRIX_RCB7 (1 << 7)
++#define AT91_MATRIX_RCB8 (1 << 8)
++#define AT91_MATRIX_RCB9 (1 << 9)
++#define AT91_MATRIX_RCB10 (1 << 10)
++#define AT91_MATRIX_RCB11 (1 << 11)
++
++#define AT91_MATRIX_TCMR (AT91_MATRIX + 0x110) /* TCM Configuration Register */
++#define AT91_MATRIX_ITCM_SIZE (0xf << 0) /* Size of ITCM enabled memory block */
++#define AT91_MATRIX_ITCM_0 (0 << 0)
++#define AT91_MATRIX_ITCM_32 (6 << 0)
++#define AT91_MATRIX_DTCM_SIZE (0xf << 4) /* Size of DTCM enabled memory block */
++#define AT91_MATRIX_DTCM_0 (0 << 4)
++#define AT91_MATRIX_DTCM_32 (6 << 4)
++#define AT91_MATRIX_DTCM_64 (7 << 4)
++#define AT91_MATRIX_TCM_NWS (0x1 << 11) /* Wait state TCM register */
++#define AT91_MATRIX_TCM_NO_WS (0x0 << 11)
++#define AT91_MATRIX_TCM_ONE_WS (0x1 << 11)
++
++#define AT91_MATRIX_VIDEO (AT91_MATRIX + 0x118) /* Video Mode Configuration Register */
++#define AT91C_VDEC_SEL (0x1 << 0) /* Video Mode Selection */
++#define AT91C_VDEC_SEL_OFF (0 << 0)
++#define AT91C_VDEC_SEL_ON (1 << 0)
++
++#define AT91_MATRIX_EBICSA (AT91_MATRIX + 0x128) /* EBI Chip Select Assignment Register */
++#define AT91_MATRIX_EBI_CS1A (1 << 1) /* Chip Select 1 Assignment */
++#define AT91_MATRIX_EBI_CS1A_SMC (0 << 1)
++#define AT91_MATRIX_EBI_CS1A_SDRAMC (1 << 1)
++#define AT91_MATRIX_EBI_CS3A (1 << 3) /* Chip Select 3 Assignment */
++#define AT91_MATRIX_EBI_CS3A_SMC (0 << 3)
++#define AT91_MATRIX_EBI_CS3A_SMC_SMARTMEDIA (1 << 3)
++#define AT91_MATRIX_EBI_CS4A (1 << 4) /* Chip Select 4 Assignment */
++#define AT91_MATRIX_EBI_CS4A_SMC (0 << 4)
++#define AT91_MATRIX_EBI_CS4A_SMC_CF0 (1 << 4)
++#define AT91_MATRIX_EBI_CS5A (1 << 5) /* Chip Select 5 Assignment */
++#define AT91_MATRIX_EBI_CS5A_SMC (0 << 5)
++#define AT91_MATRIX_EBI_CS5A_SMC_CF1 (1 << 5)
++#define AT91_MATRIX_EBI_DBPUC (1 << 8) /* Data Bus Pull-up Configuration */
++#define AT91_MATRIX_EBI_DBPU_ON (0 << 8)
++#define AT91_MATRIX_EBI_DBPU_OFF (1 << 8)
++#define AT91_MATRIX_EBI_VDDIOMSEL (1 << 16) /* Memory voltage selection */
++#define AT91_MATRIX_EBI_VDDIOMSEL_1_8V (0 << 16)
++#define AT91_MATRIX_EBI_VDDIOMSEL_3_3V (1 << 16)
++#define AT91_MATRIX_EBI_EBI_IOSR (1 << 17) /* EBI I/O slew rate selection */
++#define AT91_MATRIX_EBI_EBI_IOSR_REDUCED (0 << 17)
++#define AT91_MATRIX_EBI_EBI_IOSR_NORMAL (1 << 17)
++#define AT91_MATRIX_EBI_DDR_IOSR (1 << 18) /* DDR2 dedicated port I/O slew rate selection */
++#define AT91_MATRIX_EBI_DDR_IOSR_REDUCED (0 << 18)
++#define AT91_MATRIX_EBI_DDR_IOSR_NORMAL (1 << 18)
++
++#define AT91_MATRIX_WPMR (AT91_MATRIX + 0x1E4) /* Write Protect Mode Register */
++#define AT91_MATRIX_WPMR_WPEN (1 << 0) /* Write Protect ENable */
++#define AT91_MATRIX_WPMR_WP_WPDIS (0 << 0)
++#define AT91_MATRIX_WPMR_WP_WPEN (1 << 0)
++#define AT91_MATRIX_WPMR_WPKEY (0xFFFFFF << 8) /* Write Protect KEY */
++
++#define AT91_MATRIX_WPSR (AT91_MATRIX + 0x1E8) /* Write Protect Status Register */
++#define AT91_MATRIX_WPSR_WPVS (1 << 0) /* Write Protect Violation Status */
++#define AT91_MATRIX_WPSR_NO_WPV (0 << 0)
++#define AT91_MATRIX_WPSR_WPV (1 << 0)
++#define AT91_MATRIX_WPSR_WPVSRC (0xFFFF << 8) /* Write Protect Violation Source */
++
++#endif
+diff -uprN u-boot-1.3.4-vanilla/include/asm-arm/arch-at91sam9/hardware.h u-boot-1.3.4/include/asm-arm/arch-at91sam9/hardware.h
+--- u-boot-1.3.4-vanilla/include/asm-arm/arch-at91sam9/hardware.h 2008-08-12 09:08:38.000000000 -0500
++++ u-boot-1.3.4/include/asm-arm/arch-at91sam9/hardware.h 2010-03-25 16:45:59.000000000 -0500
+@@ -18,13 +18,13 @@
+
+ #if defined(CONFIG_AT91RM9200)
+ #include <asm/arch/at91rm9200.h>
+-#elif defined(CONFIG_AT91SAM9260)
++#elif defined(CONFIG_AT91SAM9260) || defined(CONFIG_AT91SAM9G20)
+ #include <asm/arch/at91sam9260.h>
+ #define AT91_BASE_EMAC AT91SAM9260_BASE_EMAC
+ #define AT91_BASE_SPI AT91SAM9260_BASE_SPI0
+ #define AT91_ID_UHP AT91SAM9260_ID_UHP
+ #define AT91_PMC_UHP AT91SAM926x_PMC_UHP
+-#elif defined(CONFIG_AT91SAM9261)
++#elif defined(CONFIG_AT91SAM9261) || defined(CONFIG_AT91SAM9G10)
+ #include <asm/arch/at91sam9261.h>
+ #define AT91_BASE_SPI AT91SAM9261_BASE_SPI0
+ #define AT91_ID_UHP AT91SAM9261_ID_UHP
+@@ -39,6 +39,12 @@
+ #include <asm/arch/at91sam9rl.h>
+ #define AT91_BASE_SPI AT91SAM9RL_BASE_SPI
+ #define AT91_ID_UHP AT91SAM9RL_ID_UHP
++#elif defined(CONFIG_AT91SAM9G45)
++#include <asm/arch/at91sam9g45.h>
++#define AT91_BASE_EMAC AT91SAM9G45_BASE_EMAC
++#define AT91_BASE_SPI AT91SAM9G45_BASE_SPI0
++#define AT91_ID_UHP AT91SAM9G45_ID_UHPHS
++#define AT91_PMC_UHP AT91SAM926x_PMC_UHP
+ #elif defined(CONFIG_AT91CAP9)
+ #include <asm/arch/at91cap9.h>
+ #define AT91_BASE_EMAC AT91CAP9_BASE_EMAC
+diff -uprN u-boot-1.3.4-vanilla/include/asm-arm/mach-types.h u-boot-1.3.4/include/asm-arm/mach-types.h
+--- u-boot-1.3.4-vanilla/include/asm-arm/mach-types.h 2008-08-12 09:08:38.000000000 -0500
++++ u-boot-1.3.4/include/asm-arm/mach-types.h 2010-03-25 16:45:59.000000000 -0500
+@@ -1595,7 +1595,13 @@ extern unsigned int __machine_arch_type;
+ #define MACH_TYPE_P300 1602
+ #define MACH_TYPE_XDACOMET 1603
+ #define MACH_TYPE_DEXFLEX2 1604
++#define MACH_TYPE_AT91SAM9G20EK 1624
+ #define MACH_TYPE_SFFSDR 1657
++#define MACH_TYPE_AT91SAM9M10G45EK 1830
++#define MACH_TYPE_AT91SAM9G10EK 2159
++#define MACH_TYPE_AT91SAM9G45EKES 2212
++#define MACH_TYPE_AT91SAM9G20EK_2MMC 2288
++#define MACH_TYPE_AT91SAM9M10EKES 2509
+
+ #ifdef CONFIG_ARCH_EBSA110
+ # ifdef machine_arch_type
+@@ -11701,6 +11707,18 @@ extern unsigned int __machine_arch_type;
+ # define machine_is_at91sam9261ek() (0)
+ #endif
+
++#ifdef CONFIG_MACH_AT91SAM9G10EK
++# ifdef machine_arch_type
++# undef machine_arch_type
++# define machine_arch_type __machine_arch_type
++# else
++# define machine_arch_type MACH_TYPE_AT91SAM9G10EK
++# endif
++# define machine_is_at91sam9g10ek() (machine_arch_type == MACH_TYPE_AT91SAM9G10EK)
++#else
++# define machine_is_at91sam9g10ek() (0)
++#endif
++
+ #ifdef CONFIG_MACH_LOFT
+ # ifdef machine_arch_type
+ # undef machine_arch_type
+@@ -20605,6 +20623,69 @@ extern unsigned int __machine_arch_type;
+ # define machine_is_dexflex2() (0)
+ #endif
+
++#ifdef CONFIG_MACH_AT91SAM9G20EK
++# ifdef machine_arch_type
++# undef machine_arch_type
++# define machine_arch_type __machine_arch_type
++# else
++# define machine_arch_type MACH_TYPE_AT91SAM9G20EK
++# endif
++# define machine_is_at91sam9g20ek() (machine_arch_type == MACH_TYPE_AT91SAM9G20EK)
++#else
++# define machine_is_at91sam9g20ek() (0)
++#endif
++
++
++#ifdef CONFIG_MACH_AT91SAM9M10G45EK
++# ifdef machine_arch_type
++# undef machine_arch_type
++# define machine_arch_type __machine_arch_type
++# else
++# define machine_arch_type MACH_TYPE_AT91SAM9M10G45EK
++# endif
++# define machine_is_at91sam9m10g45ek() (machine_arch_type == MACH_TYPE_AT91SAM9M10G45EK)
++#else
++# define machine_is_at91sam9m10g45ek() (0)
++#endif
++
++#ifdef CONFIG_MACH_AT91SAM9G45EKES
++# ifdef machine_arch_type
++# undef machine_arch_type
++# define machine_arch_type __machine_arch_type
++# else
++# define machine_arch_type MACH_TYPE_AT91SAM9G45EKES
++# endif
++# define machine_is_at91sam9g45ekes() (machine_arch_type == MACH_TYPE_AT91SAM9G45EKES)
++#else
++# define machine_is_at91sam9g45ekes() (0)
++#endif
++
++#ifdef CONFIG_MACH_AT91SAM9G20EK_2MMC
++# ifdef machine_arch_type
++# undef machine_arch_type
++# define machine_arch_type __machine_arch_type
++# else
++# define machine_arch_type MACH_TYPE_AT91SAM9G20EK_2MMC
++# endif
++# define machine_is_at91sam9g20ek_2mmc() (machine_arch_type == MACH_TYPE_AT91SAM9G20EK_2MMC)
++#else
++# define machine_is_at91sam9g20ek_2mmc() (0)
++#endif
++
++#ifdef CONFIG_MACH_AT91SAM9M10EKES
++# ifdef machine_arch_type
++# undef machine_arch_type
++# define machine_arch_type __machine_arch_type
++# else
++# define machine_arch_type MACH_TYPE_AT91SAM9M10EKES
++# endif
++# define machine_is_at91sam9m10ekes() (machine_arch_type == MACH_TYPE_AT91SAM9M10EKES)
++#else
++# define machine_is_at91sam9m10ekes() (0)
++#endif
++
++
++
+ /*
+ * These have not yet been registered
+ */
+diff -uprN u-boot-1.3.4-vanilla/include/configs/at91sam9260ek.h u-boot-1.3.4/include/configs/at91sam9260ek.h
+--- u-boot-1.3.4-vanilla/include/configs/at91sam9260ek.h 2008-08-12 09:08:38.000000000 -0500
++++ u-boot-1.3.4/include/configs/at91sam9260ek.h 2010-03-25 16:45:59.000000000 -0500
+@@ -127,10 +127,6 @@
+ #define CFG_MEMTEST_START PHYS_SDRAM
+ #define CFG_MEMTEST_END 0x23e00000
+
+-#undef CFG_USE_DATAFLASH_CS0
+-#define CFG_USE_DATAFLASH_CS1 1
+-#undef CFG_USE_NANDFLASH
+-
+ #ifdef CFG_USE_DATAFLASH_CS0
+
+ /* bootstrap + u-boot + env + linux in dataflash on CS0 */
+diff -uprN u-boot-1.3.4-vanilla/include/configs/at91sam9261ek.h u-boot-1.3.4/include/configs/at91sam9261ek.h
+--- u-boot-1.3.4-vanilla/include/configs/at91sam9261ek.h 2008-08-12 09:08:38.000000000 -0500
++++ u-boot-1.3.4/include/configs/at91sam9261ek.h 2010-03-25 16:45:59.000000000 -0500
+@@ -142,9 +142,6 @@
+ #define CFG_MEMTEST_START PHYS_SDRAM
+ #define CFG_MEMTEST_END 0x23e00000
+
+-#define CFG_USE_DATAFLASH_CS0 1
+-#undef CFG_USE_NANDFLASH
+-
+ #ifdef CFG_USE_DATAFLASH_CS0
+
+ /* bootstrap + u-boot + env + linux in dataflash on CS0 */
+@@ -159,6 +156,20 @@
+ "mtdparts=at91_nand:-(root) " \
+ "rw rootfstype=jffs2"
+
++#elif CFG_USE_DATAFLASH_CS3
++
++/* bootstrap + u-boot + env + linux in dataflash on CS3 */
++#define CFG_ENV_IS_IN_DATAFLASH 1
++#define CFG_MONITOR_BASE (CFG_DATAFLASH_LOGIC_ADDR_CS3 + 0x8400)
++#define CFG_ENV_OFFSET 0x4200
++#define CFG_ENV_ADDR (CFG_DATAFLASH_LOGIC_ADDR_CS3 + CFG_ENV_OFFSET)
++#define CFG_ENV_SIZE 0x4200
++#define CONFIG_BOOTCOMMAND "cp.b 0xD0042000 0x22000000 0x210000; bootm"
++#define CONFIG_BOOTARGS "console=ttyS0,115200 " \
++ "root=/dev/mtdblock0 " \
++ "mtdparts=at91_nand:-(root) " \
++ "rw rootfstype=jffs2"
++
+ #else /* CFG_USE_NANDFLASH */
+
+ /* bootstrap + u-boot + env + linux in nandflash */
+diff -uprN u-boot-1.3.4-vanilla/include/configs/at91sam9263ek.h u-boot-1.3.4/include/configs/at91sam9263ek.h
+--- u-boot-1.3.4-vanilla/include/configs/at91sam9263ek.h 2008-08-12 09:08:38.000000000 -0500
++++ u-boot-1.3.4/include/configs/at91sam9263ek.h 2010-03-25 16:45:59.000000000 -0500
+@@ -148,9 +148,6 @@
+ #define CFG_MEMTEST_START PHYS_SDRAM
+ #define CFG_MEMTEST_END 0x23e00000
+
+-#define CFG_USE_DATAFLASH 1
+-#undef CFG_USE_NANDFLASH
+-
+ #ifdef CFG_USE_DATAFLASH
+
+ /* bootstrap + u-boot + env + linux in dataflash on CS0 */
+diff -uprN u-boot-1.3.4-vanilla/include/configs/at91sam9g10ek.h u-boot-1.3.4/include/configs/at91sam9g10ek.h
+--- u-boot-1.3.4-vanilla/include/configs/at91sam9g10ek.h 1969-12-31 17:00:00.000000000 -0700
++++ u-boot-1.3.4/include/configs/at91sam9g10ek.h 2010-03-25 16:45:59.000000000 -0500
+@@ -0,0 +1,213 @@
++/*
++ * (C) Copyright 2007-2008
++ * Stelian Pop <stelian.pop@leadtechdesign.com>
++ * Lead Tech Design <www.leadtechdesign.com>
++ *
++ * Configuation settings for the AT91SAM9G10EK board.
++ *
++ * See file CREDITS for list of people who contributed to this
++ * project.
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License as
++ * published by the Free Software Foundation; either version 2 of
++ * the License, or (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
++ * MA 02111-1307 USA
++ */
++
++#ifndef __CONFIG_H
++#define __CONFIG_H
++
++/* ARM asynchronous clock */
++#define AT91_CPU_NAME "AT91SAM9G10"
++#define AT91_MAIN_CLOCK 266000000 /* from 18.432 MHz crystal */
++#define AT91_MASTER_CLOCK 133000000 /* peripheral = main / 2 */
++#define CFG_HZ 1000000 /* 1us resolution */
++
++#define AT91_SLOW_CLOCK 32768 /* slow clock */
++
++#define CONFIG_ARM926EJS 1 /* This is an ARM926EJS Core */
++#define CONFIG_AT91SAM9G10 1 /* It's an Atmel AT91SAM9G10 SoC*/
++#define CONFIG_AT91SAM9G10EK 1 /* on an AT91SAM9G10EK Board */
++#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
++
++#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
++#define CONFIG_SETUP_MEMORY_TAGS 1
++#define CONFIG_INITRD_TAG 1
++
++#define CONFIG_SKIP_LOWLEVEL_INIT
++#define CONFIG_SKIP_RELOCATE_UBOOT
++
++/*
++ * Hardware drivers
++ */
++#define CONFIG_ATMEL_USART 1
++#undef CONFIG_USART0
++#undef CONFIG_USART1
++#undef CONFIG_USART2
++#define CONFIG_USART3 1 /* USART 3 is DBGU */
++
++/* LCD */
++#define CONFIG_LCD 1
++#define LCD_BPP LCD_COLOR8
++#define CONFIG_LCD_LOGO 1
++#undef LCD_TEST_PATTERN
++#define CONFIG_LCD_INFO 1
++#define CONFIG_LCD_INFO_BELOW_LOGO 1
++#define CFG_WHITE_ON_BLACK 1
++#define CONFIG_ATMEL_LCD 1
++/* #define CONFIG_ATMEL_LCD_BGR555 1 */
++#define CFG_CONSOLE_IS_IN_ENV 1
++
++#define CONFIG_BOOTDELAY 3
++
++/*
++ * BOOTP options
++ */
++#define CONFIG_BOOTP_BOOTFILESIZE 1
++#define CONFIG_BOOTP_BOOTPATH 1
++#define CONFIG_BOOTP_GATEWAY 1
++#define CONFIG_BOOTP_HOSTNAME 1
++
++/*
++ * Command line configuration.
++ */
++#include <config_cmd_default.h>
++#undef CONFIG_CMD_BDI
++#undef CONFIG_CMD_IMI
++#undef CONFIG_CMD_AUTOSCRIPT
++#undef CONFIG_CMD_FPGA
++#undef CONFIG_CMD_LOADS
++#undef CONFIG_CMD_IMLS
++
++#define CONFIG_CMD_PING 1
++#define CONFIG_CMD_DHCP 1
++#define CONFIG_CMD_NAND 1
++#define CONFIG_CMD_USB 1
++
++/* SDRAM */
++#define CONFIG_NR_DRAM_BANKS 1
++#define PHYS_SDRAM 0x20000000
++#define PHYS_SDRAM_SIZE 0x04000000 /* 64 megs */
++
++/* DataFlash */
++#define CONFIG_HAS_DATAFLASH 1
++#define CFG_SPI_WRITE_TOUT (5*CFG_HZ)
++#define CFG_MAX_DATAFLASH_BANKS 2
++#define CFG_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* CS0 */
++#define CFG_DATAFLASH_LOGIC_ADDR_CS3 0xD0000000 /* CS3 */
++#define AT91_SPI_CLK 15000000
++#define DATAFLASH_TCSS (0x1a << 16)
++#define DATAFLASH_TCHS (0x1 << 24)
++
++/* NAND flash */
++#define NAND_MAX_CHIPS 1
++#define CFG_MAX_NAND_DEVICE 1
++#define CFG_NAND_BASE 0x40000000
++#define CFG_NAND_DBW_8 1
++
++/* NOR flash - no real flash on this board */
++#define CFG_NO_FLASH 1
++
++/* Ethernet */
++#define CONFIG_DRIVER_DM9000 1
++#define CONFIG_DM9000_BASE 0x30000000
++#define DM9000_IO CONFIG_DM9000_BASE
++#define DM9000_DATA (CONFIG_DM9000_BASE + 4)
++#define CONFIG_DM9000_USE_16BIT 1
++#define CONFIG_NET_RETRY_COUNT 20
++#define CONFIG_RESET_PHY_R 1
++
++/* USB */
++#define CONFIG_USB_OHCI_NEW 1
++#define LITTLEENDIAN 1
++#define CONFIG_DOS_PARTITION 1
++#define CFG_USB_OHCI_CPU_INIT 1
++#define CFG_USB_OHCI_REGS_BASE 0x00500000 /* AT91SAM9G10_UHP_BASE */
++#define CFG_USB_OHCI_SLOT_NAME "at91sam9g10"
++#define CFG_USB_OHCI_MAX_ROOT_PORTS 2
++#define CONFIG_USB_STORAGE 1
++
++#define CFG_LOAD_ADDR 0x22000000 /* load address */
++
++#define CFG_MEMTEST_START PHYS_SDRAM
++#define CFG_MEMTEST_END 0x23e00000
++
++#ifdef CFG_USE_DATAFLASH_CS0
++
++/* bootstrap + u-boot + env + linux in dataflash on CS0 */
++#define CFG_ENV_IS_IN_DATAFLASH 1
++#define CFG_MONITOR_BASE (CFG_DATAFLASH_LOGIC_ADDR_CS0 + 0x8400)
++#define CFG_ENV_OFFSET 0x4200
++#define CFG_ENV_ADDR (CFG_DATAFLASH_LOGIC_ADDR_CS0 + CFG_ENV_OFFSET)
++#define CFG_ENV_SIZE 0x4200
++#define CONFIG_BOOTCOMMAND "cp.b 0xC0042000 0x22000000 0x210000; bootm"
++#define CONFIG_BOOTARGS "console=ttyS0,115200 " \
++ "root=/dev/mtdblock0 " \
++ "mtdparts=at91_nand:-(root) " \
++ "rw rootfstype=jffs2"
++
++#elif CFG_USE_DATAFLASH_CS3
++
++/* bootstrap + u-boot + env + linux in dataflash on CS3 */
++#define CFG_ENV_IS_IN_DATAFLASH 1
++#define CFG_MONITOR_BASE (CFG_DATAFLASH_LOGIC_ADDR_CS3 + 0x8400)
++#define CFG_ENV_OFFSET 0x4200
++#define CFG_ENV_ADDR (CFG_DATAFLASH_LOGIC_ADDR_CS3 + CFG_ENV_OFFSET)
++#define CFG_ENV_SIZE 0x4200
++#define CONFIG_BOOTCOMMAND "cp.b 0xD0042000 0x22000000 0x210000; bootm"
++#define CONFIG_BOOTARGS "console=ttyS0,115200 " \
++ "root=/dev/mtdblock0 " \
++ "mtdparts=at91_nand:-(root) " \
++ "rw rootfstype=jffs2"
++
++#else /* CFG_USE_NANDFLASH */
++
++/* bootstrap + u-boot + env + linux in nandflash */
++#define CFG_ENV_IS_IN_NAND 1
++#define CFG_ENV_OFFSET 0x60000
++#define CFG_ENV_OFFSET_REDUND 0x80000
++#define CFG_ENV_SIZE 0x20000 /* 1 sector = 128 kB */
++#define CONFIG_BOOTCOMMAND "nand read 0x22000000 0xA0000 0x200000; bootm"
++#define CONFIG_BOOTARGS "console=ttyS0,115200 " \
++ "root=/dev/mtdblock5 " \
++ "mtdparts=at91_nand:128k(bootstrap)ro," \
++ "256k(uboot)ro,128k(env1)ro," \
++ "128k(env2)ro,2M(linux),-(root) " \
++ "rw rootfstype=jffs2"
++
++#endif
++
++#define CONFIG_BAUDRATE 115200
++#define CFG_BAUDRATE_TABLE {115200 , 19200, 38400, 57600, 9600 }
++
++#define CFG_PROMPT "U-Boot> "
++#define CFG_CBSIZE 256
++#define CFG_MAXARGS 16
++#define CFG_PBSIZE (CFG_CBSIZE + sizeof(CFG_PROMPT) + 16)
++#define CFG_LONGHELP 1
++#define CONFIG_CMDLINE_EDITING 1
++
++#define ROUND(A, B) (((A) + (B)) & ~((B) - 1))
++/*
++ * Size of malloc() pool
++ */
++#define CFG_MALLOC_LEN ROUND(3 * CFG_ENV_SIZE + 128*1024, 0x1000)
++#define CFG_GBL_DATA_SIZE 128 /* 128 bytes for initial data */
++
++#define CONFIG_STACKSIZE (32*1024) /* regular stack */
++
++#ifdef CONFIG_USE_IRQ
++#error CONFIG_USE_IRQ not supported
++#endif
++
++#endif
+diff -uprN u-boot-1.3.4-vanilla/include/configs/at91sam9g20ek.h u-boot-1.3.4/include/configs/at91sam9g20ek.h
+--- u-boot-1.3.4-vanilla/include/configs/at91sam9g20ek.h 1969-12-31 17:00:00.000000000 -0700
++++ u-boot-1.3.4/include/configs/at91sam9g20ek.h 2010-03-25 18:16:41.000000000 -0500
+@@ -0,0 +1,210 @@
++/*
++ * (C) Copyright 2007-2008
++ * Stelian Pop <stelian.pop@leadtechdesign.com>
++ * Lead Tech Design <www.leadtechdesign.com>
++ *
++ * Configuation settings for the AT91SAM9G20EK board.
++ *
++ * See file CREDITS for list of people who contributed to this
++ * project.
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License as
++ * published by the Free Software Foundation; either version 2 of
++ * the License, or (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
++ * MA 02111-1307 USA
++ */
++
++#ifndef __CONFIG_H
++#define __CONFIG_H
++
++/* ARM asynchronous clock */
++#define AT91_MAIN_CLOCK 18432000 /* 18.432 MHz crystal */
++#define AT91_MASTER_CLOCK 132096000 /* PLLA = main * 43 / 6 */
++#define CFG_HZ 1000000 /* 1us resolution */
++
++#define AT91_SLOW_CLOCK 32768 /* slow clock */
++
++#define CONFIG_ARM926EJS 1 /* This is an ARM926EJS Core */
++#define CONFIG_AT91SAM9G20 1 /* It's an Atmel AT91SAM9G20 SoC*/
++#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
++
++#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
++#define CONFIG_SETUP_MEMORY_TAGS 1
++#define CONFIG_INITRD_TAG 1
++
++#define CONFIG_SKIP_LOWLEVEL_INIT
++#define CONFIG_SKIP_RELOCATE_UBOOT
++
++/*
++ * Hardware drivers
++ */
++#define CONFIG_ATMEL_USART 1
++#undef CONFIG_USART0
++#undef CONFIG_USART1
++#undef CONFIG_USART2
++#define CONFIG_USART3 1 /* USART 3 is DBGU */
++
++#define CONFIG_BOOTDELAY 3
++
++/*
++ * BOOTP options
++ */
++#define CONFIG_BOOTP_BOOTFILESIZE 1
++#define CONFIG_BOOTP_BOOTPATH 1
++#define CONFIG_BOOTP_GATEWAY 1
++#define CONFIG_BOOTP_HOSTNAME 1
++
++/*
++ * Command line configuration.
++ */
++#include <config_cmd_default.h>
++#undef CONFIG_CMD_BDI
++#undef CONFIG_CMD_IMI
++#undef CONFIG_CMD_AUTOSCRIPT
++#undef CONFIG_CMD_FPGA
++#undef CONFIG_CMD_LOADS
++#undef CONFIG_CMD_IMLS
++
++#define CONFIG_CMD_PING 1
++#define CONFIG_CMD_DHCP 1
++#define CONFIG_CMD_NAND 1
++#define CONFIG_CMD_USB 1
++
++/* SDRAM */
++#define CONFIG_NR_DRAM_BANKS 1
++#define PHYS_SDRAM 0x20000000
++#define PHYS_SDRAM_SIZE 0x04000000 /* 64 megs */
++
++/* DataFlash */
++#define CONFIG_HAS_DATAFLASH 1
++#define CFG_SPI_WRITE_TOUT (5*CFG_HZ)
++#define CFG_MAX_DATAFLASH_BANKS 2
++#define CFG_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* CS0 */
++#define CFG_DATAFLASH_LOGIC_ADDR_CS1 0xD0000000 /* CS1 */
++#define AT91_SPI_CLK 15000000
++#define DATAFLASH_TCSS (0x22 << 16)
++#define DATAFLASH_TCHS (0x1 << 24)
++
++/* NAND flash */
++#define NAND_MAX_CHIPS 1
++#define CFG_MAX_NAND_DEVICE 1
++#define CFG_NAND_BASE 0x40000000
++#define CFG_NAND_DBW_8 1
++
++/* NOR flash - no real flash on this board */
++#define CFG_NO_FLASH 1
++
++/* Ethernet */
++#define CONFIG_NET 1
++#define CONFIG_MACB 1
++#define CONFIG_MII 1
++#define CONFIG_NET_MULTI 1
++#define CONFIG_NET_RETRY_COUNT 20
++#define CONFIG_RESET_PHY_R 1
++
++/* USB */
++#define CONFIG_USB_OHCI_NEW 1
++#define LITTLEENDIAN 1
++#define CONFIG_DOS_PARTITION 1
++#define CFG_USB_OHCI_CPU_INIT 1
++#define CFG_USB_OHCI_REGS_BASE 0x00500000 /* AT91SAM9G20_UHP_BASE */
++#define CFG_USB_OHCI_SLOT_NAME "at91sam9g20"
++#define CFG_USB_OHCI_MAX_ROOT_PORTS 2
++#define CONFIG_USB_STORAGE 1
++
++#define CFG_LOAD_ADDR 0x22000000 /* load address */
++
++#define CFG_MEMTEST_START PHYS_SDRAM
++#define CFG_MEMTEST_END 0x23e00000
++
++#ifdef CFG_USE_DATAFLASH_CS0
++
++/* bootstrap + u-boot + env + linux in dataflash on CS0 */
++#define CFG_ENV_IS_IN_DATAFLASH 1
++#define CFG_MONITOR_BASE (CFG_DATAFLASH_LOGIC_ADDR_CS0 + 0x8400)
++#define CFG_ENV_OFFSET 0x4200
++#define CFG_ENV_ADDR (CFG_DATAFLASH_LOGIC_ADDR_CS0 + CFG_ENV_OFFSET)
++#define CFG_ENV_SIZE 0x4200
++#define CONFIG_BOOTCOMMAND "cp.b 0xC0042000 0x22000000 0x210000; bootm"
++#define CONFIG_BOOTARGS "console=ttyS0,115200 " \
++ "root=/dev/mtdblock0 " \
++ "mtdparts=at91_nand:-(root) " \
++ "rw rootfstype=jffs2"
++
++#elif CFG_USE_DATAFLASH_CS1
++
++/* bootstrap + u-boot + env + linux in dataflash on CS1 */
++#define CFG_ENV_IS_IN_DATAFLASH 1
++#define CFG_MONITOR_BASE (CFG_DATAFLASH_LOGIC_ADDR_CS1 + 0x8400)
++#define CFG_ENV_OFFSET 0x4200
++#define CFG_ENV_ADDR (CFG_DATAFLASH_LOGIC_ADDR_CS1 + CFG_ENV_OFFSET)
++#define CFG_ENV_SIZE 0x4200
++#define CONFIG_BOOTCOMMAND "cp.b 0xD0042000 0x22000000 0x210000; bootm"
++#define CONFIG_BOOTARGS "console=ttyS0,115200 " \
++ "root=/dev/mtdblock0 " \
++ "mtdparts=at91_nand:-(root) " \
++ "rw rootfstype=jffs2"
++
++#else /* CFG_USE_NANDFLASH */
++
++/* bootstrap + u-boot + env + linux in nandflash */
++#define CFG_ENV_IS_IN_NAND 1
++#define CFG_ENV_OFFSET 0x60000
++#define CFG_ENV_OFFSET_REDUND 0x80000
++#define CFG_ENV_SIZE 0x20000 /* 1 sector = 128 kB */
++#define CONFIG_BOOTCOMMAND "nboot.jffs2 ${loadaddr} 0 ${kernel_addr}; bootm ${loadaddr}"
++#define CONFIG_BOOTARGS "mem=64M " \
++ "console=ttyS0,115200 " \
++ "root=/dev/mtdblock8 " \
++ "ro rootfstype=jffs2"
++
++#endif
++
++#define CONFIG_BAUDRATE 115200
++#define CFG_BAUDRATE_TABLE {115200 , 19200, 38400, 57600, 9600 }
++
++#define CFG_PROMPT "U-Boot> "
++#define CFG_CBSIZE 256
++#define CFG_MAXARGS 16
++#define CFG_PBSIZE (CFG_CBSIZE + sizeof(CFG_PROMPT) + 16)
++#define CFG_LONGHELP 1
++#define CONFIG_CMDLINE_EDITING 1
++
++#define ROUND(A, B) (((A) + (B)) & ~((B) - 1))
++/*
++ * Size of malloc() pool
++ */
++#define CFG_MALLOC_LEN ROUND(3 * CFG_ENV_SIZE + 128*1024, 0x1000)
++#define CFG_GBL_DATA_SIZE 128 /* 128 bytes for initial data */
++
++#define CONFIG_STACKSIZE (32*1024) /* regular stack */
++
++#ifdef CONFIG_USE_IRQ
++#error CONFIG_USE_IRQ not supported
++#endif
++
++#define CONFIG_AUTO_COMPLETE 1
++
++#define CONFIG_ENV_OVERWRITE 1
++#define CONFIG_ETHADDR 00:D0:A0:02:0D:E1
++#define CONFIG_IPADDR 192.168.2.1
++#define CONFIG_NETMASK 255.255.255.0
++#define CONFIG_SERVERIP 192.168.2.2
++#define CONFIG_HOSTNAME AT91SAM9G20
++#define CONFIG_LOADADDR 0x21400000
++
++#define CONFIG_EXTRA_ENV_SETTINGS \
++ "kernel_addr=0x000A0000\0" \
++ ""
++
++#endif
+diff -uprN u-boot-1.3.4-vanilla/include/configs/at91sam9m10g45ek.h u-boot-1.3.4/include/configs/at91sam9m10g45ek.h
+--- u-boot-1.3.4-vanilla/include/configs/at91sam9m10g45ek.h 1969-12-31 17:00:00.000000000 -0700
++++ u-boot-1.3.4/include/configs/at91sam9m10g45ek.h 2010-03-25 16:45:59.000000000 -0500
+@@ -0,0 +1,217 @@
++/*
++ * (C) Copyright 2007-2008
++ * Stelian Pop <stelian.pop@leadtechdesign.com>
++ * Lead Tech Design <www.leadtechdesign.com>
++ *
++ * Configuation settings for the AT91SAM9M10G45EK board(and AT91SAM9G45EKES).
++ *
++ * See file CREDITS for list of people who contributed to this
++ * project.
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License as
++ * published by the Free Software Foundation; either version 2 of
++ * the License, or (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
++ * MA 02111-1307 USA
++ */
++
++#ifndef __CONFIG_H
++#define __CONFIG_H
++
++/* ARM asynchronous clock */
++#define AT91_CPU_NAME "AT91SAM9G45"
++#define AT91_MAIN_CLOCK 400000000 /* from 12 MHz crystal */
++#define AT91_MASTER_CLOCK 133000000 /* peripheral = main / 3 */
++#define CFG_HZ 1000000 /* 1us resolution */
++
++#define AT91_SLOW_CLOCK 32768 /* slow clock */
++
++#define CONFIG_ARM926EJS 1 /* This is an ARM926EJS Core */
++#define CONFIG_AT91SAM9G45 1 /* It's an Atmel AT91SAM9G45 SoC*/
++
++#ifdef CFG_USE_AT91SAM9M10G45EK
++#define CONFIG_AT91SAM9M10G45EK 1 /* on an AT91SAM9M10G45EK Board */
++#endif
++
++#ifdef CFG_USE_AT91SAM9G45EKES
++#define CONFIG_AT91SAM9G45EKES 1 /* on an AT91SAM9G45EKES Board */
++#endif
++
++#ifdef CFG_USE_AT91SAM9M10EKES
++#define CONFIG_AT91SAM9M10EKES 1 /* on an AT91SAM9M10EKES Board */
++#endif
++
++#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
++
++#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
++#define CONFIG_SETUP_MEMORY_TAGS 1
++#define CONFIG_INITRD_TAG 1
++
++#define CONFIG_SKIP_LOWLEVEL_INIT
++#define CONFIG_SKIP_RELOCATE_UBOOT
++
++/*
++ * Hardware drivers
++ */
++#define CONFIG_ATMEL_USART 1
++#undef CONFIG_USART0
++#undef CONFIG_USART1
++#undef CONFIG_USART2
++#define CONFIG_USART3 1 /* USART 3 is DBGU */
++
++/* LCD */
++//#define CONFIG_LCD 1
++#undef CONFIG_LCD
++#define LCD_BPP LCD_COLOR8
++#define CONFIG_LCD_LOGO 1
++#undef LCD_TEST_PATTERN
++#define CONFIG_LCD_INFO 1
++#define CONFIG_LCD_INFO_BELOW_LOGO 1
++#define CFG_WHITE_ON_BLACK 1
++#define CONFIG_ATMEL_LCD 1
++#define CONFIG_ATMEL_LCD_BGR555 1
++#define CFG_CONSOLE_IS_IN_ENV 1
++
++#define CONFIG_BOOTDELAY 3
++
++/*
++ * BOOTP options
++ */
++#define CONFIG_BOOTP_BOOTFILESIZE 1
++#define CONFIG_BOOTP_BOOTPATH 1
++#define CONFIG_BOOTP_GATEWAY 1
++#define CONFIG_BOOTP_HOSTNAME 1
++
++/*
++ * Command line configuration.
++ */
++#include <config_cmd_default.h>
++#undef CONFIG_CMD_BDI
++#undef CONFIG_CMD_IMI
++#undef CONFIG_CMD_AUTOSCRIPT
++#undef CONFIG_CMD_FPGA
++#undef CONFIG_CMD_LOADS
++#undef CONFIG_CMD_IMLS
++
++#define CONFIG_CMD_PING 1
++#define CONFIG_CMD_DHCP 1
++#define CONFIG_CMD_NAND 1
++#define CONFIG_CMD_USB 1
++
++/* SDRAM */
++#define CONFIG_NR_DRAM_BANKS 1
++#define PHYS_SDRAM 0x70000000
++#define PHYS_SDRAM_SIZE 0x08000000 /* 128 megs */
++
++/* DataFlash */
++#define CONFIG_HAS_DATAFLASH 1
++#define CFG_SPI_WRITE_TOUT (5*CFG_HZ)
++#define CFG_MAX_DATAFLASH_BANKS 1
++#define CFG_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* CS0 */
++#define AT91_SPI_CLK 15000000
++#define DATAFLASH_TCSS (0x1a << 16)
++#define DATAFLASH_TCHS (0x1 << 24)
++
++/* NOR flash, if populated */
++#if 1
++#define CFG_NO_FLASH 1
++#else
++#define CFG_FLASH_CFI 1
++#define CONFIG_FLASH_CFI_DRIVER 1
++#define PHYS_FLASH_1 0x10000000
++#define CFG_FLASH_BASE PHYS_FLASH_1
++#define CFG_MAX_FLASH_SECT 256
++#define CFG_MAX_FLASH_BANKS 1
++#endif
++
++/* NAND flash */
++#define NAND_MAX_CHIPS 1
++#define CFG_MAX_NAND_DEVICE 1
++#define CFG_NAND_BASE 0x40000000
++#define CFG_NAND_DBW_8 1
++
++/* Ethernet */
++#define CONFIG_MACB 1
++/* #define CONFIG_MII 1 */
++#define CONFIG_RMII 1
++#define CONFIG_NET_MULTI 1
++#define CONFIG_NET_RETRY_COUNT 20
++#define CONFIG_RESET_PHY_R 1
++
++/* USB */
++#define CONFIG_USB_OHCI_NEW 1
++#define LITTLEENDIAN 1
++#define CONFIG_DOS_PARTITION 1
++#define CFG_USB_OHCI_CPU_INIT 1
++#define CFG_USB_OHCI_REGS_BASE 0x00700000 /* AT91SAM9G45_UHP_OHCI_BASE */
++#define CFG_USB_OHCI_SLOT_NAME "at91sam9g45"
++#define CFG_USB_OHCI_MAX_ROOT_PORTS 2
++#define CONFIG_USB_STORAGE 1
++
++#define CFG_LOAD_ADDR 0x22000000 /* load address */
++
++#define CFG_MEMTEST_START PHYS_SDRAM
++#define CFG_MEMTEST_END 0x23e00000
++
++#ifdef CFG_USE_DATAFLASH
++
++/* bootstrap + u-boot + env + linux in dataflash on CS0 */
++#define CFG_ENV_IS_IN_DATAFLASH 1
++#define CFG_MONITOR_BASE (CFG_DATAFLASH_LOGIC_ADDR_CS0 + 0x8400)
++#define CFG_ENV_OFFSET 0x4200
++#define CFG_ENV_ADDR (CFG_DATAFLASH_LOGIC_ADDR_CS0 + CFG_ENV_OFFSET)
++#define CFG_ENV_SIZE 0x4200
++#define CONFIG_BOOTCOMMAND "cp.b 0xC0042000 0x22000000 0x210000; bootm"
++#define CONFIG_BOOTARGS "console=ttyS0,115200 " \
++ "root=/dev/mtdblock0 " \
++ "mtdparts=at91_nand:-(root) "\
++ "rw rootfstype=jffs2"
++
++#else /* CFG_USE_NANDFLASH */
++
++/* bootstrap + u-boot + env + linux in nandflash */
++#define CFG_ENV_IS_IN_NAND 1
++#define CFG_ENV_OFFSET 0x60000
++#define CFG_ENV_OFFSET_REDUND 0x80000
++#define CFG_ENV_SIZE 0x20000 /* 1 sector = 128 kB */
++#define CONFIG_BOOTCOMMAND "nand read 0x22000000 0xA0000 0x200000; bootm"
++#define CONFIG_BOOTARGS "console=ttyS0,115200 " \
++ "root=/dev/mtdblock5 " \
++ "mtdparts=at91_nand:128k(bootstrap)ro,256k(uboot)ro,128k(env1)ro,128k(env2)ro,2M(linux),-(root) " \
++ "rw rootfstype=jffs2"
++
++#endif
++
++#define CONFIG_BAUDRATE 115200
++#define CFG_BAUDRATE_TABLE {115200 , 19200, 38400, 57600, 9600 }
++
++#define CFG_PROMPT "U-Boot> "
++#define CFG_CBSIZE 256
++#define CFG_MAXARGS 16
++#define CFG_PBSIZE (CFG_CBSIZE + sizeof(CFG_PROMPT) + 16)
++#define CFG_LONGHELP 1
++#define CONFIG_CMDLINE_EDITING 1
++
++#define ROUND(A, B) (((A) + (B)) & ~((B) - 1))
++/*
++ * Size of malloc() pool
++ */
++#define CFG_MALLOC_LEN ROUND(3 * CFG_ENV_SIZE + 128*1024, 0x1000)
++#define CFG_GBL_DATA_SIZE 128 /* 128 bytes for initial data */
++
++#define CONFIG_STACKSIZE (32*1024) /* regular stack */
++
++#ifdef CONFIG_USE_IRQ
++#error CONFIG_USE_IRQ not supported
++#endif
++
++#endif
+diff -uprN u-boot-1.3.4-vanilla/include/configs/at91sam9rlek.h u-boot-1.3.4/include/configs/at91sam9rlek.h
+--- u-boot-1.3.4-vanilla/include/configs/at91sam9rlek.h 2008-08-12 09:08:38.000000000 -0500
++++ u-boot-1.3.4/include/configs/at91sam9rlek.h 2010-03-25 16:45:59.000000000 -0500
+@@ -117,9 +117,6 @@
+ #define CFG_MEMTEST_START PHYS_SDRAM
+ #define CFG_MEMTEST_END 0x23e00000
+
+-#define CFG_USE_DATAFLASH 1
+-#undef CFG_USE_NANDFLASH
+-
+ #ifdef CFG_USE_DATAFLASH
+
+ /* bootstrap + u-boot + env + linux in dataflash on CS0 */
+diff -uprN u-boot-1.3.4-vanilla/Makefile u-boot-1.3.4/Makefile
+--- u-boot-1.3.4-vanilla/Makefile 2008-08-12 09:08:38.000000000 -0500
++++ u-boot-1.3.4/Makefile 2010-03-25 17:04:31.000000000 -0500
+@@ -21,6 +21,8 @@
+ # MA 02111-1307 USA
+ #
+
++export CROSS_COMPILE = /opt/timesys/toolchains/armv5l-linux/bin/armv5l-linux-
++
+ VERSION = 1
+ PATCHLEVEL = 3
+ SUBLEVEL = 4
+@@ -2353,15 +2355,6 @@ shannon_config : unconfig
+ at91rm9200dk_config : unconfig
+ @$(MKCONFIG) $(@:_config=) arm arm920t at91rm9200dk atmel at91rm9200
+
+-at91sam9261ek_config : unconfig
+- @$(MKCONFIG) $(@:_config=) arm arm926ejs at91sam9261ek atmel at91sam9
+-
+-at91sam9263ek_config : unconfig
+- @$(MKCONFIG) $(@:_config=) arm arm926ejs at91sam9263ek atmel at91sam9
+-
+-at91sam9rlek_config : unconfig
+- @$(MKCONFIG) $(@:_config=) arm arm926ejs at91sam9rlek atmel at91sam9
+-
+ cmc_pu2_config : unconfig
+ @$(MKCONFIG) $(@:_config=) arm arm920t cmc_pu2 NULL at91rm9200
+
+@@ -2384,8 +2377,175 @@ mp2usb_config : unconfig
+ at91cap9adk_config : unconfig
+ @$(MKCONFIG) $(@:_config=) arm arm926ejs at91cap9adk atmel at91sam9
+
++at91sam9260ek_nandflash_config \
++at91sam9260ek_dataflash_cs0_config \
++at91sam9260ek_dataflash_cs1_config \
+ at91sam9260ek_config : unconfig
+- @$(MKCONFIG) $(@:_config=) arm arm926ejs at91sam9260ek atmel at91sam9
++ @mkdir -p $(obj)include
++ @if [ "$(findstring _nandflash,$@)" ] ; then \
++ echo "#define CFG_USE_NANDFLASH 1" >>$(obj)include/config.h ; \
++ $(XECHO) "... with environment variable in NAND FLASH" ; \
++ elif [ "$(findstring dataflash_cs0,$@)" ] ; then \
++ echo "#define CFG_USE_DATAFLASH_CS0 1" >>$(obj)include/config.h ; \
++ $(XECHO) "... with environment variable in SPI DATAFLASH CS0" ; \
++ else \
++ echo "#define CFG_USE_DATAFLASH_CS1 1" >>$(obj)include/config.h ; \
++ $(XECHO) "... with environment variable in SPI DATAFLASH CS1" ; \
++ fi;
++ @$(MKCONFIG) -a at91sam9260ek arm arm926ejs at91sam9260ek atmel at91sam9
++
++at91sam9xeek_nandflash_config \
++at91sam9xeek_dataflash_cs0_config \
++at91sam9xeek_dataflash_cs1_config \
++at91sam9xeek_config : unconfig
++ @mkdir -p $(obj)include
++ @if [ "$(findstring _nandflash,$@)" ] ; then \
++ echo "#define CFG_USE_NANDFLASH 1" >>$(obj)include/config.h ; \
++ $(XECHO) "... with environment variable in NAND FLASH" ; \
++ elif [ "$(findstring dataflash_cs0,$@)" ] ; then \
++ echo "#define CFG_USE_DATAFLASH_CS0 1" >>$(obj)include/config.h ; \
++ $(XECHO) "... with environment variable in SPI DATAFLASH CS0" ; \
++ else \
++ echo "#define CFG_USE_DATAFLASH_CS1 1" >>$(obj)include/config.h ; \
++ $(XECHO) "... with environment variable in SPI DATAFLASH CS1" ; \
++ fi;
++ @$(MKCONFIG) -n at91sam9xeek -a at91sam9260ek arm arm926ejs at91sam9260ek atmel at91sam9
++
++at91sam9g20ek_nandflash_config \
++at91sam9g20ek_dataflash_cs0_config \
++at91sam9g20ek_dataflash_cs1_config \
++at91sam9g20ek_2mmc_nandflash_config \
++at91sam9g20ek_2mmc_dataflash_cs0_config \
++at91sam9g20ek_2mmc_dataflash_cs1_config \
++at91sam9g20ek_config : unconfig
++ @mkdir -p $(obj)include
++ @if [ "$(findstring _nandflash,$@)" ] ; then \
++ echo "#define CFG_USE_NANDFLASH 1" >>$(obj)include/config.h ; \
++ $(XECHO) "... with environment variable in NAND FLASH" ; \
++ elif [ "$(findstring dataflash_cs0,$@)" ] ; then \
++ echo "#define CFG_USE_DATAFLASH_CS0 1" >>$(obj)include/config.h ; \
++ $(XECHO) "... with environment variable in SPI DATAFLASH CS0" ; \
++ else \
++ echo "#define CFG_USE_DATAFLASH_CS1 1" >>$(obj)include/config.h ; \
++ $(XECHO) "... with environment variable in SPI DATAFLASH CS1" ; \
++ fi;
++ @if [ "$(findstring _2mmc_,$@)" ] ; then \
++ echo "#define CONFIG_AT91SAM9G20EK_2MMC 1" >>$(obj)include/config.h ; \
++ $(XECHO) "... AT91SAM9G20EK board with two SD/MMC slots" ; \
++ else \
++ echo "#define CONFIG_AT91SAM9G20EK 1" >>$(obj)include/config.h ; \
++ $(XECHO) "... AT91SAM9G20EK Board" ; \
++ fi;
++ @$(MKCONFIG) -a at91sam9g20ek arm arm926ejs at91sam9g20ek atmel at91sam9
++
++at91sam9261ek_nandflash_config \
++at91sam9261ek_dataflash_cs0_config \
++at91sam9261ek_dataflash_cs3_config \
++at91sam9261ek_config : unconfig
++ @mkdir -p $(obj)include
++ @if [ "$(findstring _nandflash,$@)" ] ; then \
++ echo "#define CFG_USE_NANDFLASH 1" >>$(obj)include/config.h ; \
++ $(XECHO) "... with environment variable in NAND FLASH" ; \
++ elif [ "$(findstring dataflash_cs3,$@)" ] ; then \
++ echo "#define CFG_USE_DATAFLASH_CS3 1" >>$(obj)include/config.h ; \
++ $(XECHO) "... with environment variable in SPI DATAFLASH CS3" ; \
++ else \
++ echo "#define CFG_USE_DATAFLASH_CS0 1" >>$(obj)include/config.h ; \
++ $(XECHO) "... with environment variable in SPI DATAFLASH CS0" ; \
++ fi;
++ @$(MKCONFIG) -a at91sam9261ek arm arm926ejs at91sam9261ek atmel at91sam9
++
++at91sam9g10ek_nandflash_config \
++at91sam9g10ek_dataflash_cs0_config \
++at91sam9g10ek_dataflash_cs3_config \
++at91sam9g10ek_config : unconfig
++ @if [ "$(findstring _nandflash,$@)" ] ; then \
++ echo "#define CFG_USE_NANDFLASH 1" >>$(obj)include/config.h ; \
++ $(XECHO) "... with environment variable in NAND FLASH" ; \
++ elif [ "$(findstring dataflash_cs0,$@)" ] ; then \
++ echo "#define CFG_USE_DATAFLASH_CS0 1" >>$(obj)include/config.h ; \
++ $(XECHO) "... with environment variable in SPI DATAFLASH CS0" ; \
++ else \
++ echo "#define CFG_USE_DATAFLASH_CS3 1" >>$(obj)include/config.h ; \
++ $(XECHO) "... with environment variable in SPI DATAFLASH CS3" ; \
++ fi;
++ @$(MKCONFIG) -a at91sam9g10ek arm arm926ejs at91sam9g10ek atmel at91sam9
++
++at91sam9263ek_nandflash_config \
++at91sam9263ek_dataflash_config \
++at91sam9263ek_dataflash_cs0_config \
++at91sam9263ek_config : unconfig
++ @mkdir -p $(obj)include
++ @if [ "$(findstring _nandflash,$@)" ] ; then \
++ echo "#define CFG_USE_NANDFLASH 1" >>$(obj)include/config.h ; \
++ $(XECHO) "... with environment variable in NAND FLASH" ; \
++ else \
++ echo "#define CFG_USE_DATAFLASH 1" >>$(obj)include/config.h ; \
++ $(XECHO) "... with environment variable in SPI DATAFLASH CS0" ; \
++ fi;
++ @$(MKCONFIG) -a at91sam9263ek arm arm926ejs at91sam9263ek atmel at91sam9
++
++at91sam9rlek_nandflash_config \
++at91sam9rlek_dataflash_config \
++at91sam9rlek_dataflash_cs0_config \
++at91sam9rlek_config : unconfig
++ @mkdir -p $(obj)include
++ @if [ "$(findstring _nandflash,$@)" ] ; then \
++ echo "#define CFG_USE_NANDFLASH 1" >>$(obj)include/config.h ; \
++ $(XECHO) "... with environment variable in NAND FLASH" ; \
++ else \
++ echo "#define CFG_USE_DATAFLASH 1" >>$(obj)include/config.h ; \
++ $(XECHO) "... with environment variable in SPI DATAFLASH CS0" ; \
++ fi;
++ @$(MKCONFIG) -a at91sam9rlek arm arm926ejs at91sam9rlek atmel at91sam9
++
++at91sam9m10g45ek_nandflash_config \
++at91sam9m10g45ek_dataflash_config \
++at91sam9m10g45ek_dataflash_cs0_config \
++at91sam9m10g45ek_config : unconfig
++ @mkdir -p $(obj)include
++ @if [ "$(findstring _nandflash,$@)" ] ; then \
++ echo "#define CFG_USE_NANDFLASH 1" >>$(obj)include/config.h ; \
++ $(XECHO) "... with environment variable in NAND FLASH" ; \
++ echo "#define CFG_USE_AT91SAM9M10G45EK 1" >>$(obj)include/config.h ; \
++ else \
++ echo "#define CFG_USE_DATAFLASH 1" >>$(obj)include/config.h ; \
++ $(XECHO) "... with environment variable in SPI DATAFLASH CS0" ; \
++ echo "#define CFG_USE_AT91SAM9M10G45EK 1" >>$(obj)include/config.h ; \
++ fi;
++ @$(MKCONFIG) -a at91sam9m10g45ek arm arm926ejs at91sam9m10g45ek atmel at91sam9
++
++at91sam9g45ekes_nandflash_config \
++at91sam9g45ekes_dataflash_config \
++at91sam9g45ekes_dataflash_cs0_config \
++at91sam9g45ekes_config : unconfig
++ @mkdir -p $(obj)include
++ @if [ "$(findstring _nandflash,$@)" ] ; then \
++ echo "#define CFG_USE_NANDFLASH 1" >>$(obj)include/config.h ; \
++ $(XECHO) "... with environment variable in NAND FLASH" ; \
++ echo "#define CFG_USE_AT91SAM9G45EKES 1" >>$(obj)include/config.h ; \
++ else \
++ echo "#define CFG_USE_DATAFLASH 1" >>$(obj)include/config.h ; \
++ $(XECHO) "... with environment variable in SPI DATAFLASH CS0" ; \
++ echo "#define CFG_USE_AT91SAM9G45EKES 1" >>$(obj)include/config.h ; \
++ fi;
++ @$(MKCONFIG) -a at91sam9m10g45ek arm arm926ejs at91sam9m10g45ek atmel at91sam9
++
++at91sam9m10ekes_nandflash_config \
++at91sam9m10ekes_dataflash_config \
++at91sam9m10ekes_dataflash_cs0_config \
++at91sam9m10ekes_config : unconfig
++ @mkdir -p $(obj)include
++ @if [ "$(findstring _nandflash,$@)" ] ; then \
++ echo "#define CFG_USE_NANDFLASH 1" >>$(obj)include/config.h ; \
++ $(XECHO) "... with environment variable in NAND FLASH" ; \
++ echo "#define CFG_USE_AT91SAM9M10EKES 1" >>$(obj)include/config.h ; \
++ else \
++ echo "#define CFG_USE_DATAFLASH 1" >>$(obj)include/config.h ; \
++ $(XECHO) "... with environment variable in SPI DATAFLASH CS0" ; \
++ echo "#define CFG_USE_AT91SAM9M10EKES 1" >>$(obj)include/config.h ; \
++ fi;
++ @$(MKCONFIG) -a at91sam9m10g45ek arm arm926ejs at91sam9m10g45ek atmel at91sam9
+
+ ########################################################################
+ ## ARM Integrator boards - see doc/README-integrator for more info.
+diff -uprN u-boot-1.3.4-vanilla/net/eth.c u-boot-1.3.4/net/eth.c
+--- u-boot-1.3.4-vanilla/net/eth.c 2008-08-12 09:08:38.000000000 -0500
++++ u-boot-1.3.4/net/eth.c 2010-03-25 16:45:59.000000000 -0500
+@@ -287,7 +287,7 @@ int eth_initialize(bd_t *bis)
+ mcdmafec_initialize(bis);
+ #endif
+ #if defined(CONFIG_AT91CAP9) || defined(CONFIG_AT91SAM9260) || \
+- defined(CONFIG_AT91SAM9263)
++ defined(CONFIG_AT91SAM9263) || defined(CONFIG_AT91SAM9G20)
+ at91sam9_eth_initialize(bis);
+ #endif
+
diff --git a/recipes/u-boot/u-boot_1.3.4.bb b/recipes/u-boot/u-boot_1.3.4.bb
new file mode 100644
index 0000000000..497654dc77
--- /dev/null
+++ b/recipes/u-boot/u-boot_1.3.4.bb
@@ -0,0 +1,28 @@
+require u-boot.inc
+
+PR = "r5"
+ALLOW_EMPTY = 1
+
+SRC_URI = "ftp://ftp.denx.de/pub/u-boot/u-boot-${PV}.tar.bz2"
+
+SRC_URI_append_mtcdp = "\
+ file://u-boot-${PV}-mts.patch;patch=1 \
+ file://fw_env.config \
+"
+
+TARGET_LDFLAGS = ""
+
+inherit base
+
+FILES_${PN} = " \
+ ${base_sbindir}/fw_setenv \
+ ${base_sbindir}/fw_printenv \
+"
+
+FILES_${PN}_append_mtcdp = "${sysconfdir}/fw_env.config"
+
+# Don't override install if you want to install any of the U-Boot tools
+do_install () {
+ echo "nothing to install"
+}
+