diff options
author | Koen Kooi <koen@openembedded.org> | 2009-08-26 11:35:14 +0200 |
---|---|---|
committer | Koen Kooi <koen@openembedded.org> | 2009-08-26 11:35:14 +0200 |
commit | 172cb63ce5e91d489993590ec09e418aba019b4e (patch) | |
tree | e10d322895620ec0c96c2ab0efcd296bfc93b6b9 /recipes/ti/files/dsplink-128M.patch | |
parent | bac5eef9c8a73672ee114926011addabb36610eb (diff) |
dvsdk: rename to ti now that other things like bitblit live in that dir now
Diffstat (limited to 'recipes/ti/files/dsplink-128M.patch')
-rw-r--r-- | recipes/ti/files/dsplink-128M.patch | 104 |
1 files changed, 104 insertions, 0 deletions
diff --git a/recipes/ti/files/dsplink-128M.patch b/recipes/ti/files/dsplink-128M.patch new file mode 100644 index 0000000000..ff5902bf50 --- /dev/null +++ b/recipes/ti/files/dsplink-128M.patch @@ -0,0 +1,104 @@ +diff -Nurd dsplink_1_50/dsplink/config/all/CFG_Davinci_DM6446.c dsplink_1_50.work/dsplink/config/all/CFG_Davinci_DM6446.c +--- dsplink_1_50/dsplink/config/all/CFG_Davinci_DM6446.c 2007-12-03 08:11:41.000000000 -0500 ++++ dsplink_1_50.work/dsplink/config/all/CFG_Davinci_DM6446.c 2008-07-29 16:52:28.000000000 -0400 +@@ -69,8 +69,8 @@ + FALSE, /* AUTOSTART : Autostart the DSP (Not supported) */ + "DEFAULT.OUT", /* EXECUTABLE : Executable for autostart */ + TRUE, /* DOPOWERCTRL : Link does the Power Ctrl of DSP. */ +- 0x8FF00020, /* RESUMEADDR : Resume address */ +- 0x8FF00000, /* RESETVECTOR : Reset Vector for the DSP */ ++ 0x87000020, /* RESUMEADDR : Resume address */ ++ 0x87000000, /* RESETVECTOR : Reset Vector for the DSP */ + 0x80, /* RESETCODESIZE : Size of code at DSP Reset Vector */ + 1, /* MADUSIZE : DSP Minimum Addressable Data Unit */ + (Uint32) -1, /* CPUFREQ : DSP Frequency (in KHz), -1 if default setting is to be used */ +@@ -93,8 +93,8 @@ + { + 0, /* ENTRY : Entry number */ + "DSPLINKMEM", /* NAME : Name of the memory region */ +- 0x8FE00000, /* ADDRPHYS : Physical address */ +- 0x8FE00000, /* ADDRDSPVIRT : DSP virtual address */ ++ 0x87000000, /* ADDRPHYS : Physical address */ ++ 0x87000000, /* ADDRDSPVIRT : DSP virtual address */ + (Uint32) -1, /* ADDRGPPVIRT : GPP virtual address (if known) */ + 0x5000, /* SIZE : Size of the memory region */ + TRUE /* SHARED : Shared access memory? */ +@@ -102,8 +102,8 @@ + { + 1, /* ENTRY : Entry number */ + "DSPLINKMEM1", /* NAME : Name of the memory region */ +- 0x8FE05000, /* ADDRPHYS : Physical address */ +- 0x8FE05000, /* ADDRDSPVIRT : DSP virtual address */ ++ 0x87005000, /* ADDRPHYS : Physical address */ ++ 0x87005000, /* ADDRDSPVIRT : DSP virtual address */ + (Uint32) -1, /* ADDRGPPVIRT : GPP virtual address (if known) */ + 0xFB000, /* SIZE : Size of the memory region */ + TRUE /* SHARED : Shared access memory? */ +@@ -111,8 +111,8 @@ + { + 2, /* ENTRY : Entry number */ + "RESETCTRL", /* NAME : Name of the memory region */ +- 0x8FF00000, /* ADDRPHYS : Physical address */ +- 0x8FF00000, /* ADDRDSPVIRT : DSP virtual address */ ++ 0x87100000, /* ADDRPHYS : Physical address */ ++ 0x87100000, /* ADDRDSPVIRT : DSP virtual address */ + (Uint32) -1, /* ADDRGPPVIRT : GPP virtual address (if known) */ + 0x00000080, /* SIZE : Size of the memory region */ + FALSE /* SHARED : Shared access memory? */ +@@ -120,10 +120,10 @@ + { + 3, /* ENTRY : Entry number */ + "DDR", /* NAME : Name of the memory region */ +- 0x8FF00080, /* ADDRPHYS : Physical address */ +- 0x8FF00080, /* ADDRDSPVIRT : DSP virtual address */ ++ 0x87100080, /* ADDRPHYS : Physical address */ ++ 0x87100080, /* ADDRDSPVIRT : DSP virtual address */ + (Uint32) -1, /* ADDRGPPVIRT : GPP virtual address (if known) */ +- 0xFFF80, /* SIZE : Size of the memory region */ ++ 0xEFFF80, /* SIZE : Size of the memory region */ + FALSE /* SHARED : Shared access memory? */ + }, + { +diff -Nurd dsplink_1_50/dsplink/dsp/inc/DspBios/Davinci/DM6446/dsplink-davinci-base.tci dsplink_1_50.work/dsplink/dsp/inc/DspBios/Davinci/DM6446/dsplink-davinci-base.tci +--- dsplink_1_50/dsplink/dsp/inc/DspBios/Davinci/DM6446/dsplink-davinci-base.tci 2007-12-03 08:11:55.000000000 -0500 ++++ dsplink_1_50.work/dsplink/dsp/inc/DspBios/Davinci/DM6446/dsplink-davinci-base.tci 2008-07-29 16:56:03.000000000 -0400 +@@ -54,7 +54,10 @@ + prog.module("GBL").C64PLUSCONFIGURE = true ; + prog.module("GBL").C64PLUSL2CFG = "32k" ; + prog.module("GBL").C64PLUSL1DCFG = "32k" ; ++prog.module("GBL").C64PLUSMAR128to159 = 0xFFFFFFFF ; ++/* + prog.module("GBL").C64PLUSMAR128to159 = 0x00008000 ; ++*/ + + /* ============================================================================ + * MEM +@@ -67,7 +70,7 @@ + * ============================================================================ + */ + var DSPLINKMEM = prog.module("MEM").create("DSPLINKMEM"); +-DSPLINKMEM.base = 0x8FE00000; ++DSPLINKMEM.base = 0x87000000; + DSPLINKMEM.len = 0x100000; + DSPLINKMEM.createHeap = false; + DSPLINKMEM.comment = "DSPLINKMEM"; +@@ -77,7 +80,7 @@ + * ============================================================================ + */ + var RESET_VECTOR = prog.module("MEM").create("RESET_VECTOR"); +-RESET_VECTOR.base = 0x8FF00000; ++RESET_VECTOR.base = 0x87100000; + RESET_VECTOR.len = 0x00000080; + RESET_VECTOR.space = "code/data"; + RESET_VECTOR.createHeap = false; +@@ -88,8 +91,8 @@ + * ============================================================================ + */ + var DDR = prog.module("MEM").create("DDR"); +-DDR.base = 0x8FF00080; +-DDR.len = 0x000FFF80; ++DDR.base = 0x87100080; ++DDR.len = 0xEFFF80; + DDR.space = "code/data"; + DDR.createHeap = true; + DDR.heapSize = 0x10000; |