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authorGraeme Gregory <dp@xora.org.uk>2009-05-17 00:41:05 +0100
committerGraeme Gregory <dp@xora.org.uk>2009-05-17 00:41:05 +0100
commit83cb9a11a2b04f954575bf4f2bc35d0d1743c393 (patch)
tree9ff1006ff17a64fb6f2e8caca1bf621b46870162 /recipes/linux/linux-kirkwood/0001--ARM-Kirkwood-CPU-idle-driver.patch
parent25c0e5fe636260f8c86c3adf22cc20ec2c4fcb77 (diff)
linux-kirkwood_2.6.29.2.bb : add CPUIDLE support so hopefully we waste
less power while idle
Diffstat (limited to 'recipes/linux/linux-kirkwood/0001--ARM-Kirkwood-CPU-idle-driver.patch')
-rw-r--r--recipes/linux/linux-kirkwood/0001--ARM-Kirkwood-CPU-idle-driver.patch162
1 files changed, 162 insertions, 0 deletions
diff --git a/recipes/linux/linux-kirkwood/0001--ARM-Kirkwood-CPU-idle-driver.patch b/recipes/linux/linux-kirkwood/0001--ARM-Kirkwood-CPU-idle-driver.patch
new file mode 100644
index 0000000000..29e7851c7f
--- /dev/null
+++ b/recipes/linux/linux-kirkwood/0001--ARM-Kirkwood-CPU-idle-driver.patch
@@ -0,0 +1,162 @@
+From 286f96f0b2e1ee5a124effba59a01f8d4bf69ddf Mon Sep 17 00:00:00 2001
+From: Rabeeh Khoury <rabeeh@marvell.com>
+Date: Tue, 24 Mar 2009 16:10:15 +0200
+Subject: [PATCH] [ARM] Kirkwood: CPU idle driver
+
+The patch adds support for Kirkwood cpu idle.
+Two idle states are defined:
+1. Wait-for-interrupt (replacing default kirkwood wfi)
+2. Wait-for-interrupt and DDR self refresh
+
+Signed-off-by: Rabeeh Khoury <rabeeh@marvell.com>
+Signed-off-by: Nicolas Pitre <nico@marvell.com>
+---
+ arch/arm/configs/kirkwood_defconfig | 4 +-
+ arch/arm/mach-kirkwood/Makefile | 2 +
+ arch/arm/mach-kirkwood/cpuidle.c | 96 ++++++++++++++++++++++++
+ arch/arm/mach-kirkwood/include/mach/kirkwood.h | 1 +
+ 4 files changed, 102 insertions(+), 1 deletions(-)
+ create mode 100644 arch/arm/mach-kirkwood/cpuidle.c
+
+diff --git a/arch/arm/configs/kirkwood_defconfig b/arch/arm/configs/kirkwood_defconfig
+index c367ae4..a99b3eb 100644
+--- a/arch/arm/configs/kirkwood_defconfig
++++ b/arch/arm/configs/kirkwood_defconfig
+@@ -263,7 +263,9 @@ CONFIG_CMDLINE=""
+ #
+ # CPU Power Management
+ #
+-# CONFIG_CPU_IDLE is not set
++CONFIG_CPU_IDLE=y
++CONFIG_CPU_IDLE_GOV_LADDER=y
++CONFIG_CPU_IDLE_GOV_MENU=y
+
+ #
+ # Floating point emulation
+diff --git a/arch/arm/mach-kirkwood/Makefile b/arch/arm/mach-kirkwood/Makefile
+index 8f03c9b..f21f35d 100644
+--- a/arch/arm/mach-kirkwood/Makefile
++++ b/arch/arm/mach-kirkwood/Makefile
+@@ -5,3 +5,5 @@ obj-$(CONFIG_MACH_RD88F6192_NAS) += rd88f6192-nas-setup.o
+ obj-$(CONFIG_MACH_RD88F6281) += rd88f6281-setup.o
+ obj-$(CONFIG_MACH_SHEEVAPLUG) += sheevaplug-setup.o
+ obj-$(CONFIG_MACH_TS219) += ts219-setup.o
++
++obj-$(CONFIG_CPU_IDLE) += cpuidle.o
+diff --git a/arch/arm/mach-kirkwood/cpuidle.c b/arch/arm/mach-kirkwood/cpuidle.c
+new file mode 100644
+index 0000000..43052c7
+--- /dev/null
++++ b/arch/arm/mach-kirkwood/cpuidle.c
+@@ -0,0 +1,96 @@
++/*
++ * arch/arm/mach-kirkwood/cpuidle.c
++ *
++ * CPU idle Marvell Kirkwood SoCs
++ *
++ * This file is licensed under the terms of the GNU General Public
++ * License version 2. This program is licensed "as is" without any
++ * warranty of any kind, whether express or implied.
++ *
++ * The cpu idle uses wait-for-interrupt and DDR self refresh in order
++ * to implement two idle states -
++ * #1 wait-for-interrupt
++ * #2 wait-for-interrupt and DDR self refresh
++ */
++
++#include <linux/kernel.h>
++#include <linux/init.h>
++#include <linux/platform_device.h>
++#include <linux/cpuidle.h>
++#include <asm/io.h>
++#include <asm/proc-fns.h>
++#include <mach/kirkwood.h>
++
++#define KIRKWOOD_MAX_STATES 2
++
++static struct cpuidle_driver kirkwood_idle_driver = {
++ .name = "kirkwood_idle",
++ .owner = THIS_MODULE,
++};
++
++static DEFINE_PER_CPU(struct cpuidle_device, kirkwood_cpuidle_device);
++
++/* Actual code that puts the SoC in different idle states */
++static int kirkwood_enter_idle(struct cpuidle_device *dev,
++ struct cpuidle_state *state)
++{
++ struct timeval before, after;
++ int idle_time;
++
++ local_irq_disable();
++ do_gettimeofday(&before);
++ if (state == &dev->states[0])
++ /* Wait for interrupt state */
++ cpu_do_idle();
++ else if (state == &dev->states[1]) {
++ /*
++ * Following write will put DDR in self refresh.
++ * Note that we have 256 cycles before DDR puts it
++ * self in self-refresh, so the wait-for-interrupt
++ * call afterwards won't get the DDR from self refresh
++ * mode.
++ */
++ writel(0x7, DDR_OPERATION_BASE);
++ cpu_do_idle();
++ }
++ do_gettimeofday(&after);
++ local_irq_enable();
++ idle_time = (after.tv_sec - before.tv_sec) * USEC_PER_SEC +
++ (after.tv_usec - before.tv_usec);
++ return idle_time;
++}
++
++/* Initialize CPU idle by registering the idle states */
++static int kirkwood_init_cpuidle(void)
++{
++ struct cpuidle_device *device;
++
++ cpuidle_register_driver(&kirkwood_idle_driver);
++
++ device = &per_cpu(kirkwood_cpuidle_device, smp_processor_id());
++ device->state_count = KIRKWOOD_MAX_STATES;
++
++ /* Wait for interrupt state */
++ device->states[0].enter = kirkwood_enter_idle;
++ device->states[0].exit_latency = 1;
++ device->states[0].target_residency = 10000;
++ device->states[0].flags = CPUIDLE_FLAG_TIME_VALID;
++ strcpy(device->states[0].name, "WFI");
++ strcpy(device->states[0].desc, "Wait for interrupt");
++
++ /* Wait for interrupt and DDR self refresh state */
++ device->states[1].enter = kirkwood_enter_idle;
++ device->states[1].exit_latency = 10;
++ device->states[1].target_residency = 10000;
++ device->states[1].flags = CPUIDLE_FLAG_TIME_VALID;
++ strcpy(device->states[1].name, "DDR SR");
++ strcpy(device->states[1].desc, "WFI and DDR Self Refresh");
++
++ if (cpuidle_register_device(device)) {
++ printk(KERN_ERR "kirkwood_init_cpuidle: Failed registering\n");
++ return -EIO;
++ }
++ return 0;
++}
++
++device_initcall(kirkwood_init_cpuidle);
+diff --git a/arch/arm/mach-kirkwood/include/mach/kirkwood.h b/arch/arm/mach-kirkwood/include/mach/kirkwood.h
+index 38c9868..e9ae73d 100644
+--- a/arch/arm/mach-kirkwood/include/mach/kirkwood.h
++++ b/arch/arm/mach-kirkwood/include/mach/kirkwood.h
+@@ -86,6 +86,7 @@
+ */
+ #define DDR_VIRT_BASE (KIRKWOOD_REGS_VIRT_BASE | 0x00000)
+ #define DDR_WINDOW_CPU_BASE (DDR_VIRT_BASE | 0x1500)
++#define DDR_OPERATION_BASE (DDR_VIRT_BASE | 0x1418)
+
+ #define DEV_BUS_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE | 0x10000)
+ #define DEV_BUS_VIRT_BASE (KIRKWOOD_REGS_VIRT_BASE | 0x10000)
+--
+1.6.0.4
+