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authorDirk Opfer <dirk@do13.de>2009-08-11 11:54:41 +0200
committerDirk Opfer <dirk@do13.de>2009-08-12 10:41:52 +0200
commit5814ae4cdecac7099adcc29a9c1b92b0caabe1fc (patch)
tree895d2adbfb98e430a706a17fb70f5d21adccc875 /recipes/gcc/gcc-4.3.4/ep93xx/arm-crunch-neg-protect.patch
parentc80831a276fe0bc9f9718ac06241b26d043eef6c (diff)
gcc: add new gcc version 4.3.4
Tested on a armv5te platform using thumb instruction set
Diffstat (limited to 'recipes/gcc/gcc-4.3.4/ep93xx/arm-crunch-neg-protect.patch')
-rw-r--r--recipes/gcc/gcc-4.3.4/ep93xx/arm-crunch-neg-protect.patch33
1 files changed, 33 insertions, 0 deletions
diff --git a/recipes/gcc/gcc-4.3.4/ep93xx/arm-crunch-neg-protect.patch b/recipes/gcc/gcc-4.3.4/ep93xx/arm-crunch-neg-protect.patch
new file mode 100644
index 0000000000..63d3090e94
--- /dev/null
+++ b/recipes/gcc/gcc-4.3.4/ep93xx/arm-crunch-neg-protect.patch
@@ -0,0 +1,33 @@
+The Crunch cfnegs and cfnegd instructions have a hardware bug in all silicon
+revisions (D0 to E2) whereby neg(0) returns 0 (not -0). See erratum 12.
+
+For ieee-correctness, and to pass another case in GCC's IEEE testsuite,
+we disable the instruction and do it in software unless
+-funsafe-math-optimizations (included in -ffast-math) is given.
+
+ Martin Guy <martinwguy@yahoo.it>, September 2008
+
+--- gcc-4.3.2/gcc/config/arm/cirrus.md-original 2007-06-12 17:01:24.000000000 +1000
++++ gcc-4.3.2/gcc/config/arm/cirrus.md 2007-06-12 17:03:26.000000000 +1000
+@@ -254,18 +254,19 @@
+ [(set_attr "cirrus" "normal")]
+ )
+
++; Cirrus hardware bug: neg 0 -> 0 instead of -0
+ (define_insn "*cirrus_negsf2"
+ [(set (match_operand:SF 0 "cirrus_fp_register" "=v")
+ (neg:SF (match_operand:SF 1 "cirrus_fp_register" "v")))]
+- "TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_MAVERICK"
++ "TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_MAVERICK && ! HONOR_SIGNED_ZEROS (SFmode)"
+ "cfnegs%?\\t%V0, %V1"
+ [(set_attr "cirrus" "normal")]
+ )
+
+ (define_insn "*cirrus_negdf2"
+ [(set (match_operand:DF 0 "cirrus_fp_register" "=v")
+ (neg:DF (match_operand:DF 1 "cirrus_fp_register" "v")))]
+- "TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_MAVERICK"
++ "TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_MAVERICK && ! HONOR_SIGNED_ZEROS (DFmode)"
+ "cfnegd%?\\t%V0, %V1"
+ [(set_attr "cirrus" "normal")]
+ )